mirror of
https://github.com/RT-Thread/rt-thread.git
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[bsp][mm32f526x] 1.add mm32f526x bsp; (#9940)
[bsp][mm32f526x] 1.add a bsp for mm32f526x;
This commit is contained in:
Chasel
@@ -93,6 +93,7 @@ jobs:
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- "hc32l196"
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- "mm32/mm32f3270-100ask-pitaya"
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- "mm32f327x"
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- "mm32f526x"
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- "mm32l07x"
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- "sam7x"
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- "hk32/hk32f030c8-mini"
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@@ -0,0 +1,22 @@
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scons.args: &scons
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scons_arg:
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- '--strict'
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devices.gpio:
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<<: *scons
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kconfig:
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- CONFIG_RT_USING_PIN=y
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- CONFIG_BSP_USING_GPIO=y
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devices.uart:
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kconfig:
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- CONFIG_RT_USING_SERIAL=y
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- CONFIG_RT_USING_SERIAL_V1=y
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- CONFIG_BSP_USING_UART1=y
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- CONFIG_BSP_USING_UART2=y
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- CONFIG_BSP_USING_UART3=y
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devices.adc:
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kconfig:
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- CONFIG_RT_USING_ADC=y
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- CONFIG_BSP_USING_ADC=y
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- CONFIG_BSP_USING_ADC1=y
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- CONFIG_BSP_USING_ADC2=y
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,6 @@
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# files format check exclude path, please follow the instructions below to modify;
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# If you need to exclude an entire folder, add the folder path in dir_path;
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# If you need to exclude a file, add the path to the file in file_path.
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dir_path:
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- Libraries
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@@ -0,0 +1,17 @@
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mainmenu "RT-Thread Configuration"
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BSP_DIR := .
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RTT_DIR := ../..
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PKGS_DIR := packages
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source "$(RTT_DIR)/Kconfig"
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osource "$PKGS_DIR/Kconfig"
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rsource "board/Kconfig"
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config SOC_MM32F526x
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bool
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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default y
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@@ -0,0 +1,20 @@
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ifeq ($(shell uname), Linux)
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# Linux-specific settings
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toolchain=/home/mhy/gcc-arm-none-eabi-10.3-2021.10/bin
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else
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# Windows-specific settings
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# toolchain=F:\work\TOOLS\sdk-toolchain-RISC-V-GCC-WCH\bin
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ifndef toolchain
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$(warning Please rewrite the toolchain in windows local directory")
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exit 0
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endif
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endif
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all:
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scons -j 8 --exec-path=$(toolchain)
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PHONY: clean
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clean:
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scons -c --exec-path=$(toolchain)
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rm -f *.bin *.hex *.map > /dev/null 2>&1
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@@ -0,0 +1,154 @@
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# MM32F5265-OB开发板BSP 说明
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标签： MM32、Cortex-M33、MM32F5265、国产MCU
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---
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## 1. 简介
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本文档为MM32F5265-OB 评估板bsp适配说明
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### 1.1 开发板介绍
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MM32F5265-OB 是为了用户快速上手、了解学习MM32系列MCU的一块入门级开发板，可满足基础测试及高端开发需求。
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开发板外观如下图所示：
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MM32F5265-OB
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#### MM32F5265-OB 开发板特性：
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#### 内核与系统
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- 工作频率可达 120MHz
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- 搭载 “星辰”STAR-MC1 (兼容 Cortex-M33）处理器，采用 Armv8-M Mainline 架构，内置单精度浮点运算单元（FPU），支持 DSP 扩展
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- 4KB L1 指令缓存（I-Cache）和 4KB L1 数据缓存（D-Cache）
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- 三角函数加速单元（CORDIC），支持 Sin，Cos 和 Atan 操作
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- 外设互联矩阵 MindSwitch，支持定时器、GPIOs、EXTI、ADC、DAC 和比较器等模块信号间的直接连接或触发连接
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- 2 个 8 通道 DMA 控制器，支持外设类型包括定时器、ADC、DAC、UART、LPUART、I2C、SPI、QSPI 和 FlexCAN
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#### 存储器
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- 多达 256KB 的 Flash 存储器
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- 多达 128KB 的 SRAM
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- Boot loader 支持片内 Flash 在线系统编程（ISP）
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- QSPI 接口，支持扩展外部 NOR Flash 存储，支持在线执行模式（eXecute-In-Place，XIP）
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- FSMC 接口，支持外扩 SRAM/PSRAM/NOR Flash 类型，兼容 8080/6800 通信总线模式
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#### 时钟、复位和电源管理
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- 2.0V ∼ 5.5V 供电
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- 上电/断电复位（POR/PDR）、可编程电压监测器（PVD）
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- 外部 4 ∼ 24MHz 高速晶体振荡器
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- 内置经出厂调校的 8MHz 高速 RC 振荡器
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- 内置的 PLL1 可产生系统时钟，支持多种分频模式，为总线矩阵和外设提供时钟
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- 内置的 PLL2 可产生最高 100MHz 的系统时钟，支持多种分频模式，为 USB 和ADC 提供时钟
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- 内置 40KHz 低速振荡器
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- 外部 32.768KHz 低速振荡器，支持旁路功能
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#### 低功耗
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- 多种低功耗模式，包括：低功耗运行（Lower Power Run）、睡眠（Sleep）、低功耗睡眠（Low Power Sleep）、停机（Stop）、深度停机（Deep Stop）和待机模式（Standby）
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- VBAT 为 RTC 和后备寄存器（20 x 16 位）供电
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- 内置LPUART、LPTimer，支持从低功耗模式下触发唤醒
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#### 多达 14 个通信接口
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- 5 个 UART 接口
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- 1 个 LPUART 接口
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- 2 个 I2C 接口
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- 3 个 SPI 接口（支持 I2S 模式）
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- 1 个 USB 2.0，支持 Device & Host 模式
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- 2 个 FlexCAN 接口，兼容 CAN 2.0B 协议
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#### 13 个定时器
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- 2 个 16 位 4 通道高级定时器（TIM1 / TIM8），有 4 组包含互补输出功能的 PWM输出通道，并支持硬件死区插入和故障检测后的紧急停止功能
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- 2 个 16 位 4 通道通用定时器（TIM3 / TIM4）和 2 个 32 位 4 通道通用定时器（TIM2 / TIM5），每个通道配有 1 个 PWM 输出，并支持输入捕捉和输出比较，可用于红外、霍尔传感器或者编码器信号的解码
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- 2 个 16 位基础定时器（TIM6 / TIM7）可用作通用定时和产生中断
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- 1 个 16 位低功耗定时器（LPTIM）能在除了 Standby 以外的所有低功耗模式下唤醒处理器
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- 2 个看门狗定时器，包括独立型的 IWDG 和窗口型的 WWDG
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- 1 个 24 位 Systick 定时器
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- 1 个 RTC 实时时钟
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#### 2 个 12 位 ADC，共支持 19 个外部输入通道和 2 个内部输入通道，其中每个 ADC 支持最快 3MSPS 转换率，硬件支持过采样到 16 位分辨率
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- 转换范围：0 ∼ VDDA
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- 支持采样时间和分辨率配置
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- 支持硬件过采样，过采样次数从 2 到 256 次可选
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- 片上温度传感器
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- 片上电压传感器
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- VBAT 电压传感器
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#### 2 个 12 位 DAC
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#### 3 个 高速模拟比较器
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#### 多达 86 个快速 I/O 端口
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- 所有 I/O 口可以映像到 16 个外部中断
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- 所有端口均可输入输出电压不高于 VDD 的信号
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- 多达 61 个 5V 容忍 I/O 端口
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#### CRC 计算单元
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#### 96 位芯片唯一 ID（UID）
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#### 调试模式
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- 串行调试接口（SWD）
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- JTAG 接口
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#### 采用 LQFP100、LQFP64 和 LQFP48 封装
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#### 全系列支持 -40℃ ∼ +105℃ 扩展工业型工作温度范围
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#### 板载主控：MM32F5265E7PV
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板载资源：
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- 2 个用户LED
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- 2 个用户按键
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- 1 个复位按键
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- 1 个可调电位器
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- 8M SPI FLASH 和 2K EEPROM
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板载接口：
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- 1 x USB Type-C (USB-DBG)
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供电方式：
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- USB TYPE-C
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更多详细信息请咨询[上海灵动微电子](https://www.mindmotion.com.cn/)
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## 2. 编译说明
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推荐熟悉 RT_Thread 的用户使用[env工具](https://www.rt-thread.org/download.html#download-rt-thread-env-tool)，可以在console下进入到 `bsp/mm32f526x` 目录中，运行以下命令：
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```
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pkgs --update
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make
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```
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来编译这个板级支持包。如果编译正确无误，会产生rtthread.elf、rtthread.bin、rtthread.hex文件。其中 rtthread.bin、rtthread.hex 都可以烧写到设备中运行。
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## 3. 驱动支持情况及计划
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| 驱动 | 支持情况 | 备注 |
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| ---------- | :------: | :--------------------------: |
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| UART | 支持 | UART1/2/3 |
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| GPIO | 支持 | / |
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| ADC | 支持 | ADC1/2 |
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| FLASH | 支持 | / |
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## 4. 联系人信息
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维护人：
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- [Chasel](https://github.com/Maihuanyi) email: m19825309307@163.com
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## 5. 参考
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- [MM32F5260系列产品手册](https://www.mindmotion.com.cn/download/products/DS_MM32F5260_SC.pdf)
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- [MM32F5260系列用户手册](https://www.mindmotion.com.cn/download/products/UM_MM32F5260_SC.pdf)
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- [MiniBoard(MM32F5260)资料包](https://www.mindmotion.com.cn/support/development_tools/evaluation_boards/miniboard/mm32f5265e7pv/)
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- [KEIL Pack 设备支持包](https://www.mindmotion.com.cn/support/software/keil_pack/)
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- [IAR Pack 设备支持包](https://www.mindmotion.com.cn/support/software/iar_pack/)
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- [J-Link Pack 设备支持包](https://www.mindmotion.com.cn/support/software/jlink_pack/)
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@@ -0,0 +1,11 @@
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from building import *
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cwd = GetCurrentDir()
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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@@ -0,0 +1,48 @@
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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try:
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from building import *
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except:
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print('Cannot found RT-Thread root directory, please check RTT_ROOT')
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print(RTT_ROOT)
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exit(-1)
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM in ['iccarm']:
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env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(ARFLAGS = [''])
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
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Export('RTT_ROOT')
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Export('rtconfig')
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/libraries'):
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libraries_path_prefix = SDK_ROOT + '/libraries'
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else:
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libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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# make a building
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DoBuilding(TARGET, objs)
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@@ -0,0 +1,15 @@
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from building import *
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import os
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cwd = GetCurrentDir()
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src = Glob('*.c')
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CPPPATH = [cwd]
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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list = os.listdir(cwd)
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for item in list:
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if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
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group = group + SConscript(os.path.join(item, 'SConscript'))
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Return('group')
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@@ -0,0 +1,38 @@
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/*
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* Copyright (c) 2022-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
|
||||
* Date Author Notes
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* 2025-01-22 chasel first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "hal_rcc.h"
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#include "hal_gpio.h"
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#define LED1_PIN 31
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#define LED2_PIN 30
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int main(void)
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{
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/* set LED1 pin mode to output */
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rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
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/* set LED2 pin mode to output */
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rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
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while (1) {
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rt_pin_write(LED1_PIN, PIN_HIGH);
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rt_pin_write(LED2_PIN, PIN_HIGH);
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rt_thread_mdelay(500);
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rt_pin_write(LED1_PIN, PIN_LOW);
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rt_pin_write(LED2_PIN, PIN_LOW);
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rt_thread_mdelay(500);
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}
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return RT_EOK;
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||||
}
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||||
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@@ -0,0 +1,58 @@
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menu "Hardware Drivers Config"
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menu "On-chip Peripheral Drivers"
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menu "GPIO Drivers"
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config BSP_USING_GPIO
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bool "Enable GPIO"
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select RT_USING_PIN
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default n
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endmenu
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menu "UART Drivers"
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config BSP_USING_UART1
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bool "Enable UART1 PA9/10(T/R)"
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select RT_USING_SERIAL
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default n
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config BSP_USING_UART2
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bool "Enable UART2 PA2/3(T/R)"
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select RT_USING_SERIAL
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default n
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config BSP_USING_UART3
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bool "Enable UART3 PC10/11(T/R)"
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select RT_USING_SERIAL
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default y
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endmenu
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||||
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menuconfig BSP_USING_ADC
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bool "Enable ADC"
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default n
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select RT_USING_ADC
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if BSP_USING_ADC
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config BSP_USING_ADC1
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bool "Enable ADC1"
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default n
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config BSP_USING_ADC2
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bool "Enable ADC2"
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default n
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endif
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menu "Flash Drivers"
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config BSP_USING_OCFLASH
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bool "Enable On Chip Flash"
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default n
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config OCFLASH_USE_FAL
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bool "Enable On Chip Flash FAL Driver"
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depends on BSP_USING_OCFLASH
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select RT_USING_FAL
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default n
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config OCFLASH_USE_LFS
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bool "Enable On Chip Flash DFS Driver"
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depends on OCFLASH_USE_FAL
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select RT_USING_DFS
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||||
select RT_USING_MTD_NOR
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select PKG_USING_LITTLEFS
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||||
default n
|
||||
endmenu
|
||||
endmenu
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||||
endmenu
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||||
@@ -0,0 +1,18 @@
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# RT-Thread building script for component
|
||||
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add the general drivers.
|
||||
src = ['board.c']
|
||||
src += ['mm32_msp.c']
|
||||
|
||||
CPPPATH = [cwd]
|
||||
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,87 @@
|
||||
/*
|
||||
* Copyright (c) 2022-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-01-22 chasel first version
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
extern uint32_t SystemCoreClock;
|
||||
extern void SystemInit(void);
|
||||
|
||||
/**
|
||||
* this function will delay for some us.
|
||||
*
|
||||
* @param us the delay time of us
|
||||
*/
|
||||
void rt_hw_us_delay(rt_uint32_t us)
|
||||
{
|
||||
rt_uint32_t ticks;
|
||||
rt_uint32_t told, tnow, tcnt = 0;
|
||||
rt_uint32_t reload = SysTick->LOAD;
|
||||
|
||||
ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
|
||||
told = SysTick->VAL;
|
||||
while (1) {
|
||||
tnow = SysTick->VAL;
|
||||
if (tnow != told) {
|
||||
if (tnow < told) {
|
||||
tcnt += told - tnow;
|
||||
} else {
|
||||
tcnt += reload - tnow + told;
|
||||
}
|
||||
told = tnow;
|
||||
if (tcnt >= ticks) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void bsp_clock_config(void)
|
||||
{
|
||||
SystemInit();
|
||||
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
SysTick->CTRL |= 0x00000004UL;
|
||||
}
|
||||
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
bsp_clock_config();
|
||||
|
||||
#if defined(RT_USING_HEAP)
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_PIN
|
||||
extern int rt_hw_pin_init(void);
|
||||
rt_hw_pin_init();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_SERIAL
|
||||
extern int rt_hw_uart_init(void);
|
||||
rt_hw_uart_init();
|
||||
#endif
|
||||
|
||||
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
@@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (c) 2022-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-01-22 chasel first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <rthw.h>
|
||||
#include "mm32_device.h"
|
||||
#include <hal_common.h>
|
||||
#include "mm32_msp.h"
|
||||
|
||||
#define SRAM_SIZE 0x1C000
|
||||
|
||||
#define SRAM_BASE (0x30000000)
|
||||
|
||||
#define SRAM_END (SRAM_BASE + SRAM_SIZE)
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section = "HEAP"
|
||||
#define HEAP_BEGIN (__segment_end("HEAP"))
|
||||
#else
|
||||
extern int __bss_end__;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end__)
|
||||
#endif
|
||||
#define HEAP_END SRAM_END
|
||||
#define HEAP_SIZE (HEAP_END - (rt_uint32_t)HEAP_BEGIN)
|
||||
extern void rt_hw_board_init(void);
|
||||
|
||||
#define CLOCK_SYS_FREQ 120000000u
|
||||
#define CLOCK_SYSTICK_FREQ (CLOCK_SYS_FREQ/8u)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_IROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_IROM_end__ = 0x0003FFFF;
|
||||
define symbol __ICFEDIT_region_IRAM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_IRAM_end__ = 0x3001FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0800;
|
||||
define symbol __ICFEDIT_size_proc_stack__ = 0x0;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0800;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
define memory mem with size = 4G;
|
||||
define region IROM_region = mem:[from __ICFEDIT_region_IROM_start__ to __ICFEDIT_region_IROM_end__];
|
||||
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
do not initialize { section .noinit };
|
||||
initialize by copy { readwrite };
|
||||
if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
|
||||
{
|
||||
// Required in a multi-threaded application
|
||||
initialize by copy with packing = none { section __DLIB_PERTHREAD };
|
||||
}
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in IROM_region { readonly };
|
||||
place in IRAM_region { readwrite, block CSTACK, block PROC_STACK, block HEAP };
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,114 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
|
||||
; command above MUST be in first line (no comment above!)
|
||||
|
||||
/*
|
||||
;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
|
||||
*/
|
||||
|
||||
/*--------------------- Flash Configuration ----------------------------------
|
||||
; <h> Flash Configuration
|
||||
; <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
|
||||
; <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __ROM_BASE 0x008000000
|
||||
#define __ROM_SIZE 0x000040000
|
||||
|
||||
/*---------------------------- ITCM Configuration -----------------------------
|
||||
; <h> ITCM Configuration
|
||||
; <o0> ITCM Base Address <0x0-0xFFFFFFFF:8>
|
||||
; <o1> ITCM Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __ITCM_BASE 0x00000000
|
||||
#define __ITCM_SIZE 0x00008000
|
||||
|
||||
/*---------------------------- DTCM Configuration -----------------------------
|
||||
; <h> DTCM Configuration
|
||||
; <o0> DTCM Base Address <0x0-0xFFFFFFFF:8>
|
||||
; <o1> DTCM Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __DTCM_BASE 0x20000000
|
||||
#define __DTCM_SIZE 0x00008000
|
||||
|
||||
/*--------------------- Embedded RAM1 Configuration ---------------------------
|
||||
; <h> RAM Configuration
|
||||
; <o0> RAM1 Base Address <0x0-0xFFFFFFFF:8>
|
||||
; <o1> RAM1 Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __RAM1_BASE 0x30000000
|
||||
#define __RAM1_SIZE 0x0001C000
|
||||
|
||||
/*--------------------- Embedded RAM2 Configuration ---------------------------
|
||||
; <h> RAM Configuration
|
||||
; <o0> RAM2 Base Address <0x0-0xFFFFFFFF:8>
|
||||
; <o1> RAM2 Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __RAM2_BASE 0x3001C000
|
||||
#define __RAM2_SIZE 0x00004000
|
||||
|
||||
|
||||
/*--------------------- Stack / Heap Configuration ---------------------------
|
||||
; <h> Stack / Heap Configuration
|
||||
; <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __STACK_SIZE 0x00000800
|
||||
#define __HEAP_SIZE 0x00000C00
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
User Stack & Heap boundary definition
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __STACK_TOP (__RAM1_BASE + __RAM1_SIZE) /* starts at end of RAM */
|
||||
#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Scatter File Definitions definition
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __RO_BASE __ROM_BASE
|
||||
#define __RO_SIZE __ROM_SIZE
|
||||
|
||||
LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
|
||||
ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
; *(Veneer$$CMSE) ; uncomment for secure applications
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
|
||||
RW_ITCM __ITCM_BASE __ITCM_SIZE { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_DTCM __DTCM_BASE __DTCM_SIZE { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_RAM1 __RAM1_BASE (__RAM1_SIZE - __STACK_SIZE - __HEAP_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_RAM2 __RAM2_BASE __RAM2_SIZE { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
#if __HEAP_SIZE > 0
|
||||
ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap
|
||||
}
|
||||
#endif
|
||||
|
||||
ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,121 @@
|
||||
/*
|
||||
* Copyright (c) 2022-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-01-22 chasel first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "mm32_device.h"
|
||||
#include "mm32_msp.h"
|
||||
|
||||
void mm32_msp_uart_init(void *instance)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
UART_TypeDef *uart_x = (UART_TypeDef *)instance;
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
if(UART1 == uart_x)
|
||||
{
|
||||
/* Enable UART clock */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_UART1, ENABLE);
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
|
||||
|
||||
/* Configure USART Rx/tx PIN */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_High;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_7);
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_7);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_UART2
|
||||
if(UART2 == uart_x)
|
||||
{
|
||||
/* Enable UART clock */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART2, ENABLE);
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
|
||||
|
||||
/* Configure USART Rx/tx PIN */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_High;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_7);
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_7);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_UART3
|
||||
if(UART3 == uart_x)
|
||||
{
|
||||
/* Enable UART clock */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART3, ENABLE);
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
/* Configure USART Rx/tx PIN */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_High;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_7);
|
||||
GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_7);
|
||||
}
|
||||
#endif
|
||||
/* add others */
|
||||
}
|
||||
|
||||
#ifdef BSP_USING_ADC
|
||||
void mm32_msp_adc_init(void *instance)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
ADC_TypeDef *adc_x = (ADC_TypeDef *)instance;
|
||||
|
||||
#ifdef BSP_USING_ADC1
|
||||
if(adc_x == ADC1)
|
||||
{
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); //Enable ADC1 clock
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
|
||||
|
||||
/* configure adc channel as analog input */
|
||||
GPIO_StructInit(&GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
|
||||
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_High;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AIN;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ADC2
|
||||
if(adc_x == ADC2)
|
||||
{
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE); //Enable ADC2 clock
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
|
||||
|
||||
/* configure adc channel as analog input */
|
||||
GPIO_StructInit(&GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
|
||||
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_High;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AIN;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif /* BSP_USING_ADC */
|
||||
|
||||
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Copyright (c) 2022-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-01-22 chasel first version
|
||||
*/
|
||||
|
||||
#ifndef __MM32_MSP_H__
|
||||
#define __MM32_MSP_H__
|
||||
|
||||
void mm32_msp_uart_init(void *instance);
|
||||
void mm32_msp_adc_init(void *instance);
|
||||
|
||||
#endif /* __MM32_MSP_H__ */
|
||||
@@ -0,0 +1,33 @@
|
||||
# RT-Thread building script for component
|
||||
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add the general drivers.
|
||||
src = []
|
||||
|
||||
# add serial driver code
|
||||
if GetDepend('BSP_USING_UART1') or GetDepend('BSP_USING_UART2') or GetDepend('BSP_USING_UART3'):
|
||||
src += ['drv_uart.c']
|
||||
|
||||
# add gpio driver code
|
||||
if GetDepend(['BSP_USING_GPIO']):
|
||||
src += ['drv_gpio.c']
|
||||
|
||||
# add adc driver code
|
||||
if GetDepend(['BSP_USING_ADC']):
|
||||
src += ['drv_adc.c']
|
||||
|
||||
# add flash driver code
|
||||
if GetDepend(['BSP_USING_OCFLASH']):
|
||||
src += ['drv_flash.c']
|
||||
|
||||
CPPPATH = [cwd]
|
||||
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,163 @@
|
||||
/*
|
||||
* Copyright (c) 2022-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-01-22 chasel first version
|
||||
*/
|
||||
#include <rtdevice.h>
|
||||
#include "board.h"
|
||||
#include "drv_adc.h"
|
||||
#include <hal_gpio.h>
|
||||
#include <hal_adc.h>
|
||||
#include <hal_rcc.h>
|
||||
#include <hal_misc.h>
|
||||
|
||||
#if defined(BSP_USING_ADC)
|
||||
|
||||
struct mm32_adc
|
||||
{
|
||||
struct rt_adc_device mm32_adc_device;
|
||||
ADC_TypeDef *adc_x;
|
||||
char *name;
|
||||
};
|
||||
|
||||
#if defined(BSP_USING_ADC1)
|
||||
struct mm32_adc mm32_adc1_config = {
|
||||
.adc_x = ADC1,
|
||||
.name = "adc1",
|
||||
};
|
||||
#endif /* BSP_USING_ADC1 */
|
||||
|
||||
#if defined(BSP_USING_ADC2)
|
||||
struct mm32_adc mm32_adc2_config = {
|
||||
.adc_x = ADC2,
|
||||
.name = "adc2",
|
||||
};
|
||||
#endif /* BSP_USING_ADC2 */
|
||||
|
||||
static void ADCxChannelEnable(ADC_TypeDef* ADCn, rt_uint32_t channel)
|
||||
{
|
||||
ADCn->ADCHS &= ~(1 << channel);
|
||||
ADCn->ADCHS |= (1 << channel);
|
||||
}
|
||||
|
||||
static rt_err_t mm32_adc_init(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
|
||||
{
|
||||
ADC_InitTypeDef ADC_InitStruct;
|
||||
ADC_TypeDef *adc_x;
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
adc_x = device->parent.user_data;
|
||||
|
||||
if (enabled) {
|
||||
mm32_msp_adc_init((void *)adc_x);
|
||||
|
||||
ADC_CalibrationConfig(adc_x, 0x1FE);
|
||||
|
||||
ADC_StructInit(&ADC_InitStruct);
|
||||
ADC_InitStruct.ADC_Resolution = ADC_Resolution_12b;
|
||||
ADC_InitStruct.ADC_Prescaler = ADC_Prescaler_16; //ADC prescale factor
|
||||
ADC_InitStruct.ADC_Mode = ADC_Mode_Scan; //Set ADC mode to scan conversion mode
|
||||
ADC_InitStruct.ADC_DataAlign = ADC_DataAlign_Right; //AD data right-justified
|
||||
ADC_Init(adc_x, &ADC_InitStruct);
|
||||
|
||||
ADC_SampleTimeConfig(adc_x, channel, ADC_SampleTime_240_5);
|
||||
|
||||
ADC_ChannelCmd(adc_x, channel, ENABLE);
|
||||
|
||||
ADC_DifferentialConversionConfig(adc_x, ADC_Pseudo_Differential_Conversion_4_5);
|
||||
|
||||
ADC_Cmd(adc_x, ENABLE);
|
||||
} else {
|
||||
#if defined(BSP_USING_ADC1)
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, DISABLE); //disable ADC1 clock
|
||||
#endif /* BSP_USING_ADC1 */
|
||||
|
||||
#if defined(BSP_USING_ADC2)
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, DISABLE); //disable ADC2 clock
|
||||
#endif /* BSP_USING_ADC2 */
|
||||
|
||||
ADC_DeInit(adc_x);
|
||||
ADC_Cmd(adc_x, DISABLE);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t mm32_get_adc_value(struct rt_adc_device *device, rt_int8_t channel, rt_uint32_t *value)
|
||||
{
|
||||
ADC_TypeDef *adc_x;
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
adc_x = device->parent.user_data;
|
||||
|
||||
ADC_SoftwareStartConvCmd(adc_x, ENABLE);
|
||||
|
||||
rt_uint32_t cnt = 0;
|
||||
/* @warning There is a bug here, please fix me. */
|
||||
while(ADC_GetFlagStatus(adc_x, ADC_FLAG_EOS) == 0) {
|
||||
rt_thread_mdelay(1);
|
||||
if (cnt++ > 5)
|
||||
break;
|
||||
}
|
||||
ADC_ClearFlag(adc_x, ADC_FLAG_EOS);
|
||||
|
||||
*value = ADC_GetChannelConvertedValue(adc_x, channel);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_uint8_t mm32_adc_get_resolution(struct rt_adc_device *device)
|
||||
{
|
||||
ADC_TypeDef *adc_x = device->parent.user_data;
|
||||
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
|
||||
switch( ((adc_x->ADCFG)&(0x00000380)) )
|
||||
{
|
||||
case ADC_Resolution_12b:
|
||||
return 12;
|
||||
case ADC_Resolution_11b:
|
||||
return 11;
|
||||
case ADC_Resolution_10b:
|
||||
return 10;
|
||||
case ADC_Resolution_9b:
|
||||
return 9;
|
||||
case ADC_Resolution_8b:
|
||||
return 8;
|
||||
default:
|
||||
return 12;
|
||||
}
|
||||
}
|
||||
|
||||
static rt_int16_t mm32_adc_get_vref(struct rt_adc_device *device)
|
||||
{
|
||||
if(device == RT_NULL)
|
||||
return -RT_ERROR;
|
||||
|
||||
return 3300;
|
||||
}
|
||||
|
||||
static const struct rt_adc_ops mm32_adc_ops =
|
||||
{
|
||||
.enabled = mm32_adc_init,
|
||||
.convert = mm32_get_adc_value,
|
||||
.get_resolution = mm32_adc_get_resolution,
|
||||
.get_vref = mm32_adc_get_vref,
|
||||
};
|
||||
|
||||
int rt_hw_adc_init(void)
|
||||
{
|
||||
#if defined(BSP_USING_ADC1)
|
||||
rt_hw_adc_register(&mm32_adc1_config.mm32_adc_device, mm32_adc1_config.name, &mm32_adc_ops, mm32_adc1_config.adc_x);
|
||||
#endif /* BSP_USING_ADC1 */
|
||||
|
||||
#if defined(BSP_USING_ADC2)
|
||||
rt_hw_adc_register(&mm32_adc2_config.mm32_adc_device, mm32_adc2_config.name, &mm32_adc_ops, mm32_adc2_config.adc_x);
|
||||
#endif /* BSP_USING_ADC2 */
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_adc_init);
|
||||
|
||||
#endif /* BSP_USING_ADC */
|
||||
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (c) 2022-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-01-22 chasel first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_ADC_H__
|
||||
#define __DRV_ADC_H__
|
||||
|
||||
int rt_hw_adc_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,145 @@
|
||||
/*
|
||||
* Copyright (c) 2022-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-01-22 chasel first version
|
||||
*/
|
||||
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "hal_flash.h"
|
||||
#include "drv_flash.h"
|
||||
|
||||
#define OCFLASH_BLK_SIZE 1024
|
||||
#define OCFLASH_LEN 1024*256
|
||||
#define OCFLASH_ADDR 0x08000000
|
||||
|
||||
#ifdef OCFLASH_USE_FAL
|
||||
#include <fal.h>
|
||||
#endif
|
||||
|
||||
#ifdef OCFLASH_USE_LFS
|
||||
#include <dfs_fs.h>
|
||||
#define FS_PARTITION_NAME "filesystem"
|
||||
#endif
|
||||
|
||||
static int init(void)
|
||||
{
|
||||
/* do nothing now */
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int read(long offset, uint8_t *buf, size_t size)
|
||||
{
|
||||
size_t i;
|
||||
uint32_t addr = OCFLASH_ADDR + offset;
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
*buf = *(__IO uint8_t *)addr;
|
||||
buf++;
|
||||
addr++;
|
||||
}
|
||||
return size;
|
||||
}
|
||||
|
||||
static int write(long offset, const uint8_t *buf, size_t size)
|
||||
{
|
||||
size_t i;
|
||||
uint32_t addr = OCFLASH_ADDR + offset;
|
||||
|
||||
FLASH->KEYR = 0x45670123;
|
||||
FLASH->KEYR = 0xCDEF89AB;
|
||||
FLASH->SR = 0x00000001 | 0x00000004 | 0x00000010;
|
||||
FLASH->CR |= 0x1;
|
||||
|
||||
i = 0;
|
||||
while (i < size)
|
||||
{
|
||||
*(__IO uint16_t *)addr = *buf | *(buf + 1) << 8;
|
||||
addr = addr + 2;
|
||||
buf += 2;
|
||||
i += 2;
|
||||
}
|
||||
//Lock flash
|
||||
FLASH->CR |= 0x00000080;
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
static int erase(long offset, size_t size)
|
||||
{
|
||||
int len;
|
||||
RT_ASSERT(offset > 0 && offset < OCFLASH_LEN);
|
||||
int page_addr = (offset >> 10) << 10;
|
||||
len = size + (offset - page_addr);
|
||||
while (len > 0)
|
||||
{
|
||||
FLASH_Unlock();
|
||||
FLASH_ErasePage(page_addr);
|
||||
FLASH_Lock();
|
||||
len -= OCFLASH_BLK_SIZE;
|
||||
page_addr += OCFLASH_BLK_SIZE;
|
||||
}
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
#ifdef OCFLASH_USE_FAL
|
||||
const struct fal_flash_dev mm32_onchip_flash =
|
||||
{
|
||||
.name = "mm32_onchip",
|
||||
.addr = 0x08000000,
|
||||
.len = 1024 * 512,
|
||||
.blk_size = 1024,
|
||||
.ops = {init, read, write, erase},
|
||||
.write_gran = 2
|
||||
};
|
||||
#endif
|
||||
|
||||
int flash_init(void)
|
||||
{
|
||||
#ifdef OCFLASH_USE_FAL
|
||||
fal_init();
|
||||
#endif
|
||||
#ifdef OCFLASH_USE_LFS
|
||||
struct rt_device *flash_dev = fal_mtd_nor_device_create(FS_PARTITION_NAME);
|
||||
|
||||
if (flash_dev == NULL)
|
||||
{
|
||||
rt_kprintf("Can't create a mtd device on '%s' partition.\n", FS_PARTITION_NAME);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("Create a mtd device on the %s partition of flash successful.\n", FS_PARTITION_NAME);
|
||||
}
|
||||
|
||||
if (rt_device_find(FS_PARTITION_NAME) != RT_NULL)
|
||||
{
|
||||
if (dfs_mount(FS_PARTITION_NAME, "/", "lfs", 0, 0) == RT_EOK)
|
||||
{
|
||||
rt_kprintf("onchip lfs filesystem mount to '/'\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
dfs_mkfs("lfs", FS_PARTITION_NAME);
|
||||
if (dfs_mount(FS_PARTITION_NAME, "/", "lfs", 0, 0) == RT_EOK)
|
||||
{
|
||||
rt_kprintf("onchip lfs filesystem mount to '/' with mkfs\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("onchip lfs filesystem mount to '/' failed!\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("find filesystem portion failed\r\n");
|
||||
}
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
INIT_APP_EXPORT(flash_init);
|
||||
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* Copyright (c) 2022-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-01-22 chasel first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_FLASH_H__
|
||||
#define __DRV_FLASH_H__
|
||||
|
||||
#include <rtdevice.h>
|
||||
|
||||
struct spi_flash_device
|
||||
{
|
||||
struct rt_device flash_device;
|
||||
struct rt_device_blk_geometry geometry;
|
||||
struct rt_spi_device *rt_spi_device;
|
||||
struct rt_mutex lock;
|
||||
void *user_data;
|
||||
};
|
||||
|
||||
int flash_init(void);
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Copyright (c) 2022-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-01-22 chasel first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_GPIO_H__
|
||||
#define __DRV_GPIO_H__
|
||||
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (c) 2022-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-01-22 chasel first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_UART_H__
|
||||
#define __DRV_UART_H__
|
||||
|
||||
int rt_hw_uart_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-08-05 mazhiyuan first version
|
||||
*/
|
||||
|
||||
#ifndef _FAL_CFG_H_
|
||||
#define _FAL_CFG_H_
|
||||
|
||||
#include <rtconfig.h>
|
||||
#include <board.h>
|
||||
|
||||
|
||||
/* ===================== Flash device Configuration ========================= */
|
||||
extern const struct fal_flash_dev mm32_onchip_flash;
|
||||
extern struct fal_flash_dev nor_flash0;
|
||||
|
||||
/* flash device table */
|
||||
#define FAL_FLASH_DEV_TABLE \
|
||||
{ \
|
||||
&mm32_onchip_flash, \
|
||||
}
|
||||
/* ====================== Partition Configuration ========================== */
|
||||
#ifdef FAL_PART_HAS_TABLE_CFG
|
||||
/* partition table */
|
||||
#define FAL_PART_TABLE \
|
||||
{ \
|
||||
{FAL_PART_MAGIC_WORD, "bl", "mm32_onchip", 0, 128*1024, 0}, \
|
||||
{FAL_PART_MAGIC_WORD, "filesystem", "mm32_onchip", 128*1024, 255*1024, 0}, \
|
||||
}
|
||||
#endif /* FAL_PART_HAS_TABLE_CFG */
|
||||
|
||||
#endif /* _FAL_CFG_H_ */
|
||||
@@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_IROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_IROM_end__ = 0x0003FFFF;
|
||||
define symbol __ICFEDIT_region_IRAM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_IRAM_end__ = 0x3001FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0800;
|
||||
define symbol __ICFEDIT_size_proc_stack__ = 0x0;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0800;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
define memory mem with size = 4G;
|
||||
define region IROM_region = mem:[from __ICFEDIT_region_IROM_start__ to __ICFEDIT_region_IROM_end__];
|
||||
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
do not initialize { section .noinit };
|
||||
initialize by copy { readwrite };
|
||||
if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
|
||||
{
|
||||
// Required in a multi-threaded application
|
||||
initialize by copy with packing = none { section __DLIB_PERTHREAD };
|
||||
}
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in IROM_region { readonly };
|
||||
place in IRAM_region { readwrite, block CSTACK, block PROC_STACK, block HEAP };
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,114 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
|
||||
; command above MUST be in first line (no comment above!)
|
||||
|
||||
/*
|
||||
;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
|
||||
*/
|
||||
|
||||
/*--------------------- Flash Configuration ----------------------------------
|
||||
; <h> Flash Configuration
|
||||
; <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
|
||||
; <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __ROM_BASE 0x008000000
|
||||
#define __ROM_SIZE 0x000040000
|
||||
|
||||
/*---------------------------- ITCM Configuration -----------------------------
|
||||
; <h> ITCM Configuration
|
||||
; <o0> ITCM Base Address <0x0-0xFFFFFFFF:8>
|
||||
; <o1> ITCM Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __ITCM_BASE 0x00000000
|
||||
#define __ITCM_SIZE 0x00008000
|
||||
|
||||
/*---------------------------- DTCM Configuration -----------------------------
|
||||
; <h> DTCM Configuration
|
||||
; <o0> DTCM Base Address <0x0-0xFFFFFFFF:8>
|
||||
; <o1> DTCM Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __DTCM_BASE 0x20000000
|
||||
#define __DTCM_SIZE 0x00008000
|
||||
|
||||
/*--------------------- Embedded RAM1 Configuration ---------------------------
|
||||
; <h> RAM Configuration
|
||||
; <o0> RAM1 Base Address <0x0-0xFFFFFFFF:8>
|
||||
; <o1> RAM1 Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __RAM1_BASE 0x30000000
|
||||
#define __RAM1_SIZE 0x0001C000
|
||||
|
||||
/*--------------------- Embedded RAM2 Configuration ---------------------------
|
||||
; <h> RAM Configuration
|
||||
; <o0> RAM2 Base Address <0x0-0xFFFFFFFF:8>
|
||||
; <o1> RAM2 Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __RAM2_BASE 0x3001C000
|
||||
#define __RAM2_SIZE 0x00004000
|
||||
|
||||
|
||||
/*--------------------- Stack / Heap Configuration ---------------------------
|
||||
; <h> Stack / Heap Configuration
|
||||
; <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __STACK_SIZE 0x00000800
|
||||
#define __HEAP_SIZE 0x00000C00
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
User Stack & Heap boundary definition
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __STACK_TOP (__RAM1_BASE + __RAM1_SIZE) /* starts at end of RAM */
|
||||
#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Scatter File Definitions definition
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __RO_BASE __ROM_BASE
|
||||
#define __RO_SIZE __ROM_SIZE
|
||||
|
||||
LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
|
||||
ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
; *(Veneer$$CMSE) ; uncomment for secure applications
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
|
||||
RW_ITCM __ITCM_BASE __ITCM_SIZE { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_DTCM __DTCM_BASE __DTCM_SIZE { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_RAM1 __RAM1_BASE (__RAM1_SIZE - __STACK_SIZE - __HEAP_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_RAM2 __RAM2_BASE __RAM2_SIZE { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
#if __HEAP_SIZE > 0
|
||||
ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap
|
||||
}
|
||||
#endif
|
||||
|
||||
ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
|
||||
}
|
||||
}
|
||||
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 555 KiB |
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\project.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
@@ -0,0 +1,177 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc; *.md</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rtthread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>19</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\MM32LINKCM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0MM32F3270_512 -FL080000 -FS08000000 -FP0($$Device:MM32F3277G9P$Flash\MM32F3270_512.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>MM32LINKCM3</Key>
|
||||
<Name>-U0028089 -O206 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0MM32L3xx_128.FLM -FS08000000 -FL020000 -FP0($$Device:MM32L373PF$Flash\MM32L3xx_128.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,144 @@
|
||||
# BSP Note: For TI EK-TM4C1294XL Tiva C Series Connected LancuhPad (REV D)
|
||||
|
||||
import os
|
||||
import sys
|
||||
# toolchains options
|
||||
CROSS_TOOL = 'gcc'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
# device options
|
||||
ARCH = 'arm'
|
||||
CPU = 'cortex-m33'
|
||||
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iccarm'
|
||||
EXEC_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.2'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
#BUILD = 'release'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
CXX = PREFIX + 'g++'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m33 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n'
|
||||
POST_ACTION += OBJCPY + ' -O ihex $TARGET rtthread.hex\n'
|
||||
POST_ACTION += SIZE + ' $TARGET\n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu ' + CPU
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
CFLAGS += ' -mfpu=fpv5-sp-d16 -mfloat-abi=hard '
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "board/linker_scripts/link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
|
||||
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/INC'
|
||||
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/ARMCC/LIB'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/arm/armcc/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iccarm':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm' # + ' -D' + PART_TYPE
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M33'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=VFPv4_sp'
|
||||
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu ' + CPU
|
||||
AFLAGS += ' --fpu VFPv5_sp'
|
||||
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
#LFLAGS += ' --silent'
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = ''
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\template.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
@@ -0,0 +1,184 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
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<pSingCmdsp></pSingCmdsp>
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<pMultCmdsp></pMultCmdsp>
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</ProjectOpt>
|
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File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user