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Merge pull request #30 from RT-Thread/master

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Meco Jianting Man authored and GitHub committed 2021-03-24 00:26:05 +08:00
2 parents 061182271f 50bf490263
commit 8fccef5894
789 files changed
+13303 -13180
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bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig
+6 -1
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@@ -167,11 +167,16 @@ menu "On-chip Peripheral Drivers"
default n
endif
config BSP_USING_ONCHIP_RTC
menuconfig BSP_USING_ONCHIP_RTC
bool "Enable RTC"
select RT_USING_RTC
select RT_USING_LIBC
default n
if BSP_USING_ONCHIP_RTC
config RTC_USING_INTERNAL_CLK
bool "Using internal clock RTC"
default y
endif
menuconfig BSP_USING_ADC
bool "Enable ADC"
bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.py
+1 -1
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@@ -41,7 +41,7 @@ if PLATFORM == 'gcc':
# DEVICE = ' -mcmodel=medany -march=rv32imc -mabi=ilp32 -fsingle-precision-constant'
DEVICE = ' -mcmodel=medany -march=rv32imc -mabi=ilp32'
# CFLAGS = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
CFLAGS = DEVICE
CFLAGS = DEVICE + ' -D_USE_LONG_TIME_T'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds'
CPATH = ''
bsp/bluetrum/libraries/hal_drivers/drv_rtc.c
+31 -16
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@@ -6,6 +6,7 @@
* Change Logs:
* Date Author Notes
* 2021-01-28 greedyhao first version
* 2021-03-19 iysheng modify just set time first power up
*/
#include "board.h"
@@ -95,30 +96,44 @@ uint8_t irtc_sfr_read(uint32_t cmd)
IRTC_EXIT_CRITICAL();
}
static void _init_rtc_clock(void)
{
uint8_t rtccon0;
uint8_t rtccon2;
rtccon0 = irtc_sfr_read(RTCCON0_CMD);
rtccon2 = irtc_sfr_read(RTCCON2_CMD);
#ifdef RTC_USING_INTERNAL_CLK
rtccon0 &= ~RTC_CON0_XOSC32K_ENABLE;
rtccon0 |= RTC_CON0_INTERNAL_32K;
rtccon2 | RTC_CON2_32K_SELECT;
#else
rtccon0 |= RTC_CON0_XOSC32K_ENABLE;
rtccon0 &= ~RTC_CON0_INTERNAL_32K;
rtccon2 & ~RTC_CON2_32K_SELECT;
#endif
irtc_sfr_write(RTCCON0_CMD, rtccon0);
irtc_sfr_write(RTCCON2_CMD, rtccon2);
}
void hal_rtc_init(void)
{
time_t sec = 0;
struct tm tm_new = {0};
uint8_t temp;
uint8_t temp = irtc_sfr_read(RTCCON0_CMD);
temp &= ~RTC_CON0_XOSC32K_ENABLE;
temp |= RTC_CON0_EXTERNAL_32K;
irtc_sfr_write(RTCCON0_CMD, temp);
temp = irtc_sfr_read(RTCCON2_CMD);
irtc_sfr_write(RTCCON2_CMD, temp | RTC_CON2_32K_SELECT);
_init_rtc_clock();
temp = irtc_sfr_read(RTCCON0_CMD);
if (temp & BIT(7)) {
temp &= ~BIT(7);
if (temp & RTC_CON0_PWRUP_FIRST) {
temp &= ~RTC_CON0_PWRUP_FIRST;
irtc_sfr_write(RTCCON0_CMD, temp); /* First power on */
tm_new.tm_mday = 29;
tm_new.tm_mon = 1 - 1;
tm_new.tm_year = 2021 - 1900;
sec = timegm(&tm_new);
irtc_time_write(RTCCNT_CMD, sec);
}
tm_new.tm_mday = 29;
tm_new.tm_mon = 1 - 1;
tm_new.tm_year = 2021 - 1900;
sec = timegm(&tm_new);
irtc_time_write(RTCCNT_CMD, sec);
}
/************** HAL End *******************/
bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rtc.h
+1 -1
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@@ -34,7 +34,7 @@ enum
// RTCCON0
#define RTC_CON0_PWRUP_FIRST (0x01u << 7) /*!< RTC first power up flag */
#define RTC_CON0_EXTERNAL_32K (0x01u << 6) /*!< External 32K select */
#define RTC_CON0_INTERNAL_32K (0x01u << 6) /*!< Internal 32K select */
#define RTC_CON0_VDD_ENABLE (0x01u << 5) /*!< RTC VDD12 enable */
#define RTC_CON0_BG_ENABLE (0x01u << 4) /*!< BG enable */
#define RTC_CON0_LVD_OUTPUT_ENABLE (0x01u << 3) /*!< LVD output enable */
bsp/lpc1114/driver/board.c
+2 -2
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -33,7 +33,7 @@
#define NVIC_ISPR HWREG32(SCB_BASE + 0x200)
#define NVIC_ICPR HWREG32(SCB_BASE + 0x280)
#define NVIC_IPR(irqno) HWREG32(SCB_BASE + 0x400 + (((irqno) / 4) << 2))
#define SCB_SHPR3 HWREG32(SCB_BASE + 0xd20)
#define SCB_SHPR3 HWREG32(SCB_BASE + 0xd20)
extern unsigned char __bss_end__[];
extern unsigned char _ram_end[];
bsp/lpc1114/driver/drv_uart.c
+1 -1
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc176x/applications/application.c
+18 -18
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -38,44 +38,44 @@ extern int lwip_system_init(void);
/* thread phase init */
void rt_init_thread_entry(void *parameter)
{
/* initialize platform */
platform_init();
/* initialize platform */
platform_init();
#ifdef RT_USING_LWIP
/* register Ethernet interface device */
lpc17xx_emac_hw_init();
/* initialize lwip stack */
/* register ethernetif device */
eth_system_device_init();
/* register ethernetif device */
eth_system_device_init();
/* initialize lwip system */
lwip_system_init();
rt_kprintf("TCP/IP initialized!\n");
/* initialize lwip system */
lwip_system_init();
rt_kprintf("TCP/IP initialized!\n");
#endif
/* Filesystem Initialization */
#ifdef RT_USING_DFS
rt_hw_sdcard_init();
/* initialize the device file system */
dfs_init();
/* initialize the device file system */
dfs_init();
#ifdef RT_USING_DFS_ELMFAT
/* initialize the elm chan FatFS file system*/
elm_init();
/* initialize the elm chan FatFS file system*/
elm_init();
#endif
/* mount sd card fat partition 1 as root directory */
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
rt_kprintf("File System initialized!\n");
rt_kprintf("File System initialized!\n");
else
rt_kprintf("File System init failed!\n");
rt_kprintf("File System init failed!\n");
#endif
#ifdef RT_USING_FINSH
/* initialize finsh */
finsh_system_init();
/* initialize finsh */
finsh_system_init();
#endif
}
@@ -84,8 +84,8 @@ int rt_application_init()
rt_thread_t tid;
tid = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, RT_THREAD_PRIORITY_MAX/3, 20);
rt_init_thread_entry, RT_NULL,
2048, RT_THREAD_PRIORITY_MAX/3, 20);
if (tid != RT_NULL) rt_thread_startup(tid);
return 0;
bsp/lpc176x/applications/platform.c
+4 -4
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -16,11 +16,11 @@ static struct rt_memheap _memheap;
void platform_init(void)
{
#ifdef RT_USING_MEMHEAP
/* create memory heap object on 0x2007 C000 - 0x2008 4000*/
/* create memory heap object on 0x2007 C000 - 0x2008 4000*/
#ifdef RT_USING_LWIP
rt_memheap_init(&_memheap, "system", (void*)0x2007C000, 16*1024);
rt_memheap_init(&_memheap, "system", (void*)0x2007C000, 16*1024);
#else
rt_memheap_init(&_memheap, "system", (void*)0x2007C000, 32*1024);
rt_memheap_init(&_memheap, "system", (void*)0x2007C000, 32*1024);
#endif
#endif
}
bsp/lpc176x/applications/platform.h
+1 -1
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc176x/applications/startup.c
+28 -28
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -33,28 +33,28 @@ extern int __bss_end;
*/
void rtthread_startup(void)
{
/* initialize board */
rt_hw_board_init();
/* initialize board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* show version */
rt_show_version();
#ifdef RT_USING_HEAP
/* initialize memory system */
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)0x10008000);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)0x10008000);
#else
rt_system_heap_init((void*)&__bss_end, (void*)0x10008000);
#endif
/* initialize memory system */
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)0x10008000);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)0x10008000);
#else
rt_system_heap_init((void*)&__bss_end, (void*)0x10008000);
#endif
#endif
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize application */
rt_application_init();
/* initialize application */
rt_application_init();
/* initialize timer */
rt_system_timer_init();
@@ -62,25 +62,25 @@ void rtthread_startup(void)
/* initialize timer thread */
rt_system_timer_thread_init();
/* initialize idle thread */
rt_thread_idle_init();
/* initialize idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
/* never reach here */
return ;
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* disable interrupt first */
rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
return 0;
}
/*@}*/
bsp/lpc176x/drivers/board.c
+17 -17
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,13 +29,13 @@
*/
void rt_hw_timer_handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
/* leave interrupt */
rt_interrupt_leave();
}
void SysTick_Handler(void)
@@ -48,24 +48,24 @@ void SysTick_Handler(void)
*/
void rt_hw_board_init()
{
/* NVIC Configuration */
/* NVIC Configuration */
#define NVIC_VTOR_MASK 0x3FFFFF80
#ifdef VECT_TAB_RAM
/* Set the Vector Table base location at 0x10000000 */
SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK);
/* Set the Vector Table base location at 0x10000000 */
SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK);
#else /* VECT_TAB_FLASH */
/* Set the Vector Table base location at 0x00000000 */
SCB->VTOR = (0x00000000 & NVIC_VTOR_MASK);
/* Set the Vector Table base location at 0x00000000 */
SCB->VTOR = (0x00000000 & NVIC_VTOR_MASK);
#endif
/* initialize systick */
SysTick_Config( SystemCoreClock/RT_TICK_PER_SECOND);
/* set pend exception priority */
NVIC_SetPriority(PendSV_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
/* initialize systick */
SysTick_Config( SystemCoreClock/RT_TICK_PER_SECOND);
/* set pend exception priority */
NVIC_SetPriority(PendSV_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
#ifdef RT_USING_UART0
rt_hw_uart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
rt_hw_uart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
}
bsp/lpc176x/drivers/board.h
+1 -1
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc176x/drivers/emac.c
+357 -357
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File diff suppressed because it is too large. Load diff
bsp/lpc176x/drivers/emac.h
+10 -1
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@@ -1,3 +1,12 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
#ifndef __LPC17XX_EMAC_H
#define __LPC17XX_EMAC_H
@@ -11,7 +20,7 @@
#define ETH_MAX_FLEN 1536 /* Max. Ethernet Frame Size */
/* EMAC variables located in 16K Ethernet SRAM */
#define RX_DESC_BASE 0x20080000
#define RX_DESC_BASE 0x20080000
#define RX_STAT_BASE (RX_DESC_BASE + NUM_RX_FRAG*8)
#define TX_DESC_BASE (RX_STAT_BASE + NUM_RX_FRAG*8)
#define TX_STAT_BASE (TX_DESC_BASE + NUM_TX_FRAG*8)
bsp/lpc176x/drivers/led.h
+1 -1
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc176x/drivers/sd.c
+4 -4
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -467,12 +467,12 @@ static rt_err_t rt_sdcard_control(rt_device_t dev, int cmd, void *args)
if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
{
struct rt_device_blk_geometry *geometry;
geometry = (struct rt_device_blk_geometry *)args;
if (geometry == RT_NULL) return -RT_ERROR;
if (dev->user_data == RT_NULL) return -RT_ERROR;
geometry->bytes_per_sector = ((SDCFG *)dev->user_data)->sectorsize;
geometry->block_size = ((SDCFG *)dev->user_data)->blocksize;
geometry->sector_count = ((SDCFG *)dev->user_data)->sectorcnt;
bsp/lpc176x/drivers/spi.c
+119 -110
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File diff suppressed because it is too large. Load diff
bsp/lpc176x/drivers/spi.h
+17 -8
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@@ -1,17 +1,26 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
#ifndef __LPC17XX_SPI_H__
#define __LPC17XX_SPI_H__
#include <stdint.h>
#include <stdbool.h>
// if not use FIFO, R: 600kB/s, W: 500kB/s
// if use FIFO, R: 1.2MB/s, W: 800kB/s
// if not use FIFO, R: 600kB/s, W: 500kB/s
// if use FIFO, R: 1.2MB/s, W: 800kB/s
#define USE_FIFO 1
/* bit-frequency = PCLK / (CPSDVSR * [SCR+1]), here SCR=0, PCLK=72MHz, must be even */
#define SPI_SPEED_20MHz 4 /* => 18MHz */
#define SPI_SPEED_25MHz 4 /* => 18MHz */
#define SPI_SPEED_400kHz 180 /* => 400kHz */
/* bit-frequency = PCLK / (CPSDVSR * [SCR+1]), here SCR=0, PCLK=72MHz, must be even */
#define SPI_SPEED_20MHz 4 /* => 18MHz */
#define SPI_SPEED_25MHz 4 /* => 18MHz */
#define SPI_SPEED_400kHz 180 /* => 400kHz */
/* external functions */
void LPC17xx_SPI_Init (void);
@@ -24,8 +33,8 @@ void LPC17xx_SPI_SendByte (uint8_t data);
uint8_t LPC17xx_SPI_RecvByte (void);
#if USE_FIFO
void LPC17xx_SPI_RecvBlock_FIFO (uint8_t *buff, uint32_t btr);
void LPC17xx_SPI_RecvBlock_FIFO (uint8_t *buff, uint32_t btr);
void LPC17xx_SPI_SendBlock_FIFO (const uint8_t *buff);
#endif
#endif // __LPC17XX_SPI_H__
#endif // __LPC17XX_SPI_H__
bsp/lpc176x/drivers/uart.c
+5 -5
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -56,8 +56,8 @@ void UART0_IRQHandler(void)
{
rt_ubase_t level, iir;
struct rt_uart_lpc *uart = &uart_device;
/* enter interrupt */
rt_interrupt_enter();
/* enter interrupt */
rt_interrupt_enter();
/* read IIR and clear it */
iir = LPC_UART->IIR;
@@ -91,8 +91,8 @@ void UART0_IRQHandler(void)
{
iir = LPC_UART->LSR; //oe pe fe oe read for clear interrupt
}
/* leave interrupt */
rt_interrupt_leave();
/* leave interrupt */
rt_interrupt_leave();
return;
}
bsp/lpc176x/rtconfig.h
+26 -26
View File
@@ -4,17 +4,17 @@
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />
#define RT_NAME_MAX 6
#define RT_NAME_MAX 6
// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />
#define RT_ALIGN_SIZE 4
#define RT_ALIGN_SIZE 4
// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="32">
// <item description="8">8</item>
// <item description="32">32</item>
// <item description="256">256</item>
// </integer>
#define RT_THREAD_PRIORITY_MAX 32
#define RT_THREAD_PRIORITY_MAX 32
// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="100" />
#define RT_TICK_PER_SECOND 100
#define RT_TICK_PER_SECOND 100
// <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" >
#define RT_DEBUG
#define RT_DEBUG_COLOR
@@ -29,11 +29,11 @@
// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >
// #define RT_USING_TIMER_SOFT
// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_PRIO 4
// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_THREAD_STACK_SIZE 512
// <integer name="RT_TIMER_TICK_PER_SECOND" description="The soft-timer tick per second" default="10" />
#define RT_TIMER_TICK_PER_SECOND 10
#define RT_TIMER_TICK_PER_SECOND 10
// </section>
// <section name="IPC" description="Inter-Thread communication" default="always" >
@@ -67,15 +67,15 @@
// <bool name="RT_USING_UART0" description="Using UART0" default="true" />
#define RT_USING_UART0
// <integer name="RT_UART_RX_BUFFER_SIZE" description="The buffer size for UART reception" default="64" />
#define RT_UART_RX_BUFFER_SIZE 64
#define RT_UART_RX_BUFFER_SIZE 64
// </section>
// <section name="RT_USING_CONSOLE" description="Using console" default="true" >
#define RT_USING_CONSOLE
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLEBUF_SIZE 128
// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart" />
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_CONSOLE_DEVICE_NAME "uart0"
// </section>
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
@@ -87,7 +87,7 @@
// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />
#define FINSH_USING_DESCRIPTION
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_THREAD_STACK_SIZE 4096
// </section>
// <section name="LIBC" description="C Runtime library setting" default="always" >
@@ -102,16 +102,16 @@
// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />
#define DFS_USING_WORKDIR
// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEMS_MAX 2
// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />
#define DFS_FD_MAX 4
#define DFS_FD_MAX 4
// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />
#define RT_USING_DFS_ELMFAT
// <integer name="RT_DFS_ELM_USE_LFN" description="Support long file name" default="0">
// <item description="LFN1">1</item>
// <item description="LFN1">2</item>
// </integer>
#define RT_DFS_ELM_USE_LFN 1
#define RT_DFS_ELM_USE_LFN 1
// <integer name="RT_DFS_ELM_CODE_PAGE" description="specifies the OEM code page to be used on the target system" default="936">
// <item description="Japanese Shift-JIS (DBCS, OEM, Windows)">932</item>
// <item description="Simplified Chinese GBK (DBCS, OEM, Windows)">936</item>
@@ -142,7 +142,7 @@
// </integer>
#define RT_DFS_ELM_CODE_PAGE 437
// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="255" />
#define RT_DFS_ELM_MAX_LFN 64
#define RT_DFS_ELM_MAX_LFN 64
// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />
// #define RT_USING_DFS_YAFFS2
// <bool name="RT_USING_DFS_UFFS" description="Using UFFS" default="false" />
@@ -152,7 +152,7 @@
// <bool name="RT_USING_DFS_NFS" description="Using NFS v3 client file system" default="false" />
// #define RT_USING_DFS_NFS
// <string name="RT_NFS_HOST_EXPORT" description="NFSv3 host export" default="192.168.1.5:/" />
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
// </section>
// <section name="RT_USING_LWIP" description="lwip, a lightweight TCP/IP protocol stack" default="true" >
@@ -168,29 +168,29 @@
// <bool name="RT_LWIP_DNS" description="Enable DNS protocol" default="true" />
#define RT_LWIP_DNS
// <integer name="RT_LWIP_PBUF_NUM" description="Maximal number of buffers in the pbuf pool" default="4" />
#define RT_LWIP_PBUF_NUM 4
#define RT_LWIP_PBUF_NUM 4
// <integer name="RT_LWIP_TCP_PCB_NUM" description="Maximal number of simultaneously active TCP connections" default="5" />
#define RT_LWIP_TCP_PCB_NUM 3
#define RT_LWIP_TCP_PCB_NUM 3
// <integer name="RT_LWIP_TCP_SND_BUF" description="TCP sender buffer size" default="8192" />
#define RT_LWIP_TCP_SND_BUF (2 * TCP_MSS)
#define RT_LWIP_TCP_SND_BUF (2 * TCP_MSS)
// <integer name="RT_LWIP_TCP_WND" description="TCP receive window" default="8192" />
#define RT_LWIP_TCP_WND 2048
#define RT_LWIP_TCP_WND 2048
// <bool name="RT_LWIP_SNMP" description="Enable SNMP protocol" default="false" />
// #define RT_LWIP_SNMP
// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
// #define RT_LWIP_DHCP
// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_PRIORITY 12
// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
// <integer name="RT_LWIP_TCPTHREAD_STACKSIZE" description="the thread stack size of TCP thread" default="4096" />
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
// <integer name="RT_LWIP_ETHTHREAD_PRIORITY" description="the thread priority of ethnetif thread" default="144" />
#define RT_LWIP_ETHTHREAD_PRIORITY 14
#define RT_LWIP_ETHTHREAD_PRIORITY 14
// <integer name="RT_LWIP_ETHTHREAD_MBOX_SIZE" description="the mail box size of ethnetif thread to wait for" default="8" />
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
// <integer name="RT_LWIP_ETHTHREAD_STACKSIZE" description="the stack size of ethnetif thread" default="512" />
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
// <ipaddr name="RT_LWIP_IPADDR" description="IP address of device" default="192.168.1.30" />
#define RT_LWIP_IPADDR "192.168.1.30"
// <ipaddr name="RT_LWIP_GWADDR" description="Gateway address of device" default="192.168.1.1" />
bsp/lpc178x/applications/application.c
+42 -42
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -75,33 +75,33 @@ void rt_init_thread_entry(void *parameter)
#ifdef RT_USING_RTGUI
{
extern void rtgui_system_server_init(void);
extern void application_init(void);
extern void rtgui_system_server_init(void);
extern void application_init(void);
rt_device_t lcd;
rt_device_t lcd;
/* init lcd */
rt_hw_lcd_init();
/* init lcd */
rt_hw_lcd_init();
/* find lcd device */
lcd = rt_device_find("lcd");
if (lcd != RT_NULL)
{
/* set lcd device as rtgui graphic driver */
rtgui_graphic_set_device(lcd);
/* find lcd device */
lcd = rt_device_find("lcd");
if (lcd != RT_NULL)
{
/* set lcd device as rtgui graphic driver */
rtgui_graphic_set_device(lcd);
/* init rtgui system server */
rtgui_system_server_init();
/* init rtgui system server */
rtgui_system_server_init();
/* startup rtgui in demo of RT-Thread/GUI examples */
application_init();
}
/* startup rtgui in demo of RT-Thread/GUI examples */
application_init();
}
}
#endif
#ifdef RT_USING_FINSH
/* initialize finsh */
finsh_system_init();
/* initialize finsh */
finsh_system_init();
#endif
}
@@ -143,22 +143,22 @@ static void rt_thread_entry_led(void* parameter)
int rt_application_init(void)
{
rt_thread_t tid;
rt_thread_t tid;
rt_thread_init(&thread_led,
"led",
rt_thread_entry_led,
RT_NULL,
&thread_led_stack[0],
sizeof(thread_led_stack),11,5);
rt_thread_startup(&thread_led);
rt_thread_init(&thread_led,
"led",
rt_thread_entry_led,
RT_NULL,
&thread_led_stack[0],
sizeof(thread_led_stack),11,5);
rt_thread_startup(&thread_led);
tid = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, RT_THREAD_PRIORITY_MAX/3, 20);
if (tid != RT_NULL) rt_thread_startup(tid);
tid = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, RT_THREAD_PRIORITY_MAX/3, 20);
if (tid != RT_NULL) rt_thread_startup(tid);
return 0;
return 0;
}
#if defined(RT_USING_RTGUI) && defined(RT_USING_FINSH)
@@ -170,20 +170,20 @@ int rt_application_init(void)
void key(rt_uint32_t key)
{
struct rtgui_event_kbd ekbd;
struct rtgui_event_kbd ekbd;
RTGUI_EVENT_KBD_INIT(&ekbd);
ekbd.mod = RTGUI_KMOD_NONE;
ekbd.unicode = 0;
ekbd.key = key;
RTGUI_EVENT_KBD_INIT(&ekbd);
ekbd.mod = RTGUI_KMOD_NONE;
ekbd.unicode = 0;
ekbd.key = key;
ekbd.type = RTGUI_KEYDOWN;
rtgui_server_post_event((struct rtgui_event*)&ekbd, sizeof(ekbd));
ekbd.type = RTGUI_KEYDOWN;
rtgui_server_post_event((struct rtgui_event*)&ekbd, sizeof(ekbd));
rt_thread_delay(2);
rt_thread_delay(2);
ekbd.type = RTGUI_KEYUP;
rtgui_server_post_event((struct rtgui_event*)&ekbd, sizeof(ekbd));
ekbd.type = RTGUI_KEYUP;
rtgui_server_post_event((struct rtgui_event*)&ekbd, sizeof(ekbd));
}
FINSH_FUNCTION_EXPORT(key, send a key to gui server);
#endif
bsp/lpc178x/applications/startup.c
+32 -32
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -37,11 +37,11 @@ extern int __bss_end;
*******************************************************************************/
void assert_failed(u8* file, u32 line)
{
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
rt_kprintf(" file %s\r\n", file);
rt_kprintf(" line %d\r\n", line);
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
rt_kprintf(" file %s\r\n", file);
rt_kprintf(" line %d\r\n", line);
while (1) ;
while (1) ;
}
#endif
@@ -50,28 +50,28 @@ void assert_failed(u8* file, u32 line)
*/
void rtthread_startup(void)
{
/* initialize board */
rt_hw_board_init();
/* initialize board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* show version */
rt_show_version();
#ifdef RT_USING_HEAP
/* initialize memory system */
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)(0x10000000 + 1024*64));
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)(0x10000000 + 1024*64));
#else
rt_system_heap_init((void*)&__bss_end, (void*)(0x10000000 + 1024*64));
#endif
/* initialize memory system */
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)(0x10000000 + 1024*64));
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)(0x10000000 + 1024*64));
#else
rt_system_heap_init((void*)&__bss_end, (void*)(0x10000000 + 1024*64));
#endif
#endif
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize application */
rt_application_init();
/* initialize application */
rt_application_init();
/* initialize timer */
rt_system_timer_init();
@@ -79,23 +79,23 @@ void rtthread_startup(void)
/* initialize timer thread */
rt_system_timer_thread_init();
/* initialize idle thread */
rt_thread_idle_init();
/* initialize idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
/* never reach here */
return ;
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* disable interrupt first */
rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
return 0;
}
bsp/lpc178x/drivers/board.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc178x/drivers/board.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -31,7 +31,7 @@
//#define RT_USING_UART2
// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart" />
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_CONSOLE_DEVICE_NAME "uart0"
// </RDTConfigurator>
bsp/lpc178x/drivers/drv_glcd.c
+170 -170
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/drivers/drv_glcd.h
+6 -6
View File
@@ -33,7 +33,7 @@ typedef unsigned long Boolean;
/**
* @brief A struct for Bitmap on LCD screen
*/
typedef struct _Bmp_t
typedef struct _Bmp_t
{
U32 H_Size;
U32 V_Size;
@@ -47,8 +47,8 @@ typedef struct _Bmp_t
/**
* @brief A struct for Font Type on LCD screen
*/
typedef struct _FontType_t
typedef struct _FontType_t
{
U32 H_Size;
U32 V_Size;
@@ -62,9 +62,9 @@ typedef U32 LdcPixel_t, *pLdcPixel_t;
#define C_GLCD_REFRESH_FREQ (60HZ)
#define C_GLCD_H_SIZE 480
#define C_GLCD_H_PULSE 2 //
#define C_GLCD_H_FRONT_PORCH 5 //
#define C_GLCD_H_BACK_PORCH 40 //
#define C_GLCD_H_PULSE 2 //
#define C_GLCD_H_FRONT_PORCH 5 //
#define C_GLCD_H_BACK_PORCH 40 //
#define C_GLCD_V_SIZE 272
#define C_GLCD_V_PULSE 2
#define C_GLCD_V_FRONT_PORCH 8
bsp/lpc178x/drivers/emac.c
+356 -356
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/drivers/emac.h
+10 -1
View File
@@ -1,3 +1,12 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
#ifndef __LPC17XX_EMAC_H
#define __LPC17XX_EMAC_H
@@ -11,7 +20,7 @@
#define ETH_MAX_FLEN 1536 /* Max. Ethernet Frame Size */
/* EMAC variables located in 16K Ethernet SRAM */
#define RX_DESC_BASE 0x20000000
#define RX_DESC_BASE 0x20000000
#define RX_STAT_BASE (RX_DESC_BASE + NUM_RX_FRAG*8)
#define TX_DESC_BASE (RX_STAT_BASE + NUM_RX_FRAG*8)
#define TX_STAT_BASE (TX_DESC_BASE + NUM_TX_FRAG*8)
bsp/lpc178x/drivers/lpc177x_8x_clkpwr.c
+188 -188
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/drivers/lpc177x_8x_clkpwr.h
+86 -86
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/drivers/lpc177x_8x_emc.c
+248 -248
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/drivers/lpc177x_8x_emc.h
+71 -71
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/drivers/lpc177x_8x_pinsel.c
+209 -209
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/drivers/lpc177x_8x_pinsel.h
+174 -174
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/drivers/lpc177x_8x_uart.c
+957 -957
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/drivers/lpc177x_8x_uart.h
+257 -257
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/drivers/lpc17xx_lcd.c
+45 -45
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -13,8 +13,8 @@
#include "drv_glcd.h"
#define RT_HW_LCD_WIDTH 480
#define RT_HW_LCD_HEIGHT 272
#define RT_HW_LCD_WIDTH 480
#define RT_HW_LCD_HEIGHT 272
static struct rt_device_graphic_info _lcd_info;
static struct rt_device lcd;
@@ -23,38 +23,38 @@ static struct rt_device lcd;
static rt_err_t rt_lcd_init (rt_device_t dev)
{
PINSEL_ConfigPin(5, 4, 0);
LPC_GPIO5->DIR |= 1<<4;
LPC_GPIO5->CLR = 1<<4;
LPC_GPIO5->SET = 1<<4;
LPC_GPIO5->DIR |= 1<<4;
LPC_GPIO5->CLR = 1<<4;
LPC_GPIO5->SET = 1<<4;
/*Disable LCD controller*/
GLCD_Ctrl (FALSE);
/*Init LCD and copy picture in video RAM*/
GLCD_Init (_lcd_info.framebuffer);
/*Enable LCD*/
GLCD_Ctrl (TRUE);
/*Disable LCD controller*/
GLCD_Ctrl (FALSE);
/*Init LCD and copy picture in video RAM*/
GLCD_Init (_lcd_info.framebuffer);
/*Enable LCD*/
GLCD_Ctrl (TRUE);
return RT_EOK;
return RT_EOK;
}
static rt_err_t rt_lcd_control (rt_device_t dev, int cmd, void *args)
{
switch (cmd)
{
case RTGRAPHIC_CTRL_RECT_UPDATE:
break;
case RTGRAPHIC_CTRL_POWERON:
break;
case RTGRAPHIC_CTRL_POWEROFF:
break;
case RTGRAPHIC_CTRL_GET_INFO:
rt_memcpy(args, &_lcd_info, sizeof(_lcd_info));
break;
case RTGRAPHIC_CTRL_SET_MODE:
break;
}
switch (cmd)
{
case RTGRAPHIC_CTRL_RECT_UPDATE:
break;
case RTGRAPHIC_CTRL_POWERON:
break;
case RTGRAPHIC_CTRL_POWEROFF:
break;
case RTGRAPHIC_CTRL_GET_INFO:
rt_memcpy(args, &_lcd_info, sizeof(_lcd_info));
break;
case RTGRAPHIC_CTRL_SET_MODE:
break;
}
return RT_EOK;
return RT_EOK;
}
@@ -63,27 +63,27 @@ void rt_hw_lcd_init(void)
{
rt_uint16_t * _rt_framebuffer = RT_NULL;
// _rt_framebuffer = rt_malloc_align(sizeof(rt_uint16_t)*RT_HW_LCD_HEIGHT*RT_HW_LCD_WIDTH, 8);
// if (_rt_framebuffer == RT_NULL) return; /* no memory yet */
// _rt_framebuffer = rt_malloc_align(sizeof(rt_uint16_t)*RT_HW_LCD_HEIGHT*RT_HW_LCD_WIDTH, 8);
// if (_rt_framebuffer == RT_NULL) return; /* no memory yet */
_rt_framebuffer = (rt_uint16_t *)0xA0000000;
_rt_framebuffer = (rt_uint16_t *)0xA0000000;
_lcd_info.bits_per_pixel = 16;
_lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565;
_lcd_info.framebuffer = (void*)_rt_framebuffer;
_lcd_info.width = RT_HW_LCD_WIDTH;
_lcd_info.height = RT_HW_LCD_HEIGHT;
_lcd_info.bits_per_pixel = 16;
_lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565;
_lcd_info.framebuffer = (void*)_rt_framebuffer;
_lcd_info.width = RT_HW_LCD_WIDTH;
_lcd_info.height = RT_HW_LCD_HEIGHT;
/* init device structure */
lcd.type = RT_Device_Class_Graphic;
lcd.init = rt_lcd_init;
lcd.open = RT_NULL;
lcd.close = RT_NULL;
lcd.control = rt_lcd_control;
lcd.user_data = (void*)&_lcd_info;
/* init device structure */
lcd.type = RT_Device_Class_Graphic;
lcd.init = rt_lcd_init;
lcd.open = RT_NULL;
lcd.close = RT_NULL;
lcd.control = rt_lcd_control;
lcd.user_data = (void*)&_lcd_info;
/* register lcd device to RT-Thread */
rt_device_register(&lcd, "lcd", RT_DEVICE_FLAG_RDWR);
/* register lcd device to RT-Thread */
rt_device_register(&lcd, "lcd", RT_DEVICE_FLAG_RDWR);
}
void lcd_fill(uint8_t * start, uint8_t * end, uint8_t pixel)
bsp/lpc178x/drivers/lpc_types.h
+18 -18
View File
@@ -1,15 +1,15 @@
/**********************************************************************
* $Id$ lpc_types.h 2011-06-02
* $Id$ lpc_types.h 2011-06-02
*//**
* @file lpc_types.h
* @brief Contains the NXP ABL typedefs for C standard types.
* It is intended to be used in ISO C conforming development
* environments and checks for this insofar as it is possible
* to do so.
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* @file lpc_types.h
* @brief Contains the NXP ABL typedefs for C standard types.
* It is intended to be used in ISO C conforming development
* environments and checks for this insofar as it is possible
* to do so.
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
@@ -37,7 +37,7 @@
* @ingroup LPC177x_8xCMSIS_FwLib_Drivers
* @{
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup LPC_Types_Public_Types Basic Public Data Types
* @{
@@ -71,8 +71,8 @@ typedef enum {ERROR = 0, SUCCESS = !ERROR} Status;
*/
typedef enum
{
NONE_BLOCKING = 0, /**< None Blocking type */
BLOCKING, /**< Blocking type */
NONE_BLOCKING = 0, /**< None Blocking type */
BLOCKING, /**< Blocking type */
} TRANSFER_BLOCK_Type;
@@ -98,7 +98,7 @@ typedef int32_t(*PFI)();
*/
#undef _BIT
/** Set bit macro */
#define _BIT(n) (1<<n)
#define _BIT(n) (1<<n)
/** _SBF(f,v) sets the bit field starting at position "f" to value "v".
* _SBF(f,v) is intended to be used in "OR" and "AND" expressions:
@@ -161,16 +161,16 @@ typedef uint8_t UNS_8;
typedef int8_t INT_8;
/** SMA type for 16 bit unsigned value */
typedef uint16_t UNS_16;
typedef uint16_t UNS_16;
/** SMA type for 16 bit signed value */
typedef int16_t INT_16;
typedef int16_t INT_16;
/** SMA type for 32 bit unsigned value */
typedef uint32_t UNS_32;
typedef uint32_t UNS_32;
/** SMA type for 32 bit signed value */
typedef int32_t INT_32;
typedef int32_t INT_32;
/** SMA type for 64 bit signed value */
typedef int64_t INT_64;
bsp/lpc178x/drivers/sdram.c
+56 -56
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -12,10 +12,10 @@
#include "LPC177x_8x.h"
#include "sdram.h"
//LPC_EMC_TypeDef * const g_pEMC = ((LPC_EMC_TypeDef*) LPC_EMC_BASE);
//LPC_IOCON_TypeDef * const LPC_IOCON = ((LPC_IOCON_TypeDef*) LPC_IOCON_BASE);
#define SDRAM_BASE 0xA0000000 /* CS0 */
#define EMC_NS2CLK(ns, nsPerClk) ((ns + nsPerClk - 1) / nsPerClk)
//LPC_EMC_TypeDef * const g_pEMC = ((LPC_EMC_TypeDef*) LPC_EMC_BASE);
//LPC_IOCON_TypeDef * const LPC_IOCON = ((LPC_IOCON_TypeDef*) LPC_IOCON_BASE);
#define SDRAM_BASE 0xA0000000 /* CS0 */
#define EMC_NS2CLK(ns, nsPerClk) ((ns + nsPerClk - 1) / nsPerClk)
static void delayMs(int a,int b)
{
@@ -24,65 +24,65 @@ static void delayMs(int a,int b)
}
/*****************************************************************************
** Function name: delayMs
** Function name: delayMs
**
** Descriptions: Start the timer delay in milo seconds
** until elapsed
** Descriptions: Start the timer delay in milo seconds
** until elapsed
**
** parameters: timer number, Delay value in milo second
** parameters: timer number, Delay value in milo second
**
** Returned value: None
** Returned value: None
**
*****************************************************************************/
//void delayMs(uint8_t timer_num, uint32_t delayInMs)
//{
// if ( timer_num == 0 )
// {
// LPC_TIM0->TCR = 0x02; /* reset timer */
// LPC_TIM0->PR = 0x00; /* set prescaler to zero */
// LPC_TIM0->MR0 = delayInMs * (PeripheralClock / 1000 - 1);
// LPC_TIM0->IR = 0xff; /* reset all interrrupts */
// LPC_TIM0->MCR = 0x04; /* stop timer on match */
// LPC_TIM0->TCR = 0x01; /* start timer */
// LPC_TIM0->TCR = 0x02; /* reset timer */
// LPC_TIM0->PR = 0x00; /* set prescaler to zero */
// LPC_TIM0->MR0 = delayInMs * (PeripheralClock / 1000 - 1);
// LPC_TIM0->IR = 0xff; /* reset all interrrupts */
// LPC_TIM0->MCR = 0x04; /* stop timer on match */
// LPC_TIM0->TCR = 0x01; /* start timer */
//
// /* wait until delay time has elapsed */
// while (LPC_TIM0->TCR & 0x01);
// /* wait until delay time has elapsed */
// while (LPC_TIM0->TCR & 0x01);
// }
// else if ( timer_num == 1 )
// {
// LPC_TIM1->TCR = 0x02; /* reset timer */
// LPC_TIM1->PR = 0x00; /* set prescaler to zero */
// LPC_TIM1->MR0 = delayInMs * (PeripheralClock / 1000 - 1);
// LPC_TIM1->IR = 0xff; /* reset all interrrupts */
// LPC_TIM1->MCR = 0x04; /* stop timer on match */
// LPC_TIM1->TCR = 0x01; /* start timer */
// LPC_TIM1->TCR = 0x02; /* reset timer */
// LPC_TIM1->PR = 0x00; /* set prescaler to zero */
// LPC_TIM1->MR0 = delayInMs * (PeripheralClock / 1000 - 1);
// LPC_TIM1->IR = 0xff; /* reset all interrrupts */
// LPC_TIM1->MCR = 0x04; /* stop timer on match */
// LPC_TIM1->TCR = 0x01; /* start timer */
//
// /* wait until delay time has elapsed */
// while (LPC_TIM1->TCR & 0x01);
// /* wait until delay time has elapsed */
// while (LPC_TIM1->TCR & 0x01);
// }
// else if ( timer_num == 2 )
// {
// LPC_TIM2->TCR = 0x02; /* reset timer */
// LPC_TIM2->PR = 0x00; /* set prescaler to zero */
// LPC_TIM2->MR0 = delayInMs * (PeripheralClock / 1000 - 1);
// LPC_TIM2->IR = 0xff; /* reset all interrrupts */
// LPC_TIM2->MCR = 0x04; /* stop timer on match */
// LPC_TIM2->TCR = 0x01; /* start timer */
// LPC_TIM2->TCR = 0x02; /* reset timer */
// LPC_TIM2->PR = 0x00; /* set prescaler to zero */
// LPC_TIM2->MR0 = delayInMs * (PeripheralClock / 1000 - 1);
// LPC_TIM2->IR = 0xff; /* reset all interrrupts */
// LPC_TIM2->MCR = 0x04; /* stop timer on match */
// LPC_TIM2->TCR = 0x01; /* start timer */
//
// /* wait until delay time has elapsed */
// while (LPC_TIM2->TCR & 0x01);
// /* wait until delay time has elapsed */
// while (LPC_TIM2->TCR & 0x01);
// }
// else if ( timer_num == 3 )
// {
// LPC_TIM3->TCR = 0x02; /* reset timer */
// LPC_TIM3->PR = 0x00; /* set prescaler to zero */
// LPC_TIM3->MR0 = delayInMs * (PeripheralClock / 1000 - 1);
// LPC_TIM3->IR = 0xff; /* reset all interrrupts */
// LPC_TIM3->MCR = 0x04; /* stop timer on match */
// LPC_TIM3->TCR = 0x01; /* start timer */
// LPC_TIM3->TCR = 0x02; /* reset timer */
// LPC_TIM3->PR = 0x00; /* set prescaler to zero */
// LPC_TIM3->MR0 = delayInMs * (PeripheralClock / 1000 - 1);
// LPC_TIM3->IR = 0xff; /* reset all interrrupts */
// LPC_TIM3->MCR = 0x04; /* stop timer on match */
// LPC_TIM3->TCR = 0x01; /* start timer */
//
// /* wait until delay time has elapsed */
// while (LPC_TIM3->TCR & 0x01);
// /* wait until delay time has elapsed */
// while (LPC_TIM3->TCR & 0x01);
// }
// return;
//}
@@ -204,7 +204,7 @@ void SDRAM_Init (void)
{
uint32_t i, dwtemp = dwtemp;
uint16_t wtemp = wtemp;
uint32_t mhz, nsPerClk;
uint32_t mhz, nsPerClk;
/* Enable External Memory Controller power/clock */
LPC_SC->PCONP |= 0x00000800;
LPC_SC->EMCDLYCTL = 0x00001010;
@@ -213,10 +213,10 @@ void SDRAM_Init (void)
EMC_GPIO_Init();
mhz = SystemCoreClock / 1000000;
if (LPC_SC->EMCCLKSEL)
mhz >>= 1;
nsPerClk = 1000 / mhz;
mhz = SystemCoreClock / 1000000;
if (LPC_SC->EMCCLKSEL)
mhz >>= 1;
nsPerClk = 1000 / mhz;
LPC_EMC->DynamicRP = EMC_NS2CLK(20, nsPerClk); /* 20ns, */
LPC_EMC->DynamicRAS = /*EMC_NS2CLK(42, nsPerClk);*/ 15; /* 42ns to 100K ns, */
LPC_EMC->DynamicSREX = 1 - 1; /* tSRE, 1clk, */
@@ -225,7 +225,7 @@ void SDRAM_Init (void)
LPC_EMC->DynamicWR = 2 - 1; /* 2CLK, */
LPC_EMC->DynamicRC = EMC_NS2CLK(63, nsPerClk); /* H57V2562GTR-75C tRC=63ns(min)*/
LPC_EMC->DynamicRFC = EMC_NS2CLK(63, nsPerClk); /* H57V2562GTR-75C tRFC=tRC */
LPC_EMC->DynamicXSR = 0x0000000F; /* exit self-refresh to active, ²»ÖªµÀ£¬ÉèΪ×î¾Ã */
LPC_EMC->DynamicXSR = 0x0000000F; /* exit self-refresh to active, 不知道，设为最久 */
LPC_EMC->DynamicRRD = EMC_NS2CLK(63, nsPerClk); /* 3clk, tRRD=15ns(min) */
LPC_EMC->DynamicMRD = 2 - 1; /* 2clk, tMRD=2clk(min) */
@@ -249,22 +249,22 @@ void SDRAM_Init (void)
#ifdef SDRAM_CONFIG_16BIT
LPC_EMC->DynamicConfig0 = 0x680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */
#elif defined SDRAM_CONFIG_32BIT
LPC_EMC->DynamicConfig0 = 0x4680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */
LPC_EMC->DynamicConfig0 = 0x4680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */
#endif
delayMs(0, 100);
LPC_EMC->DynamicControl = 0x00000183; /* Issue NOP command */
delayMs(0, 200); /* wait 200ms */
delayMs(0, 200); /* wait 200ms */
LPC_EMC->DynamicControl = 0x00000103; /* Issue PALL command */
LPC_EMC->DynamicRefresh = 0x00000002; /* ( n * 16 ) -> 32 clock cycles */
for(i = 0; i < 0x80; i++); /* wait 128 AHB clock cycles */
for(i = 0; i < 0x80; i++); /* wait 128 AHB clock cycles */
/* 64ms/8192=7.8125us, nx16x8.33ns<7.8125us, n<58.6*/
wtemp = 64000000 / (1 << 13);
wtemp -= 16;
wtemp >>= 4;
wtemp = wtemp * mhz / 1000;
wtemp = 64000000 / (1 << 13);
wtemp -= 16;
wtemp >>= 4;
wtemp = wtemp * mhz / 1000;
LPC_EMC->DynamicRefresh = wtemp;
LPC_EMC->DynamicControl = 0x00000083; /* Issue MODE command */
@@ -273,7 +273,7 @@ void SDRAM_Init (void)
wtemp = *((volatile uint16_t *)(SDRAM_BASE | (0x33<<12))); /* 8 burst, 3 CAS latency */
#elif defined SDRAM_CONFIG_32BIT
dwtemp = *((volatile uint32_t *)(SDRAM_BASE | (0x32<<13))); /* 4 burst, 3 CAS latency */
dwtemp = *((volatile uint32_t *)(SDRAM_BASE | (0x32<<13))); /* 4 burst, 3 CAS latency */
#endif
LPC_EMC->DynamicControl = 0x00000000; /* Issue NORMAL command */
bsp/lpc178x/drivers/sdram.h
+9
View File
@@ -1,3 +1,12 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
#ifndef SDRAM_H_INCLUDED
#define SDRAM_H_INCLUDED
bsp/lpc178x/drivers/uart.c
+155 -155
View File
File diff suppressed because it is too large. Load diff
bsp/lpc178x/rtconfig.h
+28 -28
View File
@@ -5,17 +5,17 @@
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />
#define RT_NAME_MAX 6
#define RT_NAME_MAX 6
// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />
#define RT_ALIGN_SIZE 4
#define RT_ALIGN_SIZE 4
// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="32">
// <item description="8">8</item>
// <item description="32">32</item>
// <item description="256">256</item>
// </integer>
#define RT_THREAD_PRIORITY_MAX 32
#define RT_THREAD_PRIORITY_MAX 32
// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="100" />
#define RT_TICK_PER_SECOND 100
#define RT_TICK_PER_SECOND 100
// <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" >
#define RT_DEBUG
#define RT_DEBUG_COLOR
@@ -30,11 +30,11 @@
// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >
// #define RT_USING_TIMER_SOFT
// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_PRIO 4
// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_THREAD_STACK_SIZE 512
// <integer name="RT_TIMER_TICK_PER_SECOND" description="The soft-timer tick per second" default="10" />
#define RT_TIMER_TICK_PER_SECOND 10
#define RT_TIMER_TICK_PER_SECOND 10
// </section>
// <section name="IPC" description="Inter-Thread communication" default="always" >
@@ -66,13 +66,13 @@
// <section name="RT_USING_DEVICE" description="Using Device Driver Framework" default="true" >
#define RT_USING_DEVICE
// <integer name="RT_UART_RX_BUFFER_SIZE" description="The buffer size for UART reception" default="64" />
#define RT_UART_RX_BUFFER_SIZE 64
#define RT_UART_RX_BUFFER_SIZE 64
// </section>
// <section name="RT_USING_CONSOLE" description="Using console" default="true" >
#define RT_USING_CONSOLE
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLEBUF_SIZE 128
// </section>
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
@@ -84,7 +84,7 @@
// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />
#define FINSH_USING_DESCRIPTION
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_THREAD_STACK_SIZE 4096
// </section>
// <section name="LIBC" description="C Runtime library setting" default="always" >
@@ -99,18 +99,18 @@
// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />
// #define DFS_USING_WORKDIR
// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEMS_MAX 2
// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />
#define DFS_FD_MAX 4
#define DFS_FD_MAX 4
// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />
#define RT_USING_DFS_ELMFAT
// <integer name="RT_DFS_ELM_USE_LFN" description="Support long file name" default="0">
// <item description="LFN1">1</item>
// <item description="LFN1">2</item>
// </integer>
#define RT_DFS_ELM_USE_LFN 1
#define RT_DFS_ELM_USE_LFN 1
// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="255" />
#define RT_DFS_ELM_MAX_LFN 64
#define RT_DFS_ELM_MAX_LFN 64
// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />
// #define RT_USING_DFS_YAFFS2
// <bool name="RT_USING_DFS_UFFS" description="Using UFFS" default="false" />
@@ -120,7 +120,7 @@
// <bool name="RT_USING_DFS_NFS" description="Using NFS v3 client file system" default="false" />
// #define RT_USING_DFS_NFS
// <string name="RT_NFS_HOST_EXPORT" description="NFSv3 host export" default="192.168.1.5:/" />
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
// </section>
// <section name="RT_USING_LWIP" description="lwip, a lightweight TCP/IP protocol stack" default="true" >
@@ -136,31 +136,31 @@
// <bool name="RT_LWIP_DNS" description="Enable DNS protocol" default="true" />
#define RT_LWIP_DNS
// <integer name="RT_LWIP_PBUF_NUM" description="Maximal number of buffers in the pbuf pool" default="4" />
#define RT_LWIP_PBUF_NUM 4
#define RT_LWIP_PBUF_NUM 4
// <integer name="RT_LWIP_TCP_PCB_NUM" description="Maximal number of simultaneously active TCP connections" default="5" />
#define RT_LWIP_TCP_PCB_NUM 3
#define RT_LWIP_TCP_PCB_NUM 3
// <integer name="RT_LWIP_TCP_SND_BUF" description="TCP sender buffer size" default="8192" />
#define RT_LWIP_TCP_SND_BUF 2048
#define RT_LWIP_TCP_SND_BUF 2048
// <integer name="RT_LWIP_TCP_WND" description="TCP receive window" default="8192" />
#define RT_LWIP_TCP_WND 2048
#define RT_LWIP_TCP_WND 2048
// <bool name="RT_LWIP_SNMP" description="Enable SNMP protocol" default="false" />
// #define RT_LWIP_SNMP
// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
// #define RT_LWIP_DHCP
// <integer name="RT_LWIP_TCP_SEG_NUM" description="the number of simultaneously queued TCP" default="4" />
#define RT_LWIP_TCP_SEG_NUM 4
#define RT_LWIP_TCP_SEG_NUM 4
// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_PRIORITY 12
// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
// <integer name="RT_LWIP_TCPTHREAD_STACKSIZE" description="the thread stack size of TCP thread" default="4096" />
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
// <integer name="RT_LWIP_ETHTHREAD_PRIORITY" description="the thread priority of ethnetif thread" default="144" />
#define RT_LWIP_ETHTHREAD_PRIORITY 14
#define RT_LWIP_ETHTHREAD_PRIORITY 14
// <integer name="RT_LWIP_ETHTHREAD_MBOX_SIZE" description="the mail box size of ethnetif thread to wait for" default="8" />
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
// <integer name="RT_LWIP_ETHTHREAD_STACKSIZE" description="the stack size of ethnetif thread" default="512" />
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
// <ipaddr name="RT_LWIP_IPADDR" description="IP address of device" default="192.168.1.30" />
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
@@ -181,7 +181,7 @@
// <section name="RT_USING_RTGUI" description="RT-Thread/GUI" default="true" >
// #define RT_USING_RTGUI
// <integer name="RTGUI_NAME_MAX" description="the name size of RT-Thread/GUI widget/objects" default="12" />
#define RTGUI_NAME_MAX 12
#define RTGUI_NAME_MAX 12
// <bool name="RTGUI_USING_SMALL_SIZE" description="use small size in RT-Thread/GUI" default="true" />
#define RTGUI_USING_SMALL_SIZE
// <bool name="RTGUI_USING_FONT16" description="support 16 weight font" default="true" />
@@ -191,7 +191,7 @@
// <bool name="RTGUI_USING_FONTHZ" description="support Chinese font" default="true" />
#define RTGUI_USING_FONTHZ
// <integer name="RTGUI_DEFAULT_FONT_SIZE" description="default font size in RT-Thread/GUI" default="16" />
#define RTGUI_DEFAULT_FONT_SIZE 16
#define RTGUI_DEFAULT_FONT_SIZE 16
// <bool name="RTGUI_USING_DFS_FILERW" description="use RT-Thread/DFS as file interface" default="true" />
// #define RTGUI_USING_DFS_FILERW
// <bool name="RTGUI_USING_HZ_BMP" description="use Chinese font bitmap engine" default="true" />
bsp/lpc2148/applications/application.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc2148/applications/startup.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc2148/drivers/board.c
+41 -41
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -25,13 +25,13 @@
*/
void rt_hw_timer_handler(int vector, void *param)
{
rt_tick_increase();
rt_tick_increase();
/* clear interrupt flag */
T0IR |= 0x01;
/* clear interrupt flag */
T0IR |= 0x01;
/* acknowledge Interrupt */
VICVectAddr = 0;
/* acknowledge Interrupt */
VICVectAddr = 0;
}
/**
@@ -42,37 +42,37 @@ void rt_hw_timer_handler(int vector, void *param)
*/
void rt_hw_console_output(const char* str)
{
while (*str)
{
if (*str=='\n')
{
while (!(U0LSR & 0x20));
U0THR = '\r';
}
while (*str)
{
if (*str=='\n')
{
while (!(U0LSR & 0x20));
U0THR = '\r';
}
while (!(U0LSR & 0x20));
U0THR = *str;
while (!(U0LSR & 0x20));
U0THR = *str;
str ++;
}
str ++;
}
}
#define BAUD_RATE 115200
#define U0PINS 0x05
#define BAUD_RATE 115200
#define U0PINS 0x05
void rt_hw_console_init()
{
/* Enable RxD and TxD pins */
PINSEL0 = U0PINS;
/* Enable RxD and TxD pins */
PINSEL0 = U0PINS;
/* 8 bits, no Parity, 1 Stop bit */
U0LCR = 0x83;
/* 8 bits, no Parity, 1 Stop bit */
U0LCR = 0x83;
/* Setup Baudrate */
U0DLL = (PCLK/16/BAUD_RATE) & 0xFF;
U0DLM = ((PCLK/16/BAUD_RATE) >> 8) & 0xFF;
/* Setup Baudrate */
U0DLL = (PCLK/16/BAUD_RATE) & 0xFF;
U0DLM = ((PCLK/16/BAUD_RATE) >> 8) & 0xFF;
/* DLAB = 0 */
U0LCR = 0x03;
/* DLAB = 0 */
U0LCR = 0x03;
}
/**
@@ -80,23 +80,23 @@ void rt_hw_console_init()
*/
void rt_hw_board_init(void)
{
/* console init */
rt_hw_console_init();
/* console init */
rt_hw_console_init();
/* prescaler = 0*/
T0PR = 0;
T0PC = 0;
/* prescaler = 0*/
T0PR = 0;
T0PC = 0;
/* reset and enable MR0 interrupt */
T0MCR = 0x3;
T0MR0 = PCLK / RT_TICK_PER_SECOND;
/* reset and enable MR0 interrupt */
T0MCR = 0x3;
T0MR0 = PCLK / RT_TICK_PER_SECOND;
/* enable timer 0 */
T0TCR = 1;
/* enable timer 0 */
T0TCR = 1;
/* install timer handler */
rt_hw_interrupt_install(TIMER0_INT, rt_hw_timer_handler, RT_NULL, "TIMER0");
rt_hw_interrupt_umask(TIMER0_INT);
/* install timer handler */
rt_hw_interrupt_install(TIMER0_INT, rt_hw_timer_handler, RT_NULL, "TIMER0");
rt_hw_interrupt_umask(TIMER0_INT);
}
/*@}*/
bsp/lpc2148/drivers/board.h
+4 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -12,13 +12,13 @@
#define __BOARD_H__
#include <rtthread.h>
#define CCLK 60000000 /* Fosc = 12MHz, M = 5 */
#define PCLK 15000000 /* CCLK/4, use default */
#define CCLK 60000000 /* Fosc = 12MHz, M = 5 */
#define PCLK 15000000 /* CCLK/4, use default */
/* RT_USING_UART */
#define RT_USING_UART1
#define RT_USING_UART2
#define RT_UART_RX_BUFFER_SIZE 64
#define RT_UART_RX_BUFFER_SIZE 64
void rt_hw_board_init(void);
bsp/lpc2148/drivers/dm9000.c
+44 -44
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -15,11 +15,11 @@
#define MAX_ADDR_LEN 6
struct rt_dm9000_eth
{
/* inherit from ethernet device */
struct eth_device parent;
/* inherit from ethernet device */
struct eth_device parent;
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
};
static struct rt_dm9000_eth dm9000_device;
@@ -52,67 +52,67 @@ static rt_err_t rt_dm9000_init(rt_device_t dev)
static rt_err_t rt_dm9000_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
return RT_EOK;
}
static rt_err_t rt_dm9000_close(rt_device_t dev)
{
return RT_EOK;
return RT_EOK;
}
static rt_size_t rt_dm9000_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_size_t rt_dm9000_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_err_t rt_dm9000_control(rt_device_t dev, int cmd, void *args)
{
switch(cmd)
{
case NIOCTL_GADDR:
/* get mac address */
if(args) rt_memcpy(args, dm9000_device.dev_addr, 6);
else return -RT_ERROR;
break;
switch(cmd)
{
case NIOCTL_GADDR:
/* get mac address */
if(args) rt_memcpy(args, dm9000_device.dev_addr, 6);
else return -RT_ERROR;
break;
default :
break;
}
default :
break;
}
return RT_EOK;
return RT_EOK;
}
/* ethernet device interface */
/* transmit packet. */
rt_err_t rt_dm9000_tx( rt_device_t dev, struct pbuf* p)
{
struct pbuf* q;
rt_uint32_t len;
rt_uint8_t* ptr;
struct pbuf* q;
rt_uint32_t len;
rt_uint8_t* ptr;
for (q = p; q != NULL; q = q->next)
{
len = q->len;
ptr = q->payload;
for (q = p; q != NULL; q = q->next)
{
len = q->len;
ptr = q->payload;
/* write data to device */
}
/* write data to device */
}
return RT_EOK;
return RT_EOK;
}
/* reception packet. */
struct pbuf *rt_dm9000_rx(rt_device_t dev)
{
struct pbuf* p;
rt_uint32_t len;
rt_uint32_t len;
/* init p pointer */
p = RT_NULL;
@@ -149,17 +149,17 @@ struct pbuf *rt_dm9000_rx(rt_device_t dev)
void rt_hw_dm9000_init()
{
dm9000_device.parent.parent.init = rt_dm9000_init;
dm9000_device.parent.parent.open = rt_dm9000_open;
dm9000_device.parent.parent.close = rt_dm9000_close;
dm9000_device.parent.parent.read = rt_dm9000_read;
dm9000_device.parent.parent.write = rt_dm9000_write;
dm9000_device.parent.parent.control = rt_dm9000_control;
dm9000_device.parent.parent.user_data = RT_NULL;
dm9000_device.parent.parent.init = rt_dm9000_init;
dm9000_device.parent.parent.open = rt_dm9000_open;
dm9000_device.parent.parent.close = rt_dm9000_close;
dm9000_device.parent.parent.read = rt_dm9000_read;
dm9000_device.parent.parent.write = rt_dm9000_write;
dm9000_device.parent.parent.control = rt_dm9000_control;
dm9000_device.parent.parent.user_data = RT_NULL;
dm9000_device.parent.eth_rx = rt_dm9000_rx;
dm9000_device.parent.eth_tx = rt_dm9000_tx;
dm9000_device.parent.eth_rx = rt_dm9000_rx;
dm9000_device.parent.eth_tx = rt_dm9000_tx;
rt_device_register((rt_device_t)&dm9000_device,
"E0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX);
rt_device_register((rt_device_t)&dm9000_device,
"E0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX);
}
bsp/lpc2148/drivers/sd.c
+41 -41
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -22,12 +22,12 @@ static rt_err_t rt_sdcard_init(rt_device_t dev)
static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
return RT_EOK;
}
static rt_err_t rt_sdcard_close(rt_device_t dev)
{
return RT_EOK;
return RT_EOK;
}
static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
@@ -48,54 +48,54 @@ static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buf
static rt_err_t rt_sdcard_control(rt_device_t dev, int cmd, void *args)
{
return RT_EOK;
return RT_EOK;
}
void rt_hw_sdcard_init()
{
rt_size_t length;
rt_uint8_t* sector;
rt_uint8_t* sector;
/* sdcard hardware init */
sd.type = RT_Device_Class_Block;
sd.init = rt_sdcard_init;
sd.open = rt_sdcard_open;
sd.close = rt_sdcard_close;
sd.read = rt_sdcard_read;
sd.write = rt_sdcard_write;
sd.control = rt_sdcard_control;
sd.user_data = RT_NULL;
sd.type = RT_Device_Class_Block;
sd.init = rt_sdcard_init;
sd.open = rt_sdcard_open;
sd.close = rt_sdcard_close;
sd.read = rt_sdcard_read;
sd.write = rt_sdcard_write;
sd.control = rt_sdcard_control;
sd.user_data = RT_NULL;
/* get the first sector to read partition table */
sector = (rt_uint8_t*) rt_malloc (512);
if (sector == RT_NULL)
{
rt_kprintf("allocate partition sector buffer failed\n");
return;
}
/* get the first sector to read partition table */
sector = (rt_uint8_t*) rt_malloc (512);
if (sector == RT_NULL)
{
rt_kprintf("allocate partition sector buffer failed\n");
return;
}
length = rt_sdcard_read((rt_device_t)&sd, 0, sector, 512);
if (length == 512)
{
rt_err_t status;
length = rt_sdcard_read((rt_device_t)&sd, 0, sector, 512);
if (length == 512)
{
rt_err_t status;
/* get the first partition */
status = dfs_filesystem_get_partition(&part, sector, 0);
if (status != RT_EOK)
{
/* there is no partition table */
part.offset = 0;
part.size = 0;
}
}
else
{
/* there is no partition table */
part.offset = 0;
part.size = 0;
}
/* get the first partition */
status = dfs_filesystem_get_partition(&part, sector, 0);
if (status != RT_EOK)
{
/* there is no partition table */
part.offset = 0;
part.size = 0;
}
}
else
{
/* there is no partition table */
part.offset = 0;
part.size = 0;
}
rt_device_register(&sd,
"sd", RT_DEVICE_FLAG_RDWR);
rt_device_register(&sd,
"sd", RT_DEVICE_FLAG_RDWR);
}
bsp/lpc2148/drivers/serial.c
+225 -225
View File
File diff suppressed because it is too large. Load diff
bsp/lpc2148/rtconfig.h
+23 -23
View File
@@ -3,16 +3,16 @@
#define __RTTHREAD_CFG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX*/
#define RT_THREAD_PRIORITY_MAX 32
#define RT_THREAD_PRIORITY_MAX 32
/* Tick per Second*/
#define RT_TICK_PER_SECOND 100
#define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */
/* Thread Debug */
@@ -62,12 +62,12 @@
#define RT_USING_DEVICE
#define RT_USING_UART1
#define RT_USING_UART2
#define RT_UART_RX_BUFFER_SIZE 64
#define RT_UART_RX_BUFFER_SIZE 64
/* SECTION: Console options */
#define RT_USING_CONSOLE
/* the buffer size of console*/
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLEBUF_SIZE 128
/* SECTION: FinSH shell options */
/* Using FinSH as Shell*/
@@ -87,11 +87,11 @@
/* SECTION: DFS options */
/* #define RT_USING_DFS */
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 4
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 8
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 4
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 8
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
/* Using lighweight TCP/IP protocol stack*/
@@ -119,21 +119,21 @@
/* #define RT_LWIP_DHCP */
/* ip address of target*/
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 0
#define RT_LWIP_IPADDR3 30
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 0
#define RT_LWIP_IPADDR3 30
/* gateway address of target*/
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 0
#define RT_LWIP_GWADDR3 1
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 0
#define RT_LWIP_GWADDR3 1
/* mask address of target*/
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
#endif
bsp/lpc2478/applications/application.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc2478/applications/startup.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc2478/drivers/board.c
+14 -14
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,7 +14,7 @@
#include <LPC24xx.h>
#include "board.h"
#define DATA_COUNT 14400000/RT_TICK_PER_SECOND /* T0MR0 = delayInMs * (Fpclk / 1000); */
#define DATA_COUNT 14400000/RT_TICK_PER_SECOND /* T0MR0 = delayInMs * (Fpclk / 1000); */
extern void rt_hw_serial_init(void);
@@ -25,9 +25,9 @@ extern void rt_hw_serial_init(void);
void rt_timer_handler(int vector, void* param)
{
T0IR |= 0x01; /* clear interrupt flag */
rt_tick_increase();
VICVectAddr = 0; /* Acknowledge Interrupt */
T0IR |= 0x01; /* clear interrupt flag */
rt_tick_increase();
VICVectAddr = 0; /* Acknowledge Interrupt */
}
/**
@@ -36,19 +36,19 @@ void rt_timer_handler(int vector, void* param)
void rt_hw_board_init(void)
{
#if defined(RT_USING_DEVICE) && defined(RT_USING_UART1)
rt_hw_serial_init();
rt_console_set_device("uart1");
rt_hw_serial_init();
rt_console_set_device("uart1");
#endif
T0IR = 0xff;
T0TC = 0;
T0MCR = 0x03;
T0MR0 = (DATA_COUNT);
T0IR = 0xff;
T0TC = 0;
T0MCR = 0x03;
T0MR0 = (DATA_COUNT);
rt_hw_interrupt_install(TIMER0_INT, rt_timer_handler, RT_NULL, "tick");
rt_hw_interrupt_umask(TIMER0_INT);
rt_hw_interrupt_install(TIMER0_INT, rt_timer_handler, RT_NULL, "tick");
rt_hw_interrupt_umask(TIMER0_INT);
T0TCR = 0x01; //enable timer0 counter
T0TCR = 0x01; //enable timer0 counter
}
/*@}*/
bsp/lpc2478/drivers/board.h
+66 -66
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,7 +14,7 @@
/* RT_USING_UART */
#define RT_USING_UART1
#define RT_USING_UART2
#define RT_UART_RX_BUFFER_SIZE 64
#define RT_UART_RX_BUFFER_SIZE 64
void rt_hw_board_init(void);
void rt_hw_led_set(rt_uint32_t led);
void rt_hw_led_flash(void);
@@ -23,93 +23,93 @@ void rt_hw_led_flash(void);
void rt_hw_finsh_init(void);
#endif
#define USE_USB 0
#define USE_USB 0
#if USE_USB /* 1 is USB, 0 is non-USB related */
#define PLL_MValue 11
#define PLL_NValue 0
#define CCLKDivValue 4
#define USBCLKDivValue 5
#if USE_USB /* 1 is USB, 0 is non-USB related */
#define PLL_MValue 11
#define PLL_NValue 0
#define CCLKDivValue 4
#define USBCLKDivValue 5
#define Fosc 12000000
#define Fcclk 57600000
#define Fcco 288000000
#define Fosc 12000000
#define Fcclk 57600000
#define Fcco 288000000
#else
#define PLL_MValue 12
#define PLL_NValue 1
#define CCLKDivValue 5
#define PLL_MValue 12
#define PLL_NValue 1
#define CCLKDivValue 5
#define Fosc 12000000
#define Fcclk 72000000
#define Fcco 360000000
#define Fosc 12000000
#define Fcclk 72000000
#define Fcco 360000000
#endif
#if USE_USB
#define Fpclk (Fcclk / 2)
#define Fpclk (Fcclk / 2)
#else
#define Fpclk (Fcclk / 4)
#define Fpclk (Fcclk / 4)
#endif
/* IRQ define */
#define SYS32Mode 0x1F
#define IRQ32Mode 0x12
#define FIQ32Mode 0x11
#define SYS32Mode 0x1F
#define IRQ32Mode 0x12
#define FIQ32Mode 0x11
#define HIGHEST_PRIORITY 0x01
#define LOWEST_PRIORITY 0x0F
#define HIGHEST_PRIORITY 0x01
#define LOWEST_PRIORITY 0x0F
#define WDT_INT 0
#define SWI_INT 1
#define ARM_CORE0_INT 2
#define ARM_CORE1_INT 3
#define TIMER0_INT 4
#define TIMER1_INT 5
#define UART0_INT 6
#define UART1_INT 7
#define PWM0_1_INT 8
#define I2C0_INT 9
#define SPI0_INT 10 /* SPI and SSP0 share VIC slot */
#define SSP0_INT 10
#define SSP1_INT 11
#define PLL_INT 12
#define RTC_INT 13
#define EINT0_INT 14
#define EINT1_INT 15
#define EINT2_INT 16
#define EINT3_INT 17
#define ADC0_INT 18
#define I2C1_INT 19
#define BOD_INT 20
#define EMAC_INT 21
#define USB_INT 22
#define CAN_INT 23
#define MCI_INT 24
#define GPDMA_INT 25
#define TIMER2_INT 26
#define TIMER3_INT 27
#define UART2_INT 28
#define UART3_INT 29
#define I2C2_INT 30
#define I2S_INT 31
#define WDT_INT 0
#define SWI_INT 1
#define ARM_CORE0_INT 2
#define ARM_CORE1_INT 3
#define TIMER0_INT 4
#define TIMER1_INT 5
#define UART0_INT 6
#define UART1_INT 7
#define PWM0_1_INT 8
#define I2C0_INT 9
#define SPI0_INT 10 /* SPI and SSP0 share VIC slot */
#define SSP0_INT 10
#define SSP1_INT 11
#define PLL_INT 12
#define RTC_INT 13
#define EINT0_INT 14
#define EINT1_INT 15
#define EINT2_INT 16
#define EINT3_INT 17
#define ADC0_INT 18
#define I2C1_INT 19
#define BOD_INT 20
#define EMAC_INT 21
#define USB_INT 22
#define CAN_INT 23
#define MCI_INT 24
#define GPDMA_INT 25
#define TIMER2_INT 26
#define TIMER3_INT 27
#define UART2_INT 28
#define UART3_INT 29
#define I2C2_INT 30
#define I2S_INT 31
#define VIC_SIZE 32
#define VIC_SIZE 32
#define VECT_ADDR_INDEX 0x100
#define VECT_ADDR_INDEX 0x100
#define VECT_CNTL_INDEX 0x200
#define CCLK 60000000 /* Fosc = 12MHz, M = 5 */
#define PCLK 15000000 /* CCLK/4, use default */
#define CCLK 60000000 /* Fosc = 12MHz, M = 5 */
#define PCLK 15000000 /* CCLK/4, use default */
/******************************************************************************
** Function name: TargetInit
** Function name: TargetInit
**
** Descriptions: Initialize the target board; it is called in a
** necessary place, change it as needed
** Descriptions: Initialize the target board; it is called in a
** necessary place, change it as needed
**
** parameters: None
** Returned value: None
** parameters: None
** Returned value: None
**
******************************************************************************/
extern void TargetInit(void);
bsp/lpc2478/drivers/serial.c
+229 -229
View File
File diff suppressed because it is too large. Load diff
bsp/lpc2478/rtconfig.h
+19 -19
View File
@@ -3,22 +3,22 @@
#define __RTTHREAD_CFG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX*/
#define RT_THREAD_PRIORITY_MAX 256
#define RT_THREAD_PRIORITY_MAX 256
/* Tick per Second*/
#define RT_TICK_PER_SECOND 100
#define RT_TICK_PER_SECOND 100
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_THREAD_PRIO 1
/* Rate at which timer management task runs (Hz) */
#define RT_TIMER_EX_TICKS_PER_SEC 10
#define RT_TIMER_EX_TICKS_PER_SEC 10
/* SECTION: RT_DEBUG */
@@ -67,7 +67,7 @@
/* SECTION: Console options */
#define RT_USING_CONSOLE
/* the buffer size of console*/
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLEBUF_SIZE 128
/* SECTION: FinSH shell options */
/* Using FinSH as Shell*/
@@ -102,21 +102,21 @@
/* #define RT_LWIP_DHCP */
/* ip address of target*/
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 0
#define RT_LWIP_IPADDR3 30
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 0
#define RT_LWIP_IPADDR3 30
/* gateway address of target*/
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 0
#define RT_LWIP_GWADDR3 1
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 0
#define RT_LWIP_GWADDR3 1
/* mask address of target*/
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
#endif
bsp/lpc408x/applications/main.c
+4 -4
View File
@@ -1,11 +1,11 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 armink first version
* 2018-12-10 armink first version
*/
#include <rtthread.h>
@@ -14,6 +14,6 @@
int main(void)
{
rt_kprintf("Hello RT-Thread!\n");
return RT_EOK;
}
}
bsp/lpc408x/drivers/board.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/board.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/drv_emac.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/drv_emac.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/drv_hwtimer.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/drv_hwtimer.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/drv_led.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/drv_led.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/drv_sdram.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/drv_sdram.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/drv_uart.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc408x/drivers/drv_uart.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/M0/applications/application.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/M0/applications/board.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/M0/applications/board.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/M0/applications/startup.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/M0/applications/vbus_drv.c
+2 -2
View File
@@ -1,6 +1,6 @@
/*
* COPYRIGHT (C) 2018, Real-Thread Information Technology Ltd
*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
* Change Logs:
* Date Author Notes
bsp/lpc43xx/M0/applications/vbus_hw.h
+2 -2
View File
@@ -1,6 +1,6 @@
/*
* COPYRIGHT (C) 2018, Real-Thread Information Technology Ltd
*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
* Change Logs:
* Date Author Notes
bsp/lpc43xx/M4/applications/application.c
+3 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -32,10 +32,10 @@ static void _boot_M0(void)
LPC_CREG->M0APPMEMMAP = (uint32_t)&_M0_CODE[0];
// Release Slave from reset, first read status
// Release Slave from reset, first read status
u32REG = LPC_RGU->RESET_ACTIVE_STATUS1;
// If the M0 is being held in reset, release it...
// If the M0 is being held in reset, release it...
// 1 = no reset, 0 = reset
while(!(u32REG & (1u << 24)))
{
bsp/lpc43xx/M4/applications/board.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/M4/applications/board.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/M4/applications/startup.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/M4/applications/vbus_drv.c
+2 -2
View File
@@ -1,6 +1,6 @@
/*
* COPYRIGHT (C) 2018, Real-Thread Information Technology Ltd
*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
* Change Logs:
* Date Author Notes
bsp/lpc43xx/M4/applications/vbus_hw.h
+2 -2
View File
@@ -1,6 +1,6 @@
/*
* COPYRIGHT (C) 2018, Real-Thread Information Technology Ltd
*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
* Change Logs:
* Date Author Notes
bsp/lpc43xx/drivers/drv_emac.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/drivers/drv_emac.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/drivers/drv_led.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc43xx/drivers/drv_uart.c
+4 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -179,7 +179,7 @@ void rt_hw_uart_init(void)
config.parity = PARITY_NONE;
config.stop_bits = STOP_BITS_1;
config.invert = NRZ_NORMAL;
config.bufsz = RT_SERIAL_RB_BUFSZ;
config.bufsz = RT_SERIAL_RB_BUFSZ;
serial0.ops = &lpc_uart_ops;
serial0.config = config;
@@ -230,7 +230,7 @@ void rt_hw_uart_init(void)
config.parity = PARITY_NONE;
config.stop_bits = STOP_BITS_1;
config.invert = NRZ_NORMAL;
config.bufsz = RT_SERIAL_RB_BUFSZ;
config.bufsz = RT_SERIAL_RB_BUFSZ;
serial2.ops = &lpc_uart_ops;
serial2.config = config;
@@ -282,7 +282,7 @@ void rt_hw_uart_init(void)
config.parity = PARITY_NONE;
config.stop_bits = STOP_BITS_1;
config.invert = NRZ_NORMAL;
config.bufsz = RT_SERIAL_RB_BUFSZ;
config.bufsz = RT_SERIAL_RB_BUFSZ;
serial3.ops = &lpc_uart_ops;
serial3.config = config;
bsp/lpc5410x/applications/application.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc5410x/applications/board.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -46,7 +46,7 @@ void rt_hw_board_init()
SCB->VTOR = (0x00000000 & NVIC_VTOR_MASK);
#endif
SystemCoreClockUpdate();
/* init systick 1 systick = 1/(100M / 100) 100¸ösystick = 1s*/
/* init systick 1 systick = 1/(100M / 100) 100个systick = 1s*/
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
/* set pend exception priority */
NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
bsp/lpc5410x/applications/board.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc5410x/applications/demo_thread.c
+28 -28
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -10,47 +10,47 @@
#include "drv_led.h"
#include "drv_uart.h"
static void thread1_entry(void* parameter)
static void thread1_entry(void* parameter)
{
while(1)
{
Led_Control(0,1);
rt_thread_delay(RT_TICK_PER_SECOND);
Led_Control(0,0);
rt_thread_delay(RT_TICK_PER_SECOND);
Led_Control(0,1);
rt_thread_delay(RT_TICK_PER_SECOND);
Led_Control(0,0);
rt_thread_delay(RT_TICK_PER_SECOND);
}
}
static void thread2_entry(void* parameter)
static void thread2_entry(void* parameter)
{
while(1)
{
Led_Control(1,1);
rt_thread_delay(RT_TICK_PER_SECOND);
Led_Control(1,0);
rt_thread_delay(RT_TICK_PER_SECOND);
}
Led_Control(1,1);
rt_thread_delay(RT_TICK_PER_SECOND);
Led_Control(1,0);
rt_thread_delay(RT_TICK_PER_SECOND);
}
}
int demo_init(void)
{
rt_thread_t thread1 = RT_NULL;
rt_thread_t thread2 = RT_NULL;
rt_led_hw_init();
thread1 = rt_thread_create("t1",thread1_entry, RT_NULL,512,10,5);
if (thread1 != RT_NULL)
rt_thread_startup(thread1);
rt_thread_t thread1 = RT_NULL;
rt_thread_t thread2 = RT_NULL;
thread2 = rt_thread_create("t2",thread2_entry, RT_NULL,512,10,5);
if (thread2 != RT_NULL)
rt_thread_startup(thread2);
return 0;
rt_led_hw_init();
thread1 = rt_thread_create("t1",thread1_entry, RT_NULL,512,10,5);
if (thread1 != RT_NULL)
rt_thread_startup(thread1);
thread2 = rt_thread_create("t2",thread2_entry, RT_NULL,512,10,5);
if (thread2 != RT_NULL)
rt_thread_startup(thread2);
return 0;
}
bsp/lpc5410x/applications/startup.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc5410x/drivers/drv_led.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc5410x/drivers/drv_led.h
+9
View File
@@ -1,3 +1,12 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
#ifndef __DRV_LED_H__
#define __DRV_LED_H__
bsp/lpc5410x/drivers/drv_uart.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc5410x/drivers/drv_uart.h
+9
View File
@@ -1,3 +1,12 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
#ifndef __DRV_UART_H_
#define __DRV_UART_H_
bsp/lpc5410x/rtconfig.h
+26 -26
View File
@@ -5,17 +5,17 @@
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />
#define RT_NAME_MAX 8
#define RT_NAME_MAX 8
// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />
#define RT_ALIGN_SIZE 4
#define RT_ALIGN_SIZE 4
// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="32">
// <item description="8">8</item>
// <item description="32">32</item>
// <item description="256">256</item>
// </integer>
#define RT_THREAD_PRIORITY_MAX 32
#define RT_THREAD_PRIORITY_MAX 32
// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="100" />
#define RT_TICK_PER_SECOND 100
#define RT_TICK_PER_SECOND 100
// <section name="RT_DEBUG" description="Kernel Debug Configuration, enable it to open assertions for run-time checking" default="true" >
#define RT_DEBUG
#define RT_DEBUG_COLOR
@@ -30,11 +30,11 @@
// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >
// #define RT_USING_TIMER_SOFT
// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_PRIO 4
// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_THREAD_STACK_SIZE 512
// <integer name="RT_TIMER_TICK_PER_SECOND" description="The soft-timer tick per second" default="10" />
#define RT_TIMER_TICK_PER_SECOND 10
#define RT_TIMER_TICK_PER_SECOND 10
// </section>
// <section name="IPC" description="Inter-Thread communication" default="always" >
@@ -75,7 +75,7 @@
// <section name="RT_USING_CONSOLE" description="Using console" default="true" >
#define RT_USING_CONSOLE
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLEBUF_SIZE 128
// </section>
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
@@ -87,7 +87,7 @@
// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />
#define FINSH_USING_DESCRIPTION
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_THREAD_STACK_SIZE 4096
// </section>
// <section name="LIBC" description="C Runtime library setting" default="always" >
@@ -102,18 +102,18 @@
// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />
// #define DFS_USING_WORKDIR
// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEMS_MAX 2
// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />
#define DFS_FD_MAX 4
#define DFS_FD_MAX 4
// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />
#define RT_USING_DFS_ELMFAT
// <integer name="RT_DFS_ELM_USE_LFN" description="Support long file name" default="0">
// <item description="LFN1">1</item>
// <item description="LFN1">2</item>
// </integer>
#define RT_DFS_ELM_USE_LFN 1
#define RT_DFS_ELM_USE_LFN 1
// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="255" />
#define RT_DFS_ELM_MAX_LFN 64
#define RT_DFS_ELM_MAX_LFN 64
// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />
// #define RT_USING_DFS_YAFFS2
// <bool name="RT_USING_DFS_UFFS" description="Using UFFS" default="false" />
@@ -123,7 +123,7 @@
// <bool name="RT_USING_DFS_NFS" description="Using NFS v3 client file system" default="false" />
// #define RT_USING_DFS_NFS
// <string name="RT_NFS_HOST_EXPORT" description="NFSv3 host export" default="192.168.1.5:/" />
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
// </section>
// <section name="RT_USING_LWIP" description="lwip, a lightweight TCP/IP protocol stack" default="true" >
@@ -139,29 +139,29 @@
// <bool name="RT_LWIP_DNS" description="Enable DNS protocol" default="true" />
#define RT_LWIP_DNS
// <integer name="RT_LWIP_PBUF_NUM" description="Maximal number of buffers in the pbuf pool" default="4" />
#define RT_LWIP_PBUF_NUM 4
#define RT_LWIP_PBUF_NUM 4
// <integer name="RT_LWIP_TCP_PCB_NUM" description="Maximal number of simultaneously active TCP connections" default="5" />
#define RT_LWIP_TCP_PCB_NUM 3
#define RT_LWIP_TCP_PCB_NUM 3
// <integer name="RT_LWIP_TCP_SND_BUF" description="TCP sender buffer size" default="8192" />
#define RT_LWIP_TCP_SND_BUF 2048
#define RT_LWIP_TCP_SND_BUF 2048
// <integer name="RT_LWIP_TCP_WND" description="TCP receive window" default="8192" />
#define RT_LWIP_TCP_WND 2048
#define RT_LWIP_TCP_WND 2048
// <bool name="RT_LWIP_SNMP" description="Enable SNMP protocol" default="false" />
// #define RT_LWIP_SNMP
// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
// #define RT_LWIP_DHCP
// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_PRIORITY 12
// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
// <integer name="RT_LWIP_TCPTHREAD_STACKSIZE" description="the thread stack size of TCP thread" default="4096" />
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
// <integer name="RT_LWIP_ETHTHREAD_PRIORITY" description="the thread priority of ethnetif thread" default="144" />
#define RT_LWIP_ETHTHREAD_PRIORITY 14
#define RT_LWIP_ETHTHREAD_PRIORITY 14
// <integer name="RT_LWIP_ETHTHREAD_MBOX_SIZE" description="the mail box size of ethnetif thread to wait for" default="8" />
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
// <integer name="RT_LWIP_ETHTHREAD_STACKSIZE" description="the stack size of ethnetif thread" default="512" />
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
// <ipaddr name="RT_LWIP_IPADDR" description="IP address of device" default="192.168.1.30" />
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
@@ -182,7 +182,7 @@
// <section name="RT_USING_RTGUI" description="RT-Thread/GUI" default="true" >
// #define RT_USING_RTGUI
// <integer name="RTGUI_NAME_MAX" description="the name size of RT-Thread/GUI widget/objects" default="12" />
#define RTGUI_NAME_MAX 12
#define RTGUI_NAME_MAX 12
// <bool name="RTGUI_USING_SMALL_SIZE" description="use small size in RT-Thread/GUI" default="true" />
#define RTGUI_USING_SMALL_SIZE
// <bool name="RTGUI_USING_FONT16" description="support 16 weight font" default="true" />
@@ -192,7 +192,7 @@
// <bool name="RTGUI_USING_FONTHZ" description="support Chinese font" default="true" />
#define RTGUI_USING_FONTHZ
// <integer name="RTGUI_DEFAULT_FONT_SIZE" description="default font size in RT-Thread/GUI" default="16" />
#define RTGUI_DEFAULT_FONT_SIZE 16
#define RTGUI_DEFAULT_FONT_SIZE 16
// <bool name="RTGUI_USING_DFS_FILERW" description="use RT-Thread/DFS as file interface" default="true" />
// #define RTGUI_USING_DFS_FILERW
// <bool name="RTGUI_USING_HZ_BMP" description="use Chinese font bitmap engine" default="true" />
bsp/lpc54114-lite/applications/main.c
+3 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,9 +14,9 @@
int main(void)
{
/* user app entry */
/* user app entry */
rt_pin_mode(LED4_PIN, PIN_MODE_OUTPUT);
while (1)
{
rt_pin_write(LED4_PIN, !rt_pin_read(LED4_PIN));
bsp/lpc54114-lite/applications/mnt.c
+5 -5
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -24,15 +24,15 @@ int mnt_init(void)
{
rt_kprintf("spi flash mount '%s' failed.\n", BSP_FLASH_MOUNT_PATH);
}
#endif
#endif
#if defined(BSP_USING_SDCARD)
if(dfs_mount("sd0", BSP_SDCARD_MOUNT_PATH, "elm", 0, 0) != 0)
{
rt_kprintf("sdcard mount '%s' failed.\n", BSP_SDCARD_MOUNT_PATH);
}
#endif
#endif
return 0;
}
INIT_APP_EXPORT(mnt_init);
INIT_APP_EXPORT(mnt_init);
bsp/lpc54114-lite/drivers/audio/drv_mic.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -160,4 +160,4 @@ int rt_hw_mic_init(void)
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_mic_init);
INIT_DEVICE_EXPORT(rt_hw_mic_init);
bsp/lpc54114-lite/drivers/audio/drv_mic.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/lpc54114-lite/drivers/audio/drv_sound.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -358,4 +358,4 @@ int rt_hw_sound_init(void)
rt_audio_register(&snd_dev.audio, "sound0", RT_DEVICE_FLAG_WRONLY, &snd_dev);
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_sound_init);
INIT_DEVICE_EXPORT(rt_hw_sound_init);
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