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Merge branch 'fix_1103'

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# Conflicts:
#	bsp/ra6m4-cpk/README.md
#	bsp/ra6m4-cpk/docs/picture/rascuart.png
#	bsp/ra6m4-cpk/docs/使用瑞萨FSP配置工具.md
#	bsp/ra6m4-cpk/src/hal_entry.c
This commit is contained in:
Sherman
2021-11-03 20:44:33 +08:00
parent f2468fa70e 91a0d2a75a
commit 85934d95e6
80 changed files with 3375 additions and 244 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
bsp/ra6m4-cpk/.config
View File

@@ -134,7 +134,7 @@ CONFIG_RT_SERIAL_USING_DMA=y
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
# CONFIG_RT_USING_PIN is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
@@ -573,12 +573,21 @@ CONFIG_SOC_SERIES_R7FA6M4AF=y
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
# CONFIG_BSP_USING_ONCHIP_FLASH is not set
# CONFIG_BSP_USING_WDT is not set
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART7=y
# CONFIG_BSP_UART7_RX_USING_DMA is not set
# CONFIG_BSP_UART7_TX_USING_DMA is not set
CONFIG_BSP_UART7_RX_BUFSIZE=256
CONFIG_BSP_UART7_TX_BUFSIZE=0
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_ONCHIP_RTC is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_DAC is not set
# CONFIG_BSP_USING_PWM is not set
#
# Board extended module Drivers

8
bsp/ra6m4-cpk/.ignore_format.yml Normal file
View File

@@ -0,0 +1,8 @@
# files format check exclude path, please follow the instructions below to modify;
# If you need to exclude an entire folder, add the folder path in dir_path;
# If you need to exclude a file, add the path to the file in file_path.
dir_path:
- ra
- ra_gen
- ra_cfg

18
bsp/ra6m4-cpk/.settings/standalone.prefs
View File

@@ -1,19 +1,21 @@
#Mon Oct 11 16:20:05 CST 2021
#Wed Nov 03 20:31:16 CST 2021
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#device\#\#\#\#3.1.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.1.0/all=1957950123,ra/fsp/inc/api/r_ioport_api.h|1390983687,ra/fsp/inc/instances/r_ioport.h|3204787724,ra/fsp/src/r_ioport/r_ioport.c
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.1.0/all=1390983687,ra/fsp/inc/instances/r_ioport.h|3204787724,ra/fsp/src/r_ioport/r_ioport.c|1957950123,ra/fsp/inc/api/r_ioport_api.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.1.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_icu\#\#\#\#3.1.0/all=2545672180,ra/fsp/inc/instances/r_icu.h|3018483678,ra/fsp/src/r_icu/r_icu.c|1906465970,ra/fsp/inc/api/r_external_irq_api.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra6m4_cpk\#\#\#\#3.1.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#device\#\#\#\#3.1.0/all=2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.1.0/all=3581546608,ra/fsp/inc/fsp_common_api.h|2247478812,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|1222394411,ra/fsp/src/bsp/mcu/all/bsp_io.c|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|1390983687,ra/fsp/inc/instances/r_ioport.h|496115995,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|3590501432,ra/fsp/src/bsp/mcu/all/bsp_io.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|905231975,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|1868795951,ra/fsp/inc/fsp_features.h|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|2966752275,ra/fsp/src/bsp/mcu/all/bsp_delay.c|3098075304,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|2556589544,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|2812024316,ra/fsp/src/bsp/mcu/all/bsp_common.h|1957950123,ra/fsp/inc/api/r_ioport_api.h|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|3520119047,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|2006974055,ra/fsp/inc/api/bsp_api.h|3819230577,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|3131094294,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|1982083345,ra/fsp/src/bsp/mcu/all/bsp_security.c|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|3366593968,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|4191472725,ra/fsp/inc/fsp_version.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.1.0/all=568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|1222394411,ra/fsp/src/bsp/mcu/all/bsp_io.c|3098075304,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|905231975,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|3590501432,ra/fsp/src/bsp/mcu/all/bsp_io.h|1868795951,ra/fsp/inc/fsp_features.h|2556589544,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|3581546608,ra/fsp/inc/fsp_common_api.h|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|496115995,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|2812024316,ra/fsp/src/bsp/mcu/all/bsp_common.h|1390983687,ra/fsp/inc/instances/r_ioport.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|4191472725,ra/fsp/inc/fsp_version.h|2247478812,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|3131094294,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|3366593968,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|3520119047,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|1982083345,ra/fsp/src/bsp/mcu/all/bsp_security.c|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|3819230577,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|2966752275,ra/fsp/src/bsp/mcu/all/bsp_delay.c|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|2006974055,ra/fsp/inc/api/bsp_api.h|1957950123,ra/fsp/inc/api/r_ioport_api.h
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.7.0+fsp.3.1.0/libraries=
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=PinConfiguration
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_icu\#\#\#\#3.1.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.1.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#device\#\#R7FA6M4AF3CFB\#\#3.1.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.7.0+fsp.3.1.0/all=546157604,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|1078551279,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|1536854638,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|206980015,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|2024281644,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|4231934849,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|2748964184,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|377628369,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|637879414,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|4005730526,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|3589068132,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|3021372151,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|1562896660,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|2491522803,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|3602366610,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|3779323067,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|3442821435,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|2686445441,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.1.0/all=2349328507,ra/fsp/src/r_sci_uart/r_sci_uart.c|853178775,ra/fsp/inc/api/r_uart_api.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|1672784957,ra/fsp/inc/instances/r_sci_uart.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#fsp\#\#\#\#3.1.0/all=3571093944,ra/fsp/src/bsp/mcu/ra6m4/bsp_elc.h|2347061782,ra/fsp/src/bsp/mcu/ra6m4/bsp_mcu_info.h|3852442662,ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.7.0+fsp.3.1.0/all=2686445441,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|2491522803,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|2748964184,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|3589068132,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|1536854638,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|206980015,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|4005730526,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|1078551279,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|546157604,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|1562896660,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|3021372151,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|3602366610,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|2024281644,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|4231934849,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|3442821435,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|637879414,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|377628369,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|3779323067,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.1.0/all=2349328507,ra/fsp/src/r_sci_uart/r_sci_uart.c|1672784957,ra/fsp/inc/instances/r_sci_uart.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|853178775,ra/fsp/inc/api/r_uart_api.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#fsp\#\#\#\#3.1.0/all=2347061782,ra/fsp/src/bsp/mcu/ra6m4/bsp_mcu_info.h|3852442662,ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h|3571093944,ra/fsp/src/bsp/mcu/ra6m4/bsp_elc.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.1.0/libraries=
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.813326093=false
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra6m4_cpk\#\#\#\#3.1.0/all=3938710240,ra/board/ra6m4_cpk/board_leds.c|3343992478,ra/board/ra6m4_cpk/board.h|2525887392,ra/board/ra6m4_cpk/board_ethernet_phy.h|3559227370,ra/board/ra6m4_cpk/board_init.c|3843040667,ra/board/ra6m4_cpk/board_leds.h|2967196421,ra/board/ra6m4_cpk/board_init.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra6m4_cpk\#\#\#\#3.1.0/all=3843040667,ra/board/ra6m4_cpk/board_leds.h|2525887392,ra/board/ra6m4_cpk/board_ethernet_phy.h|3559227370,ra/board/ra6m4_cpk/board_init.c|2967196421,ra/board/ra6m4_cpk/board_init.h|3343992478,ra/board/ra6m4_cpk/board.h|3938710240,ra/board/ra6m4_cpk/board_leds.c
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#fsp\#\#\#\#3.1.0/libraries=

102
bsp/ra6m4-cpk/README.md
View File

@@ -1,4 +1,4 @@
# STM32H750-artpi 开发板 BSP 说明
# 瑞萨 CPK-RA6M4 开发板 BSP 说明
## 简介
@@ -25,16 +25,23 @@
**更多详细资料及工具**
## 外设支持
本 BSP 目前对外设的支持情况如下：
| **片上外设** | **支持情况** | **备注** |
| :----------- | :---------- | :------------------------ |
| UART | 支持 | UART7 |
| 持续更新中... | | |
| **片上外设** | **支持情况** | **备注** |
| :----------------- | :----------------- | :------------- |
| UART | 支持 | UART7 |
| GPIO | 支持 | |
| IIC | 支持 | 软件 |
| WDT | 支持 | |
| RTC | 支持 | |
| ADC | 支持 | |
| DAC | 支持 | |
| SPI | 支持 | |
| FLASH | 支持 | |
| PWM | 支持 | |
| 持续更新中... | | |
## 使用说明
@@ -42,16 +49,14 @@
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
### 快速上手
本 BSP 为目前仅为开发者提供 MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
本 BSP 目前仅提供 MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
**硬件连接**
@@ -63,7 +68,7 @@
> 注意：此工程需要使用 J-Flash Lite 工具烧录程序。建议使用 V7.50 及以上版本烧录工程。[J-Link 下载链接](https://www.segger.com/downloads/jlink/)
- 下载：打开 J-Flash lite 工具，选择芯片信号 R7FA6M4AF，点击 OK 进入工具。选择 BSP 目录下 MDK 编译出的 /object/ra6m4.hex 文件，点击 Program Device 按钮开始烧录。具体操作过程可参考下图步骤：
- 下载：打开 J-Flash lite 工具，选择芯片型号 R7FA6M4AF，点击 OK 进入工具。选择 BSP 目录下 MDK 编译出的 /object/ra6m4.hex 文件，点击 Program Device 按钮开始烧录。具体操作过程可参考下图步骤：
![image-20211011181555421](docs/picture/jflash1.png)
@@ -85,7 +90,7 @@
/ | \ 4.0.4 build Oct 11 2021
2006 - 2021 Copyright by rt-thread team
asdasHello RT-Thread!
Hello RT-Thread!
msh >
msh >help
RT-Thread shell commands:
@@ -108,49 +113,62 @@ list - list all commands in system
msh >
```
**应用入口函数**
应用层的入口函数在 **bsp\ra6m4-cpk\src\hal_emtry.c** 中 的 `void hal_entry(void)` 。用户编写的源文件可直接放在 src 目录下。
```c
void hal_entry(void)
{
rt_kprintf("\nHello RT-Thread!\n");
while (1)
{
rt_pin_write(LED3_PIN, PIN_HIGH);
rt_thread_mdelay(500);
rt_pin_write(LED3_PIN, PIN_LOW);
rt_thread_mdelay(500);
}
}
```
### 进阶使用
**资料及文档**
- [开发板官网主页](https://www2.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/cpk-ra6m4-evaluation-board)
- [开发板用户手册](https://www2.renesas.cn/cn/zh/document/mah/1527156?language=zh&r=1527191)
- [瑞萨RA MCU 基础知识](https://www2.renesas.cn/cn/zh/document/gde/1520091)
- [RA6 MCU 快速设计指南](https://www2.renesas.cn/cn/zh/document/apn/ra6-quick-design-guide)
- [RA6M4_datasheet](https://www2.renesas.cn/cn/zh/document/dst/ra6m4-group-datasheet)
- [RA6M4 Group User’s Manual: Hardware](https://www2.renesas.cn/cn/zh/document/man/ra6m4-group-user-s-manual-hardware)
**FSP 配置**
需要修改瑞萨的 BSP 外设配置或添加新的外设端口，需要用到瑞萨的 [FSP](https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document) 配置工具。请务必按照如下步骤完成配置。配置中有任何问题可到[RT-Thread 社区论坛](https://club.rt-thread.org/)中提问。
1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp)
2. 下载安装完成后，需要添加 CPK-RA6M4 开发板的[官方板级支持包](https://www2.renesas.cn/document/sws/1527176?language=zh&r=1527191)
3. 如何将 BSP 配置包添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191)
4. 请查看文档：[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置，
**ENV 配置**
- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
此 BSP 默认只开启了 串口7 的功能，如果需使用更多高级功能例如组件、软件包等，需要利用 ENV 工具进行配置。步骤如下：
此 BSP 默认只开启了 串口7 的功能，如果需使用更多高级功能例如组件、软件包等，需要利用 ENV 工具进行配置。
步骤如下：
1. 在 bsp 下打开 env 工具。
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons --target=mdk5` 命令重新生成工程。
**FSP 配置**
如果需要修改瑞萨的 BSP 外设配置或者需要添加新的外设端口，需要用到瑞萨的 FSP 配置工具。
1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp)
2. 下载安装完成后，需要添加这款开发板的官方[CPK-RA6M4板级支持包](https://www2.renesas.cn/document/sws/1527176?language=zh&r=1527191)
3. 如何将BSP配置包添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191)
4. 在 MDK 中添加自定义命名来打开当前工程的配置详细步骤，请查看文档： [使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)
## 更多资料及文档
- [开发板官网主页](https://www2.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/cpk-ra6m4-evaluation-board)
- [开发板用户手册](https://www2.renesas.cn/cn/zh/document/mah/1527156?language=zh&r=1527191)
- [瑞萨RA MCU 基础知识](https://www2.renesas.cn/cn/zh/document/gde/1520091)
- [RA6 MCU 快速设计指南](https://www2.renesas.cn/cn/zh/document/apn/ra6-quick-design-guide)
- [RA6M4_datasheet](https://www2.renesas.cn/cn/zh/document/dst/ra6m4-group-datasheet)
- [RA6M4 Group User’s Manual: Hardware](https://www2.renesas.cn/cn/zh/document/man/ra6m4-group-user-s-manual-hardware)
## 联系人信息
在使用过程中若您有任何的想法和建议，建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/)
## 贡献代码
如果您对 CPK-RA6M4 感兴趣，并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码，您可以参考 [向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github) 。
如果您对 CPK-RA6M4 感兴趣，并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码，您可以参考 [向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github) 。

4
bsp/ra6m4-cpk/buildinfo.gpdsc
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@@ -58,12 +58,14 @@
<file category="source" name="ra/board/ra6m4_cpk/board_leds.c"/>
<file category="header" name="ra/board/ra6m4_cpk/board_leds.h" path=""/>
<file category="header" name="ra/fsp/inc/api/bsp_api.h" path=""/>
<file category="header" name="ra/fsp/inc/api/r_external_irq_api.h" path=""/>
<file category="header" name="ra/fsp/inc/api/r_ioport_api.h" path=""/>
<file category="header" name="ra/fsp/inc/api/r_transfer_api.h" path=""/>
<file category="header" name="ra/fsp/inc/api/r_uart_api.h" path=""/>
<file category="header" name="ra/fsp/inc/fsp_common_api.h" path=""/>
<file category="header" name="ra/fsp/inc/fsp_features.h" path=""/>
<file category="header" name="ra/fsp/inc/fsp_version.h" path=""/>
<file category="header" name="ra/fsp/inc/instances/r_icu.h" path=""/>
<file category="header" name="ra/fsp/inc/instances/r_ioport.h" path=""/>
<file category="header" name="ra/fsp/inc/instances/r_sci_uart.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h" path=""/>
@@ -97,6 +99,7 @@
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m4/bsp_elc.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m4/bsp_mcu_info.h" path=""/>
<file category="source" name="ra/fsp/src/r_icu/r_icu.c"/>
<file category="source" name="ra/fsp/src/r_ioport/r_ioport.c"/>
<file category="source" name="ra/fsp/src/r_sci_uart/r_sci_uart.c"/>
<file category="other" name="ra/SConscript"/>
@@ -112,6 +115,7 @@
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_family_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_pin_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/r_icu_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/r_ioport_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/r_sci_uart_cfg.h" path=""/>
<file category="other" name="ra_cfg/SConscript"/>

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bsp/ra6m4-cpk/configuration.xml
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@@ -163,6 +163,10 @@
<description>SCI UART</description>
<originalPack>Renesas.RA.3.1.0.pack</originalPack>
</component>
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_icu" variant="" vendor="Renesas" version="3.1.0">
<description>External Interrupt</description>
<originalPack>Renesas.RA.3.1.0.pack</originalPack>
</component>
</raComponentSelection>
<raElcConfiguration/>
<raIcuConfiguration/>
@@ -196,13 +200,26 @@
<property id="module.driver.uart.tei_ipl" value="board.icu.common.irq.priority12"/>
<property id="module.driver.uart.eri_ipl" value="board.icu.common.irq.priority12"/>
</module>
<module id="module.driver.external_irq_on_icu.402865750">
<property id="module.driver.external_irq.name" value="g_external_irq0"/>
<property id="module.driver.external_irq.channel" value="0"/>
<property id="module.driver.external_irq.trigger" value="module.driver.external_irq.trigger.trig_rising"/>
<property id="module.driver.external_irq.filter_enable" value="module.driver.external_irq.filter_enable.false"/>
<property id="module.driver.external_irq.pclk_div" value="module.driver.external_irq.pclk_div.pclk_div_by_64"/>
<property id="module.driver.external_irq.p_callback" value="irq0_callback"/>
<property id="module.driver.external_irq.ipl" value="board.icu.common.irq.priority12"/>
</module>
<context id="_hal.0">
<stack module="module.driver.ioport_on_ioport.0"/>
<stack module="module.driver.uart_on_sci_uart.813326093"/>
<stack module="module.driver.external_irq_on_icu.402865750"/>
</context>
<config id="config.driver.ioport">
<property id="config.driver.ioport.checking" value="config.driver.ioport.checking.system"/>
</config>
<config id="config.driver.icu">
<property id="config.driver.icu.param_checking_enable" value="config.driver.icu.param_checking_enable.bsp"/>
</config>
<config id="config.driver.sci_uart">
<property id="config.driver.sci_uart.param_checking_enable" value="config.driver.sci_uart.param_checking_enable.bsp"/>
<property id="config.driver.sci_uart.fifo_support" value="config.driver.sci_uart.fifo_support.disabled"/>
@@ -320,16 +337,19 @@
<symbolicName propertyId="p712.symbolic_name" value="ARDUINO_GPIO_PWM"/>
<symbolicName propertyId="p713.symbolic_name" value="ARDUINO_GPIO"/>
<pincfg active="true" name="RA6M4 CPK" selected="true" symbol="g_bsp_pin_cfg">
<configSetting altId="adc0.an00.p000" configurationId="adc0.an00"/>
<configSetting altId="adc0.an01.p001" configurationId="adc0.an01"/>
<configSetting altId="adc0.an02.p002" configurationId="adc0.an02"/>
<configSetting altId="adc0.an03.p003" configurationId="adc0.an03"/>
<configSetting altId="adc0.an04.p004" configurationId="adc0.an04"/>
<configSetting altId="adc0.an05.p005" configurationId="adc0.an05"/>
<configSetting altId="adc0.mode.custom" configurationId="adc0.mode"/>
<configSetting altId="adc1.an00.p000" configurationId="adc1.an00"/>
<configSetting altId="adc1.an01.p001" configurationId="adc1.an01"/>
<configSetting altId="adc1.an02.p002" configurationId="adc1.an02"/>
<configSetting altId="adc1.mode.custom" configurationId="adc1.mode"/>
<configSetting altId="cgc0.extal.p212" configurationId="cgc0.extal"/>
<configSetting altId="cgc0.mode.mainsub" configurationId="cgc0.mode"/>
<configSetting altId="cgc0.xtal.p213" configurationId="cgc0.xtal"/>
<configSetting altId="dac0.da.p014" configurationId="dac0.da"/>
<configSetting altId="dac0.mode.enabled" configurationId="dac0.mode"/>
<configSetting altId="debug0.mode.jtag" configurationId="debug0.mode"/>
<configSetting altId="debug0.tck.p300" configurationId="debug0.tck"/>
<configSetting altId="debug0.tdi.p110" configurationId="debug0.tdi"/>
@@ -361,8 +381,8 @@
<configSetting altId="p006.gpio_pupd.gpio_pupd_ip_up" configurationId="p006.gpio_pupd"/>
<configSetting altId="p008.output.low" configurationId="p008"/>
<configSetting altId="p008.gpio_mode.gpio_mode_out.low" configurationId="p008.gpio_mode"/>
<configSetting altId="p014.output.low" configurationId="p014"/>
<configSetting altId="p014.gpio_mode.gpio_mode_out.low" configurationId="p014.gpio_mode"/>
<configSetting altId="p014.asel" configurationId="p014"/>
<configSetting altId="p014.gpio_mode.gpio_mode_an" configurationId="p014.gpio_mode"/>
<configSetting altId="p015.output.low" configurationId="p015"/>
<configSetting altId="p015.gpio_mode.gpio_mode_out.low" configurationId="p015.gpio_mode"/>
<configSetting altId="p105.irq0.irq00" configurationId="p105"/>

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194
bsp/ra6m4-cpk/docs/使用瑞萨FSP配置工具.md
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@@ -1,5 +1,7 @@
## 在 MDK 中使用 FSP
- 添加RA Smart Config
1. 打开 MDK，选择 “Tools -> Customize Tools Menu…”
2. 点击 “new” 图标，添加一条自定义命令: RA Smart Configurator
3. Command 输入工具的安装路径， 点击“…”找到安装路径下的“rasc.exe”文件并选中 (setup_fsp_v3_1_0_rasc_ 安装目录下)
@@ -13,10 +15,198 @@
![image.png](picture/openrasc.png)
- 添加 Device Partition Manager，添加步骤同上。
1. 输入命令名称: `Device Partition Manager`
2. Command: 在安装路径选中 `rasc.exe`
3. Initial Folder : `$P`
4. Arguments: `-application com.renesas.cdt.ddsc.dpm.ui.dpmapplication configuration.xml "SL%L"`
> PS：以上相关操作也可以在 FSP 的说明文档中找到。
>
> 文档路径（本地）：在 FSP 的安装目录下 .\fsp_documentation\v3.1.0\fsp_user_manual_v3.1.0\index.html
>
> 文档路径（官网）：https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document
## 更新工程配置
使用 FSP 配置完成后如果有新的文件添加进工程中，不会马上添加进去。需要先编译一次，如果弹出如下提醒，选择 “是” 然后再次编译即可。
![img](picture/import_changes.png)
## UART
- 添加一个 UART 端口外设配置
如何添加一个 UART 端口外设配置？
1. 选择 Stacks 配置页，点击 New Stack 找到 UART。
![image.png](picture/rascuart.png)
![image.png](picture/rascuart1.png)
2. 配置 UART 参数，因为需要适配 RT-Thread 驱动中使用的命名，所以需要修改命名，设置**name** 、**channel** 、**callback** 是一致的标号。![image.png](picture/rascuart1.png)
## GPIO 中断
如何添加一个 IO 中断？
1. 选择引脚编号，进入配置，比如选择 P105 做为中断引脚。可先找到引脚查看可配置成的 IRQx 通道号。
![image-20211103200949759](picture/p105.png)
2. 打开 ICU 中断通道 IRQ00
![image-20211103200813467](picture/irq0.png)
3. 创建 stack 并进入配置。因为需要适配 RT-Thread 驱动中使用的命名，所以需要修改命名，设置**name** 、**channel** 、**callback** 是一致的标号。选择你希望的触发方式，最后保存配置，生成配置代码。
![](picture/1635929089445.png)
![image-20211103201047103](picture/irq1.png)
4. 测试中断是否成功开启
```c
#define IRQ_TEST_PIN "p104"
void irq_callback_test(void *args)
{
rt_kprintf("\n IRQ01 triggered \n");
}
void icu_sample(void)
{
/* init P104 */
rt_uint32_t pin = rt_pin_get(IRQ_TEST_PIN);
rt_kprintf("\n pin number : 0x%04X \n", pin);
rt_err_t err = rt_pin_attach_irq(pin, PIN_IRQ_MODE_RISING, irq_callback_test, RT_NULL);
if(RT_EOK != err)
{
rt_kprintf("\n attach irq failed. \n");
}
err = rt_pin_irq_enable(pin, PIN_IRQ_ENABLE);
if(RT_EOK != err)
{
rt_kprintf("\n enable irq failed. \n");
}
}
MSH_CMD_EXPORT(icu_sample, icu sample);
```
## WDT
1. 创建 WDT
![image-20211019152302939](picture/wdt.png)
2. 配置 WDT，需要注意在 RT-Thread 中只使用了一个 WDT 设备，所以没有对其进行编号，如果是新创建的 WDT 设备需要注意 name 字段，在驱动中默认使用的是`g_wdt` 。
![image-20211019152407572](picture/wdt_config.png)
3. 如何在 ENV 中打开 WDT 以及[WDT 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/watchdog/watchdog)
![image-20211027183406251](picture/wdt_env.png)
## RTC
1. 添加 RTC 设备
![image-20211019152536749](picture/rtc.png)
2. 配置 RTC，需要注意在 RT-Thread 中只是用了一个 RTC 设备，所以没有对其进行编号，如果是新创建的 RTC 设备需要注意 name 字段，在驱动中默认使用的是`g_rtc` 。修改 Callback 为 rtc_callback
![image-20211019152627412](picture/rtc_config.png)
3. 如何在 ENV 中打开 RTC 以及[ RTC 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/rtc/rtc)
![image-20211027181550233](picture/rtc_env.png)
## Flash
1. 创建 Flash
![image-20211026105031200](picture/add_flash.png)
2. 配置 Flash，需要注意在 RT-Thread 中只使用了一个 flash 设备，所以没有对其进行编号，如果是新创建的 flash 设备需要注意 name 字段，在驱动中默认使用的是`g_flash` 。
![image-20211026105628706](picture/config_flash.png)
3. 如何在 ENV 中打开 Flash
![image-20211026123252310](picture/flash_menuconfig.png)
## SPI
1. 添加一个 SPI 外设端口
![image-20211027180820968](picture/spi_add.png)
2. 配置 channel、name、Clock Phase、Clock Polarity、Callback、 SPI Mode 等参数，波特率在代码中可通过 API 修改，这里可以设置一个默认值。
![img](picture/spi.png)
3. 如何在 ENV 中打开 SPI 以及 [SPI 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/spi/spi)
![image-20211027181444023](picture/spi_env.png)
## ADC/DAC
创建 ADC/DAC
![img](picture/adc_dac.png)
- **ADC**
1. 配置 name、unit、mode，选择扫描的通道编号
![img](picture/adc_config.png)
2. 配置扫描通道对应的引脚
![img](picture/adc_config1.png)
3. 在 menuconfig 中打开对应的通道
- **DAC**
1. 需要先关闭 P014 的默认 mode
![img](picture/dac_config0.png)
2. 开启 DAC0 通道
![img](picture/dac_config1.png)
3. 修改通道号为 0，与 DAC0 对应
![img](picture/dac_config2.png)
4. 在 menuconfig 中打开对应的通道
## 通用 PWM 定时器（GPT）
GPT 定时器在该芯片中可作为通用定时器，也可以用于产生 PWM 信号。在将其用于产生 PWM 信号时，GPT 定时器提供了 gpt0 - gpt9 总共 10 个通道，每个通道可以设定两个输出端口。当前版本的 PWM 驱动将每个通道都看做一个单独的 PWM 设备，每个设备都只有一个通道。用户可以选择开启一个通道的任意一个输出端口，或将两个端口均开启，但在同时开启两个端口的情况下，它们输出的波形将完全一致。
1. 添加 GPT 设备
![img](./picture/add_gpt1.png)
2. 配置通道
![img](./picture/add_gpt2.png)
对 GPT 较为关键的配置如图所示，具体解释如下：
1. 将``Common`` ->``Pin Output Support`` 设置为 Enable ，以开启 PWM 波形的输出。
2. 指定 GPT 通道，并根据通道数指定 GPT 的名称，例如此处指定 GPT 通道 3 ，所以 GPT 的名称必须为``g_timer3``。并且将定时器模式设置为 PWM ，并指定每个 PWM 周期的计数值。
3. 设定 PWM 通道默认输出的占空比，这里为 50% 。
4. 设定 GPT 通道下两个输出端口的使能状态。
5. 此处设置 GPT 通道下两个输出端口各自对应的引脚。
3. 配置输出引脚
![img](./picture/add_gpt3.png)
在完成上一步对 GPT 定时器的设置后，根据图示找到对应 GPT 通道输出引脚设置的界面（这里是 GPT3），将图中标号 **1** 处设置为 ``GTIOCA or GTIOCB`` ，并根据需要在图中标号 **2** 处设置 GPT 通道下两个输出端口各自对应的输出引脚。
4. 在 menuconfig 中打开对应的通道，[RT-Thread 的 pwm 框架介绍](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/pwm/pwm)
![image-20211103202216381](picture/pwm_env.png)

135
bsp/ra6m4-cpk/drivers/Kconfig
View File

@@ -12,6 +12,20 @@ menu "Hardware Drivers Config"
menu "On-chip Peripheral Drivers"
config BSP_USING_GPIO
bool "Enable GPIO"
select RT_USING_PIN
default y
config BSP_USING_ONCHIP_FLASH
bool "Enable Onchip FLASH"
default n
config BSP_USING_WDT
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
menuconfig BSP_USING_UART
bool "Enable UART"
default y
@@ -46,6 +60,127 @@ menu "Hardware Drivers Config"
endif
endif
menuconfig BSP_USING_I2C
bool "Enable I2C BUS"
default n
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
if BSP_USING_I2C
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
default y
if BSP_USING_I2C1
config BSP_I2C1_SCL_PIN
int "i2c1 scl pin number"
range 0x0000 0x0B0F
default 0x0512
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 0x0000 0x0B0F
default 0x0511
endif
endif
menuconfig BSP_USING_ONCHIP_RTC
bool "Enable RTC"
select RT_USING_RTC
default n
if BSP_USING_ONCHIP_RTC
endif
menuconfig BSP_USING_SPI
bool "Enable SPI BUS"
default n
select RT_USING_SPI
if BSP_USING_SPI
config BSP_SPI_USING_DTC_DMA
bool "Enable SPI DTC transfers data without using the CPU."
default n
config BSP_USING_SPI0
bool "Enable SPI0 BUS"
default n
config BSP_USING_SPI1
bool "Enable SPI1 BUS"
default n
endif
menuconfig BSP_USING_ADC
bool "Enable ADC"
default n
select RT_USING_ADC
if BSP_USING_ADC
config BSP_USING_ADC0
bool "Enable ADC0"
default n
config BSP_USING_ADC1
bool "Enable ADC1"
default n
endif
menuconfig BSP_USING_DAC
bool "Enable DAC"
default n
select RT_USING_DAC
if BSP_USING_DAC
config BSP_USING_DAC0
bool "Enable DAC0"
default n
config BSP_USING_DAC1
bool "Enable DAC1"
default n
endif
menuconfig BSP_USING_PWM
bool "Enable PWM"
default n
select RT_USING_PWM
if BSP_USING_PWM
config BSP_USING_PWM0
bool "Enable GPT0 (32-Bits) output PWM"
default n
config BSP_USING_PWM1
bool "Enable GPT1 (32-Bits) output PWM"
default n
config BSP_USING_PWM2
bool "Enable GPT2 (32-Bits) output PWM"
default n
config BSP_USING_PWM3
bool "Enable GPT3 (32-Bits) output PWM"
default n
config BSP_USING_PWM4
bool "Enable GPT4 (16-Bits) output PWM"
default n
config BSP_USING_PWM5
bool "Enable GPT5 (16-Bits) output PWM"
default n
config BSP_USING_PWM6
bool "Enable GPT6 (16-Bits) output PWM"
default n
config BSP_USING_PWM7
bool "Enable GPT7 (16-Bits) output PWM"
default n
config BSP_USING_PWM8
bool "Enable GPT8 (16-Bits) output PWM"
default n
config BSP_USING_PWM9
bool "Enable GPT9 (16-Bits) output PWM"
default n
endif
endmenu
menu "Board extended module Drivers"

30
bsp/ra6m4-cpk/drivers/SConscript
View File

@@ -9,13 +9,41 @@ src = Split("""
drv_common.c
""")
if GetDepend(['RT_USING_SERIAL']):
if GetDepend(['BSP_USING_UART']):
if GetDepend(['RT_USING_SERIAL_V2']):
src += ['drv_usart_v2.c']
else:
print("\nThe current project does not support serial-v1\n")
Return('group')
if GetDepend(['BSP_USING_GPIO']):
src += ['drv_gpio.c']
if GetDepend(['BSP_USING_WDT']):
src += ['drv_wdt.c']
if GetDepend(['BSP_USING_ONCHIP_RTC']):
src += ['drv_rtc.c']
if GetDepend(['BSP_USING_I2C', 'RT_USING_I2C_BITOPS']):
if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1'):
src += ['drv_soft_i2c.c']
if GetDepend(['BSP_USING_SPI']):
src += ['drv_spi.c']
if GetDepend(['BSP_USING_ADC']):
src += ['drv_adc.c']
if GetDepend(['BSP_USING_DAC']):
src += ['drv_dac.c']
if GetDepend(['BSP_USING_ONCHIP_FLASH']):
src += ['drv_flash.c']
if GetDepend(['BSP_USING_PWM']):
src += ['drv_pwm.c']
path = [cwd]
path += [cwd + '/config']

12
bsp/ra6m4-cpk/drivers/config/drv_config.h
View File

@@ -21,6 +21,18 @@ extern "C" {
#ifdef SOC_SERIES_R7FA6M4AF
#include "ra6m4/uart_config.h"
#ifdef BSP_USING_ADC
#include "ra6m4/adc_config.h"
#endif
#ifdef BSP_USING_DAC
#include "ra6m4/dac_config.h"
#endif
#ifdef BSP_USING_PWM
#include "ra6m4/pwm_config.h"
#endif
#endif/* SOC_SERIES_R7FA6M4AF */
#ifdef __cplusplus

41
bsp/ra6m4-cpk/drivers/config/ra6m4/adc_config.h Normal file
View File

@@ -0,0 +1,41 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-08-19 Mr.Tiger first version
*/
#ifndef __ADC_CONFIG_H__
#define __ADC_CONFIG_H__
#include <rtthread.h>
#include <rtdevice.h>
#include "hal_data.h"
#ifdef __cplusplus
extern "C" {
#endif
#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
struct ra_adc_map
{
char name;
const adc_cfg_t *g_cfg;
const adc_instance_ctrl_t *g_ctrl;
const adc_channel_cfg_t *g_channel_cfg;
};
struct ra_dev
{
rt_adc_device_t ra_adc_device_t;
struct ra_adc_map *ra_adc_dev;
};
#endif
#endif
#ifdef __cplusplus
}
#endif

41
bsp/ra6m4-cpk/drivers/config/ra6m4/dac_config.h Normal file
View File

@@ -0,0 +1,41 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-08-19 Mr.Tiger first version
*/
#ifndef __DAC_CONFIG_H__
#define __DAC_CONFIG_H__
#include <rtthread.h>
#include <rtdevice.h>
#include "hal_data.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef BSP_USING_DAC
struct ra_dac_map
{
char name;
const struct st_dac_cfg *g_cfg;
const struct st_dac_instance_ctrl *g_ctrl;
};
struct ra_dac_dev
{
rt_dac_device_t ra_dac_device_t;
struct ra_dac_map *ra_dac_map_dev;
};
#endif
#endif
#ifdef __cplusplus
}
#endif

68
bsp/ra6m4-cpk/drivers/config/ra6m4/pwm_config.h Normal file
View File

@@ -0,0 +1,68 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-26 KevinXu first version
*/
#ifndef __PWM_CONFIG_H__
#define __PWM_CONFIG_H__
#include <rtthread.h>
#include <drv_config.h>
#include "hal_data.h"
#ifdef __cplusplus
extern "C" {
#endif
enum
{
#ifdef BSP_USING_PWM0
BSP_PWM0_INDEX,
#endif
#ifdef BSP_USING_PWM1
BSP_PWM1_INDEX,
#endif
#ifdef BSP_USING_PWM2
BSP_PWM2_INDEX,
#endif
#ifdef BSP_USING_PWM3
BSP_PWM3_INDEX,
#endif
#ifdef BSP_USING_PWM4
BSP_PWM4_INDEX,
#endif
#ifdef BSP_USING_PWM5
BSP_PWM5_INDEX,
#endif
#ifdef BSP_USING_PWM6
BSP_PWM6_INDEX,
#endif
#ifdef BSP_USING_PWM7
BSP_PWM7_INDEX,
#endif
#ifdef BSP_USING_PWM8
BSP_PWM8_INDEX,
#endif
#ifdef BSP_USING_PWM9
BSP_PWM9_INDEX,
#endif
BSP_PWMS_NUM
};
#define PWM_DRV_INITIALIZER(num) \
{ \
.name = "pwm"#num , \
.g_cfg = &g_timer##num##_cfg, \
.g_ctrl = &g_timer##num##_ctrl, \
.g_timer = &g_timer##num, \
}
#ifdef __cplusplus
}
#endif
#endif /* __PWM_CONFIG_H__ */

132
bsp/ra6m4-cpk/drivers/drv_adc.c Normal file
View File

@@ -0,0 +1,132 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-08-19 Mr.Tiger first version
*/
#include "drv_config.h"
#ifdef RT_USING_ADC
// #define DRV_DEBUG
#define DBG_TAG "drv.adc"
#ifdef DRV_DEBUG
#define DBG_LVL DBG_LOG
#else
#define DBG_LVL DBG_INFO
#endif /* DRV_DEBUG */
#include <rtdbg.h>
struct ra_adc_map ra_adc[] =
{
#if defined(BSP_USING_ADC0)
{'0', &g_adc0_cfg, &g_adc0_ctrl, &g_adc0_channel_cfg},
#endif
#if defined(BSP_USING_ADC1)
{'1', &g_adc1_cfg, &g_adc1_ctrl, &g_adc1_channel_cfg},
#endif
};
#if defined(BSP_USING_ADC0)
struct rt_adc_device adc0_device;
struct ra_dev _ra_adc0_device = {.ra_adc_device_t = &adc0_device, .ra_adc_dev = &ra_adc[0]};
#endif
#if defined(BSP_USING_ADC1)
struct rt_adc_device adc1_device;
struct ra_dev _ra_adc1_device = {.ra_adc_device_t = &adc1_device, .ra_adc_dev = &ra_adc[1]};
#endif
static rt_err_t ra_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
{
RT_ASSERT(device != RT_NULL);
struct ra_adc_map *adc = (struct ra_adc_map *)device->parent.user_data;
/**< start adc*/
if (enabled)
{
if (FSP_SUCCESS != R_ADC_ScanStart((adc_ctrl_t *)adc->g_ctrl))
{
LOG_E("start adc%c failed.", adc->name);
return -RT_ERROR;
}
}
else
{
/**< stop adc*/
if (FSP_SUCCESS != R_ADC_ScanStop((adc_ctrl_t *)adc->g_ctrl))
{
LOG_E("stop adc%c failed.", adc->name);
return -RT_ERROR;
}
}
return RT_EOK;
}
rt_err_t ra_adc_close(struct rt_adc_device *device)
{
RT_ASSERT(device != RT_NULL);
struct ra_adc_map *adc = (struct ra_adc_map *)(struct ra_adc_map *)device->parent.user_data;
if (FSP_SUCCESS != R_ADC_Close((adc_ctrl_t *)adc->g_ctrl))
{
LOG_E("close adc%c failed.", adc->name);
return -RT_ERROR;
}
return RT_EOK;
}
static rt_err_t ra_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
{
RT_ASSERT(device != RT_NULL);
struct ra_adc_map *adc = (struct ra_adc_map *)device->parent.user_data;
if (RT_EOK != R_ADC_Read32((adc_ctrl_t *)adc->g_ctrl, channel, value))
{
LOG_E("get adc value failed.\n");
return -RT_ERROR;
}
return RT_EOK;
}
static const struct rt_adc_ops ra_adc_ops =
{
.enabled = ra_adc_enabled,
.convert = ra_get_adc_value,
};
static int ra_adc_init(void)
{
#if defined(BSP_USING_ADC0)
R_ADC_Open((adc_ctrl_t *)_ra_adc0_device.ra_adc_dev->g_ctrl,
(adc_cfg_t const * const)_ra_adc0_device.ra_adc_dev->g_cfg);
R_ADC_ScanCfg((adc_ctrl_t *)_ra_adc0_device.ra_adc_dev->g_ctrl,
(adc_cfg_t const * const)_ra_adc0_device.ra_adc_dev->g_channel_cfg);
if (RT_EOK != rt_hw_adc_register(_ra_adc0_device.ra_adc_device_t, "adc0", &ra_adc_ops, (void *)_ra_adc0_device.ra_adc_dev))
{
LOG_E("adc0 register failed");
return -RT_ERROR;
}
#endif
#if defined(BSP_USING_ADC1)
R_ADC_Open((adc_ctrl_t *)_ra_adc1_device.ra_adc_dev->g_ctrl,
(adc_cfg_t const * const)_ra_adc1_device.ra_adc_dev->g_cfg);
R_ADC_ScanCfg((adc_ctrl_t *)_ra_adc1_device.ra_adc_dev->g_ctrl,
(adc_cfg_t const * const)_ra_adc1_device.ra_adc_dev->g_channel_cfg);
if (RT_EOK != rt_hw_adc_register(_ra_adc1_device.ra_adc_device_t, "adc1", &ra_adc_ops, (void *)_ra_adc1_device.ra_adc_dev))
{
LOG_E("adc1 register failed");
return -RT_ERROR;
}
#endif
return RT_EOK;
}
INIT_BOARD_EXPORT(ra_adc_init);
#endif

14
bsp/ra6m4-cpk/drivers/drv_common.c
View File

@@ -12,12 +12,16 @@
#include <bsp_api.h>
#include "board.h"
#ifdef RT_USING_SERIAL
#ifdef RT_USING_SERIAL_V2
#include <drv_usart_v2.h>
#else
#include <drv_usart.h>
#ifdef RT_USING_PIN
#include <drv_gpio.h>
#endif
#ifdef RT_USING_SERIAL
#ifdef RT_USING_SERIAL_V2
#include <drv_usart_v2.h>
#else
#include <drv_usart.h>
#endif
#endif
#ifdef RT_USING_FINSH

2
bsp/ra6m4-cpk/drivers/drv_common.h
View File

@@ -14,7 +14,7 @@
#include <rtthread.h>
#include <rthw.h>
#ifdef RT_USING_DEVICE
#include <rtdevice.h>
#include <rtdevice.h>
#endif
#ifdef __cplusplus

113
bsp/ra6m4-cpk/drivers/drv_dac.c Normal file
View File

@@ -0,0 +1,113 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-08-19 Mr.Tiger first version
*/
#include <rtthread.h>
#include "drv_config.h"
#ifdef RT_USING_DAC
//#define DRV_DEBUG
#define DBG_TAG "drv.dac"
#ifdef DRV_DEBUG
#define DBG_LVL DBG_LOG
#else
#define DBG_LVL DBG_INFO
#endif /* DRV_DEBUG */
#include <rtdbg.h>
struct ra_dac_map ra_dac[] =
{
#ifdef BSP_USING_DAC0
{'0', &g_dac0_cfg, &g_dac0_ctrl},
#endif
#ifdef BSP_USING_DAC1
{'1', &g_dac1_cfg, &g_dac1_ctrl},
#endif
};
#ifdef BSP_USING_DAC0
struct rt_dac_device dac0_device;
struct ra_dac_dev _ra_dac0_device = {.ra_dac_device_t = &dac0_device, .ra_dac_map_dev = &ra_dac[0]};
#endif
#ifdef BSP_USING_DAC1
struct rt_dac_device dac1_device;
struct ra_dac_dev _ra_dac1_device = {.ra_dac_device_t = &dac1_device, .ra_dac_map_dev = &ra_dac[1]};
#endif
rt_err_t ra_dac_disabled(struct rt_dac_device *device, rt_uint32_t channel)
{
RT_ASSERT(device != RT_NULL);
struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data;
if (FSP_SUCCESS != R_DAC_Stop((dac_ctrl_t *)dac->g_ctrl))
{
LOG_E("dac%c stop failed.", dac->name);
return -RT_ERROR;
}
return RT_EOK;
}
rt_err_t ra_dac_enabled(struct rt_dac_device *device, rt_uint32_t channel)
{
RT_ASSERT(device != RT_NULL);
struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data;
if (FSP_SUCCESS != R_DAC_Start((dac_ctrl_t *)dac->g_ctrl))
{
LOG_E("dac%c start failed.", dac->name);
return -RT_ERROR;
}
return RT_EOK;
}
rt_err_t ra_dac_write(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value)
{
RT_ASSERT(device != RT_NULL);
struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data;
if (FSP_SUCCESS != R_DAC_Write((dac_ctrl_t *)dac->g_ctrl, *value))
{
LOG_E("dac%c set value failed.", dac->name);
return -RT_ERROR;
}
return RT_EOK;
}
struct rt_dac_ops ra_dac_ops =
{
.disabled = ra_dac_disabled,
.enabled = ra_dac_enabled,
.convert = ra_dac_write,
};
static int ra_dac_init(void)
{
#ifdef BSP_USING_DAC0
_ra_dac0_device.ra_dac_device_t->ops = &ra_dac_ops;
R_DAC_Open((dac_ctrl_t *)_ra_dac0_device.ra_dac_map_dev->g_ctrl, (dac_cfg_t const *)_ra_dac0_device.ra_dac_map_dev->g_cfg);
if (FSP_SUCCESS != rt_hw_dac_register(_ra_dac0_device.ra_dac_device_t, "dac0", &ra_dac_ops, (void *)_ra_dac0_device.ra_dac_map_dev))
{
LOG_E("dac0 register failed");
return -RT_ERROR;
}
#endif
#ifdef BSP_USING_DAC1
_ra_dac1_device.ra_dac_device_t->ops = &ra_dac_ops;
R_DAC_Open((dac_ctrl_t *)_ra_dac1_device.ra_dac_map_dev->g_ctrl, (dac_cfg_t const *) _ra_dac1_device.ra_dac_map_dev->g_cfg);
if (FSP_SUCCESS != rt_hw_dac_register(_ra_dac1_device.ra_dac_device_t, "dac1", &ra_dac_ops, (void *)_ra_dac1_device.ra_dac_map_dev))
{
LOG_E("dac1 register failed");
return -RT_ERROR;
}
#endif
return RT_EOK;
}
INIT_DEVICE_EXPORT(ra_dac_init);
#endif

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