mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-03-27 17:45:13 +08:00
Merge branch 'master' of github.com:ShermanShao/rt-thread
This commit is contained in:
Sherman
586
bsp/ra6m4-cpk/.config
Normal file
586
bsp/ra6m4-cpk/.config
Normal file
File diff suppressed because it is too large
Load Diff
19
bsp/ra6m4-cpk/.settings/standalone.prefs
Normal file
19
bsp/ra6m4-cpk/.settings/standalone.prefs
Normal file
@@ -0,0 +1,19 @@
|
||||
#Mon Oct 11 16:20:05 CST 2021
|
||||
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#device\#\#\#\#3.1.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.1.0/all=1957950123,ra/fsp/inc/api/r_ioport_api.h|1390983687,ra/fsp/inc/instances/r_ioport.h|3204787724,ra/fsp/src/r_ioport/r_ioport.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.1.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra6m4_cpk\#\#\#\#3.1.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#device\#\#\#\#3.1.0/all=2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.1.0/all=3581546608,ra/fsp/inc/fsp_common_api.h|2247478812,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|1222394411,ra/fsp/src/bsp/mcu/all/bsp_io.c|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|1390983687,ra/fsp/inc/instances/r_ioport.h|496115995,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|3590501432,ra/fsp/src/bsp/mcu/all/bsp_io.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|905231975,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|1868795951,ra/fsp/inc/fsp_features.h|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|2966752275,ra/fsp/src/bsp/mcu/all/bsp_delay.c|3098075304,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|2556589544,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|2812024316,ra/fsp/src/bsp/mcu/all/bsp_common.h|1957950123,ra/fsp/inc/api/r_ioport_api.h|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|3520119047,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|2006974055,ra/fsp/inc/api/bsp_api.h|3819230577,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|3131094294,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|1982083345,ra/fsp/src/bsp/mcu/all/bsp_security.c|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|3366593968,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|4191472725,ra/fsp/inc/fsp_version.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.7.0+fsp.3.1.0/libraries=
|
||||
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=PinConfiguration
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.1.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#device\#\#R7FA6M4AF3CFB\#\#3.1.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.7.0+fsp.3.1.0/all=546157604,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|1078551279,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|1536854638,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|206980015,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|2024281644,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|4231934849,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|2748964184,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|377628369,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|637879414,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|4005730526,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|3589068132,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|3021372151,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|1562896660,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|2491522803,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|3602366610,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|3779323067,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|3442821435,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|2686445441,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.1.0/all=2349328507,ra/fsp/src/r_sci_uart/r_sci_uart.c|853178775,ra/fsp/inc/api/r_uart_api.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|1672784957,ra/fsp/inc/instances/r_sci_uart.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#fsp\#\#\#\#3.1.0/all=3571093944,ra/fsp/src/bsp/mcu/ra6m4/bsp_elc.h|2347061782,ra/fsp/src/bsp/mcu/ra6m4/bsp_mcu_info.h|3852442662,ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.1.0/libraries=
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.813326093=false
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra6m4_cpk\#\#\#\#3.1.0/all=3938710240,ra/board/ra6m4_cpk/board_leds.c|3343992478,ra/board/ra6m4_cpk/board.h|2525887392,ra/board/ra6m4_cpk/board_ethernet_phy.h|3559227370,ra/board/ra6m4_cpk/board_init.c|3843040667,ra/board/ra6m4_cpk/board_leds.h|2967196421,ra/board/ra6m4_cpk/board_init.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#fsp\#\#\#\#3.1.0/libraries=
|
||||
38
bsp/ra6m4-cpk/Kconfig
Normal file
38
bsp/ra6m4-cpk/Kconfig
Normal file
@@ -0,0 +1,38 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../.."
|
||||
|
||||
# you can change the RTT_ROOT default "../.." to your rtthread_root,
|
||||
# example : default "F:/git_repositories/rt-thread"
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
config ENV_DIR
|
||||
string
|
||||
option env="ENV_ROOT"
|
||||
default "/"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
source "$BSP_DIR/drivers/Kconfig"
|
||||
|
||||
config SOC_FAMILY_RENESAS
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_SERIES_R7FA6M4AF
|
||||
bool
|
||||
select ARCH_ARM_CORTEX_M4
|
||||
select SOC_FAMILY_RENESAS
|
||||
default y
|
||||
36
bsp/ra6m4-cpk/R7FA6M4AF3CFB.pincfg
Normal file
36
bsp/ra6m4-cpk/R7FA6M4AF3CFB.pincfg
Normal file
@@ -0,0 +1,36 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<v1:pinSettings xmlns:v1="http://www.tasking.com/schema/pinsettings/v1.1">
|
||||
<v1:pinMappingsRef version="2.05" file="" />
|
||||
<v1:deviceSetting id="renesas.ra6m4_fb" pattern="R7FA6M4****FB">
|
||||
<v1:packageSetting id="renesas.144lqfp" />
|
||||
</v1:deviceSetting>
|
||||
<v1:configSetting configurationId="debug0.mode" altId="debug0.mode.jtag" />
|
||||
<v1:configSetting configurationId="p108.gpio_mode" altId="p108.gpio_mode.gpio_mode_peripheral" />
|
||||
<v1:configSetting configurationId="p108" altId="p108.debug0.tms">
|
||||
<v1:connectionSetting altId="debug0.tms.p108" />
|
||||
</v1:configSetting>
|
||||
<v1:configSetting configurationId="debug0.tms" altId="debug0.tms.p108">
|
||||
<v1:connectionSetting altId="p108.debug0.tms" />
|
||||
</v1:configSetting>
|
||||
<v1:configSetting configurationId="p109.gpio_mode" altId="p109.gpio_mode.gpio_mode_peripheral" />
|
||||
<v1:configSetting configurationId="p109" altId="p109.debug0.tdo">
|
||||
<v1:connectionSetting altId="debug0.tdo.p109" />
|
||||
</v1:configSetting>
|
||||
<v1:configSetting configurationId="debug0.tdo" altId="debug0.tdo.p109">
|
||||
<v1:connectionSetting altId="p109.debug0.tdo" />
|
||||
</v1:configSetting>
|
||||
<v1:configSetting configurationId="p110.gpio_mode" altId="p110.gpio_mode.gpio_mode_peripheral" />
|
||||
<v1:configSetting configurationId="p110" altId="p110.debug0.tdi">
|
||||
<v1:connectionSetting altId="debug0.tdi.p110" />
|
||||
</v1:configSetting>
|
||||
<v1:configSetting configurationId="debug0.tdi" altId="debug0.tdi.p110">
|
||||
<v1:connectionSetting altId="p110.debug0.tdi" />
|
||||
</v1:configSetting>
|
||||
<v1:configSetting configurationId="p300.gpio_mode" altId="p300.gpio_mode.gpio_mode_peripheral" />
|
||||
<v1:configSetting configurationId="p300" altId="p300.debug0.tck">
|
||||
<v1:connectionSetting altId="debug0.tck.p300" />
|
||||
</v1:configSetting>
|
||||
<v1:configSetting configurationId="debug0.tck" altId="debug0.tck.p300">
|
||||
<v1:connectionSetting altId="p300.debug0.tck" />
|
||||
</v1:configSetting>
|
||||
</v1:pinSettings>
|
||||
156
bsp/ra6m4-cpk/README.md
Normal file
156
bsp/ra6m4-cpk/README.md
Normal file
@@ -0,0 +1,156 @@
|
||||
# STM32H750-artpi 开发板 BSP 说明
|
||||
|
||||
## 简介
|
||||
|
||||
本文档为瑞萨 CPK-RA6M4 开发板提供的 BSP (板级支持包) 说明。通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
|
||||
|
||||
主要内容如下：
|
||||
|
||||
- 开发板介绍
|
||||
- BSP 快速上手指南
|
||||
|
||||
## 开发板介绍
|
||||
|
||||
基于瑞萨 RA6M4 MCU 开发的 CPK-RA6M4 MCU 评估板，通过灵活配置软件包和 IDE，可帮助用户对 RA6M4 MCU 群组的特性轻松进行评估，并对嵌入系统应用程序进行开发。
|
||||
|
||||
开发板正面外观如下图：
|
||||
|
||||
|
||||
|
||||
该开发板常用 **板载资源** 如下：
|
||||
|
||||
- MCU：R7FA6M4AF3CFB，200MHz，Arm Cortex®-M33 内核，1MB 代码闪存, 256kB SRAM
|
||||
- 调试接口：板载 J-Link 接口
|
||||
- 扩展接口：两个 PMOD 连接器
|
||||
|
||||
**更多详细资料及工具**
|
||||
|
||||
|
||||
## 外设支持
|
||||
|
||||
本 BSP 目前对外设的支持情况如下：
|
||||
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| :----------- | :---------- | :------------------------ |
|
||||
| UART | 支持 | UART7 |
|
||||
| 持续更新中... | | |
|
||||
|
||||
|
||||
## 使用说明
|
||||
|
||||
使用说明分为如下两个章节：
|
||||
|
||||
- 快速上手
|
||||
|
||||
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
|
||||
|
||||
- 进阶使用
|
||||
|
||||
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
|
||||
|
||||
|
||||
### 快速上手
|
||||
|
||||
本 BSP 为目前仅为开发者提供 MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
|
||||
|
||||
**硬件连接**
|
||||
|
||||
使用 USB 数据线连接开发板到 PC。使用 USB 转串口工具连接 P613(TXD)、P614(RXD)。
|
||||
|
||||
**编译下载**
|
||||
|
||||
- 编译：双击 project.uvprojx 文件，打开 MDK5 工程，编译程序。
|
||||
|
||||
> 注意：此工程需要使用 J-Flash Lite 工具烧录程序。建议使用 V7.50 及以上版本烧录工程。[J-Link 下载链接](https://www.segger.com/downloads/jlink/)
|
||||
|
||||
- 下载：打开 J-Flash lite 工具，选择芯片信号 R7FA6M4AF，点击 OK 进入工具。选择 BSP 目录下 MDK 编译出的 /object/ra6m4.hex 文件，点击 Program Device 按钮开始烧录。具体操作过程可参考下图步骤：
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
**查看运行结果**
|
||||
|
||||
下载程序成功之后，系统会自动运行并打印系统信息。
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息。输入 help 命令可查看系统中支持的命令。
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 4.0.4 build Oct 11 2021
|
||||
2006 - 2021 Copyright by rt-thread team
|
||||
|
||||
asdasHello RT-Thread!
|
||||
msh >
|
||||
msh >help
|
||||
RT-Thread shell commands:
|
||||
reboot - Reboot System
|
||||
help - RT - Thread shell help.
|
||||
ps - List threads in the system.
|
||||
free - Show the memory usage in the system.
|
||||
hello - say hello world
|
||||
clear - clear the terminal screen
|
||||
version - show RT - Thread version information
|
||||
list_thread - list thread
|
||||
list_sem - list semaphore in system
|
||||
list_event - list event in system
|
||||
list_mutex - list mutex in system
|
||||
list_mailbox - list mail box in system
|
||||
list_msgqueue - list message queue in system
|
||||
list_timer - list timer in system
|
||||
list_device - list device in system
|
||||
list - list all commands in system
|
||||
|
||||
msh >
|
||||
```
|
||||
### 进阶使用
|
||||
|
||||
**ENV 配置**
|
||||
|
||||
- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
|
||||
|
||||
此 BSP 默认只开启了 串口7 的功能，如果需使用更多高级功能例如组件、软件包等，需要利用 ENV 工具进行配置。步骤如下：
|
||||
|
||||
1. 在 bsp 下打开 env 工具。
|
||||
|
||||
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
|
||||
|
||||
3. 输入`pkgs --update`命令更新软件包。
|
||||
|
||||
4. 输入`scons --target=mdk5` 命令重新生成工程。
|
||||
|
||||
**FSP 配置**
|
||||
|
||||
如果需要修改瑞萨的 BSP 外设配置或者需要添加新的外设端口，需要用到瑞萨的 FSP 配置工具。
|
||||
|
||||
1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp)
|
||||
2. 下载安装完成后，需要添加这款开发板的官方[CPK-RA6M4板级支持包](https://www2.renesas.cn/document/sws/1527176?language=zh&r=1527191)
|
||||
3. 如何将BSP配置包添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191)
|
||||
4. 在 MDK 中添加自定义命名来打开当前工程的配置详细步骤，请查看文档： [使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)
|
||||
|
||||
## 更多资料及文档
|
||||
|
||||
- [开发板官网主页](https://www2.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/cpk-ra6m4-evaluation-board)
|
||||
|
||||
- [开发板用户手册](https://www2.renesas.cn/cn/zh/document/mah/1527156?language=zh&r=1527191)
|
||||
|
||||
- [瑞萨RA MCU 基础知识](https://www2.renesas.cn/cn/zh/document/gde/1520091)
|
||||
|
||||
- [RA6 MCU 快速设计指南](https://www2.renesas.cn/cn/zh/document/apn/ra6-quick-design-guide)
|
||||
|
||||
- [RA6M4_datasheet](https://www2.renesas.cn/cn/zh/document/dst/ra6m4-group-datasheet)
|
||||
|
||||
- [RA6M4 Group User’s Manual: Hardware](https://www2.renesas.cn/cn/zh/document/man/ra6m4-group-user-s-manual-hardware)
|
||||
|
||||
## 联系人信息
|
||||
|
||||
在使用过程中若您有任何的想法和建议，建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/)
|
||||
|
||||
## 贡献代码
|
||||
|
||||
如果您对 CPK-RA6M4 感兴趣，并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码，您可以参考 [向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github) 。
|
||||
14
bsp/ra6m4-cpk/SConscript
Normal file
14
bsp/ra6m4-cpk/SConscript
Normal file
@@ -0,0 +1,14 @@
|
||||
# for module compiling
|
||||
import os
|
||||
Import('RTT_ROOT')
|
||||
|
||||
cwd = str(Dir('#'))
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
40
bsp/ra6m4-cpk/SConstruct
Normal file
40
bsp/ra6m4-cpk/SConstruct
Normal file
@@ -0,0 +1,40 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
142
bsp/ra6m4-cpk/buildinfo.gpdsc
Normal file
142
bsp/ra6m4-cpk/buildinfo.gpdsc
Normal file
@@ -0,0 +1,142 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<package xmlns:xs="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<vendor>Renesas</vendor>
|
||||
<name>Project Content</name>
|
||||
<description>Project content managed by the Renesas Smart Configurator</description>
|
||||
<url/>
|
||||
<releases>
|
||||
<release version="1.0.0"/>
|
||||
</releases>
|
||||
<generators>
|
||||
<generator id="Renesas RA Smart Configurator">
|
||||
<project_files>
|
||||
<file category="include" name="src/"/>
|
||||
<file category="source" name="src/hal_entry.c"/>
|
||||
<file category="other" name="src/SConscript"/>
|
||||
</project_files>
|
||||
</generator>
|
||||
</generators>
|
||||
<components generator="Renesas RA Smart Configurator">
|
||||
<component Cclass="Flex Software" Cgroup="Components" Csub="ra">
|
||||
<files>
|
||||
<file category="include" name="ra/arm/CMSIS_5/CMSIS/Core/Include/"/>
|
||||
<file category="include" name="ra/fsp/inc/"/>
|
||||
<file category="include" name="ra/fsp/inc/api/"/>
|
||||
<file category="include" name="ra/fsp/inc/instances/"/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h" path=""/>
|
||||
<file category="other" name="ra/arm/CMSIS_5/LICENSE.txt"/>
|
||||
<file category="header" name="ra/board/ra6m4_cpk/board.h" path=""/>
|
||||
<file category="header" name="ra/board/ra6m4_cpk/board_ethernet_phy.h" path=""/>
|
||||
<file category="source" name="ra/board/ra6m4_cpk/board_init.c"/>
|
||||
<file category="header" name="ra/board/ra6m4_cpk/board_init.h" path=""/>
|
||||
<file category="source" name="ra/board/ra6m4_cpk/board_leds.c"/>
|
||||
<file category="header" name="ra/board/ra6m4_cpk/board_leds.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/bsp_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_ioport_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_transfer_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_uart_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_common_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_features.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_version.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_ioport.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_sci_uart.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_common.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_common.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_delay.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_delay.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_guard.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_guard.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_io.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_io.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_irq.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_module_stop.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_security.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_security.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m4/bsp_elc.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m4/bsp_mcu_info.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/r_ioport/r_ioport.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_sci_uart/r_sci_uart.c"/>
|
||||
<file category="other" name="ra/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Build Configuration">
|
||||
<files>
|
||||
<file category="include" name="ra_cfg/fsp_cfg/"/>
|
||||
<file category="include" name="ra_cfg/fsp_cfg/bsp/"/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/board_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_family_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_pin_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_ioport_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_sci_uart_cfg.h" path=""/>
|
||||
<file category="other" name="ra_cfg/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Generated Data">
|
||||
<files>
|
||||
<file category="include" name="ra_gen/"/>
|
||||
<file category="header" name="ra_gen/bsp_clock_cfg.h" path=""/>
|
||||
<file category="source" name="ra_gen/common_data.c"/>
|
||||
<file category="header" name="ra_gen/common_data.h" path=""/>
|
||||
<file category="source" name="ra_gen/hal_data.c"/>
|
||||
<file category="header" name="ra_gen/hal_data.h" path=""/>
|
||||
<file category="source" name="ra_gen/main.c"/>
|
||||
<file category="source" name="ra_gen/pin_data.c"/>
|
||||
<file category="other" name="ra_gen/SConscript"/>
|
||||
<file category="source" name="ra_gen/vector_data.c"/>
|
||||
<file category="header" name="ra_gen/vector_data.h" path=""/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Linker Script">
|
||||
<files>
|
||||
<file category="linkerScript" name="script/fsp.scat"/>
|
||||
<file category="other" name="script/ac6/fsp_keep.via"/>
|
||||
</files>
|
||||
</component>
|
||||
</components>
|
||||
</package>
|
||||
475
bsp/ra6m4-cpk/configuration.xml
Normal file
475
bsp/ra6m4-cpk/configuration.xml
Normal file
@@ -0,0 +1,475 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<raConfiguration version="6">
|
||||
<generalSettings>
|
||||
<option key="#Board#" value="board.ra6m4cpk"/>
|
||||
<option key="CPU" value="RA6M4"/>
|
||||
<option key="#TargetName#" value="R7FA6M4AF3CFB"/>
|
||||
<option key="#TargetARCHITECTURE#" value="cortex-m33"/>
|
||||
<option key="#DeviceCommand#" value="R7FA6M4AF"/>
|
||||
<option key="#RTOS#" value="_none"/>
|
||||
<option key="#pinconfiguration#" value="R7FA6M4AF3CFB.pincfg"/>
|
||||
<option key="#FSPVersion#" value="3.1.0"/>
|
||||
<option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra6m4_cpk##"/>
|
||||
<option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
|
||||
</generalSettings>
|
||||
<raBspConfiguration>
|
||||
<config id="config.bsp.ra6m4.R7FA6M4AF3CFB">
|
||||
<property id="config.bsp.part_number" value="config.bsp.part_number.value"/>
|
||||
<property id="config.bsp.rom_size_bytes" value="config.bsp.rom_size_bytes.value"/>
|
||||
<property id="config.bsp.rom_size_bytes_hidden" value="1048576"/>
|
||||
<property id="config.bsp.ram_size_bytes" value="config.bsp.ram_size_bytes.value"/>
|
||||
<property id="config.bsp.data_flash_size_bytes" value="config.bsp.data_flash_size_bytes.value"/>
|
||||
<property id="config.bsp.package_style" value="config.bsp.package_style.value"/>
|
||||
<property id="config.bsp.package_pins" value="config.bsp.package_pins.value"/>
|
||||
</config>
|
||||
<config id="config.bsp.ra6m4">
|
||||
<property id="config.bsp.series" value="config.bsp.series.value"/>
|
||||
</config>
|
||||
<config id="config.bsp.ra6m4.fsp">
|
||||
<property id="config.bsp.fsp.tz.exception_response" value="config.bsp.fsp.tz.exception_response.nmi"/>
|
||||
<property id="config.bsp.fsp.tz.cmsis.bfhfnmins" value="config.bsp.fsp.tz.cmsis.bfhfnmins.secure"/>
|
||||
<property id="config.bsp.fsp.tz.cmsis.sysresetreqs" value="config.bsp.fsp.tz.cmsis.sysresetreqs.secure_only"/>
|
||||
<property id="config.bsp.fsp.tz.cmsis.s_priority_boost" value="config.bsp.fsp.tz.cmsis.s_priority_boost.disabled"/>
|
||||
<property id="config.bsp.fsp.tz.csar" value="config.bsp.fsp.tz.csar.both"/>
|
||||
<property id="config.bsp.fsp.tz.rstsar" value="config.bsp.fsp.tz.rstsar.both"/>
|
||||
<property id="config.bsp.fsp.tz.bbfsar" value="config.bsp.fsp.tz.bbfsar.both"/>
|
||||
<property id="config.bsp.fsp.tz.sramsar.sramprcr" value="config.bsp.fsp.tz.sramsar.sramprcr.both"/>
|
||||
<property id="config.bsp.fsp.tz.sramsar.sramecc" value="config.bsp.fsp.tz.sramsar.sramecc.both"/>
|
||||
<property id="config.bsp.fsp.tz.stbramsar" value="config.bsp.fsp.tz.stbramsar.both"/>
|
||||
<property id="config.bsp.fsp.tz.bussara" value="config.bsp.fsp.tz.bussara.both"/>
|
||||
<property id="config.bsp.fsp.tz.bussarb" value="config.bsp.fsp.tz.bussarb.both"/>
|
||||
<property id="config.bsp.fsp.cache_line_size" value="config.bsp.fsp.cache_line_size.32"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_start_mode" value="config.bsp.fsp.OFS0.iwdt_start_mode.disabled"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_timeout" value="config.bsp.fsp.OFS0.iwdt_timeout.2048"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_divisor" value="config.bsp.fsp.OFS0.iwdt_divisor.128"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_window_end" value="config.bsp.fsp.OFS0.iwdt_window_end.0"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_window_start" value="config.bsp.fsp.OFS0.iwdt_window_start.100"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_reset_interrupt" value="config.bsp.fsp.OFS0.iwdt_reset_interrupt.Reset"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_stop_control" value="config.bsp.fsp.OFS0.iwdt_stop_control.stops"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_start_mode" value="config.bsp.fsp.OFS0.wdt_start_mode.register"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_timeout" value="config.bsp.fsp.OFS0.wdt_timeout.16384"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_divisor" value="config.bsp.fsp.OFS0.wdt_divisor.128"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_window_end" value="config.bsp.fsp.OFS0.wdt_window_end.0"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_window_start" value="config.bsp.fsp.OFS0.wdt_window_start.100"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_reset_interrupt" value="config.bsp.fsp.OFS0.wdt_reset_interrupt.Reset"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_stop_control" value="config.bsp.fsp.OFS0.wdt_stop_control.stops"/>
|
||||
<property id="config.bsp.fsp.OFS1.voltage_detection0.start" value="config.bsp.fsp.OFS1.voltage_detection0.start.disabled"/>
|
||||
<property id="config.bsp.fsp.OFS1.voltage_detection0_level" value="config.bsp.fsp.OFS1.voltage_detection0_level.280"/>
|
||||
<property id="config.bsp.fsp.OFS1.hoco_osc" value="config.bsp.fsp.OFS1.hoco_osc.disabled"/>
|
||||
<property id="config.bsp.fsp.BPS.BPS0" value=""/>
|
||||
<property id="config.bsp.fsp.BPS.BPS1" value=""/>
|
||||
<property id="config.bsp.fsp.BPS.BPS2" value=""/>
|
||||
<property id="config.bsp.fsp.PBPS.PBPS0" value=""/>
|
||||
<property id="config.bsp.fsp.PBPS.PBPS1" value=""/>
|
||||
<property id="config.bsp.fsp.PBPS.PBPS2" value=""/>
|
||||
<property id="config.bsp.fsp.dual_bank" value="config.bsp.fsp.dual_bank.disabled"/>
|
||||
<property id="config.bsp.fsp.hoco_fll" value="config.bsp.fsp.hoco_fll.disabled"/>
|
||||
<property id="config.bsp.common.main_osc_wait" value="config.bsp.common.main_osc_wait.wait_8163"/>
|
||||
<property id="config.bsp.fsp.mcu.adc.max_freq_hz" value="50000000"/>
|
||||
<property id="config.bsp.fsp.mcu.sci_uart.max_baud" value="20000000"/>
|
||||
<property id="config.bsp.fsp.mcu.adc.sample_and_hold" value="0"/>
|
||||
<property id="config.bsp.fsp.mcu.sci_spi.max_bitrate" value="25000000"/>
|
||||
<property id="config.bsp.fsp.mcu.spi.max_bitrate" value="50000000"/>
|
||||
<property id="config.bsp.fsp.mcu.iic_master.rate.rate_fastplus" value="1"/>
|
||||
</config>
|
||||
<config id="config.bsp.ra">
|
||||
<property id="config.bsp.common.main" value="0x400"/>
|
||||
<property id="config.bsp.common.heap" value="0"/>
|
||||
<property id="config.bsp.common.vcc" value="3300"/>
|
||||
<property id="config.bsp.common.checking" value="config.bsp.common.checking.disabled"/>
|
||||
<property id="config.bsp.common.assert" value="config.bsp.common.assert.none"/>
|
||||
<property id="config.bsp.common.error_log" value="config.bsp.common.error_log.none"/>
|
||||
<property id="config.bsp.common.soft_reset" value="config.bsp.common.soft_reset.disabled"/>
|
||||
<property id="config.bsp.common.main_osc_populated" value="config.bsp.common.main_osc_populated.enabled"/>
|
||||
<property id="config.bsp.common.pfs_protect" value="config.bsp.common.pfs_protect.enabled"/>
|
||||
<property id="config.bsp.common.c_runtime_init" value="config.bsp.common.c_runtime_init.enabled"/>
|
||||
<property id="config.bsp.common.main_osc_clock_source" value="config.bsp.common.main_osc_clock_source.crystal"/>
|
||||
<property id="config.bsp.common.subclock_populated" value="config.bsp.common.subclock_populated.enabled"/>
|
||||
<property id="config.bsp.common.subclock_drive" value="config.bsp.common.subclock_drive.standard"/>
|
||||
<property id="config.bsp.common.subclock_stabilization_ms" value="1000"/>
|
||||
</config>
|
||||
</raBspConfiguration>
|
||||
<raClockConfiguration>
|
||||
<node id="board.clock.xtal.freq" mul="24000000" option="_edit"/>
|
||||
<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.20m"/>
|
||||
<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
|
||||
<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
|
||||
<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
|
||||
<node id="board.clock.pll.source" option="board.clock.pll.source.hoco"/>
|
||||
<node id="board.clock.pll.div" option="board.clock.pll.div.2"/>
|
||||
<node id="board.clock.pll.mul" option="board.clock.pll.mul.200"/>
|
||||
<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
|
||||
<node id="board.clock.pll2.source" option="board.clock.pll2.source.disabled"/>
|
||||
<node id="board.clock.pll2.div" option="board.clock.pll2.div.2"/>
|
||||
<node id="board.clock.pll2.mul" option="board.clock.pll2.mul.200"/>
|
||||
<node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
|
||||
<node id="board.clock.clock.source" option="board.clock.clock.source.pll"/>
|
||||
<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
|
||||
<node id="board.clock.uclk.source" option="board.clock.uclk.source.disabled"/>
|
||||
<node id="board.clock.octaspiclk.source" option="board.clock.octaspiclk.source.disabled"/>
|
||||
<node id="board.clock.iclk.div" option="board.clock.iclk.div.1"/>
|
||||
<node id="board.clock.pclka.div" option="board.clock.pclka.div.2"/>
|
||||
<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.4"/>
|
||||
<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.4"/>
|
||||
<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.2"/>
|
||||
<node id="board.clock.bclk.div" option="board.clock.bclk.div.2"/>
|
||||
<node id="board.clock.bclkout.div" option="board.clock.bclkout.div.2"/>
|
||||
<node id="board.clock.fclk.div" option="board.clock.fclk.div.4"/>
|
||||
<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
|
||||
<node id="board.clock.uclk.div" option="board.clock.uclk.div.5"/>
|
||||
<node id="board.clock.octaspiclk.div" option="board.clock.octaspiclk.div.1"/>
|
||||
<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
|
||||
<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
|
||||
<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
|
||||
<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
|
||||
<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
|
||||
<node id="board.clock.bclk.display" option="board.clock.bclk.display.value"/>
|
||||
<node id="board.clock.bclkout.display" option="board.clock.bclkout.display.value"/>
|
||||
<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
|
||||
<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
|
||||
<node id="board.clock.uclk.display" option="board.clock.uclk.display.value"/>
|
||||
<node id="board.clock.octaspiclk.display" option="board.clock.octaspiclk.display.value"/>
|
||||
</raClockConfiguration>
|
||||
<raComponentSelection>
|
||||
<component apiversion="" class="Common" condition="" group="all" subgroup="fsp_common" variant="" vendor="Renesas" version="3.1.0">
|
||||
<description>Board Support Package Common Files</description>
|
||||
<originalPack>Renesas.RA.3.1.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_ioport" variant="" vendor="Renesas" version="3.1.0">
|
||||
<description>I/O Port</description>
|
||||
<originalPack>Renesas.RA.3.1.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="CMSIS" condition="" group="CMSIS5" subgroup="CoreM" variant="" vendor="Arm" version="5.7.0+fsp.3.1.0">
|
||||
<description>Arm CMSIS Version 5 - Core (M)</description>
|
||||
<originalPack>Arm.CMSIS5.5.7.0+fsp.3.1.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="BSP" condition="" group="Board" subgroup="ra6m4_cpk" variant="" vendor="Renesas" version="3.1.0">
|
||||
<description>RA6M4-CPK Board Support Files</description>
|
||||
<originalPack>Renesas.RA_board_ra6m4_cpk.3.1.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="BSP" condition="" group="ra6m4" subgroup="device" variant="R7FA6M4AF3CFB" vendor="Renesas" version="3.1.0">
|
||||
<description>Board support package for R7FA6M4AF3CFB</description>
|
||||
<originalPack>Renesas.RA_mcu_ra6m4.3.1.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="BSP" condition="" group="ra6m4" subgroup="device" variant="" vendor="Renesas" version="3.1.0">
|
||||
<description>Board support package for RA6M4</description>
|
||||
<originalPack>Renesas.RA_mcu_ra6m4.3.1.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="BSP" condition="" group="ra6m4" subgroup="fsp" variant="" vendor="Renesas" version="3.1.0">
|
||||
<description>Board support package for RA6M4 - FSP Data</description>
|
||||
<originalPack>Renesas.RA_mcu_ra6m4.3.1.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_sci_uart" variant="" vendor="Renesas" version="3.1.0">
|
||||
<description>SCI UART</description>
|
||||
<originalPack>Renesas.RA.3.1.0.pack</originalPack>
|
||||
</component>
|
||||
</raComponentSelection>
|
||||
<raElcConfiguration/>
|
||||
<raIcuConfiguration/>
|
||||
<raModuleConfiguration>
|
||||
<module id="module.driver.ioport_on_ioport.0">
|
||||
<property id="module.driver.ioport.name" value="g_ioport"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioport1" value="_disabled"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioport2" value="_disabled"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioport3" value="_disabled"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioport4" value="_disabled"/>
|
||||
</module>
|
||||
<module id="module.driver.uart_on_sci_uart.813326093">
|
||||
<property id="module.driver.uart.name" value="g_uart7"/>
|
||||
<property id="module.driver.uart.channel" value="7"/>
|
||||
<property id="module.driver.uart.data_bits" value="module.driver.uart.data_bits.data_bits_8"/>
|
||||
<property id="module.driver.uart.parity" value="module.driver.uart.parity.parity_off"/>
|
||||
<property id="module.driver.uart.stop_bits" value="module.driver.uart.stop_bits.stop_bits_1"/>
|
||||
<property id="module.driver.uart.baud" value="115200"/>
|
||||
<property id="module.driver.uart.baudrate_modulation" value="module.driver.uart.baudrate_modulation.disabled"/>
|
||||
<property id="module.driver.uart.baudrate_max_err" value="5"/>
|
||||
<property id="module.driver.uart.flow_control" value="module.driver.uart.flow_control.rts"/>
|
||||
<property id="module.driver.uart.pin_control_port" value="module.driver.uart.pin_control_port.PORT_DISABLE"/>
|
||||
<property id="module.driver.uart.pin_control_pin" value="module.driver.uart.pin_control_pin.PIN_DISABLE"/>
|
||||
<property id="module.driver.uart.clk_src" value="module.driver.uart.clk_src.int_clk"/>
|
||||
<property id="module.driver.uart.rx_edge_start" value="module.driver.uart.rx_edge_start.falling_edge"/>
|
||||
<property id="module.driver.uart.noisecancel_en" value="module.driver.uart.noisecancel_en.disabled"/>
|
||||
<property id="module.driver.uart.rx_fifo_trigger" value="module.driver.uart.rx_fifo_trigger.max"/>
|
||||
<property id="module.driver.uart.callback" value="uart7_isr_cb"/>
|
||||
<property id="module.driver.uart.rxi_ipl" value="board.icu.common.irq.priority12"/>
|
||||
<property id="module.driver.uart.txi_ipl" value="board.icu.common.irq.priority12"/>
|
||||
<property id="module.driver.uart.tei_ipl" value="board.icu.common.irq.priority12"/>
|
||||
<property id="module.driver.uart.eri_ipl" value="board.icu.common.irq.priority12"/>
|
||||
</module>
|
||||
<context id="_hal.0">
|
||||
<stack module="module.driver.ioport_on_ioport.0"/>
|
||||
<stack module="module.driver.uart_on_sci_uart.813326093"/>
|
||||
</context>
|
||||
<config id="config.driver.ioport">
|
||||
<property id="config.driver.ioport.checking" value="config.driver.ioport.checking.system"/>
|
||||
</config>
|
||||
<config id="config.driver.sci_uart">
|
||||
<property id="config.driver.sci_uart.param_checking_enable" value="config.driver.sci_uart.param_checking_enable.bsp"/>
|
||||
<property id="config.driver.sci_uart.fifo_support" value="config.driver.sci_uart.fifo_support.disabled"/>
|
||||
<property id="config.driver.sci_uart.dtc_support" value="config.driver.sci_uart.dtc_support.disabled"/>
|
||||
<property id="config.driver.sci_uart.flow_control" value="config.driver.sci_uart.flow_control.disabled"/>
|
||||
</config>
|
||||
</raModuleConfiguration>
|
||||
<raPinConfiguration>
|
||||
<symbolicName propertyId="p000.symbolic_name" value="ARDUINO_AN00"/>
|
||||
<symbolicName propertyId="p001.symbolic_name" value="ARDUINO_AN01"/>
|
||||
<symbolicName propertyId="p002.symbolic_name" value="ARDUINO_AN02"/>
|
||||
<symbolicName propertyId="p003.symbolic_name" value="ARDUINO_AN03"/>
|
||||
<symbolicName propertyId="p004.symbolic_name" value="ARDUINO_AN04"/>
|
||||
<symbolicName propertyId="p005.symbolic_name" value="ARDUINO_AN05"/>
|
||||
<symbolicName propertyId="p006.symbolic_name" value="PMODA_IRQ11"/>
|
||||
<symbolicName propertyId="p007.symbolic_name" value="J4_PIN23"/>
|
||||
<symbolicName propertyId="p008.symbolic_name" value="PMODA_IO1"/>
|
||||
<symbolicName propertyId="p009.symbolic_name" value="J4_PIN26"/>
|
||||
<symbolicName propertyId="p014.symbolic_name" value="PMODA_IO2"/>
|
||||
<symbolicName propertyId="p015.symbolic_name" value="PMODA_IO3"/>
|
||||
<symbolicName propertyId="p100.symbolic_name" value="J1_PIN1"/>
|
||||
<symbolicName propertyId="p101.symbolic_name" value="J2_PIN4"/>
|
||||
<symbolicName propertyId="p102.symbolic_name" value="J2_PIN6"/>
|
||||
<symbolicName propertyId="p103.symbolic_name" value="J1_PIN29"/>
|
||||
<symbolicName propertyId="p104.symbolic_name" value="J3_PIN39"/>
|
||||
<symbolicName propertyId="p105.symbolic_name" value="SW1"/>
|
||||
<symbolicName propertyId="p106.symbolic_name" value="LED3"/>
|
||||
<symbolicName propertyId="p107.symbolic_name" value="J3_PIN37"/>
|
||||
<symbolicName propertyId="p108.symbolic_name" value="DEBUG_SWDIO_TMS"/>
|
||||
<symbolicName propertyId="p109.symbolic_name" value="DEBUG_TDO"/>
|
||||
<symbolicName propertyId="p110.symbolic_name" value="DEBUG_TDI"/>
|
||||
<symbolicName propertyId="p111.symbolic_name" value="J1_PIN33"/>
|
||||
<symbolicName propertyId="p112.symbolic_name" value="J3_PIN15"/>
|
||||
<symbolicName propertyId="p113.symbolic_name" value="J3_PIN16"/>
|
||||
<symbolicName propertyId="p114.symbolic_name" value="J3_PIN17"/>
|
||||
<symbolicName propertyId="p115.symbolic_name" value="J3_PIN18"/>
|
||||
<symbolicName propertyId="p200.symbolic_name" value="NMI"/>
|
||||
<symbolicName propertyId="p201.symbolic_name" value="MD"/>
|
||||
<symbolicName propertyId="p202.symbolic_name" value="PMODA_MISO_RXD9"/>
|
||||
<symbolicName propertyId="p203.symbolic_name" value="PMODA_MOSI_TXD9"/>
|
||||
<symbolicName propertyId="p204.symbolic_name" value="PMODA_RSPCK"/>
|
||||
<symbolicName propertyId="p205.symbolic_name" value="PMODA_SSL_CTS9"/>
|
||||
<symbolicName propertyId="p206.symbolic_name" value="J1_PIN3"/>
|
||||
<symbolicName propertyId="p207.symbolic_name" value="J1_PIN8"/>
|
||||
<symbolicName propertyId="p208.symbolic_name" value="J1_PIN32"/>
|
||||
<symbolicName propertyId="p209.symbolic_name" value="J1_PIN30"/>
|
||||
<symbolicName propertyId="p210.symbolic_name" value="J1_PIN28"/>
|
||||
<symbolicName propertyId="p211.symbolic_name" value="J1_PIN22"/>
|
||||
<symbolicName propertyId="p212.symbolic_name" value="EXTAL"/>
|
||||
<symbolicName propertyId="p213.symbolic_name" value="XTAL"/>
|
||||
<symbolicName propertyId="p214.symbolic_name" value="J1_PIN20"/>
|
||||
<symbolicName propertyId="p300.symbolic_name" value="DEBUG_SWDCLK_TCK"/>
|
||||
<symbolicName propertyId="p301.symbolic_name" value="J1_PIN11"/>
|
||||
<symbolicName propertyId="p302.symbolic_name" value="J3_PIN14"/>
|
||||
<symbolicName propertyId="p303.symbolic_name" value="J3_PIN13"/>
|
||||
<symbolicName propertyId="p304.symbolic_name" value="J3_PIN12"/>
|
||||
<symbolicName propertyId="p305.symbolic_name" value="J3_PIN11"/>
|
||||
<symbolicName propertyId="p306.symbolic_name" value="J3_PIN10"/>
|
||||
<symbolicName propertyId="p307.symbolic_name" value="J3_PIN9"/>
|
||||
<symbolicName propertyId="p308.symbolic_name" value="J3_PIN8"/>
|
||||
<symbolicName propertyId="p309.symbolic_name" value="J3_PIN7"/>
|
||||
<symbolicName propertyId="p310.symbolic_name" value="J3_PIN6"/>
|
||||
<symbolicName propertyId="p311.symbolic_name" value="J3_PIN5"/>
|
||||
<symbolicName propertyId="p312.symbolic_name" value="J3_PIN4"/>
|
||||
<symbolicName propertyId="p313.symbolic_name" value="J1_PIN14"/>
|
||||
<symbolicName propertyId="p400.symbolic_name" value="J4_PIN13"/>
|
||||
<symbolicName propertyId="p401.symbolic_name" value="J4_PIN11"/>
|
||||
<symbolicName propertyId="p402.symbolic_name" value="J1_PIN27"/>
|
||||
<symbolicName propertyId="p403.symbolic_name" value="J4_PIN2"/>
|
||||
<symbolicName propertyId="p404.symbolic_name" value="J4_PIN4"/>
|
||||
<symbolicName propertyId="p405.symbolic_name" value="J4_PIN6"/>
|
||||
<symbolicName propertyId="p406.symbolic_name" value="J4_PIN8"/>
|
||||
<symbolicName propertyId="p407.symbolic_name" value="USB_VBUS_DETECT"/>
|
||||
<symbolicName propertyId="p408.symbolic_name" value="J2_PIN16"/>
|
||||
<symbolicName propertyId="p409.symbolic_name" value="J2_PIN18"/>
|
||||
<symbolicName propertyId="p410.symbolic_name" value="PMODB_MISO_RXD0"/>
|
||||
<symbolicName propertyId="p411.symbolic_name" value="PMODB_MOSI_TXD0"/>
|
||||
<symbolicName propertyId="p412.symbolic_name" value="PMODB_RSPCK"/>
|
||||
<symbolicName propertyId="p413.symbolic_name" value="PMODB_SSL_CTS0"/>
|
||||
<symbolicName propertyId="p414.symbolic_name" value="ARDUINO_RST"/>
|
||||
<symbolicName propertyId="p415.symbolic_name" value="PMODB_IO1"/>
|
||||
<symbolicName propertyId="p500.symbolic_name" value="USB_VBUS_EN"/>
|
||||
<symbolicName propertyId="p501.symbolic_name" value="USB_OC"/>
|
||||
<symbolicName propertyId="p502.symbolic_name" value="J4_PIN16"/>
|
||||
<symbolicName propertyId="p503.symbolic_name" value="PMODB_IO2"/>
|
||||
<symbolicName propertyId="p504.symbolic_name" value="PMODB_IO3"/>
|
||||
<symbolicName propertyId="p505.symbolic_name" value="DLS_IRQ14"/>
|
||||
<symbolicName propertyId="p506.symbolic_name" value="PMODB_IRQ15"/>
|
||||
<symbolicName propertyId="p507.symbolic_name" value="J4_PIN24"/>
|
||||
<symbolicName propertyId="p511.symbolic_name" value="DLS_SDA"/>
|
||||
<symbolicName propertyId="p512.symbolic_name" value="DLS_SCL"/>
|
||||
<symbolicName propertyId="p600.symbolic_name" value="J1_PIN23"/>
|
||||
<symbolicName propertyId="p601.symbolic_name" value="J1_PIN19"/>
|
||||
<symbolicName propertyId="p602.symbolic_name" value="J1_PIN21"/>
|
||||
<symbolicName propertyId="p603.symbolic_name" value="J1_PIN25"/>
|
||||
<symbolicName propertyId="p604.symbolic_name" value="J3_PIN36"/>
|
||||
<symbolicName propertyId="p605.symbolic_name" value="J3_PIN35"/>
|
||||
<symbolicName propertyId="p608.symbolic_name" value="J3_PIN19"/>
|
||||
<symbolicName propertyId="p609.symbolic_name" value="J3_PIN20"/>
|
||||
<symbolicName propertyId="p610.symbolic_name" value="J3_PIN21"/>
|
||||
<symbolicName propertyId="p611.symbolic_name" value="ARDUINO_GPIO_CLK"/>
|
||||
<symbolicName propertyId="p612.symbolic_name" value="J3_PIN23"/>
|
||||
<symbolicName propertyId="p613.symbolic_name" value="ARDUINO_TXD"/>
|
||||
<symbolicName propertyId="p614.symbolic_name" value="ARDUINO_RXD"/>
|
||||
<symbolicName propertyId="p700.symbolic_name" value="J4_PIN9"/>
|
||||
<symbolicName propertyId="p701.symbolic_name" value="J4_PIN7"/>
|
||||
<symbolicName propertyId="p702.symbolic_name" value="J4_PIN5"/>
|
||||
<symbolicName propertyId="p703.symbolic_name" value="J4_PIN3"/>
|
||||
<symbolicName propertyId="p704.symbolic_name" value="J4_PIN1"/>
|
||||
<symbolicName propertyId="p705.symbolic_name" value="J2_PIN39"/>
|
||||
<symbolicName propertyId="p708.symbolic_name" value="J2_PIN7"/>
|
||||
<symbolicName propertyId="p709.symbolic_name" value="J2_PIN11"/>
|
||||
<symbolicName propertyId="p710.symbolic_name" value="J2_PIN13"/>
|
||||
<symbolicName propertyId="p711.symbolic_name" value="J2_PIN15"/>
|
||||
<symbolicName propertyId="p712.symbolic_name" value="ARDUINO_GPIO_PWM"/>
|
||||
<symbolicName propertyId="p713.symbolic_name" value="ARDUINO_GPIO"/>
|
||||
<pincfg active="true" name="RA6M4 CPK" selected="true" symbol="g_bsp_pin_cfg">
|
||||
<configSetting altId="adc0.an00.p000" configurationId="adc0.an00"/>
|
||||
<configSetting altId="adc0.an01.p001" configurationId="adc0.an01"/>
|
||||
<configSetting altId="adc0.an02.p002" configurationId="adc0.an02"/>
|
||||
<configSetting altId="adc0.an03.p003" configurationId="adc0.an03"/>
|
||||
<configSetting altId="adc0.an04.p004" configurationId="adc0.an04"/>
|
||||
<configSetting altId="adc0.an05.p005" configurationId="adc0.an05"/>
|
||||
<configSetting altId="adc0.mode.custom" configurationId="adc0.mode"/>
|
||||
<configSetting altId="cgc0.extal.p212" configurationId="cgc0.extal"/>
|
||||
<configSetting altId="cgc0.mode.mainsub" configurationId="cgc0.mode"/>
|
||||
<configSetting altId="cgc0.xtal.p213" configurationId="cgc0.xtal"/>
|
||||
<configSetting altId="debug0.mode.jtag" configurationId="debug0.mode"/>
|
||||
<configSetting altId="debug0.tck.p300" configurationId="debug0.tck"/>
|
||||
<configSetting altId="debug0.tdi.p110" configurationId="debug0.tdi"/>
|
||||
<configSetting altId="debug0.tdo.p109" configurationId="debug0.tdo"/>
|
||||
<configSetting altId="debug0.tms.p108" configurationId="debug0.tms"/>
|
||||
<configSetting altId="iic1.mode.enabled.a" configurationId="iic1.mode"/>
|
||||
<configSetting altId="iic1.scl.p512" configurationId="iic1.scl"/>
|
||||
<configSetting altId="iic1.sda.p511" configurationId="iic1.sda"/>
|
||||
<configSetting altId="irq0.irq00.p105" configurationId="irq0.irq00"/>
|
||||
<configSetting altId="irq0.irq11.p006" configurationId="irq0.irq11"/>
|
||||
<configSetting altId="irq0.irq14.p505" configurationId="irq0.irq14"/>
|
||||
<configSetting altId="irq0.irq15.p506" configurationId="irq0.irq15"/>
|
||||
<configSetting altId="irq0.mode.enabled" configurationId="irq0.mode"/>
|
||||
<configSetting altId="p000.asel" configurationId="p000"/>
|
||||
<configSetting altId="p000.gpio_mode.gpio_mode_an" configurationId="p000.gpio_mode"/>
|
||||
<configSetting altId="p001.asel" configurationId="p001"/>
|
||||
<configSetting altId="p001.gpio_mode.gpio_mode_an" configurationId="p001.gpio_mode"/>
|
||||
<configSetting altId="p002.asel" configurationId="p002"/>
|
||||
<configSetting altId="p002.gpio_mode.gpio_mode_an" configurationId="p002.gpio_mode"/>
|
||||
<configSetting altId="p003.asel" configurationId="p003"/>
|
||||
<configSetting altId="p003.gpio_mode.gpio_mode_an" configurationId="p003.gpio_mode"/>
|
||||
<configSetting altId="p004.asel" configurationId="p004"/>
|
||||
<configSetting altId="p004.gpio_mode.gpio_mode_an" configurationId="p004.gpio_mode"/>
|
||||
<configSetting altId="p005.asel" configurationId="p005"/>
|
||||
<configSetting altId="p005.gpio_mode.gpio_mode_an" configurationId="p005.gpio_mode"/>
|
||||
<configSetting altId="p006.irq0.irq11" configurationId="p006"/>
|
||||
<configSetting altId="p006.gpio_irq.gpio_irq_enabled" configurationId="p006.gpio_irq"/>
|
||||
<configSetting altId="p006.gpio_mode.gpio_mode_irq" configurationId="p006.gpio_mode"/>
|
||||
<configSetting altId="p006.gpio_pupd.gpio_pupd_ip_up" configurationId="p006.gpio_pupd"/>
|
||||
<configSetting altId="p008.output.low" configurationId="p008"/>
|
||||
<configSetting altId="p008.gpio_mode.gpio_mode_out.low" configurationId="p008.gpio_mode"/>
|
||||
<configSetting altId="p014.output.low" configurationId="p014"/>
|
||||
<configSetting altId="p014.gpio_mode.gpio_mode_out.low" configurationId="p014.gpio_mode"/>
|
||||
<configSetting altId="p015.output.low" configurationId="p015"/>
|
||||
<configSetting altId="p015.gpio_mode.gpio_mode_out.low" configurationId="p015.gpio_mode"/>
|
||||
<configSetting altId="p105.irq0.irq00" configurationId="p105"/>
|
||||
<configSetting altId="p105.gpio_irq.gpio_irq_enabled" configurationId="p105.gpio_irq"/>
|
||||
<configSetting altId="p105.gpio_mode.gpio_mode_irq" configurationId="p105.gpio_mode"/>
|
||||
<configSetting altId="p106.output.low" configurationId="p106"/>
|
||||
<configSetting altId="p106.gpio_mode.gpio_mode_out.low" configurationId="p106.gpio_mode"/>
|
||||
<configSetting altId="p108.debug0.tms" configurationId="p108"/>
|
||||
<configSetting altId="p108.gpio_mode.gpio_mode_peripheral" configurationId="p108.gpio_mode"/>
|
||||
<configSetting altId="p109.debug0.tdo" configurationId="p109"/>
|
||||
<configSetting altId="p109.gpio_mode.gpio_mode_peripheral" configurationId="p109.gpio_mode"/>
|
||||
<configSetting altId="p110.debug0.tdi" configurationId="p110"/>
|
||||
<configSetting altId="p110.gpio_mode.gpio_mode_peripheral" configurationId="p110.gpio_mode"/>
|
||||
<configSetting altId="p202.spi0.miso" configurationId="p202"/>
|
||||
<configSetting altId="p202.gpio_mode.gpio_mode_peripheral" configurationId="p202.gpio_mode"/>
|
||||
<configSetting altId="p203.spi0.mosi" configurationId="p203"/>
|
||||
<configSetting altId="p203.gpio_mode.gpio_mode_peripheral" configurationId="p203.gpio_mode"/>
|
||||
<configSetting altId="p204.spi0.rspck" configurationId="p204"/>
|
||||
<configSetting altId="p204.gpio_mode.gpio_mode_peripheral" configurationId="p204.gpio_mode"/>
|
||||
<configSetting altId="p205.spi0.ssl0" configurationId="p205"/>
|
||||
<configSetting altId="p205.gpio_mode.gpio_mode_peripheral" configurationId="p205.gpio_mode"/>
|
||||
<configSetting altId="p212.cgc0.extal" configurationId="p212"/>
|
||||
<configSetting altId="p212.gpio_mode.gpio_mode_peripheral" configurationId="p212.gpio_mode"/>
|
||||
<configSetting altId="p213.cgc0.xtal" configurationId="p213"/>
|
||||
<configSetting altId="p213.gpio_mode.gpio_mode_peripheral" configurationId="p213.gpio_mode"/>
|
||||
<configSetting altId="p300.debug0.tck" configurationId="p300"/>
|
||||
<configSetting altId="p300.gpio_mode.gpio_mode_peripheral" configurationId="p300.gpio_mode"/>
|
||||
<configSetting altId="p407.usbfs0.vbus" configurationId="p407"/>
|
||||
<configSetting altId="p407.gpio_mode.gpio_mode_peripheral" configurationId="p407.gpio_mode"/>
|
||||
<configSetting altId="p410.spi1.miso" configurationId="p410"/>
|
||||
<configSetting altId="p410.gpio_mode.gpio_mode_peripheral" configurationId="p410.gpio_mode"/>
|
||||
<configSetting altId="p411.spi1.mosi" configurationId="p411"/>
|
||||
<configSetting altId="p411.gpio_mode.gpio_mode_peripheral" configurationId="p411.gpio_mode"/>
|
||||
<configSetting altId="p412.spi1.rspck" configurationId="p412"/>
|
||||
<configSetting altId="p412.gpio_mode.gpio_mode_peripheral" configurationId="p412.gpio_mode"/>
|
||||
<configSetting altId="p413.spi1.ssl0" configurationId="p413"/>
|
||||
<configSetting altId="p413.gpio_mode.gpio_mode_peripheral" configurationId="p413.gpio_mode"/>
|
||||
<configSetting altId="p414.output.low" configurationId="p414"/>
|
||||
<configSetting altId="p414.gpio_mode.gpio_mode_out.low" configurationId="p414.gpio_mode"/>
|
||||
<configSetting altId="p415.output.low" configurationId="p415"/>
|
||||
<configSetting altId="p415.gpio_mode.gpio_mode_out.low" configurationId="p415.gpio_mode"/>
|
||||
<configSetting altId="p500.usbfs0.vbusen" configurationId="p500"/>
|
||||
<configSetting altId="p500.gpio_mode.gpio_mode_peripheral" configurationId="p500.gpio_mode"/>
|
||||
<configSetting altId="p501.usbfs0.ovrcura" configurationId="p501"/>
|
||||
<configSetting altId="p501.gpio_mode.gpio_mode_peripheral" configurationId="p501.gpio_mode"/>
|
||||
<configSetting altId="p503.output.low" configurationId="p503"/>
|
||||
<configSetting altId="p503.gpio_mode.gpio_mode_out.low" configurationId="p503.gpio_mode"/>
|
||||
<configSetting altId="p504.output.low" configurationId="p504"/>
|
||||
<configSetting altId="p504.gpio_mode.gpio_mode_out.low" configurationId="p504.gpio_mode"/>
|
||||
<configSetting altId="p505.irq0.irq14" configurationId="p505"/>
|
||||
<configSetting altId="p505.gpio_irq.gpio_irq_enabled" configurationId="p505.gpio_irq"/>
|
||||
<configSetting altId="p505.gpio_mode.gpio_mode_irq" configurationId="p505.gpio_mode"/>
|
||||
<configSetting altId="p506.irq0.irq15" configurationId="p506"/>
|
||||
<configSetting altId="p506.gpio_irq.gpio_irq_enabled" configurationId="p506.gpio_irq"/>
|
||||
<configSetting altId="p506.gpio_mode.gpio_mode_irq" configurationId="p506.gpio_mode"/>
|
||||
<configSetting altId="p506.gpio_pupd.gpio_pupd_ip_up" configurationId="p506.gpio_pupd"/>
|
||||
<configSetting altId="p511.iic1.sda" configurationId="p511"/>
|
||||
<configSetting altId="p511.gpio_speed.gpio_speed_medium" configurationId="p511.gpio_drivecapacity"/>
|
||||
<configSetting altId="p511.gpio_mode.gpio_mode_peripheral" configurationId="p511.gpio_mode"/>
|
||||
<configSetting altId="p512.iic1.scl" configurationId="p512"/>
|
||||
<configSetting altId="p512.gpio_speed.gpio_speed_medium" configurationId="p512.gpio_drivecapacity"/>
|
||||
<configSetting altId="p512.gpio_mode.gpio_mode_peripheral" configurationId="p512.gpio_mode"/>
|
||||
<configSetting altId="p611.output.low" configurationId="p611"/>
|
||||
<configSetting altId="p611.gpio_mode.gpio_mode_out.low" configurationId="p611.gpio_mode"/>
|
||||
<configSetting altId="p613.sci7.txd" configurationId="p613"/>
|
||||
<configSetting altId="p613.gpio_mode.gpio_mode_peripheral" configurationId="p613.gpio_mode"/>
|
||||
<configSetting altId="p614.sci7.rxd" configurationId="p614"/>
|
||||
<configSetting altId="p614.gpio_mode.gpio_mode_peripheral" configurationId="p614.gpio_mode"/>
|
||||
<configSetting altId="p712.output.low" configurationId="p712"/>
|
||||
<configSetting altId="p712.gpio_mode.gpio_mode_out.low" configurationId="p712.gpio_mode"/>
|
||||
<configSetting altId="p713.output.low" configurationId="p713"/>
|
||||
<configSetting altId="p713.gpio_mode.gpio_mode_out.low" configurationId="p713.gpio_mode"/>
|
||||
<configSetting altId="sci7.mode.asynchronous.c" configurationId="sci7.mode"/>
|
||||
<configSetting altId="sci7.pairing.c" configurationId="sci7.pairing"/>
|
||||
<configSetting altId="sci7.rxd.p614" configurationId="sci7.rxd"/>
|
||||
<configSetting altId="sci7.txd.p613" configurationId="sci7.txd"/>
|
||||
<configSetting altId="spi0.miso.p202" configurationId="spi0.miso"/>
|
||||
<configSetting altId="spi0.mode.enabled.free" configurationId="spi0.mode"/>
|
||||
<configSetting altId="spi0.mosi.p203" configurationId="spi0.mosi"/>
|
||||
<configSetting altId="spi0.pairing.free" configurationId="spi0.pairing"/>
|
||||
<configSetting altId="spi0.rspck.p204" configurationId="spi0.rspck"/>
|
||||
<configSetting altId="spi0.ssl0.p205" configurationId="spi0.ssl0"/>
|
||||
<configSetting altId="spi1.miso.p410" configurationId="spi1.miso"/>
|
||||
<configSetting altId="spi1.mode.enabled.b" configurationId="spi1.mode"/>
|
||||
<configSetting altId="spi1.mosi.p411" configurationId="spi1.mosi"/>
|
||||
<configSetting altId="spi1.pairing.b" configurationId="spi1.pairing"/>
|
||||
<configSetting altId="spi1.rspck.p412" configurationId="spi1.rspck"/>
|
||||
<configSetting altId="spi1.ssl0.p413" configurationId="spi1.ssl0"/>
|
||||
<configSetting altId="usbfs0.mode.custom" configurationId="usbfs0.mode"/>
|
||||
<configSetting altId="usbfs0.ovrcura.p501" configurationId="usbfs0.ovrcura"/>
|
||||
<configSetting altId="usbfs0.vbus.p407" configurationId="usbfs0.vbus"/>
|
||||
<configSetting altId="usbfs0.vbusen.p500" configurationId="usbfs0.vbusen"/>
|
||||
</pincfg>
|
||||
<pincfg active="false" name="R7FA6M4AF3CFB.pincfg" selected="false" symbol="">
|
||||
<configSetting altId="debug0.mode.jtag" configurationId="debug0.mode"/>
|
||||
<configSetting altId="debug0.tck.p300" configurationId="debug0.tck"/>
|
||||
<configSetting altId="debug0.tdi.p110" configurationId="debug0.tdi"/>
|
||||
<configSetting altId="debug0.tdo.p109" configurationId="debug0.tdo"/>
|
||||
<configSetting altId="debug0.tms.p108" configurationId="debug0.tms"/>
|
||||
<configSetting altId="p108.debug0.tms" configurationId="p108"/>
|
||||
<configSetting altId="p108.gpio_mode.gpio_mode_peripheral" configurationId="p108.gpio_mode"/>
|
||||
<configSetting altId="p109.debug0.tdo" configurationId="p109"/>
|
||||
<configSetting altId="p109.gpio_mode.gpio_mode_peripheral" configurationId="p109.gpio_mode"/>
|
||||
<configSetting altId="p110.debug0.tdi" configurationId="p110"/>
|
||||
<configSetting altId="p110.gpio_mode.gpio_mode_peripheral" configurationId="p110.gpio_mode"/>
|
||||
<configSetting altId="p300.debug0.tck" configurationId="p300"/>
|
||||
<configSetting altId="p300.gpio_mode.gpio_mode_peripheral" configurationId="p300.gpio_mode"/>
|
||||
</pincfg>
|
||||
</raPinConfiguration>
|
||||
</raConfiguration>
|
||||
BIN
bsp/ra6m4-cpk/docs/picture/cpk-ra6m4.png
Normal file
BIN
bsp/ra6m4-cpk/docs/picture/cpk-ra6m4.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 911 KiB |
BIN
bsp/ra6m4-cpk/docs/picture/customize.png
Normal file
BIN
bsp/ra6m4-cpk/docs/picture/customize.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 18 KiB |
BIN
bsp/ra6m4-cpk/docs/picture/jflash.png
Normal file
BIN
bsp/ra6m4-cpk/docs/picture/jflash.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 23 KiB |
BIN
bsp/ra6m4-cpk/docs/picture/jflash1.png
Normal file
BIN
bsp/ra6m4-cpk/docs/picture/jflash1.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 5.3 KiB |
BIN
bsp/ra6m4-cpk/docs/picture/jflash2.png
Normal file
BIN
bsp/ra6m4-cpk/docs/picture/jflash2.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 9.6 KiB |
BIN
bsp/ra6m4-cpk/docs/picture/jflash3.png
Normal file
BIN
bsp/ra6m4-cpk/docs/picture/jflash3.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 26 KiB |
BIN
bsp/ra6m4-cpk/docs/picture/openrasc.png
Normal file
BIN
bsp/ra6m4-cpk/docs/picture/openrasc.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 10 KiB |
BIN
bsp/ra6m4-cpk/docs/picture/rascuart.png
Normal file
BIN
bsp/ra6m4-cpk/docs/picture/rascuart.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 30 KiB |
BIN
bsp/ra6m4-cpk/docs/picture/rascuart1.png
Normal file
BIN
bsp/ra6m4-cpk/docs/picture/rascuart1.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 66 KiB |
22
bsp/ra6m4-cpk/docs/使用瑞萨FSP配置工具.md
Normal file
22
bsp/ra6m4-cpk/docs/使用瑞萨FSP配置工具.md
Normal file
@@ -0,0 +1,22 @@
|
||||
## 在 MDK 中使用 FSP
|
||||
|
||||
1. 打开 MDK，选择 “Tools -> Customize Tools Menu…”
|
||||
2. 点击 “new” 图标，添加一条自定义命令: RA Smart Configurator
|
||||
3. Command 输入工具的安装路径， 点击“…”找到安装路径下的“rasc.exe”文件并选中 (setup_fsp_v3_1_0_rasc_ 安装目录下)
|
||||
4. Initial Folder 输入参数: $P
|
||||
5. Arguments 输入参数: --device $D --compiler ARMv6 configuration.xml
|
||||
6. 点击 OK 保存命令“Tools -> RA smart Configurator”
|
||||
|
||||
|
||||
|
||||
7. 点击添加的命令打开配置工具：RA Smart Config
|
||||
|
||||
|
||||
|
||||
## UART
|
||||
|
||||
- 添加一个 UART 端口外设配置
|
||||
|
||||
|
||||
|
||||
|
||||
54
bsp/ra6m4-cpk/drivers/Kconfig
Normal file
54
bsp/ra6m4-cpk/drivers/Kconfig
Normal file
@@ -0,0 +1,54 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_SERIES_R7FA6M4AF
|
||||
bool
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
select RT_USING_SERIAL_V2
|
||||
if BSP_USING_UART
|
||||
menuconfig BSP_USING_UART7
|
||||
bool "Enable UART7 (Console)"
|
||||
default y
|
||||
if BSP_USING_UART7
|
||||
config BSP_UART7_RX_USING_DMA
|
||||
bool "Enable UART7 RX DMA"
|
||||
depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART7_TX_USING_DMA
|
||||
bool "Enable UART7 TX DMA"
|
||||
depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART7_RX_BUFSIZE
|
||||
int "Set UART7 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART7_TX_BUFSIZE
|
||||
int "Set UART7 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
endmenu
|
||||
24
bsp/ra6m4-cpk/drivers/SConscript
Normal file
24
bsp/ra6m4-cpk/drivers/SConscript
Normal file
@@ -0,0 +1,24 @@
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add the general drivers.
|
||||
src = Split("""
|
||||
drv_common.c
|
||||
""")
|
||||
|
||||
if GetDepend(['RT_USING_SERIAL']):
|
||||
if GetDepend(['RT_USING_SERIAL_V2']):
|
||||
src += ['drv_usart_v2.c']
|
||||
else:
|
||||
print("\nThe current project does not support serial-v1\n")
|
||||
Return('group')
|
||||
|
||||
path = [cwd]
|
||||
path += [cwd + '/config']
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
|
||||
|
||||
Return('group')
|
||||
38
bsp/ra6m4-cpk/drivers/board.h
Normal file
38
bsp/ra6m4-cpk/drivers/board.h
Normal file
@@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-10-10 Sherman first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define RA_SRAM_SIZE 256
|
||||
#define RA_SRAM_END (0x20000000 + RA_SRAM_SIZE * 1024)
|
||||
|
||||
#ifdef __ARMCC_VERSION
|
||||
extern int Image$$RAM_END$$ZI$$Base;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RAM_END$$ZI$$Base)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN (&__bss_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_END RA_SRAM_END
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
30
bsp/ra6m4-cpk/drivers/config/drv_config.h
Normal file
30
bsp/ra6m4-cpk/drivers/config/drv_config.h
Normal file
@@ -0,0 +1,30 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-07-29 KyleChan first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_CONFIG_H__
|
||||
#define __DRV_CONFIG_H__
|
||||
|
||||
#include "board.h"
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef SOC_SERIES_R7FA6M4AF
|
||||
#include "ra6m4/uart_config.h"
|
||||
|
||||
#endif/* SOC_SERIES_R7FA6M4AF */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif/* __DRV_CONFIG_H__ */
|
||||
36
bsp/ra6m4-cpk/drivers/config/ra6m4/uart_config.h
Normal file
36
bsp/ra6m4-cpk/drivers/config/ra6m4/uart_config.h
Normal file
@@ -0,0 +1,36 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-07-29 KyleChan first version
|
||||
*/
|
||||
|
||||
#ifndef __UART_CONFIG_H__
|
||||
#define __UART_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "hal_data.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_UART7)
|
||||
#ifndef UART7_CONFIG
|
||||
#define UART7_CONFIG \
|
||||
{ \
|
||||
.name = "uart7", \
|
||||
.p_api_ctrl = &g_uart7_ctrl, \
|
||||
.p_cfg = &g_uart7_cfg, \
|
||||
}
|
||||
#endif /* UART7_CONFIG */
|
||||
#endif /* BSP_USING_UART7 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
138
bsp/ra6m4-cpk/drivers/drv_common.c
Normal file
138
bsp/ra6m4-cpk/drivers/drv_common.c
Normal file
@@ -0,0 +1,138 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-7 SummerGift first version
|
||||
*/
|
||||
|
||||
#include <drv_common.h>
|
||||
#include <bsp_api.h>
|
||||
#include "board.h"
|
||||
|
||||
#ifdef RT_USING_SERIAL
|
||||
#ifdef RT_USING_SERIAL_V2
|
||||
#include <drv_usart_v2.h>
|
||||
#else
|
||||
#include <drv_usart.h>
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
#include <finsh.h>
|
||||
static void reboot(uint8_t argc, char **argv)
|
||||
{
|
||||
rt_hw_cpu_reset();
|
||||
}
|
||||
MSH_CMD_EXPORT(reboot, Reboot System);
|
||||
#endif /* RT_USING_FINSH */
|
||||
|
||||
/* SysTick configuration */
|
||||
void rt_hw_systick_init(void)
|
||||
{
|
||||
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
NVIC_SetPriority(SysTick_IRQn, 0xFF);
|
||||
}
|
||||
|
||||
/**
|
||||
* This is the timer interrupt service routine.
|
||||
*
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief This function is executed in case of error occurrence.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void _Error_Handler(char *s, int num)
|
||||
{
|
||||
/* USER CODE BEGIN Error_Handler */
|
||||
/* User can add his own implementation to report the HAL error return state */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END Error_Handler */
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will delay for some us.
|
||||
*
|
||||
* @param us the delay time of us
|
||||
*/
|
||||
void rt_hw_us_delay(rt_uint32_t us)
|
||||
{
|
||||
rt_uint32_t ticks;
|
||||
rt_uint32_t told, tnow, tcnt = 0;
|
||||
rt_uint32_t reload = SysTick->LOAD;
|
||||
|
||||
ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
|
||||
told = SysTick->VAL;
|
||||
while (1)
|
||||
{
|
||||
tnow = SysTick->VAL;
|
||||
if (tnow != told)
|
||||
{
|
||||
if (tnow < told)
|
||||
{
|
||||
tcnt += told - tnow;
|
||||
}
|
||||
else
|
||||
{
|
||||
tcnt += reload - tnow + told;
|
||||
}
|
||||
told = tnow;
|
||||
if (tcnt >= ticks)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will initial STM32 board.
|
||||
*/
|
||||
RT_WEAK void rt_hw_board_init()
|
||||
{
|
||||
|
||||
rt_hw_systick_init();
|
||||
|
||||
/* Heap initialization */
|
||||
#if defined(RT_USING_HEAP)
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
|
||||
/* Pin driver initialization is open by default */
|
||||
#ifdef RT_USING_PIN
|
||||
rt_hw_pin_init();
|
||||
#endif
|
||||
|
||||
/* USART driver initialization is open by default */
|
||||
#ifdef RT_USING_SERIAL
|
||||
rt_hw_usart_init();
|
||||
#endif
|
||||
|
||||
/* Set the shell console output device */
|
||||
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
/* Board underlying hardware initialization */
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
36
bsp/ra6m4-cpk/drivers/drv_common.h
Normal file
36
bsp/ra6m4-cpk/drivers/drv_common.h
Normal file
@@ -0,0 +1,36 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-7 SummerGift first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_COMMON_H__
|
||||
#define __DRV_COMMON_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rthw.h>
|
||||
#ifdef RT_USING_DEVICE
|
||||
#include <rtdevice.h>
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void _Error_Handler(char *s, int num);
|
||||
|
||||
#ifndef Error_Handler
|
||||
#define Error_Handler() _Error_Handler(__FILE__, __LINE__)
|
||||
#endif
|
||||
|
||||
#define DMA_NOT_AVAILABLE ((DMA_INSTANCE_TYPE *)0xFFFFFFFFU)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
199
bsp/ra6m4-cpk/drivers/drv_usart_v2.c
Normal file
199
bsp/ra6m4-cpk/drivers/drv_usart_v2.c
Normal file
@@ -0,0 +1,199 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-07-29 KyleChan first version
|
||||
*/
|
||||
|
||||
#include <drv_usart_v2.h>
|
||||
|
||||
#ifdef RT_USING_SERIAL_V2
|
||||
|
||||
//#define DRV_DEBUG
|
||||
#define DBG_TAG "drv.usart"
|
||||
#ifdef DRV_DEBUG
|
||||
#define DBG_LVL DBG_LOG
|
||||
#else
|
||||
#define DBG_LVL DBG_INFO
|
||||
#endif /* DRV_DEBUG */
|
||||
#include <rtdbg.h>
|
||||
|
||||
static struct ra_uart_config uart_config[] =
|
||||
{
|
||||
#ifdef BSP_USING_UART7
|
||||
UART7_CONFIG,
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
UART1_CONFIG,
|
||||
#endif
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
#ifdef BSP_USING_UART7
|
||||
UART7_INDEX,
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
UART1_INDEX,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct ra_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
|
||||
|
||||
static void ra_uart_get_config(void)
|
||||
{
|
||||
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||||
|
||||
#ifdef BSP_USING_UART7
|
||||
uart_obj[UART7_INDEX].serial.config = config;
|
||||
uart_obj[UART7_INDEX].uart_dma_flag = 0;
|
||||
|
||||
uart_obj[UART7_INDEX].serial.config.rx_bufsz = BSP_UART7_RX_BUFSIZE;
|
||||
uart_obj[UART7_INDEX].serial.config.tx_bufsz = BSP_UART7_TX_BUFSIZE;
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
uart_obj[UART1_INDEX].serial.config = config;
|
||||
uart_obj[UART1_INDEX].uart_dma_flag = 0;
|
||||
|
||||
uart_obj[UART1_INDEX].serial.config.rx_bufsz = BSP_UART1_RX_BUFSIZE;
|
||||
uart_obj[UART1_INDEX].serial.config.tx_bufsz = BSP_UART1_TX_BUFSIZE;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* UART interface
|
||||
*/
|
||||
static rt_err_t ra_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
|
||||
{
|
||||
struct ra_uart *uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
RT_ASSERT(cfg != RT_NULL);
|
||||
|
||||
fsp_err_t err = FSP_SUCCESS;
|
||||
|
||||
uart = rt_container_of(serial, struct ra_uart, serial);
|
||||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
err = R_SCI_UART_Open (uart->config->p_api_ctrl, uart->config->p_cfg);
|
||||
if (FSP_SUCCESS != err)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t ra_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static int ra_uart_putc(struct rt_serial_device *serial, char c)
|
||||
{
|
||||
struct ra_uart *uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
|
||||
uart = rt_container_of(serial, struct ra_uart, serial);
|
||||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
sci_uart_instance_ctrl_t * p_ctrl = (sci_uart_instance_ctrl_t *)uart->config->p_api_ctrl;
|
||||
|
||||
p_ctrl->p_reg->TDR = c;
|
||||
while((p_ctrl->p_reg->SSR_b.TEND) == 0);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static int ra_uart_getc(struct rt_serial_device *serial)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
|
||||
#ifdef BSP_USING_UART7
|
||||
void uart7_isr_cb(uart_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
|
||||
struct rt_serial_device *serial = &uart_obj[0].serial;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
|
||||
if(UART_EVENT_RX_CHAR == p_args->event)
|
||||
{
|
||||
struct rt_serial_rx_fifo *rx_fifo;
|
||||
rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
|
||||
RT_ASSERT(rx_fifo != RT_NULL);
|
||||
|
||||
rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t )p_args->data);
|
||||
|
||||
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
void uart1_isr_cb(uart_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
|
||||
struct rt_serial_device *serial = &uart_obj[1].serial;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
|
||||
if(UART_EVENT_RX_CHAR == p_args->event)
|
||||
{
|
||||
struct rt_serial_rx_fifo *rx_fifo;
|
||||
rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
|
||||
RT_ASSERT(rx_fifo != RT_NULL);
|
||||
|
||||
rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t )p_args->data);
|
||||
|
||||
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static const struct rt_uart_ops ra_uart_ops =
|
||||
{
|
||||
.configure = ra_uart_configure,
|
||||
.control = ra_uart_control,
|
||||
.putc = ra_uart_putc,
|
||||
.getc = ra_uart_getc,
|
||||
};
|
||||
|
||||
|
||||
int rt_hw_usart_init(void)
|
||||
{
|
||||
rt_err_t result = 0;
|
||||
rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct ra_uart);
|
||||
|
||||
ra_uart_get_config();
|
||||
for (int i = 0; i < obj_num; i++)
|
||||
{
|
||||
/* init UART object */
|
||||
uart_obj[i].config = &uart_config[i];
|
||||
uart_obj[i].serial.ops = &ra_uart_ops;
|
||||
/* register UART device */
|
||||
result = rt_hw_serial_register(&uart_obj[i].serial,
|
||||
uart_obj[i].config->name,
|
||||
RT_DEVICE_FLAG_RDWR,
|
||||
NULL);
|
||||
RT_ASSERT(result == RT_EOK);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
#endif /* RT_USING_SERIAL_V2 */
|
||||
40
bsp/ra6m4-cpk/drivers/drv_usart_v2.h
Normal file
40
bsp/ra6m4-cpk/drivers/drv_usart_v2.h
Normal file
@@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-07-29 KyleChan first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_USART_V2_H__
|
||||
#define __DRV_USART_V2_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <rthw.h>
|
||||
#include <drv_common.h>
|
||||
#include <drv_config.h>
|
||||
#include <hal_data.h>
|
||||
|
||||
/* renesas config class */
|
||||
struct ra_uart_config
|
||||
{
|
||||
const char *name;
|
||||
uart_ctrl_t * const p_api_ctrl;
|
||||
uart_cfg_t const * const p_cfg;
|
||||
};
|
||||
|
||||
struct ra_uart
|
||||
{
|
||||
struct rt_serial_device serial;
|
||||
|
||||
rt_uint16_t uart_dma_flag;
|
||||
|
||||
struct ra_uart_config *config;
|
||||
};
|
||||
|
||||
int rt_hw_usart_init(void);
|
||||
|
||||
#endif /* __DRV_USART_H__ */
|
||||
632
bsp/ra6m4-cpk/project.uvoptx
Normal file
632
bsp/ra6m4-cpk/project.uvoptx
Normal file
File diff suppressed because it is too large
Load Diff
610
bsp/ra6m4-cpk/project.uvprojx
Normal file
610
bsp/ra6m4-cpk/project.uvprojx
Normal file
File diff suppressed because it is too large
Load Diff
29
bsp/ra6m4-cpk/ra/SConscript
Normal file
29
bsp/ra6m4-cpk/ra/SConscript
Normal file
@@ -0,0 +1,29 @@
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = []
|
||||
group = []
|
||||
CPPPATH = []
|
||||
CPPDEFINES = ['SOC_R7FA6M4AF']
|
||||
|
||||
if rtconfig.CROSS_TOOL == 'iar':
|
||||
print("\nThe current project does not support iar build\n")
|
||||
Return('group')
|
||||
elif rtconfig.CROSS_TOOL == 'gcc':
|
||||
src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c')
|
||||
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c']
|
||||
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c']
|
||||
src += [cwd + '/fsp/src/r_ioport/r_ioport.c']
|
||||
|
||||
if GetDepend(['RT_USING_SERIAL']):
|
||||
src += [cwd + '/fsp/src/r_sci_uart/r_sci_uart.c']
|
||||
|
||||
CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core/Include',
|
||||
cwd + '/fsp/inc',
|
||||
cwd + '/fsp/inc/api',
|
||||
cwd + '/fsp/inc/instances',]
|
||||
|
||||
group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
|
||||
Return('group')
|
||||
411
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h
Normal file
411
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h
Normal file
@@ -0,0 +1,411 @@
|
||||
/******************************************************************************
|
||||
* @file cachel1_armv7.h
|
||||
* @brief CMSIS Level 1 Cache API for Armv7-M and later
|
||||
* @version V1.0.0
|
||||
* @date 03. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_CACHEL1_ARMV7_H
|
||||
#define ARM_CACHEL1_ARMV7_H
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_CacheFunctions Cache Functions
|
||||
\brief Functions that configure Instruction and Data cache.
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Cache Size ID Register Macros */
|
||||
#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
|
||||
#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
|
||||
|
||||
#ifndef __SCB_DCACHE_LINE_SIZE
|
||||
#define __SCB_DCACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
|
||||
#endif
|
||||
|
||||
#ifndef __SCB_ICACHE_LINE_SIZE
|
||||
#define __SCB_ICACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
|
||||
#endif
|
||||
|
||||
/**
|
||||
\brief Enable I-Cache
|
||||
\details Turns on I-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_EnableICache (void)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable I-Cache
|
||||
\details Turns off I-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_DisableICache (void)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */
|
||||
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Invalidate I-Cache
|
||||
\details Invalidates I-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->ICIALLU = 0UL;
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief I-Cache Invalidate by address
|
||||
\details Invalidates I-Cache for the given address.
|
||||
I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
|
||||
I-Cache memory blocks which are part of given address + given size are invalidated.
|
||||
\param[in] addr address
|
||||
\param[in] isize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isize)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
if ( isize > 0 ) {
|
||||
int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_ICACHE_LINE_SIZE;
|
||||
op_size -= __SCB_ICACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Enable D-Cache
|
||||
\details Turns on D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_EnableDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
|
||||
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
__DSB();
|
||||
|
||||
SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable D-Cache
|
||||
\details Turns off D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_DisableDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* clean & invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
|
||||
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Invalidate D-Cache
|
||||
\details Invalidates D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
|
||||
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Clean D-Cache
|
||||
\details Cleans D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* clean D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
|
||||
((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Clean & Invalidate D-Cache
|
||||
\details Cleans and Invalidates D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* clean & invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
|
||||
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief D-Cache Invalidate by address
|
||||
\details Invalidates D-Cache for the given address.
|
||||
D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
|
||||
D-Cache memory blocks which are part of given address + given size are invalidated.
|
||||
\param[in] addr address
|
||||
\param[in] dsize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
if ( dsize > 0 ) {
|
||||
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_DCACHE_LINE_SIZE;
|
||||
op_size -= __SCB_DCACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief D-Cache Clean by address
|
||||
\details Cleans D-Cache for the given address
|
||||
D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
|
||||
D-Cache memory blocks which are part of given address + given size are cleaned.
|
||||
\param[in] addr address
|
||||
\param[in] dsize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
if ( dsize > 0 ) {
|
||||
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->DCCMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_DCACHE_LINE_SIZE;
|
||||
op_size -= __SCB_DCACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief D-Cache Clean and Invalidate by address
|
||||
\details Cleans and invalidates D_Cache for the given address
|
||||
D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
|
||||
D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
|
||||
\param[in] addr address (aligned to 32-byte boundary)
|
||||
\param[in] dsize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
if ( dsize > 0 ) {
|
||||
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->DCCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_DCACHE_LINE_SIZE;
|
||||
op_size -= __SCB_DCACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*@} end of CMSIS_Core_CacheFunctions */
|
||||
|
||||
#endif /* ARM_CACHEL1_ARMV7_H */
|
||||
885
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h
Normal file
885
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h
Normal file
File diff suppressed because it is too large
Load Diff
1467
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h
Normal file
1467
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h
Normal file
File diff suppressed because it is too large
Load Diff
1893
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h
Normal file
1893
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h
Normal file
File diff suppressed because it is too large
Load Diff
283
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h
Normal file
283
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h
Normal file
@@ -0,0 +1,283 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.1.0
|
||||
* @date 09. October 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6.6 LTM (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
|
||||
#include "cmsis_armclang_ltm.h"
|
||||
|
||||
/*
|
||||
* Arm Compiler above 6.10.1 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
2177
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h
Normal file
2177
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h
Normal file
File diff suppressed because it is too large
Load Diff
968
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h
Normal file
968
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,39 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.4
|
||||
* @date 23. July 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 4U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
4191
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h
Normal file
4191
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h
Normal file
File diff suppressed because it is too large
Load Diff
2222
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h
Normal file
2222
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h
Normal file
File diff suppressed because it is too large
Load Diff
3196
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h
Normal file
3196
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h
Normal file
File diff suppressed because it is too large
Load Diff
952
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h
Normal file
952
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h
Normal file
File diff suppressed because it is too large
Load Diff
1087
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h
Normal file
1087
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h
Normal file
File diff suppressed because it is too large
Load Diff
979
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h
Normal file
979
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h
Normal file
File diff suppressed because it is too large
Load Diff
2297
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h
Normal file
2297
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h
Normal file
File diff suppressed because it is too large
Load Diff
1943
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h
Normal file
1943
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h
Normal file
File diff suppressed because it is too large
Load Diff
3264
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h
Normal file
3264
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h
Normal file
File diff suppressed because it is too large
Load Diff
3264
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h
Normal file
3264
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h
Normal file
File diff suppressed because it is too large
Load Diff
2129
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h
Normal file
2129
bsp/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h
Normal file
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user