Add Infineon Doc and modify file structure

bsp/Infineon/libraries/IFX_PSOC6_HAL/SConscript

@@ -20,10 +20,6 @@ src = Split('''
             mtb-hal-cat1/source/cyhal_utils.c
             mtb-hal-cat1/source/cyhal_lptimer.c
             mtb-hal-cat1/source/cyhal_irq_psoc.c
-            mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c
-            mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_02_124_bga.c
-            mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/cy_device.c
-            mtb-pdl-cat1/drivers/source/cy_scb_common.c
             mtb-pdl-cat1/drivers/source/cy_sysclk.c
             mtb-pdl-cat1/drivers/source/cy_systick.c
             mtb-pdl-cat1/drivers/source/cy_gpio.c
@@ -37,18 +33,14 @@ src = Split('''
             mtb-pdl-cat1/drivers/source/cy_ipc_drv.c
             mtb-pdl-cat1/drivers/source/cy_trigmux.c
             mtb-pdl-cat1/drivers/source/cy_prot.c
-            TARGET_CY8CKIT-062S2-43012/cybsp.c
-            TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/system_psoc6_cm4.c
-            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c
-            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c
-            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c
-            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c
-            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.c
-            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c
-            lib/cy_capsense.lib
+            mtb-pdl-cat1/drivers/source/cy_scb_common.c
             ''')
 
-src += Glob(cwd + '/psoc6cm0p/COMPONENT_CM0P_SLEEP/*.c')
+if GetDepend(['SOC_CY8C624ABZI_S2D44']):
+    src += ['mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/cy_device.c']
+    src += ['mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c']
+    src += ['mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_02_124_bga.c']
+    src += Glob('psoc6cm0p/COMPONENT_CM0P_SLEEP/*.c')
 
 if GetDepend(['RT_USING_SERIAL']):
     src += ['retarget-io/cy_retarget_io.c']
@@ -59,8 +51,8 @@ if GetDepend(['RT_USING_ADC']):
     src += ['mtb-hal-cat1/source/cyhal_dma_dw.c']
     src += ['mtb-hal-cat1/source/cyhal_dma_dmac.c']
     src += ['mtb-hal-cat1/source/cyhal_dma.c']
-    src += ['mtb-hal-cat1/source/cyhal_analog_common.c']
     src += ['mtb-hal-cat1/source/cyhal_adc_sar.c']
+    src += ['mtb-hal-cat1/source/cyhal_analog_common.c']
     src += ['mtb-pdl-cat1/drivers/source/cy_dma.c']
     src += ['mtb-pdl-cat1/drivers/source/cy_sar.c']
     src += ['mtb-pdl-cat1/drivers/source/cy_dmac.c']
@@ -70,15 +62,6 @@ if GetDepend(['RT_USING_SDIO']):
     src += ['mtb-hal-cat1/source/cyhal_sdhc.c']
     src += ['mtb-pdl-cat1/drivers/source/cy_sd_host.c']
 
-if GetDepend(['RT_USING_QSPI']):
-    src += ['mtb-hal-cat1/source/cyhal_qspi.c']
-    src += ['mtb-pdl-cat1/drivers/source/cy_dma.c']
-    src += ['mtb-pdl-cat1/drivers/source/cy_smif.c']
-    src += ['mtb-pdl-cat1/drivers/source/cy_smif_sfdp.c']
-    src += ['mtb-pdl-cat1/drivers/source/cy_smif_memslot.c']
-    src += ['mtb_shared/serial-flash/cy_serial_flash_qspi.c']
-    src += ['TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_qspi_memslot.c']
-
 if GetDepend(['RT_USING_PWM']):
     src += ['mtb-hal-cat1/source/cyhal_pwm.c']
     src += ['mtb-hal-cat1/source/cyhal_timer.c']
@@ -93,23 +76,13 @@ if GetDepend(['RT_USING_SPI']):
 if GetDepend(['RT_USING_I2C']):
     src += ['mtb-hal-cat1/source/cyhal_i2c.c']
 
-if GetDepend('BSP_USING_USBD'):
-    src += ['mtb_shared/usbdev/cy_usb_dev.c']
-    src += ['mtb_shared/usbdev/cy_usb_dev_hid.c']
-    src += ['mtb-hal-cat1/source/cyhal_usb_dev.c']
-    src += ['mtb-pdl-cat1/drivers/source/cy_dma.c']
-    src += ['mtb-pdl-cat1/drivers/source/cy_usbfs_dev_drv.c']
-    src += ['mtb-pdl-cat1/drivers/source/cy_usbfs_dev_drv_io.c']
-    src += ['mtb-pdl-cat1/drivers/source/cy_usbfs_dev_drv_io_dma.c']
-    src += ['TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_usbdev.c']
-
 if GetDepend('BSP_USING_RTC'):
-    src += ['mtb-pdl-cat1/drivers/source/cy_rtc.c']
     src += ['mtb-hal-cat1/source/cyhal_rtc.c']
+    src += ['mtb-pdl-cat1/drivers/source/cy_rtc.c']
 
 if GetDepend('BSP_USING_ON_CHIP_FLASH'):
-    src += ['mtb-pdl-cat1/drivers/source/cy_flash.c']
     src += ['mtb-hal-cat1/source/cyhal_flash.c']
+    src += ['mtb-pdl-cat1/drivers/source/cy_flash.c']
 
 if GetDepend(['BSP_USING_SLIDER']):
     src += ['capsense/cy_capsense_control.c']
@@ -123,7 +96,8 @@ if GetDepend(['BSP_USING_SLIDER']):
     src += ['capsense/cy_capsense_centroid.c']
     src += ['capsense/cy_capsense_filter.c']
     src += ['mtb-pdl-cat1/drivers/source/cy_csd.c']
-    src += ['TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.c']
+    if rtconfig.PLATFORM in ['armclang']:
+        src += ['lib/cy_capsense.lib']
 
 if GetDepend(['RT_USING_WDT']):
     src += ['mtb-pdl-cat1/drivers/source/cy_wdt.c']
@@ -135,21 +109,21 @@ if GetDepend(['RT_USING_DAC']):
 if GetDepend(['RT_USING_HWTIMER']):
     src += ['mtb-hal-cat1/source/cyhal_timer.c']
 
-path = [cwd + '/capsense',
-        cwd + '/psoc6cm0p',
-        cwd + '/retarget-io',
+path = [cwd + '/retarget-io',
         cwd + '/core-lib/include',
-        cwd + '/mtb_shared/serial-flash',
         cwd + '/mtb_shared/usbdev',
         cwd + '/mtb_shared/csdidac',
+        cwd + '/mtb_shared/serial-flash',
         cwd + '/mtb-pdl-cat1/cmsis/include',
         cwd + '/mtb-pdl-cat1/drivers/include',
-        cwd + '/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include',
         cwd + '/mtb-hal-cat1/include_pvt',
-        cwd + '/mtb-hal-cat1/include',
-        cwd + '/mtb-hal-cat1/COMPONENT_CAT1A/include',
-        cwd + '/TARGET_CY8CKIT-062S2-43012',
-        cwd + '/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource']
+        cwd + '/mtb-hal-cat1/include']
+
+if GetDepend(['SOC_CY8C624ABZI_S2D44']):
+    path += [cwd + '/psoc6cm0p']
+    path += [cwd + '/capsense']
+    path += [cwd + '/mtb-hal-cat1/COMPONENT_CAT1A/include']
+    path += [cwd + '/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include']
 
 group = DefineGroup('Libraries', src, depend=[''], CPPPATH=path)
 

bsp/Infineon/libraries/Kconfig

@@ -1,7 +1,7 @@
 config SOC_FAMILY_IFX
     bool
 
-config SOC_SERIES_IFX_PSOC6
+config SOC_SERIES_IFX_PSOC62
     bool
     select ARCH_ARM_CORTEX_M4
     select SOC_FAMILY_IFX

bsp/Infineon/libraries/templates/PSOC62/.config

@@ -60,6 +60,7 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
 #
 # Memory Management
 #
+CONFIG_RT_PAGE_MAX_ORDER=11
 CONFIG_RT_USING_MEMPOOL=y
 CONFIG_RT_USING_SMALL_MEM=y
 # CONFIG_RT_USING_SLAB is not set
@@ -117,7 +118,6 @@ CONFIG_FINSH_USING_DESCRIPTION=y
 CONFIG_FINSH_ARG_MAX=10
 # CONFIG_RT_USING_DFS is not set
 # CONFIG_RT_USING_FAL is not set
-# CONFIG_RT_USING_LWP is not set
 
 #
 # Device Drivers
@@ -706,12 +706,12 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
 # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
 CONFIG_SOC_FAMILY_IFX=y
-CONFIG_SOC_SERIES_IFX_PSOC6=y
+CONFIG_SOC_SERIES_IFX_PSOC62=y
 
 #
 # Hardware Drivers Config
 #
-CONFIG_SOC_IFX_PSOC6_43012=y
+CONFIG_SOC_CY8C624ABZI_S2D44=y
 
 #
 # Onboard Peripheral Drivers

bsp/Infineon/libraries/templates/PSOC62/.project

@@ -1,6 +1,6 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <projectDescription>
-  <name>1111</name>
+  <name>project</name>
   <comment />
   <projects>
 	</projects>

bsp/Infineon/libraries/templates/PSOC62/.settings/language.settings.xml

@@ -5,7 +5,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1451646591856031841" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1522148012290462689" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>

bsp/Infineon/libraries/templates/PSOC62/.settings/projcfg.ini

@@ -1,5 +1,5 @@
 #RT-Thread Studio Project Configuration
-#Fri Jan 06 10:38:41 CST 2023
+#Thu Jan 12 11:11:44 CST 2023
 project_type=rt-thread
 chip_name=CY8C624ABZI
 os_branch=full
@@ -14,7 +14,7 @@ project_base_bsp=true
 hardware_adapter=KitProg3
 project_name=1111
 is_base_example_project=False
-board_name=PSOC62-IFX-PROTO-KIT
+board_name=psoc6-cy8ckit-062S2-43012
 device_vendor=Infineon 
-bsp_path=repo/Extract/Board_Support_Packages/Infineon/PSOC62-IFX-PROTO-KIT/1.0.0
 bsp_version=1.0.0
+bsp_path=repo/Extract/Board_Support_Packages/Infineon/PSOC62-IFX-PROTO-KIT/1.0.0

bsp/Infineon/libraries/templates/PSOC62/board/Kconfig

@@ -1,8 +1,8 @@
 menu "Hardware Drivers Config"
 
-config SOC_IFX_PSOC6_43012
+config SOC_CY8C624ABZI_S2D44
     bool
-    select SOC_SERIES_IFX_PSOC6
+    select SOC_SERIES_IFX_PSOC62
     select RT_USING_COMPONENTS_INIT
     select RT_USING_USER_MAIN
     default y

bsp/Infineon/libraries/templates/PSOC62/board/SConscript

@@ -28,17 +28,13 @@ path += [cwd + '/ports']
 startup_path_prefix = SDK_LIB
 
 if rtconfig.PLATFORM in ['gcc']:
-    src += [startup_path_prefix +
-            '/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/startup_psoc6_02_cm4.S']
     src += [startup_path_prefix +
             '/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S']
-elif rtconfig.PLATFORM in ['armcc', 'armclang']:
-    src += [startup_path_prefix +
-            '/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.S']
+elif rtconfig.PLATFORM in ['armclang']:
     src += [startup_path_prefix +
             '/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S']
 
-CPPDEFINES = ['CY8C624ABZI_S2D44', 'IFX_PSOC6_43012', 'CY_USING_HAL', 'COMPONENT_CAT1A', 'COMPONENT_CAT1', 'COMPONENT_BSP_DESIGN_MODUS']
+CPPDEFINES = ['CY8C624ABZI_S2D44', 'CY_USING_HAL', 'COMPONENT_CAT1A', 'COMPONENT_CAT1', 'COMPONENT_BSP_DESIGN_MODUS']
 group = DefineGroup('Drivers', src, depend=[''], CPPPATH=path, CPPDEFINES=CPPDEFINES)
 
 Return('group')

bsp/Infineon/libraries/templates/PSOC62/libs/SConscript

@@ -0,0 +1,26 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+src = []
+group = []
+CPPPATH = []
+
+if rtconfig.PLATFORM in ['iccarm']:
+    print("\nThe current project does not support IAR build\n")
+    Return('group')
+elif rtconfig.PLATFORM in ['gcc', 'armclang']:
+    src += [cwd + '/TARGET_CY8CKIT-062S2-43012/cybsp.c']
+    src += [cwd + '/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/system_psoc6_cm4.c']
+    src += Glob(cwd + '/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/*.c')
+
+    CPPPATH = [ cwd + '/TARGET_CY8CKIT-062S2-43012',
+                cwd + '/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource']
+    if rtconfig.PLATFORM in ['gcc']:
+        src += [cwd + '/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/startup_psoc6_02_cm4.S']
+    elif rtconfig.PLATFORM in ['armclang']:
+        src += [cwd + '/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.S']
+
+group = DefineGroup('libs', src, depend = [''], CPPPATH = CPPPATH)
+Return('group')