+*
+* | Version |
+* Changes |
+* Reason for Change |
+*
+*
+* | 2.91 |
+* Updated memory configuration for PSoC 64 devices. |
+* Flash and RAM memory allocation updated. |
+*
+*
+* | Added cys06xxa_cm4 linker scripts. |
+* New device support. |
+*
+*
+* | 2.90.1 |
+* Updated \ref group_system_config_heap_stack_config_gcc section with the note
+* on the dynamic memory allocation for ARM GCC. |
+* Documentation update. |
+*
+*
+* | Updated system_psoc6.h to include custom CY_SYSTEM_PSOC6_CONFIG passed as compiler macro. |
+* Improve configuration flexibility. |
+*
+*
+* | Updated attribute usage for the linker section placement in CM0+ startup code |
+* Enhancement based on usability feedback. |
+*
+*
+* | Renamed the '.cy_xip' linker script region as 'cy_xip' |
+* Enable access to the XIP region start/end addresses from the C code. |
+*
+*
+* | 2.90 |
+* Updated linker scripts for PSoC 64 Secure MCU cyb06xx7 devices. |
+* Flash allocation adjustment. |
+*
+*
+* | 2.80 |
+* Updated linker scripts for PSoC 64 Secure MCU devices. |
+* Updated FLASH and SRAM memory area definitions in cyb0xxx linker script templates
+* in accordance with the PSoC 64 Secure Boot SDK policies. |
+*
+*
+* | Added \ref Cy_PRA_Init() call to \ref SystemInit() Cortex-M0+ and Cortex-M4 functions for PSoC 64 Secure MCU. |
+* Updated PSoC 64 Secure MCU startup sequence to initialize the Protected Register Access driver. |
+*
+*
+* | 2.70.1 |
+* Updated documentation for the better description of the existing startup implementation. |
+* User experience enhancement. |
+*
+*
+* | 2.70 |
+* Updated \ref SystemCoreClockUpdate() implementation - The SysClk API is reused. |
+* Code optimization. |
+*
+*
+* | Updated \ref SystemInit() implementation - The IPC7 structure is initialized for both cores. |
+* Provided support for SysPM driver updates. |
+*
+*
+* | Updated the linker scripts. |
+* Reserved FLASH area for the MCU boot headers. |
+*
+*
+* | Added System Pipe initialization for all devices. |
+* Improved PDL usability according to user experience. |
+*
+*
+* | Removed redundant legacy macros: CY_CLK_EXT_FREQ_HZ, CY_CLK_ECO_FREQ_HZ and CY_CLK_ALTHF_FREQ_HZ.
+* Use \ref Cy_SysClk_ExtClkSetFrequency, \ref Cy_SysClk_EcoConfigure and \ref Cy_BLE_EcoConfigure functions instead them. |
+* Defect fixing. |
+*
+*
+* | 2.60 |
+* Updated linker scripts. |
+* Provided support for new devices, updated usage of CM0p prebuilt image. |
+*
+*
+* | 2.50 |
+* Updated assembler files, C files, linker scripts. |
+* Dynamic allocated HEAP size for Arm Compiler 6, IAR 8. |
+*
+*
+* | 2.40 |
+* Updated assembler files, C files, linker scripts. |
+* Added Arm Compiler 6 support. |
+*
+*
+* | 2.30 |
+* Added assembler files, linker scripts for Mbed OS. |
+* Added Arm Mbed OS embedded operating system support. |
+*
+*
+* | Updated linker scripts to extend the Flash and Ram memories size available for the CM4 core. |
+* Enhanced PDL usability. |
+*
+*
+* | 2.20 |
+* Moved the Cy_IPC_SystemSemaInit(), Cy_IPC_SystemPipeInit() functions implementation from IPC to Startup. |
+* Changed the IPC driver configuration method from compile time to run time. |
+*
+*
+* | 2.10 |
+* Added constructor attribute to SystemInit() function declaration for ARM MDK compiler. \n
+* Removed $Sub$$main symbol for ARM MDK compiler.
+* |
+* uVision Debugger support. |
+*
+*
+* | Updated description of the Startup behavior for Single-Core Devices. \n
+* Added note about WDT disabling by SystemInit() function.
+* |
+* Documentation improvement. |
+*
+*
+* | 2.0 |
+* Added restoring of FLL registers to the default state in SystemInit() API for single core devices.
+* Single core device support.
+* |
+* |
+*
+*
+* | Added Normal Access Restrictions, Public Key, TOC part2 and TOC part2 copy to Supervisory flash linker memory regions. \n
+* Renamed 'wflash' memory region to 'em_eeprom'.
+* |
+* Linker scripts usability improvement. |
+*
+*
+* | Added Cy_IPC_SystemSemaInit(), Cy_IPC_SystemPipeInit(), Cy_Flash_Init() functions call to SystemInit() API. |
+* Reserved system resources for internal operations. |
+*
+*
+* | Added clearing and releasing of IPC structure #7 (reserved for the Deep-Sleep operations) to SystemInit() API. |
+* To avoid deadlocks in case of SW or WDT reset during Deep-Sleep entering. |
+*
+*
+* | 1.0 |
+* Initial version |
+* |
+*
+*
+*
+*
+* \defgroup group_system_config_macro Macro
+* \{
+* \defgroup group_system_config_system_macro System
+* \defgroup group_system_config_cm4_status_macro Cortex-M4 Status
+* \defgroup group_system_config_user_settings_macro User Settings
+* \}
+* \defgroup group_system_config_functions Functions
+* \{
+* \defgroup group_system_config_system_functions System
+* \defgroup group_system_config_cm4_functions Cortex-M4 Control
+* \}
+* \defgroup group_system_config_globals Global Variables
+*
+* \}
+*/
+
+/**
+* \addtogroup group_system_config_system_functions
+* \{
+* \details
+* The following system functions implement CMSIS Core functions.
+* Refer to the [CMSIS documentation]
+* (http://www.keil.com/pack/doc/CMSIS/Core/html/group__system__init__gr.html "System and Clock Configuration")
+* for more details.
+* \}
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*******************************************************************************
+* Include files
+*******************************************************************************/
+#include