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Merge branch 'master' into dev-4.0.x

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This commit is contained in:
Bernard Xiong
2018-11-20 23:13:45 +08:00
committed by GitHub
parent b31888de49 6b6d122e36
commit 46dae3f35f
867 changed files with 264780 additions and 63524 deletions
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8
.gitignore vendored
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@@ -26,3 +26,11 @@ tools/kconfig-frontends/kconfig-mconf
packages
cconfig.h
GPUCache
#cscope files
cscope.*
ncscope.*
#ctag files
tags

2
.travis.yml
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@@ -12,7 +12,7 @@ before_script:
# - "[ $RTT_TOOL_CHAIN = 'sourcery-arm' ] && export RTT_EXEC_PATH=/usr/bin && arm-none-eabi-gcc --version || true"
# - "[ $RTT_TOOL_CHAIN = 'sourcery-arm' ] && curl -s https://sourcery.mentor.com/public/gnu_toolchain/arm-none-eabi/arm-2014.05-28-arm-none-eabi-i686-pc-linux-gnu.tar.bz2 | sudo tar xjf - -C /opt && export RTT_EXEC_PATH=/opt/arm-2014.05/bin && /opt/arm-2014.05/bin/arm-none-eabi-gcc --version || true"
- "[ $RTT_TOOL_CHAIN = 'sourcery-arm' ] && wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/arm-2017q2-v6/gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2 && sudo tar xjf gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2 -C /opt && export RTT_EXEC_PATH=/opt/gcc-arm-none-eabi-6-2017-q2-update/bin && /opt/gcc-arm-none-eabi-6-2017-q2-update/bin/arm-none-eabi-gcc --version || true"
- "[ $RTT_TOOL_CHAIN = 'sourcery-mips' ] && curl -s https://sourcery.mentor.com/public/gnu_toolchain/mips-sde-elf/mips-2012.09-98-mips-sde-elf-i686-pc-linux-gnu.tar.bz2 | sudo tar xjf - -C /opt && export RTT_EXEC_PATH=/opt/mips-2012.09/bin && /opt/mips-2012.09/bin/mips-sde-elf-gcc --version || true"
- "[ $RTT_TOOL_CHAIN = 'sourcery-mips' ] && curl -s https://sourcery.mentor.com/public/gnu_toolchain/mips-sde-elf/mips-2016.05-7-mips-sde-elf-i686-pc-linux-gnu.tar.bz2 | sudo tar xjf - -C /opt && export RTT_EXEC_PATH=/opt/mips-2016.05/bin && /opt/mips-2016.05/bin/mips-sde-elf-gcc --version || true"
# - "[ $RTT_TOOL_CHAIN = 'sourcery-ppc' ] && curl -s https://sourcery.mentor.com/public/gnu_toolchain/powerpc-eabi/freescale-2011.03-39-powerpc-eabi-i686-pc-linux-gnu.tar.bz2 | sudo tar xjf - -C /opt && export RTT_EXEC_PATH=/opt/freescale-2011.03/bin && /opt/freescale-2011.03/bin/powerpc-eabi-gcc --version || true"
# - "[ $RTT_TOOL_CHAIN = 'atmel-avr32' ] && curl -s http://www.atmel.com/images/avr32-gnu-toolchain-3.4.1.348-linux.any.x86.tar.gz | sudo tar xzf - -C /opt && export RTT_EXEC_PATH=/opt/avr32-gnu-toolchain-linux_x86/bin && /opt/avr32-gnu-toolchain-linux_x86/bin/avr32-gcc --version && curl -sO http://www.atmel.com/images/avr-headers-3.2.3.970.zip && unzip -qq avr-headers-3.2.3.970.zip -d bsp/$RTT_BSP || true"
- export RTT_ROOT=`pwd`

56
ChangeLog.md
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@@ -1,3 +1,59 @@
# RT-Thread v3.1.1 Change Log
## Kernel
* Support the configuration of the upward growth stack which is defined by the `ARCH_CPU_STACK_GROWS_UPWARD` macro. Because there are fewer ARCH for stacks growing upward, this configuration item does not display directly in menuconfig. When a CPU ARCH needs stacks growing upward, the configuration of `ARCH_CPU_STACK_GROWS_UPWARD` can be selected by BSP Kconfig file in default.
* Support for ARMCC V6 and later compiler (LLVM-based Compiler); currently it's mainly used in Keil MDK IDE. Please notes that the "Warnings" needs to use `Moderate Warnings` in project configuration in C/C++ (AC6) TAB; After using ARMCC v6, RT-Thread will add an additional `CLANG_ARM` macro definition; (liruncong, nongxiaoming, bernard)
* The `RT_USING_IDLE_HOOK` configuration in Kconfig becomes a separate configuration item, not limited to `RT_USING_HOOK`; (geniusgogo)
## Components
* Improve the PWM driver framework and add more interfaces.
* Fix the F_SETFL handling in ioctrl function; Fix the return value issue of fcntl function which is always 0 value.
* Fix the memheap object type issue when creating a ramfs object.
* Add power management framework for low power applications.
* Add multi-segment support for read and write operations in MC/SDIO driver framework (for stm32, you can choose a separate stm32_sdio package); (weety)
* Add ringblk_buf component for the block mode but in ringbuffer applications;
* Improve WLAN management framework with unified interfaces, management, commands, to provide more friendly support to developers and users;
* Add the conditional macro in the finsh when the MSH component is not enabled, even if the code files are compiled.
* Remove gdbstub and move to rt-thread packages.
* Upgrade and improve SAL and AT components: (linuxhan, eddylin83, slyant, luofanlu, Hubert Xie, Lawlieta, zhaojuntao, armink)
* Fix the none cleared issue when closing socket in SAL, which lead to the socket is always holding.
* Fix the `select()` issue for UDP communication in AT component. Add the receiving data handling to complete the clearing of received event;
* Add the errno value when receive data timeout in at_recvfrom function in the AT component.
* Add the receive data timeout handling in at_client_recv function in the AT component.
* Fix a possible issue in fputc function implementation when using microlib;
* Add gmtime_r implementation for ARMCC, IAR tool chain;
* Improve time function support in IAR and support 64bit time; (hichard)
* DHCPD's support for IPv6;
* Remove lwIP-1.3.2 porting and add lwIP-2.1.0 porting; lwIP-2.0.2 is still the default version.
* Add a lightweight ulog component and automatically replace the debug macro of the original rtdbg.h when it's enable.
* USB stack update
* HOST, optimize the USB HOST timeout mechanism; fix the un-alignment visit issue in F4xx-HAL USB host driver;
* Device: Add the check when class drivers are illegally registered; Fix the un-aligned access issue in some platforms; optimize CDC VCOM classes, add the timeout mechanism and ID definition.
## BSP
* Upgrade the wlan adaptor to the new version of Wi-Fi management framework in amebaz BSP.
* Add airkiss wifi configuration code to amebaz BSP.
* Update Apollo2 BSP with ADC, GPIO, I2C, PDM, SPI, UART and other drivers; (Haleyl)
* BeagleBone BSP is changed to main function mode, and adds Kconfig configuration file.
* DM365 BSP adds Kconfig configuration file;
* Update HiFive1 BSP and add more documentation.
* Update imx6sx BSP to main function mode, and add Kconfig configuration file.
* Change the old imxrt1052-evk BSP. The imxrt1052-related BSPs are classified into the `bsp/imxrt` directory; A touch framework is added to `bsp/imxrt`, and later will be moved into `components/drivers` directory;
* Improve stm32f4xx-HAL BSP with PWM, I2C, USB Host driver; (XuanZe, xuzhuoyi)
* Improve stm32f10x BSP with CAN driver and increase I2C driver; (wuhanstudio, AubrCool)
* Improve stm32f10x-HAL BSP with I2C, IWG, PWM, RTC and other drivers, improve UART driver; (XuanZe)
* Improve stm32f429-disco BSP and add I2C, LCD, Touch driver; (xuzhuoyi)
* Improve x86 BSP, support dlmodule function; (SASANO Takayoshi, parai)
## Tool
* Modify the building script to support Python 3; <Python 3 patches have been submitted to scons and need to wait for next scons release，maybe scons-3.0.2> (Arda)
* Add `scons --pyconfig` mode, which has a TK UI configurator; (weety)
* Support for GNU GCC 7/8 version toolchains (The `-std=c99` is not added into C-compiler flags), but please note: PThreads component failed in 2.5 and new version of newlib.
# RT-Thread 3.1.0 Change Log
## Kernel

46
bsp/allwinner_tina/drivers/drv_gpio.c
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@@ -53,7 +53,7 @@ int gpio_set_func(enum gpio_port port, enum gpio_pin pin, rt_uint8_t func)
if (func & 0x8)
{
dbg_log(DBG_WARNING, "[line]:%d There is a warning with parameter input\n", __LINE__);
LOG_W("[line]:%d There is a warning with parameter input", __LINE__);
return RT_EINVAL;
}
@@ -65,7 +65,7 @@ int gpio_set_func(enum gpio_port port, enum gpio_pin pin, rt_uint8_t func)
data |= func << offset;
writel(data, addr);
dbg_log(DBG_LOG, "[line]:%d offset:%d addr:%08x data:%08x\n", __LINE__, offset, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d offset:%d addr:%08x data:%08x", __LINE__, offset, addr, *((rt_uint32_t *)addr));
return RT_EOK;
}
@@ -80,7 +80,7 @@ int gpio_set_value(enum gpio_port port, enum gpio_pin pin, rt_uint8_t value)
if (value & 0xE)
{
dbg_log(DBG_WARNING, "[line]:%d There is a warning with parameter input\n", __LINE__);
LOG_W("[line]:%d There is a warning with parameter input", __LINE__);
return RT_EINVAL;
}
@@ -92,7 +92,7 @@ int gpio_set_value(enum gpio_port port, enum gpio_pin pin, rt_uint8_t value)
data |= value << offset;
writel(data, addr);
dbg_log(DBG_LOG, "[line]:%d offset:%d addr:%08x data:%08x\n", __LINE__, offset, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d offset:%d addr:%08x data:%08x", __LINE__, offset, addr, *((rt_uint32_t *)addr));
return RT_EOK;
}
@@ -110,7 +110,7 @@ int gpio_get_value(enum gpio_port port, enum gpio_pin pin)
data = readl(addr);
dbg_log(DBG_LOG, "[line]:%d offset:%d addr:%08x data:%08x\n", __LINE__, offset, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d offset:%d addr:%08x data:%08x", __LINE__, offset, addr, *((rt_uint32_t *)addr));
return (data >> offset) & 0x01;
}
@@ -125,7 +125,7 @@ int gpio_set_pull_mode(enum gpio_port port, enum gpio_pin pin, enum gpio_pull p
if (pull & 0xC)
{
dbg_log(DBG_WARNING, "[line]:%d There is a warning with parameter input\n", __LINE__);
LOG_W("[line]:%d There is a warning with parameter input", __LINE__);
return RT_EINVAL;
}
@@ -138,7 +138,7 @@ int gpio_set_pull_mode(enum gpio_port port, enum gpio_pin pin, enum gpio_pull p
data |= pull << offset;
writel(data, addr);
dbg_log(DBG_LOG, "[line]:%d offset:%d addr:%08x data:%08x\n", __LINE__, offset, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d offset:%d addr:%08x data:%08x", __LINE__, offset, addr, *((rt_uint32_t *)addr));
return RT_EOK;
}
@@ -153,7 +153,7 @@ int gpio_set_drive_level(enum gpio_port port, enum gpio_pin pin, enum gpio_drv_l
if (level & 0xC)
{
dbg_log(DBG_WARNING, "[line]:%d There is a warning with parameter input\n", __LINE__);
LOG_W("[line]:%d There is a warning with parameter input", __LINE__);
return RT_EINVAL;
}
@@ -166,7 +166,7 @@ int gpio_set_drive_level(enum gpio_port port, enum gpio_pin pin, enum gpio_drv_l
data |= level << offset;
writel(data, addr);
dbg_log(DBG_LOG, "[line]:%d offset:%d addr:%08x data:%08x\n", __LINE__, offset, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d offset:%d addr:%08x data:%08x", __LINE__, offset, addr, *((rt_uint32_t *)addr));
return RT_EOK;
}
@@ -187,7 +187,7 @@ void gpio_direction_input(enum gpio_port port, enum gpio_pin pin)
data |= IO_INPUT << offset;
writel(data, addr);
dbg_log(DBG_LOG, "[line]:%d offset:%d addr:%08x data:%08x\n", __LINE__, offset, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d offset:%d addr:%08x data:%08x", __LINE__, offset, addr, *((rt_uint32_t *)addr));
}
void gpio_direction_output(enum gpio_port port, enum gpio_pin pin, int value)
@@ -208,7 +208,7 @@ void gpio_direction_output(enum gpio_port port, enum gpio_pin pin, int value)
data |= IO_OUTPUT << offset;
writel(data, addr);
dbg_log(DBG_LOG, "[line]:%d offset:%d addr:%08x data:%08x\n", __LINE__, offset, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d offset:%d addr:%08x data:%08x", __LINE__, offset, addr, *((rt_uint32_t *)addr));
}
/*********************************************************
** IRQ
@@ -237,7 +237,7 @@ void gpio_select_irq_clock(enum gpio_port port, enum gpio_irq_clock clock)
data &= ~0x01;
data |= clock;
writel(data, addr);
dbg_log(DBG_LOG, "[line]:%d addr:%08x data:%08x\n", __LINE__, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d addr:%08x data:%08x", __LINE__, addr, *((rt_uint32_t *)addr));
}
void gpio_set_debounce(enum gpio_port port, enum gpio_direction_type prescaler)
@@ -253,7 +253,7 @@ void gpio_set_debounce(enum gpio_port port, enum gpio_direction_type prescaler)
data &= ~(0x07 << 4);
data |= prescaler << 4;
writel(data, addr);
dbg_log(DBG_LOG, "[line]:%d addr:%08x data:%08x\n", __LINE__, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d addr:%08x data:%08x", __LINE__, addr, *((rt_uint32_t *)addr));
}
void gpio_irq_enable(enum gpio_port port, enum gpio_pin pin)
@@ -272,7 +272,7 @@ void gpio_irq_enable(enum gpio_port port, enum gpio_pin pin)
data |= 0x1 << offset;
writel(data, addr);
gpio_select_irq_clock(port, GPIO_IRQ_HOSC_24MHZ);
dbg_log(DBG_LOG, "[line]:%d offset:%d addr:%08x data:%08x\n", __LINE__, offset, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d offset:%d addr:%08x data:%08x", __LINE__, offset, addr, *((rt_uint32_t *)addr));
}
void gpio_irq_disable(enum gpio_port port, enum gpio_pin pin)
@@ -292,7 +292,7 @@ void gpio_irq_disable(enum gpio_port port, enum gpio_pin pin)
data &= ~(0x1 << offset);
writel(data, addr);
dbg_log(DBG_LOG, "[line]:%d offset:%d addr:%08x data:%08x\n", __LINE__, offset, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d offset:%d addr:%08x data:%08x", __LINE__, offset, addr, *((rt_uint32_t *)addr));
}
void gpio_set_irq_type(enum gpio_port port, enum gpio_pin pin, enum gpio_irq_type irq_type)
@@ -312,7 +312,7 @@ void gpio_set_irq_type(enum gpio_port port, enum gpio_pin pin, enum gpio_irq_ty
data |= irq_type << offset;
writel(data, addr);
dbg_log(DBG_LOG, "[line]:%d offset:%d addr:%08x data:%08x\n", __LINE__, offset, addr, *((rt_uint32_t *)addr));
LOG_D("[line]:%d offset:%d addr:%08x data:%08x", __LINE__, offset, addr, *((rt_uint32_t *)addr));
}
static struct gpio_irq_def _g_gpio_irq_tbl[GPIO_PORT_NUM];
@@ -353,7 +353,7 @@ static void gpio_irq_handler(int irq, void *param)
{
if ((pend & 0x1) && (irq_def->irq_cb[pin] != RT_NULL))
{
dbg_log(DBG_LOG, "do irq callback...\n", port, pin);
LOG_D("do irq callback...", port, pin);
irq_def->irq_cb[pin](irq_def->irq_arg[pin]);
}
pin++;
@@ -452,7 +452,7 @@ static void pin_mode(struct rt_device *dev, rt_base_t pin, rt_base_t mode)
{
if ((pin > PIN_NUM(pin_index)) || (pin_index[pin].magic != PIN_MAGIC))
{
dbg_log(DBG_ERROR, "pin:%d value wrongful\n", pin);
LOG_E("pin:%d value wrongful", pin);
return;
}
@@ -463,7 +463,7 @@ static void pin_write(struct rt_device *dev, rt_base_t pin, rt_base_t value)
{
if ((pin > PIN_NUM(pin_index)) || (pin_index[pin].magic != PIN_MAGIC))
{
dbg_log(DBG_ERROR, "pin:%d value wrongful\n", pin);
LOG_E("pin:%d value wrongful", pin);
return;
}
@@ -474,7 +474,7 @@ static int pin_read(struct rt_device *device, rt_base_t pin)
{
if ((pin > PIN_NUM(pin_index)) || (pin_index[pin].magic != PIN_MAGIC))
{
dbg_log(DBG_ERROR, "pin:%d value wrongful\n", pin);
LOG_E("pin:%d value wrongful", pin);
return 0;
}
@@ -485,7 +485,7 @@ static rt_err_t pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint
{
if ((pin > PIN_NUM(pin_index)) || (pin_index[pin].magic != PIN_MAGIC))
{
dbg_log(DBG_ERROR, "pin:%d value wrongful\n", pin);
LOG_E("pin:%d value wrongful", pin);
return RT_ERROR;
}
@@ -497,7 +497,7 @@ static rt_err_t pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{
if ((pin > PIN_NUM(pin_index)) || (pin_index[pin].magic != PIN_MAGIC))
{
dbg_log(DBG_ERROR, "pin:%d value wrongful\n", pin);
LOG_E("pin:%d value wrongful", pin);
return RT_ERROR;
}
@@ -510,7 +510,7 @@ rt_err_t pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t ena
{
if ((pin > PIN_NUM(pin_index)) || (pin_index[pin].magic != PIN_MAGIC))
{
dbg_log(DBG_ERROR, "pin:%d value wrongful\n", pin);
LOG_E("pin:%d value wrongful", pin);
return RT_ERROR;
}

44
bsp/allwinner_tina/drivers/drv_sdio.c
View File

@@ -99,7 +99,7 @@ static void mmc_delay_us(int us)
static void mmc_dump_errinfo(unsigned int err)
{
dbg_log(DBG_ERROR, "[err]:0x%08x, %s%s%s%s%s%s%s%s%s%s%s\n",
LOG_E("[err]:0x%08x, %s%s%s%s%s%s%s%s%s%s%s",
err,
err & SDXC_RespErr ? " RE" : "",
err & SDXC_RespCRCErr ? " RCE" : "",
@@ -130,7 +130,7 @@ static int mmc_update_clk(tina_mmc_t mmc)
}
if (!timeout)
{
dbg_log(DBG_ERROR, "mmc update clk failed\n");
LOG_E("mmc update clk failed");
return -RT_ERROR;
}
/* clean interrupt */
@@ -189,8 +189,8 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe)
pdes[des_idx].buf_addr_ptr2 = (unsigned long)&pdes[des_idx+1];
}
dbg_log(DBG_LOG, "frag %d, remain %d, des[%d](%08x): " \
"[0] = %08x, [1] = %08x, [2] = %08x, [3] = %08x\n", \
LOG_D("frag %d, remain %d, des[%d](%08x): " \
"[0] = %08x, [1] = %08x, [2] = %08x, [3] = %08x", \
i, remain, des_idx, (unsigned int)&pdes[des_idx],
(unsigned int)((unsigned int*)&pdes[des_idx])[0], (unsigned int)((unsigned int*)&pdes[des_idx])[1],
(unsigned int)((unsigned int*)&pdes[des_idx])[2], (unsigned int)((unsigned int*)&pdes[des_idx])[3]);
@@ -243,7 +243,7 @@ static rt_err_t mmc_trans_data_by_cpu(tina_mmc_t mmc, struct mmc_xfe_des *xfe)
if (timeout <= 0)
{
dbg_log(DBG_ERROR, "write data by cpu failed status:0x%08x\n", mmc->star_reg);
LOG_E("write data by cpu failed status:0x%08x", mmc->star_reg);
return -RT_ERROR;
}
mmc->fifo_reg = buff[i];
@@ -258,7 +258,7 @@ static rt_err_t mmc_trans_data_by_cpu(tina_mmc_t mmc, struct mmc_xfe_des *xfe)
if (timeout <= 0)
{
dbg_log(DBG_ERROR, "read data by cpu failed status:0x%08x\n", mmc->star_reg);
LOG_E("read data by cpu failed status:0x%08x", mmc->star_reg);
return -RT_ERROR;
}
buff[i] = mmc->fifo_reg;
@@ -279,7 +279,7 @@ static rt_err_t mmc_config_clock(tina_mmc_t mmc, int clk)
mmc->ckcr_reg = rval;
if (mmc_update_clk(mmc) != RT_EOK)
{
dbg_log(DBG_ERROR, "clk update fail line:%d\n", __LINE__);
LOG_E("clk update fail line:%d", __LINE__);
return -RT_ERROR;
}
@@ -298,7 +298,7 @@ static rt_err_t mmc_config_clock(tina_mmc_t mmc, int clk)
mmc->ckcr_reg = rval;
if(mmc_update_clk(mmc) != RT_EOK)
{
dbg_log(DBG_ERROR, "clk update fail line:%d\n", __LINE__);
LOG_E("clk update fail line:%d", __LINE__);
return -RT_ERROR;
}
@@ -307,12 +307,12 @@ static rt_err_t mmc_config_clock(tina_mmc_t mmc, int clk)
static rt_err_t mmc_set_ios(tina_mmc_t mmc, int clk, int bus_width)
{
dbg_log(DBG_LOG, "mmc set io bus width:%d clock:%d\n", \
LOG_D("mmc set io bus width:%d clock:%d", \
(bus_width == MMCSD_BUS_WIDTH_8 ? 8 : (bus_width == MMCSD_BUS_WIDTH_4 ? 4 : 1)), clk);
/* change clock */
if (clk && (mmc_config_clock(mmc, clk) != RT_EOK))
{
dbg_log(DBG_ERROR, "update clock failed\n");
LOG_E("update clock failed");
return -RT_ERROR;
}
@@ -349,13 +349,13 @@ static int mmc_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd)
status = mmc->star_reg;
while (status & (1 << 9))
{
dbg_log(DBG_LOG, "note: check card busy\n");
LOG_D("note: check card busy");
status = mmc->star_reg;
if (!timeout--)
{
err = -1;
dbg_log(DBG_ERROR, "mmc cmd12 busy timeout data:0x%08x\n", status);
LOG_E("mmc cmd12 busy timeout data:0x%08x", status);
return err;
}
mmc_delay_us(1);
@@ -397,7 +397,7 @@ static int mmc_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd)
mmc->bycr_reg = bytecnt;
}
dbg_log(DBG_LOG, "cmd %d(0x%08x), arg 0x%08x\n", cmd->cmd_code, cmdval | cmd->cmd_code, cmd->arg);
LOG_D("cmd %d(0x%08x), arg 0x%08x", cmd->cmd_code, cmdval | cmd->cmd_code, cmd->arg);
mmc->cagr_reg = cmd->arg;
if (!data)
{
@@ -412,7 +412,7 @@ static int mmc_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd)
*/
if (data)
{
dbg_log(DBG_LOG, "mmc trans data %d bytes addr:0x%08x\n", bytecnt, data);
LOG_D("mmc trans data %d bytes addr:0x%08x", bytecnt, data);
#ifdef CONFIG_MMC_USE_DMA
if (bytecnt > 64)
{
@@ -478,13 +478,13 @@ static int mmc_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd)
cmd->resp[2] = mmc->resp1_reg;
cmd->resp[1] = mmc->resp2_reg;
cmd->resp[0] = mmc->resp3_reg;
dbg_log(DBG_LOG, "mmc resp 0x%08x 0x%08x 0x%08x 0x%08x\n",
LOG_D("mmc resp 0x%08x 0x%08x 0x%08x 0x%08x",
cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
}
else
{
cmd->resp[0] = mmc->resp0_reg;
dbg_log(DBG_LOG, "mmc resp 0x%08x\n", cmd->resp[0]);
LOG_D("mmc resp 0x%08x", cmd->resp[0]);
}
out:
@@ -516,16 +516,16 @@ out:
mmc->gctl_reg = mmc->gctl_reg | 0x80000000;
mmc->dbgc_reg = 0xdeb;
timeout = 1000;
dbg_log(DBG_LOG, "Read remain data\n");
LOG_D("Read remain data");
while (mmc->bbcr_reg < 512)
{
unsigned int tmp = mmc->fifo_reg;
tmp = tmp;
dbg_log(DBG_LOG, "Read data 0x%08x, bbcr 0x%04x\n", tmp, mmc->bbcr_reg);
LOG_D("Read data 0x%08x, bbcr 0x%04x", tmp, mmc->bbcr_reg);
mmc_delay_us(1);
if (!(timeout--))
{
dbg_log(DBG_ERROR, "Read remain data timeout\n");
LOG_E("Read remain data timeout");
break;
}
}
@@ -536,7 +536,7 @@ out:
mmc_update_clk(mmc);
cmd->err = -RT_ETIMEOUT;
dbg_log(DBG_ERROR, "mmc cmd %d err\n", cmd->cmd_code);
LOG_E("mmc cmd %d err", cmd->cmd_code);
}
mmc->gctl_reg &= ~(0x1 << 4);
@@ -744,13 +744,13 @@ int tina_sdio_init(void)
host = mmcsd_alloc_host();
if (!host)
{
dbg_log(DBG_ERROR, "alloc host failed\n");
LOG_E("alloc host failed");
goto err;
}
if (rt_sem_init(&_sdio_drv.rt_sem, "sdio_sem", RT_NULL, RT_IPC_FLAG_FIFO))
{
dbg_log(DBG_ERROR, "sem init failed\n");
LOG_E("sem init failed");
goto err;
}
_sdio_drv.mmc_des = (tina_mmc_t)MMC0_BASE_ADDR;

105
bsp/allwinner_tina/drivers/spi/drv_spi.c
View File

@@ -33,25 +33,22 @@
#define SPI_BUS_MAX_CLK (30 * 1000 * 1000)
//#define DEBUG
#define DBG_ENABLE
#define DBG_SECTION_NAME "SPI"
#ifdef DEBUG
#define DBG_LEVEL DBG_LOG
#else
#define DBG_LEVEL DBG_WARNING
#endif /* DEBUG */
#define DBG_COLOR
#include <rtdbg.h>
#ifdef RT_USING_SPI
//#define DEBUG
#define ARR_LEN(__N) (sizeof(__N) / sizeof(__N[0]))
#ifdef DEBUG
#define DEBUG_PRINTF(...) rt_kprintf(__VA_ARGS__)
#else
#define DEBUG_PRINTF(...)
#endif
#define __SPI_STATIC_INLINE__ rt_inline
/*
@@ -451,30 +448,30 @@ static rt_err_t configure(struct rt_spi_device *device,
struct tina_spi *_spi_info = (struct tina_spi *)spi_bus->parent.user_data;
SPI_T *spi = _spi_info->spi;
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
RT_ASSERT(device != RT_NULL);
RT_ASSERT(configuration != RT_NULL);
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
DEBUG_PRINTF("spi address: %08X\n", (rt_uint32_t)spi);
LOG_D("spi address: %08X", (rt_uint32_t)spi);
SPI_Disable(spi);
SPI_Reset(spi);
SPI_ResetRxFifo(spi);
SPI_ResetTxFifo(spi);
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
/* data_width */
if (configuration->data_width != 8)
{
DEBUG_PRINTF("error: data_width is %d\n", configuration->data_width);
LOG_D("error: data_width is %d", configuration->data_width);
return RT_EIO;
}
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
SPI_SetDuplex(spi, SPI_TCTRL_DHB_FULL_DUPLEX);
SPI_SetMode(spi, SPI_CTRL_MODE_MASTER);
@@ -510,7 +507,7 @@ static rt_err_t configure(struct rt_spi_device *device,
rt_uint32_t max_hz;
rt_uint32_t div;
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
max_hz = configuration->max_hz;
@@ -520,14 +517,14 @@ static rt_err_t configure(struct rt_spi_device *device,
}
spi_clock = ahb_get_clk();
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
div = (spi_clock + max_hz - 1) / max_hz;
dbg_log(DBG_LOG, "configuration->max_hz: %d\n", configuration->max_hz);
dbg_log(DBG_LOG, "max freq: %d\n", max_hz);
dbg_log(DBG_LOG, "spi_clock: %d\n", spi_clock);
dbg_log(DBG_LOG, "div: %d\n", div);
LOG_D("configuration->max_hz: %d", configuration->max_hz);
LOG_D("max freq: %d", max_hz);
LOG_D("spi_clock: %d", spi_clock);
LOG_D("div: %d", div);
SPI_SetClkDiv(spi, div / 2);
} /* baudrate */
@@ -536,7 +533,7 @@ static rt_err_t configure(struct rt_spi_device *device,
SPI_SetDataSize(spi, 0, 0);
SPI_Enable(spi);
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
return RT_EOK;
};
@@ -552,19 +549,19 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message *mes
RT_ASSERT(device != NULL);
RT_ASSERT(message != NULL);
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
DEBUG_PRINTF("spi_info: %08X\n", (rt_uint32_t)_spi_info);
DEBUG_PRINTF("spi address: %08X\n", (rt_uint32_t)spi);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
LOG_D("spi_info: %08X", (rt_uint32_t)_spi_info);
LOG_D("spi address: %08X", (rt_uint32_t)spi);
/* take CS */
if (message->cs_take)
{
SPI_ManualChipSelect(spi, tina_spi_cs->cs);
SPI_SetCsLevel(spi, false);
DEBUG_PRINTF("spi take cs\n");
LOG_D("spi take cs");
}
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
{
if ((config->data_width <= 8) && (message->length > 0))
@@ -574,7 +571,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message *mes
rt_uint32_t tx_size = message->length;
rt_uint32_t rx_size = message->length;
DEBUG_PRINTF("spi poll transfer start: %d\n", tx_size);
LOG_D("spi poll transfer start: %d", tx_size);
SPI_ResetTxFifo(spi);
SPI_ResetRxFifo(spi);
@@ -582,7 +579,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message *mes
SPI_StartTransmit(spi);
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
while (tx_size > 0 || rx_size > 0)
{
@@ -611,25 +608,25 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message *mes
}
}
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
if ((tx_size != 0) || (rx_size != 0))
{
DEBUG_PRINTF("spi_tx_rx error with tx count = %d, rx count = %d.\n", tx_size, rx_size);
LOG_D("spi_tx_rx error with tx count = %d, rx count = %d.", tx_size, rx_size);
return 0;
}
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
while (SPI_IntState(spi, SPI_INT_TRANSFER_COMPLETE) == 0);
SPI_ClearInt(spi, SPI_INT_TRANSFER_COMPLETE);
DEBUG_PRINTF("spi poll transfer finsh\n");
LOG_D("spi poll transfer finsh");
}
else if (config->data_width > 8)
{
DEBUG_PRINTF("data width: %d\n", config->data_width);
LOG_D("data width: %d", config->data_width);
RT_ASSERT(NULL);
}
}
@@ -638,7 +635,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message *mes
if (message->cs_release)
{
SPI_SetCsLevel(spi, true);
DEBUG_PRINTF("spi release cs\n");
LOG_D("spi release cs");
}
return message->length;
@@ -676,7 +673,7 @@ rt_err_t tina_spi_bus_register(SPI_T *spi, const char *spi_bus_name)
{
int i;
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
RT_ASSERT(spi_bus_name != RT_NULL);
@@ -688,67 +685,67 @@ rt_err_t tina_spi_bus_register(SPI_T *spi, const char *spi_bus_name)
bus_gate_clk_enalbe(spis[i].spi_gate);
spis[i].spi_bus->parent.user_data = (void *)&spis[i];
DEBUG_PRINTF("bus addr: %08X\n", (rt_uint32_t)spis[i].spi_bus);
DEBUG_PRINTF("user_data: %08X\n", (rt_uint32_t)spis[i].spi_bus->parent.user_data);
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("bus addr: %08X", (rt_uint32_t)spis[i].spi_bus);
LOG_D("user_data: %08X", (rt_uint32_t)spis[i].spi_bus->parent.user_data);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
rt_spi_bus_register(spis[i].spi_bus, spi_bus_name, &tina_spi_ops);
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
return RT_EOK;
}
}
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
return RT_ERROR;
}
int rt_hw_spi_init(void)
{
DEBUG_PRINTF("register spi bus\n");
LOG_D("register spi bus");
#ifdef TINA_USING_SPI0
/* register spi bus */
{
rt_err_t result;
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
gpio_set_func(GPIO_PORT_C, GPIO_PIN_0, IO_FUN_1);
gpio_set_func(GPIO_PORT_C, GPIO_PIN_2, IO_FUN_1);
gpio_set_func(GPIO_PORT_C, GPIO_PIN_3, IO_FUN_1);
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
result = tina_spi_bus_register((SPI_T *)SPI0_BASE_ADDR, "spi0");
if (result != RT_EOK)
{
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
return result;
}
}
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
/* attach cs */
{
static struct rt_spi_device spi_device;
static struct tina_spi_cs spi_cs;
rt_err_t result;
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
spi_cs.cs = SPI_TCTRL_SS_SEL_SS0;
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
gpio_set_func(GPIO_PORT_C, GPIO_PIN_1, IO_FUN_1);
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
result = rt_spi_bus_attach_device(&spi_device, "spi00", "spi0", (void *)&spi_cs);
if (result != RT_EOK)
{
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
return result;
}
}
DEBUG_PRINTF("%s -> %d\n", __FUNCTION__, __LINE__);
LOG_D("%s -> %d", __FUNCTION__, __LINE__);
#endif
#ifdef TINA_USING_SPI1
@@ -763,12 +760,12 @@ int rt_hw_spi_init(void)
result = tina_spi_bus_register((SPI_T *)SPI1_BASE_ADDR, "spi1");
if (result != RT_EOK)
{
DEBUG_PRINTF("register spi bus faild: %d\n", result);
LOG_D("register spi bus faild: %d", result);
return result;
}
}
DEBUG_PRINTF("attach cs\n");
LOG_D("attach cs");
/* attach cs */
{
static struct rt_spi_device spi_device;
@@ -781,7 +778,7 @@ int rt_hw_spi_init(void)
result = rt_spi_bus_attach_device(&spi_device, "spi10", "spi1", (void *)&spi_cs);
if (result != RT_EOK)
{
DEBUG_PRINTF("attach cs faild: %d\n", result);
LOG_D("attach cs faild: %d", result);
return result;
}
}

5
bsp/imxrt/Libraries/imxrt1050/drivers/SConscript
View File

@@ -38,8 +38,6 @@ if GetDepend('RT_USING_I2C'):
# add lcd driver code
if GetDepend('RT_USING_LCD'):
src += ['drv_lcd.c']
if GetDepend('BOARD_RT1050_EVK') and GetDepend('PKG_USING_GUIENGINE'):
src += ['drv_ft5406.c']
# add sdio driver code
if GetDepend('RT_USING_SDIO'):
@@ -67,6 +65,9 @@ if GetDepend('BOARD_RT1050_ATK') and GetDepend('RT_USING_LWIP'):
if GetDepend('RT_USING_AUDIO'):
src += ['drv_codec.c', 'fsl_wm8960.c']
if GetDepend('PKG_USING_GUIENGINE'):
src += Glob('touch/*.c')
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)

52
bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth.c
View File

@@ -672,13 +672,13 @@ static void _enet_config(void)
/* Set SMI to get PHY link status. */
sysClock = CLOCK_GetFreq(kCLOCK_AhbClk);
dbg_log(DBG_LOG, "deinit\n");
LOG_D("deinit");
ENET_Deinit(imxrt_eth_device.enet_base);
dbg_log(DBG_LOG, "init\n");
LOG_D("init");
ENET_Init(imxrt_eth_device.enet_base, &imxrt_eth_device.enet_handle, &config, &buffConfig, &imxrt_eth_device.dev_addr[0], sysClock);
dbg_log(DBG_LOG, "set call back\n");
LOG_D("set call back");
ENET_SetCallback(&imxrt_eth_device.enet_handle, _enet_callback, &imxrt_eth_device);
dbg_log(DBG_LOG, "active read\n");
LOG_D("active read");
ENET_ActiveRead(imxrt_eth_device.enet_base);
}
@@ -722,7 +722,7 @@ static void packet_dump(const char *msg, const struct pbuf *p)
/* initialize the interface */
static rt_err_t rt_imxrt_eth_init(rt_device_t dev)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_init...\n");
LOG_D("rt_imxrt_eth_init...");
_enet_config();
return RT_EOK;
@@ -730,33 +730,33 @@ static rt_err_t rt_imxrt_eth_init(rt_device_t dev)
static rt_err_t rt_imxrt_eth_open(rt_device_t dev, rt_uint16_t oflag)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_open...\n");
LOG_D("rt_imxrt_eth_open...");
return RT_EOK;
}
static rt_err_t rt_imxrt_eth_close(rt_device_t dev)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_close...\n");
LOG_D("rt_imxrt_eth_close...");
return RT_EOK;
}
static rt_size_t rt_imxrt_eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_read...\n");
LOG_D("rt_imxrt_eth_read...");
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_size_t rt_imxrt_eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_write...\n");
LOG_D("rt_imxrt_eth_write...");
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_err_t rt_imxrt_eth_control(rt_device_t dev, int cmd, void *args)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_control...\n");
LOG_D("rt_imxrt_eth_control...");
switch (cmd)
{
case NIOCTL_GADDR:
@@ -965,7 +965,7 @@ rt_err_t rt_imxrt_eth_tx(rt_device_t dev, struct pbuf *p)
RT_ASSERT(p != NULL);
RT_ASSERT(enet_handle != RT_NULL);
dbg_log(DBG_LOG, "rt_imxrt_eth_tx: %d\n", p->len);
LOG_D("rt_imxrt_eth_tx: %d", p->len);
#ifdef ETH_TX_DUMP
packet_dump("send", p);
@@ -1019,18 +1019,18 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev)
}
else
{
dbg_log(DBG_LOG, " A frame read failed\n");
LOG_D(" A frame read failed");
pbuf_free(p);
}
}
else
{
dbg_log(DBG_LOG, " pbuf_alloc faild\n");
LOG_D(" pbuf_alloc faild");
}
}
else if (status == kStatus_ENET_RxFrameError)
{
dbg_log(DBG_WARNING, "ENET_GetRxFrameSize: kStatus_ENET_RxFrameError\n");
LOG_W("ENET_GetRxFrameSize: kStatus_ENET_RxFrameError");
/* Update the received buffer when error happened. */
/* Get the error information of the received g_frame. */
ENET_GetRxErrBeforeReadFrame(enet_handle, error_statistic);
@@ -1068,20 +1068,20 @@ static void phy_monitor_thread_entry(void *parameter)
if (kPHY_Speed10M == speed)
{
dbg_log(DBG_LOG, "10M\n");
LOG_D("10M");
}
else
{
dbg_log(DBG_LOG, "100M\n");
LOG_D("100M");
}
if (kPHY_HalfDuplex == duplex)
{
dbg_log(DBG_LOG, "half dumplex\n");
LOG_D("half dumplex");
}
else
{
dbg_log(DBG_LOG, "full dumplex\n");
LOG_D("full dumplex");
}
if ((imxrt_eth_device.speed != (enet_mii_speed_t)speed)
@@ -1090,19 +1090,19 @@ static void phy_monitor_thread_entry(void *parameter)
imxrt_eth_device.speed = (enet_mii_speed_t)speed;
imxrt_eth_device.duplex = (enet_mii_duplex_t)duplex;
dbg_log(DBG_LOG, "link up, and update eth mode.\n");
LOG_D("link up, and update eth mode.");
rt_imxrt_eth_init((rt_device_t)&imxrt_eth_device);
}
else
{
dbg_log(DBG_LOG, "link up, eth not need re-config.\n");
LOG_D("link up, eth not need re-config.");
}
dbg_log(DBG_LOG, "link up.\n");
LOG_D("link up.");
eth_device_linkchange(&imxrt_eth_device.parent, RT_TRUE);
}
else // link down
{
dbg_log(DBG_LOG, "link down.\n");
LOG_D("link down.");
eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);
}
}
@@ -1152,20 +1152,20 @@ static int rt_hw_imxrt_eth_init(void)
imxrt_eth_device.parent.eth_rx = rt_imxrt_eth_rx;
imxrt_eth_device.parent.eth_tx = rt_imxrt_eth_tx;
dbg_log(DBG_LOG, "sem init: tx_wait\r\n");
LOG_D("sem init: tx_wait\r");
/* init tx semaphore */
rt_sem_init(&imxrt_eth_device.tx_wait, "tx_wait", 0, RT_IPC_FLAG_FIFO);
/* register eth device */
dbg_log(DBG_LOG, "eth_device_init start\r\n");
LOG_D("eth_device_init start\r");
state = eth_device_init(&(imxrt_eth_device.parent), "e0");
if (RT_EOK == state)
{
dbg_log(DBG_LOG, "eth_device_init success\r\n");
LOG_D("eth_device_init success\r");
}
else
{
dbg_log(DBG_LOG, "eth_device_init faild: %d\r\n", state);
LOG_D("eth_device_init faild: %d\r", state);
}
eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);

52
bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth_fire.c
View File

@@ -376,13 +376,13 @@ static void _enet_config(void)
/* Set SMI to get PHY link status. */
sysClock = CLOCK_GetFreq(kCLOCK_AhbClk);
dbg_log(DBG_LOG, "deinit\n");
LOG_D("deinit");
ENET_Deinit(imxrt_eth_device.enet_base);
dbg_log(DBG_LOG, "init\n");
LOG_D("init");
ENET_Init(imxrt_eth_device.enet_base, &imxrt_eth_device.enet_handle, &config, &buffConfig, &imxrt_eth_device.dev_addr[0], sysClock);
dbg_log(DBG_LOG, "set call back\n");
LOG_D("set call back");
ENET_SetCallback(&imxrt_eth_device.enet_handle, _enet_callback, &imxrt_eth_device);
dbg_log(DBG_LOG, "active read\n");
LOG_D("active read");
ENET_ActiveRead(imxrt_eth_device.enet_base);
}
@@ -426,7 +426,7 @@ static void packet_dump(const char *msg, const struct pbuf *p)
/* initialize the interface */
static rt_err_t rt_imxrt_eth_init(rt_device_t dev)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_init...\n");
LOG_D("rt_imxrt_eth_init...");
_enet_config();
return RT_EOK;
@@ -434,33 +434,33 @@ static rt_err_t rt_imxrt_eth_init(rt_device_t dev)
static rt_err_t rt_imxrt_eth_open(rt_device_t dev, rt_uint16_t oflag)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_open...\n");
LOG_D("rt_imxrt_eth_open...");
return RT_EOK;
}
static rt_err_t rt_imxrt_eth_close(rt_device_t dev)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_close...\n");
LOG_D("rt_imxrt_eth_close...");
return RT_EOK;
}
static rt_size_t rt_imxrt_eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_read...\n");
LOG_D("rt_imxrt_eth_read...");
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_size_t rt_imxrt_eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_write...\n");
LOG_D("rt_imxrt_eth_write...");
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_err_t rt_imxrt_eth_control(rt_device_t dev, int cmd, void *args)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_control...\n");
LOG_D("rt_imxrt_eth_control...");
switch (cmd)
{
case NIOCTL_GADDR:
@@ -668,7 +668,7 @@ rt_err_t rt_imxrt_eth_tx(rt_device_t dev, struct pbuf *p)
RT_ASSERT(p != NULL);
RT_ASSERT(enet_handle != RT_NULL);
dbg_log(DBG_LOG, "rt_imxrt_eth_tx: %d\n", p->len);
LOG_D("rt_imxrt_eth_tx: %d", p->len);
#ifdef ETH_TX_DUMP
packet_dump("send", p);
@@ -722,18 +722,18 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev)
}
else
{
dbg_log(DBG_LOG, " A frame read failed\n");
LOG_D(" A frame read failed");
pbuf_free(p);
}
}
else
{
dbg_log(DBG_LOG, " pbuf_alloc faild\n");
LOG_D(" pbuf_alloc faild");
}
}
else if (status == kStatus_ENET_RxFrameError)
{
dbg_log(DBG_WARNING, "ENET_GetRxFrameSize: kStatus_ENET_RxFrameError\n");
LOG_W("ENET_GetRxFrameSize: kStatus_ENET_RxFrameError");
/* Update the received buffer when error happened. */
/* Get the error information of the received g_frame. */
ENET_GetRxErrBeforeReadFrame(enet_handle, error_statistic);
@@ -771,20 +771,20 @@ static void phy_monitor_thread_entry(void *parameter)
if (kPHY_Speed10M == speed)
{
dbg_log(DBG_LOG, "10M\n");
LOG_D("10M");
}
else
{
dbg_log(DBG_LOG, "100M\n");
LOG_D("100M");
}
if (kPHY_HalfDuplex == duplex)
{
dbg_log(DBG_LOG, "half dumplex\n");
LOG_D("half dumplex");
}
else
{
dbg_log(DBG_LOG, "full dumplex\n");
LOG_D("full dumplex");
}
if ((imxrt_eth_device.speed != (enet_mii_speed_t)speed)
@@ -793,19 +793,19 @@ static void phy_monitor_thread_entry(void *parameter)
imxrt_eth_device.speed = (enet_mii_speed_t)speed;
imxrt_eth_device.duplex = (enet_mii_duplex_t)duplex;
dbg_log(DBG_LOG, "link up, and update eth mode.\n");
LOG_D("link up, and update eth mode.");
rt_imxrt_eth_init((rt_device_t)&imxrt_eth_device);
}
else
{
dbg_log(DBG_LOG, "link up, eth not need re-config.\n");
LOG_D("link up, eth not need re-config.");
}
dbg_log(DBG_LOG, "link up.\n");
LOG_D("link up.");
eth_device_linkchange(&imxrt_eth_device.parent, RT_TRUE);
}
else // link down
{
dbg_log(DBG_LOG, "link down.\n");
LOG_D("link down.");
eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);
}
}
@@ -846,20 +846,20 @@ static int rt_hw_imxrt_eth_init(void)
imxrt_eth_device.parent.eth_rx = rt_imxrt_eth_rx;
imxrt_eth_device.parent.eth_tx = rt_imxrt_eth_tx;
dbg_log(DBG_LOG, "sem init: tx_wait\r\n");
LOG_D("sem init: tx_wait\r");
/* init tx semaphore */
rt_sem_init(&imxrt_eth_device.tx_wait, "tx_wait", 0, RT_IPC_FLAG_FIFO);
/* register eth device */
dbg_log(DBG_LOG, "eth_device_init start\r\n");
LOG_D("eth_device_init start\r");
state = eth_device_init(&(imxrt_eth_device.parent), "e0");
if (RT_EOK == state)
{
dbg_log(DBG_LOG, "eth_device_init success\r\n");
LOG_D("eth_device_init success\r");
}
else
{
dbg_log(DBG_LOG, "eth_device_init faild: %d\r\n", state);
LOG_D("eth_device_init faild: %d\r", state);
}
eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);

340
bsp/imxrt/Libraries/imxrt1050/drivers/drv_ft5406.c
View File

@@ -1,340 +0,0 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2017-08-08 Yang the first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <finsh.h>
#include <rtgui/event.h>
#include <rtgui/rtgui_server.h>
#include "board.h"
#include "fsl_gpio.h"
#include "fsl_lpi2c.h"
#define BSP_TOUCH_SAMPLE_HZ 30
#define I2CBUS_NAME "i2c1"
#if 0
#define FTDEBUG rt_kprintf
#else
#define FTDEBUG(...)
#endif
#define TOUCH_SLP_TIME (RT_TICK_PER_SECOND * 5)
#define FT5206_TS_ADDR 0x38
#define TP_MAX_TOUCH_POINT 2
enum ft5x0x_ts_regs
{
FT5X0X_REG_THGROUP = 0x80,
FT5X0X_REG_THPEAK = 0x81,
FT5X0X_REG_THCAL = 0x82,
FT5X0X_REG_THWATER = 0x83,
FT5X0X_REG_THTEMP = 0x84,
FT5X0X_REG_THDIFF = 0x85,
FT5X0X_REG_CTRL = 0x86,
FT5X0X_REG_TIMEENTERMONITOR = 0x87,
FT5X0X_REG_PERIODACTIVE = 0x88,
FT5X0X_REG_PERIODMONITOR = 0x89,
FT5X0X_REG_HEIGHT_B = 0x8a,
FT5X0X_REG_MAX_FRAME = 0x8b,
FT5X0X_REG_DIST_MOVE = 0x8c,
FT5X0X_REG_DIST_POINT = 0x8d,
FT5X0X_REG_FEG_FRAME = 0x8e,
FT5X0X_REG_SINGLE_CLICK_OFFSET = 0x8f,
FT5X0X_REG_DOUBLE_CLICK_TIME_MIN = 0x90,
FT5X0X_REG_SINGLE_CLICK_TIME = 0x91,
FT5X0X_REG_LEFT_RIGHT_OFFSET = 0x92,
FT5X0X_REG_UP_DOWN_OFFSET = 0x93,
FT5X0X_REG_DISTANCE_LEFT_RIGHT = 0x94,
FT5X0X_REG_DISTANCE_UP_DOWN = 0x95,
FT5X0X_REG_ZOOM_DIS_SQR = 0x96,
FT5X0X_REG_RADIAN_VALUE = 0x97,
FT5X0X_REG_MAX_X_HIGH = 0x98,
FT5X0X_REG_MAX_X_LOW = 0x99,
FT5X0X_REG_MAX_Y_HIGH = 0x9a,
FT5X0X_REG_MAX_Y_LOW = 0x9b,
FT5X0X_REG_K_X_HIGH = 0x9c,
FT5X0X_REG_K_X_LOW = 0x9d,
FT5X0X_REG_K_Y_HIGH = 0x9e,
FT5X0X_REG_K_Y_LOW = 0x9f,
FT5X0X_REG_AUTO_CLB_MODE = 0xa0,
FT5X0X_REG_LIB_VERSION_H = 0xa1,
FT5X0X_REG_LIB_VERSION_L = 0xa2,
FT5X0X_REG_CIPHER = 0xa3,
FT5X0X_REG_G_MODE = 0xa4,
FT5X0X_REG_PMODE = 0xa5, /* Power Consume Mode */
FT5X0X_REG_FIRMID = 0xa6,
FT5X0X_REG_STATE = 0xa7,
FT5X0X_REG_VENDID = 0xa8,
FT5X0X_REG_ERR = 0xa9,
FT5X0X_REG_CLB = 0xaa,
};
#define CTRL_NOAUTO_MONITOR 0x00
#define CTRL_AUTO_MONITOR 0x01
#define PMODE_ACTIVE 0x00
#define PMODE_MONITOR 0x01
#define PMODE_STANDBY 0x02
#define PMODE_HIBERNATE 0x03
#define G_MODE_POLLING 0x00
#define G_MODE_TRIGGER 0x01
typedef enum _touch_event
{
kTouch_Down = 0, /*!< The state changed to touched. */
kTouch_Up = 1, /*!< The state changed to not touched. */
kTouch_Contact = 2, /*!< There is a continuous touch being detected. */
kTouch_Reserved = 3 /*!< No touch information available. */
} touch_event_t;
typedef struct _touch_point
{
touch_event_t TOUCH_EVENT; /*!< Indicates the state or event of the touch point. */
uint8_t TOUCH_ID; /*!< Id of the touch point. This numeric value stays constant between down and up event. */
uint16_t TOUCH_X; /*!< X coordinate of the touch point */
uint16_t TOUCH_Y; /*!< Y coordinate of the touch point */
} touch_point_t;
typedef struct _ft5406_touch_point
{
uint8_t XH;
uint8_t XL;
uint8_t YH;
uint8_t YL;
uint8_t RESERVED[2];
} ft5406_touch_point_t;
typedef struct _ft5406_touch_data
{
uint8_t DEVIDE_MODE;
uint8_t GEST_ID;
uint8_t TD_STATUS;
ft5406_touch_point_t TOUCH;
} ft5406_touch_data_t;
#define TOUCH_POINT_GET_EVENT(T) ((touch_event_t)((T).XH >> 6))
#define TOUCH_POINT_GET_ID(T) ((T).YH >> 4)
#define TOUCH_POINT_GET_X(T) ((((T).XH & 0x0f) << 8) | (T).XL)
#define TOUCH_POINT_GET_Y(T) ((((T).YH & 0x0f) << 8) | (T).YL)
static struct rt_i2c_bus_device *_i2c_bus;
static struct rt_semaphore _tp_sem;
static int _ft5406_read(unsigned char cmd,
void *buf,
size_t len)
{
struct rt_i2c_msg msgs[2];
msgs[0].addr = FT5206_TS_ADDR;
msgs[0].flags = RT_I2C_WR;
msgs[0].buf = &cmd;
msgs[0].len = sizeof(cmd);
msgs[1].addr = FT5206_TS_ADDR;
msgs[1].flags = RT_I2C_RD;
msgs[1].buf = buf;
msgs[1].len = len;
if (rt_i2c_transfer(_i2c_bus, msgs, 2) == 2)
return len;
else
return -1;
}
static int ft5406_read_touch(touch_point_t *dp)
{
ft5406_touch_data_t touch_data;
_ft5406_read(0, &touch_data, sizeof(ft5406_touch_data_t));
FTDEBUG("GEST_ID: %02x, TD_STATUS: %02x\n", touch_data.GEST_ID, touch_data.TD_STATUS);
FTDEBUG("XH: %02x, XL: %02x, XH: %02x, XH: %02x, XH: %02x, RESERVED[0]: %02x, RESERVED[1]: %02x\n",
touch_data.TOUCH.XH, touch_data.TOUCH.XL,
touch_data.TOUCH.YH, touch_data.TOUCH.YL,
touch_data.TOUCH.RESERVED[0], touch_data.TOUCH.RESERVED[1]);
dp->TOUCH_X = TOUCH_POINT_GET_Y(touch_data.TOUCH);
dp->TOUCH_Y = TOUCH_POINT_GET_X(touch_data.TOUCH);
FTDEBUG(" ==> status : %d (%d, %d)\n", touch_data.TD_STATUS, dp->TOUCH_X, dp->TOUCH_Y);
if (touch_data.TD_STATUS != 0)
return 0;
else
return -1;
}
static void _touch_session()
{
touch_point_t tpd;
#ifdef RT_USING_RTGUI
struct rtgui_event_mouse emouse;
#endif
ft5406_read_touch(&tpd);
#ifdef RT_USING_RTGUI
emouse.parent.sender = RT_NULL;
emouse.wid = RT_NULL;
emouse.parent.type = RTGUI_EVENT_MOUSE_BUTTON;
emouse.button = RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_DOWN;
emouse.x = tpd.TOUCH_X;
emouse.y = tpd.TOUCH_Y;
emouse.ts = rt_tick_get();
emouse.id = emouse.ts;
if (emouse.id == 0) emouse.id = 1;
rtgui_server_post_event(&emouse.parent, sizeof(emouse));
#endif
do
{
rt_thread_delay(RT_TICK_PER_SECOND / BSP_TOUCH_SAMPLE_HZ);
if (ft5406_read_touch(&tpd) != 0)
break;
#ifdef RT_USING_RTGUI
emouse.parent.type = RTGUI_EVENT_MOUSE_MOTION;
emouse.x = tpd.TOUCH_X;
emouse.y = tpd.TOUCH_Y;
emouse.ts = rt_tick_get();
rtgui_server_post_event(&emouse.parent, sizeof(emouse));
#endif
}
while (1);
#ifdef RT_USING_RTGUI
/* Always send touch up event. */
emouse.parent.type = RTGUI_EVENT_MOUSE_BUTTON;
emouse.button = RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_UP;
emouse.x = tpd.TOUCH_X;
emouse.y = tpd.TOUCH_Y;
emouse.ts = rt_tick_get();
rtgui_server_post_event(&emouse.parent, sizeof(emouse));
#endif
//} while (rt_sem_take(&_tp_sem, TOUCH_SLP_TIME) == RT_EOK);
}
void touch_down(void)
{
rt_sem_release(&_tp_sem);
}
static void _touch(void *p)
{
int io_s;
gpio_pin_config_t pin_config =
{
kGPIO_DigitalInput, 0,
};
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_11_GPIO1_IO11, 0U);
/* Enable touch panel controller */
GPIO_PinInit(GPIO1, 11, &pin_config);
while(1)
{
rt_thread_delay(RT_TICK_PER_SECOND / 60);
io_s = GPIO_ReadPinInput(GPIO1, 11);
if (io_s == 0)
{
_touch_session();
}
else
continue;
}
}
static rt_device_t _i2c_find(const char *name)
{
rt_device_t dev;
dev = rt_device_find(name);
if (!dev)
{
rt_kprintf("search device failed: %s\n", name);
return RT_NULL;
}
if (rt_device_open(dev, RT_DEVICE_OFLAG_RDWR) != RT_EOK)
{
rt_kprintf("open device failed: %s\n", name);
return RT_NULL;
}
rt_kprintf("open i2c bus: %s\n", name);
return dev;
}
static void ft5406_hw_reset(void)
{
gpio_pin_config_t pin_config =
{
kGPIO_DigitalOutput, 0,
};
CLOCK_EnableClock(kCLOCK_Gpio1);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_GPIO1_IO02, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_GPIO1_IO02, 0x10B0u);
/* Enable touch panel controller */
GPIO_PinInit(GPIO1, 2, &pin_config);
GPIO_WritePinOutput(GPIO1, 2, 1);
rt_thread_delay(RT_TICK_PER_SECOND / 20);
GPIO_WritePinOutput(GPIO1, 2, 0);
rt_thread_delay(RT_TICK_PER_SECOND / 20);
GPIO_WritePinOutput(GPIO1, 2, 1);
}
int ft5406_hw_init(void)
{
rt_thread_t tid;
rt_device_t dev = _i2c_find(I2CBUS_NAME);
if (dev == RT_NULL)
{
FTDEBUG("search i2c device faild: %s\n", I2CBUS_NAME);
return -1;
}
else
{
FTDEBUG("ft5406 set i2c bus to %s\n", I2CBUS_NAME);
_i2c_bus = (struct rt_i2c_bus_device *)dev;
}
ft5406_hw_reset();
rt_sem_init(&_tp_sem, "touch", 0, RT_IPC_FLAG_FIFO);
tid = rt_thread_create("touch", _touch, RT_NULL, 2048, 10, 20);
if (!tid)
{
rt_device_close(dev);
return -1;
}
rt_thread_startup(tid);
return 0;
}
INIT_APP_EXPORT(ft5406_hw_init);

66
bsp/imxrt/Libraries/imxrt1050/drivers/drv_lcd.c
View File

@@ -16,16 +16,16 @@
#include "fsl_elcdif.h"
#if !defined(LCD_WIDTH) || !defined(LCD_HEIGHT)
#error "Please config lcd pixel parameters."
#error "Please config lcd pixel parameters."
#endif
#if !defined(LCD_HFP) || !defined(LCD_HBP) || !defined(LCD_HSW) || \
!defined(LCD_VFP) || !defined(LCD_VBP) || !defined(LCD_VSW)
#error "Please config lcd timing parameters."
#error "Please config lcd timing parameters."
#endif
#if !defined(LCD_BL_PIN) || !defined(LCD_RST_PIN)
#error "Please config lcd backlight or reset pin."
#error "Please config lcd backlight or reset pin."
#endif
struct rt1050_lcd
@@ -35,13 +35,19 @@ struct rt1050_lcd
};
static struct rt1050_lcd lcd;
ALIGN(64) static uint16_t frame_buffer[LCD_HEIGHT][LCD_WIDTH] SECTION("NonCacheable");
static volatile int fb_index = 0;
static volatile rt_bool_t fb_modified = RT_TRUE;
ALIGN(64) static uint16_t frame_buffer0[LCD_HEIGHT][LCD_WIDTH] SECTION("NonCacheable");
ALIGN(64) static uint16_t frame_buffer1[LCD_HEIGHT][LCD_WIDTH] SECTION("NonCacheable");
static rt_err_t rt1050_lcd_init(rt_device_t device)
{
RT_ASSERT(device != RT_NULL);
rt_memset(frame_buffer, 0x00, sizeof(frame_buffer));
memset(frame_buffer0, 0x00, sizeof(frame_buffer0));
memset(frame_buffer1, 0x00, sizeof(frame_buffer1));
/* DeInit Video PLL. */
CLOCK_DeinitVideoPll();
@@ -145,7 +151,7 @@ static rt_err_t rt1050_lcd_init(rt_device_t device)
lcd_config.panelHeight = LCD_HEIGHT;
lcd_config.pixelFormat = kELCDIF_PixelFormatRGB565;
lcd_config.dataBus = kELCDIF_DataBus16Bit;
lcd_config.bufferAddr = (uint32_t)frame_buffer;
lcd_config.bufferAddr = (uint32_t)frame_buffer0;
ELCDIF_RgbModeInit(LCDIF, &lcd_config);
ELCDIF_RgbModeStart(LCDIF);
@@ -155,17 +161,59 @@ static rt_err_t rt1050_lcd_init(rt_device_t device)
lcd.info.height = LCD_HEIGHT;
lcd.info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565;
lcd.info.bits_per_pixel = 16;
lcd.info.framebuffer = (void *)frame_buffer;
lcd.info.framebuffer = (void *)rt_malloc_align(LCD_WIDTH * LCD_HEIGHT * 2, 32);
return RT_EOK;
}
void LCDIF_IRQHandler(void)
{
uint32_t intStatus;
intStatus = ELCDIF_GetInterruptStatus(LCDIF);
ELCDIF_ClearInterruptStatus(LCDIF, intStatus);
if (intStatus & kELCDIF_CurFrameDone)
{
fb_modified = RT_TRUE;
}
}
static rt_err_t rt1050_lcd_control(rt_device_t device, int cmd, void *args)
{
switch (cmd)
{
case RTGRAPHIC_CTRL_RECT_UPDATE:
break;
{
uint8_t *ptr;
if (fb_index == 0)
{
ptr = (uint8_t *)&frame_buffer1[0];
}
else
{
ptr = (uint8_t *)&frame_buffer0[0];
}
while(LCDIF->CUR_BUF != LCDIF->NEXT_BUF);
memcpy(ptr, lcd.info.framebuffer, LCD_WIDTH * LCD_HEIGHT * 2);
if (fb_index == 0)
{
/* use fb1 */
ELCDIF_SetNextBufferAddr(LCDIF, (uint32_t)&frame_buffer1[0]);
fb_index = 1;
}
else
{
/* use fb0 */
ELCDIF_SetNextBufferAddr(LCDIF, (uint32_t)&frame_buffer0[0]);
fb_index = 0;
}
}
break;
case RTGRAPHIC_CTRL_POWERON:
rt_pin_write(LCD_BL_PIN, PIN_HIGH);
@@ -176,7 +224,7 @@ static rt_err_t rt1050_lcd_control(rt_device_t device, int cmd, void *args)
break;
case RTGRAPHIC_CTRL_GET_INFO:
rt_memcpy(args, &lcd.info, sizeof(lcd.info));
memcpy(args, &lcd.info, sizeof(lcd.info));
break;
case RTGRAPHIC_CTRL_SET_MODE:

253
bsp/imxrt/Libraries/imxrt1050/drivers/touch/drv_touch.c Normal file
View File

@@ -0,0 +1,253 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-02-08 Zhangyihong the first version
* 2018-10-29 XY
*/
#include "drv_touch.h"
#define TOUCH_I2C_NAME "i2c1"
#ifndef TOUCH_SAMPLE_HZ
#define TOUCH_SAMPLE_HZ (50)
#endif
#ifndef TOUCH_I2C_NAME
#error "Please define touch i2c name!"
#endif
#ifdef PKG_USING_GUIENGINE
#include <rtgui/event.h>
#include <rtgui/rtgui_server.h>
#endif
#if 0
#define TPDEBUG rt_kprintf
#else
#define TPDEBUG(...)
#endif
static rt_slist_t _driver_list;
static struct rt_i2c_bus_device *i2c_bus = RT_NULL;
static void post_down_event(rt_uint16_t x, rt_uint16_t y, rt_uint32_t id)
{
#ifdef PKG_USING_GUIENGINE
rt_err_t result;
struct rtgui_event_mouse emouse;
emouse.parent.sender = RT_NULL;
emouse.wid = RT_NULL;
emouse.parent.type = RTGUI_EVENT_MOUSE_BUTTON;
emouse.button = RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_DOWN;
emouse.x = x;
emouse.y = y;
emouse.ts = rt_tick_get();
emouse.id = id;
do
{
result = rtgui_server_post_event(&emouse.parent, sizeof(emouse));
if (result != RT_EOK)
{
rt_thread_delay(RT_TICK_PER_SECOND / TOUCH_SAMPLE_HZ);
}
}
while (result != RT_EOK);
TPDEBUG("[TP] touch down [%d, %d]\n", emouse.x, emouse.y);
#endif
}
static void post_motion_event(rt_uint16_t x, rt_uint16_t y, rt_uint32_t id)
{
#ifdef PKG_USING_GUIENGINE
struct rtgui_event_mouse emouse;
emouse.parent.sender = RT_NULL;
emouse.wid = RT_NULL;
emouse.button = RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_DOWN;
emouse.parent.type = RTGUI_EVENT_MOUSE_MOTION;
emouse.x = x;
emouse.y = y;
emouse.ts = rt_tick_get();
emouse.id = id;
rtgui_server_post_event(&emouse.parent, sizeof(emouse));
TPDEBUG("[TP] touch motion [%d, %d]\n", emouse.x, emouse.y);
#endif
}
static void post_up_event(rt_uint16_t x, rt_uint16_t y, rt_uint32_t id)
{
#ifdef PKG_USING_GUIENGINE
rt_err_t result;
struct rtgui_event_mouse emouse;
emouse.parent.sender = RT_NULL;
emouse.wid = RT_NULL;
emouse.parent.type = RTGUI_EVENT_MOUSE_BUTTON;
emouse.button = RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_UP;
emouse.x = x;
emouse.y = y;
emouse.ts = rt_tick_get();
emouse.id = id;
do
{
result = rtgui_server_post_event(&emouse.parent, sizeof(emouse));
if (result != RT_EOK)
{
rt_thread_delay(RT_TICK_PER_SECOND / TOUCH_SAMPLE_HZ);
}
}
while (result != RT_EOK);
TPDEBUG("[TP] touch up [%d, %d]\n", emouse.x, emouse.y);
#endif
}
static void touch_run(void* parameter)
{
rt_tick_t emouse_id = 0;
struct touch_message msg;
rt_slist_t *driver_list = NULL;
struct touch_driver *current_driver = RT_NULL;
i2c_bus = rt_i2c_bus_device_find(TOUCH_I2C_NAME);
RT_ASSERT(i2c_bus);
if(rt_device_open(&i2c_bus->parent, RT_DEVICE_OFLAG_RDWR) != RT_EOK)
{
return;
}
rt_slist_for_each(driver_list, &_driver_list)
{
current_driver = (struct touch_driver *)driver_list;
if(current_driver->probe(i2c_bus) == RT_TRUE)
{
break;
}
current_driver = RT_NULL;
}
if(current_driver == RT_NULL)
{
rt_kprintf("[TP] No touch pad or driver.\n");
rt_device_close((rt_device_t)i2c_bus);
return;
}
current_driver->ops->init(i2c_bus);
while (1)
{
if (rt_sem_take(current_driver->isr_sem, RT_WAITING_FOREVER) != RT_EOK)
{
continue;
}
if (current_driver->ops->read_point(&msg) != RT_EOK)
{
continue;
}
switch (msg.event)
{
case TOUCH_EVENT_MOVE:
post_motion_event(msg.x, msg.y, emouse_id);
break;
case TOUCH_EVENT_DOWN:
emouse_id = rt_tick_get();
post_down_event(msg.x, msg.y, emouse_id);
break;
case TOUCH_EVENT_UP:
post_up_event(msg.x, msg.y, emouse_id);
break;
default:
break;
}
rt_thread_delay(RT_TICK_PER_SECOND / TOUCH_SAMPLE_HZ);
}
}
rt_err_t rt_touch_drivers_register(touch_driver_t drv)
{
RT_ASSERT(drv != RT_NULL);
RT_ASSERT(drv->ops != RT_NULL);
RT_ASSERT(drv->probe != RT_NULL);
rt_slist_append(&_driver_list, &drv->list);
return RT_EOK;
}
static int rt_touch_list_init(void)
{
rt_slist_init(&_driver_list);
return RT_EOK;
}
INIT_BOARD_EXPORT(rt_touch_list_init);
static int rt_touch_init(void)
{
rt_thread_t thread = RT_NULL;
thread = rt_thread_create("touch", touch_run, RT_NULL, 2048, 28, 20);
if(thread)
{
return rt_thread_startup(thread);
}
return RT_ERROR;
}
INIT_APP_EXPORT(rt_touch_init);
int rt_touch_read(rt_uint16_t addr, void *cmd_buf, size_t cmd_len, void *data_buf, size_t data_len)
{
struct rt_i2c_msg msgs[2];
msgs[0].addr = addr;
msgs[0].flags = RT_I2C_WR;
msgs[0].buf = cmd_buf;
msgs[0].len = cmd_len;
msgs[1].addr = addr;
msgs[1].flags = RT_I2C_RD;
msgs[1].buf = data_buf;
msgs[1].len = data_len;
if (rt_i2c_transfer(i2c_bus, msgs, 2) == 2)
return 0;
else
return -1;
}
int rt_touch_write(rt_uint16_t addr, void *data_buf, size_t data_len)
{
struct rt_i2c_msg msgs[1];
msgs[0].addr = addr;
msgs[0].flags = RT_I2C_WR;
msgs[0].buf = data_buf;
msgs[0].len = data_len;
if (rt_i2c_transfer(i2c_bus, msgs, 1) == 1)
return 0;
else
return -1;
}

53
bsp/imxrt/Libraries/imxrt1050/drivers/touch/drv_touch.h Normal file
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@@ -0,0 +1,53 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-02-08 Zhangyihong the first version
* 2018-10-29 XY
*/
#ifndef __DRV_TOUCH_H__
#define __DRV_TOUCH_H__
#include "rtthread.h"
#include "rtdevice.h"
#define TOUCH_EVENT_UP (0x01)
#define TOUCH_EVENT_DOWN (0x02)
#define TOUCH_EVENT_MOVE (0x03)
#define TOUCH_EVENT_NONE (0x80)
struct touch_message
{
rt_uint16_t x;
rt_uint16_t y;
rt_uint8_t event;
};
typedef struct touch_message *touch_message_t;
struct touch_ops
{
void (*init)(struct rt_i2c_bus_device *);
void (*deinit)(void);
rt_err_t (*read_point)(touch_message_t);
};
typedef struct touch_ops *touch_ops_t;
struct touch_driver
{
rt_slist_t list;
rt_bool_t (*probe)(struct rt_i2c_bus_device *i2c_bus);
rt_sem_t isr_sem;
touch_ops_t ops;
void *user_data;
};
typedef struct touch_driver *touch_driver_t;
rt_err_t rt_touch_drivers_register(touch_driver_t drv);
int rt_touch_read(rt_uint16_t addr, void *cmd_buf, size_t cmd_len, void *data_buf, size_t data_len);
int rt_touch_write(rt_uint16_t addr, void *data_buf, size_t data_len);
#endif

235
bsp/imxrt/Libraries/imxrt1050/drivers/touch/drv_touch_ft5x06.c Normal file
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@@ -0,0 +1,235 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2017-08-08 Yang the first version
* 2018-10-29 XY
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include "drv_touch.h"
#include "fsl_iomuxc.h"
#include "fsl_gpio.h"
#define TP_INT_PIN 54 /* GPIO_AD_B0_11 */
#define TP_RST_PIN 45 /* GPIO_AD_B0_02 */
#define FT5x06_TS_ADDR (0x38)
#if 0
#define TPDEBUG rt_kprintf
#else
#define TPDEBUG(...)
#endif
static struct touch_driver ft5x06_driver;
typedef enum _touch_event
{
kTouch_Down = 0, /*!< The state changed to touched. */
kTouch_Up = 1, /*!< The state changed to not touched. */
kTouch_Contact = 2, /*!< There is a continuous touch being detected. */
kTouch_Reserved = 3 /*!< No touch information available. */
} touch_event_t;
typedef struct _touch_point
{
touch_event_t TOUCH_EVENT; /*!< Indicates the state or event of the touch point. */
uint8_t TOUCH_ID; /*!< Id of the touch point. This numeric value stays constant between down and up event. */
uint16_t TOUCH_X; /*!< X coordinate of the touch point */
uint16_t TOUCH_Y; /*!< Y coordinate of the touch point */
} touch_point_t;
typedef struct _ft5406_touch_point
{
uint8_t XH;
uint8_t XL;
uint8_t YH;
uint8_t YL;
uint8_t RESERVED[2];
} ft5406_touch_point_t;
typedef struct _ft5406_touch_data
{
uint8_t DEVIDE_MODE;
uint8_t GEST_ID;
uint8_t TD_STATUS;
ft5406_touch_point_t TOUCH;
} ft5406_touch_data_t;
#define TOUCH_POINT_GET_EVENT(T) ((touch_event_t)((T).XH >> 6))
#define TOUCH_POINT_GET_ID(T) ((T).YH >> 4)
#define TOUCH_POINT_GET_X(T) ((((T).XH & 0x0f) << 8) | (T).XL)
#define TOUCH_POINT_GET_Y(T) ((((T).YH & 0x0f) << 8) | (T).YL)
static int ft5406_read_touch(touch_point_t *dp)
{
rt_uint8_t cmd = 0;
ft5406_touch_data_t touch_data;
if (rt_touch_read(FT5x06_TS_ADDR, &cmd, 1, &touch_data, sizeof(ft5406_touch_data_t)) != 0)
return -1;
dp->TOUCH_X = TOUCH_POINT_GET_Y(touch_data.TOUCH);
dp->TOUCH_Y = TOUCH_POINT_GET_X(touch_data.TOUCH);
dp->TOUCH_EVENT = TOUCH_POINT_GET_EVENT(touch_data.TOUCH);
dp->TOUCH_ID = TOUCH_POINT_GET_ID(touch_data.TOUCH);
if (dp->TOUCH_EVENT == 3) return -1;
if (touch_data.TD_STATUS != 0)
return 0;
else
return -1;
}
static void ft5x06_isr_enable(rt_bool_t enable)
{
if(enable == RT_TRUE)
{
rt_pin_irq_enable(TP_INT_PIN, PIN_IRQ_ENABLE);
}
else
{
rt_pin_irq_enable(TP_INT_PIN, PIN_IRQ_DISABLE);
}
}
static void ft5x06_touch_isr(void *parameter)
{
TPDEBUG("[TP] ft5x06_touch_isr\n");
ft5x06_isr_enable(RT_FALSE);
rt_sem_release(ft5x06_driver.isr_sem);
}
static rt_err_t ft5x06_read_point(touch_message_t msg)
{
touch_point_t dp;
if (ft5406_read_touch(&dp) != 0)
{
msg->event = TOUCH_EVENT_UP;
}
else
{
if (dp.TOUCH_EVENT == kTouch_Up)
{
msg->event = TOUCH_EVENT_UP;
}
else if (dp.TOUCH_EVENT == kTouch_Down)
{
msg->event = TOUCH_EVENT_DOWN;
}
else if (dp.TOUCH_EVENT == kTouch_Contact)
{
msg->event = TOUCH_EVENT_MOVE;
}
else
{
msg->event = TOUCH_EVENT_UP;
}
}
msg->x = dp.TOUCH_X;
msg->y = dp.TOUCH_Y;
TPDEBUG("[TP] [%d, %d] %s\n", msg->x, msg->y,
msg->event == TOUCH_EVENT_DOWN ? "DOWN" : (msg->event == TOUCH_EVENT_MOVE ? "MOVE" : (msg->event == TOUCH_EVENT_UP ? "UP" : "NONE")));
if (msg->event != TOUCH_EVENT_UP)
{
rt_sem_release(ft5x06_driver.isr_sem);
}
else
{
ft5x06_isr_enable(RT_TRUE);
}
return RT_EOK;
}
static void ft5x06_init(struct rt_i2c_bus_device *i2c_bus)
{
ft5x06_driver.isr_sem = rt_sem_create("ft5x06", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(ft5x06_driver.isr_sem);
rt_pin_attach_irq(TP_INT_PIN, PIN_IRQ_MODE_LOW_LEVEL, ft5x06_touch_isr, &ft5x06_driver);
rt_pin_irq_enable(TP_INT_PIN, PIN_IRQ_ENABLE);
rt_thread_delay(RT_TICK_PER_SECOND / 5);
}
static void ft5x06_deinit(void)
{
if (ft5x06_driver.isr_sem)
{
rt_sem_delete(ft5x06_driver.isr_sem);
ft5x06_driver.isr_sem = RT_NULL;
}
}
struct touch_ops ft5x06_ops =
{
ft5x06_init,
ft5x06_deinit,
ft5x06_read_point,
};
static void ft5406_hw_reset(void)
{
gpio_pin_config_t pin_config =
{
kGPIO_DigitalOutput, 0,
};
CLOCK_EnableClock(kCLOCK_Gpio1);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_GPIO1_IO02, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_GPIO1_IO02, 0x10B0u);
/* Enable touch panel controller */
GPIO_PinInit(GPIO1, 2, &pin_config);
GPIO_WritePinOutput(GPIO1, 2, 1);
rt_thread_delay(RT_TICK_PER_SECOND / 20);
GPIO_WritePinOutput(GPIO1, 2, 0);
rt_thread_delay(RT_TICK_PER_SECOND / 20);
GPIO_WritePinOutput(GPIO1, 2, 1);
}
static rt_bool_t ft5x06_probe(struct rt_i2c_bus_device *i2c_bus)
{
rt_uint16_t cmd = 0x000c;
rt_uint16_t tmp[2];
rt_uint16_t CurVersion;
ft5406_hw_reset();
if (rt_touch_read(FT5x06_TS_ADDR, &cmd, 2, tmp, 2) != 0)
{
TPDEBUG("[TP] %s failed!\n", __func__);
return RT_FALSE;
}
CurVersion = (tmp[0]<<8) | tmp[1];
rt_kprintf("[TP] FT5X06 Touch Version : %d\n", CurVersion);
return RT_TRUE;
}
int ft5x06_driver_register(void)
{
ft5x06_driver.probe = ft5x06_probe;
ft5x06_driver.ops = &ft5x06_ops;
ft5x06_driver.user_data = RT_NULL;
rt_touch_drivers_register(&ft5x06_driver);
return 0;
}
INIT_ENV_EXPORT(ft5x06_driver_register);

225
bsp/imxrt/Libraries/imxrt1050/drivers/touch/drv_touch_gt9xx.c Normal file
View File

@@ -0,0 +1,225 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-02-08 Zhangyihong the first version
* 2018-04-03 XY gt9xx for 1024 * 600
* 2018-04-14 liu2guang optimize int and rst to pin framework
* 2018-10-29 XY
*/
#include "drv_touch.h"
#include "string.h"
#include "drv_pin.h"
#define TP_INT_PIN 54 /* GPIO_AD_B0_11 */
#define TP_RST_PIN 45 /* GPIO_AD_B0_02 */
#ifndef TP_INT_PIN
#error "Please config touch panel INT pin."
#endif
#ifndef TP_RST_PIN
#error "Please config touch panel RST pin."
#endif
#ifndef IIC_RETRY_NUM
#define IIC_RETRY_NUM 2
#endif
#define GT9xx_TS_ADDR (0x5D)
#define gt9xx_READ_XY_REG (0x814E) /* 坐标寄存器 */
#define gt9xx_CLEARBUF_REG (0x814E) /* 清除坐标寄存器 */
#define gt9xx_CONFIG_REG (0x8047) /* 配置参数寄存器 */
#define gt9xx_COMMAND_REG (0x8040) /* 实时命令 */
#define gt9xx_PRODUCT_ID_REG (0x8140) /* 产品ID */
#define gt9xx_VENDOR_ID_REG (0x814A) /* 当前模组选项信息 */
#define gt9xx_CONFIG_VERSION_REG (0x8047) /* 配置文件版本号 */
#define gt9xx_CONFIG_CHECKSUM_REG (0x80FF) /* 配置文件校验码 */
#define gt9xx_FIRMWARE_VERSION_REG (0x8144) /* 固件版本号 */
#if 0
#define TPDEBUG rt_kprintf
#else
#define TPDEBUG(...)
#endif
static struct touch_driver gt9xx_driver;
static void gt9xx_hw_reset(rt_uint8_t address)
{
rt_pin_mode(TP_INT_PIN, PIN_MODE_OUTPUT);
rt_pin_mode(TP_RST_PIN, PIN_MODE_OUTPUT);
if(address == 0x5D)
{
rt_pin_write(TP_INT_PIN, PIN_LOW);
rt_pin_write(TP_RST_PIN, PIN_LOW);
rt_thread_delay(RT_TICK_PER_SECOND / 50);
rt_pin_write(TP_RST_PIN, PIN_HIGH);
rt_pin_write(TP_INT_PIN, PIN_LOW);
rt_thread_delay(RT_TICK_PER_SECOND / 50);
}
else
{
rt_pin_write(TP_INT_PIN, PIN_LOW);
rt_pin_write(TP_RST_PIN, PIN_LOW);
rt_thread_delay(RT_TICK_PER_SECOND / 50);
rt_pin_write(TP_RST_PIN, PIN_LOW);
rt_pin_write(TP_INT_PIN, PIN_HIGH);
rt_thread_delay(RT_TICK_PER_SECOND / 50);
rt_pin_write(TP_RST_PIN, PIN_HIGH);
rt_thread_delay(RT_TICK_PER_SECOND / 50);
}
}
static void gt9xx_soft_reset(struct rt_i2c_bus_device *i2c_bus)
{
rt_uint8_t buf[3];
buf[0] = (rt_uint8_t)((gt9xx_COMMAND_REG >> 8) & 0xFF);
buf[1] = (rt_uint8_t)(gt9xx_COMMAND_REG & 0xFF);
buf[2] = 0x02;
rt_touch_write(GT9xx_TS_ADDR, buf, 3);
}
static rt_bool_t gt9xx_probe(struct rt_i2c_bus_device *i2c_bus)
{
rt_uint8_t cmd[2];
rt_uint8_t buffer[5] = {0};
gt9xx_hw_reset(GT9xx_TS_ADDR);
//gt9xx_soft_reset(i2c_bus);
rt_thread_delay(RT_TICK_PER_SECOND / 5);
cmd[0] = (rt_uint8_t)((gt9xx_PRODUCT_ID_REG >> 8) & 0xFF);
cmd[1] = (rt_uint8_t)(gt9xx_PRODUCT_ID_REG & 0xFF);
if (rt_touch_read(GT9xx_TS_ADDR, &cmd, 2, buffer, 4) != 0)
return RT_FALSE;
buffer[4] = '\0';
TPDEBUG("%#X %#X %#X %#X %#X\n", buffer[0], buffer[1], buffer[2], buffer[3], buffer[4]);
if(!rt_strcmp((const char*)buffer, "911"))
{
rt_kprintf("[TP] Found chip gt911\r\n");
return RT_TRUE;
}
else if(!rt_strcmp((const char*)buffer, "9147"))
{
rt_kprintf("[TP] Found chip gt9147\r\n");
return RT_TRUE;
}
else if(!rt_strcmp((const char*)buffer, "9157"))
{
rt_kprintf("[TP] Found chip gt9157\r\n");
return RT_TRUE;
}
else
{
TPDEBUG("[TP] Uknow chip gt9xx device: [%s]\r\n", buffer);
}
return RT_FALSE;
}
static void gt9xx_init(struct rt_i2c_bus_device *i2c_bus)
{
rt_uint8_t buf = 0;
rt_uint8_t cmd[2];
gt9xx_driver.isr_sem = rt_sem_create("gt9xx", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(gt9xx_driver.isr_sem);
cmd[0] = (rt_uint8_t)((gt9xx_CONFIG_VERSION_REG >> 8) & 0xFF);
cmd[1] = (rt_uint8_t)(gt9xx_CONFIG_VERSION_REG & 0xFF);
rt_touch_read(GT9xx_TS_ADDR, &cmd, 2, &buf, 1);
rt_kprintf("[TP] GT9xx Config version: 0x%02X\n", buf);
cmd[0] = (rt_uint8_t)((gt9xx_VENDOR_ID_REG >> 8) & 0xFF);
cmd[1] = (rt_uint8_t)(gt9xx_VENDOR_ID_REG & 0xFF);
rt_touch_read(GT9xx_TS_ADDR, &cmd, 2, &buf, 1);
rt_kprintf("[TP] GT9xx Sensor id: 0x%02X\n", buf);
rt_sem_release(gt9xx_driver.isr_sem);
}
static void gt9xx_deinit(void)
{
rt_sem_delete(gt9xx_driver.isr_sem);
}
static rt_err_t gt9xx_read_point(touch_message_t msg)
{
rt_uint8_t cmd[2];
rt_uint8_t buf[8] = {0};
static rt_uint8_t s_tp_down = 0;
cmd[0] = (rt_uint8_t)((gt9xx_READ_XY_REG >> 8) & 0xFF);
cmd[1] = (rt_uint8_t)(gt9xx_READ_XY_REG & 0xFF);
rt_touch_read(GT9xx_TS_ADDR, &cmd, 2, buf, 8);
if((buf[0] & 0x01) == 0)
{
if(s_tp_down)
{
s_tp_down = 0;
msg->event = TOUCH_EVENT_UP;
}
else
{
msg->event = TOUCH_EVENT_NONE;
}
}
else
{
msg->x = ((rt_uint16_t)buf[3] << 8) | buf[2];
msg->y = ((rt_uint16_t)buf[5] << 8) | buf[4];
if(s_tp_down)
{
msg->event = TOUCH_EVENT_MOVE;
}
else
{
msg->event = TOUCH_EVENT_DOWN;
s_tp_down = 1;
}
}
buf[0] = ((gt9xx_CLEARBUF_REG >> 8) & 0xFF);
buf[1] = (gt9xx_CLEARBUF_REG & 0xFF);
buf[2] = 0x00;
rt_touch_write(GT9xx_TS_ADDR, buf, 3);
rt_sem_release(gt9xx_driver.isr_sem);
return RT_EOK;
}
struct touch_ops gt9xx_ops =
{
.init = gt9xx_init,
.deinit = gt9xx_deinit,
.read_point = gt9xx_read_point,
};
static int gt9xx_driver_register(void)
{
gt9xx_driver.probe = gt9xx_probe;
gt9xx_driver.ops = &gt9xx_ops;
gt9xx_driver.user_data = RT_NULL;
rt_touch_drivers_register(&gt9xx_driver);
return RT_EOK;
}
INIT_ENV_EXPORT(gt9xx_driver_register);

12
bsp/imxrt/imxrt1050-ArchMix/Kconfig
View File

@@ -30,15 +30,9 @@ config BOARD_RT1050_ArchMix
default y
# RT1050 flash select!
choice
prompt "RT1050 Flash select"
default BOARD_USING_QSPIFLASH
config BOARD_USING_HYPERFLASH
bool "HYPERFLASH"
config BOARD_USING_QSPIFLASH
bool "QSPIFLASH"
endchoice
config BOARD_USING_QSPIFLASH
bool
default y
menu "RT1050 Bsp Config"

38
bsp/imxrt/imxrt1050-ArchMix/README.md
View File

@@ -2,20 +2,23 @@
## 1. 简介
i.MX RT 1050系列芯片，是由 NXP 半导体公司推出的跨界处理器芯片。它基于应用处理器的芯片架构，采用了微控制器的内核Cortex-M7，从而具有应用处理器的高性能及丰富的功能，又具备传统微控制器的易用、实时及低功耗的特性。
![Arch_Mix](figures/Arch_Mix.jpg)
BSP默认支持的i.MX RT1052处理器具备以下简要的特性：
Arch Mix 是 [Seeed Studio](https://www.seeedstudio.com/) 推出的一款基于 i.MX RT 1050 系列芯片的开发板，板载一颗 RGB 灯和一个用户按键，外扩 32M SDRAM，板载资源丰富，运行速度快（主频可达 600MHZ），并且支持外接 LCD 屏幕。Seeed Studio 是一家致力于促进开源硬件发展的服务型企业。目前，已经与众多设计者建立了紧密的合作关系，并且合作推出了涉及新媒体艺术、嵌入式平台、物联网、智能家居、便携式仪器等领域的一系列明星产品和方案。
| 介绍 | 描述 |
### 板载资源：
| 硬件 | 描述 |
| ---- | ---- |
| 主CPU平台 | ARM Cortex-M7 |
| 芯片 | i.MX RT 1052 |
| 架构 | ARM Cortex-M7 |
| 最高频率 | 600MHz |
| 内部存储器 | 512KB SRAM |
| 外部存储器接口 | NAND、eMMC、QuadSPI NOR Flash 和 Parallel NOR Flash |
| 外部存储器 | 32M SDRAM、8M QSPI FLASH（存储代码） |
## 2. 编译说明
i.MX RT1050板级包支持MDK5﹑IAR开发环境和GCC编译器，以下是具体版本信息：
Arch Mix 板级包支持MDK5﹑IAR开发环境和GCC编译器，以下是具体版本信息：
| IDE/编译器 | 已测试版本 |
| ---------- | --------- |
@@ -27,19 +30,21 @@ i.MX RT1050板级包支持MDK5﹑IAR开发环境和GCC编译器，以下是具
### 3.1 配置工程
i.MX RT1052 BSP 支持多种 Flash，包括 Hyper Flash 和 QSPI Flash。如果不是 QSPI Flash 版本，那么需要重新配置并生成工程：
- 在 bsp 下打开 env 工具
- 输入`menuconfig`命令，`RT1052 Flash select (***)-->`选择正确的 Flash 版本。
- 输入`menuconfig`命令配置工程，配置好之后保存退出。
- 输入`scons --target=mdk5 -s`或`scons --target=iar`来生成需要的工程
### 3.2 下载和仿真
连接外置仿真器 Jlink 后，就可以进行下载和仿真。使用 TTL 转串口工具连接开发板上 J3 的19/20 引脚，在终端工具里打开相应的串口。(19 接 TX，20 接 RX)
开发板支持 SWD 调试接口，连接外置仿真器后，就可以进行下载和仿真。
> 注意：下载算法默认使用 [iMXRT1052_W25Q256JV_By_Fire.FLM](http://www.firebbs.cn/thread-22513-1-4.html)，将此文件拷贝到 Keil5安装目录下 `ARM\Flash` 目录下即可。
>
> 下载失败时：先按下 `Reset 按键`，再按下 `Boot Mode 按键`，先松开 `Reset 按键`，再松开 `Boot Mode 按键`，即可进入`下载模式`。
### 3.3 运行结果
如果编译 & 烧写无误，当复位设备后，会在串口上看到RT-Thread的启动logo信息：
下载程序之后，使用 TTL 转串口工具连接开发板上 RXD/TXD ，在终端工具里打开相应的串口(115200-N-8-1)。如果编译 & 烧写无误，当复位设备后，可以看到RT-Thread的输出信息:
```
\ | /
@@ -71,13 +76,4 @@ File System initialized!
维护人：
- [tanek](https://github.com/TanekLiang)
- [liu2guang](https://github.com/liu2guang)
## 6. 参考
- [MIMXRT1050-EVK: i.MX RT1050评估套件概述](https://www.nxp.com/cn/products/processors-and-microcontrollers/applications-processors/i.mx-applications-processors/i.mx-rt-series/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK)
- [MIMXRT1050 EVK Board Hardware User’s Guide ](https://www.nxp.com/docs/en/user-guide/MIMXRT1050EVKHUG.pdf)
- [i.MX RT Series Crossover Processor Quick Start Guide](https://www.nxp.com/docs/en/user-guide/IMXRT1050EVKQSG.pdf)
- [i.MX RT Series Crossover Processor Fact Sheet](https://www.nxp.com/docs/en/fact-sheet/IMXRTSERIESFS.pdf)
- [Evaluation Kit Based on i.MX RT1050 Crossover Processors](https://www.nxp.com/docs/en/fact-sheet/IMXRT1050EVKFS.pdf)
- [guozhanxin](https://github.com/Guozhanxin)

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bsp/imxrt/imxrt1050-ArchMix/figures/Arch_Mix.jpg Normal file
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52
bsp/imxrt1052-evk/drivers/drv_eth.c
View File

@@ -676,13 +676,13 @@ static void _enet_config(void)
/* Set SMI to get PHY link status. */
sysClock = CLOCK_GetFreq(kCLOCK_AhbClk);
dbg_log(DBG_LOG, "deinit\n");
LOG_D("deinit");
ENET_Deinit(imxrt_eth_device.enet_base);
dbg_log(DBG_LOG, "init\n");
LOG_D("init");
ENET_Init(imxrt_eth_device.enet_base, &imxrt_eth_device.enet_handle, &config, &buffConfig, &imxrt_eth_device.dev_addr[0], sysClock);
dbg_log(DBG_LOG, "set call back\n");
LOG_D("set call back");
ENET_SetCallback(&imxrt_eth_device.enet_handle, _enet_callback, &imxrt_eth_device);
dbg_log(DBG_LOG, "active read\n");
LOG_D("active read");
ENET_ActiveRead(imxrt_eth_device.enet_base);
}
@@ -726,7 +726,7 @@ static void packet_dump(const char *msg, const struct pbuf *p)
/* initialize the interface */
static rt_err_t rt_imxrt_eth_init(rt_device_t dev)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_init...\n");
LOG_D("rt_imxrt_eth_init...");
_enet_config();
return RT_EOK;
@@ -734,33 +734,33 @@ static rt_err_t rt_imxrt_eth_init(rt_device_t dev)
static rt_err_t rt_imxrt_eth_open(rt_device_t dev, rt_uint16_t oflag)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_open...\n");
LOG_D("rt_imxrt_eth_open...");
return RT_EOK;
}
static rt_err_t rt_imxrt_eth_close(rt_device_t dev)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_close...\n");
LOG_D("rt_imxrt_eth_close...");
return RT_EOK;
}
static rt_size_t rt_imxrt_eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_read...\n");
LOG_D("rt_imxrt_eth_read...");
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_size_t rt_imxrt_eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_write...\n");
LOG_D("rt_imxrt_eth_write...");
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_err_t rt_imxrt_eth_control(rt_device_t dev, int cmd, void *args)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_control...\n");
LOG_D("rt_imxrt_eth_control...");
switch (cmd)
{
case NIOCTL_GADDR:
@@ -969,7 +969,7 @@ rt_err_t rt_imxrt_eth_tx(rt_device_t dev, struct pbuf *p)
RT_ASSERT(p != NULL);
RT_ASSERT(enet_handle != RT_NULL);
dbg_log(DBG_LOG, "rt_imxrt_eth_tx: %d\n", p->len);
LOG_D("rt_imxrt_eth_tx: %d", p->len);
#ifdef ETH_TX_DUMP
packet_dump("send", p);
@@ -1023,18 +1023,18 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev)
}
else
{
dbg_log(DBG_LOG, " A frame read failed\n");
LOG_D(" A frame read failed");
pbuf_free(p);
}
}
else
{
dbg_log(DBG_LOG, " pbuf_alloc faild\n");
LOG_D(" pbuf_alloc faild");
}
}
else if (status == kStatus_ENET_RxFrameError)
{
dbg_log(DBG_WARNING, "ENET_GetRxFrameSize: kStatus_ENET_RxFrameError\n");
LOG_W("ENET_GetRxFrameSize: kStatus_ENET_RxFrameError");
/* Update the received buffer when error happened. */
/* Get the error information of the received g_frame. */
ENET_GetRxErrBeforeReadFrame(enet_handle, error_statistic);
@@ -1072,20 +1072,20 @@ static void phy_monitor_thread_entry(void *parameter)
if (kPHY_Speed10M == speed)
{
dbg_log(DBG_LOG, "10M\n");
LOG_D("10M");
}
else
{
dbg_log(DBG_LOG, "100M\n");
LOG_D("100M");
}
if (kPHY_HalfDuplex == duplex)
{
dbg_log(DBG_LOG, "half dumplex\n");
LOG_D("half dumplex");
}
else
{
dbg_log(DBG_LOG, "full dumplex\n");
LOG_D("full dumplex");
}
if ((imxrt_eth_device.speed != (enet_mii_speed_t)speed)
@@ -1094,19 +1094,19 @@ static void phy_monitor_thread_entry(void *parameter)
imxrt_eth_device.speed = (enet_mii_speed_t)speed;
imxrt_eth_device.duplex = (enet_mii_duplex_t)duplex;
dbg_log(DBG_LOG, "link up, and update eth mode.\n");
LOG_D("link up, and update eth mode.");
rt_imxrt_eth_init((rt_device_t)&imxrt_eth_device);
}
else
{
dbg_log(DBG_LOG, "link up, eth not need re-config.\n");
LOG_D("link up, eth not need re-config.");
}
dbg_log(DBG_LOG, "link up.\n");
LOG_D("link up.");
eth_device_linkchange(&imxrt_eth_device.parent, RT_TRUE);
}
else // link down
{
dbg_log(DBG_LOG, "link down.\n");
LOG_D("link down.");
eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);
}
}
@@ -1156,20 +1156,20 @@ static int rt_hw_imxrt_eth_init(void)
imxrt_eth_device.parent.eth_rx = rt_imxrt_eth_rx;
imxrt_eth_device.parent.eth_tx = rt_imxrt_eth_tx;
dbg_log(DBG_LOG, "sem init: tx_wait\r\n");
LOG_D("sem init: tx_wait\r");
/* init tx semaphore */
rt_sem_init(&imxrt_eth_device.tx_wait, "tx_wait", 0, RT_IPC_FLAG_FIFO);
/* register eth device */
dbg_log(DBG_LOG, "eth_device_init start\r\n");
LOG_D("eth_device_init start\r");
state = eth_device_init(&(imxrt_eth_device.parent), "e0");
if (RT_EOK == state)
{
dbg_log(DBG_LOG, "eth_device_init success\r\n");
LOG_D("eth_device_init success\r");
}
else
{
dbg_log(DBG_LOG, "eth_device_init faild: %d\r\n", state);
LOG_D("eth_device_init faild: %d\r", state);
}
eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);

52
bsp/imxrt1052-evk/drivers/drv_eth_fire.c
View File

@@ -380,13 +380,13 @@ static void _enet_config(void)
/* Set SMI to get PHY link status. */
sysClock = CLOCK_GetFreq(kCLOCK_AhbClk);
dbg_log(DBG_LOG, "deinit\n");
LOG_D("deinit");
ENET_Deinit(imxrt_eth_device.enet_base);
dbg_log(DBG_LOG, "init\n");
LOG_D("init");
ENET_Init(imxrt_eth_device.enet_base, &imxrt_eth_device.enet_handle, &config, &buffConfig, &imxrt_eth_device.dev_addr[0], sysClock);
dbg_log(DBG_LOG, "set call back\n");
LOG_D("set call back");
ENET_SetCallback(&imxrt_eth_device.enet_handle, _enet_callback, &imxrt_eth_device);
dbg_log(DBG_LOG, "active read\n");
LOG_D("active read");
ENET_ActiveRead(imxrt_eth_device.enet_base);
}
@@ -430,7 +430,7 @@ static void packet_dump(const char *msg, const struct pbuf *p)
/* initialize the interface */
static rt_err_t rt_imxrt_eth_init(rt_device_t dev)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_init...\n");
LOG_D("rt_imxrt_eth_init...");
_enet_config();
return RT_EOK;
@@ -438,33 +438,33 @@ static rt_err_t rt_imxrt_eth_init(rt_device_t dev)
static rt_err_t rt_imxrt_eth_open(rt_device_t dev, rt_uint16_t oflag)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_open...\n");
LOG_D("rt_imxrt_eth_open...");
return RT_EOK;
}
static rt_err_t rt_imxrt_eth_close(rt_device_t dev)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_close...\n");
LOG_D("rt_imxrt_eth_close...");
return RT_EOK;
}
static rt_size_t rt_imxrt_eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_read...\n");
LOG_D("rt_imxrt_eth_read...");
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_size_t rt_imxrt_eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_write...\n");
LOG_D("rt_imxrt_eth_write...");
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_err_t rt_imxrt_eth_control(rt_device_t dev, int cmd, void *args)
{
dbg_log(DBG_LOG, "rt_imxrt_eth_control...\n");
LOG_D("rt_imxrt_eth_control...");
switch (cmd)
{
case NIOCTL_GADDR:
@@ -672,7 +672,7 @@ rt_err_t rt_imxrt_eth_tx(rt_device_t dev, struct pbuf *p)
RT_ASSERT(p != NULL);
RT_ASSERT(enet_handle != RT_NULL);
dbg_log(DBG_LOG, "rt_imxrt_eth_tx: %d\n", p->len);
LOG_D("rt_imxrt_eth_tx: %d", p->len);
#ifdef ETH_TX_DUMP
packet_dump("send", p);
@@ -726,18 +726,18 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev)
}
else
{
dbg_log(DBG_LOG, " A frame read failed\n");
LOG_D(" A frame read failed");
pbuf_free(p);
}
}
else
{
dbg_log(DBG_LOG, " pbuf_alloc faild\n");
LOG_D(" pbuf_alloc faild");
}
}
else if (status == kStatus_ENET_RxFrameError)
{
dbg_log(DBG_WARNING, "ENET_GetRxFrameSize: kStatus_ENET_RxFrameError\n");
LOG_W("ENET_GetRxFrameSize: kStatus_ENET_RxFrameError");
/* Update the received buffer when error happened. */
/* Get the error information of the received g_frame. */
ENET_GetRxErrBeforeReadFrame(enet_handle, error_statistic);
@@ -775,20 +775,20 @@ static void phy_monitor_thread_entry(void *parameter)
if (kPHY_Speed10M == speed)
{
dbg_log(DBG_LOG, "10M\n");
LOG_D("10M");
}
else
{
dbg_log(DBG_LOG, "100M\n");
LOG_D("100M");
}
if (kPHY_HalfDuplex == duplex)
{
dbg_log(DBG_LOG, "half dumplex\n");
LOG_D("half dumplex");
}
else
{
dbg_log(DBG_LOG, "full dumplex\n");
LOG_D("full dumplex");
}
if ((imxrt_eth_device.speed != (enet_mii_speed_t)speed)
@@ -797,19 +797,19 @@ static void phy_monitor_thread_entry(void *parameter)
imxrt_eth_device.speed = (enet_mii_speed_t)speed;
imxrt_eth_device.duplex = (enet_mii_duplex_t)duplex;
dbg_log(DBG_LOG, "link up, and update eth mode.\n");
LOG_D("link up, and update eth mode.");
rt_imxrt_eth_init((rt_device_t)&imxrt_eth_device);
}
else
{
dbg_log(DBG_LOG, "link up, eth not need re-config.\n");
LOG_D("link up, eth not need re-config.");
}
dbg_log(DBG_LOG, "link up.\n");
LOG_D("link up.");
eth_device_linkchange(&imxrt_eth_device.parent, RT_TRUE);
}
else // link down
{
dbg_log(DBG_LOG, "link down.\n");
LOG_D("link down.");
eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);
}
}
@@ -850,20 +850,20 @@ static int rt_hw_imxrt_eth_init(void)
imxrt_eth_device.parent.eth_rx = rt_imxrt_eth_rx;
imxrt_eth_device.parent.eth_tx = rt_imxrt_eth_tx;
dbg_log(DBG_LOG, "sem init: tx_wait\r\n");
LOG_D("sem init: tx_wait\r");
/* init tx semaphore */
rt_sem_init(&imxrt_eth_device.tx_wait, "tx_wait", 0, RT_IPC_FLAG_FIFO);
/* register eth device */
dbg_log(DBG_LOG, "eth_device_init start\r\n");
LOG_D("eth_device_init start\r");
state = eth_device_init(&(imxrt_eth_device.parent), "e0");
if (RT_EOK == state)
{
dbg_log(DBG_LOG, "eth_device_init success\r\n");
LOG_D("eth_device_init success\r");
}
else
{
dbg_log(DBG_LOG, "eth_device_init faild: %d\r\n", state);
LOG_D("eth_device_init faild: %d\r", state);
}
eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE);

52
bsp/ls1cdev/.config
View File

@@ -13,13 +13,22 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_DEBUG=y
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_DEBUG_INIT=0
CONFIG_RT_DEBUG_THREAD=0
CONFIG_RT_USING_HOOK=y
CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=1024
# CONFIG_RT_USING_TIMER_SOFT is not set
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
@@ -47,11 +56,11 @@ CONFIG_RT_USING_HEAP=y
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
CONFIG_RT_USING_INTERRUPT_INFO=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart2"
# CONFIG_RT_USING_MODULE is not set
#
# RT-Thread Components
@@ -59,6 +68,7 @@ CONFIG_RT_CONSOLE_DEVICE_NAME="uart2"
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
@@ -92,6 +102,7 @@ CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=2
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
CONFIG_DFS_FD_MAX=4
# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_RT_USING_DFS_ELMFAT=y
#
@@ -110,7 +121,6 @@ CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
# CONFIG_RT_USING_DFS_DEVFS is not set
# CONFIG_RT_USING_DFS_NET is not set
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
@@ -121,9 +131,10 @@ CONFIG_RT_DFS_ELM_REENTRANT=y
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_CAN=y
CONFIG_RT_CAN_USING_HDR=y
# CONFIG_RT_CAN_USING_HDR is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
CONFIG_RT_USING_I2C=y
@@ -132,6 +143,8 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
CONFIG_RT_USING_SPI=y
@@ -142,9 +155,13 @@ CONFIG_RT_USING_SPI_MSD=y
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_AUDIO is not set
#
# Using WiFi
#
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
@@ -157,17 +174,24 @@ CONFIG_RT_USING_SPI_MSD=y
CONFIG_RT_USING_LIBC=y
CONFIG_RT_USING_PTHREADS=y
# CONFIG_RT_USING_POSIX is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network stack
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# light weight TCP/IP stack
#
CONFIG_RT_USING_LWIP=y
CONFIG_RT_USING_LWIP141=y
# CONFIG_RT_USING_LWIP202 is not set
# CONFIG_RT_USING_LWIP210 is not set
CONFIG_RT_LWIP_IGMP=y
CONFIG_RT_LWIP_ICMP=y
# CONFIG_RT_LWIP_SNMP is not set
@@ -210,11 +234,18 @@ CONFIG_LWIP_SO_SNDTIMEO=1
CONFIG_LWIP_SO_RCVBUF=1
# CONFIG_RT_LWIP_NETIF_LOOPBACK is not set
CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_RT_LWIP_STATS is not set
# CONFIG_RT_LWIP_DEBUG is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
# CONFIG_LWIP_USING_DHCPD is not set
#
@@ -227,6 +258,7 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
#
# RT-Thread online packages
@@ -318,8 +350,8 @@ CONFIG_RT_USING_UART2=y
CONFIG_RT_UART_RX_BUFFER_SIZE=64
CONFIG_RT_USING_GMAC_INT_MODE=y
# CONFIG_RT_USING_FPU is not set
CONFIG_RT_USING_SPI0=y
CONFIG_RT_USING_SPI1=y
# CONFIG_RT_USING_SPI0 is not set
# CONFIG_RT_USING_SPI1 is not set
CONFIG_RT_USING_I2C1=y
CONFIG_RT_USING_I2C2=y
CONFIG_USING_BXCAN0=y

134
bsp/ls1cdev/rtconfig.h
View File

@@ -8,15 +8,27 @@
#define RT_NAME_MAX 10
#define RT_ALIGN_SIZE 8
/* RT_THREAD_PRIORITY_8 is not set */
#define RT_THREAD_PRIORITY_32
/* RT_THREAD_PRIORITY_256 is not set */
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_DEBUG
#define RT_USING_OVERFLOW_CHECK
#define RT_DEBUG_INIT 0
#define RT_DEBUG_THREAD 0
#define RT_USING_HOOK
#define RT_IDEL_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 1024
/* RT_USING_TIMER_SOFT is not set */
#define RT_DEBUG
/* RT_DEBUG_INIT_CONFIG is not set */
/* RT_DEBUG_THREAD_CONFIG is not set */
/* RT_DEBUG_SCHEDULER_CONFIG is not set */
/* RT_DEBUG_IPC_CONFIG is not set */
/* RT_DEBUG_TIMER_CONFIG is not set */
/* RT_DEBUG_IRQ_CONFIG is not set */
/* RT_DEBUG_MEM_CONFIG is not set */
/* RT_DEBUG_SLAB_CONFIG is not set */
/* RT_DEBUG_MEMHEAP_CONFIG is not set */
/* RT_DEBUG_MODULE_CONFIG is not set */
/* Inter-Thread communication */
@@ -25,17 +37,23 @@
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* RT_USING_SIGNALS is not set */
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_MEMHEAP
/* RT_USING_NOHEAP is not set */
#define RT_USING_SMALL_MEM
/* RT_USING_SLAB is not set */
/* RT_USING_MEMHEAP_AS_HEAP is not set */
/* RT_USING_MEMTRACE is not set */
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
/* RT_USING_DEVICE_OPS is not set */
#define RT_USING_INTERRUPT_INFO
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
@@ -46,9 +64,11 @@
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* RT_USING_CPLUSPLUS is not set */
/* Command shell */
@@ -58,11 +78,14 @@
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
/* FINSH_ECHO_DISABLE_DEFAULT is not set */
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
/* FINSH_USING_AUTH is not set */
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
/* FINSH_USING_MSH_ONLY is not set */
#define FINSH_ARG_MAX 10
/* Device virtual file system */
@@ -72,6 +95,7 @@
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEM_TYPES_MAX 2
#define DFS_FD_MAX 4
/* RT_USING_DFS_MNTTABLE is not set */
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
@@ -79,40 +103,82 @@
#define RT_DFS_ELM_CODE_PAGE 936
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_0
/* RT_DFS_ELM_USE_LFN_1 is not set */
/* RT_DFS_ELM_USE_LFN_2 is not set */
/* RT_DFS_ELM_USE_LFN_3 is not set */
#define RT_DFS_ELM_USE_LFN 0
#define RT_DFS_ELM_MAX_LFN 64
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
/* RT_DFS_ELM_USE_ERASE is not set */
#define RT_DFS_ELM_REENTRANT
/* RT_USING_DFS_DEVFS is not set */
/* RT_USING_DFS_ROMFS is not set */
/* RT_USING_DFS_RAMFS is not set */
/* RT_USING_DFS_UFFS is not set */
/* RT_USING_DFS_JFFS2 is not set */
/* RT_USING_DFS_NFS is not set */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
#define RT_USING_CAN
#define RT_CAN_USING_HDR
/* RT_CAN_USING_HDR is not set */
/* RT_USING_HWTIMER is not set */
/* RT_USING_CPUTIME is not set */
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_PIN
/* RT_USING_PWM is not set */
/* RT_USING_MTD_NOR is not set */
/* RT_USING_MTD_NAND is not set */
/* RT_USING_MTD is not set */
/* RT_USING_PM is not set */
/* RT_USING_RTC is not set */
/* RT_USING_SDIO is not set */
#define RT_USING_SPI
#define RT_USING_SPI_MSD
/* RT_USING_SFUD is not set */
/* RT_USING_W25QXX is not set */
/* RT_USING_GD is not set */
/* RT_USING_ENC28J60 is not set */
/* RT_USING_SPI_WIFI is not set */
/* RT_USING_WDT is not set */
/* RT_USING_AUDIO is not set */
/* Using WiFi */
/* RT_USING_WIFI is not set */
/* Using USB */
/* RT_USING_USB_HOST is not set */
/* RT_USING_USB_DEVICE is not set */
/* POSIX layer and C standard library */
#define RT_USING_LIBC
#define RT_USING_PTHREADS
/* RT_USING_POSIX is not set */
/* RT_USING_MODULE is not set */
/* Network stack */
/* Network */
/* Socket abstraction layer */
/* RT_USING_SAL is not set */
/* light weight TCP/IP stack */
#define RT_USING_LWIP
#define RT_USING_LWIP141
/* RT_USING_LWIP202 is not set */
/* RT_USING_LWIP210 is not set */
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
/* RT_LWIP_SNMP is not set */
#define RT_LWIP_DNS
#define RT_LWIP_DHCP
#define IP_SOF_BROADCAST 1
@@ -125,6 +191,8 @@
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
/* RT_LWIP_RAW is not set */
/* RT_LWIP_PPP is not set */
#define RT_MEMP_NUM_NETCONN 8
#define RT_LWIP_PBUF_NUM 4
#define RT_LWIP_RAW_PCB_NUM 4
@@ -136,24 +204,40 @@
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
/* LWIP_NO_RX_THREAD is not set */
/* LWIP_NO_TX_THREAD is not set */
#define RT_LWIP_ETHTHREAD_PRIORITY 14
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
/* RT_LWIP_REASSEMBLY_FRAG is not set */
#define LWIP_NETIF_STATUS_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
/* RT_LWIP_NETIF_LOOPBACK is not set */
#define LWIP_NETIF_LOOPBACK 0
/* RT_LWIP_STATS is not set */
/* RT_LWIP_DEBUG is not set */
/* Modbus master and slave stack */
/* RT_USING_MODBUS is not set */
/* AT commands */
/* RT_USING_AT is not set */
/* LWIP_USING_DHCPD is not set */
/* VBUS(Virtual Software BUS) */
/* RT_USING_VBUS is not set */
/* Utilities */
/* RT_USING_LOGTRACE is not set */
/* RT_USING_RYM is not set */
/* RT_USING_ULOG is not set */
/* RT-Thread online packages */
@@ -161,40 +245,76 @@
/* RT-Thread GUI Engine */
/* PKG_USING_GUIENGINE is not set */
/* PKG_USING_LWEXT4 is not set */
/* PKG_USING_PARTITION is not set */
/* PKG_USING_SQLITE is not set */
/* PKG_USING_RTI is not set */
/* IoT - internet of things */
/* PKG_USING_PAHOMQTT is not set */
/* PKG_USING_WEBCLIENT is not set */
/* PKG_USING_MONGOOSE is not set */
/* PKG_USING_WEBTERMINAL is not set */
/* PKG_USING_CJSON is not set */
/* PKG_USING_LJSON is not set */
/* PKG_USING_EZXML is not set */
/* PKG_USING_NANOPB is not set */
/* PKG_USING_GAGENT_CLOUD is not set */
/* Wi-Fi */
/* Marvell WiFi */
/* PKG_USING_WLANMARVELL is not set */
/* Wiced WiFi */
/* PKG_USING_WLAN_WICED is not set */
/* PKG_USING_COAP is not set */
/* PKG_USING_NOPOLL is not set */
/* PKG_USING_NETUTILS is not set */
/* security packages */
/* PKG_USING_MBEDTLS is not set */
/* PKG_USING_libsodium is not set */
/* PKG_USING_TINYCRYPT is not set */
/* language packages */
/* PKG_USING_JERRYSCRIPT is not set */
/* PKG_USING_MICROPYTHON is not set */
/* multimedia packages */
/* PKG_USING_OPENMV is not set */
/* tools packages */
/* PKG_USING_CMBACKTRACE is not set */
/* PKG_USING_EASYLOGGER is not set */
/* PKG_USING_SYSTEMVIEW is not set */
/* PKG_USING_IPERF is not set */
/* miscellaneous packages */
/* PKG_USING_FASTLZ is not set */
/* PKG_USING_MINILZO is not set */
/* PKG_USING_QUICKLZ is not set */
/* PKG_USING_MULTIBUTTON is not set */
/* example package: hello */
/* PKG_USING_HELLO is not set */
/* RT_USING_SELF_BOOT is not set */
#define RT_USING_UART2
#define RT_UART_RX_BUFFER_SIZE 64
#define RT_USING_GMAC_INT_MODE
#define RT_USING_SPI0
#define RT_USING_SPI1
/* RT_USING_FPU is not set */
/* RT_USING_SPI0 is not set */
/* RT_USING_SPI1 is not set */
#define RT_USING_I2C1
#define RT_USING_I2C2
#define USING_BXCAN0

328
bsp/nuvoton_m487/.config Normal file
View File

@@ -0,0 +1,328 @@
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
# CONFIG_RT_USING_TIMER_SOFT is not set
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
# CONFIG_RT_USING_MESSAGEQUEUE is not set
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
# CONFIG_RT_USING_MEMPOOL is not set
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=1024
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
# CONFIG_FINSH_USING_MSH_ONLY is not set
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
CONFIG_RT_USING_DFS=y
# CONFIG_DFS_USING_WORKDIR is not set
CONFIG_DFS_FILESYSTEMS_MAX=1
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
CONFIG_DFS_FD_MAX=32
# CONFIG_RT_USING_DFS_MNTTABLE is not set
# CONFIG_RT_USING_DFS_ELMFAT is not set
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_JFFS2 is not set
# CONFIG_RT_USING_DFS_NFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=64
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PIN is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
#
# Using WiFi
#
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# light weight TCP/IP stack
#
CONFIG_RT_USING_LWIP=y
# CONFIG_RT_USING_LWIP141 is not set
CONFIG_RT_USING_LWIP202=y
# CONFIG_RT_USING_LWIP210 is not set
# CONFIG_RT_USING_LWIP_IPV6 is not set
CONFIG_RT_LWIP_IGMP=y
CONFIG_RT_LWIP_ICMP=y
# CONFIG_RT_LWIP_SNMP is not set
CONFIG_RT_LWIP_DNS=y
CONFIG_RT_LWIP_DHCP=y
CONFIG_IP_SOF_BROADCAST=1
CONFIG_IP_SOF_BROADCAST_RECV=1
#
# Static IPv4 Address
#
CONFIG_RT_LWIP_IPADDR="192.168.1.30"
CONFIG_RT_LWIP_GWADDR="192.168.1.1"
CONFIG_RT_LWIP_MSKADDR="255.255.255.0"
CONFIG_RT_LWIP_UDP=y
CONFIG_RT_LWIP_TCP=y
CONFIG_RT_LWIP_RAW=y
# CONFIG_RT_LWIP_PPP is not set
CONFIG_RT_MEMP_NUM_NETCONN=19
CONFIG_RT_LWIP_PBUF_NUM=0
CONFIG_RT_LWIP_RAW_PCB_NUM=4
CONFIG_RT_LWIP_UDP_PCB_NUM=4
CONFIG_RT_LWIP_TCP_PCB_NUM=19
CONFIG_RT_LWIP_TCP_SEG_NUM=40
CONFIG_RT_LWIP_TCP_SND_BUF=2920
CONFIG_RT_LWIP_TCP_WND=2920
CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10
CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8
CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=1024
# CONFIG_LWIP_NO_RX_THREAD is not set
# CONFIG_LWIP_NO_TX_THREAD is not set
CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=768
CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
CONFIG_SO_REUSE=1
CONFIG_LWIP_SO_RCVTIMEO=1
CONFIG_LWIP_SO_SNDTIMEO=1
CONFIG_LWIP_SO_RCVBUF=1
# CONFIG_RT_LWIP_NETIF_LOOPBACK is not set
CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_RT_LWIP_STATS is not set
# CONFIG_RT_LWIP_DEBUG is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
# CONFIG_LWIP_USING_DHCPD is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
#
# RT-Thread online packages
#
#
# system packages
#
#
# RT-Thread GUI Engine
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
#
# language packages
#
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_IPERF is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
#
# example package: hello
#
# CONFIG_PKG_USING_HELLO is not set

25
bsp/nuvoton_m487/Kconfig Normal file
View File

@@ -0,0 +1,25 @@
mainmenu "RT-Thread Configuration"
config $BSP_DIR
string
option env="BSP_ROOT"
default "."
config $RTT_DIR
string
option env="RTT_ROOT"
default "../.."
# you can change the RTT_ROOT default "../.." to your rtthread_root,
# example : default "F:/git_repositories/rt-thread"
config $PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$BSP_DIR/driver/Kconfig"

66
bsp/nuvoton_m487/README.md Normal file
View File

@@ -0,0 +1,66 @@
# NuMaker-PFM-M487
## 1. 简介
核心板板载主要资源如下：
| 硬件 | 描述 |
| -- | -- |
|芯片型号| M487JIDAE |
|CPU| ARM Cortex-M4 |
|主频| 192MHz |
|片内SRAM| 160kB |
|片内Flash| 512kB |
|SPI FLASH| W25Q32 |
|PHY| IP101GR |
|Audio Codec| NAU88L25 |
## 2. 编译说明
板级包支持MDK4工程生成、GCC编译器，以下是具体版本信息：
| IDE/编译器 | 已测试版本 |
| ---------- | ---------------------------- |
| MDK4 | 4.73 |
| GCC | GCC 5.4.1 20160919 (release) |
使用MDK4打开工程需要安装Nu-Link_Keil_Driver
## 3. 烧写及执行
连接好串口，可以使用115200-N-8-1的配置方式连接到设备上。设备使用的串口引脚是：`[Tx:PB13 Rx:PB12]`
当正确编译产生出rtthread.bin映像文件后，可以使用NU-link或者JLINK下载
### 3.1 运行结果
如果编译 & 烧写无误，当复位设备后，会在串口上看到RT-Thread的启动logo信息：
## 4. 驱动支持情况及计划
| 驱动 | 支持情况 | 备注 |
| ------ | ---- | :------: |
| UART | 支持 | UART0|
### 4.1 IO在板级支持包中的映射情况
| IO号 | 板级包中的定义 |
| -- | -- |
| PH0 | LED_R |
| PH1 | LED_Y |
| PH2 | LED_G |
| PG15 | KEY2 |
| PF11| KEY3 |
## 5. 联系人信息
维护人：[bluebear233](https://github.com/bluebear233)
## 6. 参考
* 板子[数据手册][1]
* 芯片[数据手册][2]
[1]: http://www.nuvoton.com/resource-files/UM_NuMaker-PFM-M487_User_Manual_EN_Rev1.00.pdf
[2]: http://www.nuvoton.com/resource-files/TRM_M480_Series_EN_Rev1.01.pdf

14
bsp/nuvoton_m487/SConscript Normal file
View File

@@ -0,0 +1,14 @@
# for module compiling
import os
Import('RTT_ROOT')
cwd = str(Dir('#'))
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')

35
bsp/nuvoton_m487/SConstruct Normal file
View File

@@ -0,0 +1,35 @@
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread-m487.' + rtconfig.TARGET_EXT
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# make a building
DoBuilding(TARGET, objs)

11
bsp/nuvoton_m487/applications/SConscript Normal file
View File

@@ -0,0 +1,11 @@
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

18
bsp/nuvoton_m487/applications/main.c Normal file
View File

@@ -0,0 +1,18 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
#include <stdio.h>
#include <stdlib.h>
int main(int argc, char** argv)
{
printf("Hello RT-Thread!\n");
return 0;
}

15
bsp/nuvoton_m487/applications/mnt.c Normal file
View File

@@ -0,0 +1,15 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
#include <rtthread.h>
int mnt_init(void)
{
return 0;
}

1
bsp/nuvoton_m487/driver/Kconfig Normal file
View File

@@ -0,0 +1 @@

14
bsp/nuvoton_m487/driver/SConscript Normal file
View File

@@ -0,0 +1,14 @@
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
src = Split('''
board.c
drv_uart.c
''')
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

114
bsp/nuvoton_m487/driver/board.c Normal file
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@@ -0,0 +1,114 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-16 bluebear233 first version
*/
#include <rtconfig.h>
#include <rtthread.h>
#include <rthw.h>
#include "NuMicro.h"
#include "drv_uart.h"
#include "board.h"
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__
#pragma section="HEAP"
#else
extern int __bss_end;
extern int __ram_top;
#endif
/**
* This function will initial Clock tree.
*/
static void clock_init(void)
{
/* Unlock protected registers */
SYS_UnlockReg();
SystemInit();
/* Set XT1_OUT(PF.2) and XT1_IN(PF.3) to input mode */
PF->MODE &= ~(GPIO_MODE_MODE2_Msk | GPIO_MODE_MODE3_Msk);
/* Enable External XTAL (4~24 MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
/* Waiting for 12MHz clock ready */
CLK_WaitClockReady( CLK_STATUS_HXTSTB_Msk);
/* Switch HCLK clock source to HXT */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HXT,CLK_CLKDIV0_HCLK(1));
/* Set core clock as PLL_CLOCK from PLL */
CLK_SetCoreClock(FREQ_192MHZ);
/* Set both PCLK0 and PCLK1 as HCLK/4 */
CLK->PCLKDIV = CLK_PCLKDIV_PCLK0DIV4 | CLK_PCLKDIV_PCLK1DIV4;
SystemCoreClockUpdate();
/* Lock protected registers */
SYS_LockReg();
}
/**
* This function will initial M487 board.
*/
void rt_hw_board_init(void)
{
clock_init();
#ifdef RT_USING_HEAP
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)SRAM_END);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)SRAM_END);
#else
/* init memory system */
rt_system_heap_init((void*)&__bss_end, (void*)&__ram_top);
#endif
#endif /* RT_USING_HEAP */
rt_hw_uart_init();
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
NVIC_SetPriorityGrouping(7);
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}
/**
* This is the timer interrupt service routine.
*
*/
void SysTick_Handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
void rt_hw_cpu_reset(void)
{
SYS_UnlockReg();
SYS->IPRST0 |= SYS_IPRST0_CHIPRST_Msk;
}

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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-16 bluebear233 first version
*/
#ifndef __BOARD_H__
#define __BOARD_H__
// <o> Internal SRAM memory size[Kbytes] <8-64>
#define SRAM_SIZE (160)
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
#define RT_UART_485_MODE 1
#define RT_UART_FLOW_CTS_CTRL 2
#define RT_UART_FLOW_RTS_CTRL 3
#define RT_UART_CLEAR_BUF 4
void rt_hw_pdma_init(void);
void rt_hw_uart_handle(void);
void rt_hw_sc_init(void);
void rt_hw_usart_init(void);
void rt_hw_uusart_init(void);
void rt_hw_io_init(void);
void phy_error_led(void);
unsigned char *eth_get_default_mac(void);
void eth_set_mac(const unsigned char * mac);
void wdt_reload(void);
unsigned int get_uid(void);
#endif /* BOARD_H_ */

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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-16 bluebear233 first version
*/
#include <rtconfig.h>
#include <rtdevice.h>
#include <drv_uart.h>
#include "NuMicro.h"
/* Private Define ---------------------------------------------------------------*/
#define USEING_UART0 //Tx:PB13 Rx:PB12
/* Private Typedef --------------------------------------------------------------*/
struct usart
{
rt_serial_t dev;
UART_T *usart_base;
};
typedef struct usart* usart_t;
/* Private functions ------------------------------------------------------------*/
static rt_err_t usart_gpio_configure(struct rt_serial_device *serial);
static rt_err_t usart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
static rt_err_t usart_control(struct rt_serial_device *serial, int cmd, void *arg);
static int usart_send(struct rt_serial_device *serial, char c);
static int usart_receive(struct rt_serial_device *serial);
static void rt_hw_uart_register(usart_t uart, UART_T *uart_base,
char *name);
static void uart_isr(usart_t serial);
/* Private Variables ------------------------------------------------------------*/
static const struct rt_uart_ops m487_uart_ops =
{ usart_configure, usart_control, usart_send, usart_receive,
RT_NULL };
static const struct serial_configure m487_uart_default_config =
RT_SERIAL_CONFIG_DEFAULT;
#ifdef USEING_UART0
struct usart uart0;
#endif
/* Interrupt Handle Funtion ----------------------------------------------------*/
#ifdef USEING_UART0
/* 串口0 中断入口 */
void UART0_IRQHandler(void)
{
uart_isr(&uart0);
}
#endif
/**
* 中断处理函数
*/
static void uart_isr(usart_t serial)
{
// 获取串口基地址
UART_T *uart_base = ((usart_t)serial)->usart_base;
// 获取中断事件
uint32_t u32IntSts= uart_base->INTSTS;
// 接收中断
if(u32IntSts & (UART_INTSTS_RDAINT_Msk | UART_INTSTS_RXTOINT_Msk))
{
rt_hw_serial_isr(&serial->dev, RT_SERIAL_EVENT_RX_IND);
}
}
/**
* 串口端口配置
*/
static rt_err_t usart_gpio_configure(struct rt_serial_device *serial)
{
// 获取串口基地址
UART_T *uart_base = ((usart_t)serial)->usart_base;
switch((uint32_t)uart_base)
{
case UART0_BASE:
SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk);
SYS->GPB_MFPH |= (SYS_GPB_MFPH_PB12MFP_UART0_RXD | SYS_GPB_MFPH_PB13MFP_UART0_TXD);
break;
default:
rt_kprintf("unknow uart module\n");
RT_ASSERT(0);
}
return RT_EOK;
}
/**
* 串口配置
*/
static rt_err_t usart_configure(struct rt_serial_device *serial,
struct serial_configure *cfg)
{
// 获取串口基地址
UART_T *uart_base = ((usart_t)serial)->usart_base;
uint32_t uart_module = 0;
uint32_t uart_word_len = 0;
uint32_t uart_stop_bit = 0;
uint32_t uart_parity = 0;
IRQn_Type uart_irq_channel = 0;
switch((uint32_t)uart_base)
{
case UART0_BASE:
uart_module = UART0_MODULE;
uart_irq_channel = UART0_IRQn;
break;
default:
rt_kprintf("unknow uart module\n");
RT_ASSERT(0);
}
/* Enable IP clock */
CLK_EnableModuleClock(uart_module);
/* Select IP clock source */
CLK_SetModuleClock(uart_module, CLK_CLKSEL1_UART0SEL_HXT, CLK_CLKDIV0_UART0(1));
/* check baudrate */
RT_ASSERT(cfg->baud_rate != 0);
/* check word len */
switch(cfg->data_bits)
{
case DATA_BITS_5:
uart_word_len = UART_WORD_LEN_5;
break;
case DATA_BITS_6:
uart_word_len = UART_WORD_LEN_6;
break;
case DATA_BITS_7:
uart_word_len = UART_WORD_LEN_7;
break;
case DATA_BITS_8:
uart_word_len = UART_WORD_LEN_8;
break;
default:
rt_kprintf("unsupose data len");
RT_ASSERT(0);
}
/* check stop bit */
switch(cfg->stop_bits)
{
case STOP_BITS_1:
uart_stop_bit = UART_STOP_BIT_1;
break;
case STOP_BITS_2:
uart_stop_bit = UART_STOP_BIT_2;
break;
default:
rt_kprintf("unsupose stop bit");
RT_ASSERT(0);
}
/* check stop bit */
switch(cfg->parity)
{
case PARITY_NONE:
uart_parity = UART_PARITY_NONE;
break;
case PARITY_ODD:
uart_parity = UART_PARITY_ODD;
break;
case PARITY_EVEN:
uart_parity = UART_PARITY_EVEN;
break;
default:
rt_kprintf("unsupose parity");
RT_ASSERT(0);
}
/* Open uart */
{
uint32_t u32UartClkSrcSel=0ul, u32UartClkDivNum=0ul;
uint32_t u32ClkTbl[4] = {__HXT, 0ul, __LXT, __HIRC};
uint32_t u32Baud_Div = 0ul;
if(uart_base == (UART_T*)UART0 )
{
/* Get UART clock source selection */
u32UartClkSrcSel = ((uint32_t)(CLK->CLKSEL1 & CLK_CLKSEL1_UART0SEL_Msk)) >> CLK_CLKSEL1_UART0SEL_Pos;
/* Get UART clock divider number */
u32UartClkDivNum = (CLK->CLKDIV0 & CLK_CLKDIV0_UART0DIV_Msk) >> CLK_CLKDIV0_UART0DIV_Pos;
}
else if(uart_base == (UART_T*)UART1 )
{
/* Get UART clock source selection */
u32UartClkSrcSel = (CLK->CLKSEL1 & CLK_CLKSEL1_UART1SEL_Msk) >> CLK_CLKSEL1_UART1SEL_Pos;
/* Get UART clock divider number */
u32UartClkDivNum = (CLK->CLKDIV0 & CLK_CLKDIV0_UART1DIV_Msk) >> CLK_CLKDIV0_UART1DIV_Pos;
}
else if(uart_base == (UART_T*)UART2 )
{
/* Get UART clock source selection */
u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART2SEL_Msk) >> CLK_CLKSEL3_UART2SEL_Pos;
/* Get UART clock divider number */
u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART2DIV_Msk) >> CLK_CLKDIV4_UART2DIV_Pos;
}
else if(uart_base == (UART_T*)UART3 )
{
/* Get UART clock source selection */
u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART3SEL_Msk) >> CLK_CLKSEL3_UART3SEL_Pos;
/* Get UART clock divider number */
u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART3DIV_Msk) >> CLK_CLKDIV4_UART3DIV_Pos;
}
else if(uart_base == (UART_T*)UART4 )
{
/* Get UART clock source selection */
u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART4SEL_Msk) >> CLK_CLKSEL3_UART4SEL_Pos;
/* Get UART clock divider number */
u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART4DIV_Msk) >> CLK_CLKDIV4_UART4DIV_Pos;
}
else if(uart_base == (UART_T*)UART5 )
{
/* Get UART clock source selection */
u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART5SEL_Msk) >> CLK_CLKSEL3_UART5SEL_Pos;
/* Get UART clock divider number */
u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART5DIV_Msk) >> CLK_CLKDIV4_UART5DIV_Pos;
}
/* Select UART function */
uart_base->FUNCSEL = UART_FUNCSEL_UART;
/* Set UART line configuration */
uart_base->LINE = uart_word_len | uart_stop_bit | uart_parity;
/* Set UART Rx and RTS trigger level */
uart_base->FIFO &= ~(UART_FIFO_RFITL_Msk | UART_FIFO_RTSTRGLV_Msk);
/* Get PLL clock frequency if UART clock source selection is PLL */
if(u32UartClkSrcSel == 1ul)
{
u32ClkTbl[u32UartClkSrcSel] = CLK_GetPLLClockFreq();
}
/* Set UART baud rate */
if(cfg->baud_rate != 0ul)
{
u32Baud_Div = UART_BAUD_MODE2_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), cfg->baud_rate);
if(u32Baud_Div > 0xFFFFul)
{
uart_base->BAUD = (UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), cfg->baud_rate));
}
else
{
uart_base->BAUD = (UART_BAUD_MODE2 | u32Baud_Div);
}
}
}
/* config nvic */
NVIC_EnableIRQ(uart_irq_channel);
/* config gpio */
usart_gpio_configure(serial);
return RT_EOK;
}
/**
* 串口中断控制
*/
static rt_err_t usart_control(struct rt_serial_device *serial,
int cmd, void *arg)
{
rt_err_t result = RT_EOK;
rt_uint32_t flag;
// 获取串口基地址
UART_T *uart_base = ((usart_t)serial)->usart_base;
switch ((uint32_t) arg)
{
case RT_DEVICE_FLAG_INT_RX:
flag = UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk | UART_INTEN_TOCNTEN_Msk;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
UART_DISABLE_INT(uart_base, flag);
break;
case RT_DEVICE_CTRL_SET_INT:
UART_ENABLE_INT(uart_base, flag);
break;
default:
RT_ASSERT(0);
}
break;
// TODO 完善DMA接口
// case RT_DEVICE_FLAG_DMA_TX:
// USART_DMACmd(dev->usart_base, USART_DMAReq_Tx, ENABLE);
// stm32_uart_tx_dma_configure(dev, RT_TRUE);
// stm32_uart_tx_dma_nvic(dev, RT_TRUE);
// break;
default:
RT_ASSERT(0)
;
}
return result;
}
/**
* 串口发送函数
*/
static int usart_send(struct rt_serial_device *serial, char c)
{
// 获取串口基地址
UART_T *uart_base = ((usart_t)serial)->usart_base;
// 等待FIFO 发送
while(uart_base->FIFOSTS & UART_FIFOSTS_TXFULL_Msk);
// 发送字符
uart_base->DAT = c;
return 1;
}
/**
* 串口接收函数
*/
static int usart_receive(struct rt_serial_device *serial)
{
// 获取串口基地址
UART_T *uart_base = ((usart_t)serial)->usart_base;
// 如果FIFO 为空返回
if(uart_base->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
{
return -1;
}
return UART_READ(uart_base);
}
/**
* @brief 串口设备注册
* @param uart : UART设备结构体
* @param uart_base : STM32 UART外设基地址
* @param name : STM32 UART设备名
* @param tx_dma_channel : STM32 UART TX的DMA通道基地址(可选)
*/
static void rt_hw_uart_register(usart_t usart, UART_T * uart_base, char *name)
{
rt_uint32_t flag;
RT_ASSERT(usart != RT_NULL);
RT_ASSERT(uart_base != RT_NULL);
// 没有定义对应的硬件I2C
if (!(uart_base == UART0 || uart_base == UART1 || uart_base == UART2
|| uart_base == UART3 || uart_base == UART4 || uart_base == UART5))
{
RT_ASSERT(0);
}
usart->usart_base = uart_base;
usart->dev.ops = &m487_uart_ops;
usart->dev.config = m487_uart_default_config;
flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
rt_hw_serial_register(&usart->dev, name,
flag, RT_NULL);
}
/**
* 硬件串口注册
*/
int rt_hw_uart_init(void)
{
#ifdef USEING_UART0
rt_hw_uart_register(&uart0, UART0, "uart0");
#endif
return 0;
}

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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-16 bluebear233 first version
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
int rt_hw_uart_init(void);
#endif /* __DRV_UART_H__ */

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/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. October 2015
* $Revision: V.1.4.5 a
*
* Project: CMSIS DSP Library
* Title: arm_common_tables.h
*
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
*
* Target Processor: Cortex-M4/Cortex-M3
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#ifndef _ARM_COMMON_TABLES_H
#define _ARM_COMMON_TABLES_H
#include "arm_math.h"
extern const uint16_t armBitRevTable[1024];
extern const q15_t armRecipTableQ15[64];
extern const q31_t armRecipTableQ31[64];
/* extern const q31_t realCoefAQ31[1024]; */
/* extern const q31_t realCoefBQ31[1024]; */
extern const float32_t twiddleCoef_16[32];
extern const float32_t twiddleCoef_32[64];
extern const float32_t twiddleCoef_64[128];
extern const float32_t twiddleCoef_128[256];
extern const float32_t twiddleCoef_256[512];
extern const float32_t twiddleCoef_512[1024];
extern const float32_t twiddleCoef_1024[2048];
extern const float32_t twiddleCoef_2048[4096];
extern const float32_t twiddleCoef_4096[8192];
#define twiddleCoef twiddleCoef_4096
extern const q31_t twiddleCoef_16_q31[24];
extern const q31_t twiddleCoef_32_q31[48];
extern const q31_t twiddleCoef_64_q31[96];
extern const q31_t twiddleCoef_128_q31[192];
extern const q31_t twiddleCoef_256_q31[384];
extern const q31_t twiddleCoef_512_q31[768];
extern const q31_t twiddleCoef_1024_q31[1536];
extern const q31_t twiddleCoef_2048_q31[3072];
extern const q31_t twiddleCoef_4096_q31[6144];
extern const q15_t twiddleCoef_16_q15[24];
extern const q15_t twiddleCoef_32_q15[48];
extern const q15_t twiddleCoef_64_q15[96];
extern const q15_t twiddleCoef_128_q15[192];
extern const q15_t twiddleCoef_256_q15[384];
extern const q15_t twiddleCoef_512_q15[768];
extern const q15_t twiddleCoef_1024_q15[1536];
extern const q15_t twiddleCoef_2048_q15[3072];
extern const q15_t twiddleCoef_4096_q15[6144];
extern const float32_t twiddleCoef_rfft_32[32];
extern const float32_t twiddleCoef_rfft_64[64];
extern const float32_t twiddleCoef_rfft_128[128];
extern const float32_t twiddleCoef_rfft_256[256];
extern const float32_t twiddleCoef_rfft_512[512];
extern const float32_t twiddleCoef_rfft_1024[1024];
extern const float32_t twiddleCoef_rfft_2048[2048];
extern const float32_t twiddleCoef_rfft_4096[4096];
/* floating-point bit reversal tables */
#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 )
#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 )
#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 )
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
/* fixed-point bit reversal tables */
#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 )
#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 )
#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 )
#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
/* Tables for Fast Math Sine and Cosine */
extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
#endif /* ARM_COMMON_TABLES_H */

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/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_const_structs.h
*
* Description: This file has constant structs that are initialized for
* user convenience. For example, some can be given as
* arguments to the arm_cfft_f32() function.
*
* Target Processor: Cortex-M4/Cortex-M3
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#ifndef _ARM_CONST_STRUCTS_H
#define _ARM_CONST_STRUCTS_H
#include "arm_math.h"
#include "arm_common_tables.h"
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
#endif

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/**************************************************************************//**
* @file core_cmFunc.h
* @brief CMSIS Cortex-M Core Function Access Header File
* @version V4.30
* @date 20. October 2015
******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CORE_CMFUNC_H
#define __CORE_CMFUNC_H
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ )
#include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ )
#include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
/*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#endif
/*@} end of CMSIS_Core_RegAccFunctions */
#endif /* __CORE_CMFUNC_H */

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/**************************************************************************//**
* @file core_cmInstr.h
* @brief CMSIS Cortex-M Core Instruction Access Header File
* @version V4.30
* @date 20. October 2015
******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CORE_CMINSTR_H
#define __CORE_CMINSTR_H
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ )
#include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ )
#include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
/*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#endif
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
#endif /* __CORE_CMINSTR_H */

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@@ -0,0 +1,96 @@
/**************************************************************************//**
* @file core_cmSimd.h
* @brief CMSIS Cortex-M SIMD Header File
* @version V4.30
* @date 20. October 2015
******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CORE_CMSIMD_H
#define __CORE_CMSIMD_H
#ifdef __cplusplus
extern "C" {
#endif
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
/*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ )
#include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ )
#include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
/*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#endif
/*@} end of group CMSIS_SIMD_intrinsics */
#ifdef __cplusplus
}
#endif
#endif /* __CORE_CMSIMD_H */

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