mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-05-20 11:04:21 +08:00
Merge pull request #5023 from wenbodong2015/BSP_HC32L196
创建 HC32L196 bsp, 实现 uart 和 gpio 驱动
This commit is contained in:
@@ -134,6 +134,7 @@ jobs:
|
||||
- {RTT_BSP: "smartfusion2", RTT_TOOL_CHAIN: "sourcery-arm"}
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||||
- {RTT_BSP: "raspberry-pico", RTT_TOOL_CHAIN: "sourcery-arm"}
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||||
- {RTT_BSP: "raspberry-pi/raspi4-32", RTT_TOOL_CHAIN: "sourcery-arm"}
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||||
- {RTT_BSP: "hc32l196", RTT_TOOL_CHAIN: "sourcery-arm"}
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||||
steps:
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||||
- uses: actions/checkout@v2
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||||
- name: Set up Python
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||||
|
||||
@@ -227,6 +227,16 @@ Path:
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- bsp/hc32f460/Libraries/CMSIS
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- bsp/hc32f460/Libraries/HC32F460_StdPeriph_Driver
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### hc32l196
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||||
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||||
License: bsd-new
|
||||
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Copyright: Copyright (c) 2020, Huada Semiconductor Co., Ltd.
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||||
|
||||
Path:
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- bsp/hc32l196/Libraries/CMSIS
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- bsp/hc32l196/Libraries/HC32L196_StdPeriph_Driver
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### hk32
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||||
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||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,43 @@
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||||
*.pyc
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||||
*.map
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||||
*.dblite
|
||||
*.elf
|
||||
*.bin
|
||||
*.hex
|
||||
*.axf
|
||||
*.exe
|
||||
*.pdb
|
||||
*.idb
|
||||
*.ilk
|
||||
*.old
|
||||
build
|
||||
Debug
|
||||
documentation/html
|
||||
packages/
|
||||
*~
|
||||
*.o
|
||||
*.obj
|
||||
*.out
|
||||
*.bak
|
||||
*.dep
|
||||
*.lib
|
||||
*.i
|
||||
*.d
|
||||
.DS_Stor*
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||||
.config 3
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||||
.config 4
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||||
.config 5
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||||
Midea-X1
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||||
*.uimg
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||||
GPATH
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||||
GRTAGS
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||||
GTAGS
|
||||
.vscode
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||||
JLinkLog.txt
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||||
JLinkSettings.ini
|
||||
DebugConfig/
|
||||
RTE/
|
||||
settings/
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||||
*.uvguix*
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||||
cconfig.h
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||||
.rtt-studio/
|
||||
@@ -0,0 +1,7 @@
|
||||
# files format check exclude path, please follow the instructions below to modify;
|
||||
# If you need to exclude an entire folder, add the folder path in dir_path;
|
||||
# If you need to exclude a file, add the path to the file in file_path.
|
||||
|
||||
|
||||
dir_path:
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||||
- Libraries
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||||
@@ -0,0 +1,23 @@
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mainmenu "RT-Thread Project Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../.."
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||||
|
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config PKGS_DIR
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||||
string
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||||
option env="PKGS_ROOT"
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||||
default "packages"
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||||
|
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "board/Kconfig"
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|
||||
|
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|
||||
@@ -0,0 +1,147 @@
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||||
/******************************************************************************
|
||||
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file base_types.h
|
||||
**
|
||||
** base type common define.
|
||||
** @link SampleGroup Some description @endlink
|
||||
**
|
||||
** - 2019-03-01 1.0 Lux First version.
|
||||
**
|
||||
******************************************************************************/
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||||
|
||||
#ifndef __BASE_TYPES_H__
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#define __BASE_TYPES_H__
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||||
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/*****************************************************************************/
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||||
/* Include files */
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||||
/*****************************************************************************/
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#include <stdio.h>
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#include <string.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <assert.h>
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||||
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/*****************************************************************************/
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/* Global pre-processor symbols/macros ('#define') */
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||||
/*****************************************************************************/
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||||
#ifndef TRUE
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||||
/** Value is true (boolean_t type) */
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#define TRUE ((boolean_t) 1u)
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#endif
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||||
|
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#ifndef FALSE
|
||||
/** Value is false (boolean_t type) */
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||||
#define FALSE ((boolean_t) 0u)
|
||||
#endif
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||||
|
||||
/** Returns the minimum value out of two values */
|
||||
#define MINIMUM( X, Y ) ((X) < (Y) ? (X) : (Y))
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||||
|
||||
/** Returns the maximum value out of two values */
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||||
#define MAXIMUM( X, Y ) ((X) > (Y) ? (X) : (Y))
|
||||
|
||||
/** Returns the dimension of an array */
|
||||
#define ARRAY_SZ( X ) (sizeof(X) / sizeof((X)[0]))
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||||
|
||||
#ifdef __DEBUG_ASSERT
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||||
#define ASSERT(x) do{ assert((x)> 0u) ; }while(0);
|
||||
#else
|
||||
#define ASSERT(x) {}
|
||||
#endif
|
||||
/******************************************************************************
|
||||
* Global type definitions
|
||||
******************************************************************************/
|
||||
|
||||
/** logical datatype (only values are TRUE and FALSE) */
|
||||
typedef uint8_t boolean_t;
|
||||
|
||||
/** single precision floating point number (4 byte) */
|
||||
typedef float float32_t;
|
||||
|
||||
/** double precision floating point number (8 byte) */
|
||||
typedef double float64_t;
|
||||
|
||||
/** ASCII character for string generation (8 bit) */
|
||||
typedef char char_t;
|
||||
|
||||
/** function pointer type to void/void function */
|
||||
typedef void (*func_ptr_t)(void);
|
||||
|
||||
/** function pointer type to void/uint8_t function */
|
||||
typedef void (*func_ptr_arg1_t)(uint8_t u8Param);
|
||||
|
||||
/** generic error codes */
|
||||
typedef enum en_result
|
||||
{
|
||||
Ok = 0u, ///< No error
|
||||
Error = 1u, ///< Non-specific error code
|
||||
ErrorAddressAlignment = 2u, ///< Address alignment does not match
|
||||
ErrorAccessRights = 3u, ///< Wrong mode (e.g. user/system) mode is set
|
||||
ErrorInvalidParameter = 4u, ///< Provided parameter is not valid
|
||||
ErrorOperationInProgress = 5u, ///< A conflicting or requested operation is still in progress
|
||||
ErrorInvalidMode = 6u, ///< Operation not allowed in current mode
|
||||
ErrorUninitialized = 7u, ///< Module (or part of it) was not initialized properly
|
||||
ErrorBufferFull = 8u, ///< Circular buffer can not be written because the buffer is full
|
||||
ErrorTimeout = 9u, ///< Time Out error occurred (e.g. I2C arbitration lost, Flash time-out, etc.)
|
||||
ErrorNotReady = 10u, ///< A requested final state is not reached
|
||||
OperationInProgress = 11u ///< Indicator for operation in progress
|
||||
} en_result_t;
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Global variable declarations ('extern', definition in C source) */
|
||||
/*****************************************************************************/
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Global function prototypes ('extern', definition in C source) */
|
||||
/*****************************************************************************/
|
||||
|
||||
#endif /* __BASE_TYPES_H__ */
|
||||
|
||||
/******************************************************************************/
|
||||
/* EOF (not truncated) */
|
||||
/******************************************************************************/
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,130 @@
|
||||
/******************************************************************************
|
||||
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file stkhc32l19x.h
|
||||
**
|
||||
** stk board common define.
|
||||
** @link SampleGroup Some description @endlink
|
||||
**
|
||||
** - 2018-03-09 1.0 Lux First version.
|
||||
**
|
||||
******************************************************************************/
|
||||
#ifndef __BOARD_STKHC32L19X_H__
|
||||
#define __BOARD_STKHC32L19X_H__
|
||||
|
||||
///< STK GPIO DEFINE
|
||||
///< USER KEY
|
||||
#define STK_USER_PORT GpioPortA
|
||||
#define STK_USER_PIN GpioPin7
|
||||
|
||||
///< LED
|
||||
#define STK_LED_PORT GpioPortC
|
||||
#define STK_LED_PIN GpioPin13
|
||||
|
||||
///< XTH
|
||||
#define SYSTEM_XTH (32*1000*1000u) ///< 32MHz
|
||||
|
||||
#define STK_XTHI_PORT GpioPortF
|
||||
#define STK_XTHI_PIN GpioPin0
|
||||
#define STK_XTHO_PORT GpioPortF
|
||||
#define STK_XTHO_PIN GpioPin1
|
||||
|
||||
///< XTL
|
||||
#define SYSTEM_XTL (32768u) ///< 32768Hz
|
||||
#define STK_XTLI_PORT GpioPortC
|
||||
#define STK_XTLI_PIN GpioPin14
|
||||
#define STK_XTLO_PORT GpioPortC
|
||||
#define STK_XTLO_PIN GpioPin15
|
||||
|
||||
///< LCD
|
||||
#define STK_LCD_COM0_PORT GpioPortA
|
||||
#define STK_LCD_COM0_PIN GpioPin9
|
||||
#define STK_LCD_COM1_PORT GpioPortA
|
||||
#define STK_LCD_COM1_PIN GpioPin10
|
||||
#define STK_LCD_COM2_PORT GpioPortA
|
||||
#define STK_LCD_COM2_PIN GpioPin11
|
||||
#define STK_LCD_COM3_PORT GpioPortA
|
||||
#define STK_LCD_COM3_PIN GpioPin12
|
||||
#define STK_LCD_SEG0_PORT GpioPortA
|
||||
#define STK_LCD_SEG0_PIN GpioPin8
|
||||
#define STK_LCD_SEG1_PORT GpioPortC
|
||||
#define STK_LCD_SEG1_PIN GpioPin9
|
||||
#define STK_LCD_SEG2_PORT GpioPortC
|
||||
#define STK_LCD_SEG2_PIN GpioPin8
|
||||
#define STK_LCD_SEG3_PORT GpioPortC
|
||||
#define STK_LCD_SEG3_PIN GpioPin7
|
||||
#define STK_LCD_SEG4_PORT GpioPortC
|
||||
#define STK_LCD_SEG4_PIN GpioPin6
|
||||
#define STK_LCD_SEG5_PORT GpioPortB
|
||||
#define STK_LCD_SEG5_PIN GpioPin15
|
||||
#define STK_LCD_SEG6_PORT GpioPortB
|
||||
#define STK_LCD_SEG6_PIN GpioPin14
|
||||
#define STK_LCD_SEG7_PORT GpioPortB
|
||||
#define STK_LCD_SEG7_PIN GpioPin13
|
||||
|
||||
///< I2C EEPROM
|
||||
#define EVB_I2C0_EEPROM_SCL_PORT GpioPortB
|
||||
#define EVB_I2C0_EEPROM_SCL_PIN GpioPin6
|
||||
#define EVB_I2C0_EEPROM_SDA_PORT GpioPortB
|
||||
#define EVB_I2C0_EEPROM_SDA_PIN GpioPin7
|
||||
|
||||
///< SPI0
|
||||
#define STK_SPI0_CS_PORT GpioPortE
|
||||
#define STK_SPI0_CS_PIN GpioPin12
|
||||
#define STK_SPI0_SCK_PORT GpioPortE
|
||||
#define STK_SPI0_SCK_PIN GpioPin13
|
||||
#define STK_SPI0_MISO_PORT GpioPortE
|
||||
#define STK_SPI0_MISO_PIN GpioPin14
|
||||
#define STK_SPI0_MOSI_PORT GpioPortE
|
||||
#define STK_SPI0_MOSI_PIN GpioPin15
|
||||
|
||||
///< SPI1
|
||||
#define STK_SPI1_CS_PORT GpioPortB
|
||||
#define STK_SPI1_CS_PIN GpioPin12
|
||||
#define STK_SPI1_SCK_PORT GpioPortB
|
||||
#define STK_SPI1_SCK_PIN GpioPin13
|
||||
#define STK_SPI1_MISO_PORT GpioPortB
|
||||
#define STK_SPI1_MISO_PIN GpioPin14
|
||||
#define STK_SPI1_MOSI_PORT GpioPortB
|
||||
#define STK_SPI1_MOSI_PIN GpioPin15
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,76 @@
|
||||
/*******************************************************************************
|
||||
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file ddl_device.h
|
||||
**
|
||||
** Device define
|
||||
** @link SampleGroup Some description @endlink
|
||||
**
|
||||
** - 2018-04-15
|
||||
**
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __DDL_DEVICE_H__
|
||||
#define __DDL_DEVICE_H__
|
||||
|
||||
/**
|
||||
*******************************************************************************
|
||||
** \brief Global device series definition
|
||||
**
|
||||
** \note
|
||||
******************************************************************************/
|
||||
#define DDL_MCU_SERIES DDL_DEVICE_SERIES_HC32L19X
|
||||
|
||||
|
||||
/**
|
||||
*******************************************************************************
|
||||
** \brief Global package definition
|
||||
**
|
||||
** \note This definition is used for device package settings
|
||||
******************************************************************************/
|
||||
#define DDL_MCU_PACKAGE DDL_DEVICE_PACKAGE_HC_K
|
||||
|
||||
#endif /* __DDL_DEVICE_H__ */
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF (not truncated)
|
||||
******************************************************************************/
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,150 @@
|
||||
/*******************************************************************************
|
||||
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file interrupts_hc32l17x.h
|
||||
**
|
||||
** Interrupt common define.
|
||||
** @link IRQGroup Some description @endlink
|
||||
**
|
||||
** - 2019-03-01 1.0 Lux First version.
|
||||
**
|
||||
******************************************************************************/
|
||||
#ifndef __INTERRUPTS_HC32L17x_H__
|
||||
#define __INTERRUPTS_HC32L17x_H__
|
||||
|
||||
/******************************************************************************/
|
||||
/* Include files */
|
||||
/******************************************************************************/
|
||||
#include "hc32l196_ddl.h"
|
||||
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/******************************************************************************/
|
||||
/* Global pre-processor symbols/macros ('#define') */
|
||||
/******************************************************************************/
|
||||
#define DDL_IRQ_LEVEL_DEFAULT 3u
|
||||
|
||||
//<<此选项会打开interrupt_hc32xxx.c中的中断回调函数,用户如果需要实现中断服务函数,
|
||||
//<<可在源码文件中定义该文件中用"__WEAK"声明的同名中断服务函数即可。
|
||||
#define INT_CALLBACK_ON 1u //<<(默认值)
|
||||
//<<此选项会关闭interrupt_hc32xxx.c中的中断回调函数,此时用户可在该文件中自行定义中断服务函数的实现。
|
||||
#define INT_CALLBACK_OFF 0u
|
||||
/******************************************************************************
|
||||
* Global type definitions
|
||||
******************************************************************************/
|
||||
#define INT_CALLBACK_PORTA INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_PORTB INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_PORTC INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_PORTD INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_PORTE INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_PORTF INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_DMAC INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_TIM3 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_UART0 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_UART1 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_UART2 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_UART3 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_LPUART0 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_LPUART1 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_SPI0 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_SPI1 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_I2C0 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_I2C1 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_TIM0 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_TIM1 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_TIM2 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_LPTIM0 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_LPTIM1 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_TIM4 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_TIM5 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_TIM6 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_PCA INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_WDT INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_RTC INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_ADC INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_DAC INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_PCNT INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_VC0 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_VC1 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_VC2 INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_LVD INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_LCD INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_FLASH INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_RAM INT_CALLBACK_ON
|
||||
#define INT_CALLBACK_CLKTRIM INT_CALLBACK_ON
|
||||
|
||||
|
||||
/**
|
||||
*******************************************************************************
|
||||
** \brief 中断优先级数据类型定义
|
||||
** \note
|
||||
******************************************************************************/
|
||||
typedef enum en_irq_level
|
||||
{
|
||||
IrqLevel0 = 0u, ///< 优先级0
|
||||
IrqLevel1 = 1u, ///< 优先级1
|
||||
IrqLevel2 = 2u, ///< 优先级2
|
||||
IrqLevel3 = 3u, ///< 优先级3
|
||||
} en_irq_level_t;
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Global function prototypes (definition in C source)
|
||||
******************************************************************************/
|
||||
///< 系统中断使能开关
|
||||
extern void EnableNvic(IRQn_Type enIrq, en_irq_level_t enLevel, boolean_t bEn);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __INTERRUPTS_HC32L19x_H__ */
|
||||
|
||||
/******************************************************************************
|
||||
* EOF (not truncated)
|
||||
******************************************************************************/
|
||||
@@ -0,0 +1,115 @@
|
||||
/*******************************************************************************
|
||||
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file system_hc32l19x.h
|
||||
**
|
||||
** A detailed description is available at
|
||||
** @link SampleGroup Some description @endlink
|
||||
**
|
||||
** - 2019-03-01 1.0 Lux First version.
|
||||
**
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __SYSTEM_HC32L19X_H__
|
||||
#define __SYSTEM_HC32L19X_H__
|
||||
|
||||
/******************************************************************************/
|
||||
/* Include files */
|
||||
/******************************************************************************/
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/******************************************************************************/
|
||||
/* Global pre-processor symbols/macros ('define') */
|
||||
/******************************************************************************/
|
||||
#define HWWD_DISABLE (1)
|
||||
|
||||
#define HC32L19xPxxx //100PIN
|
||||
//#define HC32L19xMxxx //80PIN
|
||||
//#define HC32L19xKxxx //64PIN
|
||||
//#define HC32L19xJxxx //48PIN
|
||||
//#define HC32L19xFxxx //32PIN
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief Clock Setup macro definition
|
||||
**
|
||||
** - 0: CLOCK_SETTING_NONE - User provides own clock setting in application
|
||||
** - 1: CLOCK_SETTING_CMSIS -
|
||||
******************************************************************************/
|
||||
#define CLOCK_SETTING_NONE 0u
|
||||
#define CLOCK_SETTING_CMSIS 1u
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* START OF USER SETTINGS HERE */
|
||||
/* =========================== */
|
||||
/* */
|
||||
/* All lines with '<<<' can be set by user. */
|
||||
/* */
|
||||
/******************************************************************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Global function prototypes ('extern', definition in C source) */
|
||||
/******************************************************************************/
|
||||
|
||||
|
||||
extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock)
|
||||
extern void SystemInit (void); // Initialize the system
|
||||
extern void SystemCoreClockUpdate (void); // Update SystemCoreClock variable
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SYSTEM_HC32L19X _H__ */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,298 @@
|
||||
;/******************************************************************************
|
||||
;* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
;*
|
||||
;* This software is owned and published by:
|
||||
;* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
;*
|
||||
;* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
;* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
;*
|
||||
;* This software contains source code for use with HDSC
|
||||
;* components. This software is licensed by HDSC to be adapted only
|
||||
;* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
;* responsible for misuse or illegal use of this software for devices not
|
||||
;* supported herein. HDSC is providing this software "AS IS" and will
|
||||
;* not be responsible for issues arising from incorrect user implementation
|
||||
;* of the software.
|
||||
;*
|
||||
;* Disclaimer:
|
||||
;* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
;* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
;* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
;* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
;* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
;* WARRANTY OF NONINFRINGEMENT.
|
||||
;* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
;* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
;* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
;* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
;* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
;* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
;* SAVINGS OR PROFITS,
|
||||
;* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
;* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
;* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
;* FROM, THE SOFTWARE.
|
||||
;*
|
||||
;* This software may be replicated in part or whole for the licensed use,
|
||||
;* with the restriction that this Disclaimer and Copyright notice must be
|
||||
;* included with each copy of this software, whether used in part or whole,
|
||||
;* at all times.
|
||||
;*/
|
||||
;/*****************************************************************************/
|
||||
|
||||
;/*****************************************************************************/
|
||||
;/* Startup for ARM */
|
||||
;/* Version V1.0 */
|
||||
;/* Date 2019-03-01 */
|
||||
;/* Target-mcu {MCU_PN_H} */
|
||||
;/*****************************************************************************/
|
||||
|
||||
; Stack Configuration
|
||||
; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; Heap Configuration
|
||||
; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors
|
||||
DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset
|
||||
DCD NMI_Handler ; NMI
|
||||
DCD HardFault_Handler ; Hard Fault
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV
|
||||
DCD SysTick_Handler ; SysTick
|
||||
|
||||
DCD PORTA_IRQHandler
|
||||
DCD PORTB_IRQHandler
|
||||
DCD PORTC_E_IRQHandler
|
||||
DCD PORTD_F_IRQHandler
|
||||
DCD DMAC_IRQHandler
|
||||
DCD TIM3_IRQHandler
|
||||
DCD UART0_2_IRQHandler
|
||||
DCD UART1_3_IRQHandler
|
||||
DCD LPUART0_IRQHandler
|
||||
DCD LPUART1_IRQHandler
|
||||
DCD SPI0_IRQHandler
|
||||
DCD SPI1_IRQHandler
|
||||
DCD I2C0_IRQHandler
|
||||
DCD I2C1_IRQHandler
|
||||
DCD TIM0_IRQHandler
|
||||
DCD TIM1_IRQHandler
|
||||
DCD TIM2_IRQHandler
|
||||
DCD LPTIM0_1_IRQHandler
|
||||
DCD TIM4_IRQHandler
|
||||
DCD TIM5_IRQHandler
|
||||
DCD TIM6_IRQHandler
|
||||
DCD PCA_IRQHandler
|
||||
DCD WDT_IRQHandler
|
||||
DCD RTC_IRQHandler
|
||||
DCD ADC_DAC_IRQHandler
|
||||
DCD PCNT_IRQHandler
|
||||
DCD VC0_IRQHandler
|
||||
DCD VC1_2_IRQHandler
|
||||
DCD LVD_IRQHandler
|
||||
DCD LCD_IRQHandler
|
||||
DCD FLASH_RAM_IRQHandler
|
||||
DCD CLKTRIM_IRQHandler
|
||||
|
||||
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
;reset NVIC if in rom debug
|
||||
LDR R0, =0x20000000
|
||||
LDR R2, =0x0
|
||||
MOVS R1, #0 ; for warning,
|
||||
ADD R1, PC,#0 ; for A1609W,
|
||||
CMP R1, R0
|
||||
BLS RAMCODE
|
||||
|
||||
; ram code base address.
|
||||
ADD R2, R0,R2
|
||||
RAMCODE
|
||||
; reset Vector table address.
|
||||
LDR R0, =0xE000ED08
|
||||
STR R2, [R0]
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
EXPORT PORTA_IRQHandler [WEAK]
|
||||
EXPORT PORTB_IRQHandler [WEAK]
|
||||
EXPORT PORTC_E_IRQHandler [WEAK]
|
||||
EXPORT PORTD_F_IRQHandler [WEAK]
|
||||
EXPORT DMAC_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT UART0_2_IRQHandler [WEAK]
|
||||
EXPORT UART1_3_IRQHandler [WEAK]
|
||||
EXPORT LPUART0_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT SPI0_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT I2C0_IRQHandler [WEAK]
|
||||
EXPORT I2C1_IRQHandler [WEAK]
|
||||
EXPORT TIM0_IRQHandler [WEAK]
|
||||
EXPORT TIM1_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT LPTIM0_1_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT TIM5_IRQHandler [WEAK]
|
||||
EXPORT TIM6_IRQHandler [WEAK]
|
||||
EXPORT PCA_IRQHandler [WEAK]
|
||||
EXPORT WDT_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT ADC_DAC_IRQHandler [WEAK]
|
||||
EXPORT PCNT_IRQHandler [WEAK]
|
||||
EXPORT VC0_IRQHandler [WEAK]
|
||||
EXPORT VC1_2_IRQHandler [WEAK]
|
||||
EXPORT LVD_IRQHandler [WEAK]
|
||||
EXPORT LCD_IRQHandler [WEAK]
|
||||
EXPORT FLASH_RAM_IRQHandler [WEAK]
|
||||
EXPORT CLKTRIM_IRQHandler [WEAK]
|
||||
PORTA_IRQHandler
|
||||
PORTB_IRQHandler
|
||||
PORTC_E_IRQHandler
|
||||
PORTD_F_IRQHandler
|
||||
DMAC_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
UART0_2_IRQHandler
|
||||
UART1_3_IRQHandler
|
||||
LPUART0_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
SPI0_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
I2C0_IRQHandler
|
||||
I2C1_IRQHandler
|
||||
TIM0_IRQHandler
|
||||
TIM1_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
LPTIM0_1_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
TIM5_IRQHandler
|
||||
TIM6_IRQHandler
|
||||
PCA_IRQHandler
|
||||
WDT_IRQHandler
|
||||
RTC_IRQHandler
|
||||
ADC_DAC_IRQHandler
|
||||
PCNT_IRQHandler
|
||||
VC0_IRQHandler
|
||||
VC1_2_IRQHandler
|
||||
LVD_IRQHandler
|
||||
LCD_IRQHandler
|
||||
FLASH_RAM_IRQHandler
|
||||
CLKTRIM_IRQHandler
|
||||
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
|
||||
END
|
||||
@@ -0,0 +1,167 @@
|
||||
.syntax unified
|
||||
.cpu cortex-m0plus
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
mov sp, r0 /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
/* bl __libc_init_array */
|
||||
/* Call the application's entry point.*/
|
||||
bl entry
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M0. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word PORTA_IRQHandler
|
||||
.word PORTB_IRQHandler
|
||||
.word PORTC_E_IRQHandler
|
||||
.word PORTD_F_IRQHandler
|
||||
.word DMAC_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word UART0_2_IRQHandler
|
||||
.word UART1_3_IRQHandler
|
||||
.word LPUART0_IRQHandler
|
||||
.word LPUART1_IRQHandler
|
||||
.word SPI0_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word I2C0_IRQHandler
|
||||
.word I2C1_IRQHandler
|
||||
.word TIM0_IRQHandler
|
||||
.word TIM1_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word LPTIM0_1_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word TIM5_IRQHandler
|
||||
.word TIM6_IRQHandler
|
||||
.word PCA_IRQHandler
|
||||
.word WDT_IRQHandler
|
||||
.word RTC_IRQHandler
|
||||
.word ADC_DAC_IRQHandler
|
||||
.word PCNT_IRQHandler
|
||||
.word VC0_IRQHandler
|
||||
.word VC1_2_IRQHandler
|
||||
.word LVD_IRQHandler
|
||||
.word LCD_IRQHandler
|
||||
.word FLASH_RAM_IRQHandler
|
||||
.word CLKTRIM_IRQHandler
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
@@ -0,0 +1,361 @@
|
||||
;*******************************************************************************
|
||||
; Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
;
|
||||
; This software is owned and published by:
|
||||
; Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
;
|
||||
; BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
; BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
;
|
||||
; This software contains source code for use with HDSC
|
||||
; components. This software is licensed by HDSC to be adapted only
|
||||
; for use in systems utilizing HDSC components. HDSC shall not be
|
||||
; responsible for misuse or illegal use of this software for devices not
|
||||
; supported herein. HDSC is providing this software "AS IS" and will
|
||||
; not be responsible for issues arising from incorrect user implementation
|
||||
; of the software.
|
||||
;
|
||||
; Disclaimer:
|
||||
; HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
; REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
; ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
; WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
; WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
; WARRANTY OF NONINFRINGEMENT.
|
||||
; HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
; NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
; LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
; LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
; INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
; INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
; SAVINGS OR PROFITS,
|
||||
; EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
; YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
; INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
; FROM, THE SOFTWARE.
|
||||
;
|
||||
; This software may be replicated in part or whole for the licensed use,
|
||||
; with the restriction that this Disclaimer and Copyright notice must be
|
||||
; included with each copy of this software, whether used in part or whole,
|
||||
; at all times.
|
||||
;/
|
||||
;/*****************************************************************************/
|
||||
;/* Startup for IAR */
|
||||
;/* Version V1.0 */
|
||||
;/* Date 2019-03-01 */
|
||||
;/* Target-mcu M0+ Device */
|
||||
;/*****************************************************************************/
|
||||
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
SECTION .intvec:CODE:ROOT(8)
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK) ; Top of Stack
|
||||
DCD Reset_Handler ; Reset
|
||||
DCD NMI_Handler ; NMI
|
||||
DCD HardFault_Handler ; Hard Fault
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV
|
||||
DCD SysTick_Handler ; SysTick
|
||||
|
||||
; Numbered IRQ handler vectors
|
||||
|
||||
; Note: renaming to device dependent ISR function names are done in
|
||||
|
||||
DCD PORTA_IRQHandler
|
||||
DCD PORTB_IRQHandler
|
||||
DCD PORTC_E_IRQHandler
|
||||
DCD PORTD_F_IRQHandler
|
||||
DCD DMAC_IRQHandler
|
||||
DCD TIM3_IRQHandler
|
||||
DCD UART0_2_IRQHandler
|
||||
DCD UART1_3_IRQHandler
|
||||
DCD LPUART0_IRQHandler
|
||||
DCD LPUART1_IRQHandler
|
||||
DCD SPI0_IRQHandler
|
||||
DCD SPI1_IRQHandler
|
||||
DCD I2C0_IRQHandler
|
||||
DCD I2C1_IRQHandler
|
||||
DCD TIM0_IRQHandler
|
||||
DCD TIM1_IRQHandler
|
||||
DCD TIM2_IRQHandler
|
||||
DCD LPTIM0_1_IRQHandler
|
||||
DCD TIM4_IRQHandler
|
||||
DCD TIM5_IRQHandler
|
||||
DCD TIM6_IRQHandler
|
||||
DCD PCA_IRQHandler
|
||||
DCD WDT_IRQHandler
|
||||
DCD RTC_IRQHandler
|
||||
DCD ADC_DAC_IRQHandler
|
||||
DCD PCNT_IRQHandler
|
||||
DCD VC0_IRQHandler
|
||||
DCD VC1_2_IRQHandler
|
||||
DCD LVD_IRQHandler
|
||||
DCD LCD_IRQHandler
|
||||
DCD FLASH_RAM_IRQHandler
|
||||
DCD CLKTRIM_IRQHandler
|
||||
|
||||
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(2)
|
||||
Reset_Handler
|
||||
;reset NVIC if in rom debug
|
||||
LDR R0, =0x20000000
|
||||
LDR R2, =0x0 ; vector offset
|
||||
cmp PC, R0
|
||||
bls ROMCODE
|
||||
|
||||
; ram code base address.
|
||||
ADD R2, R0,R2
|
||||
ROMCODE
|
||||
; reset Vector table address.
|
||||
LDR R0, =0xE000ED08
|
||||
STR R2, [R0]
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
PUBWEAK PORTA_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PORTA_IRQHandler
|
||||
B PORTA_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PORTB_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PORTB_IRQHandler
|
||||
B PORTB_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PORTC_E_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PORTC_E_IRQHandler
|
||||
B PORTC_E_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PORTD_F_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PORTD_F_IRQHandler
|
||||
B PORTD_F_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMAC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMAC_IRQHandler
|
||||
B DMAC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK UART0_2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART0_2_IRQHandler
|
||||
B UART0_2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK UART1_3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART1_3_IRQHandler
|
||||
B UART1_3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LPUART0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPUART0_IRQHandler
|
||||
B LPUART0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LPUART1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPUART1_IRQHandler
|
||||
B LPUART1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI0_IRQHandler
|
||||
B SPI0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C0_IRQHandler
|
||||
B I2C0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_IRQHandler
|
||||
B I2C1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM0_IRQHandler
|
||||
B TIM0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_IRQHandler
|
||||
B TIM1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LPTIM0_1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM0_1_IRQHandler
|
||||
B LPTIM0_1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM4_IRQHandler
|
||||
B TIM4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM5_IRQHandler
|
||||
B TIM5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM6_IRQHandler
|
||||
B TIM6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PCA_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PCA_IRQHandler
|
||||
B PCA_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK WDT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
WDT_IRQHandler
|
||||
B WDT_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_IRQHandler
|
||||
B RTC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK ADC_DAC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ADC_DAC_IRQHandler
|
||||
B ADC_DAC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PCNT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PCNT_IRQHandler
|
||||
B PCNT_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK VC0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
VC0_IRQHandler
|
||||
B VC0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK VC1_2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
VC1_2_IRQHandler
|
||||
B VC1_2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LVD_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LVD_IRQHandler
|
||||
B LVD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LCD_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LCD_IRQHandler
|
||||
B LCD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK FLASH_RAM_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FLASH_RAM_IRQHandler
|
||||
B FLASH_RAM_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK CLKTRIM_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CLKTRIM_IRQHandler
|
||||
B CLKTRIM_IRQHandler
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
END
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,179 @@
|
||||
/*******************************************************************************
|
||||
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file system_hc32l136.c
|
||||
**
|
||||
** System clock initialization.
|
||||
** @link SampleGroup Some description @endlink
|
||||
**
|
||||
** - 2019-03-01 1.0 Lux First version.
|
||||
**
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Include files */
|
||||
/******************************************************************************/
|
||||
#include "base_types.h"
|
||||
#include "hc32l19x.h"
|
||||
#include "system_hc32l19x.h"
|
||||
#include "hc32l196_sysctrl.h"
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** System Clock Frequency (Core Clock) Variable according CMSIS
|
||||
******************************************************************************/
|
||||
uint32_t SystemCoreClock = 4000000;
|
||||
|
||||
|
||||
//add clock source.
|
||||
void SystemCoreClockUpdate (void) // Update SystemCoreClock variable
|
||||
{
|
||||
SystemCoreClock = Sysctrl_GetHClkFreq();
|
||||
}
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief 对MCU未引出IO端口进行默认配置.
|
||||
**
|
||||
** \param none
|
||||
** \return none
|
||||
******************************************************************************/
|
||||
static void _InitHidePin(void)
|
||||
{
|
||||
uint32_t tmpReg = M0P_SYSCTRL->PERI_CLKEN0;
|
||||
|
||||
M0P_SYSCTRL->PERI_CLKEN0_f.GPIO = 1;
|
||||
|
||||
#if defined(HC32L19xPxxx) //100PIN MCU
|
||||
M0P_GPIO->PFADS &= 0xFF4F; ///< PF04/PF05/PF07配置为数字端口
|
||||
|
||||
M0P_GPIO->PFDIR |= 0x00B0; ///< PF04/PF05/PF07配置为端口输入
|
||||
|
||||
M0P_GPIO->PFPU |= 0x00B0; ///< PF04/PF05/PF07配置为上拉
|
||||
|
||||
#elif defined(HC32L19xMxxx) //80PIN MCU
|
||||
M0P_GPIO->PDADS &= 0x0F1F; ///< PD05~07/PD12~15配置为数字端口
|
||||
M0P_GPIO->PEADS &= 0x783C; ///< PE00/PE01/PE06~10/PE15配置为数字端口
|
||||
M0P_GPIO->PFADS &= 0xF9F3; ///< PF02/PF03/PF09/PF10配置为数字端口
|
||||
|
||||
M0P_GPIO->PDDIR |= 0xF0E0; ///< PD05~07/PD12~15配置为端口输入
|
||||
M0P_GPIO->PEDIR |= 0x87C3; ///< PE00/PE01/PE06~10/PE15配置为端口输入
|
||||
M0P_GPIO->PFDIR |= 0x060C; ///< PF02/PF03/PF09/PF10配置为数字端口
|
||||
|
||||
|
||||
M0P_GPIO->PDPU |= 0xF0E0; ///< PD05~07/PD12~15配置为上拉
|
||||
M0P_GPIO->PEPU |= 0x87C3; ///< PE00/PE01/PE06~10/PE15配置为上拉
|
||||
M0P_GPIO->PFPU |= 0x060C; ///< PF02/PF03/PF09/PF10配置为数字端口
|
||||
|
||||
#elif defined(HC32L19xKxxx) //64PIN MCU
|
||||
M0P_GPIO->PDADS &= 0x0004; ///< PD00/PD01/PD03~15配置为数字端口
|
||||
M0P_GPIO->PEADS &= 0x0000; ///< PE00~15配置为数字端口
|
||||
M0P_GPIO->PFADS &= 0xF9F3; ///< PF02/PF03/PF09/PF10配置为数字端口
|
||||
|
||||
M0P_GPIO->PDDIR |= 0xFFFB; ///< PD00/PD01/PD03~15配置为端口输入
|
||||
M0P_GPIO->PEDIR |= 0xFFFF; ///< PE00~15配置为端口输入
|
||||
M0P_GPIO->PFDIR |= 0x060C; ///< PF02/PF03/PF09/PF10配置为数字端口
|
||||
|
||||
M0P_GPIO->PDPU |= 0xFFFB; ///< PD00/PD01/PD03~15配置为上拉
|
||||
M0P_GPIO->PEPU |= 0xFFFF; ///< PE00~15配置为上拉
|
||||
M0P_GPIO->PFPU |= 0x060C; ///< PF02/PF03/PF09/PF10配置为数字端口
|
||||
|
||||
#elif defined(HC32L19xJxxx) //48PIN MCU
|
||||
M0P_GPIO->PCADS &= 0xE000; ///< PC00~12配置为数字端口
|
||||
M0P_GPIO->PDADS &= 0x0000; ///< PD00~15配置为数字端口
|
||||
M0P_GPIO->PEADS &= 0x0000; ///< PE00~15配置为数字端口
|
||||
M0P_GPIO->PFADS &= 0xF9C3; ///< PF02~05/PF09/PF10配置为数字端口
|
||||
|
||||
M0P_GPIO->PCDIR |= 0x1FFF; ///< PC00~12配置为端口输入
|
||||
M0P_GPIO->PDDIR |= 0xFFFF; ///< PD00~15配置为端口输入
|
||||
M0P_GPIO->PEDIR |= 0xFFFF; ///< PE00~15配置为端口输入
|
||||
M0P_GPIO->PFDIR |= 0x063C; ///< PF02~05/PF09/PF10配置为数字端口
|
||||
|
||||
|
||||
M0P_GPIO->PCPU |= 0x1FFF; ///< PC00~12配置为上拉
|
||||
M0P_GPIO->PDPU |= 0xFFFF; ///< PD00~15配置为上拉
|
||||
M0P_GPIO->PEPU |= 0xFFFF; ///< PE00~15配置为上拉
|
||||
M0P_GPIO->PFPU |= 0x063C; ///< PF02~05/PF09/PF10配置为数字端口
|
||||
|
||||
#elif defined(HC32L19xFxxx) //32PIN MCU
|
||||
M0P_GPIO->PAADS &= 0xFFF4; ///< PA00/PA01/PA03配置为数字端口
|
||||
M0P_GPIO->PBADS &= 0x08FB; ///< PB02/PB08~10/PB12~15配置为数字端口
|
||||
M0P_GPIO->PCADS &= 0xC000; ///< PC00~13配置为数字端口
|
||||
M0P_GPIO->PDADS &= 0x0000; ///< PD00~15配置为数字端口
|
||||
M0P_GPIO->PEADS &= 0x0000; ///< PE00~15配置为数字端口
|
||||
M0P_GPIO->PFADS &= 0xF903; ///< PF02~07/PF09/PF10配置为数字端口
|
||||
|
||||
M0P_GPIO->PADIR |= 0x000B; ///< PA00/PA01/PA03配置为端口输入
|
||||
M0P_GPIO->PBDIR |= 0xF704; ///< PB02/PB08~10/PB12~15配置为端口输入
|
||||
M0P_GPIO->PCDIR |= 0x3FFF; ///< PC00~13配置为端口输入
|
||||
M0P_GPIO->PDDIR |= 0xFFFF; ///< PD00~15配置为端口输入
|
||||
M0P_GPIO->PEDIR |= 0xFFFF; ///< PE00~15配置为端口输入
|
||||
M0P_GPIO->PFDIR |= 0x06FC; ///< PF02~07/PF09/PF10配置为数字端口
|
||||
|
||||
M0P_GPIO->PAPU |= 0x000B; ///< PA00/PA01/PA03配置为上拉
|
||||
M0P_GPIO->PBPU |= 0xF704; ///< PB02/PB08~10/PB12~15配置为上拉
|
||||
M0P_GPIO->PCPU |= 0x3FFF; ///< PC00~13配置为上拉
|
||||
M0P_GPIO->PDPU |= 0xFFFF; ///< PD00~15配置为上拉
|
||||
M0P_GPIO->PEPU |= 0xFFFF; ///< PE00~15配置为上拉
|
||||
M0P_GPIO->PFPU |= 0x06FC; ///< PF02~07/PF09/PF10配置为数字端口
|
||||
|
||||
#endif
|
||||
|
||||
M0P_SYSCTRL->PERI_CLKEN0 = tmpReg;
|
||||
}
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief Setup the microcontroller system. Initialize the System and update
|
||||
** the SystemCoreClock variable.
|
||||
**
|
||||
** \param none
|
||||
** \return none
|
||||
******************************************************************************/
|
||||
void SystemInit(void)
|
||||
{
|
||||
M0P_SYSCTRL->RCL_CR_f.TRIM = (*((volatile uint16_t*) (0x00100C22ul)));
|
||||
M0P_SYSCTRL->RCH_CR_f.TRIM = (*((volatile uint16_t*) (0x00100C08ul)));
|
||||
SystemCoreClockUpdate();
|
||||
_InitHidePin();
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,283 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.1.0
|
||||
* @date 09. October 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6.6 LTM (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
|
||||
#include "cmsis_armclang_ltm.h"
|
||||
|
||||
/*
|
||||
* Arm Compiler above 6.10.1 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,39 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.3
|
||||
* @date 24. June 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,272 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv7.h
|
||||
* @brief CMSIS MPU API for Armv7-M MPU
|
||||
* @version V5.1.0
|
||||
* @date 08. March 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV7_H
|
||||
#define ARM_MPU_ARMV7_H
|
||||
|
||||
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
|
||||
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
|
||||
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
|
||||
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
|
||||
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
|
||||
|
||||
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
|
||||
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
|
||||
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
|
||||
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
|
||||
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
|
||||
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
|
||||
|
||||
/** MPU Region Base Address Register Value
|
||||
*
|
||||
* \param Region The region to be configured, number 0 to 15.
|
||||
* \param BaseAddress The base address for the region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(Region, BaseAddress) \
|
||||
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
|
||||
((Region) & MPU_RBAR_REGION_Msk) | \
|
||||
(MPU_RBAR_VALID_Msk))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attributes
|
||||
*
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
|
||||
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
|
||||
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
|
||||
(((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
|
||||
(((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
|
||||
((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
|
||||
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
|
||||
(((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
|
||||
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
|
||||
(((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
|
||||
(((MPU_RASR_ENABLE_Msk))))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
|
||||
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for strongly ordered memory.
|
||||
* - TEX: 000b
|
||||
* - Shareable
|
||||
* - Non-cacheable
|
||||
* - Non-bufferable
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for device memory.
|
||||
* - TEX: 000b (if shareable) or 010b (if non-shareable)
|
||||
* - Shareable or non-shareable
|
||||
* - Non-cacheable
|
||||
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
|
||||
*
|
||||
* \param IsShareable Configures the device memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for normal memory.
|
||||
* - TEX: 1BBb (reflecting outer cacheability rules)
|
||||
* - Shareable or non-shareable
|
||||
* - Cacheable or non-cacheable (reflecting inner cacheability rules)
|
||||
* - Bufferable or non-bufferable (reflecting inner cacheability rules)
|
||||
*
|
||||
* \param OuterCp Configures the outer cache policy.
|
||||
* \param InnerCp Configures the inner cache policy.
|
||||
* \param IsShareable Configures the memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute non-cacheable policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_NOCACHE 0U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, write and read allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_WRA 1U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-through, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WT_NWA 2U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_NWA 3U
|
||||
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; //!< The region base address register value (RBAR)
|
||||
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RASR = 0U;
|
||||
}
|
||||
|
||||
/** Configure an MPU region.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Memcopy with strictly ordered memory access, e.g. for register targets.
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
while (cnt > MPU_TYPE_RALIASES) {
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
|
||||
table += MPU_TYPE_RALIASES;
|
||||
cnt -= MPU_TYPE_RALIASES;
|
||||
}
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,346 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv8.h
|
||||
* @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU
|
||||
* @version V5.1.0
|
||||
* @date 08. March 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV8_H
|
||||
#define ARM_MPU_ARMV8_H
|
||||
|
||||
/** \brief Attribute for device memory (outer only) */
|
||||
#define ARM_MPU_ATTR_DEVICE ( 0U )
|
||||
|
||||
/** \brief Attribute for non-cacheable, normal memory */
|
||||
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
|
||||
|
||||
/** \brief Attribute for normal memory (outer and inner)
|
||||
* \param NT Non-Transient: Set to 1 for non-transient data.
|
||||
* \param WB Write-Back: Set to 1 to use write-back update policy.
|
||||
* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
|
||||
* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
|
||||
*/
|
||||
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
|
||||
(((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
|
||||
|
||||
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
|
||||
|
||||
/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
|
||||
|
||||
/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
|
||||
|
||||
/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_GRE (3U)
|
||||
|
||||
/** \brief Memory Attribute
|
||||
* \param O Outer memory attributes
|
||||
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
|
||||
*/
|
||||
#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
|
||||
|
||||
/** \brief Normal memory non-shareable */
|
||||
#define ARM_MPU_SH_NON (0U)
|
||||
|
||||
/** \brief Normal memory outer shareable */
|
||||
#define ARM_MPU_SH_OUTER (2U)
|
||||
|
||||
/** \brief Normal memory inner shareable */
|
||||
#define ARM_MPU_SH_INNER (3U)
|
||||
|
||||
/** \brief Memory access permissions
|
||||
* \param RO Read-Only: Set to 1 for read-only memory.
|
||||
* \param NP Non-Privileged: Set to 1 for non-privileged memory.
|
||||
*/
|
||||
#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
|
||||
|
||||
/** \brief Region Base Address Register value
|
||||
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
|
||||
* \param SH Defines the Shareability domain for this memory region.
|
||||
* \param RO Read-Only: Set to 1 for a read-only memory region.
|
||||
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
|
||||
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
|
||||
((BASE & MPU_RBAR_BASE_Msk) | \
|
||||
((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
|
||||
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
|
||||
((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
|
||||
|
||||
/** \brief Region Limit Address Register value
|
||||
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
|
||||
* \param IDX The attribute index to be associated with this memory region.
|
||||
*/
|
||||
#define ARM_MPU_RLAR(LIMIT, IDX) \
|
||||
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
|
||||
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
|
||||
(MPU_RLAR_EN_Msk))
|
||||
|
||||
#if defined(MPU_RLAR_PXN_Pos)
|
||||
|
||||
/** \brief Region Limit Address Register with PXN value
|
||||
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
|
||||
* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
|
||||
* \param IDX The attribute index to be associated with this memory region.
|
||||
*/
|
||||
#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
|
||||
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
|
||||
((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
|
||||
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
|
||||
(MPU_RLAR_EN_Msk))
|
||||
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; /*!< Region Base Address Register value */
|
||||
uint32_t RLAR; /*!< Region Limit Address Register value */
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Enable the Non-secure MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
|
||||
{
|
||||
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the Non-secure MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable_NS(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Set the memory attribute encoding to the given MPU.
|
||||
* \param mpu Pointer to the MPU to be configured.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
|
||||
{
|
||||
const uint8_t reg = idx / 4U;
|
||||
const uint32_t pos = ((idx % 4U) * 8U);
|
||||
const uint32_t mask = 0xFFU << pos;
|
||||
|
||||
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
|
||||
return; // invalid index
|
||||
}
|
||||
|
||||
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
|
||||
}
|
||||
|
||||
/** Set the memory attribute encoding.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
|
||||
{
|
||||
ARM_MPU_SetMemAttrEx(MPU, idx, attr);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Set the memory attribute encoding to the Non-secure MPU.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
|
||||
{
|
||||
ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Clear and disable the given MPU region of the given MPU.
|
||||
* \param mpu Pointer to MPU to be used.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
|
||||
{
|
||||
mpu->RNR = rnr;
|
||||
mpu->RLAR = 0U;
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
ARM_MPU_ClrRegionEx(MPU, rnr);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Clear and disable the given Non-secure MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
|
||||
{
|
||||
ARM_MPU_ClrRegionEx(MPU_NS, rnr);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Configure the given MPU region of the given MPU.
|
||||
* \param mpu Pointer to MPU to be used.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
mpu->RNR = rnr;
|
||||
mpu->RBAR = rbar;
|
||||
mpu->RLAR = rlar;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Configure the given Non-secure MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Memcopy with strictly ordered memory access, e.g. for register targets.
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table to the given MPU.
|
||||
* \param mpu Pointer to the MPU registers to be used.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
if (cnt == 1U) {
|
||||
mpu->RNR = rnr;
|
||||
ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
|
||||
} else {
|
||||
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
|
||||
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
|
||||
|
||||
mpu->RNR = rnrBase;
|
||||
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
|
||||
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
|
||||
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
|
||||
table += c;
|
||||
cnt -= c;
|
||||
rnrOffset = 0U;
|
||||
rnrBase += MPU_TYPE_RALIASES;
|
||||
mpu->RNR = rnrBase;
|
||||
}
|
||||
|
||||
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Load the given number of MPU regions from a table to the Non-secure MPU.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,70 @@
|
||||
/******************************************************************************
|
||||
* @file tz_context.h
|
||||
* @brief Context Management for Armv8-M TrustZone
|
||||
* @version V1.0.1
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef TZ_CONTEXT_H
|
||||
#define TZ_CONTEXT_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifndef TZ_MODULEID_T
|
||||
#define TZ_MODULEID_T
|
||||
/// \details Data type that identifies secure software modules called by a process.
|
||||
typedef uint32_t TZ_ModuleId_t;
|
||||
#endif
|
||||
|
||||
/// \details TZ Memory ID identifies an allocated memory slot.
|
||||
typedef uint32_t TZ_MemoryId_t;
|
||||
|
||||
/// Initialize secure context memory system
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_InitContextSystem_S (void);
|
||||
|
||||
/// Allocate context memory for calling secure software modules in TrustZone
|
||||
/// \param[in] module identifies software modules called from non-secure mode
|
||||
/// \return value != 0 id TrustZone memory slot identifier
|
||||
/// \return value 0 no memory available or internal error
|
||||
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
|
||||
|
||||
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
|
||||
|
||||
/// Load secure context (called on RTOS thread context switch)
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
|
||||
|
||||
/// Store secure context (called on RTOS thread context switch)
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
|
||||
|
||||
#endif // TZ_CONTEXT_H
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,470 @@
|
||||
/******************************************************************************
|
||||
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file adc.h
|
||||
**
|
||||
** Header file for AD Converter functions
|
||||
** @link ADC Group Some description @endlink
|
||||
**
|
||||
** - 2017-06-28 Alex First Version
|
||||
**
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __ADC_H__
|
||||
#define __ADC_H__
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* Include files */
|
||||
/******************************************************************************/
|
||||
#include "ddl.h"
|
||||
|
||||
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \defgroup AdcGroup AD Converter (ADC)
|
||||
**
|
||||
******************************************************************************/
|
||||
|
||||
//@{
|
||||
|
||||
/******************************************************************************
|
||||
* Global definitions
|
||||
******************************************************************************/
|
||||
#define ADC_SCAN_CH0_EN (0x1u) /*!< SCAN模式使用ADC CH0 */
|
||||
#define ADC_SCAN_CH1_EN (0x1u<<1) /*!< SCAN模式使用ADC CH1 */
|
||||
#define ADC_SCAN_CH2_EN (0x1u<<2) /*!< SCAN模式使用ADC CH2 */
|
||||
#define ADC_SCAN_CH3_EN (0x1u<<3) /*!< SCAN模式使用ADC CH3 */
|
||||
#define ADC_SCAN_CH4_EN (0x1u<<4) /*!< SCAN模式使用ADC CH4 */
|
||||
#define ADC_SCAN_CH5_EN (0x1u<<5) /*!< SCAN模式使用ADC CH5 */
|
||||
#define ADC_SCAN_CH6_EN (0x1u<<6) /*!< SCAN模式使用ADC CH6 */
|
||||
#define ADC_SCAN_CH7_EN (0x1u<<7) /*!< SCAN模式使用ADC CH7 */
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
** Global type definitions
|
||||
*****************************************************************************/
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC转换模式
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_mode
|
||||
{
|
||||
AdcSglMode = 0u, /*!< 单输入通道单次转换模式 */
|
||||
AdcScanMode = 1u, /*!< 多输入通道顺序/插队扫描转换模式*/
|
||||
}en_adc_mode_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC时钟分频选择
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_clk_sel
|
||||
{
|
||||
AdcMskClkDiv1 = 0u<<2, /*!< PCLK */
|
||||
AdcMskClkDiv2 = 1u<<2, /*!< 1/2 PCLK */
|
||||
AdcMskClkDiv4 = 2u<<2, /*!< 1/4 PCLK */
|
||||
AdcMskClkDiv8 = 3u<<2, /*!< 1/8 PCLK */
|
||||
} en_adc_clk_div_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC参考电压
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_ref_vol_sel
|
||||
{
|
||||
AdcMskRefVolSelInBgr1p5 = 0u<<9, /*!<内部参考电压1.5V(SPS<=200kHz)*/
|
||||
AdcMskRefVolSelInBgr2p5 = 1u<<9, /*!<内部参考电压2.5V(avdd>3V,SPS<=200kHz)*/
|
||||
AdcMskRefVolSelExtern1 = 2u<<9, /*!<外部输入(max avdd) PB01*/
|
||||
AdcMskRefVolSelAVDD = 3u<<9, /*!<AVDD*/
|
||||
}en_adc_ref_vol_sel_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC转换通道选择
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_samp_ch_sel
|
||||
{
|
||||
AdcExInputCH0 = 0u, /*!<使用PA00*/
|
||||
AdcExInputCH1 = 1u, /*!<使用PA01*/
|
||||
AdcExInputCH2 = 2u, /*!<使用PA02*/
|
||||
AdcExInputCH3 = 3u, /*!<使用PA03*/
|
||||
AdcExInputCH4 = 4u, /*!<使用PA04*/
|
||||
AdcExInputCH5 = 5u, /*!<使用PA05*/
|
||||
AdcExInputCH6 = 6u, /*!<使用PA06*/
|
||||
AdcExInputCH7 = 7u, /*!<使用PA07*/
|
||||
AdcExInputCH8 = 8u, /*!<使用PB00*/
|
||||
AdcExInputCH9 = 9u, /*!<使用PB01*/
|
||||
AdcExInputCH10 = 10u, /*!<使用PC00*/
|
||||
AdcExInputCH11 = 11u, /*!<使用PC01*/
|
||||
AdcExInputCH12 = 12u, /*!<使用PC02*/
|
||||
AdcExInputCH13 = 13u, /*!<使用PC03*/
|
||||
AdcExInputCH14 = 14u, /*!<使用PC04*/
|
||||
AdcExInputCH15 = 15u, /*!<使用PC05*/
|
||||
AdcExInputCH16 = 16u, /*!<使用PB02*/
|
||||
AdcExInputCH17 = 17u, /*!<使用PB10*/
|
||||
AdcExInputCH18 = 18u, /*!<使用PB11*/
|
||||
AdcExInputCH19 = 19u, /*!<使用PB12*/
|
||||
AdcExInputCH20 = 20u, /*!<使用PB13*/
|
||||
AdcExInputCH21 = 21u, /*!<使用PB14*/
|
||||
AdcExInputCH22 = 22u, /*!<使用PB15*/
|
||||
AdcExInputCH23 = 23u, /*!<使用PE15*/
|
||||
AdcExInputCH24 = 24u, /*!<使用PE14*/
|
||||
AdcExInputCH25 = 25u, /*!<使用PE13*/
|
||||
|
||||
AdcDacInput = 26u, /*!<使用DAC输出(必须使用输入增益)*/
|
||||
AdcAVccdiv3Input = 27u, /*!<使用1/3 AVCC(必须使用输入增益)*/
|
||||
AdcAiTsInput = 28u, /*!<使用内置温度传感器BGR_TS(必须使用输入增益)*/
|
||||
AdcVref1_2Input = 29u, /*!<使用内部基准1.2V(必须使用输入增益)*/
|
||||
|
||||
}en_adc_samp_ch_sel_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC输入信号放大器控制
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_op_buf
|
||||
{
|
||||
AdcMskBufEnable = 1u<<11, /*!< 打开放大器BUF */
|
||||
AdcMskBufDisable = 0u, /*!< 关闭放大器BUF */
|
||||
} en_adc_op_buf_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC采样周期选择
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_samp_cycle_sel
|
||||
{
|
||||
AdcMskSampCycle4Clk = 0u<<12, /*!<4个采样时钟*/
|
||||
AdcMskSampCycle6Clk = 1u<<12, /*!<6个采样时钟*/
|
||||
AdcMskSampCycle8Clk = 2u<<12, /*!<8个采样时钟*/
|
||||
AdcMskSampCycle12Clk = 3u<<12, /*!<12个采样时钟*/
|
||||
|
||||
}en_adc_samp_cycle_sel_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC内部参考电压使能控制
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_in_ref
|
||||
{
|
||||
AdcMskInRefEnable = 1u<<14, /*!< 内部参考电压使能 */
|
||||
AdcMskInRefDisable = 0u, /*!< 内部参考电压关闭 */
|
||||
}en_adc_in_ref_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC周边模块反射源选择
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_trig_sel
|
||||
{
|
||||
AdcMskTrigTimer0 = 1u<<0, /*!<选择timer0中断源,自动触发ADC采样*/
|
||||
AdcMskTrigTimer1 = 1u<<1, /*!<选择timer1中断源,自动触发ADC采样*/
|
||||
AdcMskTrigTimer2 = 1u<<2, /*!<选择timer2中断源,自动触发ADC采样*/
|
||||
AdcMskTrigTimer3 = 1u<<3, /*!<选择timer3中断源,自动触发ADC采样*/
|
||||
AdcMskTrigTimer4 = 1u<<4, /*!<选择timer4中断源,自动触发ADC采样*/
|
||||
AdcMskTrigTimer5 = 1u<<5, /*!<选择timer5中断源,自动触发ADC采样*/
|
||||
AdcMskTrigTimer6 = 1u<<6, /*!<选择timer6中断源,自动触发ADC采样*/
|
||||
AdcMskTrigUart0 = 1u<<7, /*!<选择uart0中断源,自动触发ADC采样*/
|
||||
AdcMskTrigUart1 = 1u<<8, /*!<选择uart1中断源,自动触发ADC采样*/
|
||||
AdcMskTrigLpuart0 = 1u<<9, /*!<选择lpuart0中断源,自动触发ADC采样*/
|
||||
AdcMskTrigLpuart1 = 1u<<10, /*!<选择lpuart1中断源,自动触发ADC采样*/
|
||||
AdcMskTrigVC0 = 1u<<11, /*!<选择VC0中断源,自动触发ADC采样*/
|
||||
AdcMskTrigVC1 = 1u<<12, /*!<选择VC1中断源,自动触发ADC采样*/
|
||||
AdcMskTrigRTC = 1u<<13, /*!<选择RTC中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPCA = 1u<<14, /*!<选择PCA中断源,自动触发ADC采样*/
|
||||
AdcMskTrigSPI0 = 1u<<15, /*!<选择SPI0中断源,自动触发ADC采样*/
|
||||
AdcMskTrigSPI1 = 1u<<16, /*!<选择SPI1中断源,自动触发ADC采样*/
|
||||
AdcMskTrigDMA = 1u<<17, /*!<选择DMA中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPA03 = 1u<<18, /*!<选择PA03中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPB03 = 1u<<19, /*!<选择PB03中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPC03 = 1u<<20, /*!<选择PC03中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPD03 = 1u<<21, /*!<选择PD03中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPA07 = 1u<<22, /*!<选择PA07中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPB07 = 1u<<23, /*!<选择PB07中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPC07 = 1u<<24, /*!<选择PC07中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPD07 = 1u<<25, /*!<选择PD07中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPA11 = 1u<<26, /*!<选择PA11中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPB11 = 1u<<27, /*!<选择PB11中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPC11 = 1u<<28, /*!<选择PC11中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPA15 = 1u<<29, /*!<选择PA15中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPB15 = 1u<<30, /*!<选择PB15中断源,自动触发ADC采样*/
|
||||
AdcMskTrigPC15 = 1u<<31, /*!<选择PC15中断源,自动触发ADC采样*/
|
||||
}en_adc_trig_sel_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC外部触发源寄存器选择
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_ext_trig_sel
|
||||
{
|
||||
AdcExtTrig0 = 0u, /*!<单次及顺序扫描转换 外部触发源选择寄存器*/
|
||||
AdcExtTrig1 = 1u, /*!<插队扫描转换 外部触发源选择寄存器*/
|
||||
}en_adc_ext_trig_sel_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC顺序转换通道
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_sqr_chmux
|
||||
{
|
||||
AdcSQRCH0MUX = 0u, /*!<顺序扫描模式转换通道0*/
|
||||
AdcSQRCH1MUX = 1u, /*!<顺序扫描模式转换通道1*/
|
||||
AdcSQRCH2MUX = 2u, /*!<顺序扫描模式转换通道2*/
|
||||
AdcSQRCH3MUX = 3u, /*!<顺序扫描模式转换通道3*/
|
||||
AdcSQRCH4MUX = 4u, /*!<顺序扫描模式转换通道4*/
|
||||
AdcSQRCH5MUX = 5u, /*!<顺序扫描模式转换通道5*/
|
||||
AdcSQRCH6MUX = 6u, /*!<顺序扫描模式转换通道6*/
|
||||
AdcSQRCH7MUX = 7u, /*!<顺序扫描模式转换通道7*/
|
||||
AdcSQRCH8MUX = 8u, /*!<顺序扫描模式转换通道8*/
|
||||
AdcSQRCH9MUX = 9u, /*!<顺序扫描模式转换通道9*/
|
||||
AdcSQRCH10MUX = 10u, /*!<顺序扫描模式转换通道10*/
|
||||
AdcSQRCH11MUX = 11u, /*!<顺序扫描模式转换通道11*/
|
||||
AdcSQRCH12MUX = 12u, /*!<顺序扫描模式转换通道12*/
|
||||
AdcSQRCH13MUX = 13u, /*!<顺序扫描模式转换通道13*/
|
||||
AdcSQRCH14MUX = 14u, /*!<顺序扫描模式转换通道14*/
|
||||
AdcSQRCH15MUX = 15u, /*!<顺序扫描模式转换通道15*/
|
||||
}en_adc_sqr_chmux_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC插队转换通道
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_jqr_chmux
|
||||
{
|
||||
AdcJQRCH0MUX = 0u, /*!<转换通道0*/
|
||||
AdcJQRCH1MUX = 1u, /*!<转换通道1*/
|
||||
AdcJQRCH2MUX = 2u, /*!<转换通道2*/
|
||||
AdcJQRCH3MUX = 3u, /*!<转换通道3*/
|
||||
}en_adc_jqr_chmux_t;
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC结果对齐方式
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_align
|
||||
{
|
||||
AdcAlignRight = 0u,
|
||||
AdcAlignLeft = 1u,
|
||||
}en_adc_align_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC转换结果自动累加功能
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_result_acc
|
||||
{
|
||||
AdcResultAccEnable = 1u,
|
||||
AdcResultAccDisable = 0u,
|
||||
}en_adc_result_acc_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC中断类型定义
|
||||
*****************************************************************************/
|
||||
typedef enum en_adc_irq_type
|
||||
{
|
||||
AdcMskIrqJqr = 1u<<5, /*!<ADC插队扫描转换完成*/
|
||||
AdcMskIrqSqr = 1u<<4, /*!<ADC顺序扫描转换完成*/
|
||||
AdcMskIrqReg = 1u<<3, /*!<ADC转换结果比较区间内*/
|
||||
AdcMskIrqHt = 1u<<2, /*!<ADC转换结果高于HT*/
|
||||
AdcMskIrqLt = 1u<<1, /*!<ADC转换结果低于LT*/
|
||||
AdcMskIrqSgl = 1u<<0, /*!<ADC单次转换完成*/
|
||||
|
||||
}en_adc_irq_type_t;
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
** Extern type definitions ('typedef')
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC初始化配置结构体
|
||||
*****************************************************************************/
|
||||
typedef struct stc_adc_cfg
|
||||
{
|
||||
en_adc_mode_t enAdcMode; /*! ADC转换模式*/
|
||||
|
||||
en_adc_clk_div_t enAdcClkDiv; /*! ADC时钟选择*/
|
||||
en_adc_samp_cycle_sel_t enAdcSampCycleSel; /*! ADC采样周期选择*/
|
||||
en_adc_ref_vol_sel_t enAdcRefVolSel; /*! ADC参考电压选择*/
|
||||
en_adc_op_buf_t enAdcOpBuf; /*! ADC输入信号放大器控制使能*/
|
||||
en_adc_in_ref_t enInRef; /*! ADC内部参考电压使能*/
|
||||
|
||||
en_adc_align_t enAdcAlign; /*! ADC转换结果对齐控制*/
|
||||
}stc_adc_cfg_t;
|
||||
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC顺序扫描模式配置结构体
|
||||
*****************************************************************************/
|
||||
typedef struct stc_adc_sqr_cfg
|
||||
{
|
||||
uint8_t u8SqrCnt; /*! ADC顺序扫描转换次数*/
|
||||
en_adc_result_acc_t enResultAcc; /*! ADC转换结果自动累加功能*/
|
||||
boolean_t bSqrDmaTrig; /*! ADC顺序扫描转换完成DMA触发使能*/
|
||||
}stc_adc_sqr_cfg_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC插队扫描模式配置结构体
|
||||
*****************************************************************************/
|
||||
typedef struct stc_adc_jqr_cfg
|
||||
{
|
||||
uint8_t u8JqrCnt; /*! ADC顺序扫描转换次数*/
|
||||
boolean_t bJqrDmaTrig; /*! ADC插队扫描转换完成DMA触发使能*/
|
||||
}stc_adc_jqr_cfg_t;
|
||||
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief ADC比较功能配置结构体
|
||||
*****************************************************************************/
|
||||
typedef struct stc_adc_threshold_cfg
|
||||
{
|
||||
boolean_t bAdcRegCmp ; /*!ADC区间使能*/
|
||||
boolean_t bAdcHtCmp ; /*!ADC上超出区间使能*/
|
||||
boolean_t bAdcLtCmp ; /*!ADC下超出区间使能*/
|
||||
|
||||
uint32_t u32AdcHighThd; /*!ADC比较上阈值*/
|
||||
uint32_t u32AdcLowThd; /*!ADC比较下阈值*/
|
||||
|
||||
en_adc_samp_ch_sel_t enSampChSel; /*!ADC采样通道选择*/
|
||||
|
||||
}stc_adc_threshold_cfg_t;
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Global variable definitions ('extern')
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Global function prototypes (definition in C source)
|
||||
******************************************************************************/
|
||||
//ADC 初始化
|
||||
en_result_t Adc_Init(stc_adc_cfg_t* pstcAdcCfg);
|
||||
|
||||
//ADC 中断使能
|
||||
void Adc_EnableIrq(void);
|
||||
//ADC 中断禁止
|
||||
void Adc_DisableIrq(void);
|
||||
|
||||
//ADC 中断/采样完成状态获取
|
||||
boolean_t Adc_GetIrqStatus(en_adc_irq_type_t enAdcIrq);
|
||||
//ADC 中断/采样完成状态清除
|
||||
void Adc_ClrIrqStatus(en_adc_irq_type_t enAdcIrq);
|
||||
|
||||
//ADC 使能
|
||||
void Adc_Enable(void);
|
||||
//ADC 禁止
|
||||
void Adc_Disable(void);
|
||||
|
||||
//ADC 顺序扫描模式配置
|
||||
en_result_t Adc_SqrModeCfg(stc_adc_sqr_cfg_t* pstcAdcSqrCfg);
|
||||
//ADC 插队扫描模式配置
|
||||
en_result_t Adc_JqrModeCfg(stc_adc_jqr_cfg_t* pstcAdcJqrCfg);
|
||||
|
||||
//ADC Sgl 单次转换模式通道选择配置
|
||||
en_result_t Adc_CfgSglChannel( en_adc_samp_ch_sel_t enstcAdcSampCh);
|
||||
//ADC SQR 顺序扫描转换模式通道选择配置
|
||||
en_result_t Adc_CfgSqrChannel(en_adc_sqr_chmux_t enstcAdcSqrChMux, en_adc_samp_ch_sel_t enstcAdcSampCh);
|
||||
//ADC JQR 插队扫描转换模式通道选择配置
|
||||
en_result_t Adc_CfgJqrChannel(en_adc_jqr_chmux_t enstcAdcJqrChMux, en_adc_samp_ch_sel_t enstcAdcSampCh);
|
||||
|
||||
///<ADC 单次转换外部触发源配置
|
||||
void Adc_SglExtTrigCfg(en_adc_trig_sel_t enAdcTrigSel, boolean_t bValue);
|
||||
///<ADC 顺序扫描转换外部触发源配置
|
||||
void Adc_SqrExtTrigCfg(en_adc_trig_sel_t enAdcTrigSel, boolean_t bValue);
|
||||
///<ADC 插队扫描转换外部触发源配置
|
||||
void Adc_JqrExtTrigCfg(en_adc_trig_sel_t enAdcTrigSel, boolean_t bValue);
|
||||
|
||||
//ADC 阈值比较功能配置
|
||||
void Adc_ThresholdCfg(stc_adc_threshold_cfg_t* pstcAdcThrCfg);
|
||||
|
||||
//ADC 单次转换模式启动
|
||||
void Adc_SGL_Start(void);
|
||||
//ADC 单次转换模式停止
|
||||
void Adc_SGL_Stop(void);
|
||||
|
||||
//ADC 单次转换模式一直转换模式启动
|
||||
void Adc_SGL_Always_Start(void);
|
||||
//ADC 单次转换模式一直转换模式停止
|
||||
void Adc_SGL_Always_Stop(void);
|
||||
|
||||
//ADC 顺序扫描转换模式启动
|
||||
void Adc_SQR_Start(void);
|
||||
//ADC 顺序扫描转换模式停止
|
||||
void Adc_SQR_Stop(void);
|
||||
|
||||
//ADC 插队扫描转换模式启动
|
||||
void Adc_JQR_Start(void);
|
||||
//ADC 插队扫描转换模式停止
|
||||
void Adc_JQR_Stop(void);
|
||||
|
||||
//获取单次转换采样值
|
||||
uint32_t Adc_GetSglResult(void);
|
||||
//获取顺序扫描采样值
|
||||
uint32_t Adc_GetSqrResult(en_adc_sqr_chmux_t enstcAdcSqrChMux);
|
||||
//获取插队扫描采样值
|
||||
uint32_t Adc_GetJqrResult(en_adc_jqr_chmux_t enstcAdcJqrChMux);
|
||||
|
||||
//获取累加采样值
|
||||
uint32_t Adc_GetAccResult(void);
|
||||
//clear ADC 累加寄存器结果清除
|
||||
void Adc_ClrAccResult(void);
|
||||
|
||||
//@}
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ADC_H__ */
|
||||
/******************************************************************************/
|
||||
/* EOF (not truncated) */
|
||||
/******************************************************************************/
|
||||
@@ -0,0 +1,132 @@
|
||||
/******************************************************************************
|
||||
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file aes.h
|
||||
**
|
||||
** AES 数据结构及API声明.
|
||||
**
|
||||
** - 2016-05-04 LuX V1.0.
|
||||
**
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __AES_H__
|
||||
#define __AES_H__
|
||||
|
||||
/******************************************************************************
|
||||
* Include files
|
||||
******************************************************************************/
|
||||
#include "ddl.h"
|
||||
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \defgroup AESGroup AES
|
||||
**
|
||||
******************************************************************************/
|
||||
//@{
|
||||
|
||||
/******************************************************************************
|
||||
* Global type definitions
|
||||
******************************************************************************/
|
||||
/**
|
||||
*******************************************************************************
|
||||
** \brief AES密钥长度类型定义
|
||||
** \note
|
||||
******************************************************************************/
|
||||
typedef enum en_aes_key_type
|
||||
{
|
||||
AesKey128 = 0u, ///< 128 bits
|
||||
AesKey192 = 1u, ///< 192 bits
|
||||
AesKey256 = 2u, ///< 256 bits
|
||||
}en_aes_key_type_t;
|
||||
|
||||
/**
|
||||
*******************************************************************************
|
||||
** \brief AES配置结构体
|
||||
** \note
|
||||
******************************************************************************/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t* pu32Cipher; ///< AES 密文指针
|
||||
uint32_t* pu32Plaintext; ///< AES 明文指针
|
||||
uint32_t* pu32Key; ///< AES 密钥指针
|
||||
en_aes_key_type_t enKeyLen; ///< AES 密钥长度类型
|
||||
|
||||
}stc_aes_cfg_t;
|
||||
|
||||
/******************************************************************************
|
||||
* Global definitions
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Local type definitions ('typedef')
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Global variable definitions ('extern')
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Global function prototypes (definition in C source)
|
||||
******************************************************************************/
|
||||
//AES 加密
|
||||
en_result_t AES_Encrypt(stc_aes_cfg_t* pstcAesCfg);
|
||||
//AES 解密
|
||||
en_result_t AES_Decrypt(stc_aes_cfg_t* pstcAesCfg);
|
||||
|
||||
|
||||
//@} // AES Group
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __AES_H__ */
|
||||
/******************************************************************************
|
||||
* EOF (not truncated)
|
||||
******************************************************************************/
|
||||
|
||||
@@ -0,0 +1,109 @@
|
||||
/******************************************************************************
|
||||
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file bgr.h
|
||||
**
|
||||
** BGR 数据结构及API声明.
|
||||
**
|
||||
** - 2018-04-21 LuX V1.0.
|
||||
**
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __CRC_H__
|
||||
#define __CRC_H__
|
||||
|
||||
/******************************************************************************
|
||||
* Include files
|
||||
******************************************************************************/
|
||||
#include "ddl.h"
|
||||
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \defgroup BGR
|
||||
**
|
||||
******************************************************************************/
|
||||
//@{
|
||||
|
||||
/******************************************************************************
|
||||
* Global type definitions
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Global definitions
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Local type definitions ('typedef')
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Global variable definitions ('extern')
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Global function prototypes (definition in C source)
|
||||
******************************************************************************/
|
||||
///<内部温度传感器使能/关闭
|
||||
void Bgr_TempSensorEnable(void);
|
||||
void Bgr_TempSensorDisable(void);
|
||||
///<BGR使能/关闭
|
||||
void Bgr_BgrEnable(void);
|
||||
void Bgr_BgrDisable(void);
|
||||
|
||||
//@} // BGR Group
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BGR_H__ */
|
||||
/******************************************************************************
|
||||
* EOF (not truncated)
|
||||
******************************************************************************/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,120 @@
|
||||
/******************************************************************************
|
||||
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file crc.h
|
||||
**
|
||||
** CRC 数据结构及API声明.
|
||||
**
|
||||
** - 2016-05-04 LuX V1.0.
|
||||
**
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __CRC_H__
|
||||
#define __CRC_H__
|
||||
|
||||
/******************************************************************************
|
||||
* Include files
|
||||
******************************************************************************/
|
||||
#include "sysctrl.h"
|
||||
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \defgroup CrcGroup Cyclic Redundancy Check (CRC)
|
||||
**
|
||||
******************************************************************************/
|
||||
//@{
|
||||
|
||||
/******************************************************************************
|
||||
* Global type definitions
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Global definitions
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Local type definitions ('typedef')
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Global variable definitions ('extern')
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Global function prototypes (definition in C source)
|
||||
******************************************************************************/
|
||||
//CRC16 编码值获取
|
||||
uint16_t CRC16_Get8(uint8_t* pu8Data, uint32_t u32Len);
|
||||
uint16_t CRC16_Get16(uint16_t* pu16Data, uint32_t u32Len);
|
||||
uint16_t CRC16_Get32(uint32_t* pu32Data, uint32_t u32Len);
|
||||
//CRC16 校验
|
||||
en_result_t CRC16_Check8(uint8_t* pu8Data, uint32_t u32Len, uint16_t u16CRC);
|
||||
en_result_t CRC16_Check16(uint16_t* pu16Data, uint32_t u32Len, uint16_t u16CRC);
|
||||
en_result_t CRC16_Check32(uint32_t* pu32Data, uint32_t u32Len, uint16_t u16CRC);
|
||||
|
||||
|
||||
//CRC32 编码值获取
|
||||
uint32_t CRC32_Get8(uint8_t* pu8Data, uint32_t u32Len);
|
||||
uint32_t CRC32_Get16(uint16_t* pu16Data, uint32_t u32Len);
|
||||
uint32_t CRC32_Get32(uint32_t* pu32Data, uint32_t u32Len);
|
||||
//CRC32 校验
|
||||
en_result_t CRC32_Check8(uint8_t* pu8Data, uint32_t u32Len, uint32_t u32CRC);
|
||||
en_result_t CRC32_Check16(uint16_t* pu16Data, uint32_t u32Len, uint32_t u32CRC);
|
||||
en_result_t CRC32_Check32(uint32_t* pu32Data, uint32_t u32Len, uint32_t u32CRC);
|
||||
//@} // CRC Group
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CRC_H__ */
|
||||
/******************************************************************************
|
||||
* EOF (not truncated)
|
||||
******************************************************************************/
|
||||
|
||||
@@ -0,0 +1,234 @@
|
||||
/******************************************************************************
|
||||
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file dac.h
|
||||
**
|
||||
** Header file for dac Converter functions
|
||||
** @link DAC Group Some description @endlink
|
||||
**
|
||||
** - 2019-04-10 First Version
|
||||
**
|
||||
******************************************************************************/
|
||||
#ifndef __DAC_H__
|
||||
#define __DAC_H__
|
||||
|
||||
/******************************************************************************/
|
||||
/* Include files */
|
||||
/******************************************************************************/
|
||||
#include "ddl.h"
|
||||
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief 使能或者禁止指令
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
DacDisable = 0u, //禁止
|
||||
DacEnable = 1u //使能
|
||||
}en_en_state_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief 使能或者禁止DAC0通道输出缓冲器 DAC_CR0:BOFF0
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
DacBoffDisable = 1u,
|
||||
DacBoffEnable = 0u
|
||||
}en_dac_boff_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief 使能或者禁止DAC0通道触发使能 DAC_CR0: TEN0
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
DacTenDisable = 0u,
|
||||
DacTenEnable = 1u
|
||||
}en_dac_ten_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief DAC0通道触发选择 DAC_CR0: TSEL0
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
DacTim0Tradc = 0u, //TIM0_TRADC触发
|
||||
DacTim1Tradc = 1u, //TIM1_TRADC触发
|
||||
DacTim2Tradc = 2u, //TIM2_TRADC触发
|
||||
DacTim3Tradc = 3u, //TIM3_TRADC触发
|
||||
DacTim4Tradc = 4u, //TIM4_TRADC触发
|
||||
DacTim5Tradc = 5u, //TIM5_TRADC触发
|
||||
DacSwTriger = 6u, //软件触发
|
||||
DacExPortTriger = 7u //外部端口触发
|
||||
}en_dac_tsel_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief DAC0通道噪声/三角波生产使能或禁止 DAC_CR0: WAVE0
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
DacWaveDisable = 0u, //禁止生产波
|
||||
DacNoiseEnable = 1u, //使能生成噪声波
|
||||
DacTrWaveEnable = 2u //使能生产三角波
|
||||
}en_dac_wave_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief DACx通道掩码/振幅选择器 DAC_CR0: MAMP0 & MAMP1
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
DacMemp01 = 0u,
|
||||
DacMenp03 = 1u,
|
||||
DacMenp07 = 2u,
|
||||
DacMenp15 = 3u,
|
||||
DacMenp31 = 4u,
|
||||
DacMenp63 = 5u,
|
||||
DacMenp127 = 6u,
|
||||
DacMenp255 = 7u,
|
||||
DacMenp511 = 8u,
|
||||
DacMenp1023 = 9u,
|
||||
DacMenp2047 = 10u,
|
||||
DacMenp4095 = 11u
|
||||
}en_dac_mamp_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief DACx通道DMA使能或禁止 DAC_CR0: DMAEN0 & DMAEN1
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief DACx通道DMA下溢中断使能或禁止 DAC_CR0: DMAUDRIE0 & DMAUDRIE1
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief DACx参考电压选择 DAC_CR0: SREF0 & SREF1
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
DacVoltage1V5 = 0u, //内部1.5V
|
||||
DacVoltage2V5 = 1u, //内部2.5V
|
||||
DacVoltageExRef = 2u, //外部参考电压ExRef(PB01)
|
||||
DacVoltageAvcc = 3u //AVCC电压
|
||||
}en_dac_sref_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief DACx触发选择寄存器DAC_ETRS DAC_ETRS
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
DacPortTrigPA9 = 0u, //触发端口为PA9
|
||||
DacPortTrigPB9 = 1u, //触发端口为PB9
|
||||
DacPortTrigPC9 = 2u, //触发端口为PC9
|
||||
DacPortTrigPD9 = 3u, //触发端口为PD9
|
||||
DacPortTrigPE9 = 4u, //触发端口为PE9
|
||||
DacPortTrigPF9 = 5u //触发端口为PF9
|
||||
}en_port_trig_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief 对齐方式
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
DacRightAlign = 0u, //右对齐
|
||||
DacLeftAlign = 1u //左对齐
|
||||
}en_align_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief 数据位数
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
DacBit8 = 0u, //8位
|
||||
DacBit12 = 1u //12位
|
||||
}en_bitno_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief 初始化配置结构体
|
||||
******************************************************************************/
|
||||
typedef struct
|
||||
{
|
||||
en_dac_boff_t boff_t;
|
||||
en_dac_ten_t ten_t;
|
||||
en_dac_tsel_t tsel_t;
|
||||
en_dac_wave_t wave_t;
|
||||
en_dac_mamp_t mamp_t;
|
||||
en_dac_sref_t sref_t;
|
||||
en_port_trig_t port_trig_t;
|
||||
en_align_t align;
|
||||
uint16_t dhr12;
|
||||
uint8_t dhr8;
|
||||
}stc_dac_cfg_t;
|
||||
|
||||
|
||||
|
||||
extern void Dac_DmaCmd(boolean_t NewState);
|
||||
extern void Dac_DmaITCfg(boolean_t NewState);
|
||||
extern boolean_t Dac_GetITStatus(void);
|
||||
extern void Dac_Cmd(boolean_t NewState);
|
||||
extern void Dac_SoftwareTriggerCmd(void);
|
||||
extern void Dac_Init(stc_dac_cfg_t* DAC_InitStruct);
|
||||
extern void Dac_SetChannelData(en_align_t DAC_Align, en_bitno_t DAC_Bit, uint16_t Data);
|
||||
extern uint16_t Dac_GetDataOutputValue(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif //__DAC_H__
|
||||
|
||||
/******************************************************************************/
|
||||
/* EOF (not truncated) */
|
||||
/******************************************************************************/
|
||||
@@ -0,0 +1,174 @@
|
||||
/*******************************************************************************
|
||||
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file ddl.h
|
||||
**
|
||||
** DDL common define.
|
||||
** @link SampleGroup Some description @endlink
|
||||
**
|
||||
** - 2019-10-17 1.1 Lux
|
||||
**
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __DDL_H__
|
||||
#define __DDL_H__
|
||||
|
||||
/******************************************************************************/
|
||||
/* Include files */
|
||||
/******************************************************************************/
|
||||
#include "base_types.h"
|
||||
#include "board_stkhc32l19x.h"
|
||||
#include "hc32l19x.h"
|
||||
#include "system_hc32l19x.h"
|
||||
#include "hc32l196_sysctrl.h"
|
||||
#include "interrupts_hc32l19x.h"
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/******************************************************************************/
|
||||
/* Global pre-processor symbols/macros ('#define') */
|
||||
/* Macro for initializing local structures to zero */
|
||||
/******************************************************************************/
|
||||
#define DDL_ZERO_STRUCT(x) ddl_memclr((uint8_t*)&(x), (uint32_t)(sizeof(x)))
|
||||
|
||||
#define DEC2BCD(x) ((((x)/10)<<4) + ((x)%10))
|
||||
#define BCD2DEC(x) ((((x)>>4)*10) + ((x)&0x0F))
|
||||
|
||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||
|
||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||
|
||||
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||
|
||||
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||
|
||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||
|
||||
#define READ_REG(REG) ((REG))
|
||||
|
||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** Global Device Series List
|
||||
******************************************************************************/
|
||||
#define DDL_DEVICE_SERIES_HC32L17X (0u)
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** Global Device Package List
|
||||
******************************************************************************/
|
||||
// package definitions of HC device.
|
||||
#define DDL_DEVICE_PACKAGE_HC_C (0x00u)
|
||||
#define DDL_DEVICE_PACKAGE_HC_F (0x10u)
|
||||
#define DDL_DEVICE_PACKAGE_HC_J (0x20u)
|
||||
#define DDL_DEVICE_PACKAGE_HC_K (0x30u)
|
||||
|
||||
/******************************************************************************/
|
||||
/* User Device Setting Include file */
|
||||
/******************************************************************************/
|
||||
#include "ddl_device.h" // MUST be included here!
|
||||
|
||||
/******************************************************************************/
|
||||
/* Global type definitions ('typedef') */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief Level
|
||||
**
|
||||
** Specifies levels.
|
||||
**
|
||||
******************************************************************************/
|
||||
typedef enum en_level
|
||||
{
|
||||
DdlLow = 0u, ///< Low level '0'
|
||||
DdlHigh = 1u ///< High level '1'
|
||||
} en_level_t;
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \brief Generic Flag Code
|
||||
**
|
||||
** Specifies flags.
|
||||
**
|
||||
******************************************************************************/
|
||||
typedef enum en_flag
|
||||
{
|
||||
DdlClr = 0u, ///< Flag clr '0'
|
||||
DdlSet = 1u ///< Flag set '1'
|
||||
} en_stat_flag_t, en_irq_flag_t;
|
||||
/******************************************************************************/
|
||||
/* Global variable declarations ('extern', definition in C source) */
|
||||
/******************************************************************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Global function prototypes ('extern', definition in C source) */
|
||||
/******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Global function prototypes
|
||||
******************************************************************************/
|
||||
extern void ddl_memclr(void* pu8Address, uint32_t u32Count);
|
||||
uint32_t Log2(uint32_t u32Val);
|
||||
/**
|
||||
*******************************************************************************
|
||||
** This hook is part of wait loops.
|
||||
******************************************************************************/
|
||||
void delay1ms(uint32_t u32Cnt);
|
||||
void delay100us(uint32_t u32Cnt);
|
||||
void delay10us(uint32_t u32Cnt);
|
||||
void SetBit(uint32_t addr, uint32_t offset, boolean_t bFlag);
|
||||
void ClrBit(uint32_t addr, uint32_t offset);
|
||||
boolean_t GetBit(uint32_t addr, uint32_t offset);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __DDL_H__ */
|
||||
|
||||
/******************************************************************************/
|
||||
/* EOF (not truncated) */
|
||||
/******************************************************************************/
|
||||
|
||||
@@ -0,0 +1,129 @@
|
||||
/*******************************************************************************
|
||||
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
|
||||
*
|
||||
* This software is owned and published by:
|
||||
* Huada Semiconductor Co.,Ltd ("HDSC").
|
||||
*
|
||||
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
|
||||
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
|
||||
*
|
||||
* This software contains source code for use with HDSC
|
||||
* components. This software is licensed by HDSC to be adapted only
|
||||
* for use in systems utilizing HDSC components. HDSC shall not be
|
||||
* responsible for misuse or illegal use of this software for devices not
|
||||
* supported herein. HDSC is providing this software "AS IS" and will
|
||||
* not be responsible for issues arising from incorrect user implementation
|
||||
* of the software.
|
||||
*
|
||||
* Disclaimer:
|
||||
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
|
||||
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
|
||||
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
|
||||
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
|
||||
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
|
||||
* WARRANTY OF NONINFRINGEMENT.
|
||||
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
|
||||
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
|
||||
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
|
||||
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
|
||||
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
|
||||
* SAVINGS OR PROFITS,
|
||||
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
|
||||
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
|
||||
* FROM, THE SOFTWARE.
|
||||
*
|
||||
* This software may be replicated in part or whole for the licensed use,
|
||||
* with the restriction that this Disclaimer and Copyright notice must be
|
||||
* included with each copy of this software, whether used in part or whole,
|
||||
* at all times.
|
||||
*/
|
||||
/******************************************************************************/
|
||||
/** \file debug.h
|
||||
**
|
||||
** Headerfile for DEBUG functions
|
||||
** @link Debug Group Some description @endlink
|
||||
**
|
||||
** History:
|
||||
** - 2018-04-15 Lux First Version
|
||||
**
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __DEBUG_H__
|
||||
#define __DEBUG_H__
|
||||
|
||||
/*******************************************************************************
|
||||
* Include files
|
||||
******************************************************************************/
|
||||
#include "ddl.h"
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
** \defgroup DebugGroup (DEBUG)
|
||||
**
|
||||
******************************************************************************/
|
||||
//@{
|
||||
|
||||
/**
|
||||
*******************************************************************************
|
||||
** function prototypes.
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Global type definitions
|
||||
******************************************************************************/
|
||||
/**
|
||||
*******************************************************************************
|
||||
** \brief 调试模式下各模块工作状态类型定义
|
||||
** \note
|
||||
******************************************************************************/
|
||||
typedef enum en_debug_module_active
|
||||
{
|
||||
DebugMskTim0 = 0x0001u, ///< TIM0
|
||||
DebugMskTim1 = 0x0002u, ///< TIM1
|
||||
DebugMskTim2 = 0x0004u, ///< TIM2
|
||||
DebugMskLpTim0 = 0x0008u, ///< LPTIM0
|
||||
DebugMskTim4 = 0x0010u, ///< TIM4
|
||||
DebugMskTim5 = 0x0020u, ///< TIM5
|
||||
DebugMskTim6 = 0x0040u, ///< TIM6
|
||||
DebugMskPca = 0x0080u, ///< PCA
|
||||
DebugMskWdt = 0x0100u, ///< WDT
|
||||
DebugMskRtc = 0x0200u, ///< RTC
|
||||
DebugMskTim3 = 0x0800u, ///< TIM3
|
||||
DebugMskLpTim1 = 0x1000u, ///< LPTIM1
|
||||
}en_debug_module_active_t;
|
||||
|
||||
/*******************************************************************************
|
||||
* Global definitions
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Global variable declarations ('extern', definition in C source)
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Global function prototypes (definition in C source)
|
||||
******************************************************************************/
|
||||
///< 在SWD调试模式下,使能模块计数功能
|
||||
en_result_t Debug_ActiveEnable(en_debug_module_active_t enModule);
|
||||
///< 在SWD调试模式下,暂停模块计数功能
|
||||
en_result_t Debug_ActiveDisable(en_debug_module_active_t enModule);
|
||||
|
||||
//@} // Debug Group
|
||||
|
||||
#ifdef __cplusplus
|
||||
#endif
|
||||
|
||||
#endif /* __DEBUG_H__ */
|
||||
/*******************************************************************************
|
||||
* EOF (not truncated)
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user