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bsp/stm32: Separate stm32mp1 hal drivers (#10264)
* bsp/stm32: Separate stm32mp1 hal drivers * bsp/stm32: change stm32mp1 .config
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@@ -111,9 +111,9 @@ void HAL_Delay(__IO uint32_t Delay)
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/* re-implement tick interface for STM32 HAL */
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HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
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{
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#ifndef SOC_SERIES_STM32MP1
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rt_hw_systick_init();
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#endif
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#ifndef SOC_SERIES_STM32MP1
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rt_hw_systick_init();
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#endif
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/* Return function status */
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return HAL_OK;
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@@ -100,6 +100,7 @@ config SOC_SERIES_STM32MP1
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bool
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select ARCH_ARM_CORTEX_M4
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select SOC_FAMILY_STM32
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select PKG_USING_STM32MP1_M4_HAL_DRIVER
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config SOC_SERIES_STM32WL
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bool
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@@ -1,228 +0,0 @@
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/**
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******************************************************************************
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* @file stm32mp1xx.h
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* @author MCD Application Team
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* @brief CMSIS STM32MP1xx Device Peripheral Access Layer Header File.
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*
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* The file is the unique include file that the application programmer
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* is using in the C source code, usually in main.c. This file contains:
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* - Configuration section that allows to select:
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* - The STM32MP1xx device used in the target application
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* - To use or not the peripheral’s drivers in application code(i.e.
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* code will be based on direct access to peripheral’s registers
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* rather than drivers API), this option is controlled by
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* "#define USE_HAL_DRIVER"
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup stm32mp1xx
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* @{
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*/
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#ifndef __STM32MP1xx_H
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#define __STM32MP1xx_H
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/** @addtogroup Library_configuration_section
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* @{
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*/
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/* Uncomment the line below according to the target STM32MP1 device used in your
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application
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*/
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#if !defined (STM32MP1)
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#define STM32MP1
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#endif /* STM32MP1 */
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/* Tip: To avoid modifying this file each time you need to switch between these
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devices, you can define the device in your toolchain compiler preprocessor.
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*/
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#if !defined (USE_HAL_DRIVER)
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/**
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* @brief Comment the line below if you will not use the peripherals drivers.
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In this case, these drivers will not be included and the application code will
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be based on direct access to peripherals registers
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*/
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/*#define USE_HAL_DRIVER */
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#endif /* USE_HAL_DRIVER */
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/**
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* @brief CMSIS Device version number
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*/
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#define __STM32MP1xx_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */
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#define __STM32MP1xx_CMSIS_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */
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#define __STM32MP1xx_CMSIS_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
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#define __STM32MP1xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
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#define __STM32MP1xx_CMSIS_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\
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|(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
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|(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
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|(__CMSIS_DEVICE_HAL_VERSION_RC))
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/**
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* @}
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*/
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/** @addtogroup Device_Included
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* @{
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*/
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#if defined(CORE_CM4)
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#if defined(STM32MP15xx) /* keep for backward compatibility STM32MP15xx = STM32MP157Cxx */
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#include "stm32mp157cxx_cm4.h"
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#elif defined(STM32MP157Axx)
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#include "stm32mp157axx_cm4.h"
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#elif defined(STM32MP157Cxx)
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#include "stm32mp157cxx_cm4.h"
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#elif defined(STM32MP157Dxx)
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#include "stm32mp157dxx_cm4.h"
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#elif defined(STM32MP157Fxx)
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#include "stm32mp157fxx_cm4.h"
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#elif defined(STM32MP153Axx)
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#include "stm32mp153axx_cm4.h"
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#elif defined(STM32MP153Cxx)
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#include "stm32mp153cxx_cm4.h"
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#elif defined(STM32MP153Dxx)
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#include "stm32mp153dxx_cm4.h"
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#elif defined(STM32MP153Fxx)
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#include "stm32mp153fxx_cm4.h"
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#elif defined(STM32MP151Axx)
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#include "stm32mp151axx_cm4.h"
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#elif defined(STM32MP151Cxx)
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#include "stm32mp151cxx_cm4.h"
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#elif defined(STM32MP151Dxx)
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#include "stm32mp151dxx_cm4.h"
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#elif defined(STM32MP151Fxx)
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#include "stm32mp151fxx_cm4.h"
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#else
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#error "Please select first the target STM32MP1xx device used in your application (in stm32mp1xx.h file)"
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#endif
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#endif
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#if defined(CORE_CA7)
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#if defined(STM32MP15xx) /* keep for backward compatibility STM32MP15xx = STM32MP157Cxx */
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#include "stm32mp157cxx_ca7.h"
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#elif defined(STM32MP157Axx)
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#include "stm32mp157axx_ca7.h"
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#elif defined(STM32MP157Cxx)
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#include "stm32mp157cxx_ca7.h"
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#elif defined(STM32MP157Dxx)
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#include "stm32mp157dxx_ca7.h"
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#elif defined(STM32MP157Fxx)
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#include "stm32mp157fxx_ca7.h"
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#elif defined(STM32MP153Axx)
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#include "stm32mp153axx_ca7.h"
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#elif defined(STM32MP153Cxx)
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#include "stm32mp153cxx_ca7.h"
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#elif defined(STM32MP153Dxx)
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#include "stm32mp153dxx_ca7.h"
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#elif defined(STM32MP153Fxx)
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#include "stm32mp153fxx_ca7.h"
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#elif defined(STM32MP151Axx)
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#include "stm32mp151axx_ca7.h"
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#elif defined(STM32MP151Cxx)
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#include "stm32mp151cxx_ca7.h"
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#elif defined(STM32MP151Dxx)
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#include "stm32mp151dxx_ca7.h"
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#elif defined(STM32MP151Fxx)
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#include "stm32mp151fxx_ca7.h"
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#else
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#error "Please select first the target STM32MP1xx device used in your application (in stm32mp1xx.h file)"
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#endif
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#endif
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/**
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* @}
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*/
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/** @addtogroup Exported_types
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* @{
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*/
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typedef enum
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{
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RESET = 0,
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SET = !RESET
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} FlagStatus, ITStatus;
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typedef enum
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{
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DISABLE = 0,
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ENABLE = !DISABLE
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} FunctionalState;
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#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
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typedef enum
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{
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ERROR = 0,
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SUCCESS = !ERROR
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} ErrorStatus;
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/**
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* @}
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*/
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/** @addtogroup Exported_macros
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* @{
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*/
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#define SET_BIT(REG, BIT) ((REG) |= (BIT))
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#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
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#define READ_BIT(REG, BIT) ((REG) & (BIT))
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#define CLEAR_REG(REG) ((REG) = (0x0))
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#define WRITE_REG(REG, VAL) ((REG) = (VAL))
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#define READ_REG(REG) ((REG))
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#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
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/**
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* @}
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*/
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#if defined (USE_HAL_DRIVER)
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#include "stm32mp1xx_hal.h"
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#endif /* USE_HAL_DRIVER */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __STM32MP1xx_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -1,106 +0,0 @@
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/**
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******************************************************************************
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* @file system_stm32mp1xx.h
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* @author MCD Application Team
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* @brief CMSIS Cortex-Mx Device System Source File for STM32MP1xx devices.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup stm32mp1xx_system
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* @{
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*/
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/**
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* @brief Define to prevent recursive inclusion
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*/
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#ifndef __SYSTEM_STM32MP1XX_H
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#define __SYSTEM_STM32MP1XX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup STM32MP1xx_System_Includes
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32MP1xx_System_Exported_types
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* @{
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*/
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/* This variable is updated in three ways:
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1) by calling CMSIS function SystemCoreClockUpdate()
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2) by calling HAL API function HAL_RCC_GetSysClockFreq()
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3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
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Note: If you use this function to configure the system clock; then there
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is no need to call the 2 first functions listed above, since SystemCoreClock
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variable is updated automatically.
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*/
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extern uint32_t SystemCoreClock; /*!< System Core1 Clock Frequency */
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extern uint32_t SystemCore1Clock; /*!< System Core1 Clock Frequency */
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extern uint32_t SystemCore2Clock; /*!< System Core2 Clock Frequency */
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/**
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* @}
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*/
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/** @addtogroup STM32MP1xx_System_Exported_Constants
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32MP1xx_System_Exported_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32MP1xx_System_Exported_Functions
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* @{
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*/
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extern void SystemInit(void);
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extern void SystemCoreClockUpdate(void);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /*__SYSTEM_STM32MP1XX_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -1,218 +0,0 @@
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<!DOCTYPE html>
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<html><head>
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<meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><title>Release Notes for STM32MP1xx CMSIS</title>
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<style>
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div.Section1 {
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page: Section1;
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font-family: Arial,Helvetica,sans-serif;
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}
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||||
h1 {
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font-size: 24pt;
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font-weight: bold;
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font-family: Arial,Helvetica,sans-serif;
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text-align: center;
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color: #3366ff;
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}
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h2 {
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margin: 12pt 0in 3pt;
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page-break-after: avoid;
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font-weight: bold;
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font-family: Arial,Helvetica,sans-serif;
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background-color: #3366ff;
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color: white;
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padding-left: 5px;
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font-size: 16pt;
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}
|
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h3 {
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margin-left: 0in;
|
||||
font-weight: bold;
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||||
font-family: Arial,Helvetica,sans-serif;
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||||
background-color: #3366ff;
|
||||
width: 200px;
|
||||
margin-right: 500pt;
|
||||
color: white;
|
||||
padding-left: 5px;
|
||||
padding-top: 2px;
|
||||
padding-bottom: 2px;
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||||
font-size: 12pt;
|
||||
}
|
||||
h4 {
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||||
font-family: Arial,Helvetica,sans-serif;
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||||
font-weight: bold;
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||||
text-decoration: underline;
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||||
font-size: 12pt;
|
||||
}
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||||
p {
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margin: 0px 0px 0px 0in;
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||||
font-family: Arial,Helvetica,sans-serif;
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||||
padding-top: 3px;
|
||||
padding-bottom: 3px;
|
||||
font-size: 12pt;
|
||||
}
|
||||
ul {
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||||
font-family: Arial,Helvetica,sans-serif;
|
||||
margin-top: 3px;
|
||||
margin-bottom: 3px;
|
||||
font-size: 10pt;
|
||||
}
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||||
caption {
|
||||
margin-top: 10px;
|
||||
font-family: Arial,Helvetica,sans-serif;
|
||||
font-size: 11pt;
|
||||
}
|
||||
hr {
|
||||
width: 100%;
|
||||
}
|
||||
.guidance {
|
||||
background-color: #e5b8b7;
|
||||
font-style: italic;
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||||
font-family: Arial,Helvetica,sans-serif;
|
||||
padding-top: 3px;
|
||||
padding-bottom: 3px;
|
||||
margin-top: 3px;
|
||||
margin-bottom: 3px;
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||||
font-size: 10pt;
|
||||
}
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||||
.guidance_title {
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||||
font-style: normal;
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||||
font-weight: bold;
|
||||
text-decoration: underline;
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||||
font-family: Arial,Helvetica,sans-serif;
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||||
font-size: 10pt;
|
||||
}
|
||||
.tickets {
|
||||
border: 1pt solid #9cc2e5;
|
||||
font-family: Arial,Helvetica,sans-serif;
|
||||
margin-bottom: 3px;
|
||||
margin-top: 3px;
|
||||
font-size: 10pt;
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||||
}
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||||
.tickets th {
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border: 1pt solid #9cc2e5;
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||||
font-size: 12pt;
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||||
background-color: #39a9dc;
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||||
color: white;
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||||
text-align: center;
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||||
}
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||||
.tickets td {
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||||
border: 1pt solid #9cc2e5;
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||||
min-height: 32px;
|
||||
}
|
||||
tr:nth-child(even) {background-color: #cee2f2;}
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||||
tr:nth-child(even) {background-color: #e8f1f9;}
|
||||
.topic1 {
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||||
margin-top: 3px;
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||||
margin-bottom: 3px;
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||||
margin-left: 40px;
|
||||
}
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||||
.topic2 {
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||||
margin-top: 3px;
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||||
margin-bottom: 3px;
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||||
}
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.topic3 {
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||||
margin-top: 3px;
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||||
margin-bottom: 3px;
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||||
margin-left: 20px;
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||||
}
|
||||
#purpose {
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||||
margin-top: 3px;
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||||
margin-bottom: 3px;
|
||||
}
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||||
#identification {
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||||
margin-top: 3px;
|
||||
margin-bottom: 3px;
|
||||
}
|
||||
</style></head>
|
||||
<body link="blue" vlink="blue">
|
||||
<script type="text/javascript">
|
||||
var toggle_hist_disp = true;
|
||||
function toggle_history()
|
||||
{
|
||||
if (toggle_hist_disp)
|
||||
{
|
||||
toggle_hist_disp = false;
|
||||
var filter_off_text = document.createTextNode("Hide History");
|
||||
document.getElementById('filter_hist').innerHTML = "";
|
||||
document.getElementById('filter_hist').appendChild(filter_off_text);
|
||||
document.getElementById("history").hidden = false;
|
||||
}
|
||||
else
|
||||
{
|
||||
toggle_hist_disp = true;
|
||||
var filter_on_text = document.createTextNode("Show History");
|
||||
document.getElementById('filter_hist').innerHTML = "";
|
||||
document.getElementById('filter_hist').appendChild(filter_on_text);
|
||||
document.getElementById("history").hidden = true;
|
||||
}
|
||||
}</script><a href="../../../../../Release_Notes.html">Back to Release page</a>
|
||||
<div style="width: 1034px;" class="Section1">
|
||||
<div id="header">
|
||||
<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||
Notes for<o:p></o:p> STM32MP1xx CMSIS Device</span></h1>
|
||||
<p style="text-align: center;">Copyright 2019
|
||||
STMicroelectronics</p>
|
||||
<p style="text-align: center;"><img style="width: 104px; height: 77px;" id="st_logo" alt="<ST logo> image" src="../../../../../_htmresc/st_logo.png"></p>
|
||||
</div>
|
||||
<div id="license" class="topic1">
|
||||
<h2>License</h2>
|
||||
<p>This software component is licensed by ST under BSD 3-Clause
|
||||
license, the "License"; You may not use this component except in
|
||||
compliance with the License. You may obtain a copy of the License at:</p>
|
||||
<p style="text-align: center; color: white;"><a href="https://opensource.org/licenses/BSD-3-Clause" target="_blank"><span style="background-color: yellow;"></span></a><a href="https://opensource.org/licenses/BSD-3-Clause" target="_blank">https://opensource.org/licenses/BSD-3-Clause</a><a href="https://opensource.org/licenses/BSD-3-Clause" target="_blank"><span style="background-color: yellow;"></span></a></p>
|
||||
</div>
|
||||
<div id="release_container" class="topic1">
|
||||
<div class="topic2" id="identification">
|
||||
<h3 style="width: 230px;">V1.4.0 / 26-Feb-2021</h3>
|
||||
</div>
|
||||
<div style="margin-left: 20px; width: 974px;" class="topic3" id="changes">
|
||||
<h4>Main changes</h4>
|
||||
<ul><li>Header files: </li></ul><ul><ul><li>Remove C1EMRx registers which does not exist on the silicon</li><li>Update RNG register structure</li></ul></ul><br>
|
||||
</div>
|
||||
<div class="topic3" id="contents">
|
||||
<h4>Contents</h4>
|
||||
<ul>
|
||||
<li>CMSIS devices files for:</li><ul><li>STM32MP<span style="font-weight: bold;">151C</span>xx ,STM32MP<span style="font-weight: bold;">151A</span>xx, STM32MP<span style="font-weight: bold;">151D</span>xx ,STM32MP<span style="font-weight: bold;">151F</span>xx</li><li>STM32MP<span style="font-weight: bold;">153C</span>xx ,STM32MP<span style="font-weight: bold;">153A</span>xx, STM32MP<span style="font-weight: bold;">153D</span>xx ,STM32MP<span style="font-weight: bold;">153F</span>xx</li><li>STM32MP<span style="font-weight: bold;">157C</span>xx ,STM32MP<span style="font-weight: bold;">157A</span>xx, STM32MP<span style="font-weight: bold;">157D</span>xx ,STM32MP<span style="font-weight: bold;">157F</span>xx</li></ul></ul><ul>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div style="margin-left: 40px;"><button id="filter_hist" onclick="toggle_history()">Show
|
||||
History</button><br>
|
||||
</div>
|
||||
<div id="history" class="topic1" hidden="">
|
||||
<h2>Update History</h2>
|
||||
<br><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; margin-left: 26px; width: 174px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.0 / 20-Oct-2020</span><br></h3><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
|
||||
<h4>Main changes</h4>
|
||||
<ul><li>Header files: </li><ul><li>Rename RCC bit definition to be more compliant with the name from RCC spec</li></ul><ul><li>Update STGEN register structure</li><li>Fix typo in MDMA register definition</li></ul></ul></div><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
|
||||
<h4>Contents</h4>
|
||||
<ul><li>CMSIS devices files for:</li><ul><li>STM32MP<span style="font-weight: bold;">151C</span>xx ,STM32MP<span style="font-weight: bold;">151A</span>xx, STM32MP<span style="font-weight: bold;">151D</span>xx ,STM32MP<span style="font-weight: bold;">151F</span>xx</li><li>STM32MP<span style="font-weight: bold;">153C</span>xx ,STM32MP<span style="font-weight: bold;">153A</span>xx, STM32MP<span style="font-weight: bold;">153D</span>xx ,STM32MP<span style="font-weight: bold;">153F</span>xx</li><li>STM32MP<span style="font-weight: bold;">157C</span>xx ,STM32MP<span style="font-weight: bold;">157A</span>xx, STM32MP<span style="font-weight: bold;">157D</span>xx ,STM32MP<span style="font-weight: bold;">157F</span>xx</li></ul></ul>
|
||||
<br>
|
||||
</div><br><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; margin-left: 26px; width: 174px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.0 / 03-Feb-2020</span><br></h3><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
|
||||
<h4>Main changes</h4>
|
||||
<ul><li>Header files: </li><ul><li>Add new Part Number for 800MHz</li><li>Update license with BSD 3-Clause template</li><li>Rework CMSIS for RTC/TAMP, GPIO and TIM</li><li>Rename TIM Break source bit definition</li></ul><li>Update Linker Template file for KEIL and IAR:</li><ul><li>Add OpenAMP region ( region present by default, to comment if needed )</li></ul></ul></div><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
|
||||
<h4>Contents</h4>
|
||||
<ul><li>CMSIS devices files for STM32MP<span style="font-weight: bold;">151C</span>xx ,STM32MP<span style="font-weight: bold;">151A</span>xx, STM32MP<span style="font-weight: bold;">153C</span>xx, STM32MP<span style="font-weight: bold;">153A</span>xx, STM32MP<span style="font-weight: bold;">157C</span>xx ,STM32MP<span style="font-weight: bold;">157A</span>xx</li></ul>
|
||||
<br>
|
||||
</div><br><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; margin-left: 26px; width: 174px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 / 10-Sept-2019</span><br></h3><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
|
||||
<h4>Main changes</h4>
|
||||
<ul><li>Header files: </li><ul><li>Update FMC bit definition</li><li>Update ETH bit definition</li><li>update EXTI_EXTICR bit definition</li><li>Update I2C bit definition</li><li>Update SPI bit definition (SPI_CR1_CRC33_17, SPI_RXCRC, SPI_IER, SPI_I2SCFGR) </li><li>TMPSENS IP renamed DTS</li><li>Update FDCAN TXBC bit definition</li><li>Update DAC_DHR8RD bit definition</li><li>Add CRYP in STM32MP151Cx and STM32MP153Cx</li><li>Update TIM / LPTIM bit definition + add missing macros</li></ul><li>Update system_stm32mp1xx.c</li><ul><li>Update SystemCoreClock</li></ul><li>Update startup file for KEIL and IAR</li></ul></div><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
|
||||
<h4>Contents</h4>
|
||||
<ul><li>CMSIS devices files for STM32MP<span style="font-weight: bold;">151C</span>xx ,STM32MP<span style="font-weight: bold;">151A</span>xx, STM32MP<span style="font-weight: bold;">153C</span>xx, STM32MP<span style="font-weight: bold;">153A</span>xx, STM32MP<span style="font-weight: bold;">157C</span>xx ,STM32MP<span style="font-weight: bold;">157A</span>xx</li></ul>
|
||||
<br>
|
||||
</div><br><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; margin-left: 26px; width: 174px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0 / 22-January-2019</span><br></h3><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
|
||||
<h4>Main changes</h4>
|
||||
<ul><li>First official release for <span style="font-weight: bold;">STM32MP15xx</span> devices<br>
|
||||
</li></ul></div><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
|
||||
<h4>Contents</h4>
|
||||
<ul><li>CMSIS devices files for STM32MP<span style="font-weight: bold;">151C</span>xx ,STM32MP<span style="font-weight: bold;">151A</span>xx, STM32MP<span style="font-weight: bold;">153C</span>xx, STM32MP<span style="font-weight: bold;">153A</span>xx, STM32MP<span style="font-weight: bold;">157C</span>xx ,STM32MP<span style="font-weight: bold;">157A</span>xx</li></ul>
|
||||
<br>
|
||||
</div><br><br>
|
||||
</div>
|
||||
<div id="product_doc" class="topic1">
|
||||
<hr>
|
||||
<p style="text-align: center;">For complete
|
||||
documentation on <span style="background-color: white;">STM32
|
||||
Microcontrollers</span>, visit: <span style="background-color: white;"><a href="http://www.st.com/STM32" target="_blank">www.st.com/STM32</a></span></p>
|
||||
</div>
|
||||
</div>
|
||||
</body></html>
|
||||
@@ -1,27 +0,0 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description ***
|
||||
; *************************************************************
|
||||
|
||||
LR_VECTORS 0x00000000 0x00000400 { ; load region size_region
|
||||
.isr_vector +0 {
|
||||
startup*.o (RESET, +First)
|
||||
}
|
||||
}
|
||||
|
||||
LR_IROM1 0x10000000 0x00020000 { ; load region size_region
|
||||
ER_IROM1 0x10000000 0x00020000 { ; load address = execution address
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x10020000 0x00020000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
; ***** Create region for OPENAMP *****
|
||||
; *** These 4 lines can be commented if OPENAMP is not used ***
|
||||
.resource_table +0 ALIGN 4 { ; resource table
|
||||
*(.resource_table)
|
||||
}
|
||||
__OpenAMP_SHMEM__ 0x10040000 EMPTY 0x8000 {} ; Shared Memory area used by OpenAMP
|
||||
}
|
||||
@@ -1,439 +0,0 @@
|
||||
;******************************************************************************
|
||||
;* File Name : startup_stm32mp15xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32MP15xx devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;******************************************************************************
|
||||
;* @attention
|
||||
;*
|
||||
;* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
;* All rights reserved.</center></h2>
|
||||
;*
|
||||
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||
;* the "License"; You may not use this file except in compliance with the
|
||||
;* License. You may obtain a copy of the License at:
|
||||
;* opensource.org/licenses/BSD-3-Clause
|
||||
;*
|
||||
;******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
__stack_limit
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; -14 NMI Handler
|
||||
DCD HardFault_Handler ; -13 Hard Fault Handler
|
||||
DCD MemManage_Handler ; -12 MPU Fault Handler
|
||||
DCD BusFault_Handler ; -11 Bus Fault Handler
|
||||
DCD UsageFault_Handler ; -10 Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; -5 SVCall Handler
|
||||
DCD DebugMon_Handler ; -4 Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; -2 PendSV Handler
|
||||
DCD SysTick_Handler ; -1 SysTick Handler
|
||||
|
||||
; Interrupts
|
||||
DCD WWDG1_IRQHandler ;
|
||||
DCD PVD_AVD_IRQHandler ;
|
||||
DCD TAMP_IRQHandler ;
|
||||
DCD RTC_WKUP_ALARM_IRQHandler ;
|
||||
DCD RESERVED4_IRQHandler ;
|
||||
DCD RCC_IRQHandler ;
|
||||
DCD EXTI0_IRQHandler ;
|
||||
DCD EXTI1_IRQHandler ;
|
||||
DCD EXTI2_IRQHandler ;
|
||||
DCD EXTI3_IRQHandler ;
|
||||
DCD EXTI4_IRQHandler ;
|
||||
DCD DMA1_Stream0_IRQHandler ;
|
||||
DCD DMA1_Stream1_IRQHandler ;
|
||||
DCD DMA1_Stream2_IRQHandler ;
|
||||
DCD DMA1_Stream3_IRQHandler ;
|
||||
DCD DMA1_Stream4_IRQHandler ;
|
||||
DCD DMA1_Stream5_IRQHandler ;
|
||||
DCD DMA1_Stream6_IRQHandler ;
|
||||
DCD ADC1_IRQHandler ;
|
||||
DCD FDCAN1_IT0_IRQHandler ;
|
||||
DCD FDCAN2_IT0_IRQHandler ;
|
||||
DCD FDCAN1_IT1_IRQHandler ;
|
||||
DCD FDCAN2_IT1_IRQHandler ;
|
||||
DCD EXTI5_IRQHandler ;
|
||||
DCD TIM1_BRK_IRQHandler ;
|
||||
DCD TIM1_UP_IRQHandler ;
|
||||
DCD TIM1_TRG_COM_IRQHandler ;
|
||||
DCD TIM1_CC_IRQHandler ;
|
||||
DCD TIM2_IRQHandler ;
|
||||
DCD TIM3_IRQHandler ;
|
||||
DCD TIM4_IRQHandler ;
|
||||
DCD I2C1_EV_IRQHandler ;
|
||||
DCD I2C1_ER_IRQHandler ;
|
||||
DCD I2C2_EV_IRQHandler ;
|
||||
DCD I2C2_ER_IRQHandler ;
|
||||
DCD SPI1_IRQHandler ;
|
||||
DCD SPI2_IRQHandler ;
|
||||
DCD USART1_IRQHandler ;
|
||||
DCD USART2_IRQHandler ;
|
||||
DCD USART3_IRQHandler ;
|
||||
DCD EXTI10_IRQHandler ;
|
||||
DCD RTC_TIMESTAMP_IRQHandler ;
|
||||
DCD EXTI11_IRQHandler ;
|
||||
DCD TIM8_BRK_IRQHandler ;
|
||||
DCD TIM8_UP_IRQHandler ;
|
||||
DCD TIM8_TRG_COM_IRQHandler ;
|
||||
DCD TIM8_CC_IRQHandler ;
|
||||
DCD DMA1_Stream7_IRQHandler ;
|
||||
DCD FMC_IRQHandler ;
|
||||
DCD SDMMC1_IRQHandler ;
|
||||
DCD TIM5_IRQHandler ;
|
||||
DCD SPI3_IRQHandler ;
|
||||
DCD UART4_IRQHandler ;
|
||||
DCD UART5_IRQHandler ;
|
||||
DCD TIM6_IRQHandler ;
|
||||
DCD TIM7_IRQHandler ;
|
||||
DCD DMA2_Stream0_IRQHandler ;
|
||||
DCD DMA2_Stream1_IRQHandler ;
|
||||
DCD DMA2_Stream2_IRQHandler ;
|
||||
DCD DMA2_Stream3_IRQHandler ;
|
||||
DCD DMA2_Stream4_IRQHandler ;
|
||||
DCD ETH1_IRQHandler ;
|
||||
DCD ETH1_WKUP_IRQHandler ;
|
||||
DCD FDCAN_CAL_IRQHandler ;
|
||||
DCD EXTI6_IRQHandler ;
|
||||
DCD EXTI7_IRQHandler ;
|
||||
DCD EXTI8_IRQHandler ;
|
||||
DCD EXTI9_IRQHandler ;
|
||||
DCD DMA2_Stream5_IRQHandler ;
|
||||
DCD DMA2_Stream6_IRQHandler ;
|
||||
DCD DMA2_Stream7_IRQHandler ;
|
||||
DCD USART6_IRQHandler ;
|
||||
DCD I2C3_EV_IRQHandler ;
|
||||
DCD I2C3_ER_IRQHandler ;
|
||||
DCD USBH_OHCI_IRQHandler ;
|
||||
DCD USBH_EHCI_IRQHandler ;
|
||||
DCD EXTI12_IRQHandler ;
|
||||
DCD EXTI13_IRQHandler ;
|
||||
DCD DCMI_IRQHandler ;
|
||||
DCD CRYP1_IRQHandler ;
|
||||
DCD HASH1_IRQHandler ;
|
||||
DCD FPU_IRQHandler ;
|
||||
DCD UART7_IRQHandler ;
|
||||
DCD UART8_IRQHandler ;
|
||||
DCD SPI4_IRQHandler ;
|
||||
DCD SPI5_IRQHandler ;
|
||||
DCD SPI6_IRQHandler ;
|
||||
DCD SAI1_IRQHandler ;
|
||||
DCD LTDC_IRQHandler ;
|
||||
DCD LTDC_ER_IRQHandler ;
|
||||
DCD ADC2_IRQHandler ;
|
||||
DCD SAI2_IRQHandler ;
|
||||
DCD QUADSPI_IRQHandler ;
|
||||
DCD LPTIM1_IRQHandler ;
|
||||
DCD CEC_IRQHandler ;
|
||||
DCD I2C4_EV_IRQHandler ;
|
||||
DCD I2C4_ER_IRQHandler ;
|
||||
DCD SPDIF_RX_IRQHandler ;
|
||||
DCD OTG_IRQHandler ;
|
||||
DCD RESERVED99_IRQHandler ;
|
||||
DCD IPCC_RX0_IRQHandler ;
|
||||
DCD IPCC_TX0_IRQHandler ;
|
||||
DCD DMAMUX1_OVR_IRQHandler ;
|
||||
DCD IPCC_RX1_IRQHandler ;
|
||||
DCD IPCC_TX1_IRQHandler ;
|
||||
DCD CRYP2_IRQHandler ;
|
||||
DCD HASH2_IRQHandler ;
|
||||
DCD I2C5_EV_IRQHandler ;
|
||||
DCD I2C5_ER_IRQHandler ;
|
||||
DCD GPU_IRQHandler ;
|
||||
DCD DFSDM1_FLT0_IRQHandler ;
|
||||
DCD DFSDM1_FLT1_IRQHandler ;
|
||||
DCD DFSDM1_FLT2_IRQHandler ;
|
||||
DCD DFSDM1_FLT3_IRQHandler ;
|
||||
DCD SAI3_IRQHandler ;
|
||||
DCD DFSDM1_FLT4_IRQHandler ;
|
||||
DCD TIM15_IRQHandler ;
|
||||
DCD TIM16_IRQHandler ;
|
||||
DCD TIM17_IRQHandler ;
|
||||
DCD TIM12_IRQHandler ;
|
||||
DCD MDIOS_IRQHandler ;
|
||||
DCD EXTI14_IRQHandler ;
|
||||
DCD MDMA_IRQHandler ;
|
||||
DCD DSI_IRQHandler ;
|
||||
DCD SDMMC2_IRQHandler ;
|
||||
DCD HSEM_IT2_IRQHandler ;
|
||||
DCD DFSDM1_FLT5_IRQHandler ;
|
||||
DCD EXTI15_IRQHandler ;
|
||||
DCD nCTIIRQ1_IRQHandler ;
|
||||
DCD nCTIIRQ2_IRQHandler ;
|
||||
DCD TIM13_IRQHandler ;
|
||||
DCD TIM14_IRQHandler ;
|
||||
DCD DAC_IRQHandler ;
|
||||
DCD RNG1_IRQHandler ;
|
||||
DCD RNG2_IRQHandler ;
|
||||
DCD I2C6_EV_IRQHandler ;
|
||||
DCD I2C6_ER_IRQHandler ;
|
||||
DCD SDMMC3_IRQHandler ;
|
||||
DCD LPTIM2_IRQHandler ;
|
||||
DCD LPTIM3_IRQHandler ;
|
||||
DCD LPTIM4_IRQHandler ;
|
||||
DCD LPTIM5_IRQHandler ;
|
||||
DCD ETH1_LPI_IRQHandler ;
|
||||
DCD RESERVED143_IRQHandler ;
|
||||
DCD MPU_SEV_IRQHandler ;
|
||||
DCD RCC_WAKEUP_IRQHandler ;
|
||||
DCD SAI4_IRQHandler ;
|
||||
DCD DTS_IRQHandler ;
|
||||
DCD RESERVED148_IRQHandler ;
|
||||
DCD WAKEUP_PIN_IRQHandler ;
|
||||
|
||||
SPACE (73 * 4) ; Interrupts 151 .. 224 are left out
|
||||
__Vectors_End
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
|
||||
; Macro to define default exception/interrupt handlers.
|
||||
; Default handler are weak symbols with an endless loop.
|
||||
; They can be overwritten by real handlers.
|
||||
MACRO
|
||||
Set_Default_Handler $Handler_Name
|
||||
$Handler_Name PROC
|
||||
EXPORT $Handler_Name [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MEND
|
||||
|
||||
|
||||
; Default exception/interrupt handler
|
||||
|
||||
Set_Default_Handler NMI_Handler
|
||||
Set_Default_Handler HardFault_Handler
|
||||
Set_Default_Handler MemManage_Handler
|
||||
Set_Default_Handler BusFault_Handler
|
||||
Set_Default_Handler UsageFault_Handler
|
||||
Set_Default_Handler SVC_Handler
|
||||
Set_Default_Handler DebugMon_Handler
|
||||
Set_Default_Handler PendSV_Handler
|
||||
Set_Default_Handler SysTick_Handler
|
||||
|
||||
Set_Default_Handler WWDG1_IRQHandler ; Window WatchDog 1
|
||||
Set_Default_Handler PVD_AVD_IRQHandler ; PVD and AVD through EXTI Line detection
|
||||
Set_Default_Handler TAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
Set_Default_Handler RTC_WKUP_ALARM_IRQHandler ; RTC Wakeup and Alarm through the EXTI line
|
||||
Set_Default_Handler RESERVED4_IRQHandler ; Reserved
|
||||
Set_Default_Handler RCC_IRQHandler ; RCC
|
||||
Set_Default_Handler EXTI0_IRQHandler ; EXTI Line0
|
||||
Set_Default_Handler EXTI1_IRQHandler ; EXTI Line1
|
||||
Set_Default_Handler EXTI2_IRQHandler ; EXTI Line2
|
||||
Set_Default_Handler EXTI3_IRQHandler ; EXTI Line3
|
||||
Set_Default_Handler EXTI4_IRQHandler ; EXTI Line4
|
||||
Set_Default_Handler DMA1_Stream0_IRQHandler ; DMA1 Stream 0
|
||||
Set_Default_Handler DMA1_Stream1_IRQHandler ; DMA1 Stream 1
|
||||
Set_Default_Handler DMA1_Stream2_IRQHandler ; DMA1 Stream 2
|
||||
Set_Default_Handler DMA1_Stream3_IRQHandler ; DMA1 Stream 3
|
||||
Set_Default_Handler DMA1_Stream4_IRQHandler ; DMA1 Stream 4
|
||||
Set_Default_Handler DMA1_Stream5_IRQHandler ; DMA1 Stream 5
|
||||
Set_Default_Handler DMA1_Stream6_IRQHandler ; DMA1 Stream 6
|
||||
Set_Default_Handler ADC1_IRQHandler ; ADC1
|
||||
Set_Default_Handler FDCAN1_IT0_IRQHandler ; FDCAN1 Interrupt line 0
|
||||
Set_Default_Handler FDCAN2_IT0_IRQHandler ; FDCAN2 Interrupt line 0
|
||||
Set_Default_Handler FDCAN1_IT1_IRQHandler ; FDCAN1 Interrupt line 1
|
||||
Set_Default_Handler FDCAN2_IT1_IRQHandler ; FDCAN2 Interrupt line 1
|
||||
Set_Default_Handler EXTI5_IRQHandler ; External Line5 interrupts through AIEC
|
||||
Set_Default_Handler TIM1_BRK_IRQHandler ; TIM1 Break interrupt
|
||||
Set_Default_Handler TIM1_UP_IRQHandler ; TIM1 Update Interrupt
|
||||
Set_Default_Handler TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation Interrupt
|
||||
Set_Default_Handler TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
Set_Default_Handler TIM2_IRQHandler ; TIM2
|
||||
Set_Default_Handler TIM3_IRQHandler ; TIM3
|
||||
Set_Default_Handler TIM4_IRQHandler ; TIM4
|
||||
Set_Default_Handler I2C1_EV_IRQHandler ; I2C1 Event
|
||||
Set_Default_Handler I2C1_ER_IRQHandler ; I2C1 Error
|
||||
Set_Default_Handler I2C2_EV_IRQHandler ; I2C2 Event
|
||||
Set_Default_Handler I2C2_ER_IRQHandler ; I2C2 Error
|
||||
Set_Default_Handler SPI1_IRQHandler ; SPI1
|
||||
Set_Default_Handler SPI2_IRQHandler ; SPI2
|
||||
Set_Default_Handler USART1_IRQHandler ; USART1
|
||||
Set_Default_Handler USART2_IRQHandler ; USART2
|
||||
Set_Default_Handler USART3_IRQHandler ; USART3
|
||||
Set_Default_Handler EXTI10_IRQHandler ; External Line10 interrupts through AIEC
|
||||
Set_Default_Handler RTC_TIMESTAMP_IRQHandler ; RTC TimeStamp through EXTI Line
|
||||
Set_Default_Handler EXTI11_IRQHandler ; External Line11 interrupts through AIEC
|
||||
Set_Default_Handler TIM8_BRK_IRQHandler ; TIM8 Break Interrupt
|
||||
Set_Default_Handler TIM8_UP_IRQHandler ; TIM8 Update Interrupt
|
||||
Set_Default_Handler TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt
|
||||
Set_Default_Handler TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
|
||||
Set_Default_Handler DMA1_Stream7_IRQHandler ; DMA1 Stream7
|
||||
Set_Default_Handler FMC_IRQHandler ; FMC
|
||||
Set_Default_Handler SDMMC1_IRQHandler ; SDMMC1
|
||||
Set_Default_Handler TIM5_IRQHandler ; TIM5
|
||||
Set_Default_Handler SPI3_IRQHandler ; SPI3
|
||||
Set_Default_Handler UART4_IRQHandler ; UART4
|
||||
Set_Default_Handler UART5_IRQHandler ; UART5
|
||||
Set_Default_Handler TIM6_IRQHandler ; TIM6
|
||||
Set_Default_Handler TIM7_IRQHandler ; TIM7
|
||||
Set_Default_Handler DMA2_Stream0_IRQHandler ; DMA2 Stream 0
|
||||
Set_Default_Handler DMA2_Stream1_IRQHandler ; DMA2 Stream 1
|
||||
Set_Default_Handler DMA2_Stream2_IRQHandler ; DMA2 Stream 2
|
||||
Set_Default_Handler DMA2_Stream3_IRQHandler ; DMA2 Stream 3
|
||||
Set_Default_Handler DMA2_Stream4_IRQHandler ; DMA2 Stream 4
|
||||
Set_Default_Handler ETH1_IRQHandler ; Ethernet
|
||||
Set_Default_Handler ETH1_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
||||
Set_Default_Handler FDCAN_CAL_IRQHandler ; FDCAN Calibration
|
||||
Set_Default_Handler EXTI6_IRQHandler ; EXTI Line6 interrupts through AIEC
|
||||
Set_Default_Handler EXTI7_IRQHandler ; EXTI Line7 interrupts through AIEC
|
||||
Set_Default_Handler EXTI8_IRQHandler ; EXTI Line8 interrupts through AIEC
|
||||
Set_Default_Handler EXTI9_IRQHandler ; EXTI Line9 interrupts through AIEC
|
||||
Set_Default_Handler DMA2_Stream5_IRQHandler ; DMA2 Stream 5
|
||||
Set_Default_Handler DMA2_Stream6_IRQHandler ; DMA2 Stream 6
|
||||
Set_Default_Handler DMA2_Stream7_IRQHandler ; DMA2 Stream 7
|
||||
Set_Default_Handler USART6_IRQHandler ; USART6
|
||||
Set_Default_Handler I2C3_EV_IRQHandler ; I2C3 event
|
||||
Set_Default_Handler I2C3_ER_IRQHandler ; I2C3 error
|
||||
Set_Default_Handler USBH_OHCI_IRQHandler ; USB Host OHCI
|
||||
Set_Default_Handler USBH_EHCI_IRQHandler ; USB Host EHCI
|
||||
Set_Default_Handler EXTI12_IRQHandler ; EXTI Line12 interrupts through AIEC
|
||||
Set_Default_Handler EXTI13_IRQHandler ; EXTI Line13 interrupts through AIEC
|
||||
Set_Default_Handler DCMI_IRQHandler ; DCMI
|
||||
Set_Default_Handler CRYP1_IRQHandler ; Crypto1 global interrupt
|
||||
Set_Default_Handler HASH1_IRQHandler ; Crypto Hash1 interrupt
|
||||
Set_Default_Handler FPU_IRQHandler ; FPU
|
||||
Set_Default_Handler UART7_IRQHandler ; UART7
|
||||
Set_Default_Handler UART8_IRQHandler ; UART8
|
||||
Set_Default_Handler SPI4_IRQHandler ; SPI4
|
||||
Set_Default_Handler SPI5_IRQHandler ; SPI5
|
||||
Set_Default_Handler SPI6_IRQHandler ; SPI6
|
||||
Set_Default_Handler SAI1_IRQHandler ; SAI1
|
||||
Set_Default_Handler LTDC_IRQHandler ; LTDC
|
||||
Set_Default_Handler LTDC_ER_IRQHandler ; LTDC error
|
||||
Set_Default_Handler ADC2_IRQHandler ; ADC2
|
||||
Set_Default_Handler SAI2_IRQHandler ; SAI2
|
||||
Set_Default_Handler QUADSPI_IRQHandler ; QUADSPI
|
||||
Set_Default_Handler LPTIM1_IRQHandler ; LPTIM1 global interrupt
|
||||
Set_Default_Handler CEC_IRQHandler ; HDMI_CEC
|
||||
Set_Default_Handler I2C4_EV_IRQHandler ; I2C4 Event
|
||||
Set_Default_Handler I2C4_ER_IRQHandler ; I2C4 Error
|
||||
Set_Default_Handler SPDIF_RX_IRQHandler ; SPDIF_RX
|
||||
Set_Default_Handler OTG_IRQHandler ; USB On The Go HS global interrupt
|
||||
Set_Default_Handler RESERVED99_IRQHandler ; Reserved
|
||||
Set_Default_Handler IPCC_RX0_IRQHandler ; Mailbox RX0 Free interrupt
|
||||
Set_Default_Handler IPCC_TX0_IRQHandler ; Mailbox TX0 Free interrupt
|
||||
Set_Default_Handler DMAMUX1_OVR_IRQHandler ; DMAMUX1 Overrun interrupt
|
||||
Set_Default_Handler IPCC_RX1_IRQHandler ; Mailbox RX1 Free interrupt
|
||||
Set_Default_Handler IPCC_TX1_IRQHandler ; Mailbox TX1 Free interrupt
|
||||
Set_Default_Handler CRYP2_IRQHandler ; Crypto2 global interrupt
|
||||
Set_Default_Handler HASH2_IRQHandler ; Crypto Hash2 interrupt
|
||||
Set_Default_Handler I2C5_EV_IRQHandler ; I2C5 Event Interrupt
|
||||
Set_Default_Handler I2C5_ER_IRQHandler ; I2C5 Error Interrupt
|
||||
Set_Default_Handler GPU_IRQHandler ; GPU Global Interrupt
|
||||
Set_Default_Handler DFSDM1_FLT0_IRQHandler ; DFSDM Filter0 Interrupt
|
||||
Set_Default_Handler DFSDM1_FLT1_IRQHandler ; DFSDM Filter1 Interrupt
|
||||
Set_Default_Handler DFSDM1_FLT2_IRQHandler ; DFSDM Filter2 Interrupt
|
||||
Set_Default_Handler DFSDM1_FLT3_IRQHandler ; DFSDM Filter3 Interrupt
|
||||
Set_Default_Handler SAI3_IRQHandler ; SAI3 global Interrupt
|
||||
Set_Default_Handler DFSDM1_FLT4_IRQHandler ; DFSDM Filter4 Interrupt
|
||||
Set_Default_Handler TIM15_IRQHandler ; TIM15 global Interrupt
|
||||
Set_Default_Handler TIM16_IRQHandler ; TIM16 global Interrupt
|
||||
Set_Default_Handler TIM17_IRQHandler ; TIM17 global Interrupt
|
||||
Set_Default_Handler TIM12_IRQHandler ; TIM12 global Interrupt
|
||||
Set_Default_Handler MDIOS_IRQHandler ; MDIOS global Interrupt
|
||||
Set_Default_Handler EXTI14_IRQHandler ; EXTI Line14 interrupts through AIEC
|
||||
Set_Default_Handler MDMA_IRQHandler ; MDMA global Interrupt
|
||||
Set_Default_Handler DSI_IRQHandler ; DSI global Interrupt
|
||||
Set_Default_Handler SDMMC2_IRQHandler ; SDMMC2 global Interrupt
|
||||
Set_Default_Handler HSEM_IT2_IRQHandler ; HSEM global Interrupt
|
||||
Set_Default_Handler DFSDM1_FLT5_IRQHandler ; DFSDM Filter5 Interrupt
|
||||
Set_Default_Handler EXTI15_IRQHandler ; EXTI Line15 interrupts through AIEC
|
||||
Set_Default_Handler nCTIIRQ1_IRQHandler ; Cortex-M4 CTI interrupt 1
|
||||
Set_Default_Handler nCTIIRQ2_IRQHandler ; Cortex-M4 CTI interrupt 2
|
||||
Set_Default_Handler TIM13_IRQHandler ; TIM13 global interrupt
|
||||
Set_Default_Handler TIM14_IRQHandler ; TIM14 global interrupt
|
||||
Set_Default_Handler DAC_IRQHandler ; DAC1 and DAC2 underrun error interrupts
|
||||
Set_Default_Handler RNG1_IRQHandler ; RNG1 interrupt
|
||||
Set_Default_Handler RNG2_IRQHandler ; RNG2 interrupt
|
||||
Set_Default_Handler I2C6_EV_IRQHandler ; I2C6 Event Interrupt
|
||||
Set_Default_Handler I2C6_ER_IRQHandler ; I2C6 Error Interrupt
|
||||
Set_Default_Handler SDMMC3_IRQHandler ; SDMMC3 global Interrupt
|
||||
Set_Default_Handler LPTIM2_IRQHandler ; LPTIM2 global interrupt
|
||||
Set_Default_Handler LPTIM3_IRQHandler ; LPTIM3 global interrupt
|
||||
Set_Default_Handler LPTIM4_IRQHandler ; LPTIM4 global interrupt
|
||||
Set_Default_Handler LPTIM5_IRQHandler ; LPTIM5 global interrupt
|
||||
Set_Default_Handler ETH1_LPI_IRQHandler ; Reserved
|
||||
Set_Default_Handler RESERVED143_IRQHandler ; Reserved
|
||||
Set_Default_Handler MPU_SEV_IRQHandler ; MPU Send Event through AIEC
|
||||
Set_Default_Handler RCC_WAKEUP_IRQHandler ; RCC Wake up interrupt
|
||||
Set_Default_Handler SAI4_IRQHandler ; SAI4 global interrupt
|
||||
Set_Default_Handler DTS_IRQHandler ; Temperature sensor interrupt
|
||||
Set_Default_Handler RESERVED148_IRQHandler ; Reserved
|
||||
Set_Default_Handler WAKEUP_PIN_IRQHandler ; Interrupt for all 6 wake-up pins
|
||||
|
||||
ALIGN
|
||||
|
||||
|
||||
; User setup Stack & Heap
|
||||
|
||||
EXPORT __stack_limit
|
||||
EXPORT __initial_sp
|
||||
IF Heap_Size != 0 ; Heap is provided
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
ENDIF
|
||||
|
||||
END
|
||||
@@ -1,202 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32MP1 series
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed “as is,” without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under BSD 3-Clause license,
|
||||
** the License; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/BSD-3-Clause
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x10040000; /* end of RAM */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000298
|
||||
m_text (RX) : ORIGIN = 0x10000000, LENGTH = 0x00020000
|
||||
m_data (RW) : ORIGIN = 0x10020000, LENGTH = 0x00020000
|
||||
m_ipc_shm (RW) : ORIGIN = 0x10040000, LENGTH = 0x00008000
|
||||
}
|
||||
|
||||
/* Symbols needed for OpenAMP to enable rpmsg */
|
||||
__OPENAMP_region_start__ = ORIGIN(m_ipc_shm);
|
||||
__OPENAMP_region_end__ = ORIGIN(m_ipc_shm)+LENGTH(m_ipc_shm);
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into ROM memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} > m_interrupts
|
||||
|
||||
|
||||
/* The program code and other data into ROM memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} > m_text
|
||||
|
||||
/* Constant data into ROM memory*/
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} > m_text
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(4);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(4);
|
||||
} > m_text
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(4);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(4);
|
||||
} > m_text
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} > m_text
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} > m_text
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} > m_text
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
__DATA_ROM = .;
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections */
|
||||
.data : AT(__DATA_ROM)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} > m_data
|
||||
|
||||
__DATA_END = __DATA_ROM + (_edata - _sdata);
|
||||
text_end = ORIGIN(m_text) + LENGTH(m_text);
|
||||
ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
|
||||
|
||||
.resource_table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP (*(.resource_table*))
|
||||
. = ALIGN(4);
|
||||
} > m_data
|
||||
|
||||
|
||||
/* Uninitialized data section into RAM memory */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} > m_data
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} > m_data
|
||||
|
||||
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,40 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_text_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_text_end__ = 0x00008000;
|
||||
define symbol __ICFEDIT_region_data_start__ = 0x00008000;
|
||||
define symbol __ICFEDIT_region_data_end__ = 0x00010000;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region text_region = mem:[from __ICFEDIT_region_text_start__ to __ICFEDIT_region_text_end__];
|
||||
define region data_region = mem:[from __ICFEDIT_region_data_start__ to __ICFEDIT_region_data_end__];
|
||||
|
||||
keep { section .resource_table };
|
||||
".resource_table" : place in data_region {section .resource_table};
|
||||
|
||||
/* Create region for OPENAMP */
|
||||
/* !!! These 4 lines can be commented if OPENAMP is not used !!!*/
|
||||
define symbol __OPENAMP_region_start__ = 0x10040000;
|
||||
define symbol __OPENAMP_region_size__ = 0x8000;
|
||||
export symbol __OPENAMP_region_start__;
|
||||
export symbol __OPENAMP_region_size__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit};
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
place in text_region { readonly };
|
||||
place in data_region { readwrite,
|
||||
block CSTACK, block HEAP};
|
||||
@@ -1,40 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_text_start__ = 0x10000000;
|
||||
define symbol __ICFEDIT_region_text_end__ = 0x1001FFFF;
|
||||
define symbol __ICFEDIT_region_data_start__ = 0x10020000;
|
||||
define symbol __ICFEDIT_region_data_end__ = 0x1003FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region text_region = mem:[from __ICFEDIT_region_text_start__ to __ICFEDIT_region_text_end__];
|
||||
define region data_region = mem:[from __ICFEDIT_region_data_start__ to __ICFEDIT_region_data_end__];
|
||||
|
||||
keep { section .resource_table };
|
||||
".resource_table" : place in data_region {section .resource_table};
|
||||
|
||||
/* Create region for OPENAMP */
|
||||
/* !!! These 4 lines can be commented if OPENAMP is not used !!!*/
|
||||
define symbol __OPENAMP_region_start__ = 0x10040000;
|
||||
define symbol __OPENAMP_region_size__ = 0x8000;
|
||||
export symbol __OPENAMP_region_start__;
|
||||
export symbol __OPENAMP_region_size__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit};
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
place in text_region { readonly };
|
||||
place in data_region { readwrite,
|
||||
block CSTACK, block HEAP};
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,290 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32mp1xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32mp1xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock frequency, it can
|
||||
* be used by the user application to setup
|
||||
* the SysTick timer or configure other
|
||||
* parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32mp1xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32MP1xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32mp1xx_hal.h"
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32MP1xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32MP1xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
/*!< Uncomment the following line if you need to use external SRAM mounted
|
||||
on EVAL board as data memory */
|
||||
/* #define DATA_IN_ExtSRAM */
|
||||
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x400. */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32MP1xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32MP1xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) each time HAL_RCC_ClockConfig() is called to configure the system clock
|
||||
frequency
|
||||
Note: If you use this function to configure the system clock;
|
||||
then there is no need to call the first functions listed above,
|
||||
since SystemCoreClock variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = HSI_VALUE;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32MP1xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined (DATA_IN_ExtSRAM)
|
||||
static void SystemInit_ExtMemCtl(void);
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32MP1xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the FPU setting, vector table location and External memory
|
||||
* configuration.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if defined (CORE_CM4)
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#if defined (VECT_TAB_SRAM)
|
||||
SCB->VTOR = MCU_AHB_SRAM | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#endif
|
||||
/* Disable all interrupts and events */
|
||||
CLEAR_REG(EXTI_C2->IMR1);
|
||||
CLEAR_REG(EXTI_C2->IMR2);
|
||||
CLEAR_REG(EXTI_C2->IMR3);
|
||||
CLEAR_REG(EXTI_C2->EMR1);
|
||||
CLEAR_REG(EXTI_C2->EMR2);
|
||||
CLEAR_REG(EXTI_C2->EMR3);
|
||||
#else
|
||||
#error Please #define CORE_CM4
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock frequency (Hz),
|
||||
* it can be used by the user application to setup the SysTick timer or
|
||||
* configure other parameters.
|
||||
*
|
||||
* @note Each time the core clock changes, this function must be called to
|
||||
* update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the
|
||||
* HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the
|
||||
* HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is CSI, SystemCoreClock will contain the
|
||||
* CSI_VALUE(***)
|
||||
*
|
||||
* - If SYSCLK source is PLL3_P, SystemCoreClock will contain the
|
||||
* HSI_VALUE(*) or the HSE_VALUE(*) or the CSI_VALUE(***)
|
||||
* multiplied/divided by the PLL3 factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32mp1xx_hal_conf.h file
|
||||
* (default value 64 MHz) but the real value may vary depending
|
||||
* on the variations in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32mp1xx_hal_conf.h file
|
||||
* (default value 24 MHz), user has to ensure that HSE_VALUE is
|
||||
* same as the real frequency of the crystal used. Otherwise, this
|
||||
* function may have wrong result.
|
||||
*
|
||||
* (***) CSI_VALUE is a constant defined in stm32mp1xx_hal_conf.h file
|
||||
* (default value 4 MHz)but the real value may vary depending
|
||||
* on the variations in voltage and temperature.
|
||||
*
|
||||
* - The result of this function could be not correct when using
|
||||
* fractional value for HSE crystal.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t pllsource, pll3m, pll3fracen;
|
||||
float fracn1, pll3vco;
|
||||
|
||||
switch (RCC->MSSCKSELR & RCC_MSSCKSELR_MCUSSRC)
|
||||
{
|
||||
case 0x00: /* HSI used as system clock source */
|
||||
SystemCoreClock = (HSI_VALUE >> (RCC->HSICFGR & RCC_HSICFGR_HSIDIV));
|
||||
break;
|
||||
|
||||
case 0x01: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
|
||||
case 0x02: /* CSI used as system clock source */
|
||||
SystemCoreClock = CSI_VALUE;
|
||||
break;
|
||||
|
||||
case 0x03: /* PLL3_P used as system clock source */
|
||||
pllsource = (RCC->RCK3SELR & RCC_RCK3SELR_PLL3SRC);
|
||||
pll3m = ((RCC->PLL3CFGR1 & RCC_PLL3CFGR1_DIVM3) >> RCC_PLL3CFGR1_DIVM3_Pos) + 1U;
|
||||
pll3fracen = (RCC->PLL3FRACR & RCC_PLL3FRACR_FRACLE) >> 16U;
|
||||
fracn1 = (float)(pll3fracen * ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACV) >> 3U));
|
||||
pll3vco = (float)((float)((RCC->PLL3CFGR1 & RCC_PLL3CFGR1_DIVN) + 1U) + (fracn1 / (float) 0x1FFF));
|
||||
|
||||
if (pll3m != 0U)
|
||||
{
|
||||
switch (pllsource)
|
||||
{
|
||||
case 0x00: /* HSI used as PLL clock source */
|
||||
pll3vco *= (float)((HSI_VALUE >> (RCC->HSICFGR & RCC_HSICFGR_HSIDIV)) / pll3m);
|
||||
break;
|
||||
|
||||
case 0x01: /* HSE used as PLL clock source */
|
||||
pll3vco *= (float)(HSE_VALUE / pll3m);
|
||||
break;
|
||||
|
||||
case 0x02: /* CSI used as PLL clock source */
|
||||
pll3vco *= (float)(CSI_VALUE / pll3m);
|
||||
break;
|
||||
|
||||
case 0x03: /* No clock source for PLL */
|
||||
pll3vco = 0;
|
||||
break;
|
||||
}
|
||||
SystemCoreClock = (uint32_t)(pll3vco/ ((float)((RCC->PLL3CFGR2 & RCC_PLL3CFGR2_DIVP) + 1U)));
|
||||
}
|
||||
else
|
||||
{
|
||||
SystemCoreClock = 0U;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
/* Compute mcu_ck */
|
||||
SystemCoreClock = SystemCoreClock >> (RCC->MCUDIVR & RCC_MCUDIVR_MCUDIV);
|
||||
}
|
||||
|
||||
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
/**
|
||||
* @brief Setup the external memory controller.
|
||||
* Called in startup_stm32mp15xx.s before jump to main.
|
||||
* This function configures the external SRAM mounted on Eval boards
|
||||
* This SRAM will be used as program data memory (including heap and stack).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
|
||||
}
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -1,132 +0,0 @@
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
# get current directory
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# The set of source files associated with this SConscript file.
|
||||
|
||||
src = Split('''
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hsem.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_exti.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_ipcc.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cortex.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma_ex.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_mdma.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr_ex.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc_ex.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_gpio.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_adc.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_adc_ex.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dac.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dac_ex.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_i2c.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_i2c_ex.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_spi.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim.c
|
||||
STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim_ex.c
|
||||
''')
|
||||
|
||||
if GetDepend(['RT_USING_SERIAL']) or GetDepend(['RT_USING_NANO', 'RT_USING_CONSOLE']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_uart.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_uart_ex.c']
|
||||
|
||||
if GetDepend(['RT_USING_USB']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pccard.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pcd.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pcd_ex.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hcd.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_usb.c']
|
||||
|
||||
if GetDepend(['RT_USING_CAN']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_can.c']
|
||||
|
||||
if GetDepend(['BSP_USING_WWDG']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_wwdg.c']
|
||||
|
||||
if GetDepend(['BSP_USING_LPTIM']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_lptim.c']
|
||||
|
||||
if GetDepend(['RT_USING_RTC']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rtc.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rtc_ex.c']
|
||||
|
||||
if GetDepend(['RT_USING_WDT']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_wwdg.c']
|
||||
|
||||
if GetDepend(['RT_USING_SDIO']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_sdmmc.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sd.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_delayblock.c']
|
||||
|
||||
if GetDepend(['RT_USING_AUDIO']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sai.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sai_ex.c']
|
||||
if GetDepend(['BSP_USING_DCMI']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dcmi.c']
|
||||
|
||||
if GetDepend(['BSP_USING_FMC']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_fmc.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_fsmc.c']
|
||||
|
||||
if GetDepend(['BSP_USING_SDRAM']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sdram.c']
|
||||
|
||||
if GetDepend(['BSP_USING_EXT_FMC_IO']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sram.c']
|
||||
|
||||
if GetDepend(['BSP_USING_ON_CHIP_FLASH']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_flash.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_flash_ex.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_flash_ramfunc.c']
|
||||
|
||||
if GetDepend(['BSP_USING_LTDC']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_ltdc.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_ltdc_ex.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma2d.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_dma2d.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dsi.c']
|
||||
|
||||
if GetDepend(['BSP_USING_FDCAN']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_fdcan.c']
|
||||
|
||||
if GetDepend(['BSP_USING_QSPI']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_qspi.c']
|
||||
|
||||
if GetDepend(['BSP_USING_SPDIFRX']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_spdifrx.c']
|
||||
|
||||
if GetDepend(['BSP_USING_DFSDM']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dfsdm.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dfsdm_ex.c']
|
||||
|
||||
if GetDepend(['BSP_USING_HASH']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hash.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hash_ex.c']
|
||||
|
||||
if GetDepend(['BSP_USING_CRC']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_crc.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_crc_ex.c']
|
||||
|
||||
if GetDepend(['BSP_USING_RNG']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rng.c']
|
||||
|
||||
if GetDepend(['BSP_USING_CRYP']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cryp.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cryp_ex.c']
|
||||
|
||||
if GetDepend(['BSP_USING_RTC']):
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rtc.c']
|
||||
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rtc_ex.c']
|
||||
|
||||
path = [cwd + '/STM32MP1xx_HAL_Driver/Inc',
|
||||
cwd + '/CMSIS/Device/ST/STM32MP1xx/Include']
|
||||
|
||||
CPPDEFINES = ['USE_HAL_DRIVER']
|
||||
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,57 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32_assert.h
|
||||
* @author MCD Application Team
|
||||
* @brief STM32 assert template file.
|
||||
* This file should be copied to the application folder and renamed
|
||||
* to stm32_assert.h.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32_ASSERT_H
|
||||
#define STM32_ASSERT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32_ASSERT_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user