mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-03-27 01:10:20 +08:00
[bsp][stm32]: add NUCLEO-H563ZI (#7987)
This commit is contained in:
yuanzihao
GitHub
3
.github/workflows/action.yml
vendored
3
.github/workflows/action.yml
vendored
@@ -135,7 +135,7 @@ jobs:
|
||||
- "stm32/stm32f429-st-disco"
|
||||
- "stm32/stm32f446-st-nucleo"
|
||||
- "stm32/stm32f469-st-disco"
|
||||
- RTT_BSP: "stm32_f7_g0_h7_mp15_u5_wb5"
|
||||
- RTT_BSP: "stm32_f7_g0_h7_mp15_u5_h5_wb5"
|
||||
RTT_TOOL_CHAIN: "sourcery-arm"
|
||||
SUB_RTT_BSP:
|
||||
- "stm32/stm32f746-st-disco"
|
||||
@@ -149,6 +149,7 @@ jobs:
|
||||
- "stm32/stm32g071-st-nucleo"
|
||||
- "stm32/stm32g431-st-nucleo"
|
||||
- "stm32/stm32g474-st-nucleo"
|
||||
- "stm32/stm32h563-st-nucleo"
|
||||
- "stm32/stm32h743-armfly-v7"
|
||||
- "stm32/stm32h743-atk-apollo"
|
||||
- "stm32/stm32h743-openmv-h7plus"
|
||||
|
||||
@@ -1,108 +1,109 @@
|
||||
|
||||
# STM32 BSP 说明
|
||||
|
||||
STM32 系列 BSP 目前支持情况如下表所示：
|
||||
|
||||
| **BSP 文件夹名称** | **开发板名称** |
|
||||
|:------------------------- |:-------------------------- |
|
||||
| **F0 系列** | |
|
||||
| [stm32f072-st-nucleo](stm32f072-st-nucleo) | ST 官方 STM32F072-nucleo 开发板 |
|
||||
| [stm32f091-st-nucleo](stm32f091-st-nucleo) | ST 官方 STM32F091-nucleo 开发板 |
|
||||
| **F1 系列** | |
|
||||
| [stm32f103-100ask-mini](stm32f103-100ask-mini) | 百问网F103 Mini开发板 |
|
||||
| [stm32f103-100ask-pro](stm32f103-100ask-pro) | 百问网F103 Pro开发板 |
|
||||
| [stm32f103-atk-nano](stm32f103-atk-nano) | 正点原子 F103 NANO 开发板 |
|
||||
| [stm32f103-atk-warshipv3](stm32f103-atk-warshipv3) | 正点原子 F103 战舰V3 开发板 |
|
||||
| [stm32f103-blue-pill](stm32f103-blue-pill) | STM32F103C8T6蓝色最小系统板 |
|
||||
| [stm32f103-dofly-lyc8](stm32f103-dofly-lyc8) | 德飞莱 STM32F103 开发板 |
|
||||
| [stm32f103-dofly-M3S](stm32f103-dofly-M3S) | 德飞莱 STM32F103 开发板 |
|
||||
| [stm32f103-fire-arbitrary](stm32f103-fire-arbitrary/) | 野火 F103 霸道开发板 |
|
||||
| [stm32f103-gizwits-gokitv21](stm32f103-gizwits-gokitv21) | GoKit V2.1开发板 |
|
||||
| [stm32f103-hw100k-ibox](stm32f103-hw100k-ibox) | 硬件十万个为什么 STM32F103 iBox 开发板 |
|
||||
| [stm32f103-onenet-nbiot](stm32f103-onenet-nbiot) | STM32F103 OneNET NB-IoT 开发板 |
|
||||
| [stm32f103-yf-ufun](stm32f103-yf-ufun) | STM32F103 yf-ufun 开发板 |
|
||||
| [stm32f107-uc-eval](stm32f107-uc-eval) | uC/Eval STM32F107 评估板（中国版） |
|
||||
| **F2 系列** | |
|
||||
| [stm32f207-st-nucleo](stm32f207-st-nucleo) | ST 官方 STM32F207-nucleo 开发板 |
|
||||
| **F3 系列** | |
|
||||
| [stm32f302-st-nucleo](stm32f302-st-nucleo) | ST 官方 STM32F302-nucleo 开发板 |
|
||||
| [stm32f334-st-nucleo](stm32f334-st-nucleo) | ST 官方 STM32F334-nucleo 开发板 |
|
||||
| **F4 系列** | |
|
||||
| [stm32f407-rt-spark](stm32f407-rt-spark) | 睿赛德官方 F407 星火一号开发板 |
|
||||
| [stm32f401-st-nucleo](stm32f401-st-nucleo) | ST 官方 STM32F401 Nucleo-64 开发板 |
|
||||
| [stm32f405-smdz-breadfruit](stm32f405-smdz-breadfruit) | 三木电子 SM1432F405 开发板 |
|
||||
| [stm32f407-atk-explorer](stm32f407-atk-explorer) | 正点原子 F407 探索者开发板 |
|
||||
| [stm32f407-robomaster-c](stm32f407-robomaster-c) | 大疆公司 RoboMaster C型开发板 |
|
||||
| [stm32f407-st-discovery](stm32f407-st-discovery) | ST 官方 STM32F407-discovery 开发板 |
|
||||
| [stm32f410-st-nucleo](stm32f410-st-nucleo) | ST 官方 STM32F410-Nucleo-64 开发板 |
|
||||
| [stm32f411-atk-nano](stm32f411-atk-nano/) | 正点原子 F411 NANO 开发板 |
|
||||
| [stm32f411-st-nucleo](stm32f411-st-nucleo/) | ST 官方 STM32F411-Nucleo-64 开发板 |
|
||||
| [stm32f411-weact-MiniF4](stm32f411-weact-MiniF4/) | F401/F411最小系统开发板（Black Pill） |
|
||||
| [stm32f412-st-nucleo](stm32f412-st-nucleo/) | ST 官方 STM32F412-Nucleo-144 开发板 |
|
||||
| [stm32f413-st-nucleo](stm32f413-st-nucleo/) | ST 官方 STM32F413-Nucleo-144 开发板 |
|
||||
| [stm32f427-robomaster-a](stm32f427-robomaster-a/) |大疆公司 RoboMaster A型开发板|
|
||||
| [stm32f429-armfly-v6](stm32f429-armfly-v6) |安富莱 F429-v6 开发板|
|
||||
| [stm32f429-atk-apollo](stm32f429-atk-apollo) |正点原子 F429 阿波罗开发板|
|
||||
| [stm32f429-fire-challenger](stm32f429-fire-challenger/) |野火 F429 挑战者开发板|
|
||||
| [stm32f429-st-disco](stm32f429-st-disco) | ST 官方 STM32F429-discovery 开发板 |
|
||||
| [stm32f446-st-nucleo](stm32f446-st-nucleo) | ST 官方 STM32F446-nucleo 开发板 |
|
||||
| [stm32f469-st-disco](stm32f469-st-disco) | ST 官方 STM32F469-discovery 开发板 |
|
||||
| **F7 系列** | |
|
||||
| [stm32f746-st-disco](stm32f746-st-disco) | ST 官方 STM32F746-discovery 开发板 |
|
||||
| [stm32f767-atk-apollo](stm32f767-atk-apollo) | 正点原子 F767 阿波罗开发板 |
|
||||
| [stm32f767-fire-challenger-v1](stm32f767-fire-challenger-v1/) | 野火 F767-V1 挑战者开发板 |
|
||||
| [stm32f767-st-nucleo](stm32f767-st-nucleo) | ST 官方 STM32F767-nucleo 开发板 |
|
||||
| [stm32f769-st-disco](stm32f769-st-disco) | ST 官方 STM32f769-discovery 开发板 |
|
||||
| **G0 系列** | |
|
||||
| [stm32g070-st-nucleo](stm32g070-st-nucleo) | ST 官方 STM32G070-nucleo 开发板 |
|
||||
| [stm32g071-st-nucleo](stm32g071-st-nucleo) | ST 官方 STM32G071-nucleo 开发板 |
|
||||
| **G4 系列** | |
|
||||
| [stm32g431-st-nucleo](stm32g431-st-nucleo) | ST 官方 STM32G431-nucleo 开发板 |
|
||||
| **H7 系列** | |
|
||||
| [stm32h743-armfly-v7](stm32h743-armfly-v7) | 安富莱 STM32H743 v7 开发板 |
|
||||
| [stm32h743-atk-apollo](stm32h743-atk-apollo) | 正点原子 h743 阿波罗开发板 |
|
||||
| [stm32h743-openmv-h7plus](stm32h743-openmv-h7plus) | OPENMV 官方 H7-PLUS 开发板 |
|
||||
| [stm32h743-st-nucleo](stm32h743-st-nucleo) | ST 官方 STM32H743-nucleo 开发板 |
|
||||
| [stm32h747-st-discovery](stm32h747-st-discovery) | ST 官方 STM32H747I-discovery 开发板 |
|
||||
| [stm32h750-armfly-h7-tool](stm32h750-armfly-h7-tool) | 安富莱 STM32H750 Tool 开发板 |
|
||||
| [stm32h750-artpi](stm32h750-artpi) | RT-Thread 官方 STM32H750-artpi 开发板 |
|
||||
| [stm32h750-fk750m1-vbt6](stm32h750-fk750m1-vbt6) | 反客科技 FK750M1-VBT6 开发板 |
|
||||
| [stm32h750-weact-ministm32h7xx](stm32h750-weact-ministm32h7xx) | 微行电子 STM32H7xx 核心板 |
|
||||
| **L0 系列** | |
|
||||
| [stm32l010-st-nucleo](stm32l010-st-nucleo) | ST 官方 STM32L010-nucleo 开发板 |
|
||||
| [stm32l053-st-nucleo](stm32l053-st-nucleo) | ST 官方 STM32L053-nucleo 开发板 |
|
||||
| **L4 系列** | |
|
||||
| [stm32l4r5-st-nucleo](stm32l4r5-st-nucleo) | ST 官方 STM32L4R5-Nucleo 开发板 |
|
||||
| [stm32l4r9-st-eval](stm32l4r9-st-eval) | ST 官方 STM32L4R9I-EVAL 开发板 |
|
||||
| [stm32l412-st-nucleo](stm32l412-st-nucleo) | ST 官方 STM32L412-Nucleo 开发板 |
|
||||
| [stm32l431-BearPi](stm32l431-BearPi) | STM32L431 小熊派 开发板 |
|
||||
| [stm32l432-st-nucleo](stm32l432-st-nucleo) | ST 官方 STM32L432-Nucleo 开发板 |
|
||||
| [stm32l433-st-nucleo](stm32l433-st-nucleo) | ST 官方 STM32L433-Nucleo 开发板 |
|
||||
| [stm32l452-st-nucleo](stm32l452-st-nucleo) | ST 官方 STM32L452-Nucleo 开发板 |
|
||||
| [stm32l475-atk-pandora](stm32l475-atk-pandora) | 正点原子 L475 潘多拉 IoT 开发板 |
|
||||
| [stm32l475-st-discovery](stm32l475-st-discovery) | ST 官方 stm32l475-discovery 开发板 |
|
||||
| [stm32l476-st-nucleo](stm32l476-st-nucleo) | ST 官方 STM32L476-Nucleo 开发板 |
|
||||
| [stm32l433-ali-startkit](stm32l433-ali-startkit) | 诺行 STM32L433 Ali Start Kit 开发板 |
|
||||
| [stm32l496-ali-developer](stm32l496-ali-developer) | 诺行 STM32L496 Ali Developer Kit 开发板 |
|
||||
| [stm32l496-st-nucleo](stm32l496-st-nucleo) | ST 官方 STM32L496-Nucleo 开发板 |
|
||||
| [stm32l496-st-discovery](stm32l496-st-discovery) | ST 官方 STM32L496G discovery 开发板 |
|
||||
| **L5 系列** | |
|
||||
| [stm32l552-st-nucleo](stm32l552-st-nucleo) | ST 官方 STM32L552-Nucleo 开发板 |
|
||||
| **U5 系列** | |
|
||||
| [stm32u575-st-nucleo](stm32u575-st-nucleo) | ST 官方 STM32U575ZI-Nucleo 开发板 |
|
||||
| **MP1 系列** | |
|
||||
| [stm32mp157a-st-discovery](stm32mp157a-st-discovery) | ST 官方 STM32MP157A-DK1 开发板 |
|
||||
| [stm32mp157a-st-ev1](stm32mp157a-st-ev1) | ST 官方 STM32MP157A-EV1 开发板 |
|
||||
| **WB 系列** | |
|
||||
| [stm32wb55-st-nucleo](stm32wb55-st-nucleo) | ST 官方 STM32WB55-Nucleo 开发板 |
|
||||
| [stm32wl55-st-nucleo](stm32wl55-st-nucleo) | ST 官方 STM32WL55-Nucleo 开发板 |
|
||||
| **BSP 文件夹名称** | **开发板名称** |
|
||||
|:-------------------------------------------------------------- |:---------------------------------- |
|
||||
| **F0 系列** | |
|
||||
| [stm32f072-st-nucleo](stm32f072-st-nucleo) | ST 官方 STM32F072-nucleo 开发板 |
|
||||
| [stm32f091-st-nucleo](stm32f091-st-nucleo) | ST 官方 STM32F091-nucleo 开发板 |
|
||||
| **F1 系列** | |
|
||||
| [stm32f103-100ask-mini](stm32f103-100ask-mini) | 百问网F103 Mini开发板 |
|
||||
| [stm32f103-100ask-pro](stm32f103-100ask-pro) | 百问网F103 Pro开发板 |
|
||||
| [stm32f103-atk-nano](stm32f103-atk-nano) | 正点原子 F103 NANO 开发板 |
|
||||
| [stm32f103-atk-warshipv3](stm32f103-atk-warshipv3) | 正点原子 F103 战舰V3 开发板 |
|
||||
| [stm32f103-blue-pill](stm32f103-blue-pill) | STM32F103C8T6蓝色最小系统板 |
|
||||
| [stm32f103-dofly-lyc8](stm32f103-dofly-lyc8) | 德飞莱 STM32F103 开发板 |
|
||||
| [stm32f103-dofly-M3S](stm32f103-dofly-M3S) | 德飞莱 STM32F103 开发板 |
|
||||
| [stm32f103-fire-arbitrary](stm32f103-fire-arbitrary/) | 野火 F103 霸道开发板 |
|
||||
| [stm32f103-gizwits-gokitv21](stm32f103-gizwits-gokitv21) | GoKit V2.1开发板 |
|
||||
| [stm32f103-hw100k-ibox](stm32f103-hw100k-ibox) | 硬件十万个为什么 STM32F103 iBox 开发板 |
|
||||
| [stm32f103-onenet-nbiot](stm32f103-onenet-nbiot) | STM32F103 OneNET NB-IoT 开发板 |
|
||||
| [stm32f103-yf-ufun](stm32f103-yf-ufun) | STM32F103 yf-ufun 开发板 |
|
||||
| [stm32f107-uc-eval](stm32f107-uc-eval) | uC/Eval STM32F107 评估板（中国版） |
|
||||
| **F2 系列** | |
|
||||
| [stm32f207-st-nucleo](stm32f207-st-nucleo) | ST 官方 STM32F207-nucleo 开发板 |
|
||||
| **F3 系列** | |
|
||||
| [stm32f302-st-nucleo](stm32f302-st-nucleo) | ST 官方 STM32F302-nucleo 开发板 |
|
||||
| [stm32f334-st-nucleo](stm32f334-st-nucleo) | ST 官方 STM32F334-nucleo 开发板 |
|
||||
| **F4 系列** | |
|
||||
| [stm32f407-rt-spark](stm32f407-rt-spark) | 睿赛德官方 F407 星火一号开发板 |
|
||||
| [stm32f401-st-nucleo](stm32f401-st-nucleo) | ST 官方 STM32F401 Nucleo-64 开发板 |
|
||||
| [stm32f405-smdz-breadfruit](stm32f405-smdz-breadfruit) | 三木电子 SM1432F405 开发板 |
|
||||
| [stm32f407-atk-explorer](stm32f407-atk-explorer) | 正点原子 F407 探索者开发板 |
|
||||
| [stm32f407-robomaster-c](stm32f407-robomaster-c) | 大疆公司 RoboMaster C型开发板 |
|
||||
| [stm32f407-st-discovery](stm32f407-st-discovery) | ST 官方 STM32F407-discovery 开发板 |
|
||||
| [stm32f410-st-nucleo](stm32f410-st-nucleo) | ST 官方 STM32F410-Nucleo-64 开发板 |
|
||||
| [stm32f411-atk-nano](stm32f411-atk-nano/) | 正点原子 F411 NANO 开发板 |
|
||||
| [stm32f411-st-nucleo](stm32f411-st-nucleo/) | ST 官方 STM32F411-Nucleo-64 开发板 |
|
||||
| [stm32f411-weact-MiniF4](stm32f411-weact-MiniF4/) | F401/F411最小系统开发板（Black Pill） |
|
||||
| [stm32f412-st-nucleo](stm32f412-st-nucleo/) | ST 官方 STM32F412-Nucleo-144 开发板 |
|
||||
| [stm32f413-st-nucleo](stm32f413-st-nucleo/) | ST 官方 STM32F413-Nucleo-144 开发板 |
|
||||
| [stm32f427-robomaster-a](stm32f427-robomaster-a/) | 大疆公司 RoboMaster A型开发板 |
|
||||
| [stm32f429-armfly-v6](stm32f429-armfly-v6) | 安富莱 F429-v6 开发板 |
|
||||
| [stm32f429-atk-apollo](stm32f429-atk-apollo) | 正点原子 F429 阿波罗开发板 |
|
||||
| [stm32f429-fire-challenger](stm32f429-fire-challenger/) | 野火 F429 挑战者开发板 |
|
||||
| [stm32f429-st-disco](stm32f429-st-disco) | ST 官方 STM32F429-discovery 开发板 |
|
||||
| [stm32f446-st-nucleo](stm32f446-st-nucleo) | ST 官方 STM32F446-nucleo 开发板 |
|
||||
| [stm32f469-st-disco](stm32f469-st-disco) | ST 官方 STM32F469-discovery 开发板 |
|
||||
| **F7 系列** | |
|
||||
| [stm32f746-st-disco](stm32f746-st-disco) | ST 官方 STM32F746-discovery 开发板 |
|
||||
| [stm32f767-atk-apollo](stm32f767-atk-apollo) | 正点原子 F767 阿波罗开发板 |
|
||||
| [stm32f767-fire-challenger-v1](stm32f767-fire-challenger-v1/) | 野火 F767-V1 挑战者开发板 |
|
||||
| [stm32f767-st-nucleo](stm32f767-st-nucleo) | ST 官方 STM32F767-nucleo 开发板 |
|
||||
| [stm32f769-st-disco](stm32f769-st-disco) | ST 官方 STM32f769-discovery 开发板 |
|
||||
| **G0 系列** | |
|
||||
| [stm32g070-st-nucleo](stm32g070-st-nucleo) | ST 官方 STM32G070-nucleo 开发板 |
|
||||
| [stm32g071-st-nucleo](stm32g071-st-nucleo) | ST 官方 STM32G071-nucleo 开发板 |
|
||||
| **G4 系列** | |
|
||||
| [stm32g431-st-nucleo](stm32g431-st-nucleo) | ST 官方 STM32G431-nucleo 开发板 |
|
||||
| **H7 系列** | |
|
||||
| [stm32h743-armfly-v7](stm32h743-armfly-v7) | 安富莱 STM32H743 v7 开发板 |
|
||||
| [stm32h743-atk-apollo](stm32h743-atk-apollo) | 正点原子 h743 阿波罗开发板 |
|
||||
| [stm32h743-openmv-h7plus](stm32h743-openmv-h7plus) | OPENMV 官方 H7-PLUS 开发板 |
|
||||
| [stm32h743-st-nucleo](stm32h743-st-nucleo) | ST 官方 STM32H743-nucleo 开发板 |
|
||||
| [stm32h747-st-discovery](stm32h747-st-discovery) | ST 官方 STM32H747I-discovery 开发板 |
|
||||
| [stm32h750-armfly-h7-tool](stm32h750-armfly-h7-tool) | 安富莱 STM32H750 Tool 开发板 |
|
||||
| [stm32h750-artpi](stm32h750-artpi) | RT-Thread 官方 STM32H750-artpi 开发板 |
|
||||
| [stm32h750-fk750m1-vbt6](stm32h750-fk750m1-vbt6) | 反客科技 FK750M1-VBT6 开发板 |
|
||||
| [stm32h750-weact-ministm32h7xx](stm32h750-weact-ministm32h7xx) | 微行电子 STM32H7xx 核心板 |
|
||||
| **L0 系列** | |
|
||||
| [stm32l010-st-nucleo](stm32l010-st-nucleo) | ST 官方 STM32L010-nucleo 开发板 |
|
||||
| [stm32l053-st-nucleo](stm32l053-st-nucleo) | ST 官方 STM32L053-nucleo 开发板 |
|
||||
| **L4 系列** | |
|
||||
| [stm32l4r5-st-nucleo](stm32l4r5-st-nucleo) | ST 官方 STM32L4R5-Nucleo 开发板 |
|
||||
| [stm32l4r9-st-eval](stm32l4r9-st-eval) | ST 官方 STM32L4R9I-EVAL 开发板 |
|
||||
| [stm32l412-st-nucleo](stm32l412-st-nucleo) | ST 官方 STM32L412-Nucleo 开发板 |
|
||||
| [stm32l431-BearPi](stm32l431-BearPi) | STM32L431 小熊派 开发板 |
|
||||
| [stm32l432-st-nucleo](stm32l432-st-nucleo) | ST 官方 STM32L432-Nucleo 开发板 |
|
||||
| [stm32l433-st-nucleo](stm32l433-st-nucleo) | ST 官方 STM32L433-Nucleo 开发板 |
|
||||
| [stm32l452-st-nucleo](stm32l452-st-nucleo) | ST 官方 STM32L452-Nucleo 开发板 |
|
||||
| [stm32l475-atk-pandora](stm32l475-atk-pandora) | 正点原子 L475 潘多拉 IoT 开发板 |
|
||||
| [stm32l475-st-discovery](stm32l475-st-discovery) | ST 官方 stm32l475-discovery 开发板 |
|
||||
| [stm32l476-st-nucleo](stm32l476-st-nucleo) | ST 官方 STM32L476-Nucleo 开发板 |
|
||||
| [stm32l433-ali-startkit](stm32l433-ali-startkit) | 诺行 STM32L433 Ali Start Kit 开发板 |
|
||||
| [stm32l496-ali-developer](stm32l496-ali-developer) | 诺行 STM32L496 Ali Developer Kit 开发板 |
|
||||
| [stm32l496-st-nucleo](stm32l496-st-nucleo) | ST 官方 STM32L496-Nucleo 开发板 |
|
||||
| [stm32l496-st-discovery](stm32l496-st-discovery) | ST 官方 STM32L496G discovery 开发板 |
|
||||
| **L5 系列** | |
|
||||
| [stm32l552-st-nucleo](stm32l552-st-nucleo) | ST 官方 STM32L552-Nucleo 开发板 |
|
||||
| **U5 系列** | |
|
||||
| [stm32u575-st-nucleo](stm32u575-st-nucleo) | ST 官方 STM32U575ZI-Nucleo 开发板 |
|
||||
| **H5 系列** | |
|
||||
| [stm32h563-st-nucleo](stm32h563-st-nucleo) | ST 官方 STM32H563ZI-Nucleo 开发板 |
|
||||
| **MP1 系列** | |
|
||||
| [stm32mp157a-st-discovery](stm32mp157a-st-discovery) | ST 官方 STM32MP157A-DK1 开发板 |
|
||||
| [stm32mp157a-st-ev1](stm32mp157a-st-ev1) | ST 官方 STM32MP157A-EV1 开发板 |
|
||||
| **WB 系列** | |
|
||||
| [stm32wb55-st-nucleo](stm32wb55-st-nucleo) | ST 官方 STM32WB55-Nucleo 开发板 |
|
||||
| [stm32wl55-st-nucleo](stm32wl55-st-nucleo) | ST 官方 STM32WL55-Nucleo 开发板 |
|
||||
|
||||
可以通过阅读相应 BSP 下的 README 来快速上手，如果想要使用 BSP 更多功能可参考 docs 文件夹下提供的说明文档，如下表所示：
|
||||
|
||||
| **BSP 使用教程** | **简介** |
|
||||
|:-------------------- |:------------------------------------------------- |
|
||||
| [外设驱动使用教程](docs/STM32系列BSP外设驱动使用教程.md) | 讲解 BSP 上更多外设驱动的使用方法 |
|
||||
| [外设驱动介绍与应用](docs/STM32系列驱动介绍.md) | 讲解 STM32 系列 BSP 驱动的支持情况，以及如何利用驱动框架开发应用程序 |
|
||||
| **BSP 制作与提交** | **简介** |
|
||||
| [BSP 制作教程](docs/STM32系列BSP制作教程.md) | 讲解 STM32 系列 BSP 的制作方法，以及在制作 BSP 和提交 BSP 时应当遵守的规范，视频教程请观看 ：[《RT-Thread STM32 系列 BSP 制作视频教程》](https://url.cn/5qqxJMU?sf=uri) |
|
||||
| [外设驱动添加指南](docs/STM32系列外设驱动添加指南.md) | 讲解 BSP 添加更多设备驱动的方法 |
|
||||
| **BSP 使用教程** | **简介** |
|
||||
|:-------------------------------------- |:-------------------------------------------------------------------------------------------------------------------------- |
|
||||
| [外设驱动使用教程](docs/STM32系列BSP外设驱动使用教程.md) | 讲解 BSP 上更多外设驱动的使用方法 |
|
||||
| [外设驱动介绍与应用](docs/STM32系列驱动介绍.md) | 讲解 STM32 系列 BSP 驱动的支持情况，以及如何利用驱动框架开发应用程序 |
|
||||
| **BSP 制作与提交** | **简介** |
|
||||
| [BSP 制作教程](docs/STM32系列BSP制作教程.md) | 讲解 STM32 系列 BSP 的制作方法，以及在制作 BSP 和提交 BSP 时应当遵守的规范，视频教程请观看 ：[《RT-Thread STM32 系列 BSP 制作视频教程》](https://url.cn/5qqxJMU?sf=uri) |
|
||||
| [外设驱动添加指南](docs/STM32系列外设驱动添加指南.md) | 讲解 BSP 添加更多设备驱动的方法 |
|
||||
|
||||
@@ -18,5 +18,6 @@ dir_path:
|
||||
- STM32L5xx_HAL
|
||||
- STM32MPxx_HAL
|
||||
- STM32U5xx_HAL
|
||||
- STM32H5xx_HAL
|
||||
- STM32WBxx_HAL
|
||||
- STM32WLxx_HAL
|
||||
|
||||
151
bsp/stm32/libraries/HAL_Drivers/config/h5/uart_config.h
Normal file
151
bsp/stm32/libraries/HAL_Drivers/config/h5/uart_config.h
Normal file
@@ -0,0 +1,151 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-06 SummerGift first version
|
||||
*/
|
||||
|
||||
#ifndef __UART_CONFIG_H__
|
||||
#define __UART_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_LPUART1)
|
||||
#ifndef LPUART1_CONFIG
|
||||
#define LPUART1_CONFIG \
|
||||
{ \
|
||||
.name = "lpuart1", \
|
||||
.Instance = LPUART1, \
|
||||
.irq_type = LPUART1_IRQn, \
|
||||
}
|
||||
#endif /* LPUART1_CONFIG */
|
||||
#if defined(BSP_LPUART1_RX_USING_DMA)
|
||||
#ifndef LPUART1_DMA_CONFIG
|
||||
#define LPUART1_DMA_CONFIG \
|
||||
{ \
|
||||
.Instance = LPUART1_RX_DMA_INSTANCE, \
|
||||
.request = LPUART1_RX_DMA_REQUEST, \
|
||||
.dma_rcc = LPUART1_RX_DMA_RCC, \
|
||||
.dma_irq = LPUART1_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* LPUART1_DMA_CONFIG */
|
||||
#endif /* BSP_LPUART1_RX_USING_DMA */
|
||||
#endif /* BSP_USING_LPUART1 */
|
||||
|
||||
#if defined(BSP_USING_UART1)
|
||||
#ifndef UART1_CONFIG
|
||||
#define UART1_CONFIG \
|
||||
{ \
|
||||
.name = "uart1", \
|
||||
.Instance = USART1, \
|
||||
.irq_type = USART1_IRQn, \
|
||||
}
|
||||
#endif /* UART1_CONFIG */
|
||||
#endif /* BSP_USING_UART1 */
|
||||
|
||||
#if defined(BSP_UART1_RX_USING_DMA)
|
||||
#ifndef UART1_DMA_RX_CONFIG
|
||||
#define UART1_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART1_RX_DMA_INSTANCE, \
|
||||
.request = UART1_RX_DMA_REQUEST, \
|
||||
.dma_rcc = UART1_RX_DMA_RCC, \
|
||||
.dma_irq = UART1_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART1_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART1_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_UART1_TX_USING_DMA)
|
||||
#ifndef UART1_DMA_TX_CONFIG
|
||||
#define UART1_DMA_TX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART1_TX_DMA_INSTANCE, \
|
||||
.request = UART1_TX_DMA_REQUEST, \
|
||||
.dma_rcc = UART1_TX_DMA_RCC, \
|
||||
.dma_irq = UART1_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART1_DMA_TX_CONFIG */
|
||||
#endif /* BSP_UART1_TX_USING_DMA */
|
||||
|
||||
#if defined(BSP_USING_UART2)
|
||||
#ifndef UART2_CONFIG
|
||||
#define UART2_CONFIG \
|
||||
{ \
|
||||
.name = "uart2", \
|
||||
.Instance = USART2, \
|
||||
.irq_type = USART2_IRQn, \
|
||||
}
|
||||
#endif /* UART2_CONFIG */
|
||||
#endif /* BSP_USING_UART2 */
|
||||
|
||||
#if defined(BSP_UART2_RX_USING_DMA)
|
||||
#ifndef UART2_DMA_RX_CONFIG
|
||||
#define UART2_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART2_RX_DMA_INSTANCE, \
|
||||
.request = UART2_RX_DMA_REQUEST, \
|
||||
.dma_rcc = UART2_RX_DMA_RCC, \
|
||||
.dma_irq = UART2_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART2_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART2_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_UART2_TX_USING_DMA)
|
||||
#ifndef UART2_DMA_TX_CONFIG
|
||||
#define UART2_DMA_TX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART2_TX_DMA_INSTANCE, \
|
||||
.request = UART2_TX_DMA_REQUEST, \
|
||||
.dma_rcc = UART2_TX_DMA_RCC, \
|
||||
.dma_irq = UART2_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART2_DMA_TX_CONFIG */
|
||||
#endif /* BSP_UART2_TX_USING_DMA */
|
||||
|
||||
#if defined(BSP_USING_UART3)
|
||||
#ifndef UART3_CONFIG
|
||||
#define UART3_CONFIG \
|
||||
{ \
|
||||
.name = "uart3", \
|
||||
.Instance = USART3, \
|
||||
.irq_type = USART3_IRQn, \
|
||||
}
|
||||
#endif /* UART3_CONFIG */
|
||||
#endif /* BSP_USING_UART3 */
|
||||
|
||||
#if defined(BSP_UART3_RX_USING_DMA)
|
||||
#ifndef UART3_DMA_RX_CONFIG
|
||||
#define UART3_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART3_RX_DMA_INSTANCE, \
|
||||
.request = UART3_RX_DMA_REQUEST, \
|
||||
.dma_rcc = UART3_RX_DMA_RCC, \
|
||||
.dma_irq = UART3_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART3_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART3_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_UART3_TX_USING_DMA)
|
||||
#ifndef UART3_DMA_TX_CONFIG
|
||||
#define UART3_DMA_TX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART3_TX_DMA_INSTANCE, \
|
||||
.request = UART3_TX_DMA_REQUEST, \
|
||||
.dma_rcc = UART3_TX_DMA_RCC, \
|
||||
.dma_irq = UART3_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART3_DMA_TX_CONFIG */
|
||||
#endif /* BSP_UART3_TX_USING_DMA */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -135,6 +135,8 @@ extern "C" {
|
||||
#include "u5/sdio_config.h"
|
||||
#include "u5/pwm_config.h"
|
||||
#include "u5/usbd_config.h"
|
||||
#elif defined(SOC_SERIES_STM32H5)
|
||||
#include "h5/uart_config.h"
|
||||
#elif defined(SOC_SERIES_STM32MP1)
|
||||
#include "mp1/dma_config.h"
|
||||
#include "mp1/uart_config.h"
|
||||
|
||||
@@ -22,7 +22,7 @@ extern "C" {
|
||||
#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32L5)\
|
||||
|| defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) || defined(SOC_SERIES_STM32G0) \
|
||||
|| defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32WB)|| defined(SOC_SERIES_STM32F3) \
|
||||
|| defined(SOC_SERIES_STM32U5)
|
||||
|| defined(SOC_SERIES_STM32U5) || defined(SOC_SERIES_STM32H5)
|
||||
#define DMA_INSTANCE_TYPE DMA_Channel_TypeDef
|
||||
#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)\
|
||||
|| defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1)
|
||||
|
||||
@@ -17,14 +17,14 @@
|
||||
|
||||
#ifdef BSP_USING_GPIO
|
||||
|
||||
#define PIN_NUM(port, no) (((((port) & 0xFu) << 4) | ((no) & 0xFu)))
|
||||
#define PIN_NUM(port, no) (((((port)&0xFu) << 4) | ((no)&0xFu)))
|
||||
#define PIN_PORT(pin) ((uint8_t)(((pin) >> 4) & 0xFu))
|
||||
#define PIN_NO(pin) ((uint8_t)((pin) & 0xFu))
|
||||
#define PIN_NO(pin) ((uint8_t)((pin)&0xFu))
|
||||
|
||||
#if defined(SOC_SERIES_STM32MP1)
|
||||
#if defined(GPIOZ)
|
||||
#define gpioz_port_base (175) /* PIN_STPORT_MAX * 16 - 16 */
|
||||
#define PIN_STPORT(pin) ((pin > gpioz_port_base) ? ((GPIO_TypeDef *)(GPIOZ_BASE )) : ((GPIO_TypeDef *)(GPIOA_BASE + (0x1000u * PIN_PORT(pin)))))
|
||||
#define PIN_STPORT(pin) ((pin > gpioz_port_base) ? ((GPIO_TypeDef *)(GPIOZ_BASE)) : ((GPIO_TypeDef *)(GPIOA_BASE + (0x1000u * PIN_PORT(pin)))))
|
||||
#else
|
||||
#define PIN_STPORT(pin) ((GPIO_TypeDef *)(GPIOA_BASE + (0x1000u * PIN_PORT(pin))))
|
||||
#endif /* GPIOZ */
|
||||
@@ -66,96 +66,96 @@
|
||||
#define PIN_STPORT_MAX __STM32_PORT_MAX
|
||||
|
||||
static const struct pin_irq_map pin_irq_map[] =
|
||||
{
|
||||
{
|
||||
#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0)
|
||||
{GPIO_PIN_0, EXTI0_1_IRQn},
|
||||
{GPIO_PIN_1, EXTI0_1_IRQn},
|
||||
{GPIO_PIN_2, EXTI2_3_IRQn},
|
||||
{GPIO_PIN_3, EXTI2_3_IRQn},
|
||||
{GPIO_PIN_4, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_5, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_6, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_7, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_8, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_9, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_10, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_11, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_12, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_13, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_14, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_15, EXTI4_15_IRQn},
|
||||
#elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32L5) || defined(SOC_SERIES_STM32U5)
|
||||
{GPIO_PIN_0, EXTI0_IRQn},
|
||||
{GPIO_PIN_1, EXTI1_IRQn},
|
||||
{GPIO_PIN_2, EXTI2_IRQn},
|
||||
{GPIO_PIN_3, EXTI3_IRQn},
|
||||
{GPIO_PIN_4, EXTI4_IRQn},
|
||||
{GPIO_PIN_5, EXTI5_IRQn},
|
||||
{GPIO_PIN_6, EXTI6_IRQn},
|
||||
{GPIO_PIN_7, EXTI7_IRQn},
|
||||
{GPIO_PIN_8, EXTI8_IRQn},
|
||||
{GPIO_PIN_9, EXTI9_IRQn},
|
||||
{GPIO_PIN_10, EXTI10_IRQn},
|
||||
{GPIO_PIN_11, EXTI11_IRQn},
|
||||
{GPIO_PIN_12, EXTI12_IRQn},
|
||||
{GPIO_PIN_13, EXTI13_IRQn},
|
||||
{GPIO_PIN_14, EXTI14_IRQn},
|
||||
{GPIO_PIN_15, EXTI15_IRQn},
|
||||
{GPIO_PIN_0, EXTI0_1_IRQn},
|
||||
{GPIO_PIN_1, EXTI0_1_IRQn},
|
||||
{GPIO_PIN_2, EXTI2_3_IRQn},
|
||||
{GPIO_PIN_3, EXTI2_3_IRQn},
|
||||
{GPIO_PIN_4, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_5, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_6, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_7, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_8, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_9, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_10, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_11, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_12, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_13, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_14, EXTI4_15_IRQn},
|
||||
{GPIO_PIN_15, EXTI4_15_IRQn},
|
||||
#elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32L5) || defined(SOC_SERIES_STM32U5) || defined(SOC_SERIES_STM32H5)
|
||||
{GPIO_PIN_0, EXTI0_IRQn},
|
||||
{GPIO_PIN_1, EXTI1_IRQn},
|
||||
{GPIO_PIN_2, EXTI2_IRQn},
|
||||
{GPIO_PIN_3, EXTI3_IRQn},
|
||||
{GPIO_PIN_4, EXTI4_IRQn},
|
||||
{GPIO_PIN_5, EXTI5_IRQn},
|
||||
{GPIO_PIN_6, EXTI6_IRQn},
|
||||
{GPIO_PIN_7, EXTI7_IRQn},
|
||||
{GPIO_PIN_8, EXTI8_IRQn},
|
||||
{GPIO_PIN_9, EXTI9_IRQn},
|
||||
{GPIO_PIN_10, EXTI10_IRQn},
|
||||
{GPIO_PIN_11, EXTI11_IRQn},
|
||||
{GPIO_PIN_12, EXTI12_IRQn},
|
||||
{GPIO_PIN_13, EXTI13_IRQn},
|
||||
{GPIO_PIN_14, EXTI14_IRQn},
|
||||
{GPIO_PIN_15, EXTI15_IRQn},
|
||||
#elif defined(SOC_SERIES_STM32F3)
|
||||
{GPIO_PIN_0, EXTI0_IRQn},
|
||||
{GPIO_PIN_1, EXTI1_IRQn},
|
||||
{GPIO_PIN_2, EXTI2_TSC_IRQn},
|
||||
{GPIO_PIN_3, EXTI3_IRQn},
|
||||
{GPIO_PIN_4, EXTI4_IRQn},
|
||||
{GPIO_PIN_5, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_6, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_7, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_8, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_9, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_10, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_11, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_12, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_13, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_14, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_15, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_0, EXTI0_IRQn},
|
||||
{GPIO_PIN_1, EXTI1_IRQn},
|
||||
{GPIO_PIN_2, EXTI2_TSC_IRQn},
|
||||
{GPIO_PIN_3, EXTI3_IRQn},
|
||||
{GPIO_PIN_4, EXTI4_IRQn},
|
||||
{GPIO_PIN_5, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_6, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_7, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_8, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_9, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_10, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_11, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_12, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_13, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_14, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_15, EXTI15_10_IRQn},
|
||||
#else
|
||||
{GPIO_PIN_0, EXTI0_IRQn},
|
||||
{GPIO_PIN_1, EXTI1_IRQn},
|
||||
{GPIO_PIN_2, EXTI2_IRQn},
|
||||
{GPIO_PIN_3, EXTI3_IRQn},
|
||||
{GPIO_PIN_4, EXTI4_IRQn},
|
||||
{GPIO_PIN_5, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_6, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_7, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_8, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_9, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_10, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_11, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_12, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_13, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_14, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_15, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_0, EXTI0_IRQn},
|
||||
{GPIO_PIN_1, EXTI1_IRQn},
|
||||
{GPIO_PIN_2, EXTI2_IRQn},
|
||||
{GPIO_PIN_3, EXTI3_IRQn},
|
||||
{GPIO_PIN_4, EXTI4_IRQn},
|
||||
{GPIO_PIN_5, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_6, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_7, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_8, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_9, EXTI9_5_IRQn},
|
||||
{GPIO_PIN_10, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_11, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_12, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_13, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_14, EXTI15_10_IRQn},
|
||||
{GPIO_PIN_15, EXTI15_10_IRQn},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
|
||||
{
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
};
|
||||
static uint32_t pin_irq_enable_mask = 0;
|
||||
|
||||
@@ -221,7 +221,7 @@ static rt_int8_t stm32_pin_read(rt_device_t dev, rt_base_t pin)
|
||||
{
|
||||
GPIO_TypeDef *gpio_port;
|
||||
uint16_t gpio_pin;
|
||||
GPIO_PinState state;
|
||||
GPIO_PinState state = PIN_LOW;
|
||||
|
||||
if (PIN_PORT(pin) < PIN_STPORT_MAX)
|
||||
{
|
||||
@@ -306,7 +306,7 @@ rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
|
||||
};
|
||||
|
||||
static rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_base_t pin,
|
||||
rt_uint8_t mode, void (*hdr)(void *args), void *args)
|
||||
rt_uint8_t mode, void (*hdr)(void *args), void *args)
|
||||
{
|
||||
rt_base_t level;
|
||||
rt_int32_t irqindex = -1;
|
||||
@@ -377,7 +377,7 @@ static rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_base_t pin)
|
||||
}
|
||||
|
||||
static rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
|
||||
rt_uint8_t enabled)
|
||||
rt_uint8_t enabled)
|
||||
{
|
||||
const struct pin_irq_map *irqmap;
|
||||
rt_base_t level;
|
||||
@@ -503,14 +503,14 @@ static rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
|
||||
return RT_EOK;
|
||||
}
|
||||
static const struct rt_pin_ops _stm32_pin_ops =
|
||||
{
|
||||
stm32_pin_mode,
|
||||
stm32_pin_write,
|
||||
stm32_pin_read,
|
||||
stm32_pin_attach_irq,
|
||||
stm32_pin_dettach_irq,
|
||||
stm32_pin_irq_enable,
|
||||
stm32_pin_get,
|
||||
{
|
||||
stm32_pin_mode,
|
||||
stm32_pin_write,
|
||||
stm32_pin_read,
|
||||
stm32_pin_attach_irq,
|
||||
stm32_pin_dettach_irq,
|
||||
stm32_pin_irq_enable,
|
||||
stm32_pin_get,
|
||||
};
|
||||
|
||||
rt_inline void pin_irq_hdr(int irqno)
|
||||
@@ -773,9 +773,9 @@ int rt_hw_pin_init(void)
|
||||
#endif
|
||||
|
||||
#if defined(__HAL_RCC_GPIOG_CLK_ENABLE)
|
||||
#ifdef SOC_SERIES_STM32L4
|
||||
HAL_PWREx_EnableVddIO2();
|
||||
#endif
|
||||
#ifdef SOC_SERIES_STM32L4
|
||||
HAL_PWREx_EnableVddIO2();
|
||||
#endif
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
#endif
|
||||
|
||||
|
||||
@@ -317,7 +317,7 @@ static int stm32_putc(struct rt_serial_device *serial, char c)
|
||||
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
|
||||
|| defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32L5) \
|
||||
|| defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32F3) \
|
||||
|| defined(SOC_SERIES_STM32U5)
|
||||
|| defined(SOC_SERIES_STM32U5) || defined(SOC_SERIES_STM32H5)
|
||||
uart->handle.Instance->TDR = c;
|
||||
#else
|
||||
uart->handle.Instance->DR = c;
|
||||
@@ -339,7 +339,7 @@ static int stm32_getc(struct rt_serial_device *serial)
|
||||
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
|
||||
|| defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32L5) \
|
||||
|| defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB)|| defined(SOC_SERIES_STM32F3) \
|
||||
|| defined(SOC_SERIES_STM32U5)
|
||||
|| defined(SOC_SERIES_STM32U5) || defined(SOC_SERIES_STM32H5)
|
||||
ch = uart->handle.Instance->RDR & uart->DR_mask;
|
||||
#else
|
||||
ch = uart->handle.Instance->DR & uart->DR_mask;
|
||||
@@ -477,7 +477,7 @@ static void uart_isr(struct rt_serial_device *serial)
|
||||
#if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32WL) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
|
||||
&& !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7) \
|
||||
&& !defined(SOC_SERIES_STM32G4) && !defined(SOC_SERIES_STM32MP1) && !defined(SOC_SERIES_STM32WB) \
|
||||
&& !defined(SOC_SERIES_STM32L5) && !defined(SOC_SERIES_STM32U5)
|
||||
&& !defined(SOC_SERIES_STM32L5) && !defined(SOC_SERIES_STM32U5) && !defined(SOC_SERIES_STM32H5)
|
||||
#ifdef SOC_SERIES_STM32F3
|
||||
if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBDF) != RESET)
|
||||
{
|
||||
@@ -1003,7 +1003,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
|
||||
__HAL_LINKDMA(&(uart->handle), hdmatx, uart->dma_tx.handle);
|
||||
}
|
||||
|
||||
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)|| defined(SOC_SERIES_STM32F3) || defined(SOC_SERIES_STM32L1) || defined(SOC_SERIES_STM32U5)
|
||||
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)|| defined(SOC_SERIES_STM32F3) || defined(SOC_SERIES_STM32L1) || defined(SOC_SERIES_STM32U5) || defined(SOC_SERIES_STM32H5)
|
||||
DMA_Handle->Instance = dma_config->Instance;
|
||||
#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
|
||||
DMA_Handle->Instance = dma_config->Instance;
|
||||
|
||||
@@ -31,7 +31,8 @@ int rt_hw_usart_init(void);
|
||||
|
||||
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32L5) || defined(SOC_SERIES_STM32WL) \
|
||||
|| defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) \
|
||||
|| defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32WB)|| defined(SOC_SERIES_STM32F3) || defined(SOC_SERIES_STM32U5)
|
||||
|| defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32WB)|| defined(SOC_SERIES_STM32F3) || defined(SOC_SERIES_STM32U5) \
|
||||
|| defined(SOC_SERIES_STM32H5)
|
||||
#define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_FLAG
|
||||
#elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) \
|
||||
|| defined(SOC_SERIES_STM32MP1)
|
||||
|
||||
@@ -71,6 +71,11 @@ config SOC_SERIES_STM32U5
|
||||
select ARCH_ARM_CORTEX_M33
|
||||
select SOC_FAMILY_STM32
|
||||
|
||||
config SOC_SERIES_STM32H5
|
||||
bool
|
||||
select ARCH_ARM_CORTEX_M33
|
||||
select SOC_FAMILY_STM32
|
||||
|
||||
config SOC_SERIES_STM32MP1
|
||||
bool
|
||||
select ARCH_ARM_CORTEX_M4
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,68 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file partition_stm32h5xx.h
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS STM32H5xx Device Header File for Initial Setup for Secure /
|
||||
* Non-Secure Zones for ARMCM33 based on CMSIS CORE partition_ARMCM33.h
|
||||
* Template.
|
||||
*
|
||||
* The file is included in system_stm32h5xx_s.c in secure application.
|
||||
* It includes the configuration section that allows to select the
|
||||
* STM32H5xx device partitioning file for system core secure attributes
|
||||
* and interrupt secure and non-secure assignment.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32h5xx
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef PARTITION_STM32H5XX_H
|
||||
#define PARTITION_STM32H5XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** @addtogroup Secure_configuration_section
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(STM32H573xx)
|
||||
#include "partition_stm32h573xx.h"
|
||||
#elif defined(STM32H563xx)
|
||||
#include "partition_stm32h563xx.h"
|
||||
#elif defined(STM32H562xx)
|
||||
#include "partition_stm32h562xx.h"
|
||||
#else
|
||||
#error "Please select first the target STM32H5xx device used in your application (in stm32h5xx.h file)"
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* PARTITION_STM32H5XX_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,238 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h5xx.h
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS STM32H5xx Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
* is using in the C source code, usually in main.c. This file contains:
|
||||
* - Configuration section that allows to select:
|
||||
* - The STM32H5xx device used in the target application
|
||||
* - To use or not the peripheral’s drivers in application code(i.e.
|
||||
* code will be based on direct access to peripheral’s registers
|
||||
* rather than drivers API), this option is controlled by
|
||||
* "#define USE_HAL_DRIVER"
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32h5xx
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef STM32H5xx_H
|
||||
#define STM32H5xx_H
|
||||
#include "math.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** @addtogroup Library_configuration_section
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief STM32 Family
|
||||
*/
|
||||
#if !defined (STM32H5)
|
||||
#define STM32H5
|
||||
#endif /* STM32H5 */
|
||||
|
||||
/* Uncomment the line below according to the target STM32H5 device used in your
|
||||
application
|
||||
*/
|
||||
|
||||
#if !defined (STM32H573xx) && !defined (STM32H563xx) \
|
||||
&& !defined (STM32H562xx) && !defined (STM32H503xx)
|
||||
/* #define STM32H573xx */ /*!< STM32H5753xx Devices */
|
||||
/* #define STM32H563xx */ /*!< STM32H563xx Devices */
|
||||
/* #define STM32H562xx */ /*!< STM32H562xx Devices */
|
||||
/* #define STM32H503xx */ /*!< STM32H503xx Devices */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
devices, you can define the device in your toolchain compiler preprocessor.
|
||||
*/
|
||||
#if !defined (USE_HAL_DRIVER)
|
||||
/**
|
||||
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||
In this case, these drivers will not be included and the application code will
|
||||
be based on direct access to peripherals registers
|
||||
*/
|
||||
/*#define USE_HAL_DRIVER */
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number 1.1.0
|
||||
*/
|
||||
#define __STM32H5_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32H5_CMSIS_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
|
||||
#define __STM32H5_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32H5_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32H5_CMSIS_VERSION ((__STM32H5_CMSIS_VERSION_MAIN << 24U)\
|
||||
|(__STM32H5_CMSIS_VERSION_SUB1 << 16U)\
|
||||
|(__STM32H5_CMSIS_VERSION_SUB2 << 8U )\
|
||||
|(__STM32H5_CMSIS_VERSION_RC))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(STM32H573xx)
|
||||
#include "stm32h573xx.h"
|
||||
#elif defined(STM32H563xx)
|
||||
#include "stm32h563xx.h"
|
||||
#elif defined(STM32H562xx)
|
||||
#include "stm32h562xx.h"
|
||||
#elif defined(STM32H503xx)
|
||||
#include "stm32h503xx.h"
|
||||
#else
|
||||
#error "Please select first the target STM32H5xx device used in your application (in stm32h5xx.h file)"
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Exported_types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
RESET = 0,
|
||||
SET = !RESET
|
||||
} FlagStatus, ITStatus;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DISABLE = 0,
|
||||
ENABLE = !DISABLE
|
||||
} FunctionalState;
|
||||
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SUCCESS = 0,
|
||||
ERROR = !SUCCESS
|
||||
} ErrorStatus;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup Exported_macros
|
||||
* @{
|
||||
*/
|
||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||
|
||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||
|
||||
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||
|
||||
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||
|
||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||
|
||||
#define READ_REG(REG) ((REG))
|
||||
|
||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||
|
||||
/* Use of CMSIS compiler intrinsics for register exclusive access */
|
||||
/* Atomic 32-bit register access macro to set one or several bits */
|
||||
#define ATOMIC_SET_BIT(REG, BIT) \
|
||||
do { \
|
||||
uint32_t val; \
|
||||
do { \
|
||||
val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
|
||||
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
|
||||
} while(0)
|
||||
|
||||
/* Atomic 32-bit register access macro to clear one or several bits */
|
||||
#define ATOMIC_CLEAR_BIT(REG, BIT) \
|
||||
do { \
|
||||
uint32_t val; \
|
||||
do { \
|
||||
val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
|
||||
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
|
||||
} while(0)
|
||||
|
||||
/* Atomic 32-bit register access macro to clear and set one or several bits */
|
||||
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
|
||||
do { \
|
||||
uint32_t val; \
|
||||
do { \
|
||||
val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
|
||||
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
|
||||
} while(0)
|
||||
|
||||
/* Atomic 16-bit register access macro to set one or several bits */
|
||||
#define ATOMIC_SETH_BIT(REG, BIT) \
|
||||
do { \
|
||||
uint16_t val; \
|
||||
do { \
|
||||
val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
|
||||
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
|
||||
} while(0)
|
||||
|
||||
/* Atomic 16-bit register access macro to clear one or several bits */
|
||||
#define ATOMIC_CLEARH_BIT(REG, BIT) \
|
||||
do { \
|
||||
uint16_t val; \
|
||||
do { \
|
||||
val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
|
||||
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
|
||||
} while(0)
|
||||
|
||||
/* Atomic 16-bit register access macro to clear and set one or several bits */
|
||||
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
|
||||
do { \
|
||||
uint16_t val; \
|
||||
do { \
|
||||
val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
|
||||
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
|
||||
} while(0)
|
||||
|
||||
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined (USE_HAL_DRIVER)
|
||||
#include "stm32h5xx_hal.h"
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* STM32H5xx_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,107 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32h5xx.h
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M33 Device System Source File for STM32H5xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32h5xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef SYSTEM_STM32H5XX_H
|
||||
#define SYSTEM_STM32H5XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32H5xx_System_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H5xx_System_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
/* The SystemCoreClock variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
|
||||
extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32H5xx_System_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system.
|
||||
*
|
||||
* Initialize the System and update the SystemCoreClock variable.
|
||||
*/
|
||||
extern void SystemInit (void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable.
|
||||
*
|
||||
* Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
|
||||
*/
|
||||
extern void SystemCoreClockUpdate (void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable from secure application and return its value
|
||||
* when security is implemented in the system (Non-secure callable function).
|
||||
*
|
||||
* Returns the SystemCoreClock value with current core Clock retrieved from cpu registers.
|
||||
*/
|
||||
extern uint32_t SECURE_SystemCoreClockUpdate(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SYSTEM_STM32H5XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,6 @@
|
||||
This software component is provided to you as part of a software package and
|
||||
applicable license terms are in the Package_license file. If you received this
|
||||
software component outside of a package or without applicable license terms,
|
||||
the terms of the Apache-2.0 license shall apply.
|
||||
You may obtain a copy of the Apache-2.0 at:
|
||||
https://opensource.org/licenses/Apache-2.0
|
||||
@@ -0,0 +1,479 @@
|
||||
;*******************************************************************************
|
||||
;* File Name : startup_stm32h503xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32H503xx Non Crypto devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M33 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;*******************************************************************************
|
||||
;* @attention
|
||||
;*
|
||||
;* Copyright (c) 2023 STMicroelectronics.
|
||||
;* All rights reserved.
|
||||
;*
|
||||
;* This software is licensed under terms that can be found in the LICENSE file
|
||||
;* in the root directory of this software component.
|
||||
;* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection Interrupt
|
||||
DCD RTC_IRQHandler ; RTC non-secure interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD TAMP_IRQHandler ; Tamper non-secure interrupt
|
||||
DCD RAMCFG_IRQHandler ; RAMCFG global
|
||||
DCD FLASH_IRQHandler ; FLASH non-secure global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD GTZC_IRQHandler ; Global TrustZone Controller interrupt
|
||||
DCD RCC_IRQHandler ; RCC non-secure global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0 interrupt
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1 interrupt
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2 interrupt
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3 interrupt
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4 interrupt
|
||||
DCD EXTI5_IRQHandler ; EXTI Line5 interrupt
|
||||
DCD EXTI6_IRQHandler ; EXTI Line6 interrupt
|
||||
DCD EXTI7_IRQHandler ; EXTI Line7 interrupt
|
||||
DCD EXTI8_IRQHandler ; EXTI Line8 interrupt
|
||||
DCD EXTI9_IRQHandler ; EXTI Line9 interrupt
|
||||
DCD EXTI10_IRQHandler ; EXTI Line10 interrupt
|
||||
DCD EXTI11_IRQHandler ; EXTI Line11 interrupt
|
||||
DCD EXTI12_IRQHandler ; EXTI Line12 interrupt
|
||||
DCD EXTI13_IRQHandler ; EXTI Line13 interrupt
|
||||
DCD EXTI14_IRQHandler ; EXTI Line14 interrupt
|
||||
DCD EXTI15_IRQHandler ; EXTI Line15 interrupt
|
||||
DCD GPDMA1_Channel0_IRQHandler ; GPDMA1 Channel 0 global interrupt
|
||||
DCD GPDMA1_Channel1_IRQHandler ; GPDMA1 Channel 1 global interrupt
|
||||
DCD GPDMA1_Channel2_IRQHandler ; GPDMA1 Channel 2 global interrupt
|
||||
DCD GPDMA1_Channel3_IRQHandler ; GPDMA1 Channel 3 global interrupt
|
||||
DCD GPDMA1_Channel4_IRQHandler ; GPDMA1 Channel 4 global interrupt
|
||||
DCD GPDMA1_Channel5_IRQHandler ; GPDMA1 Channel 5 global interrupt
|
||||
DCD GPDMA1_Channel6_IRQHandler ; GPDMA1 Channel 6 global interrupt
|
||||
DCD GPDMA1_Channel7_IRQHandler ; GPDMA1 Channel 7 global interrupt
|
||||
DCD IWDG_IRQHandler ; IWDG global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD ADC1_IRQHandler ; ADC1 global interrupt
|
||||
DCD DAC1_IRQHandler ; DAC1 global interrupt
|
||||
DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt 0
|
||||
DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt 1
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update interrupt
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation interrupt
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare interrupt
|
||||
DCD TIM2_IRQHandler ; TIM2 global interrupt
|
||||
DCD TIM3_IRQHandler ; TIM3 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_IRQHandler ; TIM6 global interrupt
|
||||
DCD TIM7_IRQHandler ; TIM7 global interrupt
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event interrupt
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error interrupt
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event interrupt
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error interrupt
|
||||
DCD SPI1_IRQHandler ; SPI1 global interrupt
|
||||
DCD SPI2_IRQHandler ; SPI2 global interrupt
|
||||
DCD SPI3_IRQHandler ; SPI3 global interrupt
|
||||
DCD USART1_IRQHandler ; USART1 global interrupt
|
||||
DCD USART2_IRQHandler ; USART2 global interrupt
|
||||
DCD USART3_IRQHandler ; USART3 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD LPUART1_IRQHandler ; LPUART1 global interrupt
|
||||
DCD LPTIM1_IRQHandler ; LPTIM1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD LPTIM2_IRQHandler ; LPTIM2 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD USB_DRD_FS_IRQHandler ; USB DRD FS global interrupt
|
||||
DCD CRS_IRQHandler ; CRS global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD GPDMA2_Channel0_IRQHandler ; GPDMA2 Channel 0 global interrupt
|
||||
DCD GPDMA2_Channel1_IRQHandler ; GPDMA2 Channel 1 global interrupt
|
||||
DCD GPDMA2_Channel2_IRQHandler ; GPDMA2 Channel 2 global interrupt
|
||||
DCD GPDMA2_Channel3_IRQHandler ; GPDMA2 Channel 3 global interrupt
|
||||
DCD GPDMA2_Channel4_IRQHandler ; GPDMA2 Channel 4 global interrupt
|
||||
DCD GPDMA2_Channel5_IRQHandler ; GPDMA2 Channel 5 global interrupt
|
||||
DCD GPDMA2_Channel6_IRQHandler ; GPDMA2 Channel 6 global interrupt
|
||||
DCD GPDMA2_Channel7_IRQHandler ; GPDMA2 Channel 7 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD FPU_IRQHandler ; FPU global interrupt
|
||||
DCD ICACHE_IRQHandler ; Instruction cache global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD DTS_IRQHandler ; DTS global interrupt
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD HASH_IRQHandler ; HASH global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I3C1_EV_IRQHandler ; I3C1 Event interrupt
|
||||
DCD I3C1_ER_IRQHandler ; I3C1 Error interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I3C2_EV_IRQHandler ; I3C2 Event interrupt
|
||||
DCD I3C2_ER_IRQHandler ; I3C2 Error interrupt
|
||||
DCD COMP1_IRQHandler ; COMP1 global interrupt
|
||||
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler\
|
||||
PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SecureFault_Handler\
|
||||
PROC
|
||||
EXPORT SecureFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler\
|
||||
PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler\
|
||||
PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler\
|
||||
PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_AVD_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT TAMP_IRQHandler [WEAK]
|
||||
EXPORT RAMCFG_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT GTZC_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT EXTI5_IRQHandler [WEAK]
|
||||
EXPORT EXTI6_IRQHandler [WEAK]
|
||||
EXPORT EXTI7_IRQHandler [WEAK]
|
||||
EXPORT EXTI8_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_IRQHandler [WEAK]
|
||||
EXPORT EXTI10_IRQHandler [WEAK]
|
||||
EXPORT EXTI11_IRQHandler [WEAK]
|
||||
EXPORT EXTI12_IRQHandler [WEAK]
|
||||
EXPORT EXTI13_IRQHandler [WEAK]
|
||||
EXPORT EXTI14_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_IRQHandler [WEAK]
|
||||
EXPORT GPDMA1_Channel0_IRQHandler [WEAK]
|
||||
EXPORT GPDMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT GPDMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT GPDMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT GPDMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT GPDMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT GPDMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT GPDMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT IWDG_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT DAC1_IRQHandler [WEAK]
|
||||
EXPORT FDCAN1_IT0_IRQHandler [WEAK]
|
||||
EXPORT FDCAN1_IT1_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT USB_DRD_FS_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
EXPORT GPDMA2_Channel0_IRQHandler [WEAK]
|
||||
EXPORT GPDMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT GPDMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT GPDMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT GPDMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT GPDMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT GPDMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT GPDMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT COMP1_IRQHandler [WEAK]
|
||||
EXPORT I3C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I3C2_ER_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT ICACHE_IRQHandler [WEAK]
|
||||
EXPORT DTS_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT HASH_IRQHandler [WEAK]
|
||||
EXPORT I3C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I3C1_ER_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_AVD_IRQHandler
|
||||
RTC_IRQHandler
|
||||
TAMP_IRQHandler
|
||||
RAMCFG_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
GTZC_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
EXTI5_IRQHandler
|
||||
EXTI6_IRQHandler
|
||||
EXTI7_IRQHandler
|
||||
EXTI8_IRQHandler
|
||||
EXTI9_IRQHandler
|
||||
EXTI10_IRQHandler
|
||||
EXTI11_IRQHandler
|
||||
EXTI12_IRQHandler
|
||||
EXTI13_IRQHandler
|
||||
EXTI14_IRQHandler
|
||||
EXTI15_IRQHandler
|
||||
GPDMA1_Channel0_IRQHandler
|
||||
GPDMA1_Channel1_IRQHandler
|
||||
GPDMA1_Channel2_IRQHandler
|
||||
GPDMA1_Channel3_IRQHandler
|
||||
GPDMA1_Channel4_IRQHandler
|
||||
GPDMA1_Channel5_IRQHandler
|
||||
GPDMA1_Channel6_IRQHandler
|
||||
GPDMA1_Channel7_IRQHandler
|
||||
IWDG_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
DAC1_IRQHandler
|
||||
FDCAN1_IT0_IRQHandler
|
||||
FDCAN1_IT1_IRQHandler
|
||||
TIM1_BRK_IRQHandler
|
||||
TIM1_UP_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM6_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
USB_DRD_FS_IRQHandler
|
||||
CRS_IRQHandler
|
||||
GPDMA2_Channel0_IRQHandler
|
||||
GPDMA2_Channel1_IRQHandler
|
||||
GPDMA2_Channel2_IRQHandler
|
||||
GPDMA2_Channel3_IRQHandler
|
||||
GPDMA2_Channel4_IRQHandler
|
||||
GPDMA2_Channel5_IRQHandler
|
||||
GPDMA2_Channel6_IRQHandler
|
||||
GPDMA2_Channel7_IRQHandler
|
||||
COMP1_IRQHandler
|
||||
I3C2_EV_IRQHandler
|
||||
I3C2_ER_IRQHandler
|
||||
FPU_IRQHandler
|
||||
ICACHE_IRQHandler
|
||||
DTS_IRQHandler
|
||||
RNG_IRQHandler
|
||||
HASH_IRQHandler
|
||||
I3C1_EV_IRQHandler
|
||||
I3C1_ER_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap PROC
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x20003FFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20004000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,32 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08100000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08100000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20050000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,41 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x0C000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x0C000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0C0FDFFF;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_start__ = 0x0C0FE000;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_end__ = 0x0C0FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x3004FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_ROM_NS_start__ = 0x08100000;
|
||||
define symbol __region_ROM_NS_end__ = 0x081FFFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region ROM_NSC_region = mem:[from __ICFEDIT_region_ROM_NSC_start__ to __ICFEDIT_region_ROM_NSC_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define exported symbol __VTOR_TABLE_start = __ICFEDIT_intvec_start__;
|
||||
define exported symbol __VTOR_TABLE_NS_start = __region_ROM_NS_start__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in ROM_NSC_region { section Veneer$$CMSE };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2004FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20050000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20060000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x20050000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2007FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20080000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,40 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x30000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x30037FFF;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_start__ = 0x30038000;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_end__ = 0x3003FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x30040000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x3004FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_RAM_NS_start__ = 0x20050000;
|
||||
define symbol __region_RAM_NS_end__ = 0x2009FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region ROM_NSC_region = mem:[from __ICFEDIT_region_ROM_NSC_start__ to __ICFEDIT_region_ROM_NSC_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define exported symbol __VTOR_TABLE_start = __ICFEDIT_intvec_start__;
|
||||
define exported symbol __VTOR_TABLE_NS_start = __region_RAM_NS_start__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in ROM_NSC_region { section Veneer$$CMSE };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,32 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08100000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08100000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20050000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,41 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x0C000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x0C000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0C0FDFFF;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_start__ = 0x0C0FE000;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_end__ = 0x0C0FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x3004FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_ROM_NS_start__ = 0x08100000;
|
||||
define symbol __region_ROM_NS_end__ = 0x081FFFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region ROM_NSC_region = mem:[from __ICFEDIT_region_ROM_NSC_start__ to __ICFEDIT_region_ROM_NSC_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define exported symbol __VTOR_TABLE_start = __ICFEDIT_intvec_start__;
|
||||
define exported symbol __VTOR_TABLE_NS_start = __region_ROM_NS_start__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in ROM_NSC_region { section Veneer$$CMSE };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2004FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20050000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20060000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x20050000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2007FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20080000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,40 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x30000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x30037FFF;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_start__ = 0x30038000;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_end__ = 0x3003FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x30040000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x3004FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_RAM_NS_start__ = 0x20050000;
|
||||
define symbol __region_RAM_NS_end__ = 0x2009FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region ROM_NSC_region = mem:[from __ICFEDIT_region_ROM_NSC_start__ to __ICFEDIT_region_ROM_NSC_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define exported symbol __VTOR_TABLE_start = __ICFEDIT_intvec_start__;
|
||||
define exported symbol __VTOR_TABLE_NS_start = __region_RAM_NS_start__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in ROM_NSC_region { section Veneer$$CMSE };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,32 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08100000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08100000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20050000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,41 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x0C000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x0C000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0C0FDFFF;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_start__ = 0x0C0FE000;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_end__ = 0x0C0FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x3004FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_ROM_NS_start__ = 0x08100000;
|
||||
define symbol __region_ROM_NS_end__ = 0x081FFFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region ROM_NSC_region = mem:[from __ICFEDIT_region_ROM_NSC_start__ to __ICFEDIT_region_ROM_NSC_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define exported symbol __VTOR_TABLE_start = __ICFEDIT_intvec_start__;
|
||||
define exported symbol __VTOR_TABLE_NS_start = __region_ROM_NS_start__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in ROM_NSC_region { section Veneer$$CMSE };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2004FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20050000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20060000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x20050000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2007FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20080000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
@@ -0,0 +1,40 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x30000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x30037FFF;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_start__ = 0x30038000;
|
||||
define symbol __ICFEDIT_region_ROM_NSC_end__ = 0x3003FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x30040000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x3004FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_RAM_NS_start__ = 0x20050000;
|
||||
define symbol __region_RAM_NS_end__ = 0x2009FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region ROM_NSC_region = mem:[from __ICFEDIT_region_ROM_NSC_start__ to __ICFEDIT_region_ROM_NSC_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define exported symbol __VTOR_TABLE_start = __ICFEDIT_intvec_start__;
|
||||
define exported symbol __VTOR_TABLE_NS_start = __region_RAM_NS_start__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in ROM_NSC_region { section Veneer$$CMSE };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user