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[bsp][phytium] support Phytium PI

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This commit is contained in:
zhugengyu
2023-08-29 10:27:54 +08:00
committed by GitHub
parent 810da67b6f
commit 6db430bde6
33 changed files with 8190 additions and 159 deletions
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bsp/phytium/README.md
+16 -7
View File
@@ -19,9 +19,7 @@
- 飞腾芯片产品具有谱系全、性能高、生态完善、自主化程度高等特点，目前主要包括高性能服务器CPU（飞腾腾云S系列）、高效能桌面CPU（飞腾腾锐D系列）、高端嵌入式CPU（飞腾腾珑E系列）和飞腾套片四大系列，为从端到云的各型设备提供核心算力支撑。
- 本BSP目前支持飞腾腾锐D系列、飞腾腾珑E系列 相关CPU,基于 Phytium-Standalone-SDK 进行开发。开发者能够使用
- 本BSP目前支持飞腾派、飞腾腾锐D系列、飞腾腾珑E系列 相关CPU, 基于 Phytium-Standalone-SDK 进行开发。开发者能够使用
- 本BSP 支持Phytium系列CPU 工作在 aarch32/aarch64 两种执行状态 ，开发者能够根据自己的应用场景灵活选择CPU 工作状态。
@@ -31,10 +29,14 @@
| **片上外设** | **支持情况** | **备注** |
| :----------------- | :----------: | :------------------------------------- |
| UART | 支持 | uart1 打印输出|
| UART | 支持 | UART1 打印输出 |
| GPIO | 支持 | GPIO 引脚电平输入输出，中断 |
| XMAC | 支持 | XMAC 网卡初始化和运行 |
| SDMMC | 支持 | SD0/SD1 读写 SD 卡或 eMMC 颗粒 |
| **芯片** | **支持情况** | **备注** |
| :----------------- | :----------: | :------------------------------------- |
| Phytium PI | 支持 | 支持SMP |
| E2000D | 支持 | 支持SMP |
| E2000Q | 支持 | 支持SMP |
| E2000S | 支持 | |
@@ -144,7 +146,14 @@ tftp> q
![输入图片说明](./figures/config_tftp32.png)
#### 利用uboot 上tftp 服务加载镜像
#### 格式化 SD 卡
- RT-Smart 依赖 SD 卡挂载为 / 目录，要保证插入的卡格式为 FAT32，否则会提示初始化失败的信息
- Phytium PI 固件可能在 SD 卡中，这种情况下需要将 SD 卡分成两个区，第一个分区格式为 RAW 放置固件，第二个分区格式为 FAT32 作为 RT-Thread/RT-Smart 的根目录使用，在编译镜像时，需要调整 CONFIG_SDCARD_OFFSET 配置，避免读写操作影响固件
#### 利用 uboot 上tftp 服务加载镜像
- 进入`u-boot`界面，输入如下指令，配置开发板ip，`host`侧ip和网关地址
```
@@ -156,8 +165,8 @@ tftp> q
- 随后烧录的文件到开发板，输入以下指令
```
tftpboot 0x90100000 rtthread.elf
bootelf -p 0x90100000
tftpboot 0x80080000 rtthread.bin
go 0x80080000
```
### 运行结果
bsp/phytium/aarch32/.config
+41 -55
View File
@@ -10,7 +10,8 @@ CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
CONFIG_RT_USING_SMART=y
# CONFIG_RT_USING_AMP is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_USING_SMP=y
CONFIG_RT_CPUS_NR=4
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
@@ -23,6 +24,7 @@ CONFIG_RT_HOOK_USING_FUNC_PTR=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=4096
CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096
@@ -197,7 +199,7 @@ CONFIG_RT_USING_TTY=y
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_PIN is not set
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
CONFIG_RT_USING_NULL=y
@@ -212,19 +214,13 @@ CONFIG_RT_USING_RTC=y
# CONFIG_RT_USING_ALARM is not set
# CONFIG_RT_USING_SOFT_RTC is not set
CONFIG_RT_USING_SDIO=y
CONFIG_RT_SDIO_STACK_SIZE=4096
CONFIG_RT_SDIO_STACK_SIZE=512
CONFIG_RT_SDIO_THREAD_PRIORITY=15
CONFIG_RT_MMCSD_STACK_SIZE=4096
CONFIG_RT_MMCSD_STACK_SIZE=1024
CONFIG_RT_MMCSD_THREAD_PREORITY=22
CONFIG_RT_MMCSD_MAX_PARTITION=16
# CONFIG_RT_SDIO_DEBUG is not set
CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_SPI_BITOPS is not set
CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_SPI_MSD is not set
# CONFIG_RT_USING_SFUD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
@@ -247,7 +243,19 @@ CONFIG_RT_USING_DEV_BUS=y
#
# C/C++ and POSIX layer
#
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# ISO-ANSI C layer
#
#
# Timezone and Daylight Saving Time
#
# CONFIG_RT_LIBC_USING_FULL_TZ_DST is not set
CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y
CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8
CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0
CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# POSIX (Portable Operating System Interface) layer
@@ -407,6 +415,7 @@ CONFIG_RT_USING_KTIME=y
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
@@ -531,6 +540,7 @@ CONFIG_RT_USING_KTIME=y
# LVGL: powerful and easy-to-use embedded GUI library
#
# CONFIG_PKG_USING_LVGL is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
@@ -677,7 +687,6 @@ CONFIG_RT_USING_KTIME=y
# CONFIG_PKG_USING_QPC is not set
# CONFIG_PKG_USING_AGILE_UPGRADE is not set
# CONFIG_PKG_USING_FLASH_BLOB is not set
# CONFIG_PKG_USING_MLIBC is not set
#
# peripheral libraries and drivers
@@ -742,7 +751,6 @@ CONFIG_RT_USING_KTIME=y
# CONFIG_PKG_USING_BALANCE is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_SHT4X is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_ADT74XX is not set
# CONFIG_PKG_USING_MAX17048 is not set
@@ -763,7 +771,6 @@ CONFIG_RT_USING_KTIME=y
# CONFIG_PKG_USING_FT5426 is not set
# CONFIG_PKG_USING_FT6236 is not set
# CONFIG_PKG_USING_XPT2046_TOUCH is not set
# CONFIG_PKG_USING_CST816X is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ESP_IDF is not set
@@ -839,12 +846,7 @@ CONFIG_RT_USING_KTIME=y
# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
# CONFIG_PKG_USING_LRF_NV7LIDAR is not set
# CONFIG_PKG_USING_AIP650 is not set
# CONFIG_PKG_USING_FINGERPRINT is not set
# CONFIG_PKG_USING_BT_ECB02C is not set
# CONFIG_PKG_USING_UAT is not set
# CONFIG_PKG_USING_ST7789 is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
#
# AI packages
@@ -863,10 +865,7 @@ CONFIG_RT_USING_KTIME=y
# Signal Processing and Control Algorithm Packages
#
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_KISSFFT is not set
#
# miscellaneous packages
@@ -913,6 +912,7 @@ CONFIG_RT_USING_KTIME=y
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
@@ -937,9 +937,8 @@ CONFIG_RT_USING_KTIME=y
# CONFIG_PKG_USING_RTDUINO is not set
#
# Projects and Demos
# Projects
#
# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
@@ -1086,21 +1085,14 @@ CONFIG_RT_USING_KTIME=y
#
# Display
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
# CONFIG_PKG_USING_ARDUINO_U8GLIB_ARDUINO is not set
# CONFIG_PKG_USING_SEEED_TM1637 is not set
#
# Timing
#
# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set
# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
# CONFIG_PKG_USING_ARDUINO_TICKER is not set
# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
#
# Data Processing
@@ -1134,6 +1126,7 @@ CONFIG_RT_USING_KTIME=y
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set
# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set
#
# Signal IO
@@ -1161,18 +1154,17 @@ CONFIG_RT_USING_KTIME=y
CONFIG_BSP_USING_UART=y
CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART0 is not set
CONFIG_BSP_USING_SPI=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
CONFIG_RT_USING_SPIM2=y
# CONFIG_RT_USING_SPIM3 is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_CAN is not set
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_QSPI=y
CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set
# CONFIG_BSP_USING_ETH is not set
# CONFIG_BSP_USING_SDIO is not set
# CONFIG_BSP_USING_GPIO is not set
# CONFIG_BSP_USING_QSPI is not set
CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_SDIO=y
CONFIG_BSP_USING_SDCARD_FATFS=y
CONFIG_USING_SDIO0=y
# CONFIG_USING_SDIO1 is not set
# CONFIG_USING_EMMC is not set
#
# Board extended module Drivers
@@ -1191,8 +1183,9 @@ CONFIG_USE_AARCH64_L1_TO_AARCH32=y
# CONFIG_TARGET_F2000_4 is not set
# CONFIG_TARGET_D2000 is not set
# CONFIG_TARGET_E2000Q is not set
CONFIG_TARGET_E2000D=y
# CONFIG_TARGET_E2000D is not set
# CONFIG_TARGET_E2000S is not set
CONFIG_TARGET_PHYTIUMPI=y
CONFIG_TARGET_E2000=y
CONFIG_DEFAULT_DEBUG_PRINT_UART1=y
# CONFIG_DEFAULT_DEBUG_PRINT_UART0 is not set
@@ -1201,14 +1194,8 @@ CONFIG_DEFAULT_DEBUG_PRINT_UART1=y
#
# Components Configuration
#
CONFIG_USE_SPI=y
CONFIG_USE_FSPIM=y
CONFIG_USE_QSPI=y
#
# Qspi Configuration
#
CONFIG_USE_FQSPI=y
# CONFIG_USE_SPI is not set
# CONFIG_USE_QSPI is not set
CONFIG_USE_GIC=y
CONFIG_ENABLE_GICV3=y
CONFIG_USE_IOPAD=y
@@ -1219,8 +1206,7 @@ CONFIG_USE_SERIAL=y
# Usart Configuration
#
CONFIG_ENABLE_Pl011_UART=y
CONFIG_USE_GPIO=y
CONFIG_ENABLE_FGPIO=y
# CONFIG_USE_GPIO is not set
CONFIG_USE_ETH=y
#
bsp/phytium/aarch32/applications/mnt.c
+1 -9
View File
@@ -36,16 +36,8 @@ static int filesystem_mount(void)
}
else
{
LOG_W("[sd] File System on SD initialization failed!");
LOG_W("[sd] Try to format and re-mount...");
if (dfs_mkfs("elm", SD_DEIVCE_NAME) == 0)
{
if (dfs_mount(SD_DEIVCE_NAME, "/", "elm", 0, 0) == 0)
{
LOG_I("[sd] File System on SD initialized!");
}
}
LOG_E("[sd] File System on SD initialization failed!");
LOG_E("[sd] Please format SD Card as FAT32!!!...");
return -1;
}
bsp/phytium/aarch32/configs/phytium_pi_rtsmart
+1251
View File
File diff suppressed because it is too large Load Diff
bsp/phytium/aarch32/configs/phytium_pi_rtsmart.h
+428
View File
@@ -0,0 +1,428 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Project Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 16
#define RT_USING_SMART
#define RT_USING_SMP
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 4096
#define SYSTEM_THREAD_STACK_SIZE 4096
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 4096
/* kservice optimization */
#define RT_KSERVICE_USING_STDLIB
#define RT_KPRINTF_USING_LONGLONG
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
#define RT_USING_MESSAGEQUEUE_PRIORITY
/* Memory Management */
#define RT_PAGE_MAX_ORDER 11
#define RT_USING_SLAB
#define RT_USING_MEMHEAP
#define RT_MEMHEAP_FAST_MODE
#define RT_USING_SLAB_AS_HEAP
#define RT_USING_HEAP_ISR
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50001
#define RT_USING_CACHE
#define RT_USING_HW_ATOMIC
#define RT_USING_CPU_FFS
#define ARCH_MM_MMU
#define ARCH_ARM
#define ARCH_ARM_MMU
#define KERNEL_VADDR_START 0xc0000000
#define ARCH_ARM_CORTEX_A
#define RT_USING_GIC_V3
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 8192
#define RT_MAIN_THREAD_PRIORITY 10
#define RT_USING_MSH
#define RT_USING_FINSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* DFS: device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FD_MAX 16
#define RT_USING_DFS_V1
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
#define RT_USING_DFS_RAMFS
#define RT_USING_DFS_MQUEUE
#define RT_USING_LWP
#define RT_LWP_MAX_NR 30
#define LWP_TASK_STACK_SIZE 16384
#define RT_CH_MSG_MAX_NR 1024
#define LWP_CONSOLE_INPUT_BUFFER_SIZE 1024
#define LWP_TID_MAX_NR 64
#define LWP_ENABLE_ASID
#define RT_LWP_SHM_MAX_NR 64
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 4096
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 1024
#define RT_USING_TTY
#define RT_USING_NULL
#define RT_USING_ZERO
#define RT_USING_RANDOM
#define RT_USING_RTC
#define RT_USING_SDIO
#define RT_SDIO_STACK_SIZE 512
#define RT_SDIO_THREAD_PRIORITY 15
#define RT_MMCSD_STACK_SIZE 1024
#define RT_MMCSD_THREAD_PREORITY 22
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_DEV_BUS
/* Using USB */
/* C/C++ and POSIX layer */
/* ISO-ANSI C layer */
/* Timezone and Daylight Saving Time */
#define RT_LIBC_USING_LIGHT_TZ_DST
#define RT_LIBC_TZ_DEFAULT_HOUR 8
#define RT_LIBC_TZ_DEFAULT_MIN 0
#define RT_LIBC_TZ_DEFAULT_SEC 0
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_DEVIO
#define RT_USING_POSIX_STDIO
#define RT_USING_POSIX_POLL
#define RT_USING_POSIX_SELECT
#define RT_USING_POSIX_TERMIOS
#define RT_USING_POSIX_AIO
#define RT_USING_POSIX_DELAY
#define RT_USING_POSIX_CLOCK
#define RT_USING_POSIX_TIMER
/* Interprocess Communication (IPC) */
#define RT_USING_POSIX_PIPE
#define RT_USING_POSIX_PIPE_SIZE 512
#define RT_USING_POSIX_MESSAGE_QUEUE
#define RT_USING_POSIX_MESSAGE_SEMAPHORE
/* Socket is in the 'Network' category */
/* Network */
#define RT_USING_SAL
#define SAL_INTERNET_CHECK
/* Docking with protocol stacks */
#define SAL_USING_LWIP
#define SAL_USING_POSIX
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
#define RT_USING_LWIP
#define RT_USING_LWIP212
#define RT_USING_LWIP_VER_NUM 0x20102
#define RT_LWIP_MEM_ALIGNMENT 64
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
#define RT_LWIP_DNS
/* Static IPv4 Address */
#define RT_LWIP_IPADDR "192.168.4.10"
#define RT_LWIP_GWADDR "192.168.4.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_LWIP_RAW
#define RT_MEMP_NUM_NETCONN 8
#define RT_LWIP_PBUF_NUM 512
#define RT_LWIP_RAW_PCB_NUM 4
#define RT_LWIP_UDP_PCB_NUM 4
#define RT_LWIP_TCP_PCB_NUM 4
#define RT_LWIP_TCP_SEG_NUM 40
#define RT_LWIP_TCP_SND_BUF 8196
#define RT_LWIP_TCP_WND 8196
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_STACKSIZE 16184
#define RT_LWIP_ETHTHREAD_PRIORITY 12
#define RT_LWIP_ETHTHREAD_STACKSIZE 2048
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_SO_LINGER 0
#define LWIP_NETIF_LOOPBACK 0
#define RT_LWIP_USING_PING
/* Utilities */
#define RT_USING_RYM
#define YMODEM_USING_FILE_TRANSFER
#define RT_USING_UTEST
#define UTEST_THR_STACK_SIZE 4096
#define UTEST_THR_PRIORITY 20
#define RT_USING_RESOURCE_ID
#define RT_USING_ADT
#define RT_USING_ADT_AVL
#define RT_USING_ADT_BITMAP
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
#define RT_USING_KTIME
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
/* XML: Extensible Markup Language */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* sensors drivers */
/* touch drivers */
/* Kendryte SDK */
/* AI packages */
/* Signal Processing and Control Algorithm Packages */
/* miscellaneous packages */
/* project laboratory */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Arduino libraries */
/* Projects */
/* Sensors */
/* Display */
/* Timing */
/* Data Processing */
/* Data Storage */
/* Communication */
/* Device Control */
/* Other */
/* Signal IO */
/* Uncategorized */
/* Hardware Drivers */
/* On-chip Peripheral Drivers */
#define BSP_USING_UART
#define RT_USING_UART1
#define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_SDIO
#define BSP_USING_SDCARD_FATFS
#define USING_SDIO0
/* Board extended module Drivers */
#define PHYTIUM_ARCH_AARCH32
/* Standalone Setting */
#define TARGET_ARMV8_AARCH32
#define USE_AARCH64_L1_TO_AARCH32
/* Board Configuration */
#define TARGET_PHYTIUMPI
#define TARGET_E2000
#define DEFAULT_DEBUG_PRINT_UART1
/* Components Configuration */
#define USE_GIC
#define ENABLE_GICV3
#define USE_IOPAD
#define ENABLE_IOPAD
#define USE_SERIAL
/* Usart Configuration */
#define ENABLE_Pl011_UART
#define USE_ETH
/* Eth Configuration */
#define ENABLE_FXMAC
#define FXMAC_PHY_COMMON
/* Sdk common configuration */
#define LOG_ERROR
#define USE_DEFAULT_INTERRUPT_CONFIG
#define INTERRUPT_ROLE_MASTER
#endif
bsp/phytium/aarch32/configs/phytium_pi_rtthread
+1237
View File
File diff suppressed because it is too large Load Diff
bsp/phytium/aarch32/configs/phytium_pi_rtthread.h
+417
View File
@@ -0,0 +1,417 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Project Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 16
#define RT_USING_SMP
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 4096
#define SYSTEM_THREAD_STACK_SIZE 4096
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 4096
/* kservice optimization */
#define RT_KSERVICE_USING_STDLIB
#define RT_KPRINTF_USING_LONGLONG
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
#define RT_USING_MESSAGEQUEUE_PRIORITY
/* Memory Management */
#define RT_PAGE_MAX_ORDER 11
#define RT_USING_SLAB
#define RT_USING_MEMHEAP
#define RT_MEMHEAP_FAST_MODE
#define RT_USING_SLAB_AS_HEAP
#define RT_USING_HEAP_ISR
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50001
#define RT_USING_CACHE
#define RT_USING_HW_ATOMIC
#define RT_USING_CPU_FFS
#define ARCH_MM_MMU
#define ARCH_ARM
#define ARCH_ARM_MMU
#define ARCH_ARM_CORTEX_A
#define RT_USING_GIC_V3
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 8192
#define RT_MAIN_THREAD_PRIORITY 10
#define RT_USING_MSH
#define RT_USING_FINSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* DFS: device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FD_MAX 16
#define RT_USING_DFS_V1
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
#define RT_USING_DFS_RAMFS
#define RT_USING_DFS_MQUEUE
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 4096
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 1024
#define RT_USING_NULL
#define RT_USING_ZERO
#define RT_USING_RANDOM
#define RT_USING_RTC
#define RT_USING_SDIO
#define RT_SDIO_STACK_SIZE 512
#define RT_SDIO_THREAD_PRIORITY 15
#define RT_MMCSD_STACK_SIZE 1024
#define RT_MMCSD_THREAD_PREORITY 22
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_DEV_BUS
/* Using USB */
/* C/C++ and POSIX layer */
/* ISO-ANSI C layer */
/* Timezone and Daylight Saving Time */
#define RT_LIBC_USING_LIGHT_TZ_DST
#define RT_LIBC_TZ_DEFAULT_HOUR 8
#define RT_LIBC_TZ_DEFAULT_MIN 0
#define RT_LIBC_TZ_DEFAULT_SEC 0
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_DEVIO
#define RT_USING_POSIX_STDIO
#define RT_USING_POSIX_POLL
#define RT_USING_POSIX_SELECT
#define RT_USING_POSIX_TERMIOS
#define RT_USING_POSIX_AIO
#define RT_USING_POSIX_DELAY
#define RT_USING_POSIX_CLOCK
#define RT_USING_POSIX_TIMER
/* Interprocess Communication (IPC) */
#define RT_USING_POSIX_PIPE
#define RT_USING_POSIX_PIPE_SIZE 512
#define RT_USING_POSIX_MESSAGE_QUEUE
#define RT_USING_POSIX_MESSAGE_SEMAPHORE
/* Socket is in the 'Network' category */
/* Network */
#define RT_USING_SAL
#define SAL_INTERNET_CHECK
/* Docking with protocol stacks */
#define SAL_USING_LWIP
#define SAL_USING_POSIX
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
#define RT_USING_LWIP
#define RT_USING_LWIP212
#define RT_USING_LWIP_VER_NUM 0x20102
#define RT_LWIP_MEM_ALIGNMENT 64
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
#define RT_LWIP_DNS
/* Static IPv4 Address */
#define RT_LWIP_IPADDR "192.168.4.10"
#define RT_LWIP_GWADDR "192.168.4.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_LWIP_RAW
#define RT_MEMP_NUM_NETCONN 8
#define RT_LWIP_PBUF_NUM 512
#define RT_LWIP_RAW_PCB_NUM 4
#define RT_LWIP_UDP_PCB_NUM 4
#define RT_LWIP_TCP_PCB_NUM 4
#define RT_LWIP_TCP_SEG_NUM 40
#define RT_LWIP_TCP_SND_BUF 8196
#define RT_LWIP_TCP_WND 8196
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_STACKSIZE 16184
#define RT_LWIP_ETHTHREAD_PRIORITY 12
#define RT_LWIP_ETHTHREAD_STACKSIZE 2048
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_SO_LINGER 0
#define LWIP_NETIF_LOOPBACK 0
#define RT_LWIP_USING_PING
/* Utilities */
#define RT_USING_RYM
#define YMODEM_USING_FILE_TRANSFER
#define RT_USING_UTEST
#define UTEST_THR_STACK_SIZE 4096
#define UTEST_THR_PRIORITY 20
#define RT_USING_RESOURCE_ID
#define RT_USING_ADT
#define RT_USING_ADT_AVL
#define RT_USING_ADT_BITMAP
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
#define RT_USING_KTIME
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
/* XML: Extensible Markup Language */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* sensors drivers */
/* touch drivers */
/* Kendryte SDK */
/* AI packages */
/* Signal Processing and Control Algorithm Packages */
/* miscellaneous packages */
/* project laboratory */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Arduino libraries */
/* Projects */
/* Sensors */
/* Display */
/* Timing */
/* Data Processing */
/* Data Storage */
/* Communication */
/* Device Control */
/* Other */
/* Signal IO */
/* Uncategorized */
/* Hardware Drivers */
/* On-chip Peripheral Drivers */
#define BSP_USING_UART
#define RT_USING_UART1
#define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_SDIO
#define BSP_USING_SDCARD_FATFS
#define USING_SDIO0
/* Board extended module Drivers */
#define PHYTIUM_ARCH_AARCH32
/* Standalone Setting */
#define TARGET_ARMV8_AARCH32
#define USE_AARCH64_L1_TO_AARCH32
/* Board Configuration */
#define TARGET_PHYTIUMPI
#define TARGET_E2000
#define DEFAULT_DEBUG_PRINT_UART1
/* Components Configuration */
#define USE_GIC
#define ENABLE_GICV3
#define USE_IOPAD
#define ENABLE_IOPAD
#define USE_SERIAL
/* Usart Configuration */
#define ENABLE_Pl011_UART
#define USE_ETH
/* Eth Configuration */
#define ENABLE_FXMAC
#define FXMAC_PHY_COMMON
/* Sdk common configuration */
#define LOG_ERROR
#define USE_DEFAULT_INTERRUPT_CONFIG
#define INTERRUPT_ROLE_MASTER
#endif
bsp/phytium/aarch32/makefile
+17 -1
View File
@@ -21,6 +21,10 @@ ifdef CONFIG_TARGET_E2000D
RTCONFIG := e2000d
endif
ifdef CONFIG_TARGET_PHYTIUMPI
RTCONFIG := phytium_pi
endif
ifdef CONFIG_RT_USING_SMART
RTCONFIG := $(RTCONFIG)_rtsmart
else
@@ -103,4 +107,16 @@ load_e2000d_rtthread_test:
@echo "Load configs from ./configs/e2000d_rtthread_test"
@cp ./configs/e2000d_rtthread_test ./.config -f
@cp ./configs/e2000d_rtthread_test.h ./rtconfig.h -f
scons -c
scons -c
load_phytium_pi_rtthread:
@echo "Load configs from ./configs/phytium_pi_rtthread"
@cp ./configs/phytium_pi_rtthread ./.config -f
@cp ./configs/phytium_pi_rtthread.h ./rtconfig.h -f
scons -c
load_phytium_pi_rtsmart:
@echo "Load configs from ./configs/phytium_pi_rtsmart"
@cp ./configs/phytium_pi_rtsmart ./.config -f
@cp ./configs/phytium_pi_rtsmart.h ./rtconfig.h -f
@scons -c
bsp/phytium/aarch32/rtconfig.h
+20 -22
View File
@@ -8,6 +8,8 @@
#define RT_NAME_MAX 16
#define RT_USING_SMART
#define RT_USING_SMP
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
@@ -18,6 +20,7 @@
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 4096
#define SYSTEM_THREAD_STACK_SIZE 4096
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 4096
@@ -135,19 +138,16 @@
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 1024
#define RT_USING_TTY
#define RT_USING_PIN
#define RT_USING_NULL
#define RT_USING_ZERO
#define RT_USING_RANDOM
#define RT_USING_RTC
#define RT_USING_SDIO
#define RT_SDIO_STACK_SIZE 4096
#define RT_SDIO_STACK_SIZE 512
#define RT_SDIO_THREAD_PRIORITY 15
#define RT_MMCSD_STACK_SIZE 4096
#define RT_MMCSD_STACK_SIZE 1024
#define RT_MMCSD_THREAD_PREORITY 22
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
/* Using USB */
@@ -155,7 +155,14 @@
/* C/C++ and POSIX layer */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* ISO-ANSI C layer */
/* Timezone and Daylight Saving Time */
#define RT_LIBC_USING_LIGHT_TZ_DST
#define RT_LIBC_TZ_DEFAULT_HOUR 8
#define RT_LIBC_TZ_DEFAULT_MIN 0
#define RT_LIBC_TZ_DEFAULT_SEC 0
/* POSIX (Portable Operating System Interface) layer */
@@ -336,7 +343,7 @@
/* Arduino libraries */
/* Projects and Demos */
/* Projects */
/* Sensors */
@@ -373,11 +380,11 @@
#define BSP_USING_UART
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM2
#define BSP_USING_GPIO
#define BSP_USING_QSPI
#define USING_QSPI_CHANNEL0
#define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_SDIO
#define BSP_USING_SDCARD_FATFS
#define USING_SDIO0
/* Board extended module Drivers */
@@ -390,19 +397,12 @@
/* Board Configuration */
#define TARGET_E2000D
#define TARGET_PHYTIUMPI
#define TARGET_E2000
#define DEFAULT_DEBUG_PRINT_UART1
/* Components Configuration */
#define USE_SPI
#define USE_FSPIM
#define USE_QSPI
/* Qspi Configuration */
#define USE_FQSPI
#define USE_GIC
#define ENABLE_GICV3
#define USE_IOPAD
@@ -412,8 +412,6 @@
/* Usart Configuration */
#define ENABLE_Pl011_UART
#define USE_GPIO
#define ENABLE_FGPIO
#define USE_ETH
/* Eth Configuration */
bsp/phytium/aarch64/.config
+22 -13
View File
@@ -11,7 +11,7 @@ CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_SMART is not set
# CONFIG_RT_USING_AMP is not set
CONFIG_RT_USING_SMP=y
CONFIG_RT_CPUS_NR=2
CONFIG_RT_CPUS_NR=4
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
@@ -85,10 +85,6 @@ CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x50001
# CONFIG_RT_USING_STDC_ATOMIC is not set
#
# RT-Thread Architecture
#
CONFIG_ARCH_CPU_64BIT=y
CONFIG_RT_USING_CACHE=y
# CONFIG_RT_USING_HW_ATOMIC is not set
@@ -99,6 +95,10 @@ CONFIG_ARCH_MM_MMU=y
CONFIG_ARCH_ARM=y
CONFIG_ARCH_ARM_MMU=y
CONFIG_ARCH_ARMV8=y
#
# AArch64 Architecture Configuration
#
CONFIG_ARCH_TEXT_OFFSET=0x80000
CONFIG_ARCH_RAM_OFFSET=0x80000000
CONFIG_ARCH_SECONDARY_CPU_STACK_SIZE=4096
@@ -234,7 +234,19 @@ CONFIG_RT_MMCSD_MAX_PARTITION=16
#
# C/C++ and POSIX layer
#
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# ISO-ANSI C layer
#
#
# Timezone and Daylight Saving Time
#
# CONFIG_RT_LIBC_USING_FULL_TZ_DST is not set
CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y
CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8
CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0
CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# POSIX (Portable Operating System Interface) layer
@@ -244,6 +256,7 @@ CONFIG_RT_USING_POSIX_DEVIO=y
CONFIG_RT_USING_POSIX_STDIO=y
# CONFIG_RT_USING_POSIX_POLL is not set
# CONFIG_RT_USING_POSIX_SELECT is not set
# CONFIG_RT_USING_POSIX_EVENTFD is not set
# CONFIG_RT_USING_POSIX_SOCKET is not set
CONFIG_RT_USING_POSIX_TERMIOS=y
# CONFIG_RT_USING_POSIX_AIO is not set
@@ -1185,11 +1198,7 @@ CONFIG_RT_USING_UART1=y
# CONFIG_BSP_USING_QSPI is not set
CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_SDIO=y
CONFIG_BSP_USING_SDCARD_FATFS=y
# CONFIG_USING_SDIO0 is not set
CONFIG_USING_SDIO1=y
# CONFIG_USING_EMMC is not set
# CONFIG_BSP_USING_SDIO is not set
#
# Board extended module Drivers
@@ -1197,7 +1206,6 @@ CONFIG_USING_SDIO1=y
CONFIG_BSP_USING_GIC=y
CONFIG_BSP_USING_GICV3=y
CONFIG_PHYTIUM_ARCH_AARCH64=y
CONFIG_ARM_SPI_BIND_CPU_ID=0
#
# Standalone Setting
@@ -1210,8 +1218,9 @@ CONFIG_TARGET_ARMV8_AARCH64=y
# CONFIG_TARGET_F2000_4 is not set
# CONFIG_TARGET_D2000 is not set
# CONFIG_TARGET_E2000Q is not set
CONFIG_TARGET_E2000D=y
# CONFIG_TARGET_E2000D is not set
# CONFIG_TARGET_E2000S is not set
CONFIG_TARGET_PHYTIUMPI=y
CONFIG_TARGET_E2000=y
CONFIG_DEFAULT_DEBUG_PRINT_UART1=y
# CONFIG_DEFAULT_DEBUG_PRINT_UART0 is not set
bsp/phytium/aarch64/Kconfig
+6
View File
@@ -54,6 +54,12 @@ if TARGET_E2000D
default 0
endif
if TARGET_PHYTIUMPI
config ARM_SPI_BIND_CPU_ID
int
default 2
endif
menu "Standalone Setting"
config TARGET_ARMV8_AARCH64
bool "Armv8 Aarch64"
bsp/phytium/aarch64/applications/mnt.c
+1 -9
View File
@@ -36,16 +36,8 @@ static int filesystem_mount(void)
}
else
{
LOG_W("[sd] File System on SD initialization failed!");
LOG_W("[sd] Try to format and re-mount...");
if (dfs_mkfs("elm", SD_DEIVCE_NAME) == 0)
{
if (dfs_mount(SD_DEIVCE_NAME, "/", "elm", 0, 0) == 0)
{
LOG_I("[sd] File System on SD initialized!");
}
}
LOG_E("[sd] File System on SD initialization failed!");
LOG_E("[sd] Please format SD Card as FAT32!!!...");
return -1;
}
bsp/phytium/aarch64/configs/phytium_pi_rtsmart
+1306
View File
File diff suppressed because it is too large Load Diff
bsp/phytium/aarch64/configs/phytium_pi_rtsmart.h
+430
View File
@@ -0,0 +1,430 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Project Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 16
#define RT_USING_SMART
#define RT_USING_SMP
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 40960
#define SYSTEM_THREAD_STACK_SIZE 40960
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 4096
/* kservice optimization */
#define RT_KSERVICE_USING_STDLIB
#define RT_KPRINTF_USING_LONGLONG
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* Memory Management */
#define RT_PAGE_MAX_ORDER 16
#define RT_USING_SLAB
#define RT_USING_MEMHEAP
#define RT_MEMHEAP_FAST_MODE
#define RT_USING_SLAB_AS_HEAP
#define RT_USING_HEAP_ISR
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50001
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
#define ARCH_ARM_BOOTWITH_FLUSH_CACHE
#define ARCH_MM_MMU
#define ARCH_ARM
#define ARCH_ARM_MMU
#define KERNEL_VADDR_START 0xffff000000000000
#define ARCH_ARMV8
/* AArch64 Architecture Configuration */
#define ARCH_TEXT_OFFSET 0x80000
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
#define ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 8192
#define RT_MAIN_THREAD_PRIORITY 10
#define RT_USING_MSH
#define RT_USING_FINSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* DFS: device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FD_MAX 16
#define RT_USING_DFS_V1
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
#define RT_USING_DFS_RAMFS
#define RT_USING_LWP
#define RT_LWP_MAX_NR 30
#define LWP_TASK_STACK_SIZE 16384
#define RT_CH_MSG_MAX_NR 1024
#define LWP_CONSOLE_INPUT_BUFFER_SIZE 1024
#define LWP_TID_MAX_NR 64
#define RT_LWP_SHM_MAX_NR 64
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 8192
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_TTY
#define RT_USING_NULL
#define RT_USING_ZERO
#define RT_USING_RANDOM
#define RT_USING_RTC
#define RT_USING_SDIO
#define RT_SDIO_STACK_SIZE 512
#define RT_SDIO_THREAD_PRIORITY 15
#define RT_MMCSD_STACK_SIZE 1024
#define RT_MMCSD_THREAD_PREORITY 22
#define RT_MMCSD_MAX_PARTITION 16
/* Using USB */
/* C/C++ and POSIX layer */
/* ISO-ANSI C layer */
/* Timezone and Daylight Saving Time */
#define RT_LIBC_USING_LIGHT_TZ_DST
#define RT_LIBC_TZ_DEFAULT_HOUR 8
#define RT_LIBC_TZ_DEFAULT_MIN 0
#define RT_LIBC_TZ_DEFAULT_SEC 0
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_DEVIO
#define RT_USING_POSIX_STDIO
#define RT_USING_POSIX_TERMIOS
#define RT_USING_POSIX_DELAY
#define RT_USING_POSIX_CLOCK
#define RT_USING_POSIX_TIMER
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
/* Network */
#define RT_USING_SAL
#define SAL_INTERNET_CHECK
/* Docking with protocol stacks */
#define SAL_USING_LWIP
#define SAL_USING_POSIX
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
#define RT_USING_LWIP
#define RT_USING_LWIP212
#define RT_USING_LWIP_VER_NUM 0x20102
#define RT_LWIP_MEM_ALIGNMENT 64
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
#define RT_LWIP_DNS
/* Static IPv4 Address */
#define RT_LWIP_IPADDR "192.168.4.10"
#define RT_LWIP_GWADDR "192.168.4.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_LWIP_RAW
#define RT_MEMP_NUM_NETCONN 8
#define RT_LWIP_PBUF_NUM 512
#define RT_LWIP_RAW_PCB_NUM 4
#define RT_LWIP_UDP_PCB_NUM 4
#define RT_LWIP_TCP_PCB_NUM 4
#define RT_LWIP_TCP_SEG_NUM 40
#define RT_LWIP_TCP_SND_BUF 8196
#define RT_LWIP_TCP_WND 8196
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_STACKSIZE 16184
#define RT_LWIP_ETHTHREAD_PRIORITY 12
#define RT_LWIP_ETHTHREAD_STACKSIZE 2048
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_SO_LINGER 0
#define LWIP_NETIF_LOOPBACK 0
#define RT_LWIP_USING_PING
#define RT_LWIP_DEBUG
#define RT_LWIP_NETIF_DEBUG
/* Utilities */
#define RT_USING_RYM
#define YMODEM_USING_FILE_TRANSFER
#define RT_USING_RESOURCE_ID
#define RT_USING_ADT
#define RT_USING_ADT_AVL
#define RT_USING_ADT_BITMAP
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
#define RT_USING_KTIME
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
/* XML: Extensible Markup Language */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* sensors drivers */
/* touch drivers */
/* Kendryte SDK */
/* AI packages */
/* Signal Processing and Control Algorithm Packages */
/* miscellaneous packages */
/* project laboratory */
/* samples: kernel and components samples */
#define PKG_USING_KERNEL_SAMPLES
#define PKG_USING_KERNEL_SAMPLES_LATEST_VERSION
#define PKG_USING_KERNEL_SAMPLES_EN
/* entertainment: terminal games and other interesting software packages */
/* Arduino libraries */
/* Projects */
/* Sensors */
/* Display */
/* Timing */
/* Data Processing */
/* Data Storage */
/* Communication */
/* Device Control */
/* Other */
/* Signal IO */
/* Uncategorized */
/* Hardware Drivers */
/* On-chip Peripheral Drivers */
#define BSP_USING_UART
#define RT_USING_UART1
#define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_SDIO
#define BSP_USING_SDCARD_FATFS
#define USING_SDIO0
/* Board extended module Drivers */
#define BSP_USING_GIC
#define BSP_USING_GICV3
#define PHYTIUM_ARCH_AARCH64
#define ARM_SPI_BIND_CPU_ID 2
/* Standalone Setting */
#define TARGET_ARMV8_AARCH64
/* Board Configuration */
#define TARGET_PHYTIUMPI
#define TARGET_E2000
#define DEFAULT_DEBUG_PRINT_UART1
/* Components Configuration */
#define USE_SPI
#define USE_FSPIM
#define USE_QSPI
/* Qspi Configuration */
#define USE_FQSPI
#define USE_IOPAD
#define ENABLE_IOPAD
#define USE_SERIAL
/* Usart Configuration */
#define ENABLE_Pl011_UART
#define USE_ETH
/* Eth Configuration */
#define ENABLE_FXMAC
#define FXMAC_PHY_COMMON
/* Sdk common configuration */
#define LOG_ERROR
#endif
bsp/phytium/aarch64/configs/phytium_pi_rtthread
+1289
View File
File diff suppressed because it is too large Load Diff
bsp/phytium/aarch64/configs/phytium_pi_rtthread.h
+416
View File
@@ -0,0 +1,416 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Project Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 16
#define RT_USING_SMP
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 8192
#define SYSTEM_THREAD_STACK_SIZE 8192
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 8192
/* kservice optimization */
#define RT_KSERVICE_USING_STDLIB
#define RT_KPRINTF_USING_LONGLONG
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* Memory Management */
#define RT_PAGE_MAX_ORDER 16
#define RT_USING_SLAB
#define RT_USING_MEMHEAP
#define RT_MEMHEAP_FAST_MODE
#define RT_USING_SLAB_AS_HEAP
#define RT_USING_HEAP_ISR
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50001
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
#define ARCH_ARM_BOOTWITH_FLUSH_CACHE
#define ARCH_MM_MMU
#define ARCH_ARM
#define ARCH_ARM_MMU
#define ARCH_ARMV8
/* AArch64 Architecture Configuration */
#define ARCH_TEXT_OFFSET 0x80000
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
#define ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 8192
#define RT_MAIN_THREAD_PRIORITY 10
#define RT_USING_MSH
#define RT_USING_FINSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* DFS: device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FD_MAX 16
#define RT_USING_DFS_V1
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
#define RT_USING_DFS_RAMFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 8192
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_NULL
#define RT_USING_ZERO
#define RT_USING_RANDOM
#define RT_USING_RTC
#define RT_USING_SDIO
#define RT_SDIO_STACK_SIZE 4096
#define RT_SDIO_THREAD_PRIORITY 15
#define RT_MMCSD_STACK_SIZE 4096
#define RT_MMCSD_THREAD_PREORITY 22
#define RT_MMCSD_MAX_PARTITION 16
/* Using USB */
/* C/C++ and POSIX layer */
/* ISO-ANSI C layer */
/* Timezone and Daylight Saving Time */
#define RT_LIBC_USING_LIGHT_TZ_DST
#define RT_LIBC_TZ_DEFAULT_HOUR 8
#define RT_LIBC_TZ_DEFAULT_MIN 0
#define RT_LIBC_TZ_DEFAULT_SEC 0
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_DEVIO
#define RT_USING_POSIX_STDIO
#define RT_USING_POSIX_TERMIOS
#define RT_USING_POSIX_DELAY
#define RT_USING_POSIX_CLOCK
#define RT_USING_POSIX_TIMER
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
/* Network */
#define RT_USING_SAL
#define SAL_INTERNET_CHECK
/* Docking with protocol stacks */
#define SAL_USING_LWIP
#define SAL_USING_POSIX
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
#define RT_USING_LWIP
#define RT_USING_LWIP212
#define RT_USING_LWIP_VER_NUM 0x20102
#define RT_LWIP_MEM_ALIGNMENT 64
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
#define RT_LWIP_DNS
/* Static IPv4 Address */
#define RT_LWIP_IPADDR "192.168.4.10"
#define RT_LWIP_GWADDR "192.168.4.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_LWIP_RAW
#define RT_MEMP_NUM_NETCONN 8
#define RT_LWIP_PBUF_NUM 512
#define RT_LWIP_RAW_PCB_NUM 4
#define RT_LWIP_UDP_PCB_NUM 4
#define RT_LWIP_TCP_PCB_NUM 4
#define RT_LWIP_TCP_SEG_NUM 40
#define RT_LWIP_TCP_SND_BUF 8196
#define RT_LWIP_TCP_WND 8196
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_STACKSIZE 16184
#define RT_LWIP_ETHTHREAD_PRIORITY 12
#define RT_LWIP_ETHTHREAD_STACKSIZE 2048
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_SO_LINGER 0
#define LWIP_NETIF_LOOPBACK 0
#define RT_LWIP_USING_PING
#define RT_LWIP_DEBUG
#define RT_LWIP_NETIF_DEBUG
/* Utilities */
#define RT_USING_RYM
#define YMODEM_USING_FILE_TRANSFER
#define RT_USING_RESOURCE_ID
#define RT_USING_ADT
#define RT_USING_ADT_AVL
#define RT_USING_ADT_BITMAP
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
#define RT_USING_KTIME
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
/* XML: Extensible Markup Language */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* sensors drivers */
/* touch drivers */
/* Kendryte SDK */
/* AI packages */
/* Signal Processing and Control Algorithm Packages */
/* miscellaneous packages */
/* project laboratory */
/* samples: kernel and components samples */
#define PKG_USING_KERNEL_SAMPLES
#define PKG_USING_KERNEL_SAMPLES_LATEST_VERSION
#define PKG_USING_KERNEL_SAMPLES_EN
/* entertainment: terminal games and other interesting software packages */
/* Arduino libraries */
/* Projects */
/* Sensors */
/* Display */
/* Timing */
/* Data Processing */
/* Data Storage */
/* Communication */
/* Device Control */
/* Other */
/* Signal IO */
/* Uncategorized */
/* Hardware Drivers */
/* On-chip Peripheral Drivers */
#define BSP_USING_UART
#define RT_USING_UART1
#define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* Board extended module Drivers */
#define BSP_USING_GIC
#define BSP_USING_GICV3
#define PHYTIUM_ARCH_AARCH64
/* Standalone Setting */
#define TARGET_ARMV8_AARCH64
/* Board Configuration */
#define TARGET_PHYTIUMPI
#define TARGET_E2000
#define DEFAULT_DEBUG_PRINT_UART1
/* Components Configuration */
#define USE_SPI
#define USE_FSPIM
#define USE_QSPI
/* Qspi Configuration */
#define USE_FQSPI
#define USE_IOPAD
#define ENABLE_IOPAD
#define USE_SERIAL
/* Usart Configuration */
#define ENABLE_Pl011_UART
#define USE_ETH
/* Eth Configuration */
#define ENABLE_FXMAC
#define FXMAC_PHY_COMMON
/* Sdk common configuration */
#define LOG_ERROR
#endif
bsp/phytium/aarch64/makefile
+16
View File
@@ -22,6 +22,10 @@ ifdef CONFIG_TARGET_E2000D
RTCONFIG := e2000d
endif
ifdef CONFIG_TARGET_PHYTIUMPI
RTCONFIG := phytium_pi
endif
ifdef CONFIG_RT_USING_SMART
RTCONFIG := $(RTCONFIG)_rtsmart
else
@@ -104,4 +108,16 @@ load_e2000d_rtthread_test:
@echo "Load configs from ./configs/e2000d_rtthread"
@cp ./configs/e2000d_rtthread_test ./.config -f
@cp ./configs/e2000d_rtthread_test.h ./rtconfig.h -f
@scons -c
load_phytium_pi_rtthread:
@echo "Load configs from ./configs/phytium_pi_rtthread"
@cp ./configs/phytium_pi_rtthread ./.config -f
@cp ./configs/phytium_pi_rtthread.h ./rtconfig.h -f
scons -c
load_phytium_pi_rtsmart:
@echo "Load configs from ./configs/phytium_pi_rtsmart"
@cp ./configs/phytium_pi_rtsmart ./.config -f
@cp ./configs/phytium_pi_rtsmart.h ./rtconfig.h -f
@scons -c
bsp/phytium/aarch64/rtconfig.h
+13 -10
View File
@@ -8,7 +8,7 @@
#define RT_NAME_MAX 16
#define RT_USING_SMP
#define RT_CPUS_NR 2
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
@@ -58,9 +58,6 @@
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50001
/* RT-Thread Architecture */
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
#define ARCH_ARM_BOOTWITH_FLUSH_CACHE
@@ -68,6 +65,9 @@
#define ARCH_ARM
#define ARCH_ARM_MMU
#define ARCH_ARMV8
/* AArch64 Architecture Configuration */
#define ARCH_TEXT_OFFSET 0x80000
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
@@ -147,7 +147,14 @@
/* C/C++ and POSIX layer */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* ISO-ANSI C layer */
/* Timezone and Daylight Saving Time */
#define RT_LIBC_USING_LIGHT_TZ_DST
#define RT_LIBC_TZ_DEFAULT_HOUR 8
#define RT_LIBC_TZ_DEFAULT_MIN 0
#define RT_LIBC_TZ_DEFAULT_SEC 0
/* POSIX (Portable Operating System Interface) layer */
@@ -362,16 +369,12 @@
#define RT_USING_UART1
#define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_SDIO
#define BSP_USING_SDCARD_FATFS
#define USING_SDIO1
/* Board extended module Drivers */
#define BSP_USING_GIC
#define BSP_USING_GICV3
#define PHYTIUM_ARCH_AARCH64
#define ARM_SPI_BIND_CPU_ID 0
/* Standalone Setting */
@@ -379,7 +382,7 @@
/* Board Configuration */
#define TARGET_E2000D
#define TARGET_PHYTIUMPI
#define TARGET_E2000
#define DEFAULT_DEBUG_PRINT_UART1
bsp/phytium/board/SConscript
+15 -10
View File
@@ -3,23 +3,28 @@ from building import *
cwd = GetCurrentDir()
src = Glob('*.S')
src += Glob('*.c')
if GetDepend(['TARGET_E2000']):
if GetDepend(['TARGET_E2000Q']):
src += Glob(cwd + '/e2000/memory_map.c')
if GetDepend(['TARGET_E2000Q']):
src += Glob(cwd + '/e2000/q/parameters.c')
elif GetDepend(['TARGET_E2000D']):
src += Glob(cwd + '/e2000/d/parameters.c')
elif GetDepend(['TARGET_E2000S']):
src += Glob(cwd + '/e2000/s/parameters.c')
src += Glob(cwd + '/e2000/q/parameters.c')
elif GetDepend(['TARGET_E2000D']):
src += Glob(cwd + '/e2000/memory_map.c')
src += Glob(cwd + '/e2000/d/parameters.c')
elif GetDepend(['TARGET_E2000S']):
src += Glob(cwd + '/e2000/memory_map.c')
src += Glob(cwd + '/e2000/s/parameters.c')
if GetDepend(['TARGET_F2000_4']):
src += Glob(cwd + '/ft2004/memory_map.c')
src += Glob(cwd + '/d2000/parameters.c')
src += Glob(cwd + '/ft2004/parameters.c')
if GetDepend(['TARGET_D2000']):
src += Glob(cwd + '/d2000/memory_map.c')
src += Glob(cwd + '/ft2004/parameters.c')
src += Glob(cwd + '/d2000/parameters.c')
if GetDepend(['TARGET_PHYTIUMPI']):
src += Glob(cwd + '/phytium-pi/memory_map.c')
src += Glob(cwd + '/phytium-pi/parameters.c')
CPPPATH = [cwd]
bsp/phytium/board/board.c
+1 -1
View File
@@ -219,7 +219,7 @@ void rt_hw_board_aarch32_init(void)
arm_gic_redist_address_set(0, redist_addr + (cpu_id + cpu_offset) * GICV3_RD_OFFSET, rt_hw_cpu_id());
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
#if RT_CPUS_NR == 2
arm_gic_redist_address_set(0, redist_addr + 3 * GICV3_RD_OFFSET, 1);
bsp/phytium/board/phytium-pi/memory_map.c
+106
View File
@@ -0,0 +1,106 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2023-04-27 huanghe first version
* 2023-07-27 zhangyan add qspi io space
*
*/
#include "rtconfig.h"
#include <board.h>
#include <mmu.h>
/* mmu config */
#ifdef RT_USING_SMART
#if defined(TARGET_ARMV8_AARCH64)
struct mem_desc platform_mem_desc[] =
{
{ KERNEL_VADDR_START,
KERNEL_VADDR_START + 0x0fffffff,
(rt_size_t)ARCH_MAP_FAILED,
NORMAL_MEM
}
};
#else
struct mem_desc platform_mem_desc[] =
{
{ KERNEL_VADDR_START,
KERNEL_VADDR_START + 0x10000000,
(rt_size_t)ARCH_MAP_FAILED,
NORMAL_MEM
}
};
#endif
#else
#if defined(TARGET_ARMV8_AARCH64)
struct mem_desc platform_mem_desc[] = {
{KERNEL_VADDR_START, DDR_END_ADDRESS , KERNEL_VADDR_START, NORMAL_MEM},
{
0x28000000U,
0x32B36FFFU,
0x28000000U,
DEVICE_MEM
},
{
0x00001000U,
0x0FFFFFFFU,
0x00001000U,
DEVICE_MEM
},
};
#else
struct mem_desc platform_mem_desc[] =
{
{
0x00U,
0x00U + 0x40000000U,
0x00U,
DEVICE_MEM
},
{
0x40000000U,
0x40000000U + 0x10000000U,
0x40000000U,
DEVICE_MEM
},
{
0x50000000U,
0x50000000U + 0x30000000U,
0x50000000U,
DEVICE_MEM
},
{
0x80000000U,
0xffffffffU,
0x80000000U,
NORMAL_MEM
},
#if defined(TARGET_ARMV8_AARCH64)
{
0x1000000000,
0x1000000000 + 0x1000000000,
0x1000000000,
DEVICE_MEM
},
{
0x2000000000,
0x2000000000 + 0x2000000000,
0x2000000000,
NORMAL_MEM
},
#endif
};
#endif
#endif
const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]);
bsp/phytium/board/phytium-pi/parameters.c
+75
View File
@@ -0,0 +1,75 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#include "rtconfig.h"
#include <rtthread.h>
#include "fcpu_info.h"
#include "fparameters.h"
/**
* @name: GetCpuMaskToAffval
* @msg: 参考 GetCpuMaskToAffval 进行参数的重新定义 ，两个小核心定义的id 为0，1 ，两个大核的id 为 2，3
* @return {*}
* @note:
* @param {u32} *cpu_mask
* @param {u32} *cluster_id
* @param {u32} *target_list
*/
u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list)
{
if (*cpu_mask == 0)
{
return 0;
}
*target_list = 0;
*cluster_id = 0;
if (*cpu_mask & 0x4)
{
*target_list = 1;
*cpu_mask &= ~0x4;
}
else if (*cpu_mask & 0x8)
{
*cluster_id = 0x100;
*target_list = 1;
*cpu_mask &= ~0x8;
}
else if (*cpu_mask & 0x3)
{
*cluster_id = 0x200;
if ((*cpu_mask & 0x3) == 0x3)
{
*target_list = 3;
}
else if ((*cpu_mask & 0x4))
{
*target_list = 1;
}
else
{
*target_list = 2;
}
*cpu_mask &= ~0x3;
}
else
{
*cpu_mask = 0;
return 0;
}
return 1;
}
bsp/phytium/board/phytium_cpu.c
+3 -3
View File
@@ -32,7 +32,7 @@
*/
int phytium_cpu_id_mapping(int cpu_id)
{
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
#if RT_CPUS_NR <= 2
switch (cpu_id)
{
@@ -88,7 +88,7 @@ int rt_hw_cpu_id(void)
int phytium_cpu_id_mapping(int cpu_id)
{
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
switch (cpu_id)
{
case 0:
@@ -127,7 +127,7 @@ int rt_hw_cpu_id(void)
rt_uint64_t get_main_cpu_affval(void)
{
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
return CORE2_AFF;
#else
return CORE0_AFF;
bsp/phytium/board/phytium_cpu.h
+1 -1
View File
@@ -53,7 +53,7 @@ rt_inline rt_uint32_t platform_get_gic_redist_base(void)
cpu_offset = FT_GIC_REDISTRUBUTIOR_OFFSET ;
#endif
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
u32 cpu_id = 0;
cpu_id = phytium_cpu_id();
bsp/phytium/board/secondary_cpu.c
+1 -1
View File
@@ -43,7 +43,7 @@ rt_uint64_t rt_cpu_mpidr_early[] =
#if defined(TARGET_E2000D)
[0] = 0x80000200,
[1] = 0x80000201,
#elif defined(TARGET_E2000Q)
#elif defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
[0] = 0x80000000,
[1] = 0x80000100,
[2] = 0x80000200,
bsp/phytium/libraries/SConscript
+17 -11
View File
@@ -32,22 +32,28 @@ if GetDepend(['TARGET_F2000_4']):
src += Glob(STANDALONE_DIR+'/board/ft2004/*.c')
path += [STANDALONE_DIR + '/board/ft2004']
if GetDepend(['TARGET_E2000']):
if GetDepend(['TARGET_E2000Q']):
src += Glob(STANDALONE_DIR+'/board/e2000/*.c')
path += [STANDALONE_DIR + '/board/e2000']
src += Glob(STANDALONE_DIR+'/board/e2000/q/*.c')
path += [STANDALONE_DIR + '/board/e2000/q']
if GetDepend(['TARGET_E2000Q']):
src += Glob(STANDALONE_DIR+'/board/e2000/q/*.c')
path += [STANDALONE_DIR + '/board/e2000/q']
if GetDepend(['TARGET_E2000D']):
src += Glob(STANDALONE_DIR+'/board/e2000/*.c')
path += [STANDALONE_DIR + '/board/e2000']
src += Glob(STANDALONE_DIR+'/board/e2000/d/*.c')
path += [STANDALONE_DIR + '/board/e2000/d']
if GetDepend(['TARGET_E2000D']):
src += Glob(STANDALONE_DIR+'/board/e2000/d/*.c')
path += [STANDALONE_DIR + '/board/e2000/d']
if GetDepend(['ARGET_E2000S']):
src += Glob(STANDALONE_DIR+'/board/e2000/s/*.c')
path += [STANDALONE_DIR + '/board/e2000/s']
if GetDepend(['ARGET_E2000S']):
src += Glob(STANDALONE_DIR+'/board/e2000/*.c')
path += [STANDALONE_DIR + '/board/e2000']
src += Glob(STANDALONE_DIR+'/board/e2000/s/*.c')
path += [STANDALONE_DIR + '/board/e2000/s']
if GetDepend(['TARGET_PHYTIUMPI']):
src += Glob(STANDALONE_DIR+'/board/phytium-pi/*.c')
path += [STANDALONE_DIR + '/board/phytium-pi']
if GetDepend(['TARGET_D2000']):
path += [STANDALONE_DIR + '/board/d2000']
bsp/phytium/libraries/drivers/Kconfig
+7 -1
View File
@@ -105,7 +105,13 @@ menu "On-chip Peripheral Drivers"
config USING_EMMC
bool "Use EMMC"
endchoice
endchoice
config SDCARD_OFFSET
hex "Block Offset"
default 0x0
help
Skip access start paration of SD Card to protect BIOS
endif
endmenu
bsp/phytium/libraries/drivers/drv_gpio.c
+1 -1
View File
@@ -115,7 +115,7 @@ void FIOPadSetGpioMux(u32 ctrl_id_p, u32 pin_id_p)
}
#endif
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
if (ctrl_id_p == FGPIO4_ID)
{
switch (pin_id_p)
bsp/phytium/libraries/drivers/drv_sdio.c
+5 -4
View File
@@ -28,7 +28,6 @@
#if defined(TARGET_E2000)
#include "fparameters.h"
#endif
#include "fparameters_comm.h"
#include "fsdio.h"
#include "fsdio_hw.h"
@@ -39,8 +38,6 @@
#define SDIO_CONTROLLER_ID FSDIO0_ID
#elif defined (USING_SDIO1)
#define SDIO_CONTROLLER_ID FSDIO1_ID
#elif defined (USING_EMMC)
#define SDIO_CONTROLLER_ID FSDIO0_ID
#endif
#define SDIO_TF_CARD_HOST_ID 0x1
#define SDIO_MALLOC_CAP_DESC 256U
@@ -48,6 +45,10 @@
#define SDIO_DMA_BLK_SZ 512U
#define SDIO_VALID_OCR 0x00FFFF80 /* supported voltage range is 1.65v-3.6v (VDD_165_195-VDD_35_36) */
#define SDIO_MAX_BLK_TRANS 20U
#ifndef CONFIG_SDCARD_OFFSET
#define CONFIG_SDCARD_OFFSET 0x0U
#endif
/**************************** Type Definitions *******************************/
typedef struct
{
@@ -223,7 +224,7 @@ static void mmc_request_send(struct rt_mmcsd_host *host, struct rt_mmcsd_req *re
req_cmd.flag |= FSDIO_CMD_FLAG_EXP_DATA;
req_data.blksz = req->data->blksize;
req_data.blkcnt = req->data->blks;
req_data.blkcnt = req->data->blks + CONFIG_SDCARD_OFFSET;
req_data.datalen = req->data->blksize * req->data->blks;
if ((uintptr)req->data->buf % SDIO_DMA_ALIGN) /* data buffer should be 512-aligned */
{
bsp/phytium/libraries/standalone/board/Kconfig
+6
View File
@@ -34,6 +34,12 @@ menu "Board Configuration"
select USE_SERIAL
select ENABLE_Pl011_UART
config TARGET_PHYTIUMPI
bool "Phytium Pi"
select TARGET_E2000
select USE_SERIAL
select ENABLE_Pl011_UART
# config TARGET_TARDIGRADE
# bool "TARDIGRADE"
bsp/phytium/libraries/standalone/board/phytium-pi/fparameters.h
+297
View File
@@ -0,0 +1,297 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fparameters.h
* Date: 2022-02-11 13:33:28
* LastEditTime: 2022-02-17 18:00:50
* Description:  This file is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BOARD_PHYTIUM_PI_PARAMTERERS_H
#define BOARD_PHYTIUM_PI_PARAMTERERS_H
#ifdef __cplusplus
extern "C"
{
#endif
/***************************** Include Files *********************************/
#include "fparameters_comm.h"
/************************** Constant Definitions *****************************/
#define CORE0_AFF 0x000U
#define CORE1_AFF 0x100U
#define CORE2_AFF 0x200U
#define CORE3_AFF 0x201U
#define FCORE_NUM 4
#define FT_CPUS_NR 4U
/*****************************************************************************/
/* register offset of iopad function / pull / driver strength */
#define FIOPAD_AN59_REG0_OFFSET 0x0000U
#define FIOPAD_AW47_REG0_OFFSET 0x0004U
#define FIOPAD_AR55_REG0_OFFSET 0x0020U
#define FIOPAD_AJ55_REG0_OFFSET 0x0024U
#define FIOPAD_AL55_REG0_OFFSET 0x0028U
#define FIOPAD_AL53_REG0_OFFSET 0x002CU
#define FIOPAD_AN51_REG0_OFFSET 0x0030U
#define FIOPAD_AR51_REG0_OFFSET 0x0034U
#define FIOPAD_BA57_REG0_OFFSET 0x0038U
#define FIOPAD_BA59_REG0_OFFSET 0x003CU
#define FIOPAD_AW57_REG0_OFFSET 0x0040U
#define FIOPAD_AW59_REG0_OFFSET 0x0044U
#define FIOPAD_AU55_REG0_OFFSET 0x0048U
#define FIOPAD_AN57_REG0_OFFSET 0x004CU
#define FIOPAD_AL59_REG0_OFFSET 0x0050U
#define FIOPAD_AJ59_REG0_OFFSET 0x0054U
#define FIOPAD_AJ57_REG0_OFFSET 0x0058U
#define FIOPAD_AG59_REG0_OFFSET 0x005CU
#define FIOPAD_AG57_REG0_OFFSET 0x0060U
#define FIOPAD_AE59_REG0_OFFSET 0x0064U
#define FIOPAD_AC59_REG0_OFFSET 0x0068U
#define FIOPAD_AC57_REG0_OFFSET 0x006CU
#define FIOPAD_AR49_REG0_OFFSET 0x0070U
#define FIOPAD_BA55_REG0_OFFSET 0x0074U
#define FIOPAD_BA53_REG0_OFFSET 0x0078U
#define FIOPAD_AR59_REG0_OFFSET 0x007CU
#define FIOPAD_AU59_REG0_OFFSET 0x0080U
#define FIOPAD_AR57_REG0_OFFSET 0x0084U
#define FIOPAD_BA49_REG0_OFFSET 0x0088U
#define FIOPAD_AW55_REG0_OFFSET 0x008CU
#define FIOPAD_A35_REG0_OFFSET 0x0090U
#define FIOPAD_R57_REG0_OFFSET 0x0094U
#define FIOPAD_R59_REG0_OFFSET 0x0098U
#define FIOPAD_U59_REG0_OFFSET 0x009CU
#define FIOPAD_W59_REG0_OFFSET 0x00A0U
#define FIOPAD_U57_REG0_OFFSET 0x00A4U
#define FIOPAD_AA57_REG0_OFFSET 0x00A8U
#define FIOPAD_AA59_REG0_OFFSET 0x00ACU
#define FIOPAD_AW51_REG0_OFFSET 0x00B0U
#define FIOPAD_AU51_REG0_OFFSET 0x00B4U
#define FIOPAD_A39_REG0_OFFSET 0x00B8U
#define FIOPAD_C39_REG0_OFFSET 0x00BCU
#define FIOPAD_C37_REG0_OFFSET 0x00C0U
#define FIOPAD_A37_REG0_OFFSET 0x00C4U
#define FIOPAD_A41_REG0_OFFSET 0x00C8U
#define FIOPAD_A43_REG0_OFFSET 0x00CCU
#define FIOPAD_A45_REG0_OFFSET 0x00D0U
#define FIOPAD_C45_REG0_OFFSET 0x00D4U
#define FIOPAD_A47_REG0_OFFSET 0x00D8U
#define FIOPAD_A49_REG0_OFFSET 0x00DCU
#define FIOPAD_C49_REG0_OFFSET 0x00E0U
#define FIOPAD_A51_REG0_OFFSET 0x00E4U
#define FIOPAD_A33_REG0_OFFSET 0x00E8U
#define FIOPAD_C33_REG0_OFFSET 0x00ECU
#define FIOPAD_C31_REG0_OFFSET 0x00F0U
#define FIOPAD_A31_REG0_OFFSET 0x00F4U
#define FIOPAD_AJ53_REG0_OFFSET 0x00F8U
#define FIOPAD_AL49_REG0_OFFSET 0x00FCU
#define FIOPAD_AL47_REG0_OFFSET 0x0100U
#define FIOPAD_AN49_REG0_OFFSET 0x0104U
#define FIOPAD_AG51_REG0_OFFSET 0x0108U
#define FIOPAD_AJ51_REG0_OFFSET 0x010CU
#define FIOPAD_AG49_REG0_OFFSET 0x0110U
#define FIOPAD_AE55_REG0_OFFSET 0x0114U
#define FIOPAD_AE53_REG0_OFFSET 0x0118U
#define FIOPAD_AG55_REG0_OFFSET 0x011CU
#define FIOPAD_AJ49_REG0_OFFSET 0x0120U
#define FIOPAD_AC55_REG0_OFFSET 0x0124U
#define FIOPAD_AC53_REG0_OFFSET 0x0128U
#define FIOPAD_AE51_REG0_OFFSET 0x012CU
#define FIOPAD_W51_REG0_OFFSET 0x0130U
#define FIOPAD_W55_REG0_OFFSET 0x0134U
#define FIOPAD_W53_REG0_OFFSET 0x0138U
#define FIOPAD_U55_REG0_OFFSET 0x013CU
#define FIOPAD_U53_REG0_OFFSET 0x0140U
#define FIOPAD_AE49_REG0_OFFSET 0x0144U
#define FIOPAD_AC49_REG0_OFFSET 0x0148U
#define FIOPAD_AE47_REG0_OFFSET 0x014CU
#define FIOPAD_AA47_REG0_OFFSET 0x0150U
#define FIOPAD_AA49_REG0_OFFSET 0x0154U
#define FIOPAD_W49_REG0_OFFSET 0x0158U
#define FIOPAD_AA51_REG0_OFFSET 0x015CU
#define FIOPAD_U49_REG0_OFFSET 0x0160U
#define FIOPAD_G59_REG0_OFFSET 0x0164U
#define FIOPAD_J59_REG0_OFFSET 0x0168U
#define FIOPAD_L57_REG0_OFFSET 0x016CU
#define FIOPAD_C59_REG0_OFFSET 0x0170U
#define FIOPAD_E59_REG0_OFFSET 0x0174U
#define FIOPAD_J57_REG0_OFFSET 0x0178U
#define FIOPAD_L59_REG0_OFFSET 0x017CU
#define FIOPAD_N59_REG0_OFFSET 0x0180U
#define FIOPAD_C57_REG0_OFFSET 0x0184U
#define FIOPAD_E57_REG0_OFFSET 0x0188U
#define FIOPAD_E31_REG0_OFFSET 0x018CU
#define FIOPAD_G31_REG0_OFFSET 0x0190U
#define FIOPAD_N41_REG0_OFFSET 0x0194U
#define FIOPAD_N39_REG0_OFFSET 0x0198U
#define FIOPAD_J33_REG0_OFFSET 0x019CU
#define FIOPAD_N33_REG0_OFFSET 0x01A0U
#define FIOPAD_L33_REG0_OFFSET 0x01A4U
#define FIOPAD_N45_REG0_OFFSET 0x01A8U
#define FIOPAD_N43_REG0_OFFSET 0x01ACU
#define FIOPAD_L31_REG0_OFFSET 0x01B0U
#define FIOPAD_J31_REG0_OFFSET 0x01B4U
#define FIOPAD_J29_REG0_OFFSET 0x01B8U
#define FIOPAD_E29_REG0_OFFSET 0x01BCU
#define FIOPAD_G29_REG0_OFFSET 0x01C0U
#define FIOPAD_N27_REG0_OFFSET 0x01C4U
#define FIOPAD_L29_REG0_OFFSET 0x01C8U
#define FIOPAD_J37_REG0_OFFSET 0x01CCU
#define FIOPAD_J39_REG0_OFFSET 0x01D0U
#define FIOPAD_G41_REG0_OFFSET 0x01D4U
#define FIOPAD_E43_REG0_OFFSET 0x01D8U
#define FIOPAD_L43_REG0_OFFSET 0x01DCU
#define FIOPAD_C43_REG0_OFFSET 0x01E0U
#define FIOPAD_E41_REG0_OFFSET 0x01E4U
#define FIOPAD_L45_REG0_OFFSET 0x01E8U
#define FIOPAD_J43_REG0_OFFSET 0x01ECU
#define FIOPAD_J41_REG0_OFFSET 0x01F0U
#define FIOPAD_L39_REG0_OFFSET 0x01F4U
#define FIOPAD_E37_REG0_OFFSET 0x01F8U
#define FIOPAD_E35_REG0_OFFSET 0x01FCU
#define FIOPAD_G35_REG0_OFFSET 0x0200U
#define FIOPAD_J35_REG0_OFFSET 0x0204U
#define FIOPAD_L37_REG0_OFFSET 0x0208U
#define FIOPAD_N35_REG0_OFFSET 0x020CU
#define FIOPAD_R51_REG0_OFFSET 0x0210U
#define FIOPAD_R49_REG0_OFFSET 0x0214U
#define FIOPAD_N51_REG0_OFFSET 0x0218U
#define FIOPAD_N55_REG0_OFFSET 0x021CU
#define FIOPAD_L55_REG0_OFFSET 0x0220U
#define FIOPAD_J55_REG0_OFFSET 0x0224U
#define FIOPAD_J45_REG0_OFFSET 0x0228U
#define FIOPAD_E47_REG0_OFFSET 0x022CU
#define FIOPAD_G47_REG0_OFFSET 0x0230U
#define FIOPAD_J47_REG0_OFFSET 0x0234U
#define FIOPAD_J49_REG0_OFFSET 0x0238U
#define FIOPAD_N49_REG0_OFFSET 0x023CU
#define FIOPAD_L51_REG0_OFFSET 0x0240U
#define FIOPAD_L49_REG0_OFFSET 0x0244U
#define FIOPAD_N53_REG0_OFFSET 0x0248U
#define FIOPAD_J53_REG0_OFFSET 0x024CU
#define FIOPAD_REG0_BEG_OFFSET FIOPAD_AN59_REG0_OFFSET
#define FIOPAD_REG0_END_OFFSET FIOPAD_J53_REG0_OFFSET
/* register offset of iopad delay */
#define FIOPAD_AJ55_REG1_OFFSET 0x1024U
#define FIOPAD_AL55_REG1_OFFSET 0x1028U
#define FIOPAD_AL53_REG1_OFFSET 0x102CU
#define FIOPAD_AN51_REG1_OFFSET 0x1030U
#define FIOPAD_AR51_REG1_OFFSET 0x1034U
#define FIOPAD_AJ57_REG1_OFFSET 0x1058U
#define FIOPAD_AG59_REG1_OFFSET 0x105CU
#define FIOPAD_AG57_REG1_OFFSET 0x1060U
#define FIOPAD_AE59_REG1_OFFSET 0x1064U
#define FIOPAD_BA55_REG1_OFFSET 0x1074U
#define FIOPAD_BA53_REG1_OFFSET 0x1078U
#define FIOPAD_AR59_REG1_OFFSET 0x107CU
#define FIOPAD_AU59_REG1_OFFSET 0x1080U
#define FIOPAD_A45_REG1_OFFSET 0x10D0U
#define FIOPAD_C45_REG1_OFFSET 0x10D4U
#define FIOPAD_A47_REG1_OFFSET 0x10D8U
#define FIOPAD_A49_REG1_OFFSET 0x10DCU
#define FIOPAD_C49_REG1_OFFSET 0x10E0U
#define FIOPAD_A51_REG1_OFFSET 0x10E4U
#define FIOPAD_A33_REG1_OFFSET 0x10E8U
#define FIOPAD_C33_REG1_OFFSET 0x10ECU
#define FIOPAD_C31_REG1_OFFSET 0x10F0U
#define FIOPAD_A31_REG1_OFFSET 0x10F4U
#define FIOPAD_AJ53_REG1_OFFSET 0x10F8U
#define FIOPAD_AL49_REG1_OFFSET 0x10FCU
#define FIOPAD_AL47_REG1_OFFSET 0x1100U
#define FIOPAD_AN49_REG1_OFFSET 0x1104U
#define FIOPAD_AG51_REG1_OFFSET 0x1108U
#define FIOPAD_AJ51_REG1_OFFSET 0x110CU
#define FIOPAD_AG49_REG1_OFFSET 0x1110U
#define FIOPAD_AE55_REG1_OFFSET 0x1114U
#define FIOPAD_AE53_REG1_OFFSET 0x1118U
#define FIOPAD_AG55_REG1_OFFSET 0x111CU
#define FIOPAD_AJ49_REG1_OFFSET 0x1120U
#define FIOPAD_AC55_REG1_OFFSET 0x1124U
#define FIOPAD_AC53_REG1_OFFSET 0x1128U
#define FIOPAD_AE51_REG1_OFFSET 0x112CU
#define FIOPAD_W51_REG1_OFFSET 0x1130U
#define FIOPAD_W53_REG1_OFFSET 0x1138U
#define FIOPAD_U55_REG1_OFFSET 0x113CU
#define FIOPAD_U53_REG1_OFFSET 0x1140U
#define FIOPAD_AE49_REG1_OFFSET 0x1144U
#define FIOPAD_AC49_REG1_OFFSET 0x1148U
#define FIOPAD_AE47_REG1_OFFSET 0x114CU
#define FIOPAD_AA47_REG1_OFFSET 0x1150U
#define FIOPAD_AA49_REG1_OFFSET 0x1154U
#define FIOPAD_W49_REG1_OFFSET 0x1158U
#define FIOPAD_AA51_REG1_OFFSET 0x115CU
#define FIOPAD_U49_REG1_OFFSET 0x1160U
#define FIOPAD_J59_REG1_OFFSET 0x1168U
#define FIOPAD_L57_REG1_OFFSET 0x116CU
#define FIOPAD_C59_REG1_OFFSET 0x1170U
#define FIOPAD_E59_REG1_OFFSET 0x1174U
#define FIOPAD_J57_REG1_OFFSET 0x1178U
#define FIOPAD_L59_REG1_OFFSET 0x117CU
#define FIOPAD_N59_REG1_OFFSET 0x1180U
#define FIOPAD_E31_REG1_OFFSET 0x118CU
#define FIOPAD_G31_REG1_OFFSET 0x1190U
#define FIOPAD_N41_REG1_OFFSET 0x1194U
#define FIOPAD_N39_REG1_OFFSET 0x1198U
#define FIOPAD_J33_REG1_OFFSET 0x119CU
#define FIOPAD_N33_REG1_OFFSET 0x11A0U
#define FIOPAD_L33_REG1_OFFSET 0x11A4U
#define FIOPAD_N45_REG1_OFFSET 0x11A8U
#define FIOPAD_N43_REG1_OFFSET 0x11ACU
#define FIOPAD_L31_REG1_OFFSET 0x11B0U
#define FIOPAD_J31_REG1_OFFSET 0x11B4U
#define FIOPAD_J29_REG1_OFFSET 0x11B8U
#define FIOPAD_E29_REG1_OFFSET 0x11BCU
#define FIOPAD_G29_REG1_OFFSET 0x11C0U
#define FIOPAD_J37_REG1_OFFSET 0x11CCU
#define FIOPAD_J39_REG1_OFFSET 0x11D0U
#define FIOPAD_G41_REG1_OFFSET 0x11D4U
#define FIOPAD_E43_REG1_OFFSET 0x11D8U
#define FIOPAD_L43_REG1_OFFSET 0x11DCU
#define FIOPAD_C43_REG1_OFFSET 0x11E0U
#define FIOPAD_E41_REG1_OFFSET 0x11E4U
#define FIOPAD_L45_REG1_OFFSET 0x11E8U
#define FIOPAD_J43_REG1_OFFSET 0x11ECU
#define FIOPAD_J41_REG1_OFFSET 0x11F0U
#define FIOPAD_L39_REG1_OFFSET 0x11F4U
#define FIOPAD_E37_REG1_OFFSET 0x11F8U
#define FIOPAD_E35_REG1_OFFSET 0x11FCU
#define FIOPAD_G35_REG1_OFFSET 0x1200U
#define FIOPAD_L55_REG1_OFFSET 0x1220U
#define FIOPAD_J55_REG1_OFFSET 0x1224U
#define FIOPAD_J45_REG1_OFFSET 0x1228U
#define FIOPAD_E47_REG1_OFFSET 0x122CU
#define FIOPAD_G47_REG1_OFFSET 0x1230U
#define FIOPAD_J47_REG1_OFFSET 0x1234U
#define FIOPAD_J49_REG1_OFFSET 0x1238U
#define FIOPAD_N49_REG1_OFFSET 0x123CU
#define FIOPAD_L51_REG1_OFFSET 0x1240U
#define FIOPAD_L49_REG1_OFFSET 0x1244U
#define FIOPAD_N53_REG1_OFFSET 0x1248U
#define FIOPAD_J53_REG1_OFFSET 0x124CU
#define FIOPAD_REG1_BEG_OFFSET FIOPAD_AJ55_REG1_OFFSET
#define FIOPAD_REG1_END_OFFSET FIOPAD_J53_REG1_OFFSET
#ifdef __cplusplus
}
#endif
#endif
bsp/phytium/libraries/standalone/board/phytium-pi/fparameters_comm.h
+725
View File
File diff suppressed because it is too large Load Diff
bsp/phytium/libraries/standalone/port/sdkconfig.h
+3
View File
@@ -50,6 +50,9 @@ extern "C" {
#define CONFIG_TARGET_D2000
#elif defined(TARGET_F2000_4)
#define CONFIG_TARGET_F2000_4
#elif defined(TARGET_PHYTIUMPI)
#define CONFIG_TARGET_E2000
#define CONFIG_TARGET_PHYTIUMPI
#endif
#if defined(LOG_VERBOS)