mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-06-12 20:24:15 +08:00
add apm32F0 serie MCU support (#6789)
* add apm32F0 serie MCU support add apm32f072vb-miniboard bsp update F103/F407 bsp * replace apm32f072vb picture * Update action.yml
This commit is contained in:
luobeihai
GitHub
@@ -37,6 +37,8 @@ jobs:
|
||||
- {RTT_BSP: "acm32/acm32f0x0-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "CME_M7", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "apm32/apm32f103xe-minibroard", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "apm32/apm32f407ig-minibroard", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "apm32/apm32f072vb-miniboard", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "apollo2", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "asm9260t", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
# - {RTT_BSP: "ft2004", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,42 @@
|
||||
*.pyc
|
||||
*.map
|
||||
*.dblite
|
||||
*.elf
|
||||
*.bin
|
||||
*.hex
|
||||
*.axf
|
||||
*.exe
|
||||
*.pdb
|
||||
*.idb
|
||||
*.ilk
|
||||
*.old
|
||||
build
|
||||
Debug
|
||||
documentation/html
|
||||
packages/
|
||||
*~
|
||||
*.o
|
||||
*.obj
|
||||
*.out
|
||||
*.bak
|
||||
*.dep
|
||||
*.lib
|
||||
*.i
|
||||
*.d
|
||||
.DS_Stor*
|
||||
.config 3
|
||||
.config 4
|
||||
.config 5
|
||||
Midea-X1
|
||||
*.uimg
|
||||
GPATH
|
||||
GRTAGS
|
||||
GTAGS
|
||||
.vscode
|
||||
JLinkLog.txt
|
||||
JLinkSettings.ini
|
||||
DebugConfig/
|
||||
RTE/
|
||||
settings/
|
||||
*.uvguix*
|
||||
cconfig.h
|
||||
@@ -0,0 +1,22 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../../.."
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
source "../libraries/Kconfig"
|
||||
source "board/Kconfig"
|
||||
|
||||
@@ -0,0 +1,116 @@
|
||||
# APM32F072VB MINI BOARD BSP 说明
|
||||
|
||||
## 简介
|
||||
|
||||
本文档为 APM32F072VB MINI 开发板（MINI BOARD）的 BSP (板级支持包) 说明。
|
||||
|
||||
主要内容如下：
|
||||
|
||||
- 开发板资源介绍
|
||||
- BSP 快速上手
|
||||
|
||||
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
|
||||
|
||||
## 开发板介绍
|
||||
|
||||
APM32F072VB MINI BOARD，采用标准JTAG/SWD调试接口，引出了全部的IO。开发板外观如下图所示：
|
||||
|
||||
<img src="figures/APM32F072VB.png" alt="image-20221227141551541" style="zoom:50%;" />
|
||||
|
||||
- 有关开发板和芯片的详情可至极海官网查阅。[官网开发板链接 ](https://www.geehy.com/support/apm32?id=192)
|
||||
|
||||
|
||||
该开发板常用 **板载资源** 如下：
|
||||
|
||||
- MCU：APM32F072VBT6，主频 48MHz，128KB FLASH ，16KB RAM
|
||||
- 外部 RAM：无
|
||||
- 外部 FLASH：无
|
||||
- 常用外设
|
||||
- LED：2个，（黄色，PE5/PE6）
|
||||
- 按键：2个，K1（PA1），K2（PA0）
|
||||
- 常用接口：RS232转串口、USB SLAVE
|
||||
- 调试接口：标准 JTAG/SWD
|
||||
|
||||
|
||||
|
||||
## 外设支持
|
||||
|
||||
本 BSP 目前对外设的支持情况如下：
|
||||
|
||||
| **板载外设** | **支持情况** | **备注** |
|
||||
| :----------- | :----------: | :------------------------------------ |
|
||||
| RS232转串口 | 支持 | 使用 UART1/ UART2(通过跳线选择) |
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| GPIO | 支持 | PA0, PA1... PF10 ---> PIN: 0, 1...89 |
|
||||
| UART | 支持 | UART1/2 |
|
||||
| ADC | 支持 | ADC1 |
|
||||
| DAC | 支持 | DAC1 |
|
||||
| RTC | 支持 | 支持外部晶振和内部低速时钟 |
|
||||
| TMR | 支持 | TMR1/2/3/6/7/14/15/16/17 |
|
||||
| PWM | 支持 | TMR3 ->CH1/2/3/4 |
|
||||
| I2C | 支持 | 软件I2C |
|
||||
| SPI | 支持 | SPI1/2 |
|
||||
| WDT | 支持 | IWDT |
|
||||
|
||||
## 使用说明
|
||||
|
||||
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
|
||||
|
||||
|
||||
### 快速上手
|
||||
|
||||
本 BSP 为开发者提供MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
|
||||
|
||||
#### 硬件连接
|
||||
|
||||
使用数据线连接开发板到 PC，打开电源开关。
|
||||
|
||||
#### 编译下载
|
||||
- 方式一：MDK
|
||||
|
||||
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
|
||||
|
||||
> 工程默认配置使用 J-Link 仿真器下载程序，在通过 J-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板
|
||||
|
||||
- 方式二：J-Flash下载
|
||||
|
||||
通过ENV工具的scons指令或MDK编译出bin文件后，再使用J-Flash工具将bin文件下载至开发板即可，大致步骤如下：
|
||||
|
||||
##### 1、建立J-Flash工程
|
||||
|
||||
|
||||
|
||||
**注意**：步骤4选择芯片型号时，要根据自己的开发板所用的芯片型号进行选择。比如本开发板，则选择对应的 **APM32F072VBT6** 。
|
||||
|
||||
##### 2、连接开发板
|
||||
|
||||
|
||||
##### 3、将bin文件拖至工程，起始地址设为0x8000000
|
||||
|
||||
##### 4、点击下载
|
||||
|
||||
|
||||
#### 运行结果
|
||||
|
||||
下载程序成功之后，系统会自动运行，LED 闪烁
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 4.1.0 build Aug 20 2021
|
||||
2006 - 2021 Copyright by rt-thread team
|
||||
msh >
|
||||
```
|
||||
## 注意事项
|
||||
|
||||
- 可在极海官方网站进行所需资料下载，如pack安装包和MINI开发板原理图等（www.geehy.com）;
|
||||
|
||||
## 联系人信息
|
||||
|
||||
-[abbbcc ](https://gitee.com/abbbcc)
|
||||
|
||||
-[stevetong459 ](https://github.com/stevetong459)
|
||||
|
||||
-[luobeihai](https://github.com/luobeihai)
|
||||
@@ -0,0 +1,15 @@
|
||||
# for module compiling
|
||||
import os
|
||||
Import('RTT_ROOT')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
@@ -0,0 +1,60 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
|
||||
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
apm32_library = 'APM32F0xx_Library'
|
||||
rtconfig.BSP_LIBRARY_TYPE = apm32_library
|
||||
|
||||
# include libraries
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, apm32_library, 'SConscript')))
|
||||
|
||||
# include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'Drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -0,0 +1,15 @@
|
||||
from building import *
|
||||
import os
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,33 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-06 zylx first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
|
||||
/* defined the LED2 pin: PE6 */
|
||||
#define LED2_PIN GET_PIN(E, 6)
|
||||
|
||||
int main(void)
|
||||
{
|
||||
int count = 1;
|
||||
/* set LED2 pin mode to output */
|
||||
rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
while (count++)
|
||||
{
|
||||
rt_pin_write(LED2_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED2_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
@@ -0,0 +1,213 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_APM32F072VB
|
||||
bool
|
||||
select SOC_SERIES_APM32F0
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
if BSP_USING_UART
|
||||
config BSP_USING_UART1
|
||||
bool "Enable UART1"
|
||||
default y
|
||||
config BSP_USING_UART2
|
||||
bool "Enable UART2"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ADC
|
||||
bool "Enable ADC"
|
||||
default n
|
||||
select RT_USING_ADC
|
||||
if BSP_USING_ADC
|
||||
config BSP_USING_ADC1
|
||||
bool "Enable ADC1"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_DAC
|
||||
bool "Enable DAC"
|
||||
default n
|
||||
select RT_USING_DAC
|
||||
if BSP_USING_DAC
|
||||
config BSP_USING_DAC1
|
||||
bool "Enable DAC1"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ONCHIP_RTC
|
||||
bool "Enable RTC"
|
||||
select RT_USING_RTC
|
||||
default n
|
||||
if BSP_USING_ONCHIP_RTC
|
||||
choice
|
||||
prompt "Select clock source"
|
||||
default BSP_RTC_USING_LSE
|
||||
|
||||
config BSP_RTC_USING_LSE
|
||||
bool "RTC USING LSE"
|
||||
|
||||
config BSP_RTC_USING_LSI
|
||||
bool "RTC USING LSI"
|
||||
endchoice
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C BUS (software simulation)"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C
|
||||
config BSP_USING_I2C1
|
||||
bool "Enable I2C1 BUS"
|
||||
if BSP_USING_I2C1
|
||||
comment "Notice: PB10 --> 26; PB11 --> 27"
|
||||
config BSP_I2C1_SCL_PIN
|
||||
int "i2c1 scl pin number"
|
||||
range 0 63
|
||||
default 26
|
||||
config BSP_I2C1_SDA_PIN
|
||||
int "I2C1 sda pin number"
|
||||
range 0 63
|
||||
default 27
|
||||
endif
|
||||
config BSP_USING_I2C2
|
||||
bool "Enable I2C2 BUS"
|
||||
if BSP_USING_I2C2
|
||||
comment "Notice: PA0 --> 0; PA1 --> 1"
|
||||
config BSP_I2C2_SCL_PIN
|
||||
int "i2c2 scl pin number"
|
||||
range 0 63
|
||||
default 22
|
||||
config BSP_I2C2_SDA_PIN
|
||||
int "I2C2 sda pin number"
|
||||
range 0 63
|
||||
default 23
|
||||
endif
|
||||
config BSP_USING_I2C3
|
||||
bool "Enable I2C3 BUS"
|
||||
if BSP_USING_I2C3
|
||||
comment "Notice: PB0 --> 16; PB1 --> 17"
|
||||
config BSP_I2C3_SCL_PIN
|
||||
int "i2c3 scl pin number"
|
||||
range 0 63
|
||||
default 8
|
||||
config BSP_I2C3_SDA_PIN
|
||||
int "I2C3 sda pin number"
|
||||
range 0 63
|
||||
default 41
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable SPI1"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI2
|
||||
bool "Enable SPI2"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_TMR
|
||||
bool "Enable Timer"
|
||||
default n
|
||||
select RT_USING_HWTIMER
|
||||
if BSP_USING_TMR
|
||||
config BSP_USING_TMR1
|
||||
bool "Enable TMR1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TMR2
|
||||
bool "Enable TMR2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TMR3
|
||||
bool "Enable TMR3"
|
||||
default n
|
||||
|
||||
config BSP_USING_TMR6
|
||||
bool "Enable TMR6"
|
||||
default n
|
||||
|
||||
config BSP_USING_TMR7
|
||||
bool "Enable TMR7"
|
||||
default n
|
||||
|
||||
config BSP_USING_TMR14
|
||||
bool "Enable TMR14"
|
||||
default n
|
||||
|
||||
config BSP_USING_TMR15
|
||||
bool "Enable TMR15"
|
||||
default n
|
||||
|
||||
config BSP_USING_TMR16
|
||||
bool "Enable TMR16"
|
||||
default n
|
||||
|
||||
config BSP_USING_TMR17
|
||||
bool "Enable TMR17"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
default n
|
||||
select RT_USING_PWM
|
||||
if BSP_USING_PWM
|
||||
menuconfig BSP_USING_PWM3
|
||||
bool "Enable timer3 output PWM"
|
||||
default n
|
||||
if BSP_USING_PWM3
|
||||
config BSP_USING_PWM3_CH1
|
||||
bool "Enable PWM3 channel1"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM3_CH2
|
||||
bool "Enable PWM3 channel2"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM3_CH3
|
||||
bool "Enable PWM3 channel3"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM3_CH4
|
||||
bool "Enable PWM3 channel4"
|
||||
default n
|
||||
endif
|
||||
endif
|
||||
|
||||
config BSP_USING_WDT
|
||||
bool "Enable Watchdog Timer"
|
||||
select RT_USING_WDT
|
||||
default n
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
@@ -0,0 +1,36 @@
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
Import('SDK_LIB')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add general drivers
|
||||
src = Split('''
|
||||
board.c
|
||||
''')
|
||||
|
||||
path = [cwd]
|
||||
|
||||
startup_path_prefix = SDK_LIB
|
||||
|
||||
if rtconfig.PLATFORM in ['armcc', 'armclang']:
|
||||
src += [startup_path_prefix + '/APM32F0xx_Library/Device/Geehy/APM32F0xx/Source/arm/startup_apm32f072.s']
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
src += [startup_path_prefix + '/APM32F0xx_Library/Device/Geehy/APM32F0xx/Source/iar/startup_apm32f072.s']
|
||||
|
||||
if rtconfig.PLATFORM in ['gcc']:
|
||||
src += [startup_path_prefix + '/APM32F0xx_Library/Device/Geehy/APM32F0xx/Source/gcc/startup_apm32f072.S']
|
||||
|
||||
# APM32F030x6 || APM32F030x8 || APM32F030xC
|
||||
# APM32F051x6 || APM32F051x8
|
||||
# APM32F070xB
|
||||
# APM32F071x8 || APM32F071xB
|
||||
# APM32F072x8 || APM32F072xB
|
||||
# APM32F091xB || APM32F091xC
|
||||
# You can select chips from the list above
|
||||
CPPDEFINES = ['APM32F072xB']
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
Return('group')
|
||||
@@ -0,0 +1,127 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-12-21 zylx first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
|
||||
void apm32_usart_init(void)
|
||||
{
|
||||
GPIO_Config_T GPIO_ConfigStruct;
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
RCM_EnableAHBPeriphClock(RCM_AHB_PERIPH_GPIOA);
|
||||
RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_USART1);
|
||||
|
||||
/* Connect PXx to USARTx_Tx */
|
||||
GPIO_ConfigPinAF(GPIOA, GPIO_PIN_SOURCE_9, GPIO_AF_PIN1);
|
||||
|
||||
/* Connect PXx to USARRX_Rx */
|
||||
GPIO_ConfigPinAF(GPIOA, GPIO_PIN_SOURCE_10, GPIO_AF_PIN1);
|
||||
|
||||
/* Configure USART Tx/Rx as alternate function push-pull */
|
||||
GPIO_ConfigStruct.mode = GPIO_MODE_AF;
|
||||
GPIO_ConfigStruct.pin = GPIO_PIN_9;
|
||||
GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
|
||||
GPIO_ConfigStruct.outtype = GPIO_OUT_TYPE_PP;
|
||||
GPIO_ConfigStruct.pupd = GPIO_PUPD_PU;
|
||||
GPIO_Config(GPIOA, &GPIO_ConfigStruct);
|
||||
|
||||
GPIO_ConfigStruct.pin = GPIO_PIN_10;
|
||||
GPIO_Config(GPIOA, &GPIO_ConfigStruct);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART2
|
||||
RCM_EnableAHBPeriphClock(RCM_AHB_PERIPH_GPIOA);
|
||||
RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_USART2);
|
||||
|
||||
/* Connect PXx to USARTx_Tx */
|
||||
GPIO_ConfigPinAF(GPIOA, GPIO_PIN_SOURCE_2, GPIO_AF_PIN1);
|
||||
|
||||
/* Connect PXx to USARRX_Rx */
|
||||
GPIO_ConfigPinAF(GPIOA, GPIO_PIN_SOURCE_3, GPIO_AF_PIN1);
|
||||
|
||||
/* Configure USART Tx/Rx as alternate function push-pull */
|
||||
GPIO_ConfigStruct.mode = GPIO_MODE_AF;
|
||||
GPIO_ConfigStruct.pin = GPIO_PIN_2;
|
||||
GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
|
||||
GPIO_ConfigStruct.outtype = GPIO_OUT_TYPE_PP;
|
||||
GPIO_ConfigStruct.pupd = GPIO_PUPD_PU;
|
||||
GPIO_Config(GPIOA, &GPIO_ConfigStruct);
|
||||
|
||||
GPIO_ConfigStruct.pin = GPIO_PIN_3;
|
||||
GPIO_Config(GPIOA, &GPIO_ConfigStruct);
|
||||
#endif
|
||||
}
|
||||
|
||||
void apm32_msp_spi_init(void *Instance)
|
||||
{
|
||||
#ifdef BSP_USING_SPI
|
||||
GPIO_Config_T GPIO_InitStructure;
|
||||
SPI_T *spi_x = (SPI_T *)Instance;
|
||||
|
||||
if(spi_x == SPI1)
|
||||
{
|
||||
/* Enable related Clock */
|
||||
RCM_EnableAHBPeriphClock(RCM_AHB_PERIPH_GPIOE);
|
||||
RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_SPI1);
|
||||
RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_SYSCFG);
|
||||
|
||||
/* Config SPI PinAF */
|
||||
GPIO_ConfigPinAF(GPIOE, GPIO_PIN_SOURCE_15, GPIO_AF_PIN1);
|
||||
GPIO_ConfigPinAF(GPIOE, GPIO_PIN_SOURCE_14, GPIO_AF_PIN1);
|
||||
GPIO_ConfigPinAF(GPIOE, GPIO_PIN_SOURCE_13, GPIO_AF_PIN1);
|
||||
|
||||
/* Config SPI GPIO*/
|
||||
GPIO_ConfigStructInit(&GPIO_InitStructure);
|
||||
GPIO_InitStructure.pin = GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
GPIO_InitStructure.speed = GPIO_SPEED_50MHz;
|
||||
GPIO_InitStructure.mode = GPIO_MODE_AF;
|
||||
GPIO_InitStructure.outtype = GPIO_OUT_TYPE_PP;
|
||||
GPIO_InitStructure.pupd = GPIO_PUPD_NO;
|
||||
GPIO_Config(GPIOE, &GPIO_InitStructure);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void apm32_msp_timer_init(void *Instance)
|
||||
{
|
||||
#ifdef BSP_USING_PWM
|
||||
GPIO_Config_T gpio_config;
|
||||
TMR_T *tmr_x = (TMR_T *)Instance;
|
||||
|
||||
if (tmr_x == TMR3)
|
||||
{
|
||||
RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_TMR3);
|
||||
|
||||
/* TMR3 channel 1 gpio init */
|
||||
GPIO_ConfigPinAF(GPIOC, GPIO_PIN_SOURCE_6, GPIO_AF_PIN0);
|
||||
gpio_config.pin = GPIO_PIN_6;
|
||||
gpio_config.mode = GPIO_MODE_AF;
|
||||
gpio_config.outtype = GPIO_OUT_TYPE_PP;
|
||||
gpio_config.pupd = GPIO_PUPD_NO;
|
||||
gpio_config.speed = GPIO_SPEED_50MHz;
|
||||
GPIO_Config(GPIOC, &gpio_config);
|
||||
|
||||
/* TMR3 channel 2 gpio init */
|
||||
GPIO_ConfigPinAF(GPIOC, GPIO_PIN_SOURCE_7, GPIO_AF_PIN0);
|
||||
gpio_config.pin = GPIO_PIN_7;
|
||||
GPIO_Config(GPIOC, &gpio_config);
|
||||
|
||||
/* TMR3 channel 3 gpio init */
|
||||
GPIO_ConfigPinAF(GPIOC, GPIO_PIN_SOURCE_8, GPIO_AF_PIN0);
|
||||
gpio_config.pin = GPIO_PIN_8;
|
||||
GPIO_Config(GPIOC, &gpio_config);
|
||||
|
||||
/* TMR3 channel 4 gpio init */
|
||||
GPIO_ConfigPinAF(GPIOC, GPIO_PIN_SOURCE_9, GPIO_AF_PIN0);
|
||||
gpio_config.pin = GPIO_PIN_9;
|
||||
GPIO_Config(GPIOC, &gpio_config);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
@@ -0,0 +1,81 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-20 Abbcc first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <apm32f0xx.h>
|
||||
|
||||
#include "apm32f0xx_gpio.h"
|
||||
#include "apm32f0xx_syscfg.h"
|
||||
#include "apm32f0xx_rcm.h"
|
||||
#include "apm32f0xx_misc.h"
|
||||
#include "apm32f0xx_eint.h"
|
||||
#include "apm32f0xx_usart.h"
|
||||
|
||||
#if defined(RT_USING_ADC)
|
||||
#include "apm32f0xx_adc.h"
|
||||
#endif
|
||||
#if defined(RT_USING_DAC)
|
||||
#include "apm32f0xx_dac.h"
|
||||
#endif
|
||||
#if defined(RT_USING_RTC)
|
||||
#include "apm32f0xx_rtc.h"
|
||||
#include "apm32f0xx_pmu.h"
|
||||
#endif
|
||||
#if defined(RT_USING_SPI)
|
||||
#include "apm32f0xx_spi.h"
|
||||
#endif
|
||||
#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM)
|
||||
#include "apm32f0xx_tmr.h"
|
||||
#endif
|
||||
#if defined(RT_USING_WDT)
|
||||
#include "apm32f0xx_iwdt.h"
|
||||
#include "apm32f0xx_wwdt.h"
|
||||
#endif
|
||||
|
||||
#include "drv_common.h"
|
||||
#include "drv_gpio.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define APM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
|
||||
#define APM32_FLASH_SIZE (128 * 1024)
|
||||
#define APM32_FLASH_END_ADDRESS ((uint32_t)(APM32_FLASH_START_ADRESS + APM32_FLASH_SIZE))
|
||||
|
||||
/* Internal SRAM memory size[Kbytes] <8-64>, Default: 64 */
|
||||
#define APM32_SRAM_SIZE 16
|
||||
#define APM32_SRAM_END (0x20000000 + APM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_END APM32_SRAM_END
|
||||
|
||||
void SystemClock_Config(void);
|
||||
|
||||
void apm32_usart_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BOARD_H__ */
|
||||
@@ -0,0 +1,28 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite, last block CSTACK};
|
||||
@@ -0,0 +1,163 @@
|
||||
/*
|
||||
* linker script for APM32F0xx with GNU ld
|
||||
*/
|
||||
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 128K /* 128KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 16K /* 16K sram */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x400;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
} > ROM = 0
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
_start_address_init_data = .;
|
||||
} > ROM
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
_start_address_data = .;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
|
||||
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
_end_address_data = .;
|
||||
} >RAM
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
_end_stack = .;
|
||||
} >RAM
|
||||
|
||||
__bss_start = .;
|
||||
_start_address_bss = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > RAM
|
||||
__bss_end = .;
|
||||
_end_address_bss = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
@@ -0,0 +1,15 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00020000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00020000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00004000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 858 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 46 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 9.7 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 3.5 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 12 KiB |
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\project.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,241 @@
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_KSERVICE_USING_STDLIB
|
||||
#define RT_DEBUG
|
||||
#define RT_DEBUG_COLOR
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x50000
|
||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M0
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
#define RT_USING_MSH
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
#define RT_LIBC_DEFAULT_TIMEZONE 8
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
|
||||
/* Network */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
||||
|
||||
|
||||
/* XML: Extensible Markup Language */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* LVGL: powerful and easy-to-use embedded GUI library */
|
||||
|
||||
|
||||
/* u8g2: a monochrome graphic library */
|
||||
|
||||
|
||||
/* PainterEngine: A cross-platform graphics application framework written in C language */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* enhanced kernel services */
|
||||
|
||||
|
||||
/* acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
|
||||
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Projects */
|
||||
|
||||
|
||||
/* Sensors */
|
||||
|
||||
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
#define SOC_FAMILY_APM32
|
||||
#define SOC_SERIES_APM32F0
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_APM32F072VB
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART1
|
||||
|
||||
/* Board extended module Drivers */
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,184 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m0'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = r'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iccarm'
|
||||
EXEC_PATH = r'D:/IAR'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
CXX = PREFIX + 'g++'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M0 '
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'armclang':
|
||||
# toolchains
|
||||
CC = 'armclang'
|
||||
CXX = 'armclang'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M0 '
|
||||
CFLAGS = ' --target=arm-arm-none-eabi -mcpu=cortex-m0 '
|
||||
CFLAGS += ' -mcpu=cortex-m0 '
|
||||
CFLAGS += ' -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar '
|
||||
CFLAGS += ' -gdwarf-3 -ffunction-sections '
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers '
|
||||
LFLAGS += ' --list rt-thread.map '
|
||||
LFLAGS += r' --strict --scatter "board\linker_scripts\link.sct" '
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib'
|
||||
|
||||
EXEC_PATH += '/ARM/ARMCLANG/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O1' # armclang recommend
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iccarm':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M0'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=None'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M0'
|
||||
AFLAGS += ' --fpu None'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\template.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
@@ -0,0 +1,185 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc; *.md</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>4</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0APM32F0xx_128.FLM -FS08000000 -FL020000 -FP0($$Device:APM32F072VB$Flash\APM32F0xx_128.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0APM32F0xx_128 -FS08000000 -FL020000 -FP0($$Device:APM32F072VB$Flash\APM32F0xx_128.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
@@ -0,0 +1,405 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>APM32F072VB</Device>
|
||||
<Vendor>Geehy</Vendor>
|
||||
<PackID>Geehy.APM32F0xx_DFP.1.0.7</PackID>
|
||||
<PackURL>https://www.geehy.com/uploads/tool/</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x4000) IROM(0x08000000,0x20000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0APM32F0xx_128 -FS08000000 -FL020000 -FP0($$Device:APM32F072VB$Flash\APM32F0xx_128.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:APM32F072VB$Device\Device\Geehy\APM32F0xx\Include\apm32f0xx.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:APM32F072VB$SVD\APM32F072.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
|
||||
<OutputName>rt-thread</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -REMAP </SimDllArguments>
|
||||
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM0+</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> </TargetDllArguments>
|
||||
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM0+</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M0+"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<RvdsCdeCp>0</RvdsCdeCp>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x4000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x4000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<ClangAsOpt>4</ClangAsOpt>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
<LayName>template</LayName>
|
||||
<LayPrjMark>1</LayPrjMark>
|
||||
</Layer>
|
||||
</Layers>
|
||||
</LayerInfo>
|
||||
|
||||
</Project>
|
||||
File diff suppressed because it is too large
Load Diff
@@ -57,6 +57,7 @@ SECTIONS
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
_start_address_init_data = .;
|
||||
} > CODE
|
||||
__exidx_end = .;
|
||||
|
||||
@@ -67,6 +68,7 @@ SECTIONS
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
_start_address_data = .;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
@@ -75,6 +77,7 @@ SECTIONS
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
_end_address_data = .;
|
||||
} >DATA
|
||||
|
||||
.stack :
|
||||
@@ -85,6 +88,7 @@ SECTIONS
|
||||
} >DATA
|
||||
|
||||
__bss_start = .;
|
||||
_start_address_bss = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
@@ -102,6 +106,7 @@ SECTIONS
|
||||
*(.bss.init)
|
||||
} > DATA
|
||||
__bss_end = .;
|
||||
_end_address_bss = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -47,9 +47,9 @@
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x40101
|
||||
#define ARCH_ARM
|
||||
#define RT_VER_NUM 0x50000
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M3
|
||||
|
||||
@@ -82,6 +82,7 @@
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_USING_DMA
|
||||
@@ -170,6 +171,11 @@
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
@@ -177,6 +183,9 @@
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
@@ -187,13 +196,38 @@
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
|
||||
/* Privated Packages of RealThread */
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Network Utilities */
|
||||
/* Projects */
|
||||
|
||||
|
||||
/* RT-Thread Smart */
|
||||
/* Sensors */
|
||||
|
||||
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
#define SOC_FAMILY_APM32
|
||||
#define SOC_SERIES_APM32F1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -15,6 +15,7 @@
|
||||
#include <apm32f4xx.h>
|
||||
|
||||
#include "apm32f4xx_gpio.h"
|
||||
#include "apm32f4xx_syscfg.h"
|
||||
#include "apm32f4xx_rcm.h"
|
||||
#include "apm32f4xx_misc.h"
|
||||
#include "apm32f4xx_rcm.h"
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -47,9 +47,9 @@
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x40101
|
||||
#define ARCH_ARM
|
||||
#define RT_VER_NUM 0x50000
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M4
|
||||
|
||||
@@ -82,6 +82,7 @@
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_USING_DMA
|
||||
@@ -170,6 +171,11 @@
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
@@ -177,6 +183,9 @@
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
@@ -187,13 +196,38 @@
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
|
||||
/* Privated Packages of RealThread */
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Network Utilities */
|
||||
/* Projects */
|
||||
|
||||
|
||||
/* RT-Thread Smart */
|
||||
/* Sensors */
|
||||
|
||||
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
#define SOC_FAMILY_APM32
|
||||
#define SOC_SERIES_APM32F4
|
||||
|
||||
@@ -0,0 +1,364 @@
|
||||
/*!
|
||||
* @file apm32f0xx_adc.h
|
||||
*
|
||||
* @brief This file contains all the functions prototypes for the ADC firmware library
|
||||
*
|
||||
* @version V1.0.3
|
||||
*
|
||||
* @date 2022-09-20
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* Copyright (C) 2020-2022 Geehy Semiconductor
|
||||
*
|
||||
* You may not use this file except in compliance with the
|
||||
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
|
||||
*
|
||||
* The program is only for reference, which is distributed in the hope
|
||||
* that it will be useful and instructional for customers to develop
|
||||
* their software. Unless required by applicable law or agreed to in
|
||||
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
|
||||
* and limitations under the License.
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion */
|
||||
#ifndef __APM32F0XX_ADC_H
|
||||
#define __APM32F0XX_ADC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes */
|
||||
#include "apm32f0xx.h"
|
||||
|
||||
/** @addtogroup APM32F0xx_StdPeriphDriver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @addtogroup ADC_Driver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_Macros Macros
|
||||
@{
|
||||
*/
|
||||
|
||||
/* ADC_channels */
|
||||
#define ADC_Channel_TempSensor ((uint32_t)ADC_CHANNEL_16) /*!< ADC TempSensor Channel definition */
|
||||
#define ADC_Channel_Vrefint ((uint32_t)ADC_CHANNEL_17) /*!< ADC Vrefint Channel definition */
|
||||
#define ADC_Channel_Vbat ((uint32_t)ADC_CHANNEL_18) /*!< ADC Vbat Channel definition */
|
||||
|
||||
/* ADC CFG mask */
|
||||
#define CFG1_CLEAR_MASK ((uint32_t)0xFFFFD203)
|
||||
|
||||
/* Calibration time out */
|
||||
#define CALIBRATION_TIMEOUT ((uint32_t)0x0000F000)
|
||||
|
||||
/**@} end of group ADC_Macros */
|
||||
|
||||
/** @defgroup ADC_Enumerations Enumerations
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief ADC conversion mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_CONVERSION_SINGLE = ((uint8_t)0), /*!< Single conversion mode */
|
||||
ADC_CONVERSION_CONTINUOUS = ((uint8_t)1), /*!< Continuous conversion mode */
|
||||
} ADC_CONVERSION_T;
|
||||
|
||||
/**
|
||||
* @brief ADC Jitter
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_JITTER_PCLKDIV2 = ((uint8_t)0x01), /*!< ADC clocked by PCLK div2 */
|
||||
ADC_JITTER_PCLKDIV4 = ((uint8_t)0x02), /*!< ADC clocked by PCLK div4 */
|
||||
} ADC_JITTER_T;
|
||||
|
||||
/**
|
||||
* @brief ADC clock mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_CLOCK_MODE_ASYNCLK = ((uint8_t)0x00), /*!< ADC Asynchronous clock mode */
|
||||
ADC_CLOCK_MODE_SYNCLKDIV2 = ((uint8_t)0x01), /*!< Synchronous clock mode divided by 2 */
|
||||
ADC_CLOCK_MODE_SYNCLKDIV4 = ((uint8_t)0x02), /*!< Synchronous clock mode divided by 4 */
|
||||
} ADC_CLOCK_MODE_T;
|
||||
|
||||
/**
|
||||
* @brief ADC data resolution
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_RESOLUTION_12B = ((uint8_t)0x00), /*!< ADC Resolution is 12 bits */
|
||||
ADC_RESOLUTION_10B = ((uint8_t)0x01), /*!< ADC Resolution is 10 bits */
|
||||
ADC_RESOLUTION_8B = ((uint8_t)0x02), /*!< ADC Resolution is 8 bits */
|
||||
ADC_RESOLUTION_6B = ((uint8_t)0x03), /*!< ADC Resolution is 6 bits */
|
||||
} ADC_RESOLUTION_T;
|
||||
|
||||
/**
|
||||
* @brief ADC data alignment
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_DATA_ALIGN_RIGHT = ((uint8_t)0), /*!< Data alignment right */
|
||||
ADC_DATA_ALIGN_LEFT = ((uint8_t)1), /*!< Data alignment left */
|
||||
} ADC_DATA_ALIGN_T;
|
||||
|
||||
/**
|
||||
* @brief ADC scan sequence direction
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_SCAN_DIR_UPWARD = ((uint8_t)0), /*!< from CHSEL0 to CHSEL17 */
|
||||
ADC_SCAN_DIR_BACKWARD = ((uint8_t)1), /*!< from CHSEL17 to CHSEL0 */
|
||||
} ADC_SCAN_DIR_T;
|
||||
|
||||
/**
|
||||
* @brief ADC DMA Mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_DMA_MODE_ONESHOUT = ((uint8_t)0), /*!< ADC DMA Mode Select one shot */
|
||||
ADC_DMA_MODE_CIRCULAR = ((uint8_t)1), /*!< ADC DMA Mode Select circular */
|
||||
} ADC_DMA_MODE_T;
|
||||
|
||||
/**
|
||||
* @brief ADC external conversion trigger edge selectio
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_EXT_TRIG_EDGE_NONE = ((uint8_t)0x00), /*!< ADC External Trigger Conversion mode disabled */
|
||||
ADC_EXT_TRIG_EDGE_RISING = ((uint8_t)0x01), /*!< ADC External Trigger Conversion mode rising edge */
|
||||
ADC_EXT_TRIG_EDGE_FALLING = ((uint8_t)0x02), /*!< ADC External Trigger Conversion mode falling edge */
|
||||
ADC_EXT_TRIG_EDGE_ALL = ((uint8_t)0x03), /*!< ADC External Trigger Conversion mode rising and falling edges */
|
||||
} ADC_EXT_TRIG_EDGE_T;
|
||||
|
||||
/**
|
||||
* @brief ADC external trigger sources selection
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_EXT_TRIG_CONV_TRG0 = ((uint8_t)0x00), /*!< ADC External Trigger Conversion timer1 TRG0 */
|
||||
ADC_EXT_TRIG_CONV_TRG1 = ((uint8_t)0x01), /*!< ADC External Trigger Conversion timer1 CC4 */
|
||||
ADC_EXT_TRIG_CONV_TRG2 = ((uint8_t)0x02), /*!< ADC External Trigger Conversion timer2 TRGO */
|
||||
ADC_EXT_TRIG_CONV_TRG3 = ((uint8_t)0x03), /*!< ADC External Trigger Conversion timer3 TRG0 */
|
||||
ADC_EXT_TRIG_CONV_TRG4 = ((uint8_t)0x04), /*!< ADC External Trigger Conversion timer15 TRG0 */
|
||||
} ADC_EXT_TRIG_CONV_T;
|
||||
|
||||
/**
|
||||
* @brief ADC analog watchdog channel selection
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_ANALG_WDT_CHANNEL_0 = ((uint8_t)0x00), /*!< AWD Channel 0 */
|
||||
ADC_ANALG_WDT_CHANNEL_1 = ((uint8_t)0x01), /*!< AWD Channel 1 */
|
||||
ADC_ANALG_WDT_CHANNEL_2 = ((uint8_t)0x02), /*!< AWD Channel 2 */
|
||||
ADC_ANALG_WDT_CHANNEL_3 = ((uint8_t)0x03), /*!< AWD Channel 3 */
|
||||
ADC_ANALG_WDT_CHANNEL_4 = ((uint8_t)0x04), /*!< AWD Channel 4 */
|
||||
ADC_ANALG_WDT_CHANNEL_5 = ((uint8_t)0x05), /*!< AWD Channel 5 */
|
||||
ADC_ANALG_WDT_CHANNEL_6 = ((uint8_t)0x06), /*!< AWD Channel 6 */
|
||||
ADC_ANALG_WDT_CHANNEL_7 = ((uint8_t)0x07), /*!< AWD Channel 7 */
|
||||
ADC_ANALG_WDT_CHANNEL_8 = ((uint8_t)0x08), /*!< AWD Channel 8 */
|
||||
ADC_ANALG_WDT_CHANNEL_9 = ((uint8_t)0x09), /*!< AWD Channel 9 */
|
||||
ADC_ANALG_WDT_CHANNEL_10 = ((uint8_t)0x0A), /*!< AWD Channel 10 */
|
||||
ADC_ANALG_WDT_CHANNEL_11 = ((uint8_t)0x0B), /*!< AWD Channel 11 */
|
||||
ADC_ANALG_WDT_CHANNEL_12 = ((uint8_t)0x0C), /*!< AWD Channel 12 */
|
||||
ADC_ANALG_WDT_CHANNEL_13 = ((uint8_t)0x0D), /*!< AWD Channel 13 */
|
||||
ADC_ANALG_WDT_CHANNEL_14 = ((uint8_t)0x0E), /*!< AWD Channel 14 */
|
||||
ADC_ANALG_WDT_CHANNEL_15 = ((uint8_t)0x0F), /*!< AWD Channel 15 */
|
||||
ADC_ANALG_WDT_CHANNEL_16 = ((uint8_t)0x10), /*!< AWD Channel 16 */
|
||||
ADC_ANALG_WDT_CHANNEL_17 = ((uint8_t)0x11), /*!< AWD Channel 17 */
|
||||
ADC_ANALG_WDT_CHANNEL_18 = ((uint8_t)0x12), /*!< AWD Channel 18 */
|
||||
} ADC_ANALG_WDT_CHANNEL_T;
|
||||
|
||||
/**
|
||||
* @brief ADC sampling times
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_SAMPLE_TIME_1_5 = ((uint8_t)0x00), /*!< 1.5 ADC clock cycles */
|
||||
ADC_SAMPLE_TIME_7_5 = ((uint8_t)0x01), /*!< 7.5 ADC clock cycles */
|
||||
ADC_SAMPLE_TIME_13_5 = ((uint8_t)0x02), /*!< 13.5 ADC clock cycles */
|
||||
ADC_SAMPLE_TIME_28_5 = ((uint8_t)0x03), /*!< 28.5 ADC clock cycles */
|
||||
ADC_SAMPLE_TIME_41_5 = ((uint8_t)0x04), /*!< 41.5 ADC clock cycles */
|
||||
ADC_SAMPLE_TIME_55_5 = ((uint8_t)0x05), /*!< 55.5 ADC clock cycles */
|
||||
ADC_SAMPLE_TIME_71_5 = ((uint8_t)0x06), /*!< 71.5 ADC clock cycles */
|
||||
ADC_SAMPLE_TIME_239_5 = ((uint8_t)0x07), /*!< 239.5 ADC clock cycles */
|
||||
} ADC_SAMPLE_TIME_T;
|
||||
|
||||
/**
|
||||
* @brief ADC channel selection
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_CHANNEL_0 = ((uint32_t)0x00000001), /*!< ADC Channel 0 */
|
||||
ADC_CHANNEL_1 = ((uint32_t)0x00000002), /*!< ADC Channel 1 */
|
||||
ADC_CHANNEL_2 = ((uint32_t)0x00000004), /*!< ADC Channel 2 */
|
||||
ADC_CHANNEL_3 = ((uint32_t)0x00000008), /*!< ADC Channel 3 */
|
||||
ADC_CHANNEL_4 = ((uint32_t)0x00000010), /*!< ADC Channel 4 */
|
||||
ADC_CHANNEL_5 = ((uint32_t)0x00000020), /*!< ADC Channel 5 */
|
||||
ADC_CHANNEL_6 = ((uint32_t)0x00000040), /*!< ADC Channel 6 */
|
||||
ADC_CHANNEL_7 = ((uint32_t)0x00000080), /*!< ADC Channel 7 */
|
||||
ADC_CHANNEL_8 = ((uint32_t)0x00000100), /*!< ADC Channel 8 */
|
||||
ADC_CHANNEL_9 = ((uint32_t)0x00000200), /*!< ADC Channel 9 */
|
||||
ADC_CHANNEL_10 = ((uint32_t)0x00000400), /*!< ADC Channel 10 */
|
||||
ADC_CHANNEL_11 = ((uint32_t)0x00000800), /*!< ADC Channel 11 */
|
||||
ADC_CHANNEL_12 = ((uint32_t)0x00001000), /*!< ADC Channel 12 */
|
||||
ADC_CHANNEL_13 = ((uint32_t)0x00002000), /*!< ADC Channel 13 */
|
||||
ADC_CHANNEL_14 = ((uint32_t)0x00004000), /*!< ADC Channel 14 */
|
||||
ADC_CHANNEL_15 = ((uint32_t)0x00008000), /*!< ADC Channel 15 */
|
||||
ADC_CHANNEL_16 = ((uint32_t)0x00010000), /*!< ADC Channel 16 */
|
||||
ADC_CHANNEL_17 = ((uint32_t)0x00020000), /*!< ADC Channel 17 */
|
||||
ADC_CHANNEL_18 = ((uint32_t)0x00040000), /*!< ADC Channel 18 (Not for APM32F030 devices) */
|
||||
} ADC_CHANNEL_T;
|
||||
|
||||
/**
|
||||
* @brief ADC interrupts definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_INT_ADRDY = ((uint8_t)0x01), /*!< ADC ready interrupt */
|
||||
ADC_INT_CSMP = ((uint8_t)0x02), /*!< End of sampling interrupt */
|
||||
ADC_INT_CC = ((uint8_t)0x04), /*!< End of conversion interrupt */
|
||||
ADC_INT_CS = ((uint8_t)0x08), /*!< End of sequence interrupt */
|
||||
ADC_INT_OVR = ((uint8_t)0x10), /*!< ADC overrun interrupt */
|
||||
ADC_INT_AWD = ((uint8_t)0x80), /*!< Analog watchdog interrupt */
|
||||
} ADC_INT_T;
|
||||
|
||||
/**
|
||||
* @brief ADC Interrupt flag
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_INT_FLAG_ADRDY = ((uint8_t)0x01), /*!< ADC ready interrupt flag */
|
||||
ADC_INT_FLAG_CSMP = ((uint8_t)0x02), /*!< End of sampling interrupt flag */
|
||||
ADC_INT_FLAG_CC = ((uint8_t)0x04), /*!< End of conversion interrupt flag */
|
||||
ADC_INT_FLAG_CS = ((uint8_t)0x08), /*!< End of sequence interrupt flag */
|
||||
ADC_INT_FLAG_OVR = ((uint8_t)0x10), /*!< ADC overrun interrupt flag */
|
||||
ADC_INT_FLAG_AWD = ((uint8_t)0x80), /*!< Analog watchdog interrupt flag */
|
||||
} ADC_INT_FLAG_T;
|
||||
|
||||
/**
|
||||
* @brief ADC flag
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ADC_FLAG_ADCON = ((uint32_t)0x01000001), /*!< ADC enable flag */
|
||||
ADC_FLAG_ADCOFF = ((uint32_t)0x01000002), /*!< ADC disable flag */
|
||||
ADC_FLAG_ADCSTA = ((uint32_t)0x01000004), /*!< ADC start conversion flag */
|
||||
ADC_FLAG_ADCSTOP = ((uint32_t)0x01000010), /*!< ADC stop conversion flag */
|
||||
ADC_FLAG_ADCCAL = ((int) 0x81000000), /*!< ADC calibration flag */
|
||||
ADC_FLAG_ADRDY = ((uint8_t)0x01), /*!< ADC ready flag */
|
||||
ADC_FLAG_CSMP = ((uint8_t)0x02), /*!< End of sampling flag */
|
||||
ADC_FLAG_CC = ((uint8_t)0x04), /*!< End of conversion flag */
|
||||
ADC_FLAG_CS = ((uint8_t)0x08), /*!< End of sequence flag */
|
||||
ADC_FLAG_OVR = ((uint8_t)0x10), /*!< ADC overrun flag */
|
||||
ADC_FLAG_AWD = ((uint8_t)0x80), /*!< Analog watchdog flag */
|
||||
} ADC_FLAG_T;
|
||||
|
||||
/**@} end of group ADC_Enumerations */
|
||||
|
||||
/** @defgroup ADC_Structures Structures
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief ADC Config struct definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
ADC_RESOLUTION_T resolution; /*!< Specifies the ADC data resolution */
|
||||
ADC_DATA_ALIGN_T dataAlign; /*!< Specifies the data alignment mode */
|
||||
ADC_SCAN_DIR_T scanDir; /*!< Specifies the scan mode */
|
||||
ADC_CONVERSION_T convMode; /*!< Specifies the conversion mode */
|
||||
ADC_EXT_TRIG_CONV_T extTrigConv; /*!< Specifies the external trigger sources */
|
||||
ADC_EXT_TRIG_EDGE_T extTrigEdge; /*!< Specifies the external conversion trigger edge */
|
||||
} ADC_Config_T;
|
||||
|
||||
/**@} end of group ADC_Structures */
|
||||
|
||||
/** @defgroup ADC_Variables Variables
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group ADC_Variables */
|
||||
|
||||
/** @defgroup ADC_Functions Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/* ADC reset and configuration */
|
||||
void ADC_Reset(void);
|
||||
void ADC_Config(ADC_Config_T* adcConfig);
|
||||
void ADC_ConfigStructInit(ADC_Config_T* adcConfig);
|
||||
void ADC_Enable(void);
|
||||
void ADC_Disable(void);
|
||||
void ADC_EnableAutoPowerOff(void);
|
||||
void ADC_DisableAutoPowerOff(void);
|
||||
void ADC_EnableWaitMode(void);
|
||||
void ADC_DisableWaitMode(void);
|
||||
void ADC_ConfigChannel(uint32_t channel, uint8_t sampleTime);
|
||||
void ADC_EnableContinuousMode(void);
|
||||
void ADC_DisableContinuousMode(void);
|
||||
void ADC_EnableDiscMode(void);
|
||||
void ADC_DisableDiscMode(void);
|
||||
void ADC_EnableOverrunMode(void);
|
||||
void ADC_DisableOverrunMode(void);
|
||||
void ADC_StopConversion(void);
|
||||
void ADC_StartConversion(void);
|
||||
void ADC_DMARequestMode(ADC_DMA_MODE_T DMARequestMode);
|
||||
|
||||
/* ADC clock and jitter */
|
||||
void ADC_ClockMode(ADC_CLOCK_MODE_T clockMode);
|
||||
void ADC_EnableJitter(ADC_JITTER_T jitter);
|
||||
void ADC_DisableJitter(ADC_JITTER_T jitter);
|
||||
|
||||
/* ADC analog watchdog */
|
||||
void ADC_EnableAnalogWatchdog(void);
|
||||
void ADC_DisableAnalogWatchdog(void);
|
||||
void ADC_AnalogWatchdogLowThreshold(uint16_t lowThreshold);
|
||||
void ADC_AnalogWatchdogHighThreshold(uint16_t highThreshold);
|
||||
void ADC_AnalogWatchdogSingleChannel(uint32_t channel);
|
||||
void ADC_EnableAnalogWatchdogSingleChannel(void);
|
||||
void ADC_DisableAnalogWatchdogSingleChannel(void);
|
||||
|
||||
/* ADC common configuration */
|
||||
void ADC_EnableTempSensor(void);
|
||||
void ADC_DisableTempSensor(void);
|
||||
void ADC_EnableVrefint(void);
|
||||
void ADC_DisableVrefint(void);
|
||||
void ADC_EnableVbat(void); /*!< Not for APM32F030 devices */
|
||||
void ADC_DisableVbat(void); /*!< Not for APM32F030 devices */
|
||||
|
||||
/* Read data */
|
||||
uint32_t ADC_ReadCalibrationFactor(void);
|
||||
uint16_t ADC_ReadConversionValue(void);
|
||||
|
||||
/* DMA */
|
||||
void ADC_EnableDMA(void);
|
||||
void ADC_DisableDMA(void);
|
||||
|
||||
/* Interrupt and flag */
|
||||
void ADC_EnableInterrupt(uint8_t interrupt);
|
||||
void ADC_DisableInterrupt(uint8_t interrupt);
|
||||
uint8_t ADC_ReadStatusFlag(ADC_FLAG_T flag);
|
||||
void ADC_ClearStatusFlag(uint32_t flag);
|
||||
uint8_t ADC_ReadIntFlag(ADC_INT_FLAG_T flag);
|
||||
void ADC_ClearIntFlag(uint32_t flag);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __APM32F0XX_ADC_H */
|
||||
|
||||
/**@} end of group ADC_Functions */
|
||||
/**@} end of group ADC_Driver */
|
||||
/**@} end of group APM32F0xx_StdPeriphDriver */
|
||||
@@ -0,0 +1,413 @@
|
||||
/*!
|
||||
* @file apm32f0xx_can.h
|
||||
*
|
||||
* @brief This file contains all the functions prototypes for the CAN firmware library
|
||||
*
|
||||
* @version V1.0.3
|
||||
*
|
||||
* @date 2022-09-20
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* Copyright (C) 2020-2022 Geehy Semiconductor
|
||||
*
|
||||
* You may not use this file except in compliance with the
|
||||
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
|
||||
*
|
||||
* The program is only for reference, which is distributed in the hope
|
||||
* that it will be useful and instructional for customers to develop
|
||||
* their software. Unless required by applicable law or agreed to in
|
||||
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
|
||||
* and limitations under the License.
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion */
|
||||
#ifndef __APM32F0XX_CAN_H
|
||||
#define __APM32F0XX_CAN_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes */
|
||||
#include "apm32f0xx.h"
|
||||
|
||||
/** @addtogroup APM32F0xx_StdPeriphDriver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @addtogroup CAN_Driver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @defgroup CAN_Macros Macros
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group CAN_Macros */
|
||||
|
||||
/** @defgroup CAN_Enumerations Enumerations
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief CAN operating mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_OPERATING_MODE_INIT = ((uint8_t)00), /*!< Initialization mode */
|
||||
CAN_OPERATING_MODE_NORMAL = ((uint8_t)01), /*!< Normal mode */
|
||||
CAN_OPERATING_MODE_SLEEP = ((uint8_t)02), /*!< sleep mode */
|
||||
} CAN_OPERATING_MODE_T;
|
||||
|
||||
/**
|
||||
* @brief CAN test mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_MODE_NORMAL = ((uint8_t)00), /*!< normal mode */
|
||||
CAN_MODE_LOOPBACK = ((uint8_t)01), /*!< loopback mode */
|
||||
CAN_MODE_SILENT = ((uint8_t)02), /*!< silent mode */
|
||||
CAN_MODE_SILENT_LOOPBACK = ((uint8_t)03), /*!< loopback combined with silent mode */
|
||||
} CAN_MODE_T;
|
||||
|
||||
/**
|
||||
* @brief CAN filter mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_FILTER_MODE_IDMASK = ((uint8_t)00), /*!< identifier/mask mode */
|
||||
CAN_FILTER_MODE_IDLIST = ((uint8_t)01), /*!< identifier list mode */
|
||||
} CAN_FILTER_MODE_T;
|
||||
|
||||
/**
|
||||
* @brief CAN synchronisation jump width
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_SJW_1 = ((uint8_t)00), /*!< 1 time quantum */
|
||||
CAN_SJW_2 = ((uint8_t)01), /*!< 2 time quantum */
|
||||
CAN_SJW_3 = ((uint8_t)02), /*!< 3 time quantum */
|
||||
CAN_SJW_4 = ((uint8_t)03), /*!< 4 time quantum */
|
||||
} CAN_SJW_T;
|
||||
|
||||
/**
|
||||
* @brief CAN_time quantum in bit_segment_1
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_TIME_SEGMENT1_1 = (uint8_t)0x00, /*!< 1 time quanta */
|
||||
CAN_TIME_SEGMENT1_2 = (uint8_t)0x01, /*!< 2 time quanta */
|
||||
CAN_TIME_SEGMENT1_3 = (uint8_t)0x02, /*!< 3 time quanta */
|
||||
CAN_TIME_SEGMENT1_4 = (uint8_t)0x03, /*!< 4 time quanta */
|
||||
CAN_TIME_SEGMENT1_5 = (uint8_t)0x04, /*!< 5 time quanta */
|
||||
CAN_TIME_SEGMENT1_6 = (uint8_t)0x05, /*!< 6 time quanta */
|
||||
CAN_TIME_SEGMENT1_7 = (uint8_t)0x06, /*!< 7 time quanta */
|
||||
CAN_TIME_SEGMENT1_8 = (uint8_t)0x07, /*!< 8 time quanta */
|
||||
CAN_TIME_SEGMENT1_9 = (uint8_t)0x08, /*!< 9 time quanta */
|
||||
CAN_TIME_SEGMENT1_10 = (uint8_t)0x09, /*!< 10 time quanta */
|
||||
CAN_TIME_SEGMENT1_11 = (uint8_t)0x0A, /*!< 11 time quanta */
|
||||
CAN_TIME_SEGMENT1_12 = (uint8_t)0x0B, /*!< 12 time quanta */
|
||||
CAN_TIME_SEGMENT1_13 = (uint8_t)0x0C, /*!< 13 time quanta */
|
||||
CAN_TIME_SEGMENT1_14 = (uint8_t)0x0D, /*!< 14 time quanta */
|
||||
CAN_TIME_SEGMENT1_15 = (uint8_t)0x0E, /*!< 15 time quanta */
|
||||
CAN_TIME_SEGMENT1_16 = (uint8_t)0x0F, /*!< 16 time quanta */
|
||||
} CAN_TIME_SEGMENT1_T;
|
||||
|
||||
/**
|
||||
* @brief CAN_time_quantum_in_bit_segment_2
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_TIME_SEGMENT2_1 = (uint8_t)0x00, /*!< 1 time quanta */
|
||||
CAN_TIME_SEGMENT2_2 = (uint8_t)0x01, /*!< 2 time quanta */
|
||||
CAN_TIME_SEGMENT2_3 = (uint8_t)0x02, /*!< 3 time quanta */
|
||||
CAN_TIME_SEGMENT2_4 = (uint8_t)0x03, /*!< 4 time quanta */
|
||||
CAN_TIME_SEGMENT2_5 = (uint8_t)0x04, /*!< 5 time quanta */
|
||||
CAN_TIME_SEGMENT2_6 = (uint8_t)0x05, /*!< 6 time quanta */
|
||||
CAN_TIME_SEGMENT2_7 = (uint8_t)0x06, /*!< 7 time quanta */
|
||||
CAN_TIME_SEGMENT2_8 = (uint8_t)0x07, /*!< 8 time quanta */
|
||||
} CAN_TIME_SEGMENT2_T;
|
||||
|
||||
/**
|
||||
* @brief CAN_filter_scale
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_FILTER_SCALE_16BIT = ((uint8_t)0x00), /*!< Two 16-bit filters */
|
||||
CAN_FILTER_SCALE_32BIT = ((uint8_t)0x01), /*!< One 32-bit filter */
|
||||
} CAN_FILTER_SCALE_T;
|
||||
|
||||
/**
|
||||
* @brief CAN identifier type
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_TYPEID_STD = ((uint32_t)0x00000000), /*!< Standard Id */
|
||||
CAN_TYPEID_EXT = ((uint32_t)0x00000004), /*!< Extended Id */
|
||||
} CAN_TYPEID_T;
|
||||
|
||||
/**
|
||||
* @brief CAN_remote_transmission_request
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_RTXR_DATA = ((uint32_t)0x00000000), /*!< Data frame */
|
||||
CAN_RTXR_REMOTE = ((uint32_t)0x00000002), /*!< Remote frame */
|
||||
} CAN_RTXR_T;
|
||||
|
||||
/**
|
||||
* @brief CAN_transmit_constants
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_TX_FAILED = ((uint8_t)0x00), /*!< CAN transmission failed */
|
||||
CAN_TX_OK = ((uint8_t)0x01), /*!< CAN transmission succeeded */
|
||||
CAN_TX_WAITING = ((uint8_t)0x02), /*!< CAN waiting for transmission */
|
||||
CAN_TX_MAILBOX_FULL = ((uint8_t)0x04), /*!< CAN cell did not provide */
|
||||
} CAN_TX_T;
|
||||
|
||||
/**
|
||||
* @brief CAN sleep constants
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_SLEEP_FAILED = ((uint8_t)0x00), /*!< CAN did not enter the sleep mode */
|
||||
CAN_SLEEP_OK = ((uint8_t)0x01), /*!< CAN entered the sleep mode */
|
||||
} CAN_SLEEP_T;
|
||||
|
||||
/**
|
||||
* @brief CAN wake up constants
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_WAKEUP_FAILED = ((uint8_t)0x00), /*!< CAN did not leave the sleep mode */
|
||||
CAN_WAKEUP_OK = ((uint8_t)0x01), /*!< CAN leaved the sleep mode */
|
||||
} CAN_WUP_T;
|
||||
|
||||
/**
|
||||
* @brief CAN receive FIFO
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_FIFO_0 = ((uint8_t)0x00), /*!< CAN FIFO 0 used to receive */
|
||||
CAN_FIFO_1 = ((uint8_t)0x01), /*!< CAN FIFO 1 used to receive */
|
||||
} CAN_FIFO_T;
|
||||
|
||||
/**
|
||||
* @brief CAN_error_Code_constants
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_ERROR_CODE_NOERR = ((uint8_t)0x00), /*!< No Error */
|
||||
CAN_ERROR_CODE_STUFFERR = ((uint8_t)0x10), /*!< Stuff Error */
|
||||
CAN_ERROR_CODE_FORMERR = ((uint8_t)0x20), /*!< Form Error */
|
||||
CAN_ERROR_CODE_ACKERR = ((uint8_t)0x30), /*!< Acknowledgment Error */
|
||||
CAN_ERROR_CODE_BITRECESSIVEERR = ((uint8_t)0x40), /*!< Bit Recessive Error */
|
||||
CAN_ERROR_CODE_BITDOMINANTERR = ((uint8_t)0x50), /*!< Bit Dominant Error */
|
||||
CAN_ERROR_CODE_CRCERR = ((uint8_t)0x60), /*!< CRC Error */
|
||||
CAN_ERROR_CODE_SOFTWARESETERR = ((uint8_t)0x70), /*!< Software Set Error */
|
||||
} CAN_ERROR_CODE_T;
|
||||
|
||||
/**
|
||||
* @brief Flags
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
/* Error Flags */
|
||||
CAN_FLAG_EWF = ((uint32_t)0x10F00001), /*!< Error Warning Flag */
|
||||
CAN_FLAG_EPF = ((uint32_t)0x10F00002), /*!< Error Passive Flag */
|
||||
CAN_FLAG_BOF = ((uint32_t)0x10F00004), /*!< Bus-Off Flag */
|
||||
CAN_FLAG_LEC = ((uint32_t)0x30F00070), /*!< Last error code Flag */
|
||||
/* Operating Mode Flags */
|
||||
CAN_FLAG_WUP = ((uint32_t)0x31000008), /*!< Wake up Flag */
|
||||
CAN_FLAG_SLAK = ((uint32_t)0x31000012), /*!< Sleep acknowledge Flag */
|
||||
/* Transmit Flags */
|
||||
CAN_FLAG_RQCP0 = ((uint32_t)0x32000001), /*!< Request MailBox0 Flag */
|
||||
CAN_FLAG_RQCP1 = ((uint32_t)0x32000100), /*!< Request MailBox1 Flag */
|
||||
CAN_FLAG_RQCP2 = ((uint32_t)0x32010000), /*!< Request MailBox2 Flag */
|
||||
/* Receive Flags */
|
||||
CAN_FLAG_FMP0 = ((uint32_t)0x14000003), /*!< FIFO 0 Message Pending Flag */
|
||||
CAN_FLAG_FF0 = ((uint32_t)0x34000008), /*!< FIFO 0 Full Flag */
|
||||
CAN_FLAG_FOV0 = ((uint32_t)0x34000010), /*!< FIFO 0 Overrun Flag */
|
||||
CAN_FLAG_FMP1 = ((uint32_t)0x18000003), /*!< FIFO 1 Message Pending Flag */
|
||||
CAN_FLAG_FF1 = ((uint32_t)0x38000008), /*!< FIFO 1 Full Flag */
|
||||
CAN_FLAG_FOV1 = ((uint32_t)0x38000010), /*!< FIFO 1 Overrun Flag */
|
||||
} CAN_FLAG_T;
|
||||
|
||||
/**
|
||||
* @brief CAN interrupts
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_INT_TXME = BIT0, /*!< Transmit mailbox empty Interrupt */
|
||||
CAN_INT_F0MP = BIT1, /*!< FIFO 0 message pending Interrupt */
|
||||
CAN_INT_F0FUL = BIT2, /*!< FIFO 0 full Interrupt */
|
||||
CAN_INT_F0OVR = BIT3, /*!< FIFO 0 overrun Interrupt */
|
||||
CAN_INT_F1MP = BIT4, /*!< FIFO 1 message pending Interrupt */
|
||||
CAN_INT_F1FUL = BIT5, /*!< FIFO 1 full Interrupt */
|
||||
CAN_INT_F1OVR = BIT6, /*!< FIFO 1 overrun Interrupt */
|
||||
CAN_INT_EWIE = BIT8, /*!< Error warning Interrupt */
|
||||
CAN_INT_EPIE = BIT9, /*!< Error passive Interrupt */
|
||||
CAN_INT_BOIE = BIT10, /*!< Bus-off Interrupt */
|
||||
CAN_INT_LEC = BIT11, /*!< Last error code Interrupt */
|
||||
CAN_INT_ERR = BIT15, /*!< Error Interrupt */
|
||||
CAN_INT_WUP = BIT16, /*!< Wake-up Interrupt */
|
||||
CAN_INT_SLE = BIT17, /*!< Sleep acknowledge Interrupt */
|
||||
} CAN_INT_T;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
CAN_FILTER_NUMBER_0 = 0, /*!< Number 0 of filters */
|
||||
CAN_FILTER_NUMBER_1, /*!< Number 1 of filters */
|
||||
CAN_FILTER_NUMBER_2, /*!< Number 2 of filters */
|
||||
CAN_FILTER_NUMBER_3, /*!< Number 3 of filters */
|
||||
CAN_FILTER_NUMBER_4, /*!< Number 4 of filters */
|
||||
CAN_FILTER_NUMBER_5, /*!< Number 5 of filters */
|
||||
CAN_FILTER_NUMBER_6, /*!< Number 6 of filters */
|
||||
CAN_FILTER_NUMBER_7, /*!< Number 7 of filters */
|
||||
CAN_FILTER_NUMBER_8, /*!< Number 8 of filters */
|
||||
CAN_FILTER_NUMBER_9, /*!< Number 9 of filters */
|
||||
CAN_FILTER_NUMBER_10, /*!< Number 10 of filters */
|
||||
CAN_FILTER_NUMBER_11, /*!< Number 11 of filters */
|
||||
CAN_FILTER_NUMBER_12, /*!< Number 12 of filters */
|
||||
CAN_FILTER_NUMBER_13, /*!< Number 13 of filters */
|
||||
} CAN_FILTER_NUMBER_T;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
CAN_MAILBOX_0 = ((uint8_t)0x00), /*!< Tx mailbox0 */
|
||||
CAN_MAILBOX_1 = ((uint8_t)0x01), /*!< Tx mailbox1 */
|
||||
CAN_MAILBOX_2 = ((uint8_t)0x02), /*!< Tx mailbox2 */
|
||||
} CAN_MAILBOX_T;
|
||||
|
||||
/**@} end of group CAN_Enumerations */
|
||||
|
||||
/** @defgroup CAN_Structures Structures
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief CAN config structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t timeTrigComMode; /*!< Enable or disable the time triggered communication mode */
|
||||
uint8_t autoBusOffManage; /*!< Enable or disable the automatic bus-off management */
|
||||
uint8_t autoWakeUpMode; /*!< Enable or disable the automatic wake-up mode */
|
||||
uint8_t nonAutoRetran; /*!< Enable or disable the non-automatic retransmission mode */
|
||||
uint8_t rxFIFOLockMode; /*!< Enable or disable the Receive FIFO Locked mode */
|
||||
uint32_t txFIFOPriority; /*!< Enable or disable the transmit FIFO priority */
|
||||
CAN_MODE_T mode; /*!< Specifies the CAN operating mode */
|
||||
CAN_SJW_T syncJumpWidth; /*!< Specifies the maximum number of time quanta the CAN hardware
|
||||
is allowed to lengthen or shorten a bit to perform resynchronization. */
|
||||
CAN_TIME_SEGMENT1_T timeSegment1; /*!< Specifies the number of time quanta in Bit Segment 1 */
|
||||
CAN_TIME_SEGMENT2_T timeSegment2; /*!< Specifies the number of time quanta in Bit Segment 2 */
|
||||
uint16_t prescaler; /*!< Specifies the length of a time quantum. It can be 1 to 1024 */
|
||||
} CAN_Config_T;
|
||||
|
||||
/**
|
||||
* @brief CAN filter config structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t filterIdHigh; /*!< Specifies the filter identification number. */
|
||||
uint16_t filterIdLow; /*!< Specifies the filter identification number. */
|
||||
uint16_t filterMaskIdHigh; /*!< Specifies the filter mask number or identification number. */
|
||||
uint16_t filterMaskIdLow; /*!< Specifies the filter mask number or identification number. */
|
||||
CAN_FIFO_T filterFIFO; /*!< Specifies the FIFO which will be assigned to the filter. */
|
||||
CAN_FILTER_NUMBER_T filterNumber; /*!< Specifies the filter which will be configured. It ranges from 0 to 13. */
|
||||
CAN_FILTER_MODE_T filterMode; /*!< Specifies the filter mode to be configured. */
|
||||
CAN_FILTER_SCALE_T filterScale; /*!< Specifies the filter scale. */
|
||||
uint8_t filterActivation; /*!< Enable or disable the filter. */
|
||||
} CAN_FilterConfig_T;
|
||||
|
||||
/**
|
||||
* @brief CAN Tx message structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t stanID; /*!< Specifies the standard identifier. */
|
||||
uint32_t extenID; /*!< Specifies the extended identifier. */
|
||||
CAN_TYPEID_T typeID; /*!< Specifies the type of identifier for the message. */
|
||||
CAN_RTXR_T remoteTxReq; /*!< Specifies the type of frame for the message. */
|
||||
uint8_t dataLengthCode; /*!< Specifies the length of the frame. It can be a value between 0 to 8. */
|
||||
uint8_t data[8]; /*!< Contains the data to be transmitted. It ranges from 0 to 0xFF. */
|
||||
} CAN_Tx_Message;
|
||||
|
||||
/**
|
||||
* @brief CAN Rx message structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t stanID; /*!< Specifies the standard identifier. */
|
||||
uint32_t extenID; /*!< Specifies the extended identifier. */
|
||||
CAN_TYPEID_T typeID; /*!< Specifies the type of identifier for the message. */
|
||||
CAN_RTXR_T remoteTxReq; /*!< Specifies the type of frame for the message. */
|
||||
uint8_t dataLengthCode; /*!< Specifies the length of the frame. It can be a value between 0 to 8. */
|
||||
uint8_t data[8]; /*!< Contains the data to be transmitted. It ranges from 0 to 0xFF. */
|
||||
uint8_t filterMatchIndex; /*!< Specifies the index of the filter the message stored in the mailbox passes through. */
|
||||
} CAN_Rx_Message;
|
||||
|
||||
/**@} end of group CAN_Structures */
|
||||
|
||||
/** @defgroup CAN_Variables Variables
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group CAN_Variables */
|
||||
|
||||
/** @defgroup CAN_Functions Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/* CAN reset and configuration */
|
||||
void CAN_Reset(void);
|
||||
uint8_t CAN_Config(CAN_Config_T* canConfig);
|
||||
void CAN_ConfigFilter(CAN_FilterConfig_T* filterConfig);
|
||||
void CAN_ConfigStructInit(CAN_Config_T* canConfig);
|
||||
void CAN_StartBankSlave(uint8_t bankNumber);
|
||||
void CAN_EnableDebugFreeze(void);
|
||||
void CAN_DisableDebugFreeze(void);
|
||||
void CAN_EnableTTComMode(void);
|
||||
void CAN_DisableTTComMode(void);
|
||||
|
||||
/* CAN frames transmission */
|
||||
uint8_t CAN_TxMessage(CAN_Tx_Message* TxMessage);
|
||||
uint8_t CAN_TxMessageStatus(CAN_MAILBOX_T TxMailbox);
|
||||
void CAN_CancelTx(CAN_MAILBOX_T TxMailbox);
|
||||
|
||||
/* CAN frames reception */
|
||||
void CAN_RxMessage(uint8_t FIFONumber, CAN_Rx_Message* RxMessage);
|
||||
void CAN_ReleaseFIFO(uint8_t FIFONumber);
|
||||
uint8_t CAN_PendingMessage(uint8_t FIFONumber);
|
||||
|
||||
/* CAN operation modes */
|
||||
uint8_t CAN_OperatingMode(CAN_OPERATING_MODE_T operatingMode);
|
||||
uint8_t CAN_SleepMode(void);
|
||||
uint8_t CAN_WakeUpMode(void);
|
||||
|
||||
/* CAN bus error management */
|
||||
uint8_t CAN_ReadLastErrorCode(void);
|
||||
uint8_t CAN_ReadRxErrorCounter(void);
|
||||
uint8_t CAN_ReadLSBTxErrorCounter(void);
|
||||
|
||||
/* CAN interrupt and flag */
|
||||
void CAN_EnableInterrupt(uint32_t interrupt);
|
||||
void CAN_DisableInterrupt(uint32_t interrupt);
|
||||
uint8_t CAN_ReadStatusFlag(CAN_FLAG_T CAN_FLAG);
|
||||
void CAN_ClearStatusFlag(CAN_FLAG_T flag);
|
||||
uint8_t CAN_ReadIntFlag(CAN_INT_T interrupt);
|
||||
void CAN_ClearIntFlag(uint32_t interrupt);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __APM32F0XX_CAN_H */
|
||||
|
||||
/**@} end of group CAN_Functions */
|
||||
/**@} end of group CAN_Driver */
|
||||
/**@} end of group APM32F0xx_StdPeriphDriver */
|
||||
@@ -0,0 +1,231 @@
|
||||
/*!
|
||||
* @file apm32f0xx_cec.h
|
||||
*
|
||||
* @brief This file contains all the functions prototypes for the CEC firmware library
|
||||
*
|
||||
* @version V1.0.3
|
||||
*
|
||||
* @date 2022-09-20
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* Copyright (C) 2020-2022 Geehy Semiconductor
|
||||
*
|
||||
* You may not use this file except in compliance with the
|
||||
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
|
||||
*
|
||||
* The program is only for reference, which is distributed in the hope
|
||||
* that it will be useful and instructional for customers to develop
|
||||
* their software. Unless required by applicable law or agreed to in
|
||||
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
|
||||
* and limitations under the License.
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion */
|
||||
#ifndef __APM32F0XX_CEC_H
|
||||
#define __APM32F0XX_CEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes */
|
||||
#include "apm32f0xx.h"
|
||||
|
||||
/** @addtogroup APM32F0xx_StdPeriphDriver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @addtogroup CEC_Driver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @defgroup CEC_Macros Macros
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group CEC_Macros */
|
||||
|
||||
/** @defgroup CEC_Enumerations Enumerations
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief CEC_Signal_Free_Time
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CEC_SINGANL_FREETIME_STANDARD = 0x00, /*!< none nominal data bit periods */
|
||||
CEC_SINGANL_FREETIME_1T = 0x01, /*!< 0.5 nominal data bit periods */
|
||||
CEC_SINGANL_FREETIME_2T = 0x02, /*!< 1.5 nominal data bit periods */
|
||||
CEC_SINGANL_FREETIME_3T = 0x03, /*!< 2.5 nominal data bit periods */
|
||||
CEC_SINGANL_FREETIME_4T = 0x04, /*!< 3.5 nominal data bit periods */
|
||||
CEC_SINGANL_FREETIME_5T = 0x05, /*!< 4.5 nominal data bit periods */
|
||||
CEC_SINGANL_FREETIME_6T = 0x06, /*!< 5.5 nominal data bit periods */
|
||||
CEC_SINGANL_FREETIME_7T = 0x07, /*!< 6.5 nominal data bit periods */
|
||||
} CEC_SIGNAL_FREETIME_T;
|
||||
|
||||
/**
|
||||
* @brief CEC_RxTolerance
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CEC_RX_TOLERANCE_STANDARD = 0x00, /*!< Standard tolerance margin */
|
||||
CEC_RX_TOLERANCE_EXTENDED = 0x01 /*!< Extended Tolerance */
|
||||
} CEC_RX_TOLERANCE_T;
|
||||
|
||||
/**
|
||||
* @brief CEC_Stop_Reception
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CEC_STOP_RECEPTION_OFF, /*!< CEC Stop Reception Off */
|
||||
CEC_STOP_RECEPTION_ON /*!< CEC Stop Reception On */
|
||||
} CEC_STOP_RECEPTION_T;
|
||||
|
||||
/**
|
||||
* @brief CEC_Bit_Rising_Error_Generation
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CEC_BIT_RISING_ERR_OFF, /*!< BRE detection does not generate an Error-Bit on the CEC line */
|
||||
CEC_BIT_RISING_ERR_ON /*!< BRE detection generates an Error-Bit on the CEC line (if BRESTP is set) */
|
||||
} CEC_BIT_RISING_ERR_T;
|
||||
|
||||
/**
|
||||
* @brief CEC_Long_Bit_Error_Generation
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CEC_LONG_PERIOD_ERR_OFF, /*!< LBPE detection does not generate an Error-Bit on the CEC line */
|
||||
CEC_LONG_PERIOD_ERR_ON /*!< LBPE detection generates an Error-Bit on the CEC line */
|
||||
} CEC_LONG_PERIOD_ERR_T;
|
||||
|
||||
/**
|
||||
* @brief CEC_BDR_No_Gen
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CEC_BROADCAST_NO_ERR_OFF, /*!< Broadcast Bit Rising Error generation turned Off */
|
||||
CEC_BROADCAST_NO_ERR_ON /*!< Broadcast Bit Rising Error generation turned On */
|
||||
} CEC_BROADCAST_NO_ERR_T;
|
||||
|
||||
/**
|
||||
* @brief CEC_SFT_Option
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CEC_SIGNAL_FREETIME_OPTION_OFF, /*!< SFTCFG timer starts when TXSOM is set by software */
|
||||
CEC_SIGNAL_FREETIME_OPTION_ON /*!< SFTCFG timer starts automatically at the end of message transmission/reception */
|
||||
} CEC_SIGNAL_FREETIME_OPTION_T;
|
||||
|
||||
/**
|
||||
* @brief CEC_Interrupt_Configuration_definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CEC_INT_RXBR = ((uint32_t)0x00000001), /*!< Rx-Byte Received Interrupt */
|
||||
CEC_INT_RXEND = ((uint32_t)0x00000002), /*!< End Of Reception Interrupt */
|
||||
CEC_INT_RXOVR = ((uint32_t)0x00000004), /*!< Rx-Buffer Overrun Interrupt */
|
||||
CEC_INT_BRE = ((uint32_t)0x00000008), /*!< Bit Rising Error Interrupt */
|
||||
CEC_INT_SBPE = ((uint32_t)0x00000010), /*!< Short Bit Period Error Interrupt */
|
||||
CEC_INT_LBPE = ((uint32_t)0x00000020), /*!< Long Bit Period Error Interrupt */
|
||||
CEC_INT_RXACKE = ((uint32_t)0x00000040), /*!< Rx-Missing Acknowledge Error Interrupt */
|
||||
CEC_INT_ARBLST = ((uint32_t)0x00000080), /*!< Arbitration Lost Interrupt */
|
||||
CEC_INT_TXBR = ((uint32_t)0x00000100), /*!< Tx-Byte Request Interrupt */
|
||||
CEC_INT_TXEND = ((uint32_t)0x00000200), /*!< Tx-End Of Message Interrupt */
|
||||
CEC_INT_TXUDR = ((uint32_t)0x00000400), /*!< Tx-Underrun Interrupt */
|
||||
CEC_INT_TXERR = ((uint32_t)0x00000800), /*!< Tx-Error Interrupt */
|
||||
CEC_INT_TXACKE = ((uint32_t)0x00001000), /*!< Tx-Missing Acknowledge Error Interrupt */
|
||||
} CEC_INT_T;
|
||||
|
||||
/**
|
||||
* @brief CEC_STS_register_flags_definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CEC_FLAG_RXBR = ((uint32_t)0x00000001), /*!< Rx-Byte Received Flag */
|
||||
CEC_FLAG_RXEND = ((uint32_t)0x00000002), /*!< End Of Reception Flag */
|
||||
CEC_FLAG_RXOVR = ((uint32_t)0x00000004), /*!< Rx-Buffer Overrun Flag */
|
||||
CEC_FLAG_BRE = ((uint32_t)0x00000008), /*!< Bit Rising Error Flag */
|
||||
CEC_FLAG_SBPE = ((uint32_t)0x00000010), /*!< Short Bit Period Error Flag */
|
||||
CEC_FLAG_LBPE = ((uint32_t)0x00000020), /*!< Long Bit Period Error Flag */
|
||||
CEC_FLAG_RXACKE = ((uint32_t)0x00000040), /*!< Rx-Missing Acknowledge Error Flag */
|
||||
CEC_FLAG_ARBLST = ((uint32_t)0x00000080), /*!< Arbitration Lost Flag */
|
||||
CEC_FLAG_TXBR = ((uint32_t)0x00000100), /*!< Tx-Byte Request Flag */
|
||||
CEC_FLAG_TXEND = ((uint32_t)0x00000200), /*!< Tx-End Of Message Flag */
|
||||
CEC_FLAG_TXUDR = ((uint32_t)0x00000400), /*!< Tx-Underrun Flag */
|
||||
CEC_FLAG_TXERR = ((uint32_t)0x00000800), /*!< Tx-Error Flag */
|
||||
CEC_FLAG_TXACKE = ((uint32_t)0x00001000), /*!< Tx-Missing Acknowledge Error Flag */
|
||||
} CEC_FLAG_T;
|
||||
|
||||
/**@} end of group CEC_Enumerations */
|
||||
|
||||
/** @defgroup CEC_Structures Structures
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief CEC Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
CEC_SIGNAL_FREETIME_T signalFreeTime; /*!< Signal Free Time */
|
||||
CEC_RX_TOLERANCE_T RxTolerance; /*!< Rx-Tolerance */
|
||||
CEC_STOP_RECEPTION_T stopReception; /*!< Rx-Stop on Bit Rising Error */
|
||||
CEC_BIT_RISING_ERR_T bitRisingError; /*!< Generate Error-Bit on Bit Rising Error */
|
||||
CEC_LONG_PERIOD_ERR_T longPeriodError; /*!< Generate Error-Bit on Long Bit Period Error */
|
||||
CEC_BROADCAST_NO_ERR_T broadcastrNoGen; /*!< Avoid Error-Bit Generation in Broadcast */
|
||||
CEC_SIGNAL_FREETIME_OPTION_T signalFreeTimeOption;/*!< Signal Free Time optional */
|
||||
} CEC_Config_T;
|
||||
|
||||
/**@} end of group CEC_Structures */
|
||||
|
||||
/** @defgroup CEC_Variables Variables
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group CEC_Variables */
|
||||
|
||||
/** @defgroup CEC_Functions Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/* CEC reset and configuration */
|
||||
void CEC_Reset(void);
|
||||
void CEC_Config(CEC_Config_T* cecConfig);
|
||||
void CEC_ConfigStructInit(CEC_Config_T* cecConfig);
|
||||
void CEC_Enable(void);
|
||||
void CEC_Disable(void);
|
||||
void CEC_EnableListenMode(void);
|
||||
void CEC_DisableListenMode(void);
|
||||
void CEC_ConfigOwnAddress(uint8_t ownAddress);
|
||||
void CEC_ClearQwnAddress(void);
|
||||
|
||||
/* Transmit and receive */
|
||||
void CEC_TxData(uint8_t Data);
|
||||
uint8_t CEC_RxData(void);
|
||||
|
||||
/* Config Message */
|
||||
void CEC_StartNewMessage(void);
|
||||
void CEC_CompleteMessage(void);
|
||||
|
||||
/* Interrupt and Flag*/
|
||||
void CEC_EnableInterrupt(uint32_t interrupt);
|
||||
void CEC_DisableInterrupt(uint32_t interrupt);
|
||||
uint8_t CEC_ReadStatusFlag(uint32_t flag);
|
||||
void CEC_ClearStatusFlag(uint32_t flag);
|
||||
uint8_t CEC_ReadIntFlag(uint16_t flag);
|
||||
void CEC_ClearIntFlag(uint16_t flag);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __APM32F0XX_CEC_H */
|
||||
|
||||
/**@} end of group CEC_Functions */
|
||||
/**@} end of group CEC_Driver */
|
||||
/**@} end of group APM32F0xx_StdPeriphDriver */
|
||||
@@ -0,0 +1,185 @@
|
||||
/*!
|
||||
* @file apm32f0xx_comp.h
|
||||
*
|
||||
* @brief This file contains all the functions prototypes for the COMP firmware library
|
||||
*
|
||||
* @version V1.0.3
|
||||
*
|
||||
* @date 2022-09-20
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* Copyright (C) 2020-2022 Geehy Semiconductor
|
||||
*
|
||||
* You may not use this file except in compliance with the
|
||||
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
|
||||
*
|
||||
* The program is only for reference, which is distributed in the hope
|
||||
* that it will be useful and instructional for customers to develop
|
||||
* their software. Unless required by applicable law or agreed to in
|
||||
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
|
||||
* and limitations under the License.
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion */
|
||||
#ifndef __APM32F0XX_COMP_H
|
||||
#define __APM32F0XX_COMP_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes */
|
||||
#include "apm32f0xx.h"
|
||||
|
||||
/** @addtogroup APM32F0xx_StdPeriphDriver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @addtogroup COMP_Driver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @defgroup COMP_Macros Macros
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Macros description */
|
||||
#define COMP_CSTS_COMP1OUT ((uint32_t)0x00004000) /*!< COMP1 output state */
|
||||
#define COMP_CSTS_COMP2OUT ((uint32_t)0x40000000) /*!< COMP2 output state */
|
||||
#define COMP_OUTPUTLEVEL_HIGH ((uint32_t)0x00004000) /*!< COMP output level vaild high */
|
||||
#define COMP_OUTPUTLEVEL_LOW ((uint32_t)0x00000000) /*!< COMP output level vaild low */
|
||||
|
||||
/**@} end of group COMP_Macros */
|
||||
|
||||
/** @defgroup COMP_Enumerations Enumerations
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief COMP_Selection
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
COMP_SELECT_COMP1 = ((uint32_t)0x00000000), /*!< COMP1 */
|
||||
COMP_SELECT_COMP2 = ((uint32_t)0x00000010) /*!< COMP2 */
|
||||
} COMP_SELECT_T;
|
||||
|
||||
/**
|
||||
* @brief COMP_InvertingInput
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
COMP_INVERTING_INPUT_1_4VREFINT = 0x00, /*!< 1/4 of VREFINT */
|
||||
COMP_INVERTING_INPUT_1_2VREFINT = 0x01, /*!< 1/2 of VREFINT */
|
||||
COMP_INVERTING_INPUT_3_4VREFINT = 0x02, /*!< 3/4 of VREFINT */
|
||||
COMP_INVERTING_INPUT_VREFINT = 0x03, /*!< VREFINT */
|
||||
COMP_INVERTING_INPUT_DAC1 = 0x04, /*!< COMP1_INM4 (PA4 with DAC_OUT1 if enabled) */
|
||||
COMP_INVERTING_INPUT_DAC2 = 0x05, /*!< COMP1_INM5 (PA5 with DAC_OUT2 if present and enabled, only for APM32F072 and APM32F091 devices) */
|
||||
COMP_INVERTING_INPUT_IO = 0x06, /*!< COMP1_INM6 (PA0) */
|
||||
} COMP_INVERTING_INPUT_T;
|
||||
|
||||
/**
|
||||
* @brief COMP_Output
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
COMP_OUTPUT_NONE = 0x00, /*!< no selection */
|
||||
COMP_OUTPUT_TIM1BKIN = 0x01, /*!< Timer 1 break input */
|
||||
COMP_OUTPUT_TIM1IC1 = 0x02, /*!< Timer 1 Input capture 1 */
|
||||
COMP_OUTPUT_TIM1OCREFCLR = 0x03, /*!< Timer 1 OCrefclear input */
|
||||
COMP_OUTPUT_TIM2IC4 = 0x04, /*!< Timer 2 input capture 4 */
|
||||
COMP_OUTPUT_TIM2OCREFCLR = 0x05, /*!< Timer 2 OCrefclear input */
|
||||
COMP_OUTPUT_TIM3IC1 = 0x06, /*!< Timer 3 input capture 1 */
|
||||
COMP_OUTPUT_TIM3OCREFCLR = 0x07, /*!< Timer 3 OCrefclear input */
|
||||
} COMP_OUTPUT_T;
|
||||
|
||||
/**
|
||||
* @brief COMP_OutputPolarity
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
COMP_OUTPUTPOL_NONINVERTED, /*!< output is not inverted */
|
||||
COMP_OUTPUTPOL_INVERTED /*!< output is inverted */
|
||||
} COMP_OUTPUTPOL_T;
|
||||
|
||||
/**
|
||||
* @brief COMP_Hysteresis
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
COMP_HYSTERRSIS_NO = 0x00, /*!< No hysteresis */
|
||||
COMP_HYSTERRSIS_LOW = 0x01, /*!< Low hysteresis */
|
||||
COMP_HYSTERRSIS_MEDIUM = 0x02, /*!< Medium hysteresis */
|
||||
COMP_HYSTERRSIS_HIGH = 0x03, /*!< High hysteresis */
|
||||
} COMP_HYSTERRSIS_T;
|
||||
|
||||
/**
|
||||
* @brief COMP_Mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
COMP_MODE_HIGHSPEED = 0x00, /*!< High speed / full power */
|
||||
COMP_MODE_MEDIUMSPEED = 0x01, /*!< Medium speed / medium power */
|
||||
COMP_MODE_LOWPOWER = 0x02, /*!< Low speed / low-power */
|
||||
COMP_MODE_VERYLOW = 0x03 /*!< Very-low speed / ultra-low power */
|
||||
} COMP_MODE_T;
|
||||
|
||||
/**@} end of group COMP_Enumerations*/
|
||||
|
||||
/** @defgroup COMP_Structures Structures
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief OMP Config structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
COMP_INVERTING_INPUT_T invertingInput; /*!< Comparator inverting input selection */
|
||||
COMP_OUTPUT_T output; /*!< Comparator output selection */
|
||||
COMP_OUTPUTPOL_T outputPol; /*!< Comparator output polarity */
|
||||
COMP_HYSTERRSIS_T hysterrsis; /*!< Comparator hysteresis */
|
||||
COMP_MODE_T mode; /*!< Comparator mode */
|
||||
} COMP_Config_T;
|
||||
|
||||
/**@} end of group COMP_Structures */
|
||||
|
||||
/** @defgroup COMP_Variables Variables
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group COMP_Variables */
|
||||
|
||||
/** @defgroup COMP_Functions Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/* COMP configuration */
|
||||
void COMP_Reset(void);
|
||||
void COMP_Config(COMP_SELECT_T compSelect, COMP_Config_T* compConfig);
|
||||
void COMP_ConfigStructInit(COMP_Config_T* compConfig);
|
||||
void COMP_Enable(COMP_SELECT_T compSelect);
|
||||
void COMP_Disable(COMP_SELECT_T compSelect);
|
||||
void COMP_EnableSwitch(void);
|
||||
void COMP_DisableSwitch(void);
|
||||
uint32_t COMP_ReadOutPutLevel(COMP_SELECT_T compSelect);
|
||||
|
||||
/* Window mode control */
|
||||
void COMP_EnableWindow(void);
|
||||
void COMP_DisnableWindow(void);
|
||||
|
||||
/* COMP configuration locking */
|
||||
void COMP_ConfigLOCK(COMP_SELECT_T compSelect);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __APM32F0XX_COMP_H */
|
||||
|
||||
/**@} end of group COMP_Functions */
|
||||
/**@} end of group COMP_Driver */
|
||||
/**@} end of group APM32F0xx_StdPeriphDriver */
|
||||
@@ -0,0 +1,136 @@
|
||||
/*!
|
||||
* @file apm32f0xx_crc.h
|
||||
*
|
||||
* @brief This file contains all the functions prototypes for the CRC firmware library
|
||||
*
|
||||
* @version V1.0.3
|
||||
*
|
||||
* @date 2022-09-20
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* Copyright (C) 2020-2022 Geehy Semiconductor
|
||||
*
|
||||
* You may not use this file except in compliance with the
|
||||
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
|
||||
*
|
||||
* The program is only for reference, which is distributed in the hope
|
||||
* that it will be useful and instructional for customers to develop
|
||||
* their software. Unless required by applicable law or agreed to in
|
||||
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
|
||||
* and limitations under the License.
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion */
|
||||
#ifndef __APM32F0XX_CRC_H
|
||||
#define __APM32F0XX_CRC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes */
|
||||
#include "apm32f0xx.h"
|
||||
|
||||
/** @addtogroup APM32F0xx_StdPeriphDriver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC_Driver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Macros Macros
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group CRC_Macros */
|
||||
|
||||
/** @defgroup CRC_Enumerations Enumerations
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief CRC Reverse Input Data
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CRC_REVERSE_INPUT_DATA_NO = ((uint8_t)0x00), /*!< Bit order not affected */
|
||||
CRC_REVERSE_INPUT_DATA_8B = ((uint8_t)0x01), /*!< Bit reversal done by byte */
|
||||
CRC_REVERSE_INPUT_DATA_16B = ((uint8_t)0x02), /*!< Bit reversal done by half-word */
|
||||
CRC_REVERSE_INPUT_DATA_32B = ((uint8_t)0x03), /*!< Bit reversal done by word */
|
||||
} CRC_REVERSE_INPUT_DATA_T;
|
||||
|
||||
/**
|
||||
* @brief CRC Polynomial Size
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CRC_POLYNOMIAL_SIZE_7 = ((uint8_t)0x03), /*!< 7-bit polynomial for CRC calculation */
|
||||
CRC_POLYNOMIAL_SIZE_8 = ((uint8_t)0x02), /*!< 8-bit polynomial for CRC calculation */
|
||||
CRC_POLYNOMIAL_SIZE_16 = ((uint8_t)0x01), /*!< 16-bit polynomial for CRC calculation */
|
||||
CRC_POLYNOMIAL_SIZE_32 = ((uint8_t)0x00), /*!< 32-bit polynomial for CRC calculation */
|
||||
} CRC_POLYNOMIAL_SIZE_T;
|
||||
|
||||
/**@} end of group CRC_Enumerations*/
|
||||
|
||||
/** @defgroup CRC_Structures Structures
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group CRC_Structures */
|
||||
|
||||
/** @defgroup CRC_Variables Variables
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group CRC_Variables */
|
||||
|
||||
/** @defgroup CRC_Functions Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Reset CRC */
|
||||
void CRC_Reset(void);
|
||||
|
||||
/* Reset DATA */
|
||||
void CRC_ResetDATA(void);
|
||||
|
||||
/* CRC Polynomial Size */
|
||||
void CRC_SetPolynomialSize(CRC_POLYNOMIAL_SIZE_T polynomialSize); /*!< Only for APM32F072 and APM32F091 devices */
|
||||
void CRC_SetPolynomialValue(uint32_t polynomialValue); /*!< Only for APM32F072 and APM32F091 devices */
|
||||
|
||||
/* Performed on input data */
|
||||
void CRC_SelectReverseInputData(CRC_REVERSE_INPUT_DATA_T revInData);
|
||||
|
||||
/* Enable and Disable Reverse Output Data */
|
||||
void CRC_EnableReverseOutputData(void);
|
||||
void CRC_DisableReverseOutputData(void);
|
||||
|
||||
/* Write INITVAL register */
|
||||
void CRC_WriteInitRegister(uint32_t initValue);
|
||||
|
||||
/* Calculate CRC */
|
||||
uint32_t CRC_CalculateCRC(uint32_t data);
|
||||
uint32_t CRC_CalculateCRC8bits(uint8_t data); /*!< Only for APM32F072 and APM32F091 devices */
|
||||
uint32_t CRC_CalculateCRC16bits(uint16_t data); /*!< Only for APM32F072 and APM32F091 devices */
|
||||
uint32_t CRC_CalculateBlockCRC(uint32_t pBuffer[], uint32_t bufferLength);
|
||||
|
||||
/* Read CRC */
|
||||
uint32_t CRC_ReadCRC(void);
|
||||
|
||||
/* Independent Data(ID) */
|
||||
void CRC_WriteIDRegister(uint8_t IDValue);
|
||||
uint8_t CRC_ReadIDRegister(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __APM32F0XX_CRC_H */
|
||||
|
||||
/**@} end of group CRC_Functions */
|
||||
/**@} end of group CRC_Driver */
|
||||
/**@} end of group APM32F0xx_StdPeriphDriver */
|
||||
@@ -0,0 +1,171 @@
|
||||
/*!
|
||||
* @file apm32f0xx_crs.h
|
||||
*
|
||||
* @brief This file contains all the functions prototypes for the CRS firmware library
|
||||
*
|
||||
* @note It's only for APM32F072 and APM32F091 devices
|
||||
*
|
||||
* @version V1.0.3
|
||||
*
|
||||
* @date 2022-09-20
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* Copyright (C) 2020-2022 Geehy Semiconductor
|
||||
*
|
||||
* You may not use this file except in compliance with the
|
||||
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
|
||||
*
|
||||
* The program is only for reference, which is distributed in the hope
|
||||
* that it will be useful and instructional for customers to develop
|
||||
* their software. Unless required by applicable law or agreed to in
|
||||
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
|
||||
* and limitations under the License.
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion */
|
||||
#ifndef __APM32F0XX_CRS_H
|
||||
#define __APM32F0XX_CRS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes */
|
||||
#include "apm32f0xx.h"
|
||||
|
||||
/** @addtogroup APM32F0xx_StdPeriphDriver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRS_Driver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @defgroup CRS_Macros Macros
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group CRS_Macros */
|
||||
|
||||
/** @defgroup CRS_Enumerations Enumerations
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief CRS_Interrupt_Sources
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CRS_INT_SYNCOK = ((uint32_t)0x00000001), /*!<SYNC event OK interrupt */
|
||||
CRS_INT_SYNCWARN = ((uint32_t)0x00000002), /*!<SYNC warning interrupt */
|
||||
CRS_INT_ERR = ((uint32_t)0x00000004), /*!<Synchronization or trimming error interrupt */
|
||||
CRS_INT_ESYNC = ((uint32_t)0x00000008), /*!<Expected SYNC interrupt */
|
||||
CRS_INT_SYNCERR = ((uint32_t)0x00000100), /*!<SYNC error */
|
||||
CRS_INT_SYNCMISS = ((uint32_t)0x00000200), /*!<SYNC missed */
|
||||
CRS_INT_TRIMOVF = ((uint32_t)0x00000400), /*!<Trimming overflow or underflow */
|
||||
} CRS_INT_T;
|
||||
|
||||
/**
|
||||
* @brief CRS_Flags
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CRS_FLAG_SYNCOK = ((uint32_t)0x00000001), /*!<SYNC event OK flag */
|
||||
CRS_FLAG_SYNCWARN = ((uint32_t)0x00000002), /*!<SYNC warning flag */
|
||||
CRS_FLAG_ERR = ((uint32_t)0x00000004), /*!<Synchronization or trimming error flag */
|
||||
CRS_FLAG_ESYNC = ((uint32_t)0x00000008), /*!<Expected SYNC flag */
|
||||
CRS_FLAG_SYNCERR = ((uint32_t)0x00000100), /*!<SYNC error flag */
|
||||
CRS_FLAG_SYNCMISS = ((uint32_t)0x00000200), /*!<SYNC missed flag */
|
||||
CRS_FLAG_TRIMOVF = ((uint32_t)0x00000400), /*!<Trimming overflow or underflow falg */
|
||||
} CRS_FLAG_T;
|
||||
|
||||
/**
|
||||
* @brief CRS_Synchro_Source
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CRS_SYNC_SOURCE_GPIO = 0x00, /*!<GPIO selected as SYNC signal source */
|
||||
CRS_SYNC_SOURCE_LSE = 0x01, /*!<LSE selected as SYNC signal source */
|
||||
CRS_SYNC_SOURCE_USB = 0x02, /*!<USB SNFLG selected as SYNC signal source (default) */
|
||||
} CRS_SYNC_SOURCE_T;
|
||||
|
||||
/**
|
||||
* @brief CRS_Synchro_Source
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CRS_SYNC_DIV1 = 0x00, /*!<Synchro Signal not divided (default) */
|
||||
CRS_SYNC_DIV2 = 0x01, /*!<Synchro Signal divided by 2 */
|
||||
CRS_SYNC_DIV4 = 0x02, /*!<Synchro Signal divided by 4 */
|
||||
CRS_SYNC_DIV8 = 0x03, /*!<Synchro Signal divided by 8 */
|
||||
CRS_SYNC_DIV16 = 0x04, /*!<Synchro Signal divided by 16 */
|
||||
CRS_SYNC_DIV32 = 0x05, /*!<Synchro Signal divided by 32 */
|
||||
CRS_SYNC_DIV64 = 0x06, /*!<Synchro Signal divided by 64 */
|
||||
CRS_SYNC_DIV128 = 0x07, /*!<Synchro Signal divided by 128 */
|
||||
} CRS_SYNC_DIV_T;
|
||||
|
||||
/**@} end of group CRS_Enumerations */
|
||||
|
||||
/** @defgroup CRS_Structures Structures
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief CRS_SynchroPolarity
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CRS_SYNC_POL_RISING, /*!<Synchro active on rising edge */
|
||||
CRS_SYNC_POL_FALLING /*!<Synchro active on falling edge */
|
||||
} CRS_SYNC_POL_T;
|
||||
|
||||
/**@} end of group CRS_Structures */
|
||||
|
||||
/** @defgroup CRS_Variables Variables
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group CRS_Variables */
|
||||
|
||||
/** @defgroup CRS_Functions Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Configuration of the CRS */
|
||||
void CRS_Reset(void);
|
||||
void CRS_AdjustHSI48CalibrationValue(uint8_t calibrationVal);
|
||||
void CRS_EnableFrequencyErrorCounter(void);
|
||||
void CRS_DisableFrequencyErrorCounter(void);
|
||||
void CRS_EnableAutomaticCalibration(void);
|
||||
void CRS_DisableAutomaticCalibration(void);
|
||||
void CRS_GenerateSoftwareSynchronization(void);
|
||||
void CRS_FrequencyErrorCounterReloadValue(uint16_t reloadVal);
|
||||
void CRS_ConfigFrequencyErrorLimit(uint8_t errLimitVal);
|
||||
void CRS_ConfigSynchronizationPrescaler(CRS_SYNC_DIV_T div);
|
||||
void CRS_ConfigSynchronizationSource(CRS_SYNC_SOURCE_T source);
|
||||
void CRS_ConfigSynchronizationPolarity(CRS_SYNC_POL_T polarity);
|
||||
uint32_t CRS_ReadReloadValue(void);
|
||||
uint32_t CRS_ReadHSI48CalibrationValue(void);
|
||||
uint32_t CRS_ReadFrequencyErrorValue(void);
|
||||
uint32_t CRS_ReadFrequencyErrorDirection(void);
|
||||
|
||||
/* Interrupts and flags management functions */
|
||||
void CRS_EnableInterrupt(CRS_INT_T interrupt);
|
||||
void CRS_DisableInterrupt(CRS_INT_T interrupt);
|
||||
uint8_t CRS_ReadStatusFlag(CRS_FLAG_T flag);
|
||||
void CRS_ClearStatusFlag(CRS_FLAG_T flag);
|
||||
uint8_t CRS_ReadIntFlag(CRS_INT_T flag);
|
||||
void CRS_ClearIntFlag(CRS_INT_T intFlag);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __APM32F0XX_CRS_H */
|
||||
|
||||
/**@} end of group CRS_Functions */
|
||||
/**@} end of group CRS_Driver */
|
||||
/**@} end of group APM32F0xx_StdPeriphDriver */
|
||||
@@ -0,0 +1,237 @@
|
||||
/*!
|
||||
* @file apm32f0xx_dac.h
|
||||
*
|
||||
* @brief This file contains all the functions prototypes for the DAC firmware library
|
||||
*
|
||||
* @note It's only for APM32F051,APM32F072,APM32F091 devices
|
||||
*
|
||||
* @version V1.0.3
|
||||
*
|
||||
* @date 2022-02-21
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* Copyright (C) 2020-2022 Geehy Semiconductor
|
||||
*
|
||||
* You may not use this file except in compliance with the
|
||||
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
|
||||
*
|
||||
* The program is only for reference, which is distributed in the hope
|
||||
* that it will be useful and instructional for customers to develop
|
||||
* their software. Unless required by applicable law or agreed to in
|
||||
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
|
||||
* and limitations under the License.
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion */
|
||||
#ifndef __APM32F0XX_DAC_H
|
||||
#define __APM32F0XX_DAC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes */
|
||||
#include "apm32f0xx.h"
|
||||
|
||||
/** @addtogroup APM32F0xx_StdPeriphDriver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @addtogroup DAC_Driver DAC Driver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @defgroup DAC_Macros Macros
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Macros description */
|
||||
#define CTRL_CLEAR_MASK ((uint32_t)0x00000FFE) /*!< DAC CTRL register clear mask */
|
||||
#define DUAL_SWTRIG_SET ((uint32_t)0x00000003) /*!< Enable software trigger for DAC's Channel1 and Channel2 */
|
||||
#define DUAL_SWTRIG_RESET ((uint32_t)0xFFFFFFFC) /*!< Disable software trigger for DAC's Channel1 and Channel2 */
|
||||
#define DH12RCH1_OFFSET ((uint32_t)0x00000008) /*!< DAC channel1 data holding register address offset */
|
||||
#define DH12RCH2_OFFSET ((uint32_t)0x00000014) /*!< DAC channel2 data holding register address offset */
|
||||
#define DH12RD_OFFSET ((uint32_t)0x00000020) /*!< DAC dual channel data holding register address offset */
|
||||
#define DATOUT_OFFSET ((uint32_t)0x0000002C) /*!< DAC data output register address offset */
|
||||
|
||||
/**@} end of group DAC_Macros*/
|
||||
|
||||
/** @defgroup DAC_Enumerations Enumerations
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief DAC_Trigger
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DAC_TRIGGER_NONE = ((uint32_t)0x00000000), /*!< None DAC Trigger */
|
||||
DAC_TRIGGER_T2_TRGO = ((uint32_t)0x00000024), /*!< Timer 2 TRGO event */
|
||||
DAC_TRIGGER_T3_TRGO = ((uint32_t)0x0000000C), /*!< Timer 3 TRGO event */
|
||||
DAC_TRIGGER_T6_TRGO = ((uint32_t)0x00000004), /*!< Timer 6 TRGO event */
|
||||
DAC_TRIGGER_T7_TRGO = ((uint32_t)0x00000014), /*!< Timer 7 TRGO event, applicable only for APM32F072 devices */
|
||||
DAC_TRIGGER_T15_TRGO = ((uint32_t)0x0000001C), /*!< Timer 15 TRGO event */
|
||||
DAC_TRIGGER_EINT_IT9 = ((uint32_t)0x00000034), /*!< EINT line9 */
|
||||
DAC_TRIGGER_SOFTWARE = ((uint32_t)0x0000003C) /*!< Software trigger */
|
||||
} DAC_TRIGGER_T;
|
||||
|
||||
/**
|
||||
* @brief DAC_wave_generation, only applicable for APM32F072 devices
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DAC_WAVE_GENERATION_NONE = ((uint32_t)0x00000000), /*!< Wave generation disabled */
|
||||
DAC_WAVE_GENERATION_NOISE = ((uint32_t)0x00000040), /*!< Noise wave generation enabled */
|
||||
DAC_WAVE_GENERATION_TRIANGLE = ((uint32_t)0x00000080) /*!< Triangle wave generation enabled */
|
||||
} DAC_WAVE_GENERATION_T;
|
||||
|
||||
/**
|
||||
* @brief DAC channelx mask/amplitude selector, only applicable for APM32F072 devices
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DAC_LFSRUNAMASK_BIT0 = ((uint32_t)0x00000000), /*!< Unmask bit0 of LFSR/ triangle amplitude equal to 1 */
|
||||
DAC_LFSRUNAMASK_BITS1_0 = ((uint32_t)0x00000100), /*!< Unmask bits[1:0] of LFSR to 3 */
|
||||
DAC_LFSRUNAMASK_BITS2_0 = ((uint32_t)0x00000200), /*!< Unmask bits[2:0] of LFSR to 7 */
|
||||
DAC_LFSRUNAMASK_BITS3_0 = ((uint32_t)0x00000300), /*!< Unmask bits[3:0] of LFSR to 15 */
|
||||
DAC_LFSRUNAMASK_BITS4_0 = ((uint32_t)0x00000400), /*!< Unmask bits[4:0] of LFSR to 31 */
|
||||
DAC_LFSRUNAMASK_BITS5_0 = ((uint32_t)0x00000500), /*!< Unmask bits[5:0] of LFSR to 63 */
|
||||
DAC_LFSRUNAMASK_BITS6_0 = ((uint32_t)0x00000600), /*!< Unmask bits[6:0] of LFSR to 127 */
|
||||
DAC_LFSRUNAMASK_BITS7_0 = ((uint32_t)0x00000700), /*!< Unmask bits[7:0] of LFSR to 255 */
|
||||
DAC_LFSRUNAMASK_BITS8_0 = ((uint32_t)0x00000800), /*!< Unmask bits[8:0] of LFSR to 511 */
|
||||
DAC_LFSRUNAMASK_BITS9_0 = ((uint32_t)0x00000900), /*!< Unmask bits[9:0] of LFSR to 1023 */
|
||||
DAC_LFSRUNAMASK_BITS10_0 = ((uint32_t)0x00000A00), /*!< Unmask bits[10:0] of LFS to 2047 */
|
||||
DAC_LFSRUNAMASK_BITS11_0 = ((uint32_t)0x00000B00), /*!< Unmask bits[11:0] of LFS to 4095 */
|
||||
DAC_TRIANGLEAMPLITUDE_1 = ((uint32_t)0x00000000), /*!< Select max triangle amplitude of 1 */
|
||||
DAC_TRIANGLEAMPLITUDE_3 = ((uint32_t)0x00000100), /*!< Select max triangle amplitude of 3 */
|
||||
DAC_TRIANGLEAMPLITUDE_7 = ((uint32_t)0x00000200), /*!< Select max triangle amplitude of 7 */
|
||||
DAC_TRIANGLEAMPLITUDE_15 = ((uint32_t)0x00000300), /*!< Select max triangle amplitude of 15 */
|
||||
DAC_TRIANGLEAMPLITUDE_31 = ((uint32_t)0x00000400), /*!< Select max triangle amplitude of 31 */
|
||||
DAC_TRIANGLEAMPLITUDE_63 = ((uint32_t)0x00000500), /*!< Select max triangle amplitude of 63 */
|
||||
DAC_TRIANGLEAMPLITUDE_127 = ((uint32_t)0x00000600), /*!< Select max triangle amplitude of 127 */
|
||||
DAC_TRIANGLEAMPLITUDE_255 = ((uint32_t)0x00000700), /*!< Select max triangle amplitude of 255 */
|
||||
DAC_TRIANGLEAMPLITUDE_511 = ((uint32_t)0x00000800), /*!< Select max triangle amplitude of 511 */
|
||||
DAC_TRIANGLEAMPLITUDE_1023 = ((uint32_t)0x00000900), /*!< Select max triangle amplitude of 1023 */
|
||||
DAC_TRIANGLEAMPLITUDE_2047 = ((uint32_t)0x00000A00), /*!< Select max triangle amplitude of 2047 */
|
||||
DAC_TRIANGLEAMPLITUDE_4095 = ((uint32_t)0x00000B00) /*!< Select max triangle amplitude of 4095 */
|
||||
} DAC_MASK_AMPLITUDE_SEL_T;
|
||||
|
||||
/**
|
||||
* @brief DAC_OutputBuffer
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DAC_OUTPUTBUFF_ENABLE = ((uint32_t)0x00000000), /*!< DAC channel1 output buffer enabledDAC channel1 output buffer disabled */
|
||||
DAC_OUTPUTBUFF_DISABLE = ((uint32_t)0x00000002) /*!< DAC channel1 output buffer enabledDAC channel1 output buffer disabled */
|
||||
} DAC_OUTPUTBUFF_T;
|
||||
|
||||
/**
|
||||
* @brief DAC_Channel_selection
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DAC_CHANNEL_1 = ((uint32_t)0x00000000), /*!< DAC channel1 */
|
||||
DAC_CHANNEL_2 = ((uint32_t)0x00000010) /*!< DAC channel2 */
|
||||
} DAC_CHANNEL_T;
|
||||
|
||||
/**
|
||||
* @brief DAC_data_alignment
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DAC_ALIGN_12B_R = ((uint32_t)0x00000000), /*!< DAC 12-bit right-aligned data */
|
||||
DAC_ALIGN_12B_L = ((uint32_t)0x00000004), /*!< DAC 12-bit left-aligned data */
|
||||
DAC_ALIGN_8B_R = ((uint32_t)0x00000008) /*!< DAC 8-bit right-aligned data */
|
||||
} DAC_DATA_ALIGN_T;
|
||||
|
||||
/**
|
||||
* @brief DAC_interrupts_definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DAC_INT_CH1_DMAUDR = ((uint32_t)0x00002000), /*!< DAC channel1 DMA Underrun Interrupt */
|
||||
DAC_INT_CH2_DMAUDR = ((uint32_t)0x20000000) /*!< DAC channel2 DMA Underrun Interrupt */
|
||||
} DAC_INT_T;
|
||||
|
||||
/**
|
||||
* @brief DAC_flags_definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DAC_FLAG_CH1_DMAUDR = ((uint32_t)0x00002000), /*!< DAC channel1 DMA Underrun Flag */
|
||||
DAC_FLAG_CH2_DMAUDR = ((uint32_t)0x20000000) /*!< DAC channel2 DMA Underrun Flag */
|
||||
} DAC_FLAG_T;
|
||||
|
||||
/**@} end of group DAC_Enumerations */
|
||||
|
||||
/** @defgroup DAC_Structures Structures
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief DAC Config structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
DAC_TRIGGER_T trigger; /*!< DAC trigger selection */
|
||||
DAC_OUTPUTBUFF_T outputBuff; /*!< DAC output buffer disable */
|
||||
DAC_WAVE_GENERATION_T waveGeneration; /*!< DAC noise/triangle wave generation selection */
|
||||
DAC_MASK_AMPLITUDE_SEL_T maskAmplitudeSelect; /*!< DAC mask/amplitude selector */
|
||||
} DAC_Config_T;
|
||||
|
||||
/**@} end of group DAC_Structures */
|
||||
|
||||
/** @defgroup DAC_Variables Variables
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group DAC_Variables */
|
||||
|
||||
/** @defgroup DAC_Functions Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/* DAC reset and configuration */
|
||||
void DAC_Reset(void);
|
||||
void DAC_Config(uint32_t channel, DAC_Config_T* dacConfig);
|
||||
void DAC_ConfigStructInit(DAC_Config_T* dacConfig);
|
||||
void DAC_Enable(DAC_CHANNEL_T channel);
|
||||
void DAC_Disable(DAC_CHANNEL_T channel);
|
||||
void DAC_EnableSoftwareTrigger(DAC_CHANNEL_T channel);
|
||||
void DAC_DisableSoftwareTrigger(DAC_CHANNEL_T channel);
|
||||
void DAC_EnableDualSoftwareTrigger(void); /*!< Only for APM32F072 and APM32F091 devices */
|
||||
void DAC_DisableDualSoftwareTrigger(void); /*!< Only for APM32F072 and APM32F091 devices */
|
||||
void DAC_EnableWaveGeneration(DAC_CHANNEL_T channel, DAC_WAVE_GENERATION_T wave); /*!< Only for APM32F072 and APM32F091 devices */
|
||||
void DAC_DisableWaveGeneration(DAC_CHANNEL_T channel, DAC_WAVE_GENERATION_T wave); /*!< Only for APM32F072 and APM32F091 devices */
|
||||
|
||||
/* Read data */
|
||||
void DAC_ConfigChannel1Data(DAC_DATA_ALIGN_T dataAlign, uint16_t data);
|
||||
void DAC_ConfigChannel2Data(DAC_DATA_ALIGN_T dataAlign, uint16_t data); /*!< Only for APM32F072 and APM32F091 devices */
|
||||
void DAC_ConfigDualChannelData(DAC_DATA_ALIGN_T dataAlign, uint16_t data2, uint16_t data1); /*!< Only for APM32F072 and APM32F091 devices */
|
||||
uint16_t DAC_ReadDataOutputValue(DAC_CHANNEL_T channel);
|
||||
|
||||
/* DMA */
|
||||
void DAC_EnableDMA(DAC_CHANNEL_T channel);
|
||||
void DAC_DisableDMA(DAC_CHANNEL_T channel);
|
||||
|
||||
/* Interrupt and flag */
|
||||
void DAC_EnableInterrupt(DAC_CHANNEL_T channel);
|
||||
void DAC_DisableInterrupt(DAC_CHANNEL_T channel);
|
||||
uint8_t DAC_ReadStatusFlag(DAC_FLAG_T flag);
|
||||
void DAC_ClearStatusFlag(DAC_FLAG_T flag);
|
||||
uint8_t DAC_ReadIntFlag(DAC_INT_T intFlag);
|
||||
void DAC_ClearIntFlag(DAC_INT_T intFlag);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __APM32F0XX_DAC_H */
|
||||
|
||||
/**@} end of group DAC_Functions */
|
||||
/**@} end of group DAC_Driver */
|
||||
/**@} end of group APM32F0xx_StdPeriphDriver */
|
||||
@@ -0,0 +1,134 @@
|
||||
/*!
|
||||
* @file apm32f0xx_dbg.h
|
||||
*
|
||||
* @brief This file contains all the functions prototypes for the DBG firmware library
|
||||
*
|
||||
* @version V1.0.3
|
||||
*
|
||||
* @date 2022-09-20
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* Copyright (C) 2020-2022 Geehy Semiconductor
|
||||
*
|
||||
* You may not use this file except in compliance with the
|
||||
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
|
||||
*
|
||||
* The program is only for reference, which is distributed in the hope
|
||||
* that it will be useful and instructional for customers to develop
|
||||
* their software. Unless required by applicable law or agreed to in
|
||||
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
|
||||
* and limitations under the License.
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion */
|
||||
#ifndef __APM32F0XX_DBG_H
|
||||
#define __APM32F0XX_DBG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes */
|
||||
#include "apm32f0xx.h"
|
||||
|
||||
/** @addtogroup APM32F0xx_StdPeriphDriver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @addtogroup DBG_Driver
|
||||
@{
|
||||
*/
|
||||
|
||||
/** @defgroup DBG_Macros Macros
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group DBG_Macros*/
|
||||
|
||||
/** @defgroup DBG_Enumerations Enumerations
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief MCU Debug mode in the low power mode behavior
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DBG_MODE_STOP = ((uint32_t)0x02), /*!< Keep debugger connection during STOP mode */
|
||||
DBG_MODE_STANDBY = ((uint32_t)0x04), /*!< Keep debugger connection during STANDBY mode */
|
||||
} DBG_MODE_T;
|
||||
|
||||
/**
|
||||
* @brief MCU Debug mode in the APB1 peripheral behavior
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DBG_APB1_PER_TMR2_STOP = ((uint32_t)0x01), /*!< TMR2 counter stopped when Core is halted (Only for APM32F072 and APM32F091 devices) */
|
||||
DBG_APB1_PER_TMR3_STOP = ((uint32_t)0x02), /*!< TMR3 counter stopped when Core is halted */
|
||||
DBG_APB1_PER_TMR6_STOP = ((uint32_t)0x10), /*!< TMR6 counter stopped when Core is halted */
|
||||
DBG_APB1_PER_TMR7_STOP = ((uint32_t)0x20), /*!< TMR7 counter stopped when Core is halted (Only for APM32F072 and APM32F091 devices) */
|
||||
DBG_APB1_PER_TMR14_STOP = ((uint32_t)0x100), /*!< TMR14 counter stopped when Core is halted */
|
||||
DBG_APB1_PER_RTC_STOP = ((uint32_t)0x400), /*!< RTC counter stopped when Core is halted */
|
||||
DBG_APB1_PER_WWDT_STOP = ((uint32_t)0x800), /*!< Debug WWDT stopped when Core is halted */
|
||||
DBG_APB1_PER_IWDT_STOP = ((uint32_t)0x1000), /*!< Debug IWDT stopped when Core is halted */
|
||||
DBG_APB1_PER_CAN_STOP = ((uint32_t)0x2000000), /*!< Debug CAN stopped when Core is halted (Only for APM32F072 and APM32F091 devices) */
|
||||
DBG_APB1_PER_I2C1_SMBUS_TIMEOUT = ((uint32_t)0x200000), /*!< I2C1 SMBUS timeout mode stopped when Core is halted */
|
||||
} DBG_APB1_PER_T;
|
||||
|
||||
/**
|
||||
* @brief MCU Debug mode in the APB2 peripheral behavior
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DBG_APB2_PER_TMR1_STOP = ((uint32_t)0x00800), /*!< TMR1 counter stopped when Core is halted */
|
||||
DBG_APB2_PER_TMR15_STOP = ((uint32_t)0x10000), /*!< TMR15 counter stopped when Core is halted */
|
||||
DBG_APB2_PER_TMR16_STOP = ((uint32_t)0x20000), /*!< TMR16 counter stopped when Core is halted */
|
||||
DBG_APB2_PER_TMR17_STOP = ((uint32_t)0x40000), /*!< TMR17 counter stopped when Core is halted */
|
||||
} DBG_APB2_PER_T;
|
||||
|
||||
/**@} end of group DBG_Enumerations */
|
||||
|
||||
/** @defgroup DBG_Structures Structures
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group DBG_Structures */
|
||||
|
||||
/** @defgroup DBG_Variables Variables
|
||||
@{
|
||||
*/
|
||||
|
||||
/**@} end of group DBG_Variables */
|
||||
|
||||
/** @defgroup DBG_Functions Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Read MCU ID Code */
|
||||
uint32_t DBG_ReadDevId(void);
|
||||
uint32_t DBG_ReadRevId(void);
|
||||
|
||||
/* Debug Mode */
|
||||
void DBG_EnableDebugMode(uint32_t mode);
|
||||
void DBG_DisableDebugMode(uint32_t mode);
|
||||
|
||||
/* APB1 peripheral */
|
||||
void DBG_EnableAPB1Periph(uint32_t peripheral);
|
||||
void DBG_DisableAPB1Periph(uint32_t peripheral);
|
||||
|
||||
/* APB2 peripheral */
|
||||
void DBG_EnableAPB2Periph(uint32_t peripheral);
|
||||
void DBG_DisableAPB2Periph(uint32_t peripheral);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __APM32F0XX_DBG_H */
|
||||
|
||||
/**@} end of group DBG_Functions */
|
||||
/**@} end of group DBG_Driver */
|
||||
/**@} end of group APM32F0xx_StdPeriphDriver */
|
||||
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user