[bsp][stm32f429-disco]Fix hard fault while init heap

This commit is contained in:
xuzhuoyi committed 2016-08-20 23:04:01 +08:00
1 parent 715cbb7809
commit 234f1c6995
12 files changed
+3421 -635

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-60
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@@ -1,60 +0,0 @@
/*
* File : sram.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-08-03 xiaonong The first version for STM32F7
*/
#include "sram.h"
#include "board.h"
#include <rtthread.h>
#ifdef RT_USING_EXT_SDRAM
struct rt_memheap system_heap;
void sram_init(void)
{
/* initialize the built-in SRAM as a memory heap */
rt_memheap_init(&system_heap,
"system",
(void *)HEAP_BEGIN,
(rt_uint32_t)HEAP_END - (rt_uint32_t)HEAP_BEGIN);
}
void *sram_malloc(unsigned long size)
{
return rt_memheap_alloc(&system_heap, size);
}
RTM_EXPORT(sram_malloc);
void sram_free(void *ptr)
{
rt_memheap_free(ptr);
}
RTM_EXPORT(sram_free);
void *sram_realloc(void *ptr, unsigned long size)
{
return rt_memheap_realloc(&system_heap, ptr, size);
}
RTM_EXPORT(sram_realloc);
#endif
-23
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@@ -1,23 +0,0 @@
/*
* File : sram.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2015 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2015-08-03 xiaonong The first version for STM32F7
*/
#ifndef __SRAM_H__
#define __SRAM_H__
void sram_init(void);
void *sram_malloc(unsigned long nbytes);
void sram_free(void *ptr);
void *sram_realloc(void *ptr, unsigned long nbytes);
#endif
+5 -1
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@@ -80,7 +80,11 @@ void rtthread_startup(void)
/* init timer system */
rt_system_timer_init();
rt_system_heap_init((void*)STM32_SRAM_BEGIN, (void*)STM32_SRAM_END);
#ifdef RT_USING_EXT_SDRAM
rt_system_heap_init((void*)EXT_SDRAM_BEGIN, (void*)EXT_SDRAM_END);
#else
rt_system_heap_init((void*)HEAP_BEGIN, (void*)HEAP_END);
#endif
/* init scheduler system */
rt_system_scheduler_init();
+1 -7
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@@ -19,7 +19,6 @@
#include "board.h"
#include "usart.h"
#include "gpio.h"
#include "sram.h"
/**
* @addtogroup STM32
@@ -101,12 +100,7 @@ void rt_hw_board_init()
stm32_hw_pin_init();
#endif
#ifdef RT_USING_EXT_SDRAM
rt_system_heap_init((void*)EXT_SDRAM_BEGIN, (void*)EXT_SDRAM_END);
sram_init();
#else
rt_system_heap_init((void*)HEAP_BEGIN, (void*)HEAP_END);
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(CONSOLE_DEVICE);
+2 -2
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@@ -28,10 +28,10 @@
// <o>Begin Address of External SDRAM
// <i>Default: 0xD0000000
#define EXT_SDRAM_BEGIN SDRAM_BANK_ADDR /* the begining address of external SRAM */
#define EXT_SDRAM_BEGIN SDRAM_BANK_ADDR /* the begining address of external SDRAM */
// <o>End Address of External SRAM
// <i>Default: 0xD0800000
#define EXT_SDRAM_END SDRAM_BANK_ADDR + IS42S16400J_SIZE /* the end address of external SRAM */
#define EXT_SDRAM_END SDRAM_BANK_ADDR + IS42S16400J_SIZE /* the end address of external SDRAM */
// </e>
// <o> Internal SRAM memory size[Kbytes] <8-64>
+5 -18
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@@ -1,25 +1,12 @@
board info:
STM32F4 discovery
http://www.st.com/internet/evalboard/product/252419.jsp
STM32F429I-DISC1
http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-discovery-kits/32f429idiscovery.html
note:
in drivers/stm32f4xx_conf.h
/* Redefine the HSE value; it's equal to 8 MHz on the STM32F4-DISCOVERY Kit */
/* Redefine the HSE value; it's equal to 8 MHz on the STM32F429I-DISC1 Kit */
#define HSE_VALUE ((uint32_t)8000000)
**================= IAR WARNING =================**
after use `scons --target=iar -s` cmd to product IAR project, you have to add iar link file by hand
IAR steps:
1. Project-->Options-->Linker
2. Config-->Linker Configuration file
3. select `Override Default`, then select `bsp/stm32f40x/stm32f40x_flash.icf`
4. rebuild project
**TODO**
auto add *.icf by scons script
+6 -1
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@@ -17,6 +17,7 @@
/* SECTION: RT_DEBUG */
/* Thread Debug */
#define RT_DEBUG
#define RT_DEBUG_INIT 1
#define RT_USING_OVERFLOW_CHECK
/* Using Hook */
@@ -51,10 +52,14 @@
/* Using Dynamic Heap Management */
#define RT_USING_HEAP
#define RT_USING_MEMHEAP
/* Using Small MM */
#define RT_USING_SMALL_MEM
#define RT_USING_COMPONENTS_INIT
#define RT_USING_EXT_SDRAM
/* SECTION: Device System */
/* Using Device System */
#define RT_USING_DEVICE
+3 -3
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@@ -12,7 +12,7 @@ if os.getenv('RTT_CC'):
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'/home/zhuoyixu/gcc-arm-none-eabi-5_4-2016q2/bin'
EXEC_PATH = r'/opt/gcc-arm-none-eabi-5_4-2016q2/bin'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = r'C:/Keil'
@@ -41,7 +41,7 @@ if PLATFORM == 'gcc':
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -g -Wall -DSTM32F429ZI -DSTM32F4XX -DUSE_STDPERIPH_DRIVER -D__ASSEMBLY__ -D__FPU_USED'
CFLAGS = DEVICE + ' -g -Wall -DSTM32F429ZI -DSTM32F429_439xx -DUSE_STDPERIPH_DRIVER -D__ASSEMBLY__ -D__FPU_USED'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-stm32.map,-cref,-u,Reset_Handler -T stm32_rom.ld'
@@ -65,7 +65,7 @@ elif PLATFORM == 'armcc':
TARGET_EXT = 'axf'
DEVICE = ' --cpu=cortex-m4.fp'
CFLAGS = DEVICE + ' --apcs=interwork -DUSE_STDPERIPH_DRIVER -DSTM32F40_41xxx'
CFLAGS = DEVICE + ' --apcs=interwork -DUSE_STDPERIPH_DRIVER -DSTM32F429_439xx'
AFLAGS = DEVICE
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter stm32_rom.sct'
-36
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@@ -1,36 +0,0 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*STM32 F446RE*/
/*Export the end address of ram, to avoid hard-code heap size in application*/
export symbol __ICFEDIT_region_RAM_end__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x200;
define symbol __ICFEDIT_size_heap__ = 0x000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
keep { section FSymTab };
keep { section VSymTab };
keep { section .rti_fn* };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, last block HEAP};
+388
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