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[bsp][stm32f429-disco]Fix hard fault while init heap
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@@ -1,60 +0,0 @@
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/*
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* File : sram.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2015, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2015-08-03 xiaonong The first version for STM32F7
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*/
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#include "sram.h"
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#include "board.h"
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#include <rtthread.h>
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#ifdef RT_USING_EXT_SDRAM
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struct rt_memheap system_heap;
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void sram_init(void)
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{
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/* initialize the built-in SRAM as a memory heap */
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rt_memheap_init(&system_heap,
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"system",
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(void *)HEAP_BEGIN,
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(rt_uint32_t)HEAP_END - (rt_uint32_t)HEAP_BEGIN);
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}
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void *sram_malloc(unsigned long size)
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{
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return rt_memheap_alloc(&system_heap, size);
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}
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RTM_EXPORT(sram_malloc);
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void sram_free(void *ptr)
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{
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rt_memheap_free(ptr);
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}
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RTM_EXPORT(sram_free);
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void *sram_realloc(void *ptr, unsigned long size)
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{
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return rt_memheap_realloc(&system_heap, ptr, size);
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}
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RTM_EXPORT(sram_realloc);
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#endif
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@@ -1,23 +0,0 @@
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/*
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* File : sram.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2015 RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2015-08-03 xiaonong The first version for STM32F7
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*/
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#ifndef __SRAM_H__
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#define __SRAM_H__
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void sram_init(void);
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void *sram_malloc(unsigned long nbytes);
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void sram_free(void *ptr);
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void *sram_realloc(void *ptr, unsigned long nbytes);
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#endif
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@@ -80,7 +80,11 @@ void rtthread_startup(void)
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/* init timer system */
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rt_system_timer_init();
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rt_system_heap_init((void*)STM32_SRAM_BEGIN, (void*)STM32_SRAM_END);
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#ifdef RT_USING_EXT_SDRAM
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rt_system_heap_init((void*)EXT_SDRAM_BEGIN, (void*)EXT_SDRAM_END);
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#else
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rt_system_heap_init((void*)HEAP_BEGIN, (void*)HEAP_END);
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#endif
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/* init scheduler system */
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rt_system_scheduler_init();
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@@ -19,7 +19,6 @@
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#include "board.h"
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#include "usart.h"
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#include "gpio.h"
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#include "sram.h"
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/**
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* @addtogroup STM32
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@@ -101,12 +100,7 @@ void rt_hw_board_init()
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stm32_hw_pin_init();
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#endif
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#ifdef RT_USING_EXT_SDRAM
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rt_system_heap_init((void*)EXT_SDRAM_BEGIN, (void*)EXT_SDRAM_END);
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sram_init();
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#else
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rt_system_heap_init((void*)HEAP_BEGIN, (void*)HEAP_END);
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#endif
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#ifdef RT_USING_CONSOLE
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rt_console_set_device(CONSOLE_DEVICE);
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@@ -28,10 +28,10 @@
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// <o>Begin Address of External SDRAM
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// <i>Default: 0xD0000000
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#define EXT_SDRAM_BEGIN SDRAM_BANK_ADDR /* the begining address of external SRAM */
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#define EXT_SDRAM_BEGIN SDRAM_BANK_ADDR /* the begining address of external SDRAM */
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// <o>End Address of External SRAM
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// <i>Default: 0xD0800000
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#define EXT_SDRAM_END SDRAM_BANK_ADDR + IS42S16400J_SIZE /* the end address of external SRAM */
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#define EXT_SDRAM_END SDRAM_BANK_ADDR + IS42S16400J_SIZE /* the end address of external SDRAM */
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// </e>
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// <o> Internal SRAM memory size[Kbytes] <8-64>
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@@ -1,25 +1,12 @@
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board info:
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STM32F4 discovery
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http://www.st.com/internet/evalboard/product/252419.jsp
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STM32F429I-DISC1
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http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-discovery-kits/32f429idiscovery.html
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note:
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in drivers/stm32f4xx_conf.h
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/* Redefine the HSE value; it's equal to 8 MHz on the STM32F4-DISCOVERY Kit */
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/* Redefine the HSE value; it's equal to 8 MHz on the STM32F429I-DISC1 Kit */
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#define HSE_VALUE ((uint32_t)8000000)
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**================= IAR WARNING =================**
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after use `scons --target=iar -s` cmd to product IAR project, you have to add iar link file by hand
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IAR steps:
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1. Project-->Options-->Linker
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2. Config-->Linker Configuration file
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3. select `Override Default`, then select `bsp/stm32f40x/stm32f40x_flash.icf`
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4. rebuild project
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**TODO**
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auto add *.icf by scons script
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@@ -17,6 +17,7 @@
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/* SECTION: RT_DEBUG */
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/* Thread Debug */
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#define RT_DEBUG
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#define RT_DEBUG_INIT 1
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#define RT_USING_OVERFLOW_CHECK
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/* Using Hook */
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@@ -51,10 +52,14 @@
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/* Using Dynamic Heap Management */
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#define RT_USING_HEAP
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#define RT_USING_MEMHEAP
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/* Using Small MM */
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#define RT_USING_SMALL_MEM
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#define RT_USING_COMPONENTS_INIT
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#define RT_USING_EXT_SDRAM
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/* SECTION: Device System */
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/* Using Device System */
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#define RT_USING_DEVICE
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@@ -12,7 +12,7 @@ if os.getenv('RTT_CC'):
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# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
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if CROSS_TOOL == 'gcc':
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PLATFORM = 'gcc'
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EXEC_PATH = r'/home/zhuoyixu/gcc-arm-none-eabi-5_4-2016q2/bin'
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EXEC_PATH = r'/opt/gcc-arm-none-eabi-5_4-2016q2/bin'
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elif CROSS_TOOL == 'keil':
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PLATFORM = 'armcc'
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EXEC_PATH = r'C:/Keil'
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@@ -41,7 +41,7 @@ if PLATFORM == 'gcc':
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OBJCPY = PREFIX + 'objcopy'
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DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
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CFLAGS = DEVICE + ' -g -Wall -DSTM32F429ZI -DSTM32F4XX -DUSE_STDPERIPH_DRIVER -D__ASSEMBLY__ -D__FPU_USED'
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CFLAGS = DEVICE + ' -g -Wall -DSTM32F429ZI -DSTM32F429_439xx -DUSE_STDPERIPH_DRIVER -D__ASSEMBLY__ -D__FPU_USED'
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AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
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LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-stm32.map,-cref,-u,Reset_Handler -T stm32_rom.ld'
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@@ -65,7 +65,7 @@ elif PLATFORM == 'armcc':
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TARGET_EXT = 'axf'
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DEVICE = ' --cpu=cortex-m4.fp'
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CFLAGS = DEVICE + ' --apcs=interwork -DUSE_STDPERIPH_DRIVER -DSTM32F40_41xxx'
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CFLAGS = DEVICE + ' --apcs=interwork -DUSE_STDPERIPH_DRIVER -DSTM32F429_439xx'
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AFLAGS = DEVICE
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LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter stm32_rom.sct'
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@@ -1,36 +0,0 @@
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*STM32 F446RE*/
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/*Export the end address of ram, to avoid hard-code heap size in application*/
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export symbol __ICFEDIT_region_RAM_end__;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x200;
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define symbol __ICFEDIT_size_heap__ = 0x000;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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keep { section FSymTab };
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keep { section VSymTab };
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keep { section .rti_fn* };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite, block CSTACK, last block HEAP};
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