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[bsp][stm32f429-disco] Add SDRAM support

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This commit is contained in:
xuzhuoyi
2016-08-20 18:27:07 +08:00
parent 94cb87223e
commit 715cbb7809
75 changed files with 15541 additions and 6039 deletions
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bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/Release_Notes.html
+157 -15
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File diff suppressed because one or more lines are too long
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/misc.h
+16 -10
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@@ -2,21 +2,27 @@
******************************************************************************
* @file misc.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the miscellaneous
* firmware library functions (add-on to CMSIS functions).
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -169,4 +175,4 @@ void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_adc.h
+23 -10
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@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_adc.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the ADC firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -319,7 +325,14 @@ typedef struct
#define ADC_Channel_17 ((uint8_t)0x11)
#define ADC_Channel_18 ((uint8_t)0x12)
#if defined (STM32F40_41xxx)
#define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
#endif /* STM32F40_41xxx */
#if defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F401xx)
#define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_18)
#endif /* STM32F427_437xx || STM32F429_439xx || STM32F401xx */
#define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
#define ADC_Channel_Vbat ((uint8_t)ADC_Channel_18)
@@ -640,4 +653,4 @@ void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_can.h
+16 -10
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@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_can.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the CAN firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -635,4 +641,4 @@ void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_crc.h
+16 -10
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@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_crc.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the CRC firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -74,4 +80,4 @@ uint8_t CRC_GetIDRegister(void);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_cryp.h
+80 -34
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@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_cryp.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the Cryptographic
* processor(CRYP) firmware library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -46,14 +52,14 @@
*/
typedef struct
{
uint16_t CRYP_AlgoDir; /*!< Encrypt or Decrypt. This parameter can be a
uint32_t CRYP_AlgoDir; /*!< Encrypt or Decrypt. This parameter can be a
value of @ref CRYP_Algorithm_Direction */
uint16_t CRYP_AlgoMode; /*!< TDES-ECB, TDES-CBC, DES-ECB, DES-CBC, AES-ECB,
AES-CBC, AES-CTR, AES-Key. This parameter can be
a value of @ref CRYP_Algorithm_Mode */
uint16_t CRYP_DataType; /*!< 32-bit data, 16-bit data, bit data or bit-string.
uint32_t CRYP_AlgoMode; /*!< TDES-ECB, TDES-CBC, DES-ECB, DES-CBC, AES-ECB,
AES-CBC, AES-CTR, AES-Key, AES-GCM and AES-CCM.
This parameter can be a value of @ref CRYP_Algorithm_Mode */
uint32_t CRYP_DataType; /*!< 32-bit data, 16-bit data, bit data or bit string.
This parameter can be a value of @ref CRYP_Data_Type */
uint16_t CRYP_KeySize; /*!< Used only in AES mode only : 128, 192 or 256 bit
uint32_t CRYP_KeySize; /*!< Used only in AES mode only : 128, 192 or 256 bit
key length. This parameter can be a value of
@ref CRYP_Key_Size_for_AES_only */
}CRYP_InitTypeDef;
@@ -88,14 +94,14 @@ typedef struct
*/
typedef struct
{
/*!< Configuration */
uint32_t CR_bits9to2;
/*!< KEY */
/*!< Current Configuration */
uint32_t CR_CurrentConfig;
/*!< IV */
uint32_t CRYP_IV0LR;
uint32_t CRYP_IV0RR;
uint32_t CRYP_IV1LR;
uint32_t CRYP_IV1RR;
/*!< IV */
/*!< KEY */
uint32_t CRYP_K0LR;
uint32_t CRYP_K0RR;
uint32_t CRYP_K1LR;
@@ -104,6 +110,8 @@ typedef struct
uint32_t CRYP_K2RR;
uint32_t CRYP_K3LR;
uint32_t CRYP_K3RR;
uint32_t CRYP_CSGCMCCMR[8];
uint32_t CRYP_CSGCMR[8];
}CRYP_Context;
@@ -130,31 +138,54 @@ typedef struct
*/
/*!< TDES Modes */
#define CRYP_AlgoMode_TDES_ECB ((uint16_t)0x0000)
#define CRYP_AlgoMode_TDES_CBC ((uint16_t)0x0008)
#define CRYP_AlgoMode_TDES_ECB ((uint32_t)0x00000000)
#define CRYP_AlgoMode_TDES_CBC ((uint32_t)0x00000008)
/*!< DES Modes */
#define CRYP_AlgoMode_DES_ECB ((uint16_t)0x0010)
#define CRYP_AlgoMode_DES_CBC ((uint16_t)0x0018)
#define CRYP_AlgoMode_DES_ECB ((uint32_t)0x00000010)
#define CRYP_AlgoMode_DES_CBC ((uint32_t)0x00000018)
/*!< AES Modes */
#define CRYP_AlgoMode_AES_ECB ((uint16_t)0x0020)
#define CRYP_AlgoMode_AES_CBC ((uint16_t)0x0028)
#define CRYP_AlgoMode_AES_CTR ((uint16_t)0x0030)
#define CRYP_AlgoMode_AES_Key ((uint16_t)0x0038)
#define CRYP_AlgoMode_AES_ECB ((uint32_t)0x00000020)
#define CRYP_AlgoMode_AES_CBC ((uint32_t)0x00000028)
#define CRYP_AlgoMode_AES_CTR ((uint32_t)0x00000030)
#define CRYP_AlgoMode_AES_Key ((uint32_t)0x00000038)
#define CRYP_AlgoMode_AES_GCM ((uint32_t)0x00080000)
#define CRYP_AlgoMode_AES_CCM ((uint32_t)0x00080008)
#define IS_CRYP_ALGOMODE(ALGOMODE) (((ALGOMODE) == CRYP_AlgoMode_TDES_ECB) || \
((ALGOMODE) == CRYP_AlgoMode_TDES_CBC)|| \
((ALGOMODE) == CRYP_AlgoMode_DES_ECB)|| \
((ALGOMODE) == CRYP_AlgoMode_DES_ECB) || \
((ALGOMODE) == CRYP_AlgoMode_DES_CBC) || \
((ALGOMODE) == CRYP_AlgoMode_AES_ECB) || \
((ALGOMODE) == CRYP_AlgoMode_AES_CBC) || \
((ALGOMODE) == CRYP_AlgoMode_AES_CTR) || \
((ALGOMODE) == CRYP_AlgoMode_AES_Key))
((ALGOMODE) == CRYP_AlgoMode_AES_Key) || \
((ALGOMODE) == CRYP_AlgoMode_AES_GCM) || \
((ALGOMODE) == CRYP_AlgoMode_AES_CCM))
/**
* @}
*/
/** @defgroup CRYP_Phase
* @{
*/
/*!< The phases are valid only for AES-GCM and AES-CCM modes */
#define CRYP_Phase_Init ((uint32_t)0x00000000)
#define CRYP_Phase_Header CRYP_CR_GCM_CCMPH_0
#define CRYP_Phase_Payload CRYP_CR_GCM_CCMPH_1
#define CRYP_Phase_Final CRYP_CR_GCM_CCMPH
#define IS_CRYP_PHASE(PHASE) (((PHASE) == CRYP_Phase_Init) || \
((PHASE) == CRYP_Phase_Header) || \
((PHASE) == CRYP_Phase_Payload) || \
((PHASE) == CRYP_Phase_Final))
/**
* @}
*/
/** @defgroup CRYP_Data_Type
* @{
*/
@@ -260,23 +291,24 @@ void CRYP_KeyStructInit(CRYP_KeyInitTypeDef* CRYP_KeyInitStruct);
void CRYP_IVInit(CRYP_IVInitTypeDef* CRYP_IVInitStruct);
void CRYP_IVStructInit(CRYP_IVInitTypeDef* CRYP_IVInitStruct);
void CRYP_Cmd(FunctionalState NewState);
void CRYP_PhaseConfig(uint32_t CRYP_Phase);
void CRYP_FIFOFlush(void);
/* CRYP Data processing functions *********************************************/
void CRYP_DataIn(uint32_t Data);
uint32_t CRYP_DataOut(void);
void CRYP_FIFOFlush(void);
/* CRYP Context swapping functions ********************************************/
ErrorStatus CRYP_SaveContext(CRYP_Context* CRYP_ContextSave,
CRYP_KeyInitTypeDef* CRYP_KeyInitStruct);
void CRYP_RestoreContext(CRYP_Context* CRYP_ContextRestore);
/* CRYP's DMA interface function **********************************************/
/* CRYP DMA interface function ************************************************/
void CRYP_DMACmd(uint8_t CRYP_DMAReq, FunctionalState NewState);
/* Interrupts and flags management functions **********************************/
void CRYP_ITConfig(uint8_t CRYP_IT, FunctionalState NewState);
ITStatus CRYP_GetITStatus(uint8_t CRYP_IT);
FunctionalState CRYP_GetCmdStatus(void);
FlagStatus CRYP_GetFlagStatus(uint8_t CRYP_FLAG);
/* High Level AES functions **************************************************/
@@ -297,6 +329,20 @@ ErrorStatus CRYP_AES_CTR(uint8_t Mode,
uint8_t *Input, uint32_t Ilength,
uint8_t *Output);
ErrorStatus CRYP_AES_GCM(uint8_t Mode, uint8_t InitVectors[16],
uint8_t *Key, uint16_t Keysize,
uint8_t *Input, uint32_t ILength,
uint8_t *Header, uint32_t HLength,
uint8_t *Output, uint8_t *AuthTAG);
ErrorStatus CRYP_AES_CCM(uint8_t Mode,
uint8_t* Nonce, uint32_t NonceSize,
uint8_t* Key, uint16_t Keysize,
uint8_t* Input, uint32_t ILength,
uint8_t* Header, uint32_t HLength, uint8_t *HBuffer,
uint8_t* Output,
uint8_t* AuthTAG, uint32_t TAGSize);
/* High Level TDES functions **************************************************/
ErrorStatus CRYP_TDES_ECB(uint8_t Mode,
uint8_t Key[24],
@@ -335,4 +381,4 @@ ErrorStatus CRYP_DES_CBC(uint8_t Mode,
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dac.h
+16 -10
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_dac.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the DAC firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -295,4 +301,4 @@ void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dbgmcu.h
+16 -10
View File
@@ -2,20 +2,26 @@
******************************************************************************
* @file stm32f4xx_dbgmcu.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the DBGMCU firmware library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -100,4 +106,4 @@ void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dcmi.h
+16 -10
View File
@@ -2,20 +2,26 @@
******************************************************************************
* @file stm32f4xx_dcmi.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the DCMI firmware library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -303,4 +309,4 @@ void DCMI_ClearITPendingBit(uint16_t DCMI_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dma.h
+17 -11
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_dma.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the DMA firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -393,7 +399,7 @@ typedef struct
#define DMA_FLAG_TCIF7 ((uint32_t)0x28000000)
#define IS_DMA_CLEAR_FLAG(FLAG) ((((FLAG) & 0x30000000) != 0x30000000) && (((FLAG) & 0x30000000) != 0) && \
(((FLAG) & 0xC082F082) == 0x00) && ((FLAG) != 0x00))
(((FLAG) & 0xC002F082) == 0x00) && ((FLAG) != 0x00))
#define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA_FLAG_TCIF0) || ((FLAG) == DMA_FLAG_HTIF0) || \
((FLAG) == DMA_FLAG_TEIF0) || ((FLAG) == DMA_FLAG_DMEIF0) || \
@@ -600,4 +606,4 @@ void DMA_ClearITPendingBit(DMA_Stream_TypeDef* DMAy_Streamx, uint32_t DMA_IT);
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dma2d.h
+469
View File
@@ -0,0 +1,469 @@
/**
******************************************************************************
* @file stm32f4xx_dma2d.h
* @author MCD Application Team
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the DMA2D firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_DMA2D_H
#define __STM32F4xx_DMA2D_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx.h"
/** @addtogroup STM32F4xx_StdPeriph_Driver
* @{
*/
/** @addtogroup DMA2D
* @{
*/
/* Exported types ------------------------------------------------------------*/
/**
* @brief DMA2D Init structure definition
*/
typedef struct
{
uint32_t DMA2D_Mode; /*!< configures the DMA2D transfer mode.
This parameter can be one value of @ref DMA2D_MODE */
uint32_t DMA2D_CMode; /*!< configures the color format of the output image.
This parameter can be one value of @ref DMA2D_CMODE */
uint32_t DMA2D_OutputBlue; /*!< configures the blue value of the output image.
This parameter must range:
- from 0x00 to 0xFF if ARGB8888 color mode is slected
- from 0x00 to 0xFF if RGB888 color mode is slected
- from 0x00 to 0x1F if RGB565 color mode is slected
- from 0x00 to 0x1F if ARGB1555 color mode is slected
- from 0x00 to 0x0F if ARGB4444 color mode is slected */
uint32_t DMA2D_OutputGreen; /*!< configures the green value of the output image.
This parameter must range:
- from 0x00 to 0xFF if ARGB8888 color mode is slected
- from 0x00 to 0xFF if RGB888 color mode is slected
- from 0x00 to 0x2F if RGB565 color mode is slected
- from 0x00 to 0x1F if ARGB1555 color mode is slected
- from 0x00 to 0x0F if ARGB4444 color mode is slected */
uint32_t DMA2D_OutputRed; /*!< configures the red value of the output image.
This parameter must range:
- from 0x00 to 0xFF if ARGB8888 color mode is slected
- from 0x00 to 0xFF if RGB888 color mode is slected
- from 0x00 to 0x1F if RGB565 color mode is slected
- from 0x00 to 0x1F if ARGB1555 color mode is slected
- from 0x00 to 0x0F if ARGB4444 color mode is slected */
uint32_t DMA2D_OutputAlpha; /*!< configures the alpha channel of the output color.
This parameter must range:
- from 0x00 to 0xFF if ARGB8888 color mode is slected
- from 0x00 to 0x01 if ARGB1555 color mode is slected
- from 0x00 to 0x0F if ARGB4444 color mode is slected */
uint32_t DMA2D_OutputMemoryAdd; /*!< Specifies the memory address. This parameter
must be range from 0x00000000 to 0xFFFFFFFF. */
uint32_t DMA2D_OutputOffset; /*!< Specifies the Offset value. This parameter must be range from
0x0000 to 0x3FFF. */
uint32_t DMA2D_NumberOfLine; /*!< Configures the number of line of the area to be transfered.
This parameter must range from 0x0000 to 0xFFFF */
uint32_t DMA2D_PixelPerLine; /*!< Configures the number pixel per line of the area to be transfered.
This parameter must range from 0x0000 to 0x3FFF */
} DMA2D_InitTypeDef;
typedef struct
{
uint32_t DMA2D_FGMA; /*!< configures the DMA2D foreground memory address.
This parameter must be range from 0x00000000 to 0xFFFFFFFF. */
uint32_t DMA2D_FGO; /*!< configures the DMA2D foreground offset.
This parameter must be range from 0x0000 to 0x3FFF. */
uint32_t DMA2D_FGCM; /*!< configures the DMA2D foreground color mode .
This parameter can be one value of @ref DMA2D_FGCM */
uint32_t DMA2D_FG_CLUT_CM; /*!< configures the DMA2D foreground CLUT color mode.
This parameter can be one value of @ref DMA2D_FG_CLUT_CM */
uint32_t DMA2D_FG_CLUT_SIZE; /*!< configures the DMA2D foreground CLUT size.
This parameter must range from 0x00 to 0xFF. */
uint32_t DMA2D_FGPFC_ALPHA_MODE; /*!< configures the DMA2D foreground alpha mode.
This parameter can be one value of @ref DMA2D_FGPFC_ALPHA_MODE */
uint32_t DMA2D_FGPFC_ALPHA_VALUE; /*!< Specifies the DMA2D foreground alpha value
must be range from 0x00 to 0xFF. */
uint32_t DMA2D_FGC_BLUE; /*!< Specifies the DMA2D foreground blue value
must be range from 0x00 to 0xFF. */
uint32_t DMA2D_FGC_GREEN; /*!< Specifies the DMA2D foreground green value
must be range from 0x00 to 0xFF. */
uint32_t DMA2D_FGC_RED; /*!< Specifies the DMA2D foreground red value
must be range from 0x00 to 0xFF. */
uint32_t DMA2D_FGCMAR; /*!< Configures the DMA2D foreground CLUT memory address.
This parameter must range from 0x00000000 to 0xFFFFFFFF. */
} DMA2D_FG_InitTypeDef;
typedef struct
{
uint32_t DMA2D_BGMA; /*!< configures the DMA2D background memory address.
This parameter must be range from 0x00000000 to 0xFFFFFFFF. */
uint32_t DMA2D_BGO; /*!< configures the DMA2D background offset.
This parameter must be range from 0x0000 to 0x3FFF. */
uint32_t DMA2D_BGCM; /*!< configures the DMA2D background color mode .
This parameter can be one value of @ref DMA2D_FGCM */
uint32_t DMA2D_BG_CLUT_CM; /*!< configures the DMA2D background CLUT color mode.
This parameter can be one value of @ref DMA2D_FG_CLUT_CM */
uint32_t DMA2D_BG_CLUT_SIZE; /*!< configures the DMA2D background CLUT size.
This parameter must range from 0x00 to 0xFF. */
uint32_t DMA2D_BGPFC_ALPHA_MODE; /*!< configures the DMA2D background alpha mode.
This parameter can be one value of @ref DMA2D_FGPFC_ALPHA_MODE */
uint32_t DMA2D_BGPFC_ALPHA_VALUE; /*!< Specifies the DMA2D background alpha value
must be range from 0x00 to 0xFF. */
uint32_t DMA2D_BGC_BLUE; /*!< Specifies the DMA2D background blue value
must be range from 0x00 to 0xFF. */
uint32_t DMA2D_BGC_GREEN; /*!< Specifies the DMA2D background green value
must be range from 0x00 to 0xFF. */
uint32_t DMA2D_BGC_RED; /*!< Specifies the DMA2D background red value
must be range from 0x00 to 0xFF. */
uint32_t DMA2D_BGCMAR; /*!< Configures the DMA2D background CLUT memory address.
This parameter must range from 0x00000000 to 0xFFFFFFFF. */
} DMA2D_BG_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
/** @defgroup DMA2D_Exported_Constants
* @{
*/
/** @defgroup DMA2D_MODE
* @{
*/
#define DMA2D_M2M ((uint32_t)0x00000000)
#define DMA2D_M2M_PFC ((uint32_t)0x00010000)
#define DMA2D_M2M_BLEND ((uint32_t)0x00020000)
#define DMA2D_R2M ((uint32_t)0x00030000)
#define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
/**
* @}
*/
/** @defgroup DMA2D_CMODE
* @{
*/
#define DMA2D_ARGB8888 ((uint32_t)0x00000000)
#define DMA2D_RGB888 ((uint32_t)0x00000001)
#define DMA2D_RGB565 ((uint32_t)0x00000002)
#define DMA2D_ARGB1555 ((uint32_t)0x00000003)
#define DMA2D_ARGB4444 ((uint32_t)0x00000004)
#define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
((MODE_ARGB) == DMA2D_ARGB4444))
/**
* @}
*/
/** @defgroup DMA2D_OUTPUT_COLOR
* @{
*/
#define DMA2D_Output_Color ((uint32_t)0x000000FF)
#define IS_DMA2D_OGREEN(OGREEN) ((OGREEN) <= DMA2D_Output_Color)
#define IS_DMA2D_ORED(ORED) ((ORED) <= DMA2D_Output_Color)
#define IS_DMA2D_OBLUE(OBLUE) ((OBLUE) <= DMA2D_Output_Color)
#define IS_DMA2D_OALPHA(OALPHA) ((OALPHA) <= DMA2D_Output_Color)
/**
* @}
*/
/** @defgroup DMA2D_OUTPUT_OFFSET
* @{
*/
#define DMA2D_OUTPUT_OFFSET ((uint32_t)0x00003FFF)
#define IS_DMA2D_OUTPUT_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OUTPUT_OFFSET)
/**
* @}
*/
/** @defgroup DMA2D_SIZE
* @{
*/
#define DMA2D_pixel ((uint32_t)0x00003FFF)
#define DMA2D_Line ((uint32_t)0x0000FFFF)
#define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_Line)
#define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_pixel)
/**
* @}
*/
/** @defgroup DMA2D_OFFSET
* @{
*/
#define OFFSET ((uint32_t)0x00003FFF)
#define IS_DMA2D_FGO(FGO) ((FGO) <= OFFSET)
#define IS_DMA2D_BGO(BGO) ((BGO) <= OFFSET)
/**
* @}
*/
/** @defgroup DMA2D_FGCM
* @{
*/
#define CM_ARGB8888 ((uint32_t)0x00000000)
#define CM_RGB888 ((uint32_t)0x00000001)
#define CM_RGB565 ((uint32_t)0x00000002)
#define CM_ARGB1555 ((uint32_t)0x00000003)
#define CM_ARGB4444 ((uint32_t)0x00000004)
#define CM_L8 ((uint32_t)0x00000005)
#define CM_AL44 ((uint32_t)0x00000006)
#define CM_AL88 ((uint32_t)0x00000007)
#define CM_L4 ((uint32_t)0x00000008)
#define CM_A8 ((uint32_t)0x00000009)
#define CM_A4 ((uint32_t)0x0000000A)
#define IS_DMA2D_FGCM(FGCM) (((FGCM) == CM_ARGB8888) || ((FGCM) == CM_RGB888) || \
((FGCM) == CM_RGB565) || ((FGCM) == CM_ARGB1555) || \
((FGCM) == CM_ARGB4444) || ((FGCM) == CM_L8) || \
((FGCM) == CM_AL44) || ((FGCM) == CM_AL88) || \
((FGCM) == CM_L4) || ((FGCM) == CM_A8) || \
((FGCM) == CM_A4))
#define IS_DMA2D_BGCM(BGCM) (((BGCM) == CM_ARGB8888) || ((BGCM) == CM_RGB888) || \
((BGCM) == CM_RGB565) || ((BGCM) == CM_ARGB1555) || \
((BGCM) == CM_ARGB4444) || ((BGCM) == CM_L8) || \
((BGCM) == CM_AL44) || ((BGCM) == CM_AL88) || \
((BGCM) == CM_L4) || ((BGCM) == CM_A8) || \
((BGCM) == CM_A4))
/**
* @}
*/
/** @defgroup DMA2D_FG_CLUT_CM
* @{
*/
#define CLUT_CM_ARGB8888 ((uint32_t)0x00000000)
#define CLUT_CM_RGB888 ((uint32_t)0x00000001)
#define IS_DMA2D_FG_CLUT_CM(FG_CLUT_CM) (((FG_CLUT_CM) == CLUT_CM_ARGB8888) || ((FG_CLUT_CM) == CLUT_CM_RGB888))
#define IS_DMA2D_BG_CLUT_CM(BG_CLUT_CM) (((BG_CLUT_CM) == CLUT_CM_ARGB8888) || ((BG_CLUT_CM) == CLUT_CM_RGB888))
/**
* @}
*/
/** @defgroup DMA2D_FG_COLOR_VALUE
* @{
*/
#define COLOR_VALUE ((uint32_t)0x000000FF)
#define IS_DMA2D_FG_CLUT_SIZE(FG_CLUT_SIZE) ((FG_CLUT_SIZE) <= COLOR_VALUE)
#define IS_DMA2D_FG_ALPHA_VALUE(FG_ALPHA_VALUE) ((FG_ALPHA_VALUE) <= COLOR_VALUE)
#define IS_DMA2D_FGC_BLUE(FGC_BLUE) ((FGC_BLUE) <= COLOR_VALUE)
#define IS_DMA2D_FGC_GREEN(FGC_GREEN) ((FGC_GREEN) <= COLOR_VALUE)
#define IS_DMA2D_FGC_RED(FGC_RED) ((FGC_RED) <= COLOR_VALUE)
#define IS_DMA2D_BG_CLUT_SIZE(BG_CLUT_SIZE) ((BG_CLUT_SIZE) <= COLOR_VALUE)
#define IS_DMA2D_BG_ALPHA_VALUE(BG_ALPHA_VALUE) ((BG_ALPHA_VALUE) <= COLOR_VALUE)
#define IS_DMA2D_BGC_BLUE(BGC_BLUE) ((BGC_BLUE) <= COLOR_VALUE)
#define IS_DMA2D_BGC_GREEN(BGC_GREEN) ((BGC_GREEN) <= COLOR_VALUE)
#define IS_DMA2D_BGC_RED(BGC_RED) ((BGC_RED) <= COLOR_VALUE)
/**
* @}
*/
/** DMA2D_FGPFC_ALPHA_MODE
* @{
*/
#define NO_MODIF_ALPHA_VALUE ((uint32_t)0x00000000)
#define REPLACE_ALPHA_VALUE ((uint32_t)0x00000001)
#define COMBINE_ALPHA_VALUE ((uint32_t)0x00000002)
#define IS_DMA2D_FG_ALPHA_MODE(FG_ALPHA_MODE) (((FG_ALPHA_MODE) == NO_MODIF_ALPHA_VALUE) || \
((FG_ALPHA_MODE) == REPLACE_ALPHA_VALUE) || \
((FG_ALPHA_MODE) == COMBINE_ALPHA_VALUE))
#define IS_DMA2D_BG_ALPHA_MODE(BG_ALPHA_MODE) (((BG_ALPHA_MODE) == NO_MODIF_ALPHA_VALUE) || \
((BG_ALPHA_MODE) == REPLACE_ALPHA_VALUE) || \
((BG_ALPHA_MODE) == COMBINE_ALPHA_VALUE))
/**
* @}
*/
/** @defgroup DMA2D_Interrupts
* @{
*/
#define DMA2D_IT_CE DMA2D_CR_CEIE
#define DMA2D_IT_CTC DMA2D_CR_CTCIE
#define DMA2D_IT_CAE DMA2D_CR_CAEIE
#define DMA2D_IT_TW DMA2D_CR_TWIE
#define DMA2D_IT_TC DMA2D_CR_TCIE
#define DMA2D_IT_TE DMA2D_CR_TEIE
#define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
/**
* @}
*/
/** @defgroup DMA2D_Flag
* @{
*/
#define DMA2D_FLAG_CE DMA2D_ISR_CEIF
#define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF
#define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF
#define DMA2D_FLAG_TW DMA2D_ISR_TWIF
#define DMA2D_FLAG_TC DMA2D_ISR_TCIF
#define DMA2D_FLAG_TE DMA2D_ISR_TEIF
#define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
/**
* @}
*/
/** @defgroup DMA2D_DeadTime
* @{
*/
#define DEADTIME ((uint32_t)0x000000FF)
#define IS_DMA2D_DEAD_TIME(DEAD_TIME) ((DEAD_TIME) <= DEADTIME)
#define LINE_WATERMARK DMA2D_LWR_LW
#define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* Function used to set the DMA2D configuration to the default reset state *****/
void DMA2D_DeInit(void);
/* Initialization and Configuration functions *********************************/
void DMA2D_Init(DMA2D_InitTypeDef* DMA2D_InitStruct);
void DMA2D_StructInit(DMA2D_InitTypeDef* DMA2D_InitStruct);
void DMA2D_StartTransfer(void);
void DMA2D_AbortTransfer(void);
void DMA2D_Suspend(FunctionalState NewState);
void DMA2D_FGConfig(DMA2D_FG_InitTypeDef* DMA2D_FG_InitStruct);
void DMA2D_FG_StructInit(DMA2D_FG_InitTypeDef* DMA2D_FG_InitStruct);
void DMA2D_BGConfig(DMA2D_BG_InitTypeDef* DMA2D_BG_InitStruct);
void DMA2D_BG_StructInit(DMA2D_BG_InitTypeDef* DMA2D_BG_InitStruct);
void DMA2D_FGStart(FunctionalState NewState);
void DMA2D_BGStart(FunctionalState NewState);
void DMA2D_DeadTimeConfig(uint32_t DMA2D_DeadTime, FunctionalState NewState);
void DMA2D_LineWatermarkConfig(uint32_t DMA2D_LWatermarkConfig);
/* Interrupts and flags management functions **********************************/
void DMA2D_ITConfig(uint32_t DMA2D_IT, FunctionalState NewState);
FlagStatus DMA2D_GetFlagStatus(uint32_t DMA2D_FLAG);
void DMA2D_ClearFlag(uint32_t DMA2D_FLAG);
ITStatus DMA2D_GetITStatus(uint32_t DMA2D_IT);
void DMA2D_ClearITPendingBit(uint32_t DMA2D_IT);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F4xx_DMA2D_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_exti.h
+16 -10
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_exti.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the EXTI firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -174,4 +180,4 @@ void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_flash.h
+232 -84
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_flash.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the FLASH
* firmware library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -46,6 +52,7 @@
typedef enum
{
FLASH_BUSY = 1,
FLASH_ERROR_RD,
FLASH_ERROR_PGS,
FLASH_ERROR_PGP,
FLASH_ERROR_PGA,
@@ -64,23 +71,40 @@ typedef enum
/** @defgroup Flash_Latency
* @{
*/
#define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */
#define FLASH_Latency_1 ((uint8_t)0x0001) /*!< FLASH One Latency cycle */
#define FLASH_Latency_2 ((uint8_t)0x0002) /*!< FLASH Two Latency cycles */
#define FLASH_Latency_3 ((uint8_t)0x0003) /*!< FLASH Three Latency cycles */
#define FLASH_Latency_4 ((uint8_t)0x0004) /*!< FLASH Four Latency cycles */
#define FLASH_Latency_5 ((uint8_t)0x0005) /*!< FLASH Five Latency cycles */
#define FLASH_Latency_6 ((uint8_t)0x0006) /*!< FLASH Six Latency cycles */
#define FLASH_Latency_7 ((uint8_t)0x0007) /*!< FLASH Seven Latency cycles */
#define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */
#define FLASH_Latency_1 ((uint8_t)0x0001) /*!< FLASH One Latency cycle */
#define FLASH_Latency_2 ((uint8_t)0x0002) /*!< FLASH Two Latency cycles */
#define FLASH_Latency_3 ((uint8_t)0x0003) /*!< FLASH Three Latency cycles */
#define FLASH_Latency_4 ((uint8_t)0x0004) /*!< FLASH Four Latency cycles */
#define FLASH_Latency_5 ((uint8_t)0x0005) /*!< FLASH Five Latency cycles */
#define FLASH_Latency_6 ((uint8_t)0x0006) /*!< FLASH Six Latency cycles */
#define FLASH_Latency_7 ((uint8_t)0x0007) /*!< FLASH Seven Latency cycles */
#define FLASH_Latency_8 ((uint8_t)0x0008) /*!< FLASH Eight Latency cycles */
#define FLASH_Latency_9 ((uint8_t)0x0009) /*!< FLASH Nine Latency cycles */
#define FLASH_Latency_10 ((uint8_t)0x000A) /*!< FLASH Ten Latency cycles */
#define FLASH_Latency_11 ((uint8_t)0x000B) /*!< FLASH Eleven Latency cycles */
#define FLASH_Latency_12 ((uint8_t)0x000C) /*!< FLASH Twelve Latency cycles */
#define FLASH_Latency_13 ((uint8_t)0x000D) /*!< FLASH Thirteen Latency cycles */
#define FLASH_Latency_14 ((uint8_t)0x000E) /*!< FLASH Fourteen Latency cycles */
#define FLASH_Latency_15 ((uint8_t)0x000F) /*!< FLASH Fifteen Latency cycles */
#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
((LATENCY) == FLASH_Latency_1) || \
((LATENCY) == FLASH_Latency_2) || \
((LATENCY) == FLASH_Latency_3) || \
((LATENCY) == FLASH_Latency_4) || \
((LATENCY) == FLASH_Latency_5) || \
((LATENCY) == FLASH_Latency_6) || \
((LATENCY) == FLASH_Latency_7))
#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
((LATENCY) == FLASH_Latency_1) || \
((LATENCY) == FLASH_Latency_2) || \
((LATENCY) == FLASH_Latency_3) || \
((LATENCY) == FLASH_Latency_4) || \
((LATENCY) == FLASH_Latency_5) || \
((LATENCY) == FLASH_Latency_6) || \
((LATENCY) == FLASH_Latency_7) || \
((LATENCY) == FLASH_Latency_8) || \
((LATENCY) == FLASH_Latency_9) || \
((LATENCY) == FLASH_Latency_10) || \
((LATENCY) == FLASH_Latency_11) || \
((LATENCY) == FLASH_Latency_12) || \
((LATENCY) == FLASH_Latency_13) || \
((LATENCY) == FLASH_Latency_14) || \
((LATENCY) == FLASH_Latency_15))
/**
* @}
*/
@@ -103,27 +127,59 @@ typedef enum
/** @defgroup FLASH_Sectors
* @{
*/
#define FLASH_Sector_0 ((uint16_t)0x0000) /*!< Sector Number 0 */
#define FLASH_Sector_1 ((uint16_t)0x0008) /*!< Sector Number 1 */
#define FLASH_Sector_2 ((uint16_t)0x0010) /*!< Sector Number 2 */
#define FLASH_Sector_3 ((uint16_t)0x0018) /*!< Sector Number 3 */
#define FLASH_Sector_4 ((uint16_t)0x0020) /*!< Sector Number 4 */
#define FLASH_Sector_5 ((uint16_t)0x0028) /*!< Sector Number 5 */
#define FLASH_Sector_6 ((uint16_t)0x0030) /*!< Sector Number 6 */
#define FLASH_Sector_7 ((uint16_t)0x0038) /*!< Sector Number 7 */
#define FLASH_Sector_8 ((uint16_t)0x0040) /*!< Sector Number 8 */
#define FLASH_Sector_9 ((uint16_t)0x0048) /*!< Sector Number 9 */
#define FLASH_Sector_10 ((uint16_t)0x0050) /*!< Sector Number 10 */
#define FLASH_Sector_11 ((uint16_t)0x0058) /*!< Sector Number 11 */
#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_Sector_0) || ((SECTOR) == FLASH_Sector_1) ||\
((SECTOR) == FLASH_Sector_2) || ((SECTOR) == FLASH_Sector_3) ||\
((SECTOR) == FLASH_Sector_4) || ((SECTOR) == FLASH_Sector_5) ||\
((SECTOR) == FLASH_Sector_6) || ((SECTOR) == FLASH_Sector_7) ||\
((SECTOR) == FLASH_Sector_8) || ((SECTOR) == FLASH_Sector_9) ||\
((SECTOR) == FLASH_Sector_10) || ((SECTOR) == FLASH_Sector_11))
#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x080FFFFF)) ||\
*/
#define FLASH_Sector_0 ((uint16_t)0x0000) /*!< Sector Number 0 */
#define FLASH_Sector_1 ((uint16_t)0x0008) /*!< Sector Number 1 */
#define FLASH_Sector_2 ((uint16_t)0x0010) /*!< Sector Number 2 */
#define FLASH_Sector_3 ((uint16_t)0x0018) /*!< Sector Number 3 */
#define FLASH_Sector_4 ((uint16_t)0x0020) /*!< Sector Number 4 */
#define FLASH_Sector_5 ((uint16_t)0x0028) /*!< Sector Number 5 */
#define FLASH_Sector_6 ((uint16_t)0x0030) /*!< Sector Number 6 */
#define FLASH_Sector_7 ((uint16_t)0x0038) /*!< Sector Number 7 */
#define FLASH_Sector_8 ((uint16_t)0x0040) /*!< Sector Number 8 */
#define FLASH_Sector_9 ((uint16_t)0x0048) /*!< Sector Number 9 */
#define FLASH_Sector_10 ((uint16_t)0x0050) /*!< Sector Number 10 */
#define FLASH_Sector_11 ((uint16_t)0x0058) /*!< Sector Number 11 */
#define FLASH_Sector_12 ((uint16_t)0x0080) /*!< Sector Number 12 */
#define FLASH_Sector_13 ((uint16_t)0x0088) /*!< Sector Number 13 */
#define FLASH_Sector_14 ((uint16_t)0x0090) /*!< Sector Number 14 */
#define FLASH_Sector_15 ((uint16_t)0x0098) /*!< Sector Number 15 */
#define FLASH_Sector_16 ((uint16_t)0x00A0) /*!< Sector Number 16 */
#define FLASH_Sector_17 ((uint16_t)0x00A8) /*!< Sector Number 17 */
#define FLASH_Sector_18 ((uint16_t)0x00B0) /*!< Sector Number 18 */
#define FLASH_Sector_19 ((uint16_t)0x00B8) /*!< Sector Number 19 */
#define FLASH_Sector_20 ((uint16_t)0x00C0) /*!< Sector Number 20 */
#define FLASH_Sector_21 ((uint16_t)0x00C8) /*!< Sector Number 21 */
#define FLASH_Sector_22 ((uint16_t)0x00D0) /*!< Sector Number 22 */
#define FLASH_Sector_23 ((uint16_t)0x00D8) /*!< Sector Number 23 */
#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_Sector_0) || ((SECTOR) == FLASH_Sector_1) ||\
((SECTOR) == FLASH_Sector_2) || ((SECTOR) == FLASH_Sector_3) ||\
((SECTOR) == FLASH_Sector_4) || ((SECTOR) == FLASH_Sector_5) ||\
((SECTOR) == FLASH_Sector_6) || ((SECTOR) == FLASH_Sector_7) ||\
((SECTOR) == FLASH_Sector_8) || ((SECTOR) == FLASH_Sector_9) ||\
((SECTOR) == FLASH_Sector_10) || ((SECTOR) == FLASH_Sector_11) ||\
((SECTOR) == FLASH_Sector_12) || ((SECTOR) == FLASH_Sector_13) ||\
((SECTOR) == FLASH_Sector_14) || ((SECTOR) == FLASH_Sector_15) ||\
((SECTOR) == FLASH_Sector_16) || ((SECTOR) == FLASH_Sector_17) ||\
((SECTOR) == FLASH_Sector_18) || ((SECTOR) == FLASH_Sector_19) ||\
((SECTOR) == FLASH_Sector_20) || ((SECTOR) == FLASH_Sector_21) ||\
((SECTOR) == FLASH_Sector_22) || ((SECTOR) == FLASH_Sector_23))
#if defined (STM32F427_437xx) || defined (STM32F429_439xx)
#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x081FFFFF)) ||\
(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F)))
#endif /* STM32F427_437xx || STM32F429_439xx */
#if defined (STM32F40_41xxx)
#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x080FFFFF)) ||\
(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F)))
#endif /* STM32F40_41xxx */
#if defined (STM32F401xx)
#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0803FFFF)) ||\
(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F)))
#endif /* STM32F401xx */
/**
* @}
*/
@@ -131,18 +187,30 @@ typedef enum
/** @defgroup Option_Bytes_Write_Protection
* @{
*/
#define OB_WRP_Sector_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
#define OB_WRP_Sector_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
#define OB_WRP_Sector_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
#define OB_WRP_Sector_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
#define OB_WRP_Sector_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
#define OB_WRP_Sector_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
#define OB_WRP_Sector_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
#define OB_WRP_Sector_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
#define OB_WRP_Sector_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
#define OB_WRP_Sector_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
#define OB_WRP_Sector_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
#define OB_WRP_Sector_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
#define OB_WRP_Sector_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
#define OB_WRP_Sector_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
#define OB_WRP_Sector_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
#define OB_WRP_Sector_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
#define OB_WRP_Sector_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
#define OB_WRP_Sector_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
#define OB_WRP_Sector_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
#define OB_WRP_Sector_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
#define OB_WRP_Sector_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
#define OB_WRP_Sector_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
#define OB_WRP_Sector_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
#define OB_WRP_Sector_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
#define OB_WRP_Sector_12 ((uint32_t)0x00000001) /*!< Write protection of Sector12 */
#define OB_WRP_Sector_13 ((uint32_t)0x00000002) /*!< Write protection of Sector13 */
#define OB_WRP_Sector_14 ((uint32_t)0x00000004) /*!< Write protection of Sector14 */
#define OB_WRP_Sector_15 ((uint32_t)0x00000008) /*!< Write protection of Sector15 */
#define OB_WRP_Sector_16 ((uint32_t)0x00000010) /*!< Write protection of Sector16 */
#define OB_WRP_Sector_17 ((uint32_t)0x00000020) /*!< Write protection of Sector17 */
#define OB_WRP_Sector_18 ((uint32_t)0x00000040) /*!< Write protection of Sector18 */
#define OB_WRP_Sector_19 ((uint32_t)0x00000080) /*!< Write protection of Sector19 */
#define OB_WRP_Sector_20 ((uint32_t)0x00000100) /*!< Write protection of Sector20 */
#define OB_WRP_Sector_21 ((uint32_t)0x00000200) /*!< Write protection of Sector21 */
#define OB_WRP_Sector_22 ((uint32_t)0x00000400) /*!< Write protection of Sector22 */
#define OB_WRP_Sector_23 ((uint32_t)0x00000800) /*!< Write protection of Sector23 */
#define OB_WRP_Sector_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
#define IS_OB_WRP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
@@ -150,6 +218,50 @@ typedef enum
* @}
*/
/** @defgroup Selection_Protection_Mode
* @{
*/
#define OB_PcROP_Disable ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */
#define OB_PcROP_Enable ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */
#define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PcROP_Disable) || ((PCROP) == OB_PcROP_Enable))
/**
* @}
*/
/** @defgroup Option_Bytes_PC_ReadWrite_Protection
* @{
*/
#define OB_PCROP_Sector_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
#define OB_PCROP_Sector_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
#define OB_PCROP_Sector_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
#define OB_PCROP_Sector_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
#define OB_PCROP_Sector_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
#define OB_PCROP_Sector_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
#define OB_PCROP_Sector_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */
#define OB_PCROP_Sector_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */
#define OB_PCROP_Sector_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */
#define OB_PCROP_Sector_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */
#define OB_PCROP_Sector_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */
#define OB_PCROP_Sector_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */
#define OB_PCROP_Sector_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */
#define OB_PCROP_Sector_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */
#define OB_PCROP_Sector_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */
#define OB_PCROP_Sector_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */
#define OB_PCROP_Sector_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */
#define OB_PCROP_Sector_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */
#define OB_PCROP_Sector_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */
#define OB_PCROP_Sector_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */
#define OB_PCROP_Sector_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */
#define OB_PCROP_Sector_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */
#define OB_PCROP_Sector_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */
#define OB_PCROP_Sector_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */
#define OB_PCROP_Sector_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
/**
* @}
*/
/** @defgroup FLASH_Option_Bytes_Read_Protection
* @{
*/
@@ -207,6 +319,16 @@ typedef enum
/**
* @}
*/
/** @defgroup FLASH_Dual_Boot
* @{
*/
#define OB_Dual_BootEnabled ((uint8_t)0x10) /*!< Dual Bank Boot Enable */
#define OB_Dual_BootDisabled ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */
#define IS_OB_BOOT(BOOT) (((BOOT) == OB_Dual_BootEnabled) || ((BOOT) == OB_Dual_BootDisabled))
/**
* @}
*/
/** @defgroup FLASH_Interrupts
* @{
@@ -221,18 +343,19 @@ typedef enum
/** @defgroup FLASH_Flags
* @{
*/
#define FLASH_FLAG_EOP ((uint32_t)0x00000001) /*!< FLASH End of Operation flag */
#define FLASH_FLAG_OPERR ((uint32_t)0x00000002) /*!< FLASH operation Error flag */
#define FLASH_FLAG_WRPERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */
#define FLASH_FLAG_PGAERR ((uint32_t)0x00000020) /*!< FLASH Programming Alignment error flag */
#define FLASH_FLAG_EOP ((uint32_t)0x00000001) /*!< FLASH End of Operation flag */
#define FLASH_FLAG_OPERR ((uint32_t)0x00000002) /*!< FLASH operation Error flag */
#define FLASH_FLAG_WRPERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */
#define FLASH_FLAG_PGAERR ((uint32_t)0x00000020) /*!< FLASH Programming Alignment error flag */
#define FLASH_FLAG_PGPERR ((uint32_t)0x00000040) /*!< FLASH Programming Parallelism error flag */
#define FLASH_FLAG_PGSERR ((uint32_t)0x00000080) /*!< FLASH Programming Sequence error flag */
#define FLASH_FLAG_BSY ((uint32_t)0x00010000) /*!< FLASH Busy flag */
#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF0C) == 0x00000000) && ((FLAG) != 0x00000000))
#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_EOP) || ((FLAG) == FLASH_FLAG_OPERR) || \
#define FLASH_FLAG_PGSERR ((uint32_t)0x00000080) /*!< FLASH Programming Sequence error flag */
#define FLASH_FLAG_RDERR ((uint32_t)0x00000100) /*!< Read Protection error flag (PCROP) */
#define FLASH_FLAG_BSY ((uint32_t)0x00010000) /*!< FLASH Busy flag */
#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFE0C) == 0x00000000) && ((FLAG) != 0x00000000))
#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_EOP) || ((FLAG) == FLASH_FLAG_OPERR) || \
((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR) || \
((FLAG) == FLASH_FLAG_PGPERR) || ((FLAG) == FLASH_FLAG_PGSERR) || \
((FLAG) == FLASH_FLAG_BSY))
((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_RDERR))
/**
* @}
*/
@@ -262,15 +385,30 @@ typedef enum
*/
/**
* @brief ACR register byte 0 (Bits[8:0]) base address
* @brief ACR register byte 0 (Bits[7:0]) base address
*/
#define ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00)
/**
* @brief OPTCR register byte 3 (Bits[24:16]) base address
* @brief OPTCR register byte 0 (Bits[7:0]) base address
*/
#define OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14)
/**
* @brief OPTCR register byte 1 (Bits[15:8]) base address
*/
#define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15)
/**
* @brief OPTCR register byte 2 (Bits[23:16]) base address
*/
#define OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16)
/**
* @brief OPTCR register byte 3 (Bits[31:24]) base address
*/
#define OPTCR_BYTE3_ADDRESS ((uint32_t)0x40023C17)
/**
* @brief OPTCR1 register byte 0 (Bits[7:0]) base address
*/
#define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A)
/**
* @}
@@ -288,32 +426,42 @@ void FLASH_InstructionCacheReset(void);
void FLASH_DataCacheReset(void);
/* FLASH Memory Programming functions *****************************************/
void FLASH_Unlock(void);
void FLASH_Lock(void);
void FLASH_Unlock(void);
void FLASH_Lock(void);
FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange);
FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange);
FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange);
FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange);
FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data);
FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data);
/* Option Bytes Programming functions *****************************************/
void FLASH_OB_Unlock(void);
void FLASH_OB_Lock(void);
void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState);
void FLASH_OB_RDPConfig(uint8_t OB_RDP);
void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
void FLASH_OB_BORConfig(uint8_t OB_BOR);
void FLASH_OB_Unlock(void);
void FLASH_OB_Lock(void);
void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState);
void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState);
void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP);
void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState);
void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState);
void FLASH_OB_RDPConfig(uint8_t OB_RDP);
void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
void FLASH_OB_BORConfig(uint8_t OB_BOR);
void FLASH_OB_BootConfig(uint8_t OB_BOOT);
FLASH_Status FLASH_OB_Launch(void);
uint8_t FLASH_OB_GetUser(void);
uint16_t FLASH_OB_GetWRP(void);
FlagStatus FLASH_OB_GetRDP(void);
uint8_t FLASH_OB_GetBOR(void);
uint8_t FLASH_OB_GetUser(void);
uint16_t FLASH_OB_GetWRP(void);
uint16_t FLASH_OB_GetWRP1(void);
uint16_t FLASH_OB_GetPCROP(void);
uint16_t FLASH_OB_GetPCROP1(void);
FlagStatus FLASH_OB_GetRDP(void);
uint8_t FLASH_OB_GetBOR(void);
/* Interrupts and flags management functions **********************************/
void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
void FLASH_ClearFlag(uint32_t FLASH_FLAG);
void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
void FLASH_ClearFlag(uint32_t FLASH_FLAG);
FLASH_Status FLASH_GetStatus(void);
FLASH_Status FLASH_WaitForLastOperation(void);
@@ -331,4 +479,4 @@ FLASH_Status FLASH_WaitForLastOperation(void);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_fmc.h
+1137
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_fsmc.h
-669
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_gpio.h
+131 -48
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_gpio.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the GPIO firmware
* library.
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -49,8 +55,10 @@
((PERIPH) == GPIOF) || \
((PERIPH) == GPIOG) || \
((PERIPH) == GPIOH) || \
((PERIPH) == GPIOI))
((PERIPH) == GPIOI) || \
((PERIPH) == GPIOJ) || \
((PERIPH) == GPIOK))
/**
* @brief GPIO Configuration Mode enumeration
*/
@@ -80,13 +88,20 @@ typedef enum
*/
typedef enum
{
GPIO_Speed_2MHz = 0x00, /*!< Low speed */
GPIO_Speed_25MHz = 0x01, /*!< Medium speed */
GPIO_Speed_50MHz = 0x02, /*!< Fast speed */
GPIO_Speed_100MHz = 0x03 /*!< High speed on 30 pF (80 MHz Output max speed on 15 pF) */
GPIO_Low_Speed = 0x00, /*!< Low speed */
GPIO_Medium_Speed = 0x01, /*!< Medium speed */
GPIO_Fast_Speed = 0x02, /*!< Fast speed */
GPIO_High_Speed = 0x03 /*!< High speed */
}GPIOSpeed_TypeDef;
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_2MHz) || ((SPEED) == GPIO_Speed_25MHz) || \
((SPEED) == GPIO_Speed_50MHz)|| ((SPEED) == GPIO_Speed_100MHz))
/* Add legacy definition */
#define GPIO_Speed_2MHz GPIO_Low_Speed
#define GPIO_Speed_25MHz GPIO_Medium_Speed
#define GPIO_Speed_50MHz GPIO_Fast_Speed
#define GPIO_Speed_100MHz GPIO_High_Speed
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Low_Speed) || ((SPEED) == GPIO_Medium_Speed) || \
((SPEED) == GPIO_Fast_Speed)|| ((SPEED) == GPIO_High_Speed))
/**
* @brief GPIO Configuration PullUp PullDown enumeration
@@ -264,38 +279,48 @@ typedef struct
/**
* @brief AF 5 selection
*/
#define GPIO_AF_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
#define GPIO_AF_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
#define GPIO_AF_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
#define GPIO_AF_SPI4 ((uint8_t)0x05) /* SPI4 Alternate Function mapping */
#define GPIO_AF_SPI5 ((uint8_t)0x05) /* SPI5 Alternate Function mapping */
#define GPIO_AF_SPI6 ((uint8_t)0x05) /* SPI6 Alternate Function mapping */
/**
* @brief AF 6 selection
*/
#define GPIO_AF_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
#define GPIO_AF_SAI1 ((uint8_t)0x06) /* SAI1 Alternate Function mapping */
/**
* @brief AF 7 selection
*/
#define GPIO_AF_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
#define GPIO_AF_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
#define GPIO_AF_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
#define GPIO_AF_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
#define GPIO_AF_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
#define GPIO_AF_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
#define GPIO_AF_I2S3ext ((uint8_t)0x07) /* I2S3ext Alternate Function mapping */
/**
* @brief AF 8 selection
*/
#define GPIO_AF_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
#define GPIO_AF_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
#define GPIO_AF_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
#define GPIO_AF_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
#define GPIO_AF_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
#define GPIO_AF_UART7 ((uint8_t)0x08) /* UART7 Alternate Function mapping */
#define GPIO_AF_UART8 ((uint8_t)0x08) /* UART8 Alternate Function mapping */
/**
* @brief AF 9 selection
*/
#define GPIO_AF_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
#define GPIO_AF_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
#define GPIO_AF_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
#define GPIO_AF_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
#define GPIO_AF_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
#define GPIO_AF_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
#define GPIO_AF_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
#define GPIO_AF9_I2C2 ((uint8_t)0x09) /* I2C2 Alternate Function mapping (Only for STM32F401xx Devices) */
#define GPIO_AF9_I2C3 ((uint8_t)0x09) /* I2C3 Alternate Function mapping (Only for STM32F401xx Devices) */
/**
* @brief AF 10 selection
*/
@@ -310,38 +335,96 @@ typedef struct
/**
* @brief AF 12 selection
*/
#define GPIO_AF_FSMC ((uint8_t)0xC) /* FSMC Alternate Function mapping */
#define GPIO_AF_OTG_HS_FS ((uint8_t)0xC) /* OTG HS configured in FS, Alternate Function mapping */
#define GPIO_AF_SDIO ((uint8_t)0xC) /* SDIO Alternate Function mapping */
#if defined (STM32F40_41xxx)
#define GPIO_AF_FSMC ((uint8_t)0xC) /* FSMC Alternate Function mapping */
#endif /* STM32F40_41xxx */
#if defined (STM32F427_437xx) || defined (STM32F429_439xx)
#define GPIO_AF_FMC ((uint8_t)0xC) /* FMC Alternate Function mapping */
#endif /* STM32F427_437xx || STM32F429_439xx */
#define GPIO_AF_OTG_HS_FS ((uint8_t)0xC) /* OTG HS configured in FS, Alternate Function mapping */
#define GPIO_AF_SDIO ((uint8_t)0xC) /* SDIO Alternate Function mapping */
/**
* @brief AF 13 selection
*/
#define GPIO_AF_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
/**
* @brief AF 14 selection
*/
#define GPIO_AF_LTDC ((uint8_t)0x0E) /* LCD-TFT Alternate Function mapping */
/**
* @brief AF 15 selection
*/
#define GPIO_AF_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_TIM14) || \
((AF) == GPIO_AF_MCO) || ((AF) == GPIO_AF_TAMPER) || \
((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \
((AF) == GPIO_AF_TIM1) || ((AF) == GPIO_AF_TIM2) || \
((AF) == GPIO_AF_TIM3) || ((AF) == GPIO_AF_TIM4) || \
((AF) == GPIO_AF_TIM5) || ((AF) == GPIO_AF_TIM8) || \
((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \
((AF) == GPIO_AF_I2C3) || ((AF) == GPIO_AF_SPI1) || \
((AF) == GPIO_AF_SPI2) || ((AF) == GPIO_AF_TIM13) || \
((AF) == GPIO_AF_SPI3) || ((AF) == GPIO_AF_TIM14) || \
((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \
((AF) == GPIO_AF_USART3) || ((AF) == GPIO_AF_UART4) || \
((AF) == GPIO_AF_UART5) || ((AF) == GPIO_AF_USART6) || \
((AF) == GPIO_AF_CAN1) || ((AF) == GPIO_AF_CAN2) || \
((AF) == GPIO_AF_OTG_FS) || ((AF) == GPIO_AF_OTG_HS) || \
((AF) == GPIO_AF_ETH) || ((AF) == GPIO_AF_FSMC) || \
((AF) == GPIO_AF_OTG_HS_FS) || ((AF) == GPIO_AF_SDIO) || \
((AF) == GPIO_AF_DCMI) || ((AF) == GPIO_AF_EVENTOUT))
#if defined (STM32F40_41xxx)
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_TIM14) || \
((AF) == GPIO_AF_MCO) || ((AF) == GPIO_AF_TAMPER) || \
((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \
((AF) == GPIO_AF_TIM1) || ((AF) == GPIO_AF_TIM2) || \
((AF) == GPIO_AF_TIM3) || ((AF) == GPIO_AF_TIM4) || \
((AF) == GPIO_AF_TIM5) || ((AF) == GPIO_AF_TIM8) || \
((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \
((AF) == GPIO_AF_I2C3) || ((AF) == GPIO_AF_SPI1) || \
((AF) == GPIO_AF_SPI2) || ((AF) == GPIO_AF_TIM13) || \
((AF) == GPIO_AF_SPI3) || ((AF) == GPIO_AF_TIM14) || \
((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \
((AF) == GPIO_AF_USART3) || ((AF) == GPIO_AF_UART4) || \
((AF) == GPIO_AF_UART5) || ((AF) == GPIO_AF_USART6) || \
((AF) == GPIO_AF_CAN1) || ((AF) == GPIO_AF_CAN2) || \
((AF) == GPIO_AF_OTG_FS) || ((AF) == GPIO_AF_OTG_HS) || \
((AF) == GPIO_AF_ETH) || ((AF) == GPIO_AF_OTG_HS_FS) || \
((AF) == GPIO_AF_SDIO) || ((AF) == GPIO_AF_DCMI) || \
((AF) == GPIO_AF_EVENTOUT) || ((AF) == GPIO_AF_FSMC))
#endif /* STM32F40_41xxx */
#if defined (STM32F401xx)
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_TIM14) || \
((AF) == GPIO_AF_MCO) || ((AF) == GPIO_AF_TAMPER) || \
((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \
((AF) == GPIO_AF_TIM1) || ((AF) == GPIO_AF_TIM2) || \
((AF) == GPIO_AF_TIM3) || ((AF) == GPIO_AF_TIM4) || \
((AF) == GPIO_AF_TIM5) || ((AF) == GPIO_AF_TIM8) || \
((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \
((AF) == GPIO_AF_I2C3) || ((AF) == GPIO_AF_SPI1) || \
((AF) == GPIO_AF_SPI2) || ((AF) == GPIO_AF_TIM13) || \
((AF) == GPIO_AF_SPI3) || ((AF) == GPIO_AF_TIM14) || \
((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \
((AF) == GPIO_AF_SDIO) || ((AF) == GPIO_AF_USART6) || \
((AF) == GPIO_AF_OTG_FS) || ((AF) == GPIO_AF_OTG_HS) || \
((AF) == GPIO_AF_EVENTOUT) || ((AF) == GPIO_AF_SPI4))
#endif /* STM32F401xx */
#if defined (STM32F427_437xx) || defined (STM32F429_439xx)
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_TIM14) || \
((AF) == GPIO_AF_MCO) || ((AF) == GPIO_AF_TAMPER) || \
((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \
((AF) == GPIO_AF_TIM1) || ((AF) == GPIO_AF_TIM2) || \
((AF) == GPIO_AF_TIM3) || ((AF) == GPIO_AF_TIM4) || \
((AF) == GPIO_AF_TIM5) || ((AF) == GPIO_AF_TIM8) || \
((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \
((AF) == GPIO_AF_I2C3) || ((AF) == GPIO_AF_SPI1) || \
((AF) == GPIO_AF_SPI2) || ((AF) == GPIO_AF_TIM13) || \
((AF) == GPIO_AF_SPI3) || ((AF) == GPIO_AF_TIM14) || \
((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \
((AF) == GPIO_AF_USART3) || ((AF) == GPIO_AF_UART4) || \
((AF) == GPIO_AF_UART5) || ((AF) == GPIO_AF_USART6) || \
((AF) == GPIO_AF_CAN1) || ((AF) == GPIO_AF_CAN2) || \
((AF) == GPIO_AF_OTG_FS) || ((AF) == GPIO_AF_OTG_HS) || \
((AF) == GPIO_AF_ETH) || ((AF) == GPIO_AF_OTG_HS_FS) || \
((AF) == GPIO_AF_SDIO) || ((AF) == GPIO_AF_DCMI) || \
((AF) == GPIO_AF_EVENTOUT) || ((AF) == GPIO_AF_SPI4) || \
((AF) == GPIO_AF_SPI5) || ((AF) == GPIO_AF_SPI6) || \
((AF) == GPIO_AF_UART7) || ((AF) == GPIO_AF_UART8) || \
((AF) == GPIO_AF_FMC) || ((AF) == GPIO_AF_SAI1) || \
((AF) == GPIO_AF_LTDC))
#endif /* STM32F427_437xx || STM32F429_439xx */
/**
* @}
*/
@@ -403,4 +486,4 @@ void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_hash.h
+53 -40
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_hash.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the HASH
* firmware library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -46,12 +52,12 @@
*/
typedef struct
{
uint32_t HASH_AlgoSelection; /*!< SHA-1 or MD5. This parameter can be a value
of @ref HASH_Algo_Selection */
uint32_t HASH_AlgoSelection; /*!< SHA-1, SHA-224, SHA-256 or MD5. This parameter
can be a value of @ref HASH_Algo_Selection */
uint32_t HASH_AlgoMode; /*!< HASH or HMAC. This parameter can be a value
of @ref HASH_processor_Algorithm_Mode */
uint32_t HASH_DataType; /*!< 32-bit data, 16-bit data, 8-bit data or
bit-string. This parameter can be a value of
bit string. This parameter can be a value of
@ref HASH_Data_Type */
uint32_t HASH_HMACKeyType; /*!< HMAC Short key or HMAC Long Key. This parameter
can be a value of @ref HASH_HMAC_Long_key_only_for_HMAC_mode */
@@ -62,7 +68,9 @@ typedef struct
*/
typedef struct
{
uint32_t Data[5]; /*!< Message digest result : 5x 32bit words for SHA1 or
uint32_t Data[8]; /*!< Message digest result : 8x 32bit wors for SHA-256,
7x 32bit wors for SHA-224,
5x 32bit words for SHA-1 or
4x 32bit words for MD5 */
} HASH_MsgDigest;
@@ -74,7 +82,7 @@ typedef struct
uint32_t HASH_IMR;
uint32_t HASH_STR;
uint32_t HASH_CR;
uint32_t HASH_CSR[51];
uint32_t HASH_CSR[54];
}HASH_Context;
/* Exported constants --------------------------------------------------------*/
@@ -86,10 +94,14 @@ typedef struct
/** @defgroup HASH_Algo_Selection
* @{
*/
#define HASH_AlgoSelection_SHA1 ((uint16_t)0x0000) /*!< HASH function is SHA1 */
#define HASH_AlgoSelection_MD5 ((uint16_t)0x0080) /*!< HASH function is MD5 */
#define HASH_AlgoSelection_SHA1 ((uint32_t)0x0000) /*!< HASH function is SHA1 */
#define HASH_AlgoSelection_SHA224 HASH_CR_ALGO_1 /*!< HASH function is SHA224 */
#define HASH_AlgoSelection_SHA256 HASH_CR_ALGO /*!< HASH function is SHA256 */
#define HASH_AlgoSelection_MD5 HASH_CR_ALGO_0 /*!< HASH function is MD5 */
#define IS_HASH_ALGOSELECTION(ALGOSELECTION) (((ALGOSELECTION) == HASH_AlgoSelection_SHA1) || \
((ALGOSELECTION) == HASH_AlgoSelection_SHA224) || \
((ALGOSELECTION) == HASH_AlgoSelection_SHA256) || \
((ALGOSELECTION) == HASH_AlgoSelection_MD5))
/**
* @}
@@ -98,8 +110,8 @@ typedef struct
/** @defgroup HASH_processor_Algorithm_Mode
* @{
*/
#define HASH_AlgoMode_HASH ((uint16_t)0x0000) /*!< Algorithm is HASH */
#define HASH_AlgoMode_HMAC ((uint16_t)0x0040) /*!< Algorithm is HMAC */
#define HASH_AlgoMode_HASH ((uint32_t)0x00000000) /*!< Algorithm is HASH */
#define HASH_AlgoMode_HMAC HASH_CR_MODE /*!< Algorithm is HMAC */
#define IS_HASH_ALGOMODE(ALGOMODE) (((ALGOMODE) == HASH_AlgoMode_HASH) || \
((ALGOMODE) == HASH_AlgoMode_HMAC))
@@ -110,14 +122,14 @@ typedef struct
/** @defgroup HASH_Data_Type
* @{
*/
#define HASH_DataType_32b ((uint16_t)0x0000)
#define HASH_DataType_16b ((uint16_t)0x0010)
#define HASH_DataType_8b ((uint16_t)0x0020)
#define HASH_DataType_1b ((uint16_t)0x0030)
#define HASH_DataType_32b ((uint32_t)0x0000) /*!< 32-bit data. No swapping */
#define HASH_DataType_16b HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped */
#define HASH_DataType_8b HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped */
#define HASH_DataType_1b HASH_CR_DATATYPE /*!< 1-bit data. In the word all bits are swapped */
#define IS_HASH_DATATYPE(DATATYPE) (((DATATYPE) == HASH_DataType_32b)|| \
((DATATYPE) == HASH_DataType_16b)|| \
((DATATYPE) == HASH_DataType_8b)|| \
((DATATYPE) == HASH_DataType_8b) || \
((DATATYPE) == HASH_DataType_1b))
/**
* @}
@@ -127,10 +139,10 @@ typedef struct
* @{
*/
#define HASH_HMACKeyType_ShortKey ((uint32_t)0x00000000) /*!< HMAC Key is <= 64 bytes */
#define HASH_HMACKeyType_LongKey ((uint32_t)0x00010000) /*!< HMAC Key is > 64 bytes */
#define HASH_HMACKeyType_LongKey HASH_CR_LKEY /*!< HMAC Key is > 64 bytes */
#define IS_HASH_HMAC_KEYTYPE(KEYTYPE) (((KEYTYPE) == HASH_HMACKeyType_ShortKey) || \
((KEYTYPE) == HASH_HMACKeyType_LongKey))
((KEYTYPE) == HASH_HMACKeyType_LongKey))
/**
* @}
*/
@@ -147,10 +159,10 @@ typedef struct
/** @defgroup HASH_interrupts_definition
* @{
*/
#define HASH_IT_DINI ((uint8_t)0x01) /*!< A new block can be entered into the input buffer (DIN)*/
#define HASH_IT_DCI ((uint8_t)0x02) /*!< Digest calculation complete */
#define HASH_IT_DINI HASH_IMR_DINIM /*!< A new block can be entered into the input buffer (DIN) */
#define HASH_IT_DCI HASH_IMR_DCIM /*!< Digest calculation complete */
#define IS_HASH_IT(IT) ((((IT) & (uint8_t)0xFC) == 0x00) && ((IT) != 0x00))
#define IS_HASH_IT(IT) ((((IT) & (uint32_t)0xFFFFFFFC) == 0x00000000) && ((IT) != 0x00000000))
#define IS_HASH_GET_IT(IT) (((IT) == HASH_IT_DINI) || ((IT) == HASH_IT_DCI))
/**
@@ -160,11 +172,11 @@ typedef struct
/** @defgroup HASH_flags_definition
* @{
*/
#define HASH_FLAG_DINIS ((uint16_t)0x0001) /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer.*/
#define HASH_FLAG_DCIS ((uint16_t)0x0002) /*!< Digest calculation complete */
#define HASH_FLAG_DMAS ((uint16_t)0x0004) /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */
#define HASH_FLAG_BUSY ((uint16_t)0x0008) /*!< The hash core is Busy : processing a block of data */
#define HASH_FLAG_DINNE ((uint16_t)0x1000) /*!< DIN not empty : The input buffer contains at least one word of data */
#define HASH_FLAG_DINIS HASH_SR_DINIS /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer */
#define HASH_FLAG_DCIS HASH_SR_DCIS /*!< Digest calculation complete */
#define HASH_FLAG_DMAS HASH_SR_DMAS /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */
#define HASH_FLAG_BUSY HASH_SR_BUSY /*!< The hash core is Busy : processing a block of data */
#define HASH_FLAG_DINNE HASH_CR_DINNE /*!< DIN not empty : The input buffer contains at least one word of data */
#define IS_HASH_GET_FLAG(FLAG) (((FLAG) == HASH_FLAG_DINIS) || \
((FLAG) == HASH_FLAG_DCIS) || \
@@ -199,21 +211,22 @@ void HASH_DataIn(uint32_t Data);
uint8_t HASH_GetInFIFOWordsNbr(void);
void HASH_SetLastWordValidBitsNbr(uint16_t ValidNumber);
void HASH_StartDigest(void);
void HASH_AutoStartDigest(FunctionalState NewState);
void HASH_GetDigest(HASH_MsgDigest* HASH_MessageDigest);
/* HASH Context swapping functions ********************************************/
void HASH_SaveContext(HASH_Context* HASH_ContextSave);
void HASH_RestoreContext(HASH_Context* HASH_ContextRestore);
/* HASH's DMA interface function **********************************************/
/* HASH DMA interface function ************************************************/
void HASH_DMACmd(FunctionalState NewState);
/* HASH Interrupts and flags management functions *****************************/
void HASH_ITConfig(uint8_t HASH_IT, FunctionalState NewState);
FlagStatus HASH_GetFlagStatus(uint16_t HASH_FLAG);
void HASH_ClearFlag(uint16_t HASH_FLAG);
ITStatus HASH_GetITStatus(uint8_t HASH_IT);
void HASH_ClearITPendingBit(uint8_t HASH_IT);
void HASH_ITConfig(uint32_t HASH_IT, FunctionalState NewState);
FlagStatus HASH_GetFlagStatus(uint32_t HASH_FLAG);
void HASH_ClearFlag(uint32_t HASH_FLAG);
ITStatus HASH_GetITStatus(uint32_t HASH_IT);
void HASH_ClearITPendingBit(uint32_t HASH_IT);
/* High Level SHA1 functions **************************************************/
ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20]);
@@ -241,4 +254,4 @@ ErrorStatus HMAC_MD5(uint8_t *Key, uint32_t Keylen,
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_i2c.h
+29 -10
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_i2c.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the I2C firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -76,6 +82,17 @@ typedef struct
#define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
((PERIPH) == I2C2) || \
((PERIPH) == I2C3))
/** @defgroup I2C_Digital_Filter
* @{
*/
#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F)
/**
* @}
*/
/** @defgroup I2C_mode
* @{
*/
@@ -534,6 +551,8 @@ void I2C_DeInit(I2C_TypeDef* I2Cx);
void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_DigitalFilterConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DigitalFilter);
void I2C_AnalogFilterCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
@@ -689,4 +708,4 @@ void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_iwdg.h
+16 -10
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_iwdg.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the IWDG
* firmware library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -122,4 +128,4 @@ FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_ltdc.h
+525
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_pwr.h
+61 -30
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_pwr.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the PWR firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -49,7 +55,6 @@
/** @defgroup PWR_PVD_detection_level
* @{
*/
#define PWR_PVDLevel_0 PWR_CR_PLS_LEV0
#define PWR_PVDLevel_1 PWR_CR_PLS_LEV1
#define PWR_PVDLevel_2 PWR_CR_PLS_LEV2
@@ -71,11 +76,29 @@
/** @defgroup PWR_Regulator_state_in_STOP_mode
* @{
*/
#define PWR_MainRegulator_ON ((uint32_t)0x00000000)
#define PWR_LowPowerRegulator_ON PWR_CR_LPDS
/* --- PWR_Legacy ---*/
#define PWR_Regulator_ON PWR_MainRegulator_ON
#define PWR_Regulator_LowPower PWR_LowPowerRegulator_ON
#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MainRegulator_ON) || \
((REGULATOR) == PWR_LowPowerRegulator_ON))
/**
* @}
*/
/** @defgroup PWR_Regulator_state_in_UnderDrive_mode
* @{
*/
#define PWR_MainRegulator_UnderDrive_ON PWR_CR_MRUDS
#define PWR_LowPowerRegulator_UnderDrive_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
#define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MainRegulator_UnderDrive_ON) || \
((REGULATOR) == PWR_LowPowerRegulator_UnderDrive_ON))
#define PWR_Regulator_ON ((uint32_t)0x00000000)
#define PWR_Regulator_LowPower PWR_CR_LPDS
#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
((REGULATOR) == PWR_Regulator_LowPower))
/**
* @}
*/
@@ -83,19 +106,22 @@
/** @defgroup PWR_STOP_mode_entry
* @{
*/
#define PWR_STOPEntry_WFI ((uint8_t)0x01)
#define PWR_STOPEntry_WFE ((uint8_t)0x02)
#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
/**
* @}
*/
/** @defgroup PWR_Regulator_Voltage_Scale
* @{
*/
#define PWR_Regulator_Voltage_Scale1 ((uint32_t)0x00004000)
#define PWR_Regulator_Voltage_Scale2 ((uint32_t)0x00000000)
#define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || ((VOLTAGE) == PWR_Regulator_Voltage_Scale2))
#define PWR_Regulator_Voltage_Scale1 ((uint32_t)0x0000C000)
#define PWR_Regulator_Voltage_Scale2 ((uint32_t)0x00008000)
#define PWR_Regulator_Voltage_Scale3 ((uint32_t)0x00004000)
#define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || \
((VOLTAGE) == PWR_Regulator_Voltage_Scale2) || \
((VOLTAGE) == PWR_Regulator_Voltage_Scale3))
/**
* @}
*/
@@ -103,26 +129,27 @@
/** @defgroup PWR_Flag
* @{
*/
#define PWR_FLAG_WU PWR_CSR_WUF
#define PWR_FLAG_SB PWR_CSR_SBF
#define PWR_FLAG_PVDO PWR_CSR_PVDO
#define PWR_FLAG_BRR PWR_CSR_BRR
#define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
#define PWR_FLAG_ODRDY PWR_CSR_ODRDY
#define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
#define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
/** @defgroup PWR_Flag_Legacy
* @{
*/
/* --- FLAG Legacy ---*/
#define PWR_FLAG_REGRDY PWR_FLAG_VOSRDY
/**
* @}
*/
#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \
((FLAG) == PWR_FLAG_VOSRDY))
((FLAG) == PWR_FLAG_VOSRDY) || ((FLAG) == PWR_FLAG_ODRDY) || \
((FLAG) == PWR_FLAG_ODSWRDY) || ((FLAG) == PWR_FLAG_UDRDY))
#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
((FLAG) == PWR_FLAG_UDRDY))
#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
/**
* @}
*/
@@ -150,12 +177,16 @@ void PWR_WakeUpPinCmd(FunctionalState NewState);
/* Main and Backup Regulators configuration functions *************************/
void PWR_BackupRegulatorCmd(FunctionalState NewState);
void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage);
void PWR_OverDriveCmd(FunctionalState NewState);
void PWR_OverDriveSWCmd(FunctionalState NewState);
void PWR_UnderDriveCmd(FunctionalState NewState);
/* FLASH Power Down configuration functions ***********************************/
void PWR_FlashPowerDownCmd(FunctionalState NewState);
/* Low Power modes configuration functions ************************************/
void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
void PWR_EnterUnderDriveSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
void PWR_EnterSTANDBYMode(void);
/* Flags management functions *************************************************/
@@ -176,4 +207,4 @@ void PWR_ClearFlag(uint32_t PWR_FLAG);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rcc.h
+182 -77
View File
@@ -2,20 +2,26 @@
******************************************************************************
* @file stm32f4xx_rcc.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @brief This file contains all the functions prototypes for the RCC firmware library.
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the RCC firmware library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -42,9 +48,9 @@
typedef struct
{
uint32_t SYSCLK_Frequency; /*!< SYSCLK clock frequency expressed in Hz */
uint32_t HCLK_Frequency; /*!< HCLK clock frequency expressed in Hz */
uint32_t PCLK1_Frequency; /*!< PCLK1 clock frequency expressed in Hz */
uint32_t PCLK2_Frequency; /*!< PCLK2 clock frequency expressed in Hz */
uint32_t HCLK_Frequency; /*!< HCLK clock frequency expressed in Hz */
uint32_t PCLK1_Frequency; /*!< PCLK1 clock frequency expressed in Hz */
uint32_t PCLK2_Frequency; /*!< PCLK2 clock frequency expressed in Hz */
}RCC_ClocksTypeDef;
/* Exported constants --------------------------------------------------------*/
@@ -78,8 +84,26 @@ typedef struct
#define IS_RCC_PLLQ_VALUE(VALUE) ((4 <= (VALUE)) && ((VALUE) <= 15))
#define IS_RCC_PLLI2SN_VALUE(VALUE) ((192 <= (VALUE)) && ((VALUE) <= 432))
#define IS_RCC_PLLI2SR_VALUE(VALUE) ((2 <= (VALUE)) && ((VALUE) <= 7))
/**
#define IS_RCC_PLLI2SR_VALUE(VALUE) ((2 <= (VALUE)) && ((VALUE) <= 7))
#define IS_RCC_PLLI2SQ_VALUE(VALUE) ((2 <= (VALUE)) && ((VALUE) <= 15))
#define IS_RCC_PLLSAIN_VALUE(VALUE) ((192 <= (VALUE)) && ((VALUE) <= 432))
#define IS_RCC_PLLSAIQ_VALUE(VALUE) ((2 <= (VALUE)) && ((VALUE) <= 15))
#define IS_RCC_PLLSAIR_VALUE(VALUE) ((2 <= (VALUE)) && ((VALUE) <= 7))
#define IS_RCC_PLLSAI_DIVQ_VALUE(VALUE) ((1 <= (VALUE)) && ((VALUE) <= 32))
#define IS_RCC_PLLI2S_DIVQ_VALUE(VALUE) ((1 <= (VALUE)) && ((VALUE) <= 32))
#define RCC_PLLSAIDivR_Div2 ((uint32_t)0x00000000)
#define RCC_PLLSAIDivR_Div4 ((uint32_t)0x00010000)
#define RCC_PLLSAIDivR_Div8 ((uint32_t)0x00020000)
#define RCC_PLLSAIDivR_Div16 ((uint32_t)0x00030000)
#define IS_RCC_PLLSAI_DIVR_VALUE(VALUE) (((VALUE) == RCC_PLLSAIDivR_Div2) ||\
((VALUE) == RCC_PLLSAIDivR_Div4) ||\
((VALUE) == RCC_PLLSAIDivR_Div8) ||\
((VALUE) == RCC_PLLSAIDivR_Div16))
/**
* @}
*/
@@ -140,14 +164,17 @@ typedef struct
#define RCC_IT_HSIRDY ((uint8_t)0x04)
#define RCC_IT_HSERDY ((uint8_t)0x08)
#define RCC_IT_PLLRDY ((uint8_t)0x10)
#define RCC_IT_PLLI2SRDY ((uint8_t)0x20)
#define RCC_IT_PLLI2SRDY ((uint8_t)0x20)
#define RCC_IT_PLLSAIRDY ((uint8_t)0x40)
#define RCC_IT_CSS ((uint8_t)0x80)
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xC0) == 0x00) && ((IT) != 0x00))
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00))
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \
((IT) == RCC_IT_PLLI2SRDY))
#define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x40) == 0x00) && ((IT) != 0x00))
((IT) == RCC_IT_PLLSAIRDY) || ((IT) == RCC_IT_PLLI2SRDY))
#define IS_RCC_CLEAR_IT(IT)((IT) != 0x00)
/**
* @}
*/
@@ -245,6 +272,45 @@ typedef struct
/**
* @}
*/
/** @defgroup RCC_SAI_BlockA_Clock_Source
* @{
*/
#define RCC_SAIACLKSource_PLLSAI ((uint32_t)0x00000000)
#define RCC_SAIACLKSource_PLLI2S ((uint32_t)0x00100000)
#define RCC_SAIACLKSource_Ext ((uint32_t)0x00200000)
#define IS_RCC_SAIACLK_SOURCE(SOURCE) (((SOURCE) == RCC_SAIACLKSource_PLLI2S) ||\
((SOURCE) == RCC_SAIACLKSource_PLLSAI) ||\
((SOURCE) == RCC_SAIACLKSource_Ext))
/**
* @}
*/
/** @defgroup RCC_SAI_BlockB_Clock_Source
* @{
*/
#define RCC_SAIBCLKSource_PLLSAI ((uint32_t)0x00000000)
#define RCC_SAIBCLKSource_PLLI2S ((uint32_t)0x00400000)
#define RCC_SAIBCLKSource_Ext ((uint32_t)0x00800000)
#define IS_RCC_SAIBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SAIBCLKSource_PLLI2S) ||\
((SOURCE) == RCC_SAIBCLKSource_PLLSAI) ||\
((SOURCE) == RCC_SAIBCLKSource_Ext))
/**
* @}
*/
/** @defgroup RCC_TIM_PRescaler_Selection
* @{
*/
#define RCC_TIMPrescDesactivated ((uint8_t)0x00)
#define RCC_TIMPrescActivated ((uint8_t)0x01)
#define IS_RCC_TIMCLK_PRESCALER(VALUE) (((VALUE) == RCC_TIMPrescDesactivated) || ((VALUE) == RCC_TIMPrescActivated))
/**
* @}
*/
/** @defgroup RCC_AHB1_Peripherals
* @{
@@ -257,24 +323,30 @@ typedef struct
#define RCC_AHB1Periph_GPIOF ((uint32_t)0x00000020)
#define RCC_AHB1Periph_GPIOG ((uint32_t)0x00000040)
#define RCC_AHB1Periph_GPIOH ((uint32_t)0x00000080)
#define RCC_AHB1Periph_GPIOI ((uint32_t)0x00000100)
#define RCC_AHB1Periph_GPIOI ((uint32_t)0x00000100)
#define RCC_AHB1Periph_GPIOJ ((uint32_t)0x00000200)
#define RCC_AHB1Periph_GPIOK ((uint32_t)0x00000400)
#define RCC_AHB1Periph_CRC ((uint32_t)0x00001000)
#define RCC_AHB1Periph_FLITF ((uint32_t)0x00008000)
#define RCC_AHB1Periph_SRAM1 ((uint32_t)0x00010000)
#define RCC_AHB1Periph_SRAM2 ((uint32_t)0x00020000)
#define RCC_AHB1Periph_BKPSRAM ((uint32_t)0x00040000)
#define RCC_AHB1Periph_SRAM3 ((uint32_t)0x00080000)
#define RCC_AHB1Periph_CCMDATARAMEN ((uint32_t)0x00100000)
#define RCC_AHB1Periph_DMA1 ((uint32_t)0x00200000)
#define RCC_AHB1Periph_DMA2 ((uint32_t)0x00400000)
#define RCC_AHB1Periph_DMA2D ((uint32_t)0x00800000)
#define RCC_AHB1Periph_ETH_MAC ((uint32_t)0x02000000)
#define RCC_AHB1Periph_ETH_MAC_Tx ((uint32_t)0x04000000)
#define RCC_AHB1Periph_ETH_MAC_Rx ((uint32_t)0x08000000)
#define RCC_AHB1Periph_ETH_MAC_PTP ((uint32_t)0x10000000)
#define RCC_AHB1Periph_OTG_HS ((uint32_t)0x20000000)
#define RCC_AHB1Periph_OTG_HS_ULPI ((uint32_t)0x40000000)
#define IS_RCC_AHB1_CLOCK_PERIPH(PERIPH) ((((PERIPH) & 0x818BEE00) == 0x00) && ((PERIPH) != 0x00))
#define IS_RCC_AHB1_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xDD9FEE00) == 0x00) && ((PERIPH) != 0x00))
#define IS_RCC_AHB1_LPMODE_PERIPH(PERIPH) ((((PERIPH) & 0x81986E00) == 0x00) && ((PERIPH) != 0x00))
#define IS_RCC_AHB1_CLOCK_PERIPH(PERIPH) ((((PERIPH) & 0x810BE800) == 0x00) && ((PERIPH) != 0x00))
#define IS_RCC_AHB1_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xDD1FE800) == 0x00) && ((PERIPH) != 0x00))
#define IS_RCC_AHB1_LPMODE_PERIPH(PERIPH) ((((PERIPH) & 0x81106800) == 0x00) && ((PERIPH) != 0x00))
/**
* @}
*/
@@ -295,7 +367,14 @@ typedef struct
/** @defgroup RCC_AHB3_Peripherals
* @{
*/
#define RCC_AHB3Periph_FSMC ((uint32_t)0x00000001)
#if defined (STM32F40_41xxx)
#define RCC_AHB3Periph_FSMC ((uint32_t)0x00000001)
#endif /* STM32F40_41xxx */
#if defined (STM32F427_437xx) || defined (STM32F429_439xx)
#define RCC_AHB3Periph_FMC ((uint32_t)0x00000001)
#endif /* STM32F427_437xx || STM32F429_439xx */
#define IS_RCC_AHB3_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFFE) == 0x00) && ((PERIPH) != 0x00))
/**
* @}
@@ -327,7 +406,9 @@ typedef struct
#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0xC9013600) == 0x00) && ((PERIPH) != 0x00))
#define RCC_APB1Periph_UART7 ((uint32_t)0x40000000)
#define RCC_APB1Periph_UART8 ((uint32_t)0x80000000)
#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x09013600) == 0x00) && ((PERIPH) != 0x00))
/**
* @}
*/
@@ -345,12 +426,19 @@ typedef struct
#define RCC_APB2Periph_ADC3 ((uint32_t)0x00000400)
#define RCC_APB2Periph_SDIO ((uint32_t)0x00000800)
#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
#define RCC_APB2Periph_SPI4 ((uint32_t)0x00002000)
#define RCC_APB2Periph_SYSCFG ((uint32_t)0x00004000)
#define RCC_APB2Periph_TIM9 ((uint32_t)0x00010000)
#define RCC_APB2Periph_TIM10 ((uint32_t)0x00020000)
#define RCC_APB2Periph_TIM11 ((uint32_t)0x00040000)
#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFF8A0CC) == 0x00) && ((PERIPH) != 0x00))
#define IS_RCC_APB2_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xFFF8A6CC) == 0x00) && ((PERIPH) != 0x00))
#define RCC_APB2Periph_SPI5 ((uint32_t)0x00100000)
#define RCC_APB2Periph_SPI6 ((uint32_t)0x00200000)
#define RCC_APB2Periph_SAI1 ((uint32_t)0x00400000)
#define RCC_APB2Periph_LTDC ((uint32_t)0x04000000)
#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFB8880CC) == 0x00) && ((PERIPH) != 0x00))
#define IS_RCC_APB2_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xFB8886CC) == 0x00) && ((PERIPH) != 0x00))
/**
* @}
*/
@@ -406,6 +494,7 @@ typedef struct
#define RCC_FLAG_HSERDY ((uint8_t)0x31)
#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
#define RCC_FLAG_PLLI2SRDY ((uint8_t)0x3B)
#define RCC_FLAG_PLLSAIRDY ((uint8_t)0x3D)
#define RCC_FLAG_LSERDY ((uint8_t)0x41)
#define RCC_FLAG_LSIRDY ((uint8_t)0x61)
#define RCC_FLAG_BORRST ((uint8_t)0x79)
@@ -415,13 +504,15 @@ typedef struct
#define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
#define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
#define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_BORRST) || \
((FLAG) == RCC_FLAG_PINRST) || ((FLAG) == RCC_FLAG_PORRST) || \
((FLAG) == RCC_FLAG_SFTRST) || ((FLAG) == RCC_FLAG_IWDGRST)|| \
((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LPWRRST)|| \
((FLAG) == RCC_FLAG_PLLI2SRDY))
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_BORRST) || \
((FLAG) == RCC_FLAG_PINRST) || ((FLAG) == RCC_FLAG_PORRST) || \
((FLAG) == RCC_FLAG_SFTRST) || ((FLAG) == RCC_FLAG_IWDGRST)|| \
((FLAG) == RCC_FLAG_WWDGRST) || ((FLAG) == RCC_FLAG_LPWRRST)|| \
((FLAG) == RCC_FLAG_PLLI2SRDY)|| ((FLAG) == RCC_FLAG_PLLSAIRDY))
#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
/**
* @}
@@ -438,60 +529,74 @@ typedef struct
void RCC_DeInit(void);
/* Internal/external clocks, PLL, CSS and MCO configuration functions *********/
void RCC_HSEConfig(uint8_t RCC_HSE);
void RCC_HSEConfig(uint8_t RCC_HSE);
ErrorStatus RCC_WaitForHSEStartUp(void);
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
void RCC_HSICmd(FunctionalState NewState);
void RCC_LSEConfig(uint8_t RCC_LSE);
void RCC_LSICmd(FunctionalState NewState);
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
void RCC_HSICmd(FunctionalState NewState);
void RCC_LSEConfig(uint8_t RCC_LSE);
void RCC_LSICmd(FunctionalState NewState);
void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP, uint32_t PLLQ);
void RCC_PLLCmd(FunctionalState NewState);
void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP, uint32_t PLLQ);
void RCC_PLLCmd(FunctionalState NewState);
void RCC_PLLI2SConfig(uint32_t PLLI2SN, uint32_t PLLI2SR);
void RCC_PLLI2SCmd(FunctionalState NewState);
#if defined (STM32F40_41xxx) || defined (STM32F401xx)
void RCC_PLLI2SConfig(uint32_t PLLI2SN, uint32_t PLLI2SR);
#endif /* STM32F40_41xxx || STM32F401xx */
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
void RCC_MCO1Config(uint32_t RCC_MCO1Source, uint32_t RCC_MCO1Div);
void RCC_MCO2Config(uint32_t RCC_MCO2Source, uint32_t RCC_MCO2Div);
#if defined (STM32F427_437xx) || defined (STM32F429_439xx)
void RCC_PLLI2SConfig(uint32_t PLLI2SN, uint32_t PLLI2SQ, uint32_t PLLI2SR);
#endif /* STM32F41_43xxx */
void RCC_PLLI2SCmd(FunctionalState NewState);
void RCC_PLLSAIConfig(uint32_t PLLSAIN, uint32_t PLLSAIQ, uint32_t PLLSAIR);
void RCC_PLLSAICmd(FunctionalState NewState);
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
void RCC_MCO1Config(uint32_t RCC_MCO1Source, uint32_t RCC_MCO1Div);
void RCC_MCO2Config(uint32_t RCC_MCO2Source, uint32_t RCC_MCO2Div);
/* System, AHB and APB busses clocks configuration functions ******************/
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
uint8_t RCC_GetSYSCLKSource(void);
void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
void RCC_PCLK1Config(uint32_t RCC_HCLK);
void RCC_PCLK2Config(uint32_t RCC_HCLK);
void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
uint8_t RCC_GetSYSCLKSource(void);
void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
void RCC_PCLK1Config(uint32_t RCC_HCLK);
void RCC_PCLK2Config(uint32_t RCC_HCLK);
void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
/* Peripheral clocks configuration functions **********************************/
void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
void RCC_RTCCLKCmd(FunctionalState NewState);
void RCC_BackupResetCmd(FunctionalState NewState);
void RCC_I2SCLKConfig(uint32_t RCC_I2SCLKSource);
void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
void RCC_RTCCLKCmd(FunctionalState NewState);
void RCC_BackupResetCmd(FunctionalState NewState);
void RCC_I2SCLKConfig(uint32_t RCC_I2SCLKSource);
void RCC_SAIPLLI2SClkDivConfig(uint32_t RCC_PLLI2SDivQ);
void RCC_SAIPLLSAIClkDivConfig(uint32_t RCC_PLLSAIDivQ);
void RCC_SAIBlockACLKConfig(uint32_t RCC_SAIBlockACLKSource);
void RCC_SAIBlockBCLKConfig(uint32_t RCC_SAIBlockBCLKSource);
void RCC_LTDCCLKDivConfig(uint32_t RCC_PLLSAIDivR);
void RCC_TIMCLKPresConfig(uint32_t RCC_TIMCLKPrescaler);
void RCC_AHB1PeriphClockCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
void RCC_AHB2PeriphClockCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
void RCC_AHB3PeriphClockCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
void RCC_AHB1PeriphClockCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
void RCC_AHB2PeriphClockCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
void RCC_AHB3PeriphClockCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
void RCC_AHB1PeriphResetCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
void RCC_AHB2PeriphResetCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
void RCC_AHB3PeriphResetCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
void RCC_AHB1PeriphResetCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
void RCC_AHB2PeriphResetCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
void RCC_AHB3PeriphResetCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
void RCC_AHB1PeriphClockLPModeCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
void RCC_AHB2PeriphClockLPModeCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
void RCC_AHB3PeriphClockLPModeCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
void RCC_APB1PeriphClockLPModeCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphClockLPModeCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
void RCC_AHB1PeriphClockLPModeCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
void RCC_AHB2PeriphClockLPModeCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
void RCC_AHB3PeriphClockLPModeCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
void RCC_APB1PeriphClockLPModeCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphClockLPModeCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
/* Interrupts and flags management functions **********************************/
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
void RCC_ClearFlag(void);
ITStatus RCC_GetITStatus(uint8_t RCC_IT);
void RCC_ClearITPendingBit(uint8_t RCC_IT);
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
void RCC_ClearFlag(void);
ITStatus RCC_GetITStatus(uint8_t RCC_IT);
void RCC_ClearITPendingBit(uint8_t RCC_IT);
#ifdef __cplusplus
}
@@ -507,4 +612,4 @@ void RCC_ClearITPendingBit(uint8_t RCC_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rng.h
+16 -10
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_rng.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the Random
* Number Generator(RNG) firmware library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -111,4 +117,4 @@ void RNG_ClearITPendingBit(uint8_t RNG_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rtc.h
+16 -10
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_rtc.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the RTC firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -872,4 +878,4 @@ void RTC_ClearITPendingBit(uint32_t RTC_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_sai.h
+611
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_sdio.h
+19 -13
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_sdio.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the SDIO firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -77,7 +83,7 @@ typedef struct
uint32_t SDIO_Response; /*!< Specifies the SDIO response type.
This parameter can be a value of @ref SDIO_Response_Type */
uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled.
uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait for interrupt request is enabled or disabled.
This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
@@ -453,8 +459,8 @@ typedef struct
* @{
*/
#define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000000)
#define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000001)
#define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000)
#define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001)
#define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \
((MODE) == SDIO_ReadWaitMode_DATA2))
/**
@@ -527,4 +533,4 @@ void SDIO_ClearITPendingBit(uint32_t SDIO_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_spi.h
+29 -17
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_spi.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the SPI
* firmware library.
* firmware library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -112,19 +118,25 @@ typedef struct
#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
((PERIPH) == SPI2) || \
((PERIPH) == SPI3))
((PERIPH) == SPI3) || \
((PERIPH) == SPI4) || \
((PERIPH) == SPI5) || \
((PERIPH) == SPI6))
#define IS_SPI_ALL_PERIPH_EXT(PERIPH) (((PERIPH) == SPI1) || \
((PERIPH) == SPI2) || \
((PERIPH) == SPI3) || \
#define IS_SPI_ALL_PERIPH_EXT(PERIPH) (((PERIPH) == SPI1) || \
((PERIPH) == SPI2) || \
((PERIPH) == SPI3) || \
((PERIPH) == SPI4) || \
((PERIPH) == SPI5) || \
((PERIPH) == SPI6) || \
((PERIPH) == I2S2ext) || \
((PERIPH) == I2S3ext))
#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
((PERIPH) == SPI3))
#define IS_SPI_23_PERIPH_EXT(PERIPH) (((PERIPH) == SPI2) || \
((PERIPH) == SPI3) || \
#define IS_SPI_23_PERIPH_EXT(PERIPH) (((PERIPH) == SPI2) || \
((PERIPH) == SPI3) || \
((PERIPH) == I2S2ext) || \
((PERIPH) == I2S3ext))
@@ -534,4 +546,4 @@ void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_syscfg.h
+80 -43
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_syscfg.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the SYSCFG firmware
* library.
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -58,16 +64,21 @@
#define EXTI_PortSourceGPIOG ((uint8_t)0x06)
#define EXTI_PortSourceGPIOH ((uint8_t)0x07)
#define EXTI_PortSourceGPIOI ((uint8_t)0x08)
#define EXTI_PortSourceGPIOJ ((uint8_t)0x09)
#define EXTI_PortSourceGPIOK ((uint8_t)0x0A)
#define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
((PORTSOURCE) == EXTI_PortSourceGPIOF) || \
((PORTSOURCE) == EXTI_PortSourceGPIOG) || \
((PORTSOURCE) == EXTI_PortSourceGPIOH) || \
((PORTSOURCE) == EXTI_PortSourceGPIOI))
((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
((PORTSOURCE) == EXTI_PortSourceGPIOF) || \
((PORTSOURCE) == EXTI_PortSourceGPIOG) || \
((PORTSOURCE) == EXTI_PortSourceGPIOH) || \
((PORTSOURCE) == EXTI_PortSourceGPIOI) || \
((PORTSOURCE) == EXTI_PortSourceGPIOJ) || \
((PORTSOURCE) == EXTI_PortSourceGPIOK))
/**
* @}
*/
@@ -92,16 +103,16 @@
#define EXTI_PinSource13 ((uint8_t)0x0D)
#define EXTI_PinSource14 ((uint8_t)0x0E)
#define EXTI_PinSource15 ((uint8_t)0x0F)
#define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
((PINSOURCE) == EXTI_PinSource1) || \
((PINSOURCE) == EXTI_PinSource2) || \
((PINSOURCE) == EXTI_PinSource3) || \
((PINSOURCE) == EXTI_PinSource4) || \
((PINSOURCE) == EXTI_PinSource5) || \
((PINSOURCE) == EXTI_PinSource6) || \
((PINSOURCE) == EXTI_PinSource7) || \
((PINSOURCE) == EXTI_PinSource8) || \
((PINSOURCE) == EXTI_PinSource9) || \
#define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
((PINSOURCE) == EXTI_PinSource1) || \
((PINSOURCE) == EXTI_PinSource2) || \
((PINSOURCE) == EXTI_PinSource3) || \
((PINSOURCE) == EXTI_PinSource4) || \
((PINSOURCE) == EXTI_PinSource5) || \
((PINSOURCE) == EXTI_PinSource6) || \
((PINSOURCE) == EXTI_PinSource7) || \
((PINSOURCE) == EXTI_PinSource8) || \
((PINSOURCE) == EXTI_PinSource9) || \
((PINSOURCE) == EXTI_PinSource10) || \
((PINSOURCE) == EXTI_PinSource11) || \
((PINSOURCE) == EXTI_PinSource12) || \
@@ -118,13 +129,38 @@
*/
#define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
#define SYSCFG_MemoryRemap_SystemFlash ((uint8_t)0x01)
#define SYSCFG_MemoryRemap_FSMC ((uint8_t)0x02)
#define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
#define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
((REMAP) == SYSCFG_MemoryRemap_SRAM) || \
((REMAP) == SYSCFG_MemoryRemap_FSMC))
#define SYSCFG_MemoryRemap_SDRAM ((uint8_t)0x04)
#if defined (STM32F40_41xxx)
#define SYSCFG_MemoryRemap_FSMC ((uint8_t)0x02)
#endif /* STM32F40_41xxx */
#if defined (STM32F427_437xx) || defined (STM32F429_439xx)
#define SYSCFG_MemoryRemap_FMC ((uint8_t)0x02)
#endif /* STM32F427_437xx || STM32F429_439xx */
#if defined (STM32F40_41xxx)
#define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
((REMAP) == SYSCFG_MemoryRemap_SRAM) || \
((REMAP) == SYSCFG_MemoryRemap_FSMC))
#endif /* STM32F40_41xxx */
#if defined (STM32F401xx)
#define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
((REMAP) == SYSCFG_MemoryRemap_SRAM))
#endif /* STM32F401xx */
#if defined (STM32F427_437xx) || defined (STM32F429_439xx)
#define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
((REMAP) == SYSCFG_MemoryRemap_SRAM) || \
((REMAP) == SYSCFG_MemoryRemap_SDRAM) || \
((REMAP) == SYSCFG_MemoryRemap_FMC))
#endif /* STM32F427_437xx || STM32F429_439xx */
/**
* @}
*/
@@ -133,11 +169,11 @@
/** @defgroup SYSCFG_ETHERNET_Media_Interface
* @{
*/
#define SYSCFG_ETH_MediaInterface_MII ((uint32_t)0x00000000)
#define SYSCFG_ETH_MediaInterface_RMII ((uint32_t)0x00000001)
#define SYSCFG_ETH_MediaInterface_MII ((uint32_t)0x00000000)
#define SYSCFG_ETH_MediaInterface_RMII ((uint32_t)0x00000001)
#define IS_SYSCFG_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == SYSCFG_ETH_MediaInterface_MII) || \
((INTERFACE) == SYSCFG_ETH_MediaInterface_RMII))
((INTERFACE) == SYSCFG_ETH_MediaInterface_RMII))
/**
* @}
*/
@@ -150,10 +186,11 @@
/* Exported functions --------------------------------------------------------*/
void SYSCFG_DeInit(void);
void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface);
void SYSCFG_CompensationCellCmd(FunctionalState NewState);
void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
void SYSCFG_MemorySwappingBank(FunctionalState NewState);
void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface);
void SYSCFG_CompensationCellCmd(FunctionalState NewState);
FlagStatus SYSCFG_GetCompensationCellStatus(void);
#ifdef __cplusplus
@@ -170,4 +207,4 @@ FlagStatus SYSCFG_GetCompensationCellStatus(void);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_tim.h
+16 -10
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_tim.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the TIM firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -1141,4 +1147,4 @@ void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_usart.h
+20 -12
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_usart.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the USART
* firmware library.
* firmware library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -106,7 +112,9 @@ typedef struct
((PERIPH) == USART3) || \
((PERIPH) == UART4) || \
((PERIPH) == UART5) || \
((PERIPH) == USART6))
((PERIPH) == USART6) || \
((PERIPH) == UART7) || \
((PERIPH) == UART8))
#define IS_USART_1236_PERIPH(PERIPH) (((PERIPH) == USART1) || \
((PERIPH) == USART2) || \
@@ -420,4 +428,4 @@ void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_wwdg.h
+16 -10
View File
@@ -2,21 +2,27 @@
******************************************************************************
* @file stm32f4xx_wwdg.h
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the WWDG firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -102,4 +108,4 @@ void WWDG_ClearFlag(void);
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/misc.c
+16 -10
View File
@@ -2,8 +2,8 @@
******************************************************************************
* @file misc.c
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file provides all the miscellaneous firmware functions (add-on
* to CMSIS functions).
*
@@ -55,14 +55,20 @@
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -240,4 +246,4 @@ void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_adc.c
+256 -253
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_can.c
+226 -223
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_crc.c
+16 -10
View File
@@ -2,20 +2,26 @@
******************************************************************************
* @file stm32f4xx_crc.c
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file provides all the CRC firmware functions.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -124,4 +130,4 @@ uint8_t CRC_GetIDRegister(void)
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp.c
+343 -259
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_aes.c
+1102 -33
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_des.c
+43 -26
View File
@@ -2,40 +2,45 @@
******************************************************************************
* @file stm32f4xx_cryp_des.c
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file provides high level functions to encrypt and decrypt an
* input message using DES in ECB/CBC modes.
* It uses the stm32f4xx_cryp.c/.h drivers to access the STM32F4xx CRYP
* peripheral.
*
* @verbatim
*
* ===================================================================
* How to use this driver
* ===================================================================
* 1. Enable The CRYP controller clock using
* RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
*
* 2. Encrypt and decrypt using DES in ECB Mode using CRYP_DES_ECB()
* function.
*
* 3. Encrypt and decrypt using DES in CBC Mode using CRYP_DES_CBC()
* function.
*
* @endverbatim
@verbatim
===================================================================
##### How to use this driver #####
===================================================================
[..]
(#) Enable The CRYP controller clock using
RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
(#) Encrypt and decrypt using DES in ECB Mode using CRYP_DES_ECB() function.
(#) Encrypt and decrypt using DES in CBC Mode using CRYP_DES_CBC() function.
@endverbatim
*
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -71,7 +76,7 @@
*
@verbatim
===============================================================================
High Level DES functions
##### High Level DES functions #####
===============================================================================
@endverbatim
* @{
@@ -133,6 +138,12 @@ ErrorStatus CRYP_DES_ECB(uint8_t Mode, uint8_t Key[8], uint8_t *Input,
/* Enable Crypto processor */
CRYP_Cmd(ENABLE);
if(CRYP_GetCmdStatus() == DISABLE)
{
/* The CRYP peripheral clock is not enabled or the device doesn't embedd
the CRYP peripheral (please check the device sales type. */
return(ERROR);
}
for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
{
@@ -236,6 +247,12 @@ ErrorStatus CRYP_DES_CBC(uint8_t Mode, uint8_t Key[8], uint8_t InitVectors[8],
/* Enable Crypto processor */
CRYP_Cmd(ENABLE);
if(CRYP_GetCmdStatus() == DISABLE)
{
/* The CRYP peripheral clock is not enabled or the device doesn't embedd
the CRYP peripheral (please check the device sales type. */
return(ERROR);
}
for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
{
/* Write the Input block in the Input FIFO */
@@ -288,4 +305,4 @@ ErrorStatus CRYP_DES_CBC(uint8_t Mode, uint8_t Key[8], uint8_t InitVectors[8],
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_tdes.c
+44 -27
View File
@@ -2,40 +2,45 @@
******************************************************************************
* @file stm32f4xx_cryp_tdes.c
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file provides high level functions to encrypt and decrypt an
* input message using TDES in ECB/CBC modes .
* It uses the stm32f4xx_cryp.c/.h drivers to access the STM32F4xx CRYP
* peripheral.
*
* @verbatim
*
* ===================================================================
* How to use this driver
* ===================================================================
* 1. Enable The CRYP controller clock using
* RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
*
* 2. Encrypt and decrypt using TDES in ECB Mode using CRYP_TDES_ECB()
* function.
*
* 3. Encrypt and decrypt using TDES in CBC Mode using CRYP_TDES_CBC()
* function.
*
* @endverbatim
@verbatim
===================================================================
##### How to use this driver #####
===================================================================
[..]
(#) Enable The CRYP controller clock using
RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
(#) Encrypt and decrypt using TDES in ECB Mode using CRYP_TDES_ECB() function.
(#) Encrypt and decrypt using TDES in CBC Mode using CRYP_TDES_CBC() function.
@endverbatim
*
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -71,10 +76,9 @@
*
@verbatim
===============================================================================
High Level TDES functions
##### High Level TDES functions #####
===============================================================================
@endverbatim
* @{
*/
@@ -143,6 +147,12 @@ ErrorStatus CRYP_TDES_ECB(uint8_t Mode, uint8_t Key[24], uint8_t *Input,
/* Enable Crypto processor */
CRYP_Cmd(ENABLE);
if(CRYP_GetCmdStatus() == DISABLE)
{
/* The CRYP peripheral clock is not enabled or the device doesn't embedd
the CRYP peripheral (please check the device sales type. */
return(ERROR);
}
for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
{
/* Write the Input block in the Input FIFO */
@@ -253,6 +263,13 @@ ErrorStatus CRYP_TDES_CBC(uint8_t Mode, uint8_t Key[24], uint8_t InitVectors[8],
/* Enable Crypto processor */
CRYP_Cmd(ENABLE);
if(CRYP_GetCmdStatus() == DISABLE)
{
/* The CRYP peripheral clock is not enabled or the device doesn't embedd
the CRYP peripheral (please check the device sales type. */
return(ERROR);
}
for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
{
/* Write the Input block in the Input FIFO */
@@ -305,4 +322,4 @@ ErrorStatus CRYP_TDES_CBC(uint8_t Mode, uint8_t Key[24], uint8_t InitVectors[8],
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dac.c
+118 -105
View File
@@ -2,114 +2,127 @@
******************************************************************************
* @file stm32f4xx_dac.c
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file provides firmware functions to manage the following
* functionalities of the Digital-to-Analog Converter (DAC) peripheral:
* - DAC channels configuration: trigger, output buffer, data format
* - DMA management
* - Interrupts and flags management
* + DAC channels configuration: trigger, output buffer, data format
* + DMA management
* + Interrupts and flags management
*
* @verbatim
*
* ===================================================================
* DAC Peripheral features
* ===================================================================
*
* DAC Channels
* =============
* The device integrates two 12-bit Digital Analog Converters that can
* be used independently or simultaneously (dual mode):
* 1- DAC channel1 with DAC_OUT1 (PA4) as output
* 1- DAC channel2 with DAC_OUT2 (PA5) as output
*
* DAC Triggers
* =============
* Digital to Analog conversion can be non-triggered using DAC_Trigger_None
* and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register
* using DAC_SetChannel1Data() / DAC_SetChannel2Data() functions.
*
* Digital to Analog conversion can be triggered by:
* 1- External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_Trigger_Ext_IT9.
* The used pin (GPIOx_Pin9) must be configured in input mode.
*
* 2- Timers TRGO: TIM2, TIM4, TIM5, TIM6, TIM7 and TIM8
* (DAC_Trigger_T2_TRGO, DAC_Trigger_T4_TRGO...)
* The timer TRGO event should be selected using TIM_SelectOutputTrigger()
*
* 3- Software using DAC_Trigger_Software
*
* DAC Buffer mode feature
* ========================
* Each DAC channel integrates an output buffer that can be used to
* reduce the output impedance, and to drive external loads directly
* without having to add an external operational amplifier.
* To enable, the output buffer use
* DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
*
* Refer to the device datasheet for more details about output
* impedance value with and without output buffer.
*
* DAC wave generation feature
* =============================
* Both DAC channels can be used to generate
* 1- Noise wave using DAC_WaveGeneration_Noise
* 2- Triangle wave using DAC_WaveGeneration_Triangle
*
* Wave generation can be disabled using DAC_WaveGeneration_None
*
* DAC data format
* ================
* The DAC data format can be:
* 1- 8-bit right alignment using DAC_Align_8b_R
* 2- 12-bit left alignment using DAC_Align_12b_L
* 3- 12-bit right alignment using DAC_Align_12b_R
*
* DAC data value to voltage correspondence
* ========================================
* The analog output voltage on each DAC channel pin is determined
* by the following equation:
* DAC_OUTx = VREF+ * DOR / 4095
* with DOR is the Data Output Register
* VEF+ is the input voltage reference (refer to the device datasheet)
* e.g. To set DAC_OUT1 to 0.7V, use
* DAC_SetChannel1Data(DAC_Align_12b_R, 868);
* Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
*
* DMA requests
* =============
* A DMA1 request can be generated when an external trigger (but not
* a software trigger) occurs if DMA1 requests are enabled using
* DAC_DMACmd()
* DMA1 requests are mapped as following:
* 1- DAC channel1 : mapped on DMA1 Stream5 channel7 which must be
* already configured
* 2- DAC channel2 : mapped on DMA1 Stream6 channel7 which must be
* already configured
*
* ===================================================================
* How to use this driver
* ===================================================================
* - DAC APB clock must be enabled to get write access to DAC
* registers using
* RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE)
* - Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
* - Configure the DAC channel using DAC_Init() function
* - Enable the DAC channel using DAC_Cmd() function
*
* @endverbatim
*
@verbatim
===============================================================================
##### DAC Peripheral features #####
===============================================================================
[..]
*** DAC Channels ***
====================
[..]
The device integrates two 12-bit Digital Analog Converters that can
be used independently or simultaneously (dual mode):
(#) DAC channel1 with DAC_OUT1 (PA4) as output
(#) DAC channel2 with DAC_OUT2 (PA5) as output
*** DAC Triggers ***
====================
[..]
Digital to Analog conversion can be non-triggered using DAC_Trigger_None
and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register
using DAC_SetChannel1Data() / DAC_SetChannel2Data() functions.
[..]
Digital to Analog conversion can be triggered by:
(#) External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_Trigger_Ext_IT9.
The used pin (GPIOx_Pin9) must be configured in input mode.
(#) Timers TRGO: TIM2, TIM4, TIM5, TIM6, TIM7 and TIM8
(DAC_Trigger_T2_TRGO, DAC_Trigger_T4_TRGO...)
The timer TRGO event should be selected using TIM_SelectOutputTrigger()
(#) Software using DAC_Trigger_Software
*** DAC Buffer mode feature ***
===============================
[..]
Each DAC channel integrates an output buffer that can be used to
reduce the output impedance, and to drive external loads directly
without having to add an external operational amplifier.
To enable, the output buffer use
DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
[..]
(@) Refer to the device datasheet for more details about output
impedance value with and without output buffer.
*** DAC wave generation feature ***
===================================
[..]
Both DAC channels can be used to generate
(#) Noise wave using DAC_WaveGeneration_Noise
(#) Triangle wave using DAC_WaveGeneration_Triangle
-@- Wave generation can be disabled using DAC_WaveGeneration_None
*** DAC data format ***
=======================
[..]
The DAC data format can be:
(#) 8-bit right alignment using DAC_Align_8b_R
(#) 12-bit left alignment using DAC_Align_12b_L
(#) 12-bit right alignment using DAC_Align_12b_R
*** DAC data value to voltage correspondence ***
================================================
[..]
The analog output voltage on each DAC channel pin is determined
by the following equation:
DAC_OUTx = VREF+ * DOR / 4095
with DOR is the Data Output Register
VEF+ is the input voltage reference (refer to the device datasheet)
e.g. To set DAC_OUT1 to 0.7V, use
DAC_SetChannel1Data(DAC_Align_12b_R, 868);
Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
*** DMA requests ***
=====================
[..]
A DMA1 request can be generated when an external trigger (but not
a software trigger) occurs if DMA1 requests are enabled using
DAC_DMACmd()
[..]
DMA1 requests are mapped as following:
(#) DAC channel1 : mapped on DMA1 Stream5 channel7 which must be
already configured
(#) DAC channel2 : mapped on DMA1 Stream6 channel7 which must be
already configured
##### How to use this driver #####
===============================================================================
[..]
(+) DAC APB clock must be enabled to get write access to DAC
registers using
RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE)
(+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
(+) Configure the DAC channel using DAC_Init() function
(+) Enable the DAC channel using DAC_Cmd() function
@endverbatim
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -159,7 +172,7 @@
*
@verbatim
===============================================================================
DAC channels configuration: trigger, output buffer, data format
##### DAC channels configuration: trigger, output buffer, data format #####
===============================================================================
@endverbatim
@@ -471,7 +484,7 @@ uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
*
@verbatim
===============================================================================
DMA management functions
##### DMA management functions #####
===============================================================================
@endverbatim
@@ -520,7 +533,7 @@ void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState)
*
@verbatim
===============================================================================
Interrupts and flags management functions
##### Interrupts and flags management functions #####
===============================================================================
@endverbatim
@@ -698,4 +711,4 @@ void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT)
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dbgmcu.c
+16 -10
View File
@@ -2,20 +2,26 @@
******************************************************************************
* @file stm32f4xx_dbgmcu.c
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file provides all the DBGMCU firmware functions.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -171,4 +177,4 @@ void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dcmi.c
+75 -71
View File
@@ -2,79 +2,83 @@
******************************************************************************
* @file stm32f4xx_dcmi.c
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file provides firmware functions to manage the following
* functionalities of the DCMI peripheral:
* - Initialization and Configuration
* - Image capture functions
* - Interrupts and flags management
* + Initialization and Configuration
* + Image capture functions
* + Interrupts and flags management
*
* @verbatim
*
*
* ===================================================================
* How to use this driver
* ===================================================================
*
* The sequence below describes how to use this driver to capture image
* from a camera module connected to the DCMI Interface.
* This sequence does not take into account the configuration of the
* camera module, which should be made before to configure and enable
* the DCMI to capture images.
*
* 1. Enable the clock for the DCMI and associated GPIOs using the following functions:
* RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_DCMI, ENABLE);
* RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
*
* 2. DCMI pins configuration
* - Connect the involved DCMI pins to AF13 using the following function
* GPIO_PinAFConfig(GPIOx, GPIO_PinSourcex, GPIO_AF_DCMI);
* - Configure these DCMI pins in alternate function mode by calling the function
* GPIO_Init();
*
* 3. Declare a DCMI_InitTypeDef structure, for example:
* DCMI_InitTypeDef DCMI_InitStructure;
* and fill the DCMI_InitStructure variable with the allowed values
* of the structure member.
*
* 4. Initialize the DCMI interface by calling the function
* DCMI_Init(&DCMI_InitStructure);
*
* 5. Configure the DMA2_Stream1 channel1 to transfer Data from DCMI DR
* register to the destination memory buffer.
*
* 6. Enable DCMI interface using the function
* DCMI_Cmd(ENABLE);
*
* 7. Start the image capture using the function
* DCMI_CaptureCmd(ENABLE);
*
* 8. At this stage the DCMI interface waits for the first start of frame,
* then a DMA request is generated continuously/once (depending on the
* mode used, Continuous/Snapshot) to transfer the received data into
* the destination memory.
*
* @note If you need to capture only a rectangular window from the received
* image, you have to use the DCMI_CROPConfig() function to configure
* the coordinates and size of the window to be captured, then enable
* the Crop feature using DCMI_CROPCmd(ENABLE);
* In this case, the Crop configuration should be made before to enable
* and start the DCMI interface.
*
* @endverbatim
*
@verbatim
===============================================================================
##### How to use this driver #####
===============================================================================
[..]
The sequence below describes how to use this driver to capture image
from a camera module connected to the DCMI Interface.
This sequence does not take into account the configuration of the
camera module, which should be made before to configure and enable
the DCMI to capture images.
(#) Enable the clock for the DCMI and associated GPIOs using the following
functions:
RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_DCMI, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
(#) DCMI pins configuration
(++) Connect the involved DCMI pins to AF13 using the following function
GPIO_PinAFConfig(GPIOx, GPIO_PinSourcex, GPIO_AF_DCMI);
(++) Configure these DCMI pins in alternate function mode by calling
the function GPIO_Init();
(#) Declare a DCMI_InitTypeDef structure, for example:
DCMI_InitTypeDef DCMI_InitStructure;
and fill the DCMI_InitStructure variable with the allowed values
of the structure member.
(#) Initialize the DCMI interface by calling the function
DCMI_Init(&DCMI_InitStructure);
(#) Configure the DMA2_Stream1 channel1 to transfer Data from DCMI DR
register to the destination memory buffer.
(#) Enable DCMI interface using the function
DCMI_Cmd(ENABLE);
(#) Start the image capture using the function
DCMI_CaptureCmd(ENABLE);
(#) At this stage the DCMI interface waits for the first start of frame,
then a DMA request is generated continuously/once (depending on the
mode used, Continuous/Snapshot) to transfer the received data into
the destination memory.
-@- If you need to capture only a rectangular window from the received
image, you have to use the DCMI_CROPConfig() function to configure
the coordinates and size of the window to be captured, then enable
the Crop feature using DCMI_CROPCmd(ENABLE);
In this case, the Crop configuration should be made before to enable
and start the DCMI interface.
@endverbatim
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -107,7 +111,7 @@
*
@verbatim
===============================================================================
Initialization and Configuration functions
##### Initialization and Configuration functions #####
===============================================================================
@endverbatim
@@ -279,7 +283,7 @@ void DCMI_JPEGCmd(FunctionalState NewState)
*
@verbatim
===============================================================================
Image capture functions
##### Image capture functions #####
===============================================================================
@endverbatim
@@ -350,7 +354,7 @@ uint32_t DCMI_ReadData(void)
*
@verbatim
===============================================================================
Interrupts and flags management functions
##### Interrupts and flags management functions #####
===============================================================================
@endverbatim
@@ -418,7 +422,7 @@ FlagStatus DCMI_GetFlagStatus(uint16_t DCMI_FLAG)
/* Get the DCMI register index */
dcmireg = (((uint16_t)DCMI_FLAG) >> 12);
if (dcmireg == 0x01) /* The FLAG is in RISR register */
if (dcmireg == 0x00) /* The FLAG is in RISR register */
{
tempreg= DCMI->RISR;
}
@@ -531,4 +535,4 @@ void DCMI_ClearITPendingBit(uint16_t DCMI_IT)
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dma.c
+246 -228
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dma2d.c
+778
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_exti.c
+57 -51
View File
@@ -2,58 +2,65 @@
******************************************************************************
* @file stm32f4xx_exti.c
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file provides firmware functions to manage the following
* functionalities of the EXTI peripheral:
* - Initialization and Configuration
* - Interrupts and flags management
* + Initialization and Configuration
* + Interrupts and flags management
*
* @verbatim
*
* ===================================================================
* EXTI features
* ===================================================================
*
* External interrupt/event lines are mapped as following:
* 1- All available GPIO pins are connected to the 16 external
* interrupt/event lines from EXTI0 to EXTI15.
* 2- EXTI line 16 is connected to the PVD Output
* 3- EXTI line 17 is connected to the RTC Alarm event
* 4- EXTI line 18 is connected to the USB OTG FS Wakeup from suspend event
* 5- EXTI line 19 is connected to the Ethernet Wakeup event
* 6- EXTI line 20 is connected to the USB OTG HS (configured in FS) Wakeup event
* 7- EXTI line 21 is connected to the RTC Tamper and Time Stamp events
* 8- EXTI line 22 is connected to the RTC Wakeup event
*
* ===================================================================
* How to use this driver
* ===================================================================
*
* In order to use an I/O pin as an external interrupt source, follow
* steps below:
* 1- Configure the I/O in input mode using GPIO_Init()
* 2- Select the input source pin for the EXTI line using SYSCFG_EXTILineConfig()
* 3- Select the mode(interrupt, event) and configure the trigger
* selection (Rising, falling or both) using EXTI_Init()
* 4- Configure NVIC IRQ channel mapped to the EXTI line using NVIC_Init()
*
* @note SYSCFG APB clock must be enabled to get write access to SYSCFG_EXTICRx
* registers using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
*
* @endverbatim
@verbatim
===================================================================
##### EXTI features #####
===================================================================
[..] External interrupt/event lines are mapped as following:
(#) All available GPIO pins are connected to the 16 external
interrupt/event lines from EXTI0 to EXTI15.
(#) EXTI line 16 is connected to the PVD Output
(#) EXTI line 17 is connected to the RTC Alarm event
(#) EXTI line 18 is connected to the USB OTG FS Wakeup from suspend event
(#) EXTI line 19 is connected to the Ethernet Wakeup event
(#) EXTI line 20 is connected to the USB OTG HS (configured in FS) Wakeup event
(#) EXTI line 21 is connected to the RTC Tamper and Time Stamp events
(#) EXTI line 22 is connected to the RTC Wakeup event
##### How to use this driver #####
===================================================================
[..] In order to use an I/O pin as an external interrupt source, follow steps
below:
(#) Configure the I/O in input mode using GPIO_Init()
(#) Select the input source pin for the EXTI line using SYSCFG_EXTILineConfig()
(#) Select the mode(interrupt, event) and configure the trigger
selection (Rising, falling or both) using EXTI_Init()
(#) Configure NVIC IRQ channel mapped to the EXTI line using NVIC_Init()
[..]
(@) SYSCFG APB clock must be enabled to get write access to SYSCFG_EXTICRx
registers using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
@endverbatim
*
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -88,7 +95,7 @@
*
@verbatim
===============================================================================
Initialization and Configuration functions
##### Initialization and Configuration functions #####
===============================================================================
@endverbatim
@@ -204,7 +211,7 @@ void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
*
@verbatim
===============================================================================
Interrupts and flags management functions
##### Interrupts and flags management functions #####
===============================================================================
@endverbatim
@@ -256,13 +263,11 @@ void EXTI_ClearFlag(uint32_t EXTI_Line)
*/
ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
{
ITStatus bitstatus = RESET;
uint32_t enablestatus = 0;
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_GET_EXTI_LINE(EXTI_Line));
enablestatus = EXTI->IMR & EXTI_Line;
if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
{
bitstatus = SET;
}
@@ -271,6 +276,7 @@ ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
bitstatus = RESET;
}
return bitstatus;
}
/**
@@ -303,4 +309,4 @@ void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash.c
+679 -155
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_fmc.c
+1373
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_fsmc.c
-982
View File
File diff suppressed because it is too large Load Diff
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_gpio.c
+136 -86
View File
@@ -2,76 +2,81 @@
******************************************************************************
* @file stm32f4xx_gpio.c
* @author MCD Application Team
* @version V1.0.0
* @date 30-September-2011
* @version V1.3.0
* @date 08-November-2013
* @brief This file provides firmware functions to manage the following
* functionalities of the GPIO peripheral:
* - Initialization and Configuration
* - GPIO Read and Write
* - GPIO Alternate functions configuration
* + Initialization and Configuration
* + GPIO Read and Write
* + GPIO Alternate functions configuration
*
* @verbatim
*
* ===================================================================
* How to use this driver
* ===================================================================
* 1. Enable the GPIO AHB clock using the following function
* RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
*
* 2. Configure the GPIO pin(s) using GPIO_Init()
* Four possible configuration are available for each pin:
* - Input: Floating, Pull-up, Pull-down.
* - Output: Push-Pull (Pull-up, Pull-down or no Pull)
* Open Drain (Pull-up, Pull-down or no Pull).
* In output mode, the speed is configurable: 2 MHz, 25 MHz,
* 50 MHz or 100 MHz.
* - Alternate Function: Push-Pull (Pull-up, Pull-down or no Pull)
* Open Drain (Pull-up, Pull-down or no Pull).
* - Analog: required mode when a pin is to be used as ADC channel
* or DAC output.
*
* 3- Peripherals alternate function:
* - For ADC and DAC, configure the desired pin in analog mode using
* GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AN;
* - For other peripherals (TIM, USART...):
* - Connect the pin to the desired peripherals' Alternate
* Function (AF) using GPIO_PinAFConfig() function
* - Configure the desired pin in alternate function mode using
* GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
* - Select the type, pull-up/pull-down and output speed via
* GPIO_PuPd, GPIO_OType and GPIO_Speed members
* - Call GPIO_Init() function
*
* 4. To get the level of a pin configured in input mode use GPIO_ReadInputDataBit()
*
* 5. To set/reset the level of a pin configured in output mode use
* GPIO_SetBits()/GPIO_ResetBits()
*
* 6. During and just after reset, the alternate functions are not
* active and the GPIO pins are configured in input floating mode
* (except JTAG pins).
*
* 7. The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as
* general-purpose (PC14 and PC15, respectively) when the LSE
* oscillator is off. The LSE has priority over the GPIO function.
*
* 8. The HSE oscillator pins OSC_IN/OSC_OUT can be used as
* general-purpose PH0 and PH1, respectively, when the HSE
* oscillator is off. The HSE has priority over the GPIO function.
*
* @endverbatim
@verbatim
===============================================================================
##### How to use this driver #####
===============================================================================
[..]
(#) Enable the GPIO AHB clock using the following function
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
(#) Configure the GPIO pin(s) using GPIO_Init()
Four possible configuration are available for each pin:
(++) Input: Floating, Pull-up, Pull-down.
(++) Output: Push-Pull (Pull-up, Pull-down or no Pull)
Open Drain (Pull-up, Pull-down or no Pull). In output mode, the speed
is configurable: 2 MHz, 25 MHz, 50 MHz or 100 MHz.
(++) Alternate Function: Push-Pull (Pull-up, Pull-down or no Pull) Open
Drain (Pull-up, Pull-down or no Pull).
(++) Analog: required mode when a pin is to be used as ADC channel or DAC
output.
(#) Peripherals alternate function:
(++) For ADC and DAC, configure the desired pin in analog mode using
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AN;
(+++) For other peripherals (TIM, USART...):
(+++) Connect the pin to the desired peripherals' Alternate
Function (AF) using GPIO_PinAFConfig() function
(+++) Configure the desired pin in alternate function mode using
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
(+++) Select the type, pull-up/pull-down and output speed via
GPIO_PuPd, GPIO_OType and GPIO_Speed members
(+++) Call GPIO_Init() function
(#) To get the level of a pin configured in input mode use GPIO_ReadInputDataBit()
(#) To set/reset the level of a pin configured in output mode use
GPIO_SetBits()/GPIO_ResetBits()
(#) During and just after reset, the alternate functions are not
active and the GPIO pins are configured in input floating mode (except JTAG
pins).
(#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
(PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
priority over the GPIO function.
(#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
The HSE has priority over the GPIO function.
@endverbatim
*
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
@@ -104,7 +109,7 @@
*
@verbatim
===============================================================================
Initialization and Configuration
##### Initialization and Configuration #####
===============================================================================
@endverbatim
@@ -112,9 +117,11 @@
*/
/**
* @brief Deinitializes the GPIOx peripheral registers to their default reset values.
* @brief De-initializes the GPIOx peripheral registers to their default reset values.
* @note By default, The GPIO pins are configured in input floating mode (except JTAG pins).
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @retval None
*/
void GPIO_DeInit(GPIO_TypeDef* GPIOx)
@@ -162,19 +169,32 @@ void GPIO_DeInit(GPIO_TypeDef* GPIOx)
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, ENABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, DISABLE);
}
else if (GPIOx == GPIOI)
{
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, ENABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, DISABLE);
}
else if (GPIOx == GPIOJ)
{
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOJ, ENABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOJ, DISABLE);
}
else
{
if (GPIOx == GPIOI)
if (GPIOx == GPIOK)
{
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, ENABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, DISABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOK, ENABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOK, DISABLE);
}
}
}
/**
* @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_InitStruct.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
@@ -189,7 +209,7 @@ void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd));
/* -------------------------Configure the port pins---------------- */
/* ------------------------- Configure the port pins ---------------- */
/*-- GPIO Mode Configuration --*/
for (pinpos = 0x00; pinpos < 0x10; pinpos++)
{
@@ -247,7 +267,9 @@ void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
* GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
* @note The configuration of the locked GPIO pins can no longer be modified
* until the next reset.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @param GPIO_Pin: specifies the port bit to be locked.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* @retval None
@@ -282,7 +304,7 @@ void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
*
@verbatim
===============================================================================
GPIO Read and Write
##### GPIO Read and Write #####
===============================================================================
@endverbatim
@@ -291,7 +313,9 @@ void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
/**
* @brief Reads the specified input port pin.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_Pin_x where x can be (0..15).
* @retval The input port pin value.
@@ -317,7 +341,9 @@ uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
/**
* @brief Reads the specified GPIO input data port.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @retval GPIO input data port value.
*/
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
@@ -330,7 +356,9 @@ uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
/**
* @brief Reads the specified output data port bit.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_Pin_x where x can be (0..15).
* @retval The output port pin value.
@@ -343,7 +371,7 @@ uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
if (((GPIOx->ODR) & GPIO_Pin) != (uint32_t)Bit_RESET)
{
bitstatus = (uint8_t)Bit_SET;
}
@@ -356,7 +384,9 @@ uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
/**
* @brief Reads the specified GPIO output data port.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @retval GPIO output data port value.
*/
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
@@ -372,7 +402,9 @@ uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
* @note This functions uses GPIOx_BSRR register to allow atomic read/modify
* accesses. In this way, there is no risk of an IRQ occurring between
* the read and the modify access.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @param GPIO_Pin: specifies the port bits to be written.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* @retval None
@@ -391,7 +423,9 @@ void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
* @note This functions uses GPIOx_BSRR register to allow atomic read/modify
* accesses. In this way, there is no risk of an IRQ occurring between
* the read and the modify access.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @param GPIO_Pin: specifies the port bits to be written.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* @retval None
@@ -407,7 +441,9 @@ void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
/**
* @brief Sets or clears the selected data port bit.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @param GPIO_Pin: specifies the port bit to be written.
* This parameter can be one of GPIO_Pin_x where x can be (0..15).
* @param BitVal: specifies the value to be written to the selected bit.
@@ -435,7 +471,9 @@ void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
/**
* @brief Writes data to the specified GPIO data port.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @param PortVal: specifies the value to be written to the port output data register.
* @retval None
*/
@@ -449,7 +487,9 @@ void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
/**
* @brief Toggles the specified GPIO pins..
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @param GPIO_Pin: Specifies the pins to be toggled.
* @retval None
*/
@@ -470,7 +510,7 @@ void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
*
@verbatim
===============================================================================
GPIO Alternate functions configuration function
##### GPIO Alternate functions configuration function #####
===============================================================================
@endverbatim
@@ -479,7 +519,9 @@ void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
/**
* @brief Changes the mapping of the specified pin.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
* x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
* x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
* @param GPIO_PinSource: specifies the pin for the Alternate function.
* This parameter can be GPIO_PinSourcex where x can be (0..15).
* @param GPIO_AFSelection: selects the pin to used as Alternate function.
@@ -503,6 +545,10 @@ void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
* @arg GPIO_AF_I2C3: Connect I2C3 pins to AF4
* @arg GPIO_AF_SPI1: Connect SPI1 pins to AF5
* @arg GPIO_AF_SPI2: Connect SPI2/I2S2 pins to AF5
* @arg GPIO_AF_SPI4: Connect SPI4 pins to AF5
* @arg GPIO_AF_SPI5: Connect SPI5 pins to AF5
* @arg GPIO_AF_SPI6: Connect SPI6 pins to AF5
* @arg GPIO_AF_SAI1: Connect SAI1 pins to AF6 for STM32F42xxx/43xxx devices.
* @arg GPIO_AF_SPI3: Connect SPI3/I2S3 pins to AF6
* @arg GPIO_AF_I2S3ext: Connect I2S3ext pins to AF7
* @arg GPIO_AF_USART1: Connect USART1 pins to AF7
@@ -511,6 +557,8 @@ void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
* @arg GPIO_AF_UART4: Connect UART4 pins to AF8
* @arg GPIO_AF_UART5: Connect UART5 pins to AF8
* @arg GPIO_AF_USART6: Connect USART6 pins to AF8
* @arg GPIO_AF_UART7: Connect UART7 pins to AF8
* @arg GPIO_AF_UART8: Connect UART8 pins to AF8
* @arg GPIO_AF_CAN1: Connect CAN1 pins to AF9
* @arg GPIO_AF_CAN2: Connect CAN2 pins to AF9
* @arg GPIO_AF_TIM12: Connect TIM12 pins to AF9
@@ -519,10 +567,12 @@ void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
* @arg GPIO_AF_OTG_FS: Connect OTG_FS pins to AF10
* @arg GPIO_AF_OTG_HS: Connect OTG_HS pins to AF10
* @arg GPIO_AF_ETH: Connect ETHERNET pins to AF11
* @arg GPIO_AF_FSMC: Connect FSMC pins to AF12
* @arg GPIO_AF_FSMC: Connect FSMC pins to AF12
* @arg GPIO_AF_FMC: Connect FMC pins to AF12 for STM32F42xxx/43xxx devices.
* @arg GPIO_AF_OTG_HS_FS: Connect OTG HS (configured in FS) pins to AF12
* @arg GPIO_AF_SDIO: Connect SDIO pins to AF12
* @arg GPIO_AF_DCMI: Connect DCMI pins to AF13
* @arg GPIO_AF_LTDC: Connect LTDC pins to AF14 for STM32F429xx/439xx devices.
* @arg GPIO_AF_EVENTOUT: Connect EVENTOUT pins to AF15
* @retval None
*/
@@ -558,4 +608,4 @@ void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f429-disco/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash.c
+216 -190
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