mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-11-09 20:45:41 +08:00
Merge pull request #5042 from WUSY1991/RTT_pr
add yichip/yc3121-pos bsp
This commit is contained in:
56 files changed
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./.vscode/*
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./build/*
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*.pyc
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*.map
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*.dblite
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*.elf
|
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*.bin
|
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*.hex
|
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*.axf
|
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*.exe
|
||||
*.pdb
|
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*.idb
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*.ilk
|
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*.old
|
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build
|
||||
Debug
|
||||
documentation/html
|
||||
packages/
|
||||
*~
|
||||
*.o
|
||||
*.obj
|
||||
*.out
|
||||
*.bak
|
||||
*.dep
|
||||
*.lib
|
||||
*.i
|
||||
*.d
|
||||
.DS_Stor*
|
||||
.config 3
|
||||
.config 4
|
||||
.config 5
|
||||
Midea-X1
|
||||
*.uimg
|
||||
GPATH
|
||||
GRTAGS
|
||||
GTAGS
|
||||
.vscode
|
||||
JLinkLog.txt
|
||||
JLinkSettings.ini
|
||||
DebugConfig/
|
||||
RTE/
|
||||
settings/
|
||||
*.uvguix*
|
||||
cconfig.h
|
||||
@@ -0,0 +1,9 @@
|
||||
# files format check exclude path, please follow the instructions below to modify;
|
||||
# If you need to exclude an entire folder, add the folder path in dir_path;
|
||||
# If you need to exclude a file, add the path to the file in file_path.
|
||||
|
||||
file_path:
|
||||
|
||||
|
||||
dir_path:
|
||||
- Libraries
|
||||
@@ -0,0 +1,27 @@
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||||
mainmenu "RT-Thread Configuration"
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|
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config BSP_DIR
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string
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option env="BSP_ROOT"
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||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../.."
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
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source "$PKGS_DIR/Kconfig"
|
||||
|
||||
config SOC_SWM320VET7
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bool
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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default y
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||||
|
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source "drivers/Kconfig"
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@@ -0,0 +1,17 @@
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from building import *
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import rtconfig
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cwd = GetCurrentDir()
|
||||
src = Glob('sdk/*.c')
|
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CPPPATH = [cwd + '/sdk', cwd + '/core', cwd]
|
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|
||||
src += Glob('core/*.c')
|
||||
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
src += ['startup/flash_start_gcc.s']
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
||||
src += ['startup/startup.s', 'startup/flash_start.s']
|
||||
elif rtconfig.CROSS_TOOL == 'iar':
|
||||
src += ['startup/flash_start_iar.s']
|
||||
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
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||||
/*
|
||||
File Name : board_config.h
|
||||
Author : Yichip
|
||||
Version : V1.0
|
||||
Date : 2020/07/17
|
||||
Description : misc file.
|
||||
*/
|
||||
|
||||
#include "misc.h"
|
||||
|
||||
/* following defines should be used for structure members */
|
||||
#define __IM volatile const /*! Defines 'read only' structure member permissions */
|
||||
#define __OM volatile /*! Defines 'write only' structure member permissions */
|
||||
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
|
||||
|
||||
/* Memory mapping of Cortex-M0 Hardware */
|
||||
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
|
||||
#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
|
||||
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
__IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
|
||||
__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
|
||||
uint32_t RESERVED0;
|
||||
__IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
|
||||
__IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
|
||||
__IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
|
||||
uint32_t RESERVED1;
|
||||
__IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
|
||||
__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
|
||||
} SCB_Type;
|
||||
|
||||
/**
|
||||
\brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
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uint32_t RESERVED0[31U];
|
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__IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
|
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uint32_t RSERVED1[31U];
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__IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
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uint32_t RESERVED2[31U];
|
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__IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
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uint32_t RESERVED3[31U];
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uint32_t RESERVED4[64U];
|
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__IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
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} NVIC_Type;
|
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|
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#define SCB ((SCB_Type *)SCB_BASE) /*!< SCB configuration struct */
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#define NVIC ((NVIC_Type *)NVIC_BASE) /*!< NVIC configuration struct */
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|
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/* The following MACROS handle generation of the register offset and byte masks */
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#define _BIT_SHIFT(IRQn) (((((uint32_t)(int32_t)(IRQn))) & 0x03UL) * 8UL)
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#define _SHP_IDX(IRQn) ((((((uint32_t)(int32_t)(IRQn)) & 0x0FUL) - 8UL) >> 2UL))
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#define _IP_IDX(IRQn) ((((uint32_t)(int32_t)(IRQn)) >> 2UL))
|
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|
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/* ----------------Configuration of the Cortex-M0 Processor and Core Peripherals---------------- */
|
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#define __CM0_REV 0x0000 /*!< Cortex-M0 Core Revision */
|
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#define __MPU_PRESENT 0 /*!< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 2 /*!< Number of Bits used for Priority Levels */
|
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#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
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||||
/* End of group Configuration_of_CMSIS */
|
||||
|
||||
uint32_t NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
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{
|
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if ((int32_t)(IRQn) < 0)
|
||||
{
|
||||
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
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(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
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||||
}
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else
|
||||
{
|
||||
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
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(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
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||||
}
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
#define SBC_ICSR_PENDSV_IRQ 28
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||||
void trigger_PendSV(void)
|
||||
{
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SCB->ICSR |= (1 << SBC_ICSR_PENDSV_IRQ);
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||||
}
|
||||
|
||||
void NVIC_EnableIRQ(IRQn_Type IRQnx)
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{
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enable_intr((int)IRQnx);
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}
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||||
|
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void NVIC_DisableIRQ(IRQn_Type IRQnx)
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{
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disable_intr((int)IRQnx);
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||||
}
|
||||
|
||||
void soft_reset(void)
|
||||
{
|
||||
SYSCTRL_RST_EN |= 0x01;
|
||||
SYSCTRL_RESET = 0x55;
|
||||
while (1);
|
||||
}
|
||||
@@ -0,0 +1,93 @@
|
||||
/*
|
||||
File Name : board_config.h
|
||||
Author : Yichip
|
||||
Version : V1.0
|
||||
Date : 2020/07/17
|
||||
Description : misc file.
|
||||
*/
|
||||
|
||||
#ifndef __MISC_H
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||||
#define __MISC_H
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||||
#include "yc3121.h"
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|
||||
#ifdef __cplusplus
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||||
extern "C" {
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||||
#endif
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SVCall_IRQn = -5, //SVC_IRQHandler
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PendSV_IRQn = -2, //PENDSV_IRQHandler
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||||
SysTick_IRQn = -1, //SYSTICK_IRQHandler
|
||||
USB_IRQn = 0,
|
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IIC_IRQn = 1,
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QSPI_IRQn = 2,
|
||||
SPI0_IRQn = 3,
|
||||
SPI1_IRQn = 4,
|
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UART0_IRQn = 5,
|
||||
UART1_IRQn = 6,
|
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MEMCP_IRQn = 7,//DMA MEM_TO_MEM
|
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RSA_IRQn = 8,
|
||||
SCI0_IRQn = 9,
|
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SCI1_IRQn = 10,
|
||||
BT_IRQn = 11,
|
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GPIO_IRQn = 12,
|
||||
TIM0_IRQn = 13,
|
||||
TIM1_IRQn = 14,
|
||||
TIM2_IRQn = 15,
|
||||
TIM3_IRQn = 16,
|
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TIM4_IRQn = 17,
|
||||
TIM5_IRQn = 18,
|
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TIM6_IRQn = 19,
|
||||
TIM7_IRQn = 20,
|
||||
TIM8_IRQn = 21,
|
||||
SM4_IRQn = 22,
|
||||
SEC_IRQn = 23,
|
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MSR_IRQn = 24,
|
||||
TRNG_IRQn = 25,
|
||||
WDT_IRQn = 26
|
||||
} IRQn_Type;
|
||||
|
||||
/**
|
||||
* @brief Enable External Interrupt
|
||||
* @param IRQnx IRQn External interrupt number. Value cannot be negative.
|
||||
* @retval none
|
||||
*/
|
||||
void NVIC_EnableIRQ(IRQn_Type IRQnx);
|
||||
|
||||
/**
|
||||
* @brief Disable External Interrupt
|
||||
* @param IRQnx IRQn External interrupt number. Value cannot be negative.
|
||||
* @retval none
|
||||
*/
|
||||
void NVIC_DisableIRQ(IRQn_Type IRQnx);
|
||||
|
||||
/**
|
||||
* @brief Set Interrupt Priority
|
||||
* @param IRQn Interrupt number.
|
||||
* @retval SUCCESS or ERROR
|
||||
*/
|
||||
uint32_t NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority);
|
||||
|
||||
|
||||
/**
|
||||
* @brief trigger PendSV Interrupt
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void trigger_PendSV(void);
|
||||
|
||||
/**
|
||||
* @brief System Reset
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void soft_reset(void);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MISC_H */
|
||||
|
||||
@@ -0,0 +1,42 @@
|
||||
/*
|
||||
File Name : rom_api.h
|
||||
Author : Yichip
|
||||
Version : V1.0
|
||||
Date : 2020/02/11
|
||||
Description : rom fun information.
|
||||
*/
|
||||
|
||||
#ifndef __ROM_API_H__
|
||||
#define __ROM_API_H__
|
||||
|
||||
/* TIMER */
|
||||
#define FUNC_DELAY_US_ADDR (0x4238 + 1)
|
||||
#define FUNC_DELAY_MS_ADDR (0x425c + 1)
|
||||
|
||||
/* OTP */
|
||||
#define FUNC_INIT_OTP_ADDR (0x442c + 1)
|
||||
#define FUNC_DEINIT_OTP_ADDR (0x4480 + 1)
|
||||
#define FUNC_READ_OTP_ADDR (0x449c + 1)
|
||||
#define FUNC_WRITE_OTP_ADDR (0x4594 + 1)
|
||||
#define FUNC_READ_CHIPID_ADDR (0x45d8 + 1)
|
||||
#define FUNC_READ_CHIPLF_ADDR (0x45e6 + 1)
|
||||
|
||||
/* LPM */
|
||||
#define FUNC_LPM_READ_ADDR (0x4c80 + 1)
|
||||
#define FUNC_LPM_WRITE_ADDR (0x4c9c + 1)
|
||||
#define FUNC_LPM_BT_WRITE_ADDR (0x4cb0 + 1)
|
||||
#define FUNC_LPM_BT_READ_ADDR (0x4d24 + 1)
|
||||
#define FUNC_LPM_SLEEP_ADDR (0x4d68 + 1)
|
||||
#define FUNC_SETLPMVAL_ADDR (0x4280 + 1)
|
||||
|
||||
/* QSPI */
|
||||
#define FUNC_ENC_WRITE_FLASH_ADDR (0x51f0 + 1)
|
||||
#define FUNC_QSPI_FLASH_SECTORERASE_ADDR (0x48b4 + 1)
|
||||
#define FUNC_QSPI_FLASH_BLOCKERASE_ADDR (0x48c0 + 1)
|
||||
#define FUNC_QSPI_FLASH_WRITE_ADDR (0x47f4 + 1)
|
||||
#define FUNC_QSPI_FLASH_READ_ADDR (0x48f6 + 1)
|
||||
#define FUNC_FLASH_BLANK_CHECK (0x513c + 1)
|
||||
#define FUNC_PREFETCH (0x4404 + 1)
|
||||
#define FUNC_READ_FLASH_ID (0x4960 + 1)
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large.
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@@ -0,0 +1,43 @@
|
||||
/*
|
||||
File Name : system.h
|
||||
Author : Yichip
|
||||
Version : V1.0
|
||||
Date : 2018/05/22
|
||||
Description : none.
|
||||
*/
|
||||
|
||||
#ifndef __SYSTEM_H__
|
||||
#define __SYSTEM_H__
|
||||
|
||||
|
||||
#include <string.h>
|
||||
#include "yc_uart.h"
|
||||
|
||||
//#define SDK_DEBUG //Debug switch
|
||||
|
||||
#define BIT_SET(a,b) ((a) |= (1<<(b)))
|
||||
#define BIT_CLEAR(a,b) ((a) &= ~(1<<(b)))
|
||||
#define BIT_FLIP(a,b) ((a) ^= (1<<(b))) //bit Negation
|
||||
#define BIT_GET(a,b) (((a) & (1<<(b)))>>(b))
|
||||
|
||||
/**
|
||||
* @brief Print format string to serial port 0.You need to initialize the serial port 0 before you use MyPrintf.
|
||||
*
|
||||
* @param format : format string
|
||||
* @param ...: format parameter
|
||||
*/
|
||||
void MyPrintf(char *format, ...);
|
||||
|
||||
void _assert_handler(const char *file, int line, const char *func);
|
||||
|
||||
void printv(uint8_t *buf, uint32_t len, uint8_t *s);
|
||||
|
||||
#define _ASSERT(x) \
|
||||
if (!(x)) \
|
||||
{ \
|
||||
_assert_handler(__FILE__,__LINE__,__FUNCTION__);\
|
||||
}
|
||||
|
||||
|
||||
#endif /*__SYSTEM_H__*/
|
||||
|
||||
@@ -0,0 +1,67 @@
|
||||
/*
|
||||
File Name : type.h
|
||||
Author : Yichip
|
||||
Version : V1.0
|
||||
Date : 2018/05/25
|
||||
Description : Data type definition.
|
||||
*/
|
||||
|
||||
#ifndef __TYPE_H__
|
||||
#define __TYPE_H__
|
||||
|
||||
#if defined (__CC_ARM) || defined ( __ICCARM__ )
|
||||
typedef unsigned char uint8_t;
|
||||
typedef unsigned short uint16_t;
|
||||
typedef unsigned int uint32_t;
|
||||
typedef unsigned long long uint64_t;
|
||||
typedef unsigned char byte;
|
||||
typedef unsigned short word;
|
||||
|
||||
typedef signed char int8_t;
|
||||
typedef signed short int16_t;
|
||||
typedef signed int int32_t;
|
||||
typedef signed long long int64_t;
|
||||
#else
|
||||
#include "stdio.h"
|
||||
typedef unsigned char byte;
|
||||
typedef unsigned short word;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief __NOINLINE definition
|
||||
*/
|
||||
#if defined ( __CC_ARM ) || defined ( __GNUC__ )
|
||||
/* ARM & GNUCompiler
|
||||
----------------
|
||||
*/
|
||||
#define __NOINLINE noinline
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
/* ICCARM Compiler
|
||||
---------------
|
||||
*/
|
||||
#define __NOINLINE _Pragma("optimize = no_inline")
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef Boolean
|
||||
typedef enum {FALSE = 0, TRUE =1} Boolean;
|
||||
#define IS_BOOLEAN(bool) ((bool == FALSE) || (bool == TRUE))
|
||||
#endif
|
||||
|
||||
#ifndef FunctionalState
|
||||
typedef enum {DISABLE = 0, ENABLE =1} FunctionalState;
|
||||
#define IS_FUNCTIONAL_STATE(state) ((state== DISABLE) || (state == ENABLE))
|
||||
#endif
|
||||
|
||||
#ifndef FunctionalState
|
||||
typedef enum {ERROR = 0, SUCCESS = 1} ErrorStatus;
|
||||
#define IS_ERROR_STATE(status) ((status== ERROR) || (status == SUCCESS))
|
||||
#endif
|
||||
|
||||
#ifndef FlagStatus
|
||||
typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
|
||||
#endif
|
||||
|
||||
#endif /*__TYPE_H__*/
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,72 @@
|
||||
/*
|
||||
File Name : yc_dma.c
|
||||
Author : Yichip
|
||||
Version : V1.0
|
||||
Date : 2018/03/27
|
||||
Description : DMA Mem_TO_Mem Mode encapsulation.
|
||||
If enable DMA interrupt ,enter interrupt after sending data by default,and just one DMA IT Mode.
|
||||
*/
|
||||
|
||||
#include "yc_dma.h"
|
||||
|
||||
#define DMA_Channel DMACH_MEMCP
|
||||
#define DMA_CLEAR_IT_BIT_Pos 6
|
||||
#define DMA_ENTERIT_BIT_Pos 1
|
||||
#define DMA_DATA_COMPLETE_BIT_Pos 0
|
||||
|
||||
void DMA_Init(DMA_InitTypeDef *DMA_InitStruct)
|
||||
{
|
||||
DMA_SRC_ADDR(DMACH_MEMCP) = DMA_InitStruct->DMA_MemorySourceAddr;
|
||||
DMA_DEST_ADDR(DMACH_MEMCP) = DMA_InitStruct->DMA_MemoryDestAddr;
|
||||
DMA_LEN(DMACH_MEMCP) = (DMA_InitStruct->DMA_BlockSize << 16) | DMA_InitStruct->DMA_BlockSize;
|
||||
}
|
||||
|
||||
void DMA_ChannelCmd(FunctionalState NewState)
|
||||
{
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
DMA_START(DMACH_MEMCP) |= (DMA_ENABLE);
|
||||
}
|
||||
else
|
||||
{
|
||||
DMA_START(DMACH_MEMCP) &= ~(DMA_ENABLE);
|
||||
}
|
||||
}
|
||||
|
||||
void DMA_SetSRCAddress(uint32_t Address)
|
||||
{
|
||||
DMA_SRC_ADDR(DMACH_MEMCP) = Address;
|
||||
}
|
||||
|
||||
void DMA_SetDSRAddress(uint32_t Address)
|
||||
{
|
||||
DMA_DEST_ADDR(DMACH_MEMCP) = Address;
|
||||
}
|
||||
|
||||
FunctionalState DMA_IsChannelEnabled(void)
|
||||
{
|
||||
if (1 == (DMA_START(DMACH_MEMCP) & DMA_ENABLE))
|
||||
{
|
||||
return ENABLE;
|
||||
}
|
||||
else
|
||||
{
|
||||
return DISABLE;
|
||||
}
|
||||
}
|
||||
|
||||
FlagStatus DMA_GetFlagStatus(void)
|
||||
{
|
||||
return (FlagStatus)((DMA_STATUS(DMACH_MEMCP) & (1 << DMA_DATA_COMPLETE_BIT_Pos)));
|
||||
}
|
||||
|
||||
void DMA_ClearITPendingBit(void)
|
||||
{
|
||||
DMA_START(DMACH_MEMCP) |= (1 << DMA_CLEAR_IT_BIT_Pos);
|
||||
}
|
||||
|
||||
void DMA_ITConfig(FunctionalState NewState)
|
||||
{
|
||||
DMA_CONFIG(DMACH_MEMCP) &= ~(1 << DMA_ENTERIT_BIT_Pos);
|
||||
DMA_CONFIG(DMACH_MEMCP) |= (NewState << DMA_ENTERIT_BIT_Pos);
|
||||
}
|
||||
@@ -0,0 +1,91 @@
|
||||
/*
|
||||
File Name : yc_dma.h
|
||||
Author : Yichip
|
||||
Version : V1.0
|
||||
Date : 2018/03/27
|
||||
Description : DMA Mem_TO_Mem Mode encapsulation.
|
||||
If enable DMA interrupt ,enter interrupt after sending data by default,and just one DMA IT Mode.
|
||||
*/
|
||||
|
||||
#ifndef __YC_DMA_H_
|
||||
#define __YC_DMA_H_
|
||||
|
||||
#include "yc3121.h"
|
||||
#define DMACH_QSPI 0
|
||||
|
||||
#define DMA_ENABLE_BIT_Pos 7
|
||||
#define DMA_ENABLE ((uint8_t)1 << DMA_ENABLE_BIT_Pos)
|
||||
|
||||
#define DMA_IT_BIT_Pos 1
|
||||
#define DMA_IT_ENABLE ((uint32_t)1 << DMA_IT_BIT_Pos)
|
||||
/*Peripheral DMA Channel*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t DMA_MemorySourceAddr; /*!< Specifies the memory Source address for Channel Mem_to_Mem. */
|
||||
|
||||
uint32_t DMA_MemoryDestAddr; /*!<Specifies the memory Destination address for Channel Mem_to_Mem. */
|
||||
|
||||
uint32_t DMA_BlockSize; /*!< Specifies the Total Number of data items during the transaction. */
|
||||
|
||||
} DMA_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief Initializes the DMA Mem_to_Mem Channelx according to the specified
|
||||
* parameters in the DMA_InitStruct.
|
||||
* @param DMA_InitStruct: pointer to a DMA_InitTypeDef structure that
|
||||
* contains the configuration information for the specified DMA Channel.
|
||||
* @retval None
|
||||
*/
|
||||
void DMA_Init(DMA_InitTypeDef *DMA_InitStruct);
|
||||
|
||||
/**
|
||||
* @brief Enables or disables Channel DMACH_MEMCP.
|
||||
* @param NewState: new state of the DMAy Channelx.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void DMA_ChannelCmd(FunctionalState NewState);
|
||||
|
||||
/**
|
||||
* @brief Set DMA Source Address.
|
||||
* @param Address: DMA source address
|
||||
* @retval None
|
||||
*/
|
||||
void DMA_SetSRCAddress(uint32_t Address);
|
||||
|
||||
/**
|
||||
* @brief Set DMA destination Address.
|
||||
* @param Address: DMA source address
|
||||
* @retval None
|
||||
*/
|
||||
void DMA_SetDSRAddress(uint32_t Address);
|
||||
|
||||
/**
|
||||
* @brief Checks whether the DMACH_MEMCP Channelx flag is set or not.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
FlagStatus DMA_GetFlagStatus(void);
|
||||
|
||||
/**
|
||||
* @brief Clears the DMACH_MEMCP Channelx's pending flags.
|
||||
* @param None
|
||||
* @retval Enable or Disable.
|
||||
*/
|
||||
FunctionalState DMA_IsChannelEnabled(void);
|
||||
|
||||
/**
|
||||
* @brief Clears the DMACH_MEMCP Channelx's interrupt pending bits.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void DMA_ClearITPendingBit(void);
|
||||
|
||||
/**
|
||||
* @brief ENABLE or DISABLE intterrupt
|
||||
* @param NewState
|
||||
* @retval None
|
||||
*/
|
||||
void DMA_ITConfig(FunctionalState NewState);
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,72 @@
|
||||
/*
|
||||
File Name : yc_systick.c
|
||||
Author : Yichip
|
||||
Version : V1.0
|
||||
Date : 2018/03/27
|
||||
Description : systick encapsulation.
|
||||
*/
|
||||
|
||||
#include "yc_systick.h"
|
||||
|
||||
tick SystickCount;
|
||||
|
||||
void Systick_Dealy_Ms(uint32_t MS)
|
||||
{
|
||||
uint32_t ReloadValue;
|
||||
|
||||
ReloadValue = MS * 9600;
|
||||
|
||||
*SYSTICK_CSR &= ~(((uint32_t)1) << SYSTICK_CSR_ENABLE);
|
||||
*SYSTICK_RVR = ReloadValue; //Set the reload value
|
||||
*SYSTICK_CVR = 0; //clear the current value
|
||||
*SYSTICK_CSR |= ((SYSTICK_SYSCLOCK << SYSTICK_CSR_CLKSOURCE) | (1 << SYSTICK_CSR_ENABLE));
|
||||
|
||||
while (!(*SYSTICK_CVR == 0));
|
||||
*SYSTICK_RVR = 0;
|
||||
}
|
||||
|
||||
uint32_t SysTick_Config(uint32_t ReloadValue)
|
||||
{
|
||||
ReloadValue -= 1;
|
||||
if (!IS_RELOAD_VALUE(ReloadValue))
|
||||
return 1;
|
||||
|
||||
*SYSTICK_CSR &= ~(((uint32_t)1) << SYSTICK_CSR_ENABLE);
|
||||
|
||||
*SYSTICK_RVR = ReloadValue; //Set the reload value
|
||||
*SYSTICK_CVR = 0; //clear the current value
|
||||
SystickCount = 0; // Reset the overflow counter
|
||||
*SYSTICK_CSR |=
|
||||
((SYSTICK_SYSCLOCK << SYSTICK_CSR_CLKSOURCE) |
|
||||
(1 << SYSTICK_CSR_ENABLE) |
|
||||
(1 << SYSTICK_CSR_TICKINT));
|
||||
return 0;
|
||||
}
|
||||
|
||||
tick SysTick_GetTick()
|
||||
{
|
||||
return SystickCount;
|
||||
}
|
||||
|
||||
Boolean SysTick_IsTimeOut(tick start_tick, int interval)
|
||||
{
|
||||
start_tick = SysTick_GetTick() - start_tick;
|
||||
if (start_tick < 0)
|
||||
start_tick += TICK_MAX_VALUE;
|
||||
if (((start_tick * (*SYSTICK_RVR)) / (CPU_MHZ / 1000)) >= interval)
|
||||
{
|
||||
return TRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
return FALSE;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t SysTick_GetRelativeTime(tick start_tick)
|
||||
{
|
||||
start_tick = SysTick_GetTick() - start_tick;
|
||||
if (start_tick < 0)
|
||||
start_tick += TICK_MAX_VALUE;
|
||||
return ((start_tick * (*SYSTICK_RVR)) / (CPU_MHZ / 1000));
|
||||
}
|
||||
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
File Name : yc_systick.h
|
||||
Author : Yichip
|
||||
Version : V1.0
|
||||
Date : 2018/03/27
|
||||
Description : systick encapsulation.
|
||||
*/
|
||||
|
||||
#ifndef __YC_SYSTICK_H__
|
||||
#define __YC_SYSTICK_H__
|
||||
#include "..\core\yc3121.h"
|
||||
|
||||
#define SYSTICK_SYSCLOCK 1
|
||||
#define SYSTICK_HALF_SYSCLOCK 0
|
||||
|
||||
#define IS_RELOAD_VALUE(x) (x>0&&x<=0xffffff)
|
||||
|
||||
typedef int32_t tick;
|
||||
#define TICK_MAX_VALUE (int32_t)0x7FFFFFFF
|
||||
|
||||
|
||||
void Systick_Dealy_Ms(uint32_t MS);
|
||||
|
||||
/**
|
||||
* @brief Initialize systick and start systick
|
||||
*
|
||||
* @param ReloadValue : the systick reload value
|
||||
*
|
||||
* @retval 0:succeed 1:error
|
||||
*/
|
||||
uint32_t SysTick_Config(uint32_t ReloadValue);
|
||||
|
||||
|
||||
/**
|
||||
* @brief get the current value of SystickCount(SystickCount plus one for every overflow interrupt)
|
||||
*
|
||||
* @param none
|
||||
*
|
||||
* @retval current value of SystickCount
|
||||
*/
|
||||
tick SysTick_GetTick(void);
|
||||
|
||||
/**
|
||||
* @brief Determine whether the timeout that millisecond.
|
||||
*
|
||||
* @param start_tick:start tick
|
||||
*
|
||||
* @param interval:time interval(ms)
|
||||
*
|
||||
* @retval TRUE is timeout ,FALSE is not timeout
|
||||
*/
|
||||
Boolean SysTick_IsTimeOut(tick start_tick,int interval);
|
||||
|
||||
|
||||
/**
|
||||
* @brief get relative time .
|
||||
*
|
||||
* @param start_tick:start tick(start time)
|
||||
*
|
||||
* @retval the relative time(millisecond)
|
||||
*/
|
||||
uint32_t SysTick_GetRelativeTime(tick start_tick);
|
||||
|
||||
#endif /* __YC_SYSTICK_H__ */
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,54 @@
|
||||
#include "yc_wdt.h"
|
||||
|
||||
#define WDT_ENABLE_BIT_Mask 6
|
||||
#define WDT_MODE_BIT_Mask 5
|
||||
#define SYSCTRL_WDT_EN_BIT_Mask 1
|
||||
|
||||
/**************the value of feed dog************/
|
||||
#define COUNTER_RELOAD_KEY 0x5937
|
||||
|
||||
void WDT_SetReload(uint32_t Reload)
|
||||
{
|
||||
uint32_t wdt_config = 0;
|
||||
|
||||
_ASSERT(ISWDTRELOAD(Reload));
|
||||
|
||||
wdt_config = WD_CONFIG;
|
||||
wdt_config &= 0xE0;
|
||||
wdt_config |= Reload;
|
||||
WD_CONFIG = wdt_config;
|
||||
}
|
||||
|
||||
void WDT_ReloadCounter(void)
|
||||
{
|
||||
WD_KICK = COUNTER_RELOAD_KEY;
|
||||
}
|
||||
|
||||
void WDT_Enable(void)
|
||||
{
|
||||
WD_CONFIG |= (1 << WDT_ENABLE_BIT_Mask);
|
||||
}
|
||||
|
||||
void WDT_ModeConfig(WDT_ModeTypeDef WDT_Mode)
|
||||
{
|
||||
WD_CONFIG &= ~(1 << WDT_MODE_BIT_Mask);
|
||||
WD_CONFIG |= (WDT_Mode << WDT_MODE_BIT_Mask);
|
||||
if (WDT_CPUReset == WDT_Mode)
|
||||
{
|
||||
SYSCTRL_RST_EN |= (1 << 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
SYSCTRL_RST_EN &= ~(1 << 1);
|
||||
}
|
||||
}
|
||||
|
||||
ITStatus WDT_GetITStatus(void)
|
||||
{
|
||||
return (ITStatus)(WD_KICK & 1);
|
||||
}
|
||||
|
||||
void WDT_ClearITPendingBit(void)
|
||||
{
|
||||
WD_CLEAR = 1;
|
||||
}
|
||||
@@ -0,0 +1,74 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file yc_wdt.h
|
||||
* @author Yichip
|
||||
* @version V1.0
|
||||
* @date 7-Dec-2019
|
||||
* @brief watchdog encapsulation.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __YC_WDT_H__
|
||||
#define __YC_WDT_H__
|
||||
|
||||
#include "yc3121.h"
|
||||
|
||||
/**
|
||||
* @brief timer number Structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
WDT_CPUReset = 0,
|
||||
WDT_Interrupt,
|
||||
} WDT_ModeTypeDef;
|
||||
|
||||
#define ISWDTRELOAD(load) (load>0&&load<=0x1f)
|
||||
|
||||
/**
|
||||
* @brief Set reload counter
|
||||
* @param Reload: Reload counter equal to 2^reload.
|
||||
* @retval none
|
||||
*/
|
||||
void WDT_SetReload(uint32_t Reload);
|
||||
|
||||
/**
|
||||
* @brief Set WDT mode
|
||||
* @param WDT_Mode : Select the following values :
|
||||
* WDT_CPUReset
|
||||
* WDT_Interrupt.
|
||||
* @retval none
|
||||
* @description If Select WDT_CPUReset Mode,the bit for WDT RESET will be set;if
|
||||
* Select WDT_Interrupt the bit for WDT RESET will
|
||||
*/
|
||||
void WDT_ModeConfig(WDT_ModeTypeDef WDT_Mode);
|
||||
|
||||
/**
|
||||
* @brief Get interrupt Status
|
||||
* @param none
|
||||
* @retval SET:interrupt ocuured.
|
||||
*/
|
||||
ITStatus WDT_GetITStatus(void);
|
||||
|
||||
/**
|
||||
* @brief Clear interrupt
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void WDT_ClearITPendingBit(void);
|
||||
|
||||
/**
|
||||
* @brief Enable WDT
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void WDT_Enable(void);
|
||||
|
||||
/**
|
||||
* @brief Feed the watchdog function
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void WDT_ReloadCounter(void);
|
||||
|
||||
#endif /*__YC_WDT_H__*/
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,175 @@
|
||||
Stack_Size EQU 0x0000100
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=4
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x30000
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=4
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
IMPORT systick
|
||||
IMPORT irq0
|
||||
IMPORT irq1
|
||||
IMPORT irq2
|
||||
IMPORT irq3
|
||||
IMPORT irq4
|
||||
IMPORT irq5
|
||||
IMPORT irq6
|
||||
IMPORT irq7
|
||||
IMPORT irq8
|
||||
IMPORT irq9
|
||||
IMPORT irq10
|
||||
IMPORT irq11
|
||||
IMPORT irq12
|
||||
IMPORT irq13
|
||||
IMPORT irq14
|
||||
IMPORT irq15
|
||||
IMPORT irq16
|
||||
IMPORT irq17
|
||||
IMPORT irq18
|
||||
IMPORT irq19
|
||||
IMPORT irq20
|
||||
IMPORT irq21
|
||||
IMPORT irq22
|
||||
IMPORT irq23
|
||||
IMPORT irq24
|
||||
IMPORT irq25
|
||||
IMPORT irq26
|
||||
IMPORT irq27
|
||||
IMPORT irq28
|
||||
IMPORT irq29
|
||||
IMPORT irq30
|
||||
IMPORT irq31
|
||||
IMPORT hard_fault_handler
|
||||
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD reset_handler ; Reset Handler
|
||||
DCD nmi_handler ; NMI Handler
|
||||
DCD hard_fault_handler ; Hard Fault Handler
|
||||
DCD 0 ;
|
||||
DCD 0 ;
|
||||
DCD 0 ;
|
||||
DCD 0 ;
|
||||
DCD 0 ;
|
||||
DCD 0 ;
|
||||
DCD 0 ;
|
||||
DCD 0 ;
|
||||
DCD 0 ;
|
||||
DCD 0 ;
|
||||
DCD 0 ;
|
||||
DCD systick ;
|
||||
DCD irq0 ;
|
||||
DCD irq1 ;
|
||||
DCD irq2 ;
|
||||
DCD irq3 ;
|
||||
DCD irq4 ;
|
||||
DCD irq5 ;
|
||||
DCD irq6 ;
|
||||
DCD irq7 ;
|
||||
DCD irq8 ;
|
||||
DCD irq9 ;
|
||||
DCD irq10 ;
|
||||
DCD irq11 ;
|
||||
DCD irq12 ;
|
||||
DCD irq13 ;
|
||||
DCD irq14 ;
|
||||
DCD irq15 ;
|
||||
DCD irq16 ;
|
||||
DCD irq17 ;
|
||||
DCD irq18 ;
|
||||
DCD irq19 ;
|
||||
DCD irq20 ;
|
||||
DCD irq21 ;
|
||||
DCD irq22 ;
|
||||
DCD irq23 ;
|
||||
DCD irq24 ;
|
||||
DCD irq25 ;
|
||||
DCD irq26 ;
|
||||
DCD irq27 ;
|
||||
DCD irq28 ;
|
||||
DCD irq29 ;
|
||||
DCD irq30 ;
|
||||
DCD irq31 ;
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY ,ALIGN=4
|
||||
|
||||
|
||||
|
||||
; Reset Handler
|
||||
|
||||
reset_handler PROC
|
||||
EXPORT reset_handler [WEAK]
|
||||
IMPORT Reset_Handler
|
||||
; bl Reset_Handler
|
||||
; movs r0,#0x3
|
||||
|
||||
LDR R0, =Reset_Handler
|
||||
BX R0
|
||||
nop
|
||||
ENDP
|
||||
|
||||
|
||||
|
||||
delay PROC
|
||||
EXPORT delay
|
||||
subs r0,#1
|
||||
bne delay
|
||||
nop
|
||||
bx lr
|
||||
ENDP
|
||||
|
||||
nmi_handler PROC
|
||||
EXPORT nmi_handler [WEAK]
|
||||
b nmi_handler
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
AREA |.INIT_STACK_HEAP|, CODE,READONLY,ALIGN=4
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap PROC
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = __initial_sp
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
@@ -0,0 +1,42 @@
|
||||
# YC3121-pos 板级支持包 说明
|
||||
|
||||
标签： YICHIP、Cortex-M0、YC3121、国产MCU
|
||||
|
||||
---
|
||||
|
||||
## 1. 简介
|
||||
|
||||
本文档为 YC3121-pos 的 BSP(板级支持包) 说明。
|
||||
|
||||
通过阅读本文档，开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
|
||||
|
||||
### 1.1 开发板介绍
|
||||
|
||||
YC3121-pos 开发板由易兆微提供，可满足基础测试及高端开发需求。
|
||||
|
||||
开发板外观如下图所示：
|
||||
|
||||
YC3121-pos
|
||||
|
||||
|
||||
|
||||
YC3121-pos 开发板板载资源如下：
|
||||
|
||||
- MCU：YC3121 ARM 32-bit Cortex-M0，主频 96MHz，512KB FLASH ，64KB SRAM
|
||||
- 常用外设
|
||||
- LED：4 个
|
||||
- 梯形矩阵键盘
|
||||
- 蜂鸣器
|
||||
- USB
|
||||
- UART
|
||||
- SPI LCD
|
||||
- SPI NFC
|
||||
- 7816接口 （接触IC卡，支持3V , 1.8V）
|
||||
- 7811接口 （三轨磁条卡解码模块，支持ISO/ABA AAMVA 及IBM等标准卡）
|
||||
- TIMER：9个32bi位 （支持PWM）
|
||||
- TRNG：（1个真随机数发生器）
|
||||
- 安全加密算法
|
||||
- 对称算法：对称算法：DES、TDES、AES-128/192/256、国密IV（SM4）
|
||||
- 非对称算法：RSA-1024/2048、国密II（SM2）、ECC
|
||||
- HASH 校验算法：SHA-1/224/256/384/512、国密III（SM3）
|
||||
- 调试接口：SWD / ICE
|
||||
@@ -0,0 +1,11 @@
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
Return('objs')
|
||||
@@ -0,0 +1,40 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -0,0 +1,9 @@
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
CPPPATH = [cwd, str(Dir('#'))]
|
||||
src = Glob('*.c')
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,31 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
/* defined the LED pin: PA12 */
|
||||
#define LED_PIN 2
|
||||
|
||||
int main(void)
|
||||
{
|
||||
int count = 1;
|
||||
/* set LED4 pin mode to output */
|
||||
rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
while (count++)
|
||||
{
|
||||
rt_pin_write(LED_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
@@ -0,0 +1,22 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
menu "UART Drivers"
|
||||
config BSP_USING_UART0
|
||||
bool "Enable UART0 PA2/3(R/T)"
|
||||
select RT_USING_SERIAL
|
||||
default y
|
||||
|
||||
config BSP_USING_UART1
|
||||
bool "Enable UART1 PC2/3(R/T)"
|
||||
select RT_USING_SERIAL
|
||||
default n
|
||||
endmenu
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
@@ -0,0 +1,25 @@
|
||||
# RT-Thread building script for component
|
||||
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add the general drivers.
|
||||
src = Split("""
|
||||
board.c
|
||||
""")
|
||||
|
||||
# add gpio driver code
|
||||
if GetDepend(['BSP_USING_GPIO']):
|
||||
src += ['drv_gpio.c']
|
||||
|
||||
# add serial driver code
|
||||
if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1') or GetDepend('BSP_USING_UART2') or GetDepend('BSP_USING_UART3'):
|
||||
src += ['drv_uart.c']
|
||||
|
||||
|
||||
CPPPATH = [cwd]
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,57 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
#if defined(BSP_USING_EXT_SRAM) && defined(RT_USING_MEMHEAP_AS_HEAP)
|
||||
static struct rt_memheap system_heap;
|
||||
#endif
|
||||
#define SystemCoreClock (48000000)
|
||||
|
||||
static void bsp_clock_config(void)
|
||||
{
|
||||
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
}
|
||||
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
#ifdef RT_USING_SERIAL
|
||||
extern int rt_hw_uart_init(void);
|
||||
#endif
|
||||
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
bsp_clock_config();
|
||||
|
||||
#if defined(RT_USING_HEAP)
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
|
||||
/* UART driver initialization is open by default */
|
||||
#ifdef RT_USING_SERIAL
|
||||
rt_hw_uart_init();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
@@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H__
|
||||
#define BOARD_H__
|
||||
#include <rtthread.h>
|
||||
#include <yc3121.h>
|
||||
#include "yc_gpio.h"
|
||||
#include "yc_uart.h"
|
||||
#include "yc_systick.h"
|
||||
#include "misc.h"
|
||||
|
||||
#define SRAM_BASE 0x20000
|
||||
#define SRAM_SIZE 0x10000
|
||||
|
||||
#ifdef BSP_USING_EXT_SRAM
|
||||
#define EXT_SRAM_BASE SRAMM_BASE
|
||||
#define EXT_SRAM_SIZE BSP_EXT_SRAM_SIZE
|
||||
#define EXT_SRAM_BEGIN EXT_SRAM_BASE
|
||||
#define EXT_SRAM_END (EXT_SRAM_BASE + EXT_SRAM_SIZE)
|
||||
#endif
|
||||
|
||||
#define SRAM_END (SRAM_BASE + SRAM_SIZE)
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section = "HEAP"
|
||||
#define HEAP_BEGIN (__segment_end("HEAP"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
#define HEAP_END SRAM_END
|
||||
#define HEAP_SIZE (HEAP_END - (rt_uint32_t)HEAP_BEGIN)
|
||||
extern void rt_hw_board_init(void);
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_GPIO_H__
|
||||
#define DRV_GPIO_H__
|
||||
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,193 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
|
||||
struct yc3121_uart
|
||||
{
|
||||
UART_TypeDef uart;
|
||||
IRQn_Type irq;
|
||||
};
|
||||
|
||||
static rt_err_t yc3121_uart_configure(struct rt_serial_device *serial,
|
||||
struct serial_configure *cfg)
|
||||
{
|
||||
struct yc3121_uart *uart;
|
||||
UART_InitTypeDef UART_initStruct;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
RT_ASSERT(cfg != RT_NULL);
|
||||
uart = (struct yc3121_uart *)serial->parent.user_data;
|
||||
NVIC_DisableIRQ(uart->irq);
|
||||
UART_initStruct.BaudRate = cfg->baud_rate;
|
||||
UART_initStruct.FlowCtrl = FlowCtrl_None ;
|
||||
UART_initStruct.Mode = Mode_duplex;
|
||||
|
||||
switch (cfg->data_bits)
|
||||
{
|
||||
case DATA_BITS_9:
|
||||
UART_initStruct.DataBits = Databits_9b;
|
||||
break;
|
||||
default:
|
||||
UART_initStruct.DataBits = Databits_8b;
|
||||
break;
|
||||
}
|
||||
switch (cfg->stop_bits)
|
||||
{
|
||||
case STOP_BITS_2:
|
||||
UART_initStruct.StopBits = StopBits_2;
|
||||
break;
|
||||
default:
|
||||
UART_initStruct.StopBits = StopBits_1;
|
||||
break;
|
||||
}
|
||||
switch (cfg->parity)
|
||||
{
|
||||
case PARITY_ODD:
|
||||
UART_initStruct.Parity = Parity_Odd;
|
||||
break;
|
||||
case PARITY_EVEN:
|
||||
UART_initStruct.Parity = Parity_Even;
|
||||
break;
|
||||
default:
|
||||
UART_initStruct.Parity = Parity_None;
|
||||
break;
|
||||
}
|
||||
UART_Init(uart->uart, &UART_initStruct);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t yc3121_uart_control(struct rt_serial_device *serial,
|
||||
int cmd, void *arg)
|
||||
{
|
||||
struct yc3121_uart *uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct yc3121_uart *)serial->parent.user_data;
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_CLR_INT:
|
||||
/* disable rx irq */
|
||||
UART_SetRxITNum(uart->uart, 0);
|
||||
NVIC_DisableIRQ(uart->irq);
|
||||
break;
|
||||
case RT_DEVICE_CTRL_SET_INT:
|
||||
/* enable rx irq */
|
||||
UART_SetRxITNum(uart->uart, 1);
|
||||
UART_ITConfig(uart->uart, UART_IT_RX, ENABLE);
|
||||
NVIC_EnableIRQ(uart->irq);
|
||||
break;
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static int yc3121_uart_putc(struct rt_serial_device *serial, char c)
|
||||
{
|
||||
struct yc3121_uart *uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct yc3121_uart *)serial->parent.user_data;
|
||||
while (UART_IsUARTBusy(uart->uart));
|
||||
UART_SendData(uart->uart, c);
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int yc3121_uart_getc(struct rt_serial_device *serial)
|
||||
{
|
||||
int ch;
|
||||
struct yc3121_uart *uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct yc3121_uart *)serial->parent.user_data;
|
||||
ch = -1;
|
||||
if (UART_ReceiveDataLen(uart->uart) != 0)
|
||||
{
|
||||
ch = UART_ReceiveData(uart->uart);
|
||||
}
|
||||
return ch;
|
||||
}
|
||||
|
||||
static const struct rt_uart_ops yc3121_uart_ops =
|
||||
{
|
||||
yc3121_uart_configure,
|
||||
yc3121_uart_control,
|
||||
yc3121_uart_putc,
|
||||
yc3121_uart_getc,
|
||||
};
|
||||
|
||||
#if defined(BSP_USING_UART0)
|
||||
/* UART0 device driver structure */
|
||||
static struct yc3121_uart uart0;
|
||||
static struct rt_serial_device serial0;
|
||||
void UART0_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
/* UART in mode Receiver */
|
||||
if (UART_GetITIdentity(uart0.uart) == UART_IT_RX)
|
||||
{
|
||||
rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif /* BSP_USING_UART0 */
|
||||
|
||||
#if defined(BSP_USING_UART1)
|
||||
/* UART1 device driver structure */
|
||||
static struct yc3121_uart uart1;
|
||||
static struct rt_serial_device serial1;
|
||||
void UART1_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
/* UART in mode Receiver */
|
||||
if (UART_GetITIdentity(uart1.uart) == UART_IT_RX)
|
||||
{
|
||||
rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif /* BSP_USING_UART1 */
|
||||
|
||||
int rt_hw_uart_init(void)
|
||||
{
|
||||
struct yc3121_uart *uart;
|
||||
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||||
#ifdef BSP_USING_UART0
|
||||
|
||||
GPIO_CONFIG(1) = UART0_TXD;
|
||||
GPIO_CONFIG(0) = UART0_RXD;
|
||||
uart = &uart0;
|
||||
uart->uart = UART0;
|
||||
uart->irq = UART0_IRQn;
|
||||
serial0.ops = &yc3121_uart_ops;
|
||||
serial0.config = config;
|
||||
/* register UART0 device */
|
||||
rt_hw_serial_register(&serial0, RT_CONSOLE_DEVICE_NAME,
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
uart);
|
||||
#endif /* BSP_USING_UART0 */
|
||||
#ifdef BSP_USING_UART1
|
||||
GPIO_CONFIG(1) = UART1_TXD;
|
||||
GPIO_CONFIG(0) = UART1_RXD;
|
||||
uart = &uart1;
|
||||
uart->uart = UART1;
|
||||
uart->irq = UART1_IRQn;
|
||||
serial1.ops = &yc3121_uart_ops;
|
||||
serial1.config = config;
|
||||
/* register UART1 device */
|
||||
rt_hw_serial_register(&serial1, "uart1",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
uart);
|
||||
#endif /* BSP_USING_UART1 */
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_UART_H__
|
||||
#define DRV_UART_H__
|
||||
|
||||
int rt_hw_uart_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,32 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x1000200;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x1000200;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x1ffffff;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0xF800;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x800;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,161 @@
|
||||
/* Linker script to configure memory regions.
|
||||
* Need modifying for a specific board.
|
||||
* FLASH.ORIGIN: starting address of flash
|
||||
* FLASH.LENGTH: length of flash
|
||||
* RAM.ORIGIN: starting address of RAM bank 0
|
||||
* RAM.LENGTH: length of RAM bank 0
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x1000000, LENGTH = 0x80000 /* 512K */
|
||||
RAM (rwx) : ORIGIN = 0x20000, LENGTH = 0x10000 /* 64K */
|
||||
}
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __copy_table_start__
|
||||
* __copy_table_end__
|
||||
* __zero_table_start__
|
||||
* __zero_table_end__
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
*flash_start*.o
|
||||
*(.text*)
|
||||
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
KEEP(*(.eh_frame*))
|
||||
} > FLASH
|
||||
|
||||
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
|
||||
. = ALIGN(4);
|
||||
__exidx_start = .;
|
||||
|
||||
__etext = .;
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
} > RAM
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__end__ = .;
|
||||
PROVIDE(end = .);
|
||||
*(.heap*)
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
*(.stack*)
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
@@ -0,0 +1,32 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x00000000 0x0007fff { ; load region size_region
|
||||
ER_IROM1 0x00000000 0x00007fff { ; load address = execution address
|
||||
startup.o (RESET, +First)
|
||||
; startup.o (.text,+RO)
|
||||
; *(InRoot$$Sections)
|
||||
}
|
||||
}
|
||||
|
||||
LR_IROM3 0x1000200 0x200{
|
||||
ER_IROM3 0x1000200 {
|
||||
flash_start.o (|.flash_start|,+RO)
|
||||
}
|
||||
ER_IROM3_1 0x1000340 {
|
||||
startup.o (|.INIT_STACK_HEAP|,+RO)
|
||||
}
|
||||
}
|
||||
|
||||
LR_IROM4 0x1000400 0x1000000{
|
||||
ER_IROM4 0x1000400 {
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
RW_IRAM1 0x00020000 0x010000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 240 KiB |
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\project.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,178 @@
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_DEBUG
|
||||
#define RT_DEBUG_COLOR
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart0"
|
||||
#define RT_VER_NUM 0x40004
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define RT_USING_FINSH
|
||||
#define RT_USING_MSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_LIBC_USING_TIME
|
||||
#define RT_LIBC_DEFAULT_TIMEZONE 8
|
||||
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
||||
|
||||
/* Network interface device */
|
||||
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
|
||||
/* AT commands */
|
||||
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
#define SOC_SWM320VET7
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
|
||||
/* UART Drivers */
|
||||
|
||||
#define BSP_USING_UART0
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,152 @@
|
||||
# BSP Note: For TI EK-TM4C1294XL Tiva C Series Connected LancuhPad (REV D)
|
||||
|
||||
import os
|
||||
import sys
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m0'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# device options
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = 'C:\gcc-arm-none-eabi-7-2018-q2-update-win32'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
EXEC_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.2'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T drivers/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M0 '
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "drivers\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf.exe --text -a -c --output=@L_asm.txt "!L" \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M0'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=None'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M0'
|
||||
AFLAGS += ' --fpu None'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "drivers/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\template.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
@@ -0,0 +1,184 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>25000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<Books>
|
||||
<Book>
|
||||
<Number>0</Number>
|
||||
<Title>Datasheet</Title>
|
||||
<Path>DATASHTS\ST\STM32F4xx\DM00053488.pdf</Path>
|
||||
</Book>
|
||||
<Book>
|
||||
<Number>1</Number>
|
||||
<Title>Reference Manual</Title>
|
||||
<Path>DATASHTS\ST\STM32F4xx\DM00031020.pdf</Path>
|
||||
</Book>
|
||||
<Book>
|
||||
<Number>2</Number>
|
||||
<Title>Technical Reference Manual</Title>
|
||||
<Path>datashts\arm\cortex_m4\r0p1\DDI0439C_CORTEX_M4_R0P1_TRM.PDF</Path>
|
||||
</Book>
|
||||
<Book>
|
||||
<Number>3</Number>
|
||||
<Title>Generic User Guide</Title>
|
||||
<Path>datashts\arm\cortex_m4\r0p1\DUI0553A_CORTEX_M4_DGUG.PDF</Path>
|
||||
</Book>
|
||||
</Books>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>0</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<tPdscDbg>0</tPdscDbg>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>6</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U20090928 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-O207 -S0 -C0 -FO7 -FN1 -FC800 -FD20000000 -FF0STM32F4xx_1024 -FL0100000 -FS08000000</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
@@ -0,0 +1,177 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>7</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>4</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U788594195 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO31 -FD20000 -FCA000 -FN0</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
File diff suppressed because it is too large.
Load diff
Reference in new issue
Block a user