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Merge remote-tracking branch 'remotes/gitee/master' into gitee_master

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This commit is contained in:
aozima
2020-10-09 15:17:27 +08:00
parent 79fd12842b aeff91b2a7
commit 05777266b9
1119 changed files with 72124 additions and 329178 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.travis.yml
+4 -3
View File
@@ -66,8 +66,8 @@ env:
# - RTT_BSP='mini4020' # no scons
# - RTT_BSP='mm32l07x' # not support gcc
# - RTT_BSP='nios_ii' # no scons
- RTT_BSP='nuvoton_nuc472' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='nuvoton_m05x' RTT_TOOL_CHAIN='sourcery-arm'
# - RTT_BSP='nuvoton_nuc472' RTT_TOOL_CHAIN='sourcery-arm'
# - RTT_BSP='nuvoton_m05x' RTT_TOOL_CHAIN='sourcery-arm'
# - RTT_BSP='pic32ethernet' # no scons
- RTT_BSP='qemu-vexpress-a9' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='qemu-vexpress-gemini' RTT_TOOL_CHAIN='sourcery-arm'
@@ -123,6 +123,7 @@ env:
- RTT_BSP='stm32/stm32l496-ali-developer' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='stm32/stm32l496-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='stm32/stm32mp157a-st-discovery' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='stm32/stm32mp157a-st-ev1' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='stm32f20x' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='swm320-lq100' RTT_TOOL_CHAIN='sourcery-arm'
# - RTT_BSP='taihu' RTT_TOOL_CHAIN='sourcery-ppc'
@@ -132,7 +133,7 @@ env:
- RTT_BSP='zynq7000' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='frdm-k64f' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='fh8620' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='x1000' RTT_TOOL_CHAIN='sourcery-mips'
# - RTT_BSP='x1000' RTT_TOOL_CHAIN='sourcery-mips'
- RTT_BSP='xplorer4330/M4' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='at32/at32f403a-start' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='at32/at32f407-start' RTT_TOOL_CHAIN='sourcery-arm'
bsp/allwinner_tina/drivers/drv_gpio.c
+1
View File
@@ -538,6 +538,7 @@ static const struct rt_pin_ops ops =
pin_attach_irq,
pin_detach_irq,
pin_irq_enable,
RT_NULL,
};
#endif
bsp/apollo2/board/gpio.c
+1
View File
@@ -212,6 +212,7 @@ const static struct rt_pin_ops am_pin_ops =
am_pin_attach_irq,
am_pin_dettach_irq,
am_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)
bsp/at32/Libraries/rt_drivers/drv_eth.c
+44
View File
@@ -31,6 +31,9 @@
#define ETH_RXBUFNB 4
#define ETH_TXBUFNB 2
#define LINK_THREAD_STACK_SIZE 256
#define LINK_THREAD_PREORITY 21
extern ETH_DMADESCTypeDef *DMATxDescToSet;
extern ETH_DMADESCTypeDef *DMARxDescToGet;
extern ETH_DMADESCTypeDef *DMAPTPTxDescToSet;
@@ -38,6 +41,8 @@ extern ETH_DMADESCTypeDef *DMAPTPRxDescToGet;
static ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB];
static rt_uint8_t Rx_Buff[ETH_RXBUFNB][ETH_MAX_PACKET_SIZE], Tx_Buff[ETH_TXBUFNB][ETH_MAX_PACKET_SIZE];
static struct rt_thread eth_link_thread;
static rt_uint8_t eth_link_stack[LINK_THREAD_STACK_SIZE];
#define MAX_ADDR_LEN 6
/* Gloable variables ---------------------------------------------------------*/
@@ -634,6 +639,37 @@ struct pbuf *rt_at32_eth_rx(rt_device_t dev)
return p;
}
static void eth_link_thread_entry(void *paramter)
{
uint8_t linked_down = 1;
struct netif *pnetif = at32_eth_device.parent.netif;
while(1){
if((ETH_ReadPHYRegister(PHY_ADDRESS, PHY_BSR) & PHY_Linked_Status) && (linked_down == 1))
{
/* link up */
linked_down = 0;
#ifndef RT_LWIP_DHCP
pnetif->ip_addr = inet_addr(RT_LWIP_IPADDR);
pnetif->gw = inet_addr(RT_LWIP_GWADDR);
pnetif->netmask = inet_addr(RT_LWIP_MSKADDR);
#else
IP4_ADDR(&(pnetif->ip_addr), 0, 0, 0, 0);
IP4_ADDR(&(pnetif->netmask), 0, 0, 0, 0);
IP4_ADDR(&(pnetif->gw), 0, 0, 0, 0);
#endif
eth_device_linkchange(&(at32_eth_device.parent), RT_TRUE);
}else if(!(ETH_ReadPHYRegister(PHY_ADDRESS, PHY_BSR) & PHY_Linked_Status) && (linked_down == 0))
{
/* link down */
linked_down = 1;
eth_device_linkchange(&(at32_eth_device.parent), RT_FALSE);
}
rt_thread_mdelay(500);
}
}
/* interrupt service routine */
void ETH_IRQHandler(void)
{
@@ -707,9 +743,17 @@ static int rt_hw_at32_eth_init(void)
/* register eth device */
state = eth_device_init(&(at32_eth_device.parent), "e0");
if (RT_EOK == state)
{
LOG_D("emac device init success");
state = rt_thread_init(&eth_link_thread, "eth_link_detect", eth_link_thread_entry, RT_NULL,
&eth_link_stack[0], LINK_THREAD_STACK_SIZE, LINK_THREAD_PREORITY, 20);
if (state == RT_EOK)
{
rt_thread_startup(&eth_link_thread);
}
}
else
{
bsp/at32/Libraries/rt_drivers/drv_gpio.c
+1
View File
@@ -496,6 +496,7 @@ const static struct rt_pin_ops _at32_pin_ops =
at32_pin_attach_irq,
at32_pin_dettach_irq,
at32_pin_irq_enable,
RT_NULL,
};
rt_inline void pin_irq_hdr(int irqno)
bsp/beaglebone/drivers/gpio.c
+4
View File
@@ -84,6 +84,10 @@ static struct rt_pin_ops am33xx_pin_ops =
am33xx_pin_mode,
am33xx_pin_write,
am33xx_pin_read,
RT_NULL,
RT_NULL,
RT_NULL,
RT_NULL,
};
int rt_hw_gpio_init(void)
bsp/efm32/rtconfig.h
+1
View File
@@ -213,6 +213,7 @@
/* SECTION: Runtime library */
// #define RT_USING_NOLIBC
// #define RT_USING_NEWLIB
#define RT_LIBC_USING_TIME
/* SECTION: Console options */
#define RT_USING_CONSOLE
bsp/essemi/es32f0271/drivers/drv_gpio.c
+1
View File
@@ -450,6 +450,7 @@ const static struct rt_pin_ops _es32f0_pin_ops =
es32f0_pin_attach_irq,
es32f0_pin_detach_irq,
es32f0_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)
bsp/essemi/es32f0334/drivers/drv_gpio.c
+1
View File
@@ -408,6 +408,7 @@ const static struct rt_pin_ops _es32f0_pin_ops =
es32f0_pin_attach_irq,
es32f0_pin_detach_irq,
es32f0_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)
bsp/essemi/es32f0654/drivers/drv_gpio.c
+1
View File
@@ -408,6 +408,7 @@ const static struct rt_pin_ops _es32f0_pin_ops =
es32f0_pin_attach_irq,
es32f0_pin_detach_irq,
es32f0_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)
bsp/essemi/es32f369x/.config
+71 -6
View File
@@ -64,7 +64,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_VER_NUM=0x40002
CONFIG_RT_VER_NUM=0x40003
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
@@ -114,12 +114,10 @@ CONFIG_RT_PIPE_BUFSZ=512
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
CONFIG_RT_USING_CAN=y
# CONFIG_RT_CAN_USING_HDR is not set
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
CONFIG_RT_USING_I2C=y
# CONFIG_RT_USING_I2C_BITOPS is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
@@ -194,11 +192,15 @@ CONFIG_RT_USING_PIN=y
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
@@ -225,6 +227,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
@@ -237,9 +240,10 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
@@ -256,6 +260,11 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PDULIB is not set
#
# security packages
@@ -263,6 +272,8 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
@@ -297,6 +308,9 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
#
# system packages
@@ -307,6 +321,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
@@ -317,6 +332,12 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
#
# peripheral libraries and drivers
@@ -333,6 +354,10 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
@@ -350,6 +375,21 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
# CONFIG_PKG_USING_MAX7219 is not set
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
#
# miscellaneous packages
@@ -386,6 +426,9 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
CONFIG_SOC_ES32F3696LT=y
#
@@ -425,6 +468,28 @@ CONFIG_BSP_USING_UART0=y
#
# CONFIG_BSP_USING_CAN is not set
#
# ADC Drivers
#
# CONFIG_BSP_USING_ADC is not set
#
# RTC Drivers
#
# CONFIG_BSP_USING_RTC is not set
#
# HWtimer Drivers
#
# CONFIG_BSP_USING_HWTIMER0 is not set
# CONFIG_BSP_USING_HWTIMER1 is not set
#
# PWM Drivers
#
# CONFIG_BSP_USING_PWM0 is not set
# CONFIG_BSP_USING_PWM1 is not set
#
# Onboard Peripheral Drivers
#
bsp/essemi/es32f369x/README.md
+16 -12
View File
@@ -13,9 +13,9 @@ ES-PDS-ES32F369x 是东软载波微电子官方推出的一款基于 ARM Cortex-
开发板外观如下图所示：
ES-PDS-ES32F369x-V1.2
ES-PDS-ES32F369x-V1.3
![ES32F0654](figures/ES-PDS-ES32F369x-V1.2.jpg)
![ES32F0654](figures/ES-PDS-ES32F369x-V1.3.jpg)
该开发板常用 **板载资源** 如下：
@@ -32,15 +32,19 @@ ES-PDS-ES32F369x-V1.2
本 BSP 目前对外设的支持情况如下：
| **板载外设** | **支持情况** | **备注** |
| :----------- | :----------: | :--------------- |
| SPI FLASH | 支持 | SPI0 |
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | 50 GPIOs |
| UART | 支持 | UART0/1/2/3/4/5 |
| SPI | 支持 | SPI0/1/2 |
| I2C | 支持 | I2C0/1 |
| CAN | 支持 | CAN0 |
| **板载外设** | **支持情况** | **备注** |
| :----------- | :----------: | :-------------- |
| SPI FLASH | 支持 | SPI0 |
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | 50 GPIOs |
| UART | 支持 | UART0/1/2/3/4/5 |
| SPI | 支持 | SPI0/1/2 |
| I2C | 支持 | I2C0/1 |
| CAN | 支持 | CAN0 |
| PWM | 支持 | PWM0/1 |
| TIMER | 支持 | TIMER0/1 |
| RTC | 支持 | RTC |
| ADC | 支持 | ADC0 |
### 1.2 注意事项
@@ -56,7 +60,7 @@ ES-PDS-ES32F369x-V1.2
使用ESlinkⅡ(mini)连接开发板如下图所示：
ESLinkⅡ(mini) + ES-PDS-ES32F369x-V1.2
ESLinkⅡ(mini) + ES-PDS-ES32F369x-V1.3
![ESLinkII](figures/ESLinkII-mini.jpg)
bsp/essemi/es32f369x/drivers/Kconfig
+48 -5
View File
@@ -21,25 +21,25 @@ menu "Hardware Drivers Config"
bool "Enable UART2 PC12/PD02(T/R)"
select RT_USING_SERIAL
default y
depends on !BSP_USING_HWTIMER1
config BSP_USING_UART3
bool "Enable UART3 PC04/PC05(T/R)"
select RT_USING_SERIAL
default n
depends on !BSP_USING_HWTIMER2
depends on !BSP_USING_SPI2
config BSP_USING_UART4
bool "Enable UART4 PB06/PB07(T/R)"
select RT_USING_SERIAL
default n
depends on !BSP_USING_I2C0
depends on !BSP_USING_PWM0
config BSP_USING_UART5
bool "Enable UART5 PB09/PB08(T/R)"
select RT_USING_SERIAL
default n
depends on !BSP_USING_PWM0
endmenu
menu "SPI Drivers"
@@ -60,16 +60,18 @@ menu "Hardware Drivers Config"
select RT_USING_SPI
select RT_USING_PIN
default n
depends on !BSP_USING_UART3
endmenu
menu "I2C Drivers"
config BSP_USING_I2C0
bool "Enable I2C0 BUS PB08/PB09(SCL/SDA)"
bool "Enable I2C0 BUS PB06/PB07(SCL/SDA)"
select RT_USING_I2C
default n
depends on !BSP_USING_PWM0
config BSP_USING_I2C1
bool "Enable I2C1 BUS PB10/PB11(SCL/SDA)"
bool "Enable I2C1 BUS PA05/PA06(SCL/SDA)"
select RT_USING_I2C
default n
endmenu
@@ -80,6 +82,47 @@ menu "Hardware Drivers Config"
select RT_USING_CAN
default n
endmenu
menu "ADC Drivers"
config BSP_USING_ADC
bool "Using ADC"
select RT_USING_ADC
default n
endmenu
menu "RTC Drivers"
config BSP_USING_RTC
bool "Using RTC"
select RT_USING_RTC
default n
endmenu
menu "HWtimer Drivers"
config BSP_USING_HWTIMER0
bool "Using timer0"
select RT_USING_HWTIMER
default n
config BSP_USING_HWTIMER1
bool "Using timer1"
select RT_USING_HWTIMER
default n
endmenu
menu "PWM Drivers"
config BSP_USING_PWM0
bool "Using PWM0 PB06/PB07/PB08/PB09"
select RT_USING_PWM
default n
depends on !BSP_USING_CAN
depends on !BSP_USING_I2C0
config BSP_USING_PWM1
bool "Using PWM1 PA00/PA01/PA02/PA03"
select RT_USING_PWM
default n
endmenu
endmenu
menu "Onboard Peripheral Drivers"
bsp/essemi/es32f369x/drivers/SConscript
+16
View File
@@ -28,6 +28,22 @@ if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1'):
if GetDepend('BSP_USING_CAN'):
src += ['drv_can.c']
# add adc driver code
if GetDepend(['BSP_USING_ADC']):
src += ['drv_adc.c']
# add rtc driver code
if GetDepend(['BSP_USING_RTC']):
src += ['drv_rtc.c']
# add hwtimer driver code
if GetDepend('BSP_USING_HWTIMER0') or GetDepend('BSP_USING_HWTIMER1'):
src += ['drv_hwtimer.c']
# add pwm driver code
if GetDepend('BSP_USING_PWM0') or GetDepend('BSP_USING_PWM1'):
src += ['drv_pwm.c']
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
bsp/essemi/es32f369x/drivers/board.h
+1 -1
View File
@@ -14,7 +14,7 @@
#include <es32f36xx.h>
#define ES32F3_SRAM_SIZE 0x80000
#define ES32F3_SRAM_SIZE 0x18000
#define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM)
bsp/essemi/es32f369x/drivers/drv_adc.c
+194
View File
@@ -0,0 +1,194 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-03 wangyq the first version
* 2019-11-01 wangyq update libraries
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include "board.h"
#include "drv_adc.h"
#include <ald_gpio.h>
#include <ald_adc.h>
#ifdef RT_USING_ADC
/* define adc instance */
static struct rt_adc_device _device_adc0;
/* enable or disable adc */
static rt_err_t es32f3_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
{
adc_handle_t *_hadc = (adc_handle_t *)device->parent.user_data;
RT_ASSERT(device != RT_NULL);
if (enabled)
{
ADC_ENABLE(_hadc); ;
}
else
{
ADC_DISABLE(_hadc);
}
return RT_EOK;
}
static adc_channel_t es32f3_adc_get_channel(rt_uint32_t channel)
{
adc_channel_t es32f3_channel;
gpio_init_t gpio_initstruct;
/* Initialize ADC pin */
gpio_initstruct.mode = GPIO_MODE_INPUT;
gpio_initstruct.pupd = GPIO_FLOATING;
gpio_initstruct.podrv = GPIO_OUT_DRIVE_1;
gpio_initstruct.nodrv = GPIO_OUT_DRIVE_1;
gpio_initstruct.flt = GPIO_FILTER_DISABLE;
gpio_initstruct.type = GPIO_TYPE_CMOS;
gpio_initstruct.func = GPIO_FUNC_0;
/* select gpio pin as adc function */
switch (channel)
{
case 0:
es32f3_channel = ADC_CHANNEL_0;
ald_gpio_init(GPIOC, GPIO_PIN_0, &gpio_initstruct);
break;
case 1:
es32f3_channel = ADC_CHANNEL_1;
ald_gpio_init(GPIOC, GPIO_PIN_1, &gpio_initstruct);
break;
case 2:
es32f3_channel = ADC_CHANNEL_2;
ald_gpio_init(GPIOC, GPIO_PIN_2, &gpio_initstruct);
break;
case 3:
es32f3_channel = ADC_CHANNEL_3;
ald_gpio_init(GPIOC, GPIO_PIN_3, &gpio_initstruct);
break;
case 4:
es32f3_channel = ADC_CHANNEL_4;
ald_gpio_init(GPIOA, GPIO_PIN_0, &gpio_initstruct);
break;
case 5:
es32f3_channel = ADC_CHANNEL_5;
ald_gpio_init(GPIOA, GPIO_PIN_1, &gpio_initstruct);
break;
case 6:
es32f3_channel = ADC_CHANNEL_6;
ald_gpio_init(GPIOA, GPIO_PIN_2, &gpio_initstruct);
break;
case 7:
es32f3_channel = ADC_CHANNEL_7;
ald_gpio_init(GPIOA, GPIO_PIN_3, &gpio_initstruct);
break;
case 8:
es32f3_channel = ADC_CHANNEL_8;
ald_gpio_init(GPIOA, GPIO_PIN_4, &gpio_initstruct);
break;
case 9:
es32f3_channel = ADC_CHANNEL_9;
ald_gpio_init(GPIOA, GPIO_PIN_5, &gpio_initstruct);
break;
case 10:
es32f3_channel = ADC_CHANNEL_10;
ald_gpio_init(GPIOA, GPIO_PIN_6, &gpio_initstruct);
break;
case 11:
es32f3_channel = ADC_CHANNEL_11;
ald_gpio_init(GPIOA, GPIO_PIN_7, &gpio_initstruct);
break;
case 12:
es32f3_channel = ADC_CHANNEL_12;
ald_gpio_init(GPIOC, GPIO_PIN_4, &gpio_initstruct);
break;
case 13:
es32f3_channel = ADC_CHANNEL_13;
ald_gpio_init(GPIOC, GPIO_PIN_5, &gpio_initstruct);
break;
case 14:
es32f3_channel = ADC_CHANNEL_14;
ald_gpio_init(GPIOB, GPIO_PIN_0, &gpio_initstruct);
break;
case 15:
es32f3_channel = ADC_CHANNEL_15;
ald_gpio_init(GPIOB, GPIO_PIN_1, &gpio_initstruct);
break;
case 16:
es32f3_channel = ADC_CHANNEL_16;
break;
case 17:
es32f3_channel = ADC_CHANNEL_17;
break;
case 18:
es32f3_channel = ADC_CHANNEL_18;
break;
default:
break;
}
return es32f3_channel;
}
static rt_err_t es32f3_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
{
adc_handle_t *_hadc = (adc_handle_t *)device->parent.user_data;
adc_nch_conf_t nm_config;
RT_ASSERT(device != RT_NULL);
RT_ASSERT(value != RT_NULL);
/* config adc channel */
nm_config.channel = es32f3_adc_get_channel(channel);
nm_config.rank = ADC_NCH_RANK_1;
nm_config.samp_time = ADC_SAMPLETIME_4;
ald_adc_normal_channel_config(_hadc, &nm_config);
ald_adc_normal_start(_hadc);
if (ald_adc_normal_poll_for_conversion(_hadc, 5000) == OK)
*value = ald_adc_normal_get_value(_hadc);
return RT_EOK;
}
static const struct rt_adc_ops es32f3_adc_ops =
{
es32f3_adc_enabled,
es32f3_get_adc_value,
};
int rt_hw_adc_init(void)
{
int result = RT_EOK;
static adc_handle_t _h_adc0;
/* adc function initialization */
_h_adc0.perh = ADC0;
_h_adc0.init.data_align = ADC_DATAALIGN_RIGHT;
_h_adc0.init.scan_mode = DISABLE;
_h_adc0.init.cont_mode = DISABLE;
_h_adc0.init.disc_mode = ADC_ALL_DISABLE;
_h_adc0.init.disc_nbr = ADC_DISC_NBR_1;
_h_adc0.init.conv_res = ADC_CONV_RES_10;
_h_adc0.init.clk_div = ADC_CKDIV_128;
_h_adc0.init.nche_sel = ADC_NCHESEL_MODE_ALL;
_h_adc0.init.neg_ref = ADC_NEG_REF_VSS;
_h_adc0.init.pos_ref = ADC_POS_REF_VDD;
ald_adc_init(&_h_adc0);
rt_hw_adc_register(&_device_adc0, "adc0", &es32f3_adc_ops, &_h_adc0);
return result;
}
INIT_BOARD_EXPORT(rt_hw_adc_init);
#endif
bsp/essemi/es32f369x/drivers/drv_adc.h
+16
View File
@@ -0,0 +1,16 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-03 wangyq the first version
*/
#ifndef DRV_ADC_H__
#define DRV_ADC_H__
int rt_hw_adc_init(void);
#endif
bsp/essemi/es32f369x/drivers/drv_gpio.c
+69 -68
View File
@@ -17,10 +17,10 @@
#ifdef RT_USING_PIN
#define __ES32F0_PIN(index, gpio, gpio_index) {index, GPIO##gpio, GPIO_PIN_##gpio_index}
#define __ES32F0_PIN_DEFAULT {-1, 0, 0}
#define __ES32F3_PIN(index, gpio, gpio_index) {index, GPIO##gpio, GPIO_PIN_##gpio_index}
#define __ES32F3_PIN_DEFAULT {-1, 0, 0}
/* ES32F0 GPIO driver */
/* ES32F3 GPIO driver */
struct pin_index
{
int index;
@@ -30,71 +30,71 @@ struct pin_index
static const struct pin_index pins[] =
{
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN(2, C, 13),
__ES32F0_PIN(3, C, 14),
__ES32F0_PIN(4, C, 15),
__ES32F0_PIN(5, H, 0),
__ES32F0_PIN(6, H, 1),
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN(8, C, 0),
__ES32F0_PIN(9, C, 1),
__ES32F0_PIN(10, C, 2),
__ES32F0_PIN(11, C, 3),
__ES32F0_PIN(12, H, 3),
__ES32F0_PIN(13, H, 4),
__ES32F0_PIN(14, A, 0),
__ES32F0_PIN(15, A, 1),
__ES32F0_PIN(16, A, 2),
__ES32F0_PIN(17, A, 3),
__ES32F0_PIN(18, F, 0),
__ES32F0_PIN(19, F, 1),
__ES32F0_PIN(20, A, 4),
__ES32F0_PIN(21, A, 5),
__ES32F0_PIN(22, A, 6),
__ES32F0_PIN(23, A, 7),
__ES32F0_PIN(24, C, 4),
__ES32F0_PIN(25, C, 5),
__ES32F0_PIN(26, B, 0),
__ES32F0_PIN(27, B, 1),
__ES32F0_PIN(28, B, 2),
__ES32F0_PIN(29, B, 10),
__ES32F0_PIN(30, B, 11),
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN(33, B, 12),
__ES32F0_PIN(34, B, 13),
__ES32F0_PIN(35, B, 14),
__ES32F0_PIN(36, B, 15),
__ES32F0_PIN(37, C, 6),
__ES32F0_PIN(38, C, 7),
__ES32F0_PIN(39, C, 8),
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN(46, A, 13),
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN(49, A, 14),
__ES32F0_PIN(50, A, 15),
__ES32F0_PIN(51, C, 10),
__ES32F0_PIN(52, C, 11),
__ES32F0_PIN(53, C, 12),
__ES32F0_PIN(54, D, 2),
__ES32F0_PIN(55, B, 3),
__ES32F0_PIN(56, B, 4),
__ES32F0_PIN(57, B, 5),
__ES32F0_PIN(58, B, 6),
__ES32F0_PIN(59, B, 7),
__ES32F0_PIN(60, H, 2),
__ES32F0_PIN(61, B, 8),
__ES32F0_PIN(62, B, 9),
__ES32F0_PIN_DEFAULT,
__ES32F0_PIN_DEFAULT,
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN(2, C, 13),
__ES32F3_PIN(3, C, 14),
__ES32F3_PIN(4, C, 15),
__ES32F3_PIN(5, H, 0),
__ES32F3_PIN(6, H, 1),
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN(8, C, 0),
__ES32F3_PIN(9, C, 1),
__ES32F3_PIN(10, C, 2),
__ES32F3_PIN(11, C, 3),
__ES32F3_PIN(12, H, 3),
__ES32F3_PIN(13, H, 4),
__ES32F3_PIN(14, A, 0),
__ES32F3_PIN(15, A, 1),
__ES32F3_PIN(16, A, 2),
__ES32F3_PIN(17, A, 3),
__ES32F3_PIN(18, F, 0),
__ES32F3_PIN(19, F, 1),
__ES32F3_PIN(20, A, 4),
__ES32F3_PIN(21, A, 5),
__ES32F3_PIN(22, A, 6),
__ES32F3_PIN(23, A, 7),
__ES32F3_PIN(24, C, 4),
__ES32F3_PIN(25, C, 5),
__ES32F3_PIN(26, B, 0),
__ES32F3_PIN(27, B, 1),
__ES32F3_PIN(28, B, 2),
__ES32F3_PIN(29, B, 10),
__ES32F3_PIN(30, B, 11),
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN(33, B, 12),
__ES32F3_PIN(34, B, 13),
__ES32F3_PIN(35, B, 14),
__ES32F3_PIN(36, B, 15),
__ES32F3_PIN(37, C, 6),
__ES32F3_PIN(38, C, 7),
__ES32F3_PIN(39, C, 8),
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN(46, A, 13),
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN(49, A, 14),
__ES32F3_PIN(50, A, 15),
__ES32F3_PIN(51, C, 10),
__ES32F3_PIN(52, C, 11),
__ES32F3_PIN(53, C, 12),
__ES32F3_PIN(54, D, 2),
__ES32F3_PIN(55, B, 3),
__ES32F3_PIN(56, B, 4),
__ES32F3_PIN(57, B, 5),
__ES32F3_PIN(58, B, 6),
__ES32F3_PIN(59, B, 7),
__ES32F3_PIN(60, H, 2),
__ES32F3_PIN(61, B, 8),
__ES32F3_PIN(62, B, 9),
__ES32F3_PIN_DEFAULT,
__ES32F3_PIN_DEFAULT,
};
struct pin_irq_map
@@ -408,6 +408,7 @@ const static struct rt_pin_ops _es32f3_pin_ops =
es32f3_pin_attach_irq,
es32f3_pin_detach_irq,
es32f3_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)
bsp/essemi/es32f369x/drivers/drv_hwtimer.c
+193
View File
@@ -0,0 +1,193 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-3-19 wangyq the first version
* 2019-11-01 wangyq update libraries
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include <drv_hwtimer.h>
#include <board.h>
#include <ald_cmu.h>
#include <ald_timer.h>
#ifdef RT_USING_HWTIMER
struct es32f3_hwtimer_dev
{
rt_hwtimer_t parent;
timer_handle_t *hwtimer_periph;
IRQn_Type IRQn;
};
#ifdef BSP_USING_HWTIMER0
static struct es32f3_hwtimer_dev hwtimer0;
void BS16T0_Handler(void)
{
ald_timer_clear_flag_status(hwtimer0.hwtimer_periph, TIMER_FLAG_UPDATE);
rt_device_hwtimer_isr(&hwtimer0.parent);
if (HWTIMER_MODE_ONESHOT == hwtimer0.parent.mode)
{
ald_timer_base_stop(hwtimer0.hwtimer_periph);
}
}
#endif
#ifdef BSP_USING_HWTIMER1
static struct es32f3_hwtimer_dev hwtimer1;
/* can not use when UART2 Handler is enabled */
void BS16T1_Handler(void)
{
/* if BS16T1 it */
if (ald_timer_get_it_status(hwtimer1.hwtimer_periph, TIMER_IT_UPDATE) &&
ald_timer_get_flag_status(hwtimer1.hwtimer_periph, TIMER_FLAG_UPDATE))
{
ald_timer_clear_flag_status(hwtimer1.hwtimer_periph, TIMER_FLAG_UPDATE);
rt_device_hwtimer_isr(&hwtimer1.parent);
if (HWTIMER_MODE_ONESHOT == hwtimer1.parent.mode)
{
ald_timer_base_stop(hwtimer1.hwtimer_periph);
}
}
}
#endif
static struct rt_hwtimer_info es32f3_hwtimer_info =
{
96000000, /* maximum count frequency */
1, /* minimum count frequency */
65535, /* counter maximum value */
HWTIMER_CNTMODE_UP
};
static void es32f3_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
{
struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data;
RT_ASSERT(hwtimer != RT_NULL);
if (1 == state)
{
ald_timer_base_init(hwtimer->hwtimer_periph);
ald_timer_interrupt_config(hwtimer->hwtimer_periph, TIMER_IT_UPDATE, ENABLE);
NVIC_EnableIRQ(hwtimer->IRQn);
}
hwtimer->parent.freq = ald_cmu_get_pclk1_clock();
es32f3_hwtimer_info.maxfreq = ald_cmu_get_pclk1_clock();
es32f3_hwtimer_info.minfreq = ald_cmu_get_pclk1_clock();
}
static rt_err_t es32f3_hwtimer_start(rt_hwtimer_t *timer,
rt_uint32_t cnt,
rt_hwtimer_mode_t mode)
{
struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data;
RT_ASSERT(hwtimer != RT_NULL);
WRITE_REG(hwtimer->hwtimer_periph->perh->AR, cnt);
ald_timer_base_start(hwtimer->hwtimer_periph);
return RT_EOK;
}
static void es32f3_hwtimer_stop(rt_hwtimer_t *timer)
{
struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data;
RT_ASSERT(hwtimer != RT_NULL);
ald_timer_base_stop(hwtimer->hwtimer_periph);
}
static rt_uint32_t es32f3_hwtimer_count_get(rt_hwtimer_t *timer)
{
struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data;
uint32_t hwtimer_count = 0;
RT_ASSERT(hwtimer != RT_NULL);
hwtimer_count = READ_REG(hwtimer->hwtimer_periph->perh->COUNT);
return hwtimer_count;
}
static rt_err_t es32f3_hwtimer_control(rt_hwtimer_t *timer,
rt_uint32_t cmd,
void *args)
{
rt_err_t ret = RT_EOK;
rt_uint32_t freq = 0;
struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data;
RT_ASSERT(hwtimer != RT_NULL);
switch (cmd)
{
case HWTIMER_CTRL_FREQ_SET:
freq = *(rt_uint32_t *)args;
if (freq != ald_cmu_get_pclk1_clock())
{
ret = -RT_ERROR;
}
break;
case HWTIMER_CTRL_STOP:
ald_timer_base_stop(hwtimer->hwtimer_periph);
break;
default:
ret = RT_EINVAL;
break;
}
return ret;
}
static struct rt_hwtimer_ops es32f3_hwtimer_ops =
{
es32f3_hwtimer_init,
es32f3_hwtimer_start,
es32f3_hwtimer_stop,
es32f3_hwtimer_count_get,
es32f3_hwtimer_control
};
int rt_hw_hwtimer_init(void)
{
rt_err_t ret = RT_EOK;
#ifdef BSP_USING_HWTIMER0
static timer_handle_t _hwtimer_periph0;
_hwtimer_periph0.perh = BS16T0;
hwtimer0.IRQn = BS16T0_IRQn;
hwtimer0.hwtimer_periph = &_hwtimer_periph0;
hwtimer0.parent.info = &es32f3_hwtimer_info;
hwtimer0.parent.ops = &es32f3_hwtimer_ops;
ret = rt_device_hwtimer_register(&hwtimer0.parent, "timer0", &hwtimer0);
#endif
#ifdef BSP_USING_HWTIMER1
static timer_handle_t _hwtimer_periph1;
_hwtimer_periph1.perh = BS16T1;
hwtimer1.IRQn = BS16T1_IRQn;
hwtimer1.hwtimer_periph = &_hwtimer_periph1;
hwtimer1.parent.info = &es32f3_hwtimer_info;
hwtimer1.parent.ops = &es32f3_hwtimer_ops;
ret = rt_device_hwtimer_register(&hwtimer1.parent, "timer1", &hwtimer1);
#endif
return ret;
}
INIT_BOARD_EXPORT(rt_hw_hwtimer_init);
#endif
bsp/essemi/es32f369x/drivers/drv_hwtimer.h
+16
View File
@@ -0,0 +1,16 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-3-19 wangyq the first version
*/
#ifndef DRV_HWTIMER_H__
#define DRV_HWTIMER_H__
int rt_hw_hwtimer_init(void);
#endif
bsp/essemi/es32f369x/drivers/drv_i2c.c
+6 -5
View File
@@ -16,6 +16,7 @@
#include "drv_i2c.h"
#include <ald_i2c.h>
#include <ald_gpio.h>
#include <rtdbg.h>
#ifdef RT_USING_I2C
@@ -55,8 +56,8 @@ static void _i2c_init(void)
ald_i2c_reset(&_h_i2c0);
ald_i2c_init(&_h_i2c0);
/* PB8->I2C0_SCL, PB9->I2C0_SDA */
ald_gpio_init(GPIOB, GPIO_PIN_8 | GPIO_PIN_9, &gpio_instruct);
/* PB06->I2C0_SCL, PB07->I2C0_SDA */
ald_gpio_init(GPIOB, GPIO_PIN_6 | GPIO_PIN_7, &gpio_instruct);
#endif
#ifdef BSP_USING_I2C1
@@ -90,7 +91,7 @@ static rt_size_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
{
if (ald_i2c_master_recv(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
{
i2c_dbg("i2c bus write failed,i2c bus stop!\n");
LOG_E("i2c bus write failed,i2c bus stop!\n");
goto out;
}
}
@@ -98,7 +99,7 @@ static rt_size_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
{
if (ald_i2c_master_send(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
{
i2c_dbg("i2c bus write failed,i2c bus stop!\n");
LOG_E("i2c bus write failed,i2c bus stop!\n");
goto out;
}
}
@@ -107,7 +108,7 @@ static rt_size_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
ret = i;
out:
i2c_dbg("send stop condition\n");
LOG_E("send stop condition\n");
return ret;
}
bsp/essemi/es32f369x/drivers/drv_pwm.c
+171
View File
@@ -0,0 +1,171 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-11 wangyq the first version
* 2019-11-01 wangyq update libraries
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
#include <ald_cmu.h>
#include <ald_timer.h>
#include <ald_gpio.h>
static void pwm_set_freq(timer_handle_t *timer_initstruct, uint32_t ns)
{
uint64_t _arr = (uint64_t)ald_cmu_get_pclk1_clock() * ns / 1000000000 /
(timer_initstruct->init.prescaler + 1);
WRITE_REG(timer_initstruct->perh->AR, (uint32_t)_arr);
timer_initstruct->init.period = (uint32_t)_arr;
}
static void pwm_set_duty(timer_handle_t *timer_initstruct, timer_channel_t ch, uint32_t ns)
{
uint64_t tmp = (uint64_t)ald_cmu_get_pclk1_clock() * ns / 1000000000 /
(timer_initstruct->init.prescaler + 1);
if (ch == TIMER_CHANNEL_1)
WRITE_REG(timer_initstruct->perh->CCVAL1, (uint32_t)tmp);
else if (ch == TIMER_CHANNEL_2)
WRITE_REG(timer_initstruct->perh->CCVAL2, (uint32_t)tmp);
else if (ch == TIMER_CHANNEL_3)
WRITE_REG(timer_initstruct->perh->CCVAL3, (uint32_t)tmp);
else if (ch == TIMER_CHANNEL_4)
WRITE_REG(timer_initstruct->perh->CCVAL4, (uint32_t)tmp);
}
static rt_err_t es32f3_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
{
rt_err_t ret = RT_EOK;
uint32_t _ccep;
timer_channel_t pwm_channel;
timer_oc_init_t tim_ocinit;
timer_handle_t *timer_initstruct = (timer_handle_t *)device->parent.user_data;
struct rt_pwm_configuration *cfg = (struct rt_pwm_configuration *)arg;
RT_ASSERT(timer_initstruct != RT_NULL);
tim_ocinit.oc_mode = TIMER_OC_MODE_PWM1;
tim_ocinit.oc_polarity = TIMER_OC_POLARITY_HIGH;
tim_ocinit.oc_fast_en = DISABLE;
tim_ocinit.ocn_polarity = TIMER_OCN_POLARITY_HIGH;
tim_ocinit.ocn_idle = TIMER_OCN_IDLE_RESET;
tim_ocinit.oc_idle = TIMER_OC_IDLE_RESET;
/* select pwm output channel */
if (1 == cfg->channel)
pwm_channel = TIMER_CHANNEL_1;
else if (2 == cfg->channel)
pwm_channel = TIMER_CHANNEL_2;
else if (3 == cfg->channel)
pwm_channel = TIMER_CHANNEL_3;
else if (4 == cfg->channel)
pwm_channel = TIMER_CHANNEL_4;
else
return RT_EINVAL;
switch (cmd)
{
case PWM_CMD_ENABLE:
ald_timer_pwm_start(timer_initstruct, pwm_channel);
break;
case PWM_CMD_DISABLE:
ald_timer_pwm_stop(timer_initstruct, pwm_channel);
break;
case PWM_CMD_SET:
_ccep = timer_initstruct->perh->CCEP;
/* count registers max 0xFFFF, auto adjust prescaler */
do
{
pwm_set_freq(timer_initstruct, cfg->period);
timer_initstruct->init.prescaler ++;
}
while (timer_initstruct->init.period > 0xFFFF);
/* update prescaler */
WRITE_REG(timer_initstruct->perh->PRES, --timer_initstruct->init.prescaler);
ald_timer_oc_config_channel(timer_initstruct, &tim_ocinit, pwm_channel);
pwm_set_duty(timer_initstruct, pwm_channel, cfg->pulse);
timer_initstruct->perh->CCEP = _ccep;
break;
case PWM_CMD_GET:
cfg->pulse = ald_timer_read_capture_value(timer_initstruct, pwm_channel) * 100 /
READ_REG(timer_initstruct->perh->AR);
break;
default:
break;
}
return ret;
}
const static struct rt_pwm_ops es32f3_pwm_ops =
{
es32f3_pwm_control
};
int rt_hw_pwm_init(void)
{
rt_err_t ret = RT_EOK;
gpio_init_t gpio_initstructure;
gpio_initstructure.mode = GPIO_MODE_OUTPUT;
gpio_initstructure.odos = GPIO_PUSH_PULL;
gpio_initstructure.pupd = GPIO_PUSH_UP;
gpio_initstructure.podrv = GPIO_OUT_DRIVE_6;
gpio_initstructure.nodrv = GPIO_OUT_DRIVE_6;
gpio_initstructure.flt = GPIO_FILTER_DISABLE;
gpio_initstructure.type = GPIO_TYPE_TTL;
#ifdef BSP_USING_PWM0 /* 4 channels */
static struct rt_device_pwm pwm_dev0;
static timer_handle_t timer_initstruct0;
timer_initstruct0.perh = GP16C4T0;
ald_timer_pwm_init(&timer_initstruct0);
/* gpio initialization */
gpio_initstructure.func = GPIO_FUNC_2;
ald_gpio_init(GPIOB, GPIO_PIN_6, &gpio_initstructure);
ald_gpio_init(GPIOB, GPIO_PIN_7, &gpio_initstructure);
ald_gpio_init(GPIOB, GPIO_PIN_8, &gpio_initstructure);
ald_gpio_init(GPIOB, GPIO_PIN_9, &gpio_initstructure);
ret = rt_device_pwm_register(&pwm_dev0, "pwm0", &es32f3_pwm_ops,
&timer_initstruct0);
#endif
#ifdef BSP_USING_PWM1 /* 4 channels */
static struct rt_device_pwm pwm_dev1;
static timer_handle_t timer_initstruct1;
timer_initstruct1.perh = GP16C4T1;
ald_timer_pwm_init(&timer_initstruct1);
/* gpio initialization */
gpio_initstructure.func = GPIO_FUNC_5;
ald_gpio_init(GPIOA, GPIO_PIN_0, &gpio_initstructure);
ald_gpio_init(GPIOA, GPIO_PIN_1, &gpio_initstructure);
ald_gpio_init(GPIOA, GPIO_PIN_2, &gpio_initstructure);
ald_gpio_init(GPIOA, GPIO_PIN_3, &gpio_initstructure);
ret = rt_device_pwm_register(&pwm_dev1, "pwm1", &es32f3_pwm_ops,
&timer_initstruct1);
#endif
return ret;
}
INIT_DEVICE_EXPORT(rt_hw_pwm_init);
bsp/essemi/es32f369x/drivers/drv_pwm.h
+16
View File
@@ -0,0 +1,16 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-11 wangyq the first version
*/
#ifndef DRV_PWM_H__
#define DRV_PWM_H__
int rt_hw_pwm_init(void);
#endif
bsp/essemi/es32f369x/drivers/drv_rtc.c
+158
View File
@@ -0,0 +1,158 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-22 wangyq the first version
* 2019-11-01 wangyq update libraries
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include <string.h>
#include "board.h"
#include "drv_rtc.h"
#include <ald_cmu.h>
#include <ald_rtc.h>
#ifdef RT_USING_RTC
static void __rtc_init(rtc_init_t *init)
{
assert_param(IS_RTC_HOUR_FORMAT(init->hour_format));
assert_param(IS_RTC_OUTPUT_SEL(init->output));
assert_param(IS_RTC_OUTPUT_POLARITY(init->output_polarity));
ald_rtc_reset();
RTC_UNLOCK();
MODIFY_REG(RTC->CON, RTC_CON_HFM_MSK, init->hour_format << RTC_CON_HFM_POS);
MODIFY_REG(RTC->CON, RTC_CON_EOS_MSK, init->output << RTC_CON_EOS_POSS);
MODIFY_REG(RTC->CON, RTC_CON_POL_MSK, init->output_polarity << RTC_CON_POL_POS);
MODIFY_REG(RTC->PSR, RTC_PSR_SPRS_MSK, init->synch_pre_div << RTC_PSR_SPRS_POSS);
MODIFY_REG(RTC->PSR, RTC_PSR_APRS_MSK, init->asynch_pre_div << RTC_PSR_APRS_POSS);
RTC_LOCK();
return;
}
static rt_err_t es32f0_rtc_control(rt_device_t dev, int cmd, void *args)
{
rt_err_t result = RT_EOK;
struct tm time_temp;
struct tm *pNow;
rtc_date_t date;
rtc_time_t time;
switch (cmd)
{
case RT_DEVICE_CTRL_RTC_GET_TIME:
ald_rtc_get_date_time(&date, &time, RTC_FORMAT_DEC);
time_temp.tm_sec = time.second;
time_temp.tm_min = time.minute;
time_temp.tm_hour = time.hour;
time_temp.tm_mday = date.day;
time_temp.tm_mon = date.month - 1;
time_temp.tm_year = date.year - 1900 + 2000;
*((time_t *)args) = mktime(&time_temp);
break;
case RT_DEVICE_CTRL_RTC_SET_TIME:
rt_enter_critical();
/* converts calendar time time into local time. */
pNow = localtime((const time_t *)args);
/* copy the statically located variable */
memcpy(&time_temp, pNow, sizeof(struct tm));
/* unlock scheduler. */
rt_exit_critical();
time.hour = time_temp.tm_hour;
time.minute = time_temp.tm_min;
time.second = time_temp.tm_sec;
date.year = time_temp.tm_year + 1900 - 2000;
date.month = time_temp.tm_mon + 1;
date.day = time_temp.tm_mday;
ald_rtc_set_time(&time, RTC_FORMAT_DEC);
ald_rtc_set_date(&date, RTC_FORMAT_DEC);
/* start RTC */
RTC_UNLOCK();
SET_BIT(RTC->CON, RTC_CON_GO_MSK);
RTC_LOCK();
break;
case RT_DEVICE_CTRL_RTC_GET_ALARM:
break;
case RT_DEVICE_CTRL_RTC_SET_ALARM:
break;
default:
break;
}
return result;
}
#ifdef RT_USING_DEVICE_OPS
const static struct rt_device_ops es32f0_rtc_ops =
{
RT_NULL,
RT_NULL,
RT_NULL,
RT_NULL,
RT_NULL,
es32f0_rtc_control
};
#endif
int rt_hw_rtc_init(void)
{
rt_err_t ret = RT_EOK;
static struct rt_device rtc_dev;
rtc_init_t rtc_initstruct;
/* enable external 32.768kHz */
CMU_LOSC_ENABLE();
ald_cmu_losc_safe_config(ENABLE);
/* set default time */
RTC_UNLOCK();
WRITE_REG(RTC->TIME, 0x134251);
WRITE_REG(RTC->DATE, 0x1190401);
RTC_LOCK();
/* RTC function initialization */
rtc_initstruct.hour_format = RTC_HOUR_FORMAT_24;
rtc_initstruct.asynch_pre_div = 0;
rtc_initstruct.synch_pre_div = 32767;
rtc_initstruct.output = RTC_OUTPUT_DISABLE;
__rtc_init(&rtc_initstruct);
rtc_dev.type = RT_Device_Class_RTC;
rtc_dev.rx_indicate = RT_NULL;
rtc_dev.tx_complete = RT_NULL;
#ifdef RT_USING_DEVICE_OPS
rtc_dev.ops = &es32f0_rtc_ops;
#else
rtc_dev.init = RT_NULL;
rtc_dev.open = RT_NULL;
rtc_dev.close = RT_NULL;
rtc_dev.read = RT_NULL;
rtc_dev.write = RT_NULL;
rtc_dev.control = es32f0_rtc_control;
#endif
rtc_dev.user_data = RTC;
ret = rt_device_register(&rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR);
return ret;
}
INIT_DEVICE_EXPORT(rt_hw_rtc_init);
#endif
bsp/essemi/es32f369x/drivers/drv_rtc.h
+16
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@@ -0,0 +1,16 @@
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-22 wangyq the first version
*/
#ifndef DRV_RTC_H__
#define DRV_RTC_H__
int rt_hw_rtc_init(void);
#endif
bsp/essemi/es32f369x/drivers/drv_uart.c
+1 -1
View File
@@ -39,7 +39,7 @@ static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial
gpio_initstructure.odos = GPIO_PUSH_PULL;
gpio_initstructure.pupd = GPIO_PUSH_UP;
gpio_initstructure.podrv = GPIO_OUT_DRIVE_1;
gpio_initstructure.nodrv = GPIO_OUT_DRIVE_0_1;
gpio_initstructure.nodrv = GPIO_OUT_DRIVE_1;
gpio_initstructure.flt = GPIO_FILTER_DISABLE;
gpio_initstructure.type = GPIO_TYPE_TTL;
bsp/essemi/es32f369x/drivers/linker_scripts/link.icf
+34
View File
@@ -0,0 +1,34 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0007FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, last block HEAP };
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
bsp/essemi/es32f369x/figures/ES-PDS-ES32F369x-V1.2.jpg
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bsp/essemi/es32f369x/project.ewd
+2810
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bsp/nuvoton_nuc472/project.ewp → bsp/essemi/es32f369x/project.ewp
+453 -357
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bsp/nuvoton_nuc472/project.eww → bsp/essemi/es32f369x/project.eww
View File
bsp/essemi/es32f369x/project.uvprojx
+1 -22
View File
@@ -331,7 +331,7 @@
<MiscControls />
<Define>ES32F36xx</Define>
<Undefine />
<IncludePath>.;..\..\..\include;applications;.;drivers;libraries\CMSIS\Device\EastSoft\ES32F36xx\Include;libraries\CMSIS\Include;libraries\ES32F36xx_ALD_StdPeriph_Driver\Include;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\common</IncludePath>
<IncludePath>.;..\..\..\include;applications;.;drivers;libraries\CMSIS\Device\EastSoft\ES32F36xx\Include;libraries\CMSIS\Include;libraries\ES32F36xx_ALD_StdPeriph_Driver\Include;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\common</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -795,27 +795,6 @@
</Group>
<Group>
<GroupName>DeviceDrivers</GroupName>
<Files>
<File>
<FileName>can.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\can\can.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>i2c_core.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\i2c\i2c_core.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>i2c_dev.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\i2c\i2c_dev.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pin.c</FileName>
bsp/essemi/es32f369x/rtconfig.h
+13 -3
View File
@@ -39,7 +39,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40002
#define RT_VER_NUM 0x40003
/* RT-Thread Components */
@@ -76,8 +76,6 @@
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_CAN
#define RT_USING_I2C
#define RT_USING_PIN
/* Using USB */
@@ -166,6 +164,18 @@
/* CAN Drivers */
/* ADC Drivers */
/* RTC Drivers */
/* HWtimer Drivers */
/* PWM Drivers */
/* Onboard Peripheral Drivers */
/* Offboard Peripheral Drivers */
bsp/essemi/es32f369x/template.ewd
+2810
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bsp/essemi/es32f369x/template.ewp
+2024
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bsp/essemi/es32f369x/template.eww
+10
View File
@@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\template.ewp</path>
</project>
<batchBuild/>
</workspace>
bsp/essemi/es8p508x/drivers/drv_gpio.c
+1
View File
@@ -382,6 +382,7 @@ const static struct rt_pin_ops _es8p_pin_ops =
es8p_pin_attach_irq,
es8p_pin_detach_irq,
es8p_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)
bsp/gd32303e-eval/drivers/drv_gpio.c
+1
View File
@@ -497,6 +497,7 @@ const static struct rt_pin_ops _gd32_pin_ops =
gd32_pin_attach_irq,
gd32_pin_detach_irq,
gd32_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)
bsp/gd32e230k-start/drivers/drv_gpio.c
+1
View File
@@ -388,6 +388,7 @@ const static struct rt_pin_ops _gd32_pin_ops =
gd32_pin_attach_irq,
gd32_pin_detach_irq,
gd32_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)
bsp/gd32vf103v-eval/drivers/drv_gpio.c
+1
View File
@@ -427,6 +427,7 @@ const static struct rt_pin_ops _gd32vf_pin_ops =
gd32vf_pin_attach_irq,
gd32vf_pin_dettach_irq,
gd32vf_pin_irq_enable,
RT_NULL,
};
rt_inline void pin_irq_hdr(int irqno)
bsp/imxrt/imxrt1052-nxp-evk/README.md
+44 -69
View File
@@ -1,105 +1,80 @@
# i.MX RT1050 EVK 开发板 BSP 说明
# NXP i. MX RT1050 EVK BSP(Board Support Package) Execution Instruction.
## 简介
[中文页](README_zh.md) |
本文档为 RT-Thread 开发团队为 NXP i.MX RT1050 EVK 开发板提供的 BSP (板级支持包) 说明。
## Introduction
主要内容如下：
This document records the execution instruction of the BSP (board support package) provided by the RT-Thread development team for the NXP i. MX RT1050 EVK development board.
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
The document is covered in three parts:
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
- NXP i. MX RT1050 EVK Board Resources Introduction
- Quickly Get Started
- Advanced Features
## 开发板介绍
By reading the Quickly Get Started section developers can quickly get their hands on this BSP and run RT-Thread on the board. More advanced features will be introduced in the Advanced Features section to help developers take advantage of RT-Thread to drive more on-board resources.
i.MX RT1050 EVK 是 NXP 官方推出的一款基于 ARM Cortex-M7 内核的开发板，最高主频为 600MHz，该开发板具有丰富的板载资源，可以充分发挥 RT1052 的芯片性能。
## Board Resources Introduction
开发板外观如下图所示：
The i.MX RT1050 EVK is a development board based on ARM Cortex-M7. The maximum main frequency is 600 MHz, and it has a wealth of on-board resources that can take full advantage of the RT1052's chip performance.
![board](figures/board.jpg)
[![board](https://github.com/RT-Thread/rt-thread/raw/master/bsp/imxrt/imxrt1052-nxp-evk/figures/board.jpg)](https://github.com/RT-Thread/rt-thread/blob/master/bsp/imxrt/imxrt1052-nxp-evk/figures/board.jpg)
该开发板常用**板载资源**如下：
The mainly-used resources of this board are shown as follows:
- MCU：MIMXRT1052DVL6A，主频 600MHz
- 存储：256MB SDRAM、512MB Hyper FLASH
- 常用外设
- 运动传感器：FXOS8700CQ
- MCU: MIMXRT1052DVL6A. Main Frequency 600MHz,
- Memory: 256MB SDRAM、512MB Hyper FLASH
- Common-used peripherals:
- Motion Sensors: FXOS8700CQ
- LED
- 常用接口：USB 转串口、SD 卡接口、以太网接口、LCD 接口、摄像头接口
- 调试接口：标准 JTAG/SWD
- Common-used interfaces: USB、SD Card、Ethernet、LCD、Camera.
- Debug interface: Standard JTAG/SWD. For more details about this board, please refer to [nxp.com](https://www.nxp.com/)
开发板更多的详细信息请参考 NXP [i.MX RT1050 EVK 开发板介绍](https://www.nxp.com)。
## Peripheral Condition
## 外设支持
Each peripheral supporting condition for this BSP is as follows:
本 BSP 目前对外设的支持情况如下：
| **On-chip Peripheral** | **Support** | **Remark** |
| ---------------------- | ----------- | ---------- |
| GPIO | Support | |
| UART | Support | UART1 |
| **片上外设** | **支持情况** | **备注** |
| :---------------- | :----------: | :------------------------------------------------------ |
| GPIO | 支持 | |
| UART | 支持 | UART1 |
## Execution Instruction
## 使用说明
### Quickly Get Started
使用说明分为如下两个章节：
This BSP provides MDK 5 and IAR projects for developers and it supports the GCC development environment. Here's an example of the MDK5 development environment, to introduce how to run the system.
- 快速上手
#### Hardware Connection
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
Use a USB cable to connect the development board to the PC and turn on the power switch.
- 进阶使用
#### Compile and Download
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
Double-click the project.uvprojx file, to open the MDK 5 project, compile and download the project to the board.
> By default, the project uses the CMSIS-DAP to download the program, when the CMSIS-DAP connects the board, clicking the download button can download the program to the board.
### 快速上手
### **Running Results**
本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
Once the project is successfully downloaded, the system runs automatically. The green LED on the board will flash periodically.
#### 硬件连接
Connect the serial port of the board to the PC, communicate with it via a serial terminal tool(115200-8-1-N). Reset the board and the startup information of RT-Thread will be observed:
使用数据线连接开发板到 PC，打开电源开关。
#### 编译下载
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
> 工程默认配置使用 CMSIS-DAP 下载程序，在通过 CMSIS-DAP 连接开发板的基础上，点击下载按钮即可下载程序到开发板
#### 运行结果
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，绿色 LED 会周期性闪烁。
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
```bash
```
\ | /
- RT - Thread Operating System
/ | \ 4.0.1 build May 5 2019
2006 - 2019 Copyright by rt-thread team
```
### 进阶使用
此 BSP 默认只开启了 GPIO 和 串口 1 的功能，如果需使用更多高级外设功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下：
## **Advanced Features**
1. 在 bsp 下打开 env 工具。
This BSP only enables GPIO and serial port 1 by default. If you need more advanced features, you need to configure the BSP with RT-Thread [Env tools](https://www.rt-thread.io/download.html?download=Env), as follows:
2. 输入 `menuconfig` 命令配置工程，配置好之后保存退出。
1. Open the env tool under BSP;
2. Enter menuconfig command to configure the project, then save and exit;
3. Enter pkgs --update command to update the package;
4. Enter scons --target=mdk4/mdk5/iar command to regenerate the project.
3. 输入 `pkgs --update` 命令更新软件包。
4. 输入 `scons --target=mdk4/mdk5/iar` 命令重新生成工程。
本章节更多详细的介绍请参考 [i.MXRT 系列 BSP 外设驱动使用教程](../docs/IMXRT系列BSP外设驱动使用教程.md)。
## 注意事项
暂无
## 联系人信息
维护人:
- [tyustli](https://github.com/tyustli)
Learn how to use RT-Thread Env, click [Here](https://github.com/RT-Thread/rtthread-manual-doc/blob/master/env/env.md).
bsp/imxrt/imxrt1052-nxp-evk/README_zh.md
+105
View File
@@ -0,0 +1,105 @@
# i.MX RT1050 EVK 开发板 BSP 说明
## 简介
本文档为 RT-Thread 开发团队为 NXP i.MX RT1050 EVK 开发板提供的 BSP (板级支持包) 说明。
主要内容如下：
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
## 开发板介绍
i.MX RT1050 EVK 是 NXP 官方推出的一款基于 ARM Cortex-M7 内核的开发板，最高主频为 600MHz，该开发板具有丰富的板载资源，可以充分发挥 RT1052 的芯片性能。
开发板外观如下图所示：
![board](figures/board.jpg)
该开发板常用**板载资源**如下：
- MCU：MIMXRT1052DVL6A，主频 600MHz
- 存储：256MB SDRAM、512MB Hyper FLASH
- 常用外设
- 运动传感器：FXOS8700CQ
- LED
- 常用接口：USB 转串口、SD 卡接口、以太网接口、LCD 接口、摄像头接口
- 调试接口：标准 JTAG/SWD
开发板更多的详细信息请参考 NXP [i.MX RT1050 EVK 开发板介绍](https://www.nxp.com)。
## 外设支持
本 BSP 目前对外设的支持情况如下：
| **片上外设** | **支持情况** | **备注** |
| :---------------- | :----------: | :------------------------------------------------------ |
| GPIO | 支持 | |
| UART | 支持 | UART1 |
## 使用说明
使用说明分为如下两个章节：
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
### 快速上手
本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
#### 硬件连接
使用数据线连接开发板到 PC，打开电源开关。
#### 编译下载
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
> 工程默认配置使用 CMSIS-DAP 下载程序，在通过 CMSIS-DAP 连接开发板的基础上，点击下载按钮即可下载程序到开发板
#### 运行结果
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，绿色 LED 会周期性闪烁。
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
```bash
\ | /
- RT - Thread Operating System
/ | \ 4.0.1 build May 5 2019
2006 - 2019 Copyright by rt-thread team
```
### 进阶使用
此 BSP 默认只开启了 GPIO 和 串口 1 的功能，如果需使用更多高级外设功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下：
1. 在 bsp 下打开 env 工具。
2. 输入 `menuconfig` 命令配置工程，配置好之后保存退出。
3. 输入 `pkgs --update` 命令更新软件包。
4. 输入 `scons --target=mdk4/mdk5/iar` 命令重新生成工程。
本章节更多详细的介绍请参考 [i.MXRT 系列 BSP 外设驱动使用教程](../docs/IMXRT系列BSP外设驱动使用教程.md)。
## 注意事项
暂无
## 联系人信息
维护人:
- [tyustli](https://github.com/tyustli)
bsp/imxrt/imxrt1064-nxp-evk/SConstruct
+3 -3
View File
@@ -46,10 +46,10 @@ Export('RTT_ROOT')
Export('rtconfig')
SDK_ROOT = os.path.abspath('./')
if os.path.exists(SDK_ROOT + '/Libraries'):
libraries_path_prefix = SDK_ROOT + '/Libraries'
if os.path.exists(SDK_ROOT + '/libraries'):
libraries_path_prefix = SDK_ROOT + '/libraries'
else:
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/Libraries'
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
SDK_LIB = libraries_path_prefix
Export('SDK_LIB')
bsp/imxrt/libraries/drivers/drv_eth.c
+3 -2
View File
@@ -22,6 +22,7 @@
#include "fsl_phy.h"
#include "fsl_cache.h"
#include "fsl_iomuxc.h"
#include "fsl_common.h"
#ifdef RT_USING_LWIP
@@ -62,10 +63,10 @@ struct rt_imxrt_eth
enet_mii_duplex_t duplex;
};
ALIGN(ENET_BUFF_ALIGNMENT) enet_tx_bd_struct_t g_txBuffDescrip[ENET_TXBD_NUM] SECTION("NonCacheable");
AT_NONCACHEABLE_SECTION_ALIGN(enet_tx_bd_struct_t g_txBuffDescrip[ENET_TXBD_NUM], ENET_BUFF_ALIGNMENT);
ALIGN(ENET_BUFF_ALIGNMENT) rt_uint8_t g_txDataBuff[ENET_TXBD_NUM][RT_ALIGN(ENET_TXBUFF_SIZE, ENET_BUFF_ALIGNMENT)];
ALIGN(ENET_BUFF_ALIGNMENT) enet_rx_bd_struct_t g_rxBuffDescrip[ENET_RXBD_NUM] SECTION("NonCacheable");
AT_NONCACHEABLE_SECTION_ALIGN(enet_rx_bd_struct_t g_rxBuffDescrip[ENET_RXBD_NUM], ENET_BUFF_ALIGNMENT);
ALIGN(ENET_BUFF_ALIGNMENT) rt_uint8_t g_rxDataBuff[ENET_RXBD_NUM][RT_ALIGN(ENET_RXBUFF_SIZE, ENET_BUFF_ALIGNMENT)];
static struct rt_imxrt_eth imxrt_eth_device;
bsp/imxrt/libraries/drivers/drv_gpio.c
+2 -1
View File
@@ -587,7 +587,8 @@ const static struct rt_pin_ops imxrt_pin_ops =
imxrt_pin_read,
imxrt_pin_attach_irq,
imxrt_pin_detach_irq,
imxrt_pin_irq_enable
imxrt_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)
bsp/k210/driver/drv_gpio.c
+2 -1
View File
@@ -251,7 +251,8 @@ const static struct rt_pin_ops drv_pin_ops =
drv_pin_attach_irq,
drv_pin_detach_irq,
drv_pin_irq_enable
drv_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)
bsp/lpc408x/.config
+126 -25
View File
@@ -7,6 +7,7 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
@@ -63,8 +64,9 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_VER_NUM=0x40001
CONFIG_RT_VER_NUM=0x40003
CONFIG_ARCH_ARM=y
CONFIG_RT_USING_CPU_FFS=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M4=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
@@ -138,6 +140,7 @@ CONFIG_RT_USING_DFS_DEVFS=y
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
@@ -147,10 +150,10 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
@@ -158,10 +161,10 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
#
# Using WiFi
#
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set
#
@@ -175,6 +178,7 @@ CONFIG_RT_USING_PIN=y
#
# CONFIG_RT_USING_LIBC is not set
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_LIBC_USING_TIME=y
#
# Network
@@ -185,18 +189,15 @@ CONFIG_RT_USING_PIN=y
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
# CONFIG_RT_USING_LWIP141 is not set
# CONFIG_RT_USING_LWIP202 is not set
# CONFIG_RT_USING_LWIP210 is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
#
# AT commands
@@ -211,16 +212,9 @@ CONFIG_RT_USING_PIN=y
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
#
# ARM CMSIS
#
# CONFIG_RT_USING_CMSIS_OS is not set
# CONFIG_RT_USING_RTT_CMSIS is not set
# CONFIG_RT_USING_LWP is not set
#
@@ -230,13 +224,20 @@ CONFIG_RT_USING_PIN=y
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
@@ -254,10 +255,14 @@ CONFIG_RT_USING_PIN=y
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
@@ -267,7 +272,29 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
#
# security packages
@@ -275,6 +302,8 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
@@ -288,6 +317,9 @@ CONFIG_RT_USING_PIN=y
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
#
# tools packages
@@ -299,6 +331,15 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
#
# system packages
@@ -310,27 +351,74 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_MPU6XXX is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
# CONFIG_PKG_USING_MAX7219 is not set
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
#
# miscellaneous packages
@@ -341,11 +429,15 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
#
# samples: kernel and components samples
@@ -356,6 +448,15 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_THREES is not set
CONFIG_SOC_LPC4088=y
#
bsp/lpc408x/rtconfig.h
+6 -10
View File
@@ -40,8 +40,9 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40001
#define RT_VER_NUM 0x40003
#define ARCH_ARM
#define RT_USING_CPU_FFS
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M4
@@ -101,26 +102,24 @@
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* Using WiFi */
/* Using USB */
/* POSIX layer and C standard library */
#define RT_LIBC_USING_TIME
/* Network */
/* Socket abstraction layer */
/* Network interface device */
/* light weight TCP/IP stack */
/* Modbus master and slave stack */
/* AT commands */
@@ -130,9 +129,6 @@
/* Utilities */
/* ARM CMSIS */
/* RT-Thread online packages */
/* IoT - internet of things */

Some files were not shown because too many files have changed in this diff Show More