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fixed ADC register naming which was leftover from lpc2138

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This commit is contained in:
Antoine Drouin
2008-04-04 15:26:49 +00:00
parent eeaa4bae17
commit bb402e98fd
2 changed files with 4 additions and 4 deletions
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sw/airborne/arm7/adc_hw.c
+2 -2
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@@ -189,7 +189,7 @@ void adc_init( void ) {
void adcISR0 ( void ) {
ISR_ENTRY();
uint32_t tmp = AD0DR;
uint32_t tmp = AD0GDR;
uint8_t channel = (uint8_t)(tmp >> 24) & 0x07;
uint16_t value = (uint16_t)(tmp >> 6) & 0x03FF;
adc0_val[channel] = value;
@@ -210,7 +210,7 @@ void adcISR0 ( void ) {
void adcISR1 ( void ) {
ISR_ENTRY();
uint32_t tmp = AD1DR;
uint32_t tmp = AD1GDR;
uint8_t channel = (uint8_t)(tmp >> 24) & 0x07;
uint16_t value = (uint16_t)(tmp >> 6) & 0x03FF;
adc1_val[channel] = value;
sw/airborne/arm7/include/LPC21xx.h
+2 -2
View File
@@ -302,7 +302,7 @@
// A/D0 Converter Registers
#define AD0CR ADC0->cr /* Control Register */
#define AD0DR ADC0->gdr /* Global Data Register */
#define AD0GDR ADC0->gdr /* Global Data Register */
#define ADGSR ADC0->gsr /* ADC global start resister */
#define AD0INTEN ADC0->inten /* Interrupt Enable Register */
#define AD0DR0 ADC0->dr0 /* Channel 0 Data Register */
@@ -319,7 +319,7 @@
// A/D1 Converter Registers
#define AD1CR ADC1->cr /* Control Register */
#define AD1DR ADC1->dr /* Data Register */
#define AD1GDR ADC1->gdr /* Data Register */
///////////////////////////////////////////////////////////////////////////////