diff --git a/sw/airborne/arm7/adc_hw.c b/sw/airborne/arm7/adc_hw.c
index 6c68918e4f..3f353c4a24 100644
--- a/sw/airborne/arm7/adc_hw.c
+++ b/sw/airborne/arm7/adc_hw.c
@@ -189,7 +189,7 @@ void adc_init( void ) {
 
 void adcISR0 ( void ) {
   ISR_ENTRY();
-  uint32_t tmp = AD0DR;
+  uint32_t tmp = AD0GDR;
   uint8_t  channel = (uint8_t)(tmp >> 24) & 0x07;
   uint16_t value = (uint16_t)(tmp >> 6) & 0x03FF;
   adc0_val[channel] = value;
@@ -210,7 +210,7 @@ void adcISR0 ( void ) {
 
 void adcISR1 ( void ) {
   ISR_ENTRY();
-  uint32_t tmp = AD1DR;
+  uint32_t tmp = AD1GDR;
   uint8_t channel = (uint8_t)(tmp >> 24) & 0x07;
   uint16_t value = (uint16_t)(tmp >> 6) & 0x03FF;
   adc1_val[channel] = value;
diff --git a/sw/airborne/arm7/include/LPC21xx.h b/sw/airborne/arm7/include/LPC21xx.h
index 5c975cb170..a65265c543 100644
--- a/sw/airborne/arm7/include/LPC21xx.h
+++ b/sw/airborne/arm7/include/LPC21xx.h
@@ -302,7 +302,7 @@
 
 // A/D0 Converter Registers
 #define AD0CR            ADC0->cr       /* Control Register          */
-#define AD0DR            ADC0->gdr      /* Global Data Register      */
+#define AD0GDR           ADC0->gdr      /* Global Data Register      */
 #define ADGSR            ADC0->gsr      /* ADC global start resister */
 #define AD0INTEN         ADC0->inten    /* Interrupt Enable Register */
 #define AD0DR0           ADC0->dr0      /* Channel 0 Data Register   */
@@ -319,7 +319,7 @@
 
 // A/D1 Converter Registers
 #define AD1CR            ADC1->cr       /* Control Register */
-#define AD1DR            ADC1->dr       /* Data Register */
+#define AD1GDR           ADC1->gdr      /* Data Register */
 
 
 ///////////////////////////////////////////////////////////////////////////////