Mirrors_Framework/paparazzi
1
0
Fork 0
mirror of https://github.com/paparazzi/paparazzi.git synced 2026-06-06 07:53:43 +08:00
Code Issues Actions 27 Packages Projects Releases Wiki Activity

moved imu implementation and arch files

Browse Source
This commit is contained in:
Felix Ruess
2010-09-27 22:56:06 +00:00
parent 1590200481
commit 57b13ebbaf
20 changed files with 135 additions and 144 deletions
Download Patch File Download Diff File Expand all files Collapse all files
sw/airborne/booz/arch/lpc21/imu/booz_imu_b2_arch.c → sw/airborne/firmwares/rotorcraft/imu/arch/lpc21/imu_b2_arch.c
+13 -13
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#include "booz_imu.h"
@@ -33,7 +33,7 @@ static inline bool_t isr_try_mag(void);
#define SSP_DDS8 0x07 << 0 /* data size : 8 bits */
#define SSP_DDS16 0x0F << 0 /* data size : 16 bits */
#define SSP_FRF 0x00 << 4 /* frame format : SPI */
#define SSP_CPOL 0x00 << 6 /* clock polarity : data captured on first clock transition */
#define SSP_CPOL 0x00 << 6 /* clock polarity : data captured on first clock transition */
#define SSP_CPHA 0x00 << 7 /* clock phase : SCK idles low */
#define SSP_SCR 0x0F << 8 /* serial clock rate : divide by 16 */
@@ -62,17 +62,17 @@ static inline bool_t isr_try_mag(void);
void booz_imu_b2_arch_init(void) {
booz_imu_ssp_status = BOOZ_IMU_SSP_STA_IDLE;
/* setup pins for SSP (SCK, MISO, MOSI) */
PINSEL1 |= SSP_PINSEL1_SCK | SSP_PINSEL1_MISO | SSP_PINSEL1_MOSI;
/* setup SSP */
SSPCR0 = SSPCR0_VAL16;
SSPCR1 = SSPCR1_VAL;
SSPCPSR = 0x02;
/* initialize interrupt vector */
VICIntSelect &= ~VIC_BIT( VIC_SPI1 ); /* SPI1 selected as IRQ */
VICIntEnable = VIC_BIT( VIC_SPI1 ); /* enable it */
@@ -85,7 +85,7 @@ void booz_imu_b2_arch_init(void) {
void booz_imu_periodic(void) {
// check ssp idle
// ASSERT((booz_imu_status == BOOZ_IMU_STA_IDLE), DEBUG_IMU, IMU_ERR_OVERUN);
// setup 16 bits
BoozImuSetSSP16bits();
// read adc
@@ -120,7 +120,7 @@ static inline bool_t isr_try_mag(void) {
static void SSP_ISR(void) {
ISR_ENTRY();
switch (booz2_imu_ssp_status) {
case BOOZ2_IMU_SSP_STA_BUSY_MAX1168:
Max1168OnSpiInt();
@@ -137,7 +137,7 @@ static void SSP_ISR(void) {
// spurious interrupt
LED_ON(1);
}
VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
ISR_EXIT();
}
@@ -150,7 +150,7 @@ static void SSP_ISR(void) {
switch (booz_imu_ssp_status) {
case BOOZ_IMU_SSP_STA_BUSY_MAX1168:
Max1168OnSpiInt();
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
if (ms2001_status == MS2001_IDLE || ms2001_status == MS2001_GOT_EOC) {
BoozImuSetSSP8bits();
if (ms2001_status == MS2001_IDLE) {
@@ -164,11 +164,11 @@ static void SSP_ISR(void) {
else {
#endif
booz_imu_ssp_status = BOOZ_IMU_SSP_STA_IDLE;
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
}
#endif
break;
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
case BOOZ_IMU_SSP_STA_BUSY_MS2100:
Ms2001OnSpiIt();
if (ms2001_status == MS2001_IDLE) {
@@ -183,7 +183,7 @@ static void SSP_ISR(void) {
// spurious interrupt
// FIXME LED_ON(1);
}
VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
ISR_EXIT();
}
sw/airborne/booz/arch/lpc21/imu/booz_imu_b2_arch.h → sw/airborne/firmwares/rotorcraft/imu/arch/lpc21/imu_b2_arch.h
+4 -4
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#ifndef BOOZ_IMU_B2_ARCH_H
@@ -26,7 +26,7 @@
/*
MAX1168 SPI ADC connected on SPI1
MAX1168 SPI ADC connected on SPI1
SS on P0.20
EOC on P0.16 ( EINT0 )
@@ -39,7 +39,7 @@
#include "std.h"
#include "LPC21xx.h"
#include "interrupt_hw.h"
#include "interrupt_hw.h"
#define BOOZ_IMU_SSP_STA_IDLE 0
#define BOOZ_IMU_SSP_STA_BUSY_MAX1168 1
sw/airborne/booz/arch/lpc21/imu/booz_imu_crista_arch.c → sw/airborne/firmwares/rotorcraft/imu/arch/lpc21/imu_crista_arch.c
+8 -8
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#include "booz_imu.h"
@@ -31,7 +31,7 @@
#define ADS8344_SS_IODIR IO0DIR
#define ADS8344_SS_IOSET IO0SET
#define ADS8344_SS_IOCLR IO0CLR
#define ADS8344_SS_PIN 20
#define ADS8344_SS_PIN 20
#define ADS8344Select() SetBit(ADS8344_SS_IOCLR,ADS8344_SS_PIN)
#define ADS8344Unselect() SetBit(ADS8344_SS_IOSET,ADS8344_SS_PIN)
@@ -42,7 +42,7 @@
/* SSPCR0 settings */
#define SSP_DSS 0x07 << 0 /* data size : 8 bits */
#define SSP_FRF 0x00 << 4 /* frame format : SPI */
#define SSP_CPOL 0x00 << 6 /* clock polarity : idle low */
#define SSP_CPOL 0x00 << 6 /* clock polarity : idle low */
#define SSP_CPHA 0x00 << 7 /* clock phase : 1 */
#define SSP_SCR 0x09 << 8 /* serial clock rate : 1MHz */
@@ -60,17 +60,17 @@ void booz_imu_crista_arch_init(void) {
/* setup pins for SSP (SCK, MISO, MOSI) */
PINSEL1 |= 2 << 2 | 2 << 4 | 2 << 6;
/* setup SSP */
SSPCR0 = SSP_DSS | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR;
SSPCR1 = SSP_LBM | SSP_MS | SSP_SOD;
SSPCPSR = 2; /* -> 50kHz */
/* initialize interrupt vector */
VICIntSelect &= ~VIC_BIT(VIC_SPI1); // SPI1 selected as IRQ
VICIntEnable = VIC_BIT(VIC_SPI1); // SPI1 interrupt enabled
VICVectCntl7 = VIC_ENABLE | VIC_SPI1;
VICVectAddr7 = (uint32_t)SPI1_ISR; // address of the ISR
VICVectAddr7 = (uint32_t)SPI1_ISR; // address of the ISR
/* setup slave select */
/* configure SS pin */
@@ -110,7 +110,7 @@ void SPI1_ISR(void) {
if (channel > 7-1) {
channel = 0;
ADS8344_available = TRUE;
ADS8344Unselect();
ADS8344Unselect();
}
else {
send_request();
sw/airborne/booz/arch/lpc21/imu/booz_imu_crista_arch.h → sw/airborne/firmwares/rotorcraft/imu/arch/lpc21/imu_crista_arch.h
+2 -3
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#ifndef BOOZ_IMU_INT_HW_H
@@ -35,4 +35,3 @@
extern void ADS8344_start( void );
#endif /* BOOZ_IMU_INT_HW_H */
sw/airborne/booz/arch/sim/imu/booz_imu_b2_arch.c → sw/airborne/firmwares/rotorcraft/imu/arch/sim/imu_b2_arch.c
+2 -2
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#include "booz_imu.h"
sw/airborne/booz/arch/sim/imu/booz_imu_b2_arch.h → sw/airborne/firmwares/rotorcraft/imu/arch/sim/imu_b2_arch.h
+2 -2
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
/*
sw/airborne/booz/arch/sim/imu/booz_imu_crista_arch.c → sw/airborne/firmwares/rotorcraft/imu/arch/sim/imu_crista_arch.c
View File
sw/airborne/booz/arch/sim/imu/booz_imu_crista_arch.h → sw/airborne/firmwares/rotorcraft/imu/arch/sim/imu_crista_arch.h
+2 -3
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2010 The Paparazzi Team
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
/*
@@ -39,4 +39,3 @@ extern void booz_imu_feed_mag(void);
#endif /* BOOZ_IMU_CRISTA_HW_H */
sw/airborne/booz/arch/stm32/imu/booz_imu_aspirin_arch.c → sw/airborne/firmwares/rotorcraft/imu/arch/stm32/imu_aspirin_arch.c
+36 -36
View File
@@ -26,7 +26,7 @@ void booz_imu_aspirin_arch_init(void) {
GPIO_InitTypeDef GPIO_InitStructure;
EXTI_InitTypeDef EXTI_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
/* Set "mag ss" and "mag reset" as floating inputs ------------------------*/
/* "mag ss" (PC12) is shorted to I2C2 SDA */
@@ -61,8 +61,8 @@ void booz_imu_aspirin_arch_init(void) {
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_Init(&NVIC_InitStructure);
/* Accel */
/* set accel slave select as output and assert it ( on PB12) */
@@ -91,38 +91,38 @@ void booz_imu_aspirin_arch_init(void) {
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_Init(&NVIC_InitStructure);
/* Enable SPI2 Periph clock -------------------------------------------------*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
/* Configure GPIOs: SCK, MISO and MOSI --------------------------------*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO , ENABLE);
SPI_Cmd(SPI2, ENABLE);
/* configure SPI */
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI2, &SPI_InitStructure);
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI2, &SPI_InitStructure);
/* Enable DMA1 channel4 IRQ Channel ( SPI RX) */
NVIC_InitTypeDef NVIC_init_struct = {
.NVIC_IRQChannel = DMA1_Channel4_IRQn,
.NVIC_IRQChannelPreemptionPriority = 0,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE
.NVIC_IRQChannelCmd = ENABLE
};
NVIC_Init(&NVIC_init_struct);
@@ -149,7 +149,7 @@ void booz_imu_aspirin_arch_init(void) {
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_Init(&NVIC_InitStructure);
}
@@ -172,28 +172,28 @@ void adxl345_clear_rx_buf(void) {
void adxl345_start_reading_data(void) {
Adxl345Select();
imu_aspirin.accel_tx_buf[0] = (1<<7|1<<6|ADXL345_REG_DATA_X0);
/* SPI2_Rx_DMA_Channel configuration ------------------------------------*/
DMA_DeInit(DMA1_Channel4);
DMA_DeInit(DMA1_Channel4);
DMA_InitTypeDef DMA_initStructure_4 = {
.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
.DMA_MemoryBaseAddr = (uint32_t)imu_aspirin.accel_rx_buf,
.DMA_DIR = DMA_DIR_PeripheralSRC,
.DMA_DIR = DMA_DIR_PeripheralSRC,
.DMA_BufferSize = 7,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_VeryHigh,
.DMA_Priority = DMA_Priority_VeryHigh,
.DMA_M2M = DMA_M2M_Disable
};
DMA_Init(DMA1_Channel4, &DMA_initStructure_4);
/* SPI2_Tx_DMA_Channel configuration ------------------------------------*/
DMA_DeInit(DMA1_Channel5);
DMA_DeInit(DMA1_Channel5);
DMA_InitTypeDef DMA_initStructure_5 = {
.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
.DMA_MemoryBaseAddr = (uint32_t)imu_aspirin.accel_tx_buf,
@@ -202,23 +202,23 @@ void adxl345_start_reading_data(void) {
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_Medium,
.DMA_M2M = DMA_M2M_Disable
};
DMA_Init(DMA1_Channel5, &DMA_initStructure_5);
/* Enable SPI_2 Rx request */
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, ENABLE);
/* Enable DMA1 Channel4 */
DMA_Cmd(DMA1_Channel4, ENABLE);
/* Enable SPI_2 Tx request */
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
/* Enable DMA1 Channel5 */
DMA_Cmd(DMA1_Channel5, ENABLE);
/* Enable DMA1 Channel4 Transfer Complete interrupt */
DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, ENABLE);
}
@@ -233,7 +233,7 @@ void exti15_10_irq_handler(void) {
/* clear EXTI */
if(EXTI_GetITStatus(EXTI_Line14) != RESET)
EXTI_ClearITPendingBit(EXTI_Line14);
imu_aspirin.i2c_trans_gyro.type = I2CTransTxRx;
imu_aspirin.i2c_trans_gyro.buf[0] = ITG3200_REG_GYRO_XOUT_H;
imu_aspirin.i2c_trans_gyro.slave_addr = ITG3200_ADDR;
@@ -283,11 +283,11 @@ void exti2_irq_handler(void) {
void dma1_c4_irq_handler(void) {
Adxl345Unselect();
DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE);
/* Disable SPI_2 Rx and TX request */
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, DISABLE);
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, DISABLE);
/* Disable DMA1 Channel4 and 5 */
DMA_Cmd(DMA1_Channel4, DISABLE);
/* Disable SPI_2 Rx and TX request */
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, DISABLE);
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, DISABLE);
/* Disable DMA1 Channel4 and 5 */
DMA_Cmd(DMA1_Channel4, DISABLE);
DMA_Cmd(DMA1_Channel5, DISABLE);
imu_aspirin.accel_available = TRUE;
sw/airborne/booz/arch/stm32/imu/booz_imu_aspirin_arch.h → sw/airborne/firmwares/rotorcraft/imu/arch/stm32/imu_aspirin_arch.h
View File
sw/airborne/booz/arch/stm32/imu/booz_imu_b2_arch.c → sw/airborne/firmwares/rotorcraft/imu/arch/stm32/imu_b2_arch.c
+4 -4
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 20010 Antoine Drouin <poinix@gmail.com>
*
* This file is part of Paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with Paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#include "booz_imu.h"
@@ -58,7 +58,7 @@ void booz_imu_b2_arch_init(void) {
.NVIC_IRQChannel = DMA1_Channel4_IRQn,
.NVIC_IRQChannelPreemptionPriority = 0,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE
.NVIC_IRQChannelCmd = ENABLE
};
NVIC_Init(&NVIC_init_struct);
/* Enable SPI2 IRQ Channel */
@@ -80,7 +80,7 @@ void booz_imu_periodic(void) {
Max1168ConfigureSPI();
SPI_Cmd(SPI2, ENABLE);
booz_max1168_read();
}
void dma1_c4_irq_handler(void) {
sw/airborne/booz/arch/stm32/imu/booz_imu_b2_arch.h → sw/airborne/firmwares/rotorcraft/imu/arch/stm32/imu_b2_arch.h
+2 -4
View File
@@ -1,6 +1,6 @@
/*
* $Id: booz_imu_b2_arch.h 3732 2009-07-20 17:46:54Z poine $
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#ifndef BOOZ_IMU_B2_ARCH_H
@@ -27,5 +27,3 @@
#endif /* BOOZ_IMU_B2_ARCH_H */
sw/airborne/booz/arch/stm32/imu/booz_imu_crista_arch.c → sw/airborne/firmwares/rotorcraft/imu/arch/stm32/imu_crista_arch.c
+36 -36
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#include "booz_imu.h"
@@ -67,27 +67,27 @@ void booz_imu_crista_arch_init(void) {
ADS8344Unselect();
/* configure SPI after enabling it*/
SPI_Cmd(SPI2, ENABLE);
SPI_InitTypeDef SPI_InitStructure;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI2, &SPI_InitStructure);
SPI_InitTypeDef SPI_InitStructure;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI2, &SPI_InitStructure);
/* Enable DMA1 channel4 IRQ Channel */
NVIC_InitTypeDef NVIC_init_struct = {
.NVIC_IRQChannel = DMA1_Channel4_IRQn,
.NVIC_IRQChannelPreemptionPriority = 0,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE
.NVIC_IRQChannelCmd = ENABLE
};
NVIC_Init(&NVIC_init_struct);
}
@@ -100,30 +100,30 @@ void ADS8344_start( void ) {
}
static void ADS8344_read_channel( void ) {
// control byte
buf_out[0] = 1 << 7 | channel << 4 | SGL_DIF << 2 | POWER_MODE;
/* trigger 4 bytes read */
/* SPI2_Rx_DMA_Channel configuration ------------------------------------*/
DMA_DeInit(DMA1_Channel4);
DMA_DeInit(DMA1_Channel4);
DMA_InitTypeDef DMA_initStructure_4 = {
.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
.DMA_MemoryBaseAddr = (uint32_t)buf_in,
.DMA_DIR = DMA_DIR_PeripheralSRC,
.DMA_DIR = DMA_DIR_PeripheralSRC,
.DMA_BufferSize = 4,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_VeryHigh,
.DMA_Priority = DMA_Priority_VeryHigh,
.DMA_M2M = DMA_M2M_Disable
};
DMA_Init(DMA1_Channel4, &DMA_initStructure_4);
/* SPI2_Tx_DMA_Channel configuration ------------------------------------*/
DMA_DeInit(DMA1_Channel5);
DMA_DeInit(DMA1_Channel5);
DMA_InitTypeDef DMA_initStructure_5 = {
.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
.DMA_MemoryBaseAddr = (uint32_t)buf_out,
@@ -132,18 +132,18 @@ static void ADS8344_read_channel( void ) {
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_Medium,
.DMA_M2M = DMA_M2M_Disable
};
DMA_Init(DMA1_Channel5, &DMA_initStructure_5);
/* Enable SPI_2 Rx request */
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, ENABLE);
/* Enable DMA1 Channel4 */
DMA_Cmd(DMA1_Channel4, ENABLE);
/* Enable SPI_2 Tx request */
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
/* Enable DMA1 Channel5 */
@@ -156,19 +156,19 @@ static void ADS8344_read_channel( void ) {
void dma1_c4_irq_handler(void) {
ADS8344_values[channel] = (buf_in[1] << 8 | buf_in[2]) << 1 | buf_in[3] >> 7;
channel++;
if (channel > 6) {
ADS8344_available = TRUE;
ADS8344Unselect();
DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE);
/* Disable SPI_2 Rx and TX request */
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, DISABLE);
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, DISABLE);
/* Disable DMA1 Channel4 and 5 */
DMA_Cmd(DMA1_Channel4, DISABLE);
DMA_Cmd(DMA1_Channel5, DISABLE);
ADS8344Unselect();
DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE);
/* Disable SPI_2 Rx and TX request */
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, DISABLE);
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, DISABLE);
/* Disable DMA1 Channel4 and 5 */
DMA_Cmd(DMA1_Channel4, DISABLE);
DMA_Cmd(DMA1_Channel5, DISABLE);
}
else {
ADS8344_read_channel();
sw/airborne/booz/arch/stm32/imu/booz_imu_crista_arch.h → sw/airborne/firmwares/rotorcraft/imu/arch/stm32/imu_crista_arch.h
+2 -2
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2010 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#ifndef BOOZ_IMU_CRISTA_ARCH_H
#define BOOZ_IMU_CRISTA_ARCH_H
sw/airborne/booz/imu/booz_imu_aspirin.c → sw/airborne/firmwares/rotorcraft/imu/imu_aspirin.c
+8 -8
View File
@@ -18,7 +18,7 @@ void booz_imu_impl_init(void) {
imu_aspirin.mag_ready_for_read = FALSE;
imu_aspirin.mag_available = FALSE;
imu_aspirin.accel_available = FALSE;
booz_imu_aspirin_arch_init();
}
@@ -32,13 +32,13 @@ void booz_imu_periodic(void) {
imu_aspirin.status = AspirinStatusIdle;
}
else
imu_aspirin.gyro_available_blaaa = TRUE;
imu_aspirin.gyro_available_blaaa = TRUE;
}
/* sends a serie of I2C commands to configure the ITG3200 gyro */
static void configure_gyro(void) {
struct i2c_transaction t;
t.type = I2CTransTx;
t.slave_addr = ITG3200_ADDR;
@@ -63,7 +63,7 @@ static void configure_gyro(void) {
t.buf[1] = (0x01 | 0x01<<7);
i2c_submit(&i2c2,&t);
while (t.status != I2CTransSuccess);
}
/* sends a serie of I2C commands to configure the ITG3200 gyro */
@@ -73,7 +73,7 @@ static void configure_mag(void) {
t.type = I2CTransTx;
t.slave_addr = HMC5843_ADDR;
/* set to rate to 50Hz */
t.buf[0] = HMC5843_REG_CFGA;
t.buf[0] = HMC5843_REG_CFGA;
t.buf[1] = 0x00 | (0x06 << 2);
i2c_submit(&i2c2,&t);
while (t.status != I2CTransSuccess);
@@ -83,7 +83,7 @@ static void configure_mag(void) {
i2c_submit(&i2c2,&t);
while (t.status != I2CTransSuccess);
/* set to continuous mode */
t.buf[0] = HMC5843_REG_MODE;
t.buf[0] = HMC5843_REG_MODE;
t.buf[1] = 0x00;
i2c_submit(&i2c2,&t);
while (t.status != I2CTransSuccess);
@@ -100,7 +100,7 @@ static void send_i2c_msg_with_retry(struct i2c_transaction* t) {
if (t.status == I2CTransFailed)
nb_retry++;
}
while (t.status != I2CTransSuccess || nb_retry < max_retry);
while (t.status != I2CTransSuccess || nb_retry < max_retry);
}
@@ -111,7 +111,7 @@ static void configure_accel(void) {
/* switch to measurememnt mode */
adxl345_write_to_reg(ADXL345_REG_POWER_CTL, 1<<3);
/* enable data ready interrupt */
adxl345_write_to_reg(ADXL345_REG_INT_ENABLE, 1<<7);
adxl345_write_to_reg(ADXL345_REG_INT_ENABLE, 1<<7);
/* Enable full res and interrupt active low */
adxl345_write_to_reg(ADXL345_REG_DATA_FORMAT, 1<<3|1<<5);
/* clear spi rx reg to make DMA happy */
sw/airborne/booz/imu/booz_imu_aspirin.h → sw/airborne/firmwares/rotorcraft/imu/imu_aspirin.h
+5 -6
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2010 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#ifndef BOOZ_IMU_ASPIRIN_H
@@ -49,7 +49,7 @@
#define IMU_MAG_Z_SIGN 1
#endif
enum AspirinStatus
enum AspirinStatus
{ AspirinStatusUninit,
AspirinStatusIdle,
AspirinStatusReadingGyro,
@@ -88,7 +88,7 @@ extern struct BoozImuAspirin imu_aspirin;
imu_aspirin.i2c_trans_mag.len_r = 7; \
i2c_submit(&i2c2,&imu_aspirin.i2c_trans_mag); \
imu_aspirin.mag_ready_for_read = FALSE; \
imu_aspirin.status = AspirinStatusReadingMag; \
imu_aspirin.status = AspirinStatusReadingMag; \
} \
else { \
imu_aspirin.status = AspirinStatusIdle; \
@@ -102,7 +102,7 @@ extern struct BoozImuAspirin imu_aspirin;
VECT3_ASSIGN(booz_imu.mag_unscaled, mx, my, mz); \
imu_aspirin.mag_available = TRUE; \
imu_aspirin.status = AspirinStatusIdle; \
\
\
} \
if (imu_aspirin.gyro_available_blaaa) { \
imu_aspirin.gyro_available_blaaa = FALSE; \
@@ -129,4 +129,3 @@ extern struct BoozImuAspirin imu_aspirin;
extern void booz_imu_b2_arch_init(void);
#endif /* BOOZ_IMU_ASPIRIN_H */
sw/airborne/booz/imu/booz_imu_b2.c → sw/airborne/firmwares/rotorcraft/imu/imu_b2.c
+3 -5
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,13 +18,13 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#include "booz_imu.h"
void booz_imu_impl_init(void) {
booz_imu_b2_arch_init();
booz_max1168_init();
@@ -35,5 +35,3 @@ void booz_imu_impl_init(void) {
#endif
}
sw/airborne/booz/imu/booz_imu_b2.h → sw/airborne/firmwares/rotorcraft/imu/imu_b2.h
+2 -3
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#ifndef BOOZ_IMU_B2_H
@@ -161,4 +161,3 @@ extern void booz_imu_b2_arch_init(void);
#endif /* BOOZ_IMU_B2_H */
sw/airborne/booz/imu/booz_imu_crista.c → sw/airborne/firmwares/rotorcraft/imu/imu_crista.c
+2 -2
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#include "booz_imu.h"
sw/airborne/booz/imu/booz_imu_crista.h → sw/airborne/firmwares/rotorcraft/imu/imu_crista.h
+2 -3
View File
@@ -1,6 +1,6 @@
/*
* $Id$
*
*
* Copyright (C) 2008-2009 Antoine Drouin <poinix@gmail.com>
*
* This file is part of paparazzi.
@@ -18,7 +18,7 @@
* You should have received a copy of the GNU General Public License
* along with paparazzi; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
* Boston, MA 02111-1307, USA.
*/
#ifndef BOOZ_IMU_CRISTA_H
@@ -71,4 +71,3 @@ extern void booz_imu_crista_arch_init(void);
#endif /* BOOZ_IMU_CRISTA_H */