new uart driver parted for stm32, still working with lpc, needs to be

tested on stm32
This commit is contained in:
Gautier Hattenberger
2011-04-19 14:55:55 +02:00
parent f7d3670843
commit 478631a28c
5 changed files with 122 additions and 499 deletions
@@ -30,7 +30,7 @@
#include "armVIC.h" #include "armVIC.h"
void uart_periph_init_param(struct uart_periph* p, uint16_t baud, uint8_t mode, uint8_t fmode, char * dev) { void uart_periph_init_param(struct uart_periph* p, uint32_t baud, uint8_t mode, uint8_t fmode, char * dev) {
((uartRegs_t *)(p->reg_addr))->ier = 0x00; // disable all interrupts ((uartRegs_t *)(p->reg_addr))->ier = 0x00; // disable all interrupts
((uartRegs_t *)(p->reg_addr))->iir; // clear interrupt ID ((uartRegs_t *)(p->reg_addr))->iir; // clear interrupt ID
File diff suppressed because it is too large Load Diff
+1 -87
View File
@@ -125,92 +125,6 @@ extern void usart3_irq_handler(void);
extern void usart5_irq_handler(void); extern void usart5_irq_handler(void);
#endif #endif
#ifdef USE_UART1 //void uart_init( void );
#define UART1_RX_BUFFER_SIZE 128
#define UART1_TX_BUFFER_SIZE 128
extern volatile uint16_t uart1_rx_insert_idx, uart1_rx_extract_idx;
extern uint8_t uart1_rx_buffer[UART1_RX_BUFFER_SIZE];
extern volatile uint16_t uart1_tx_insert_idx, uart1_tx_extract_idx;
extern volatile bool_t uart1_tx_running;
extern uint8_t uart1_tx_buffer[UART1_TX_BUFFER_SIZE];
#define Uart1ChAvailable() (uart1_rx_insert_idx != uart1_rx_extract_idx)
#define Uart1Getch() ({ \
uint8_t ret = uart1_rx_buffer[uart1_rx_extract_idx]; \
uart1_rx_extract_idx = (uart1_rx_extract_idx + 1)%UART1_RX_BUFFER_SIZE; \
ret; \
})
#endif /* USE_UART1 */
#ifdef USE_UART2
#define UART2_RX_BUFFER_SIZE 128
#define UART2_TX_BUFFER_SIZE 128
extern volatile uint16_t uart2_rx_insert_idx, uart2_rx_extract_idx;
extern uint8_t uart2_rx_buffer[UART2_RX_BUFFER_SIZE];
extern volatile uint16_t uart2_tx_insert_idx, uart2_tx_extract_idx;
extern volatile bool_t uart2_tx_running;
extern uint8_t uart2_tx_buffer[UART2_TX_BUFFER_SIZE];
#define Uart2ChAvailable() (uart2_rx_insert_idx != uart2_rx_extract_idx)
#define Uart2Getch() ({ \
uint8_t ret = uart2_rx_buffer[uart2_rx_extract_idx]; \
uart2_rx_extract_idx = (uart2_rx_extract_idx + 1)%UART2_RX_BUFFER_SIZE; \
ret; \
})
#endif /* USE_UART2 */
#ifdef USE_UART3
#define UART3_RX_BUFFER_SIZE 128
#define UART3_TX_BUFFER_SIZE 128
extern volatile uint16_t uart3_rx_insert_idx, uart3_rx_extract_idx;
extern uint8_t uart3_rx_buffer[UART3_RX_BUFFER_SIZE];
extern volatile uint16_t uart3_tx_insert_idx, uart3_tx_extract_idx;
extern volatile bool_t uart3_tx_running;
extern uint8_t uart3_tx_buffer[UART3_TX_BUFFER_SIZE];
#define Uart3ChAvailable() (uart3_rx_insert_idx != uart3_rx_extract_idx)
#define Uart3Getch() ({ \
uint8_t ret = uart3_rx_buffer[uart3_rx_extract_idx]; \
uart3_rx_extract_idx = (uart3_rx_extract_idx + 1)%UART3_RX_BUFFER_SIZE; \
ret; \
})
#endif /* USE_UART3 */
#ifdef USE_UART5
#define UART5_RX_BUFFER_SIZE 128
#define UART5_TX_BUFFER_SIZE 128
extern volatile uint16_t uart5_rx_insert_idx, uart5_rx_extract_idx;
extern uint8_t uart5_rx_buffer[UART5_RX_BUFFER_SIZE];
extern volatile uint16_t uart5_tx_insert_idx, uart5_tx_extract_idx;
extern volatile bool_t uart5_tx_running;
extern uint8_t uart5_tx_buffer[UART5_TX_BUFFER_SIZE];
#define Uart5ChAvailable() (uart5_rx_insert_idx != uart5_rx_extract_idx)
#define Uart5Getch() ({ \
uint8_t ret = uart5_rx_buffer[uart5_rx_extract_idx]; \
uart5_rx_extract_idx = (uart5_rx_extract_idx + 1)%UART5_RX_BUFFER_SIZE; \
ret; \
})
#endif /* USE_UART5 */
void uart_init( void );
#endif /* STM32_UART_ARCH_H */ #endif /* STM32_UART_ARCH_H */
+4
View File
@@ -40,6 +40,10 @@ struct uart_periph uart2;
struct uart_periph uart3; struct uart_periph uart3;
#endif #endif
#ifdef USE_UART5
struct uart_periph uart5;
#endif
void uart_periph_init(struct uart_periph* p) { void uart_periph_init(struct uart_periph* p) {
p->rx_insert_idx = 0; p->rx_insert_idx = 0;
p->rx_extract_idx = 0; p->rx_extract_idx = 0;
+11 -10
View File
@@ -54,7 +54,7 @@ struct uart_periph {
}; };
extern void uart_periph_init(struct uart_periph* p); extern void uart_periph_init(struct uart_periph* p);
extern void uart_periph_init_param(struct uart_periph* p, uint16_t baud, uint8_t mode, uint8_t fmode, char * dev); extern void uart_periph_init_param(struct uart_periph* p, uint32_t baud, uint8_t mode, uint8_t fmode, char * dev);
extern void uart_transmit(struct uart_periph* p, uint8_t data); extern void uart_transmit(struct uart_periph* p, uint8_t data);
extern bool_t uart_check_free_space(struct uart_periph* p, uint8_t len); extern bool_t uart_check_free_space(struct uart_periph* p, uint8_t len);
@@ -156,16 +156,17 @@ extern void uart3_init(void);
#endif // USE_UART3 #endif // USE_UART3
#ifdef USE_UART5 #ifdef USE_UART5
extern struct uart_periph uart5;
extern void uart5_init(void);
//TODO adapt to new driver #define Uart5Init() uart_periph_init(&uart5)
extern void uart5_init( void ); #define Uart5CheckFreeSpace(_x) uart_check_free_space(&uart5, _x)
extern void uart5_transmit( uint8_t data ); #define Uart5Transmit(_x) uart_transmit(&uart5, _x)
extern bool_t uart5_check_free_space( uint8_t len);
#define Uart5Init uart5_init
#define Uart5CheckFreeSpace(_x) uart5_check_free_space(_x)
#define Uart5Transmit(_x) uart5_transmit(_x)
#define Uart5SendMessage() {} #define Uart5SendMessage() {}
#define Uart5ChAvailable() UartChAvailable(uart5)
#define Uart5Getch() UartGetch(uart5)
#define Uart5TxRunning uart5.tx_running
#define Uart5InitParam(_b, _m, _fm) uart_periph_init_param(&uart5, _b, _m, _fm, "")
#define UART5Init Uart5Init #define UART5Init Uart5Init
#define UART5CheckFreeSpace Uart5CheckFreeSpace #define UART5CheckFreeSpace Uart5CheckFreeSpace
@@ -174,6 +175,6 @@ extern bool_t uart5_check_free_space( uint8_t len);
#define UART5ChAvailable Uart5ChAvailable #define UART5ChAvailable Uart5ChAvailable
#define UART5Getch Uart5Getch #define UART5Getch Uart5Getch
#endif /* USE_UART5 */ #endif // USE_UART5
#endif /* MCU_PERIPH_UART_H */ #endif /* MCU_PERIPH_UART_H */