Prep for 0.3.18 release

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1255 42af7a65-404d-4744-a932-0658087f49c3
Add to losetup example
2025-12-17 18:25:22 +08:00 · 2008-11-16 14:57:10 +00:00 · 2008-11-16 14:55:34 +00:00 · 2008-11-16 14:54:54 +00:00 · 2008-11-16 14:54:29 +00:00 · 2008-11-16 14:54:03 +00:00
301 changed files with 25128 additions and 1456 deletions
--- a/40
+++ b/40
@@ -525,6 +525,42 @@
 	* Fixed another bug in the NXP LPC214x USB device driver:  After a stalled endpoint
 	  is resumed (view CLEAR FEATURE), we must restart the IN (outgoing) queue.

-0.3.18 2008-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
-
+0.3.18 2008-11-16 Gregory Nutt <spudmonkey@racsa.co.cr>
+	* Added port for the STMicro STR71x processor and configuration for the Olimex STR-P711
+	  board (STR71x testing is stalled because I have been unable to get OpenOCD to
+	  communicate with my JTAG wiggler on Linux).
+	* Fix race condition workaround delay in LPC214X SPI logic.  This was also the cause of the
+	  very bad MMC/SD performance.
+	* Began port of the Hitachi SH-1 using the SH-1/US7032EVB1 board
+	* Re-built all configurations that use SDCC and Zilog toolchains to make sure they still
+	  build (they didn't, but they do now).
+	* Fixed several erroneous "list empty" checks in the CAN driver.
+	* Hitachi SH-1 passes (reduced) examples/ostest; the examples/nsh test still fails.
+	  There are remaining instabilities that make the port un-usable.  The nature of these is
+	  not understood; the behavior is that certain SH-1 instructions stop working as advertised.
+	  This could be a silicon problem, some pipeline issue that is not handled properly by the
+	  gcc 3.4.5 toolchain (which has very limit SH-1 support to begin with), or perhaps with the
+	  CMON debugger.  At any rate, I have exhausted all of the energy that I am willing to put
+	  into this cool old processor for the time being.
+	* Renamed configuration item CONFIG_PROC_STACK_SIZE as CONFIG_IDLETHREAD_STACKSIZE:  It now
+	  only controls the size of the stack for the IDLE thread.  Added CONFIG_USERMAIN_STACKSIZE:
+	  This is the size of stack used with the user_start() thread is created.  The two stacks
+	  no longer have to be the same.
+	* Add a loop device that converts a file into a block device.
+	* Each NSH command can not be disabled through a configuration setting. All of these
+	 settings make the configuration of NSH potentially complex but also allow it to squeeze
+	  into very small memory footprints.
+	* Added a block to character (BCH) driver.  This is kind of the reverse of the loop
+	  device; it allows you access a block device like a character device.
+	* Added strcasecmp() and strncasecmp()
+	* NSH: Added the 'dd' command
+	* NSH: Added the 'losetup' command
+	* Fixed a FAT bug:  After recent changes, it would mount a (invalid) FAT file system
+	  even if the medium is not formatted!
+	* Corrected two important errors in FAT lseek implementation: (1) the sectors-per-cluster
+	  value was being reset to "1" and (2) important lseek logic was omitted when the seek
+	  position was zero.
+	* Fixed a bug in getopt().  It would fail if on certain combinations of terminal argument
+	  types.

+0.3.19 2008-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
--- a/Documentation/NuttShell.html
+++ b/Documentation/NuttShell.html
--- a/Documentation/NuttX.html
+++ b/Documentation/NuttX.html
@@ -8,7 +8,7 @@
  <tr align="center" bgcolor="#e4e4e4">
    <td>
      <h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
-      <p>Last Updated: October 28, 2008</p>
+      <p>Last Updated: November 16, 2008</p>
    </td>
  </tr>
 </table>
@@ -530,37 +530,56 @@
  </tr>
 </table>

-<p><b>nuttx-0.3.17</b>.
-  The 29th release of NuttX (nuttx-0.3.16) is available for download
+<p><b>nuttx-0.3.18</b>.
+  The 30<sup>th</sup> release of NuttX (nuttx-0.3.18) is available for download
  from the <a href="http://sourceforge.net/project/showfiles.php?group_id=189573">SourceForge</a>
  website.
  The change log associated with the release is available <a href="#currentrelease">here</a>.
  Unreleased changes after this release are available in CVS.
  These unreleased changes are listed <a href="#pendingchanges">here</a>.
 </p>
-<p><b>MMC/SD and USB Mass Storage Support</b>.
-  The nuttx-0.3.17 release includes  additional support for USB in NuttX.
-  The following new features were added:
+<p>
+  This release includes two partially completed ports, several new features, and a
+  couple of important bug fixes.  The two partially completed ports are:
  <ul>
-    <li>Added support for SPI-based MMC/SD cards (with an SPI driver for the NXP LPC214x).</li>
-    <li>Added USB storage class device side driver (BBB)</li>
-    <li>Added an example that demonstrates the USB storage class by exporting the SPI based MMC/SD card on the NXP LPC214x.</li>
+    <li>The STMicro STR71x processor and configuration for the Olimex STR-P711 board, and</li>
+    <li>The Hitachi SH-1 using the SH1_LCEVB1 (SH-1/US7032EVB1) board.</li>
  </ul>
 </p>
 <p>
-  This is an early alpha release of these drivers.
-  At present they only work with debug features enabled so there are probably some race conditions that
-  occur only with debug features disabled (anyone out there with a USB analyzer?  I would love
-  to know what is happening).
-</p>
-<p><b>Bugs Fixed</b>
-  Several important bugs were also fixed in the FAT file system, USB serial driver and
-  NXP LPC214x USB controller driver (see the current <a href="#currentrelease">ChangeLog</a> for details).
+  Progress on these ports is stalled (as detailed in the ChangeLog).
 </p>
 <p>
-  These changes were verified only on the mcu123.com NXP LPC2148 board using a Linux development environment.
-  USB testing was performed using both a Linux host and a WinXP host.
-  As usual, any feedback about bugs or suggestions for improvement would be greatly appreciated.
+  The new features focus primarily on management of block devices and extensions of
+  the NuttShell (NSH).  These new features include:
+  <ul>
+    <li>A loop device that converts a file into a block device,</li>
+    <li>A block to character (BCH) driver that  allow access a block device as if it were character device, </li>
+    <li>Added strcasecmp() and strncasecmp() libc functions, and </li>
+    <li>Added the 'dd' and 'losetup' commands to NSH. These commands (along with mkfatfs and mount),
+        give good managment of filesystems on the target.</li>
+  </ul>
+</p>
+<p>
+  Several bugs were fixed, the most important of which are:
+  <ul>
+    <li>Fixd a race condition workaround delay in LPC214X SPI logic.  This was also
+        the cause of some bad MMC/SD performance on that platform.</li>
+    <li>Fixed a recently introduced FAT file system problem: It would mount a (invalid)
+        FAT file system even if the medium is not formatted!</li>
+    <li>Corrected two iother important errors in the FAT lseek implementation:
+        (1) the sectors-per-cluster value was being reset to "1" and (2) important
+        lseek logic was omitted when the seek position was zero.</li>
+  </ul>
+</p>
+<p>
+  The FAT filesystem has had many bugs fixed in it and, I think, is now maturing
+  and becoming stable.
+</p>
+<p>
+  These changes were verified only on the mcu123.com NXP LPC2148 board, the Hitachi
+  SH1_LCEVB1 board, and the Linux simulator, all using a Linux development environment.
+  Please report any errors to me.
 </p>

 <table width ="100%">
@@ -582,7 +601,7 @@
  <td><br></td>
  <td>
    <p>
-      A user-mode port of NuttX to the x86 Linux platform is available.
+      A user-mode port of NuttX to the x86 Linux/Cygwin platform is available.
      The purpose of this port is primarily to support OS feature development.
    </p>
    <p>
@@ -612,6 +631,10 @@
    </p>
   </td>
 </tr>
+<tr>
+  <td><br></td>
+  <td><hr></td>
+</tr>
 <tr>
  <td><br></td>
  <td>
@@ -623,12 +646,34 @@
    </p>
    <p>
      <b>STATUS:</b>
-        The basic port includes successful booting, timer interrupts, serial console,
-        USB driver, succesfully passing the OS test, and a NuttShell (NSH) configuration.
-        Additional driver development is underway.
+      This port boots and passes the OS test (examples/ostest).
+      The port is complete and verifed.  As of NuttX 0.3.17, the port includes:
+      timer interrupts, serial console, USB driver, and SPI-based MMC/SD card
+      support.  A verifed NuttShell (NSH) configuration is also available.
    </p>
  </td>
 </tr>
+<tr>
+  <td><br></td>
+  <td><hr></td>
+</tr>
+<tr>
+  <td><br></td>
+  <td>
+    <p>
+      <b>STMicro STR71x</b>.
+      Support is provided for the STMicro STR71x family of processors.  In particular,
+      support is provided for the Olimex STR-P711 evaluation board.
+      This port also used the GNU arm-elf toolchain* under Linux or Cygwin.
+    </p>
+    <p>
+      <b>STATUS:</b>
+      Coding is complete on the basic port (boot logic, system time, serial console),
+      but no testing has been performed due to some problems I am having with my
+      JTAG wiggler and OpenOCD on Linux.
+     </p>
+  </td>
+</tr>
 <tr>
  <td valign="top"><img height="20" width="20" src="favicon.ico"></td>
  <td bgcolor="#5eaee1">
@@ -677,6 +722,33 @@
    </p>
   </td>
 </tr>
+<tr>
+  <td valign="top"><img height="20" width="20" src="favicon.ico"></td>
+  <td bgcolor="#5eaee1">
+    <b>Renesas/Hitachi SuperH</b>
+  </td>
+</tr>
+<tr>
+  <td><br></td>
+  <td>
+    <p>
+      <b>SH-1 SH7032</b>.
+      This port uses the Hitachi SH-1 Low-Cost Evaluation Board (SH1_LCEVB1), US7032EVB,
+      with a GNU arm-elf toolchain* under Linux or Cygwin.
+    </p>
+    <p>
+     <b>STATUS:</b>
+      This port is availble as of release 0.3.18 of NuttX.  The port is basically complete
+      and many examples run correctly.  However, there are remaining instabilities that
+      make the port un-usable.  The nature of these is not understood; the behavior is
+      that certain SH-1 instructions stop working as advertised.  This could be a silicon
+      problem, some pipeline issue that is not handled properly by the gcc 3.4.5 toolchain
+      (which has very limit SH-1 support to begin with), or perhaps with the CMON debugger.
+      At any rate, I have exhausted all of the energy that I am willing to put into this cool
+      old processor for the time being.
+    </p>
+   </td>
+</tr>
 <tr>
  <td valign="top"><img height="20" width="20" src="favicon.ico"></td>
  <td bgcolor="#5eaee1">
@@ -701,7 +773,7 @@
 <tr>
  <td valign="top"><img height="20" width="20" src="favicon.ico"></td>
  <td bgcolor="#5eaee1">
-    <b>Zilog eZ80Acclaim!</b>
+    <b>Zilog eZ80 Acclaim!</b>
  </td>
 </tr>
 <tr>
@@ -788,8 +860,9 @@
 </table></center>

 <blockquote>* A highly modified <a href="http://buildroot.uclibc.org/">buildroot</a>
-is available that may be used to build a NuttX-compatible arm-elf toolchain under
-Linux or Cygwin.</blockquote>
+is available that may be used to build a NuttX-compatible ELF toolchain under
+Linux or Cygwin.  Configurations are available in that buildroot to support ARM,
+m68k, m68hc11, m68hc12, and SuperH ports.</blockquote>

 <table width ="100%">
  <tr bgcolor="#e4e4e4">
@@ -816,8 +889,9 @@ Linux or Cygwin.</blockquote>
      available for download from the
      <a href="http://sourceforge.net/project/showfiles.php?group_id=189573">NuttX SourceForge</a>
      page.
-      This download may be used to build a NuttX-compatible arm-elf toolchain under Linux or Cygwin.
-      Additional support for m68k, m68hc11, and m68hc12 is available in the
+      This download may be used to build a NuttX-compatible ELF toolchain under Linux or Cygwin.
+      That toolchain will support ARM, m68k, m68hc11, m68hc12, and SuperH ports.
+      The buildroot CVS may be accessed in the 
      <a href="http://nuttx.cvs.sourceforge.net/nuttx/misc/buildroot/">NuttX CVS</a>.
    </p>
   </td>
@@ -926,7 +1000,7 @@ Linux or Cygwin.</blockquote>
 <tr>
  <td valign="top"><img height="20" width="20" src="favicon.ico"></td>
  <td bgcolor="#5eaee1">
-    <b>Others Environments?</b>
+    <b>Other Environments?</b>
  </td>
 </tr>
 <tr>
@@ -1062,32 +1136,42 @@ Other memory:
 </table>

 <pre><ul>
-nuttx-0.3.17 2008-10-28 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
-	* Incorporate patch "[2164503] nuttx-0.3.16 does not build for ARM with USB disabled"
-	* Reduced the amount of memory reserved for USB serial control requests.  It
-	  was unnecessarily large.
-	* Added LPC214x SPI1 driver to interface with MMC on mcu123.com board.
-	* Added a simple SPI-based MMC/SD block driver
-	* NSH: Add LPC214x-specific support to NSH; NSH now mounts any SD cards in the slot.
-	* FAT: Fix access to unaligned 32-bit values in partion table (start sector &amp; size)
-	* Fixed a problem with a un-initialized variable in the USB serial driver.
-	* Added USB storage NXP LPC214x configuration
-	* Added a test for USB storage under examples/usbstorage
-	* Fixed a bug in the LPC214x USB driver: It was not properly clearing a HALTed
-	  endpoints (other than EP) on receipt of CLEAR FEATURES request.
-	* Added USB storage class device side driver (BBB)
-	* Fixed a bug in the LPC214x USB driver: It was not properly handling request buffers
-	  larger then the endpoint's max packet (DM320 driver also fixed, untested)
-	* Added logic to the USB device interface:  A bit is needed to force the driver to
-	  to terminate an IN transfer with a short packet (zero-length if necessary).
-	* Fix an error in the NXP LPC214x USB device driver that was causing corruption of
-	  the request queue (M320 driver also fixed, untested)
-	* Correct another error in the NXP LPC214x USB device driver that caused read failures
-	  when the request buffer size was larger than maxpacket.
-	* Numerous corrections/extensions to the USB tracing logic included in 0.3.16 (but
-	  not integrated until 0.3.17)
-	* Fixed another bug in the NXP LPC214x USB device driver:  After a stalled endpoint
-	  is resumed (view CLEAR FEATURE), we must restart the IN (outgoing) queue.
+nuttx-0.3.18 2008-11-16 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+	* Added port for the STMicro STR71x processor and configuration for the Olimex STR-P711
+	  board (STR71x testing is stalled because I have been unable to get OpenOCD to
+	  communicate with my JTAG wiggler on Linux).
+	* Fix race condition workaround delay in LPC214X SPI logic.  This was also the cause of the
+	  very bad MMC/SD performance.
+	* Began port of the Hitachi SH-1 using the SH-1/US7032EVB1 board
+	* Re-built all configurations that use SDCC and Zilog toolchains to make sure they still
+	  build (they didn't, but they do now).
+	* Fixed several erroneous "list empty" checks in the CAN driver.
+	* Hitachi SH-1 passes (reduced) examples/ostest; the examples/nsh test still fails.
+	  There are remaining instabilities that make the port un-usable.  The nature of these is
+	  not understood; the behavior is that certain SH-1 instructions stop working as advertised.
+	  This could be a silicon problem, some pipeline issue that is not handled properly by the
+	  gcc 3.4.5 toolchain (which has very limit SH-1 support to begin with), or perhaps with the
+	  CMON debugger.  At any rate, I have exhausted all of the energy that I am willing to put
+	  into this cool old processor for the time being.
+	* Renamed configuration item CONFIG_PROC_STACK_SIZE as CONFIG_IDLETHREAD_STACKSIZE:  It now
+	  only controls the size of the stack for the IDLE thread.  Added CONFIG_USERMAIN_STACKSIZE:
+	  This is the size of stack used with the user_start() thread is created.  The two stacks
+	  no longer have to be the same.
+	* Add a loop device that converts a file into a block device.
+	* Each NSH command can not be disabled through a configuration setting. All of these
+	  settings make the configuration of NSH potentially complex but also allow it to squeeze
+	  into very small memory footprints.
+	* Added a block to character (BCH) driver.  This is kind of the reverse of the loop
+	  device; it allows you access a block device like a character device.
+	* NSH: Added the 'dd' command
+	* NSH: Added the 'losetup' command
+	* Fixed a FAT bug:  After recent changes, it would mount a (invalid) FAT file system
+	  even if the medium is not formatted!
+	* Corrected two important errors in FAT lseek implementation: (1) the sectors-per-cluster
+	  value was being reset to '1' and (2) important lseek logic was omitted when the seek
+	  position was zero.
+	* Fixed a bug in getopt().  It would fail if on certain combinations of terminal argument
+	  types.

 pascal-0.1.2 2008-02-10 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

@@ -1099,9 +1183,11 @@ pascal-0.1.2 2008-02-10 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
 	  and eliminate a compiler bug
 	* Changes so that runtime compiles with SDCC.

-buildroot-0.1.0 2007-03-09 &lt;spudmonkey@racsa.co.cr&gt
+buildroot-0.1.2 2007-11-06 &lt;spudmonkey@racsa.co.cr&gt

-	* Support for arm-elf toolchain
+	* Support for m68k-elf and m68hc11 toolchain
+	* Add patch to build older binutils with newer Texinfo version
+	* Add support for SH-1 toolchain
 </pre></ul>

 <table width ="100%">
@@ -1113,13 +1199,13 @@ buildroot-0.1.0 2007-03-09 &lt;spudmonkey@racsa.co.cr&gt
 </table>

 <pre><ul>
-nuttx-0.3.18 2008-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+nuttx-0.3.19 2008-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

 pascal-0.1.3 2008-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

-buildroot-0.1.1 2008-xx-xx &lt;spudmonkey@racsa.co.cr&gt;
+buildroot-0.1.3 2008-xx-xx &lt;spudmonkey@racsa.co.cr&gt;

-	* Support for m68k-elf and m68hc11 toolchain
+	* Add support for H8/300 toolchain
 </pre></ul>

 <table width ="100%">
--- a/Documentation/NuttXBanner.html
+++ b/Documentation/NuttXBanner.html
@@ -5,7 +5,7 @@
 <body background="backgd.gif">
 <table width="100%">
  <tr>
-  <td width="210">
+  <td width="210" valign="top">
    <a href="http://sourceforge.net/">
      <img src="http://sflogo.sourceforge.net/sflogo.php?group_id=235&amp;type=5" width="210" height="62" border="0" alt="SourceForge"/>
    </a>
@@ -13,25 +13,27 @@
  <td>
    <table width="100%">
      <tr>
-        <td bgcolor="#e4e4e4">
+        <td bgcolor="#e4e4e4" colspan="2">
          <big><b><i><font color="#3c34ec">NuttX RTOS</font></i></b></big>
        </td>
      </tr>
      <tr>
-        <td>
+        <td valign="top">
          <a href="http://sourceforge.net/projects/nuttx" target="_top">Project</a><br>
-        </td>
-      </tr>
-      <tr>
-        <td>
          <a href="http://nuttx.sourceforge.net" target="_top">Home</a>
        </td>
+        <td valign="top">
+          <a href="http://tech.groups.yahoo.com/group/nuttx" target="_top">Yahoo! Groups</a><br>
+          <a href="freeports.html">Free Ports</a><br>
+        </td>
      </tr>
    </table>
  </td>
-  <td width="210">
-    <a href="freeports.html" target="_blank">
-      <img src="freeports.gif" width="210" height="62" border="0"/>
+  <td width="100" valign="top">
+    <a href="http://groups.yahoo.com/group/nuttx/join" target="_top">
+      <img src="http://us.i1.yimg.com/us.yimg.com/i/yg/img/i/us/ui/join.gif"
+           style="border: 0px;"
+           alt="Click to join nuttx"/>
    </a>
  </td>
  </tr>
--- a/Documentation/NuttxPortingGuide.html
+++ b/Documentation/NuttxPortingGuide.html
@@ -16,7 +16,7 @@
  </b></big></h1>
  <p><small>by</small></p>
  <p>Gregory Nutt</p>
-  <p><small>Last Update: October 22, 2008</small></p>
+  <p><small>Last Update: November 14, 2008</small></p>
 </center>

 <center><h1>Table of Contents</h1></center>
@@ -601,13 +601,6 @@
  as described <a href="#configuringnuttx">below</a>.
 </p>
 <ul>
-  <li><code>configs/sim</code>:
-    A user-mode port of NuttX to the x86 Linux platform is available.
-    The purpose of this port is primarily to support OS feature developement.
-    This port does not support interrupts or a real timer (and hence no
-    round robin scheduler)  Otherwise, it is complete.
-  </li>
-
  <li><code>configs/c5471evm</code>:
    This is a port to the Spectrum Digital C5471 evaluation board.  The
    C5471 is a dual core processor from TI with an ARM7TDMI general purpose
@@ -616,12 +609,22 @@
    This port is complete, verified, and included in the NuttX release.
  </li>

+  <li><code>configs/ez80f0910200kitg</code>
+    ez80Acclaim! Microcontroller.  This port use the Zilog ez80f0910200kitg
+    development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line
+    tools.  The development environment is Cygwin under WinXP.
+  </li>
+
+  <li><code>configs/m68322evb</code>:
+    This is a work in progress for the venerable m68322evb board from
+    Motorola.
+  </li>
+
  <li><code>configs/mcu123-lpc214x</code>:
    This port is for the NXP LPC2148 as provided on the mcu123.com
    lpc214x development board.
    This OS is also built with the arm-elf toolchain* under Linux or Cygwin.
-    STATUS: This port is in progress and should be available in the
-    nuttx-0.2.5 release.
+    The port supports serial, timer0, spi, and usb.
  </li>

  <li><code>configs/ntosd-dm320</code>:
@@ -633,9 +636,12 @@
    NuttX 0.2.1 release.
  </li>

-  <li><code>configs/m68322evb</code>:
-    This is a work in progress for the venerable m68322evb board from
-    Motorola.
+  <li><code>configs/olimex-strp711</code>:
+    This port uses the Olimex STR-P711 board arm-elf toolchain* under Linux or Cygwin.
+    See the <a href="http://www.olimex.com/dev/str-p711.html">Olimex</a> web site
+    for futher information.
+    STATUS: Coding for the basic port -- serial console and system timer -- is complete
+    but untested to problems I am having using OpenOCD with a wiggler clone JTAG.
  </li>

  <li><code>configs/pjrc-8051</code>:
@@ -644,7 +650,19 @@
    This port is not quite ready for prime time.
  </li>

-  <li><code>configs/xtrs</code>
+  <li><code>configs/sim</code>:
+    A user-mode port of NuttX to the x86 Linux platform is available.
+    The purpose of this port is primarily to support OS feature developement.
+    This port does not support interrupts or a real timer (and hence no
+    round robin scheduler)  Otherwise, it is complete.
+  </li>
+
+  <li><code>configs/us7032evb1</code>:
+    This is a port of the Hitachi SH-1 on the Hitachi SH-1/US7032EVB1 board.
+    STATUS:  Work has just began on this port.
+  </li>
+
+  <li><code>configs/xtrs</code>:
    TRS80 Model 3.  This port uses a vintage computer based on the Z80.
    An emulator for this computer is available to run TRS80 programs on a 
    linux platform (http://www.tim-mann.org/xtrs.html).
@@ -657,10 +675,12 @@
    The development environment is Cygwin under WinXP.
  </li>

-  <li><code>configs/ez80f0910200kitg</code>
-    ez80Acclaim! Microcontroller.  This port use the Zilog ez80f0910200kitg
-    development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line
-    tools.  The development environment is Cygwin under WinXP.
+  <li><code>configs/z80sim</code>:
+    z80 Microcontroller.  This port uses a Z80 instruction set simulator.
+    That simulator can be found in the NuttX CVS
+    <a href="http://nuttx.cvs.sourceforge.net/nuttx/misc/sims/z80sim/">here</a>.
+    This port also the <a href="http://sdcc.sourceforge.net/">SDCC</a> toolchain
+    under Linux or Cygwin(verfied with version 2.6.0).
  </li>

  <li><code>configs/z8encore000zco</code>
@@ -674,14 +694,6 @@
    development kit, Z8F6423 part, and the Zilog ZDS-II Windows command line
    tools.  The development environment is Cygwin under WinXP.
  </li>
-
-  <li><code>configs/z80sim</code>:
-    z80 Microcontroller.  This port uses a Z80 instruction set simulator.
-    That simulator can be found in the NuttX CVS
-    <a href="http://nuttx.cvs.sourceforge.net/nuttx/misc/sims/z80sim/">here</a>.
-    This port also the <a href="http://sdcc.sourceforge.net/">SDCC</a> toolchain
-    under Linux or Cygwin(verfied with version 2.6.0).
-  </li>
 </ul>

 <p><small><blockquote>
@@ -1315,6 +1327,12 @@ The system can be re-made subsequently by just typing <code>make</code>.
     For use in C code</li>
  <li><code>CONFIG_ENDIAN_BIG</code>:
     Define if big endian (default is little endian).</li>
+  <li><code>CONFIG_ARCH_NOINTC</code>:
+     Define if the architecture does not support an interrupt controller
+     or otherwise cannot support APIs like up_enable_irq() and up_disable_irq().</li>
+  <li><code>CONFIG_ARCH_IRQPRIO</code>:
+     Define if the architecture suports prioritizaton of interrupts and the
+     up_prioritize_irq() API.</li>
 </ul>

 <p>
@@ -1336,13 +1354,16 @@ The system can be re-made subsequently by just typing <code>make</code>.
  <li><code>CONFIG_RRLOAD_BINARY</code>:
    Make the rrload binary format used with BSPs from <a href="www.ridgerun.com">ridgerun.com</a>
     using the <code>tools/mkimage.sh</code> script.</li>
-   <li><code>CONFIG_INTELHEX_BINARY</code>:
+  <li><code>CONFIG_INTELHEX_BINARY</code>:
    Make the Intel HEX binary format used with many different loaders using the GNU objcopy program
    This option hould not be selected if you are not using the GNU toolchain.</li>
-   <li><code>CONFIG_RAW_BINARY</code>:
+  <li><code>CONFIG_MOTOROLA_SREC</code>:
+    Make the Motorola S-Record binary format used with many different loaders using the GNU objcopy program
+    Should not be selected if you are not using the GNU toolchain.</li>
+  <li><code>CONFIG_RAW_BINARY</code>:
    mmke a raw binary format file used with many different loaders using the GNU objcopy program.
    This option  should not be selected if you are not using the GNU toolchain.</li>
-   <li><code>CONFIG_HAVE_LIBM</code>:
+  <li><code>CONFIG_HAVE_LIBM</code>:
    Toolchain supports libm.a</li>
 </ul>

@@ -1740,7 +1761,15 @@ The system can be re-made subsequently by just typing <code>make</code>.
    <code>CONFIG_STACK_POINTER</code>: The initial stack pointer
  </li>
  <li>
-    <code>CONFIG_PROC_STACK_SIZE</code>: The size of the initial stack
+    <code>CONFIG_IDLETHREAD_STACKSIZE</code>: The size of the initial stack.
+    This is the thread that (1) performs the inital boot of the system up
+    to the point where user_start() is spawned, and (2) there after is the
+    IDLE thread that executes only when there is no other thread ready to
+    run.
+  </li>
+  <li>
+    <code>CONFIG_USERMAIN_STACKSIZE</code>: The size of the stack to allocate
+    for the main user thread that begins at the user_start() entry point.
  </li>
  <li>
    <code>CONFIG_PTHREAD_STACK_MIN</code>: Minimum pthread stack size
--- a/Documentation/freeports.html
+++ b/Documentation/freeports.html
@@ -5,16 +5,20 @@
 <body background="backgd.gif">
 <center>
 <table border="1" width="80%" bgcolor="#eeeeee">
-<tr><td>
-<big><b><i>Free</i> Ports</b></big>.
-If you have a hardware platform that you would like to see NuttX ported to then have I got a deal for you:
-I am willing to port NuttX to run on your hardware <b><i>FREE</i></b>.
-You would, of course, have to provide all hardware, development tools, and documentation.
-The functionality would be limited to basic boot-up, serial console, networking, ...
-I would need to retain the hardware throught the support cycle.
-Of course, this offer depends the availability of free time to do the port.
-If you are interested, contact <a href="http://sourceforge.net/users/patacongo/">patacongo</a> at SourceForge.
-</td></tr></table>
+<tr>
+  <td width="210">
+    <a href="freeports.html" target="_blank">
+      <img src="freeports.gif" width="210" height="62" border="0"/>
+    </a>
+  </td>
+ <td>
+    If you have a hardware platform that you would like to see NuttX ported to then have I got a deal for you:
+    I am willing to port NuttX to run on your hardware <b><i>FREE</i></b>.
+    If you are interested, contact
+    <a href="http://sourceforge.net/users/patacongo/" target="_top">patacongo</a> at SourceForge.
+    <a href="NuttXBanner.html">&gt;&gt;back&lt;&lt;</a>.
+</td>
+</tr></table>
 </body>
 </html>

--- a/3
+++ b/3
@@ -213,6 +213,9 @@ endif
 ifeq ($(CONFIG_INTELHEX_BINARY),y)
 	@$(OBJCOPY) -O ihex $(TOPDIR)/$@ $(TOPDIR)/$@.ihx
 endif
+ifeq ($(CONFIG_MOTOROLA_SREC),y)
+	@$(OBJCOPY) -O srec $(TOPDIR)/$@ $(TOPDIR)/$@.srec
+endif
 ifeq ($(CONFIG_RAW_BINARY),y)
 	@$(OBJCOPY) -O binary $(TOPDIR)/$@ $(TOPDIR)/$@.bin
 endif
--- a/43
+++ b/43
@@ -666,8 +666,6 @@ debug features enabled so there are probably some race conditions that occur onl
 with debug features disabled (anyone out there with a USB analyzer?  I would love
 to know what is happening).

-At present USB device controller drivers are included for:
-
 Several important bugs were also fixed in the FAT file system, USB serial driver and
 NXP LPC214x USB controller driver (see the ChangeLog for details).

@@ -677,6 +675,47 @@ host.  Please report any errors to me.

 This tarball contains a complete CVS snapshot from Octobor 28, 2008.

+nuttx-0.3.18
+^^^^^^^^^^^^
+
+This is the 30th release of NuttX.  This release includes two partially completed
+ports, several new features, and a couple of important bug fixes.  The two partially
+completed ports are:
+
+	* The STMicro STR71x processor and configuration for the Olimex STR-P711
+	  board.
+	* The Hitachi SH-1 using the SH1_LCEVB1 (SH-1/US7032EVB1) board
+
+Progress on these ports is stalled (as detailed in the ChangeLog).
+
+The new features focus primarily on management of block devices and extensions of
+the NuttShell (NSH).  These include:
+
+	* A loop device that converts a file into a block device.
+	* A block to character (BCH) driver that  allow access a block device as
+	  if it were character device.
+	* Added strcasecmp() and strncasecmp() libc functions.
+	* Added the 'dd' and 'losetup' commands to NSH. These commands (along
+	  with mkfatfs and mount), give good managment of filesystems on the target.
+
+Several bugs were fixed, the most important of which are:
+
+	* Fixd a race condition workaround delay in LPC214X SPI logic.  This was also
+	  the cause of some bad MMC/SD performance on that platform.
+	* Fixed a recently introduced FAT file system problem: It would mount a (invalid)
+	  FAT file system even if the medium is not formatted!
+	* Corrected two iother important errors in the FAT lseek implementation:
+	  (1) the sectors-per-cluster value was being reset to "1" and (2) important
+	  lseek logic was omitted when the seek position was zero.
+
+The FAT filesystem has had many bugs fixed in it and, I think, is now maturing
+and becoming stable.
+
+These changes were verified only on the mcu123.com NXP LPC2148 board, the Hitachi
+SH1_LCEVB1 board, and the Linux simulator, all using a Linux development environment.
+Please report any errors to me.
+
+This tarball contains a complete CVS snapshot from November 16, 2008.



--- a/110
+++ b/110
@@ -1,4 +1,4 @@
-NuttX TODO List (Last updated July 31, 2008)
+NuttX TODO List (Last updated November 13, 2008)
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

  (7)  Task/Scheduler (sched/)
@@ -16,12 +16,14 @@ NuttX TODO List (Last updated July 31, 2008)
  (3)  Build system
  (2)  NuttShell (NSH) (examples/nsh)
  (1)  Other Applications & Tests (examples/)
-  (0)  ARM (arch/arm/)
+  (2)  ARM (arch/arm/)
  (1)  ARM/C5471 (arch/arm/src/c5471/)
  (1)  ARM/DM320 (arch/arm/src/dm320/)
-  (5)  ARM/LPC214x (arch/arm/src/lpc214x/)
+  (6)  ARM/LPC214x (arch/arm/src/lpc214x/)
+  (3)  ARM/STR71x (arch/arm/src/str71x/)
  (4)  pjrc-8052 / MCS51 (arch/pjrc-8051/)
-  (7)  z80/z8 (arch/z80/)
+  (1)  SH-1 (arch/sh)
+  (8)  z80/z8/ez80 (arch/z80/)
  (8)  z16 (arch/z16/)

 o Task/Scheduler (sched/)
@@ -149,7 +151,9 @@ o Network (net/, netutils/)
  Priority:    Medium, The feature is not important, but it is important
               for NuttX to resolve the architectural issues.

-  Description: IPv6 support is incomplete
+  Description: IPv6 support is incomplete.  Adam Dunkels has recently announced
+               IPv6 support for uIP (currently only as part of Contiki).  Those
+               changes need to be ported to NuttX.
  Status:      Open
  Priority:    Medium

@@ -206,8 +210,9 @@ o USB (drivers/usbdev)

  Description: The USB bulk storage class driver configuration (examples/usbstorage)
               does not work reliably when debug is disabled (CONFIG_DEBUG+CONFIG_DEBUG_VERBOSE
-               +CONFIG_DEBUG_USB).  Race conditions are suspected (probably in the NXP LPC214x
-               USB controller driver).
+               +CONFIG_DEBUG_USB) on WinXP (Linux appears to be fine).  A race condition would
+               would be a possibility.  The symptom is that that WinXP sends a MODE SENSE (6)
+               command with an unsupported mode page (0x1c/0x00)
  Status:      Open
  Priority:    High

@@ -260,6 +265,11 @@ o File system / Generic drivers (fs/, drivers/)
  Status:      Open
  Priority:    Medium

+  Description: The simple SPI based MMCS/SD driver in fs/mmcsd does not
+               yet handle multiple block transfers.
+  Status:      Open
+  Priority:    Medium-Low
+
 o Pascal Add-On (pcode/)
  ^^^^^^^^^^^^^^^^^^^^^^

@@ -300,6 +310,13 @@ o Build system
  Status:      Open
  Priority:    Medium (maybe higher for z80 target)

+  Description: It would be nice to de-couple some of the behaviors enabled by
+               CONFIG_DEBUG.  For example, CONFIG_DEBUG turns on debug output,
+               but also disables optimization make the binary much bigger.
+  Status:      Low.  There workaround is easy.. just edit the configuration's
+               Make.def file to control the behavior that you want.
+  Priority:    Very low.
+
 o NuttShell (NSH) (examples/nsh)
  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

@@ -325,6 +342,22 @@ o Other Applications & Tests (examples/)
 o ARM (arch/arm/)
  ^^^^^^^^^^^^^^^

+  Description: ARM interrupt handling performance could be improved in many
+               ways.  One easy way is to use a pointer to the context save
+               area in current_regs instead of using up_copystate so much.
+               see handling of 'current_regs" in arch/sh/src/common/* for
+               examples of how this might be done.
+  Status:      Open
+  Priority:    Low
+
+  Description: The ARM interrupt handler restores all regisers upon return.
+               This could be improved as well:  If there is not context
+               switch, then the static registers need not be restored
+               because they will not be modified by the called C code.
+               (see arch/sh/src/sh1/sh1_vector.S for example)
+  Status:      Open
+  Priority:    Low
+
 o ARM/C5471 (arch/arm/src/c5471/)
  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

@@ -367,8 +400,9 @@ o ARM/LPC214x (arch/arm/src/lpc214x/)

  Description: The USB bulk storage class driver configuration (examples/usbstorage)
               does not work reliably when debug is disabled (CONFIG_DEBUG+CONFIG_DEBUG_VERBOSE
-               +CONFIG_DEBUG_USB).  Race conditions are suspected (probably in the NXP LPC214x
-               USB controller driver).
+               +CONFIG_DEBUG_USB) on WinXP (Linux appears to be fine).  A race condition would
+               would be a possibility.  The symptom is that that WinXP sends a MODE SENSE (6)
+               command with an unsupported mode page (0x1c/0x00)
  Status:      Open
  Priority:    High

@@ -376,6 +410,29 @@ o ARM/LPC214x (arch/arm/src/lpc214x/)
  Status:      Open
  Priority:    Medium

+  Description: At present the SPI driver is polled -AND- there is a rather large, arbitrary,
+               delay in one of the block access routines.  The purpose of the delay is to
+               avoid a race conditions.  This begs for a re-design -OR- at a minimum, some
+               optimiation of the delay time.
+  Status:      Open
+  Priority:    Medium
+
+o ARM/STR71x (arch/arm/src/str71x/)
+  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+  Description: Basic port is complete but untested.  Complete integration
+  Status:      Open
+  Priority:    High
+
+  Description: Add SPI driver and integrate with MMC/SD support.
+  Status:      Open
+  Priority:    Medium
+
+  Description: Develop a USB driver and integrate with existing USB serial
+               and storage class drivers.
+  Status:      Open
+  Priority:    Medium
+
 o pjrc-8052 / MCS51 (arch/pjrc-8051/)
  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

@@ -411,8 +468,32 @@ o pjrc-8052 / MCS51 (arch/pjrc-8051/)
  Status:      Open
  Priority:    Low -- only because there as so many other issues with 8051

-o z80/z8 (arch/z80)
- ^^^^^^^^^^^^^^^^^^
+
+o SH-1 (arch/sh)
+  ^^^^^^^^^^^^^^
+
+  Description:  There are instabilities that make the SH-1 port un-usable.  The
+                nature of these is not understood; the behavior is that certain SH-1
+                instructions stop working as advertised.  I have seen the following
+                examples:
+
+                  412b jmp @r1 - Set a return address in PR, i.e., it behaved like
+                       410b jsr @r1.  Normally 412b works correctly, but in the failure
+                       condition, it reliably set the PR.
+                  69F6 mov.l @r15+,r9 - wrote the value of R1 to @r15+.  This behavior
+                       does not correspond to any known SH-1 instruction
+
+                This could be a silicon problem, some pipeline issue that is not
+                handled properly by the gcc 3.4.5 toolchain (which has very limit
+                SH-1 support to begin with), or perhaps with the CMON debugger.  At
+                any rate, I have exhausted all of the energy that I am willing to put
+                into this cool old processor for the time being.
+  Status:       Open
+  Priority:     Low -- because the SH-1, SH7032, is very old and only of historical
+                interest.
+
+o z80/z8/ez80 (arch/z80)
+ ^^^^^^^^^^^^^^^^^^^^^^^

  Description: The SDCC version the same problems with interger overflow during
               compilation as described for pjrc-8051.  At typical cause is code like
@@ -471,6 +552,13 @@ o z80/z8 (arch/z80)
  Status:      Open
  Priority:    Low

+  Description: The XTRS target (configs/xtrs) has a clean problem. The clean
+               rule removes .asm files.  This works because there are no .asm
+               files except in sub-directories that are provided from 'make clean' --
+               except for XTRS:  It has a .asm file in its src/ directory that
+               gets removed everytime clean is performd.
+  Status:      Open
+  Priority:    High if you happen to be working with XTRS.

 o z16 (arch/z16)
 ^^^^^^^^^^^^^^^^
--- a/arch/README.txt
+++ b/arch/README.txt
@@ -123,7 +123,7 @@ src/Makefile
 Supported Architectures
 ^^^^^^^^^^^^^^^^^^^^^^^

-arch/sim - Linux simulation
+arch/sim - Linux/Cygwin simulation
    A user-mode port of NuttX to the x86 Linux platform is available.
    The purpose of this port is primarily to support OS feature development.
    This port does not support interrupts or a real timer (and hence no
@@ -133,7 +133,7 @@ arch/arm - ARM-based micro-controllers
    This directory holds common ARM architectures.  At present, this includes
    the following subdirectories:

-    arch/arm/include and arch/arm/common
+    arch/arm/include and arch/arm/src/common
        Common ARM logic.

    arch/arm/include/c5471 and arch/arm/src/c5471
@@ -148,14 +148,29 @@ arch/arm - ARM-based micro-controllers

    arch/arm/include/lpc214x and arch/arm/src/lpc214x
        These directories provide support for NXP LPC214x family of
-        processors.
-        STATUS: This port is in progress and should be available in the
-        nuttx-0.2.5 release.
+        processors.  This port boots and passes the OS test (examples/ostest).
+        The port is complete and verifed.  As of NuttX 0.3.17, the port includes:
+        timer interrupts, serial console, USB driver, and SPI-based MMC/SD card
+        support.  A verifed NuttShell (NSH) configuration is also available.
+
+    arch/arm/include/str71x and arch/arm/src/str71x
+        These directories provide support for the STMicro STR71x processors.
+        Coding is complete on the basic port (boot logic, system time, serial console),
+        but no testing has been performed due to some problems I am having with my
+        JTAG wiggler and OpenOCD on Linux.

 arch/m68322
    A work in progress.
    STATUS:  Stalled for the moment.

+arch/sh - SuperH and related Hitachi/Renesas microcontrollers
+
+    arch/sh/include and arch/sh/src/common
+        Common SuperH logic.
+
+    arch/sh/include/shs and arch/sh/src/sh1
+        Support for the SH-1 processor.
+
 arch/pjrc-8051 - 8051/52 microcontrollers
    8051 Microcontroller.  This port is not quite ready for prime time.

@@ -163,7 +178,7 @@ arch/z16 - ZiLOG 16-bit processors
    This directory holds related, 16-bit architectures from ZiLOG.  At
    present, this includes the following subdirectories:

-    arch/z16/include and arch/z16/common
+    arch/z16/include and arch/z16/src/common
        Common microcontroller logic.

    arch/z16/include/z16f and arch/z16/src/z16f
@@ -175,7 +190,7 @@ arch/z80 - ZiLOG 8-bit microcontrollers
    This directory holds related, 8-bit architectures from ZiLOG.  At
    present, this includes the following subdirectories:

-    arch/z80/include and arch/z80/common
+    arch/z80/include and arch/z80/src/common
        Common microcontroller logic.

    arch/z80/include/z80 and arch/z80/src/z80
@@ -185,7 +200,9 @@ arch/z80 - ZiLOG 8-bit microcontrollers

    arch/z80/include/z8 and arch/z80/src/z8
        ZiLOG Z8Encore! Microcontroller
-        This is a work in progress.
+
+    arch/z80/include/ez80 and arch/z80/src/ez80
+        ZiLOG ez80 Acclaim! Microcontroller

 The following architecture directories are deprecated.  They have been
 replaced by the logic in arm/arm and will deleted at some point in the
--- a/arch/arm/include/arch.h
+++ b/arch/arm/include/arch.h
@@ -1,7 +1,7 @@
-/************************************************************
- * arch/arch.h
+/****************************************************************************
+ * arch/arm/include/arch.h
 *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
@@ -31,38 +31,38 @@
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
- ************************************************************/
+ ****************************************************************************/

 /* This file should never be included directed but, rather,
 * only indirectly through nuttx/arch.h
 */

-#ifndef __ARCH_ARCH_H
-#define __ARCH_ARCH_H
+#ifndef __ARCH_ARM_INCLUDE_ARCH_H
+#define __ARCH_ARM_INCLUDE_ARCH_H

-/************************************************************
+/****************************************************************************
 * Included Files
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Definitions
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Inline functions
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Public Types
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Public Variables
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Public Function Prototypes
- ************************************************************/
+ ****************************************************************************/

 #ifdef __cplusplus
 #define EXTERN extern "C"
@@ -76,4 +76,4 @@ extern "C" {
 }
 #endif

-#endif /* __ARCH_ARCH_H */
+#endif /* __ARCH_ARM_INCLUDE_ARCH_H */
--- a/arch/arm/include/c5471/irq.h
+++ b/arch/arm/include/c5471/irq.h
@@ -1,7 +1,7 @@
-/************************************************************
- * arch/c5471/irq.h
+/****************************************************************************
+ * arch/arm/include/c5471/irq.h
 *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
@@ -31,22 +31,22 @@
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
- ************************************************************/
+ ****************************************************************************/

 /* This file should never be included directed but, rather,
 * only indirectly through nuttx/irq.h
 */

-#ifndef __ARCH_C5471_IRQ_H
-#define __ARCH_C5471_IRQ_H
+#ifndef __ARCH_ARM_INCLUDE_C5471_IRQ_H
+#define __ARCH_ARM_INCLUDE_C5471_IRQ_H

-/************************************************************
+/****************************************************************************
 * Included Files
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Definitions
- ************************************************************/
+ ****************************************************************************/

 /* C5471 Interrupts */

@@ -71,21 +71,21 @@
 #define C5471_IRQ_SYSTIMER      C5471_IRQ_TIMER2
 #define NR_IRQS                 (C5471_IRQ_API+1)

-/************************************************************
+/****************************************************************************
 * Public Types
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Inline functions
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Public Variables
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Public Function Prototypes
- ************************************************************/
+ ****************************************************************************/

 #ifndef __ASSEMBLY__
 #ifdef __cplusplus
@@ -101,5 +101,5 @@ extern "C" {
 #endif
 #endif

-#endif /* __ARCH_C5471_IRQ_H */
+#endif /* __ARCH_ARM_INCLUDE_C5471_IRQ_H */

--- a/arch/arm/include/dm320/irq.h
+++ b/arch/arm/include/dm320/irq.h
@@ -1,7 +1,7 @@
-/************************************************************
- * arch/dm320/irq.h
+/****************************************************************************
+ * arch/arm/include/dm320/irq.h
 *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
@@ -31,22 +31,22 @@
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
- ************************************************************/
+ ****************************************************************************/

 /* This file should never be included directed but, rather,
 * only indirectly through nuttx/irq.h
 */

-#ifndef __ARCH_DM320_IRQ_H
-#define __ARCH_DM320_IRQ_H
+#ifndef __ARCH_ARM_INCLUDE_DM320_IRQ_H
+#define __ARCH_ARM_INCLUDE_DM320_IRQ_H

-/************************************************************
+/****************************************************************************
 * Included Files
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Definitions
- ************************************************************/
+ ****************************************************************************/

 /* DM320 Interrupts */

@@ -100,21 +100,21 @@
 #define DM320_IRQ_SYSTIMER DM320_IRQ_TMR0
 #define NR_IRQS            (DM320_IRQ_RSV+1)

-/************************************************************
+/****************************************************************************
 * Public Types
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Inline functions
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Public Variables
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Public Function Prototypes
- ************************************************************/
+ ****************************************************************************/

 #ifndef __ASSEMBLY__
 #ifdef __cplusplus
@@ -130,5 +130,5 @@ extern "C" {
 #endif
 #endif

-#endif /* __ARCH_DM320_IRQ_H */
+#endif /* __ARCH_ARM_INCLUDE_DM320_IRQ_H */

--- a/arch/arm/include/irq.h
+++ b/arch/arm/include/irq.h
@@ -1,7 +1,7 @@
-/************************************************************
- * arch/irq.h
+/****************************************************************************
+ * arch/arm/include/irq.h
 *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
@@ -31,25 +31,25 @@
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
- ************************************************************/
+ ****************************************************************************/

 /* This file should never be included directed but, rather,
 * only indirectly through nuttx/irq.h
 */

-#ifndef __ARCH_IRQ_H
-#define __ARCH_IRQ_H
+#ifndef __ARCH_ARM_INCLUDE_IRQ_H
+#define __ARCH_ARM_INCLUDE_IRQ_H

-/************************************************************
+/****************************************************************************
 * Included Files
- ************************************************************/
+ ****************************************************************************/

 #include <nuttx/irq.h>
 #include <arch/chip/irq.h>

-/************************************************************
+/****************************************************************************
 * Definitions
- ************************************************************/
+ ****************************************************************************/

 /* IRQ Stack Frame Format:
 *
@@ -103,9 +103,9 @@
 #define REG_LR              REG_R14
 #define REG_PC              REG_R15

-/************************************************************
+/****************************************************************************
 * Public Types
- ************************************************************/
+ ****************************************************************************/

 /* This struct defines the way the registers are stored.  We
 * need to save:
@@ -136,7 +136,6 @@ struct xcptcontext

 #ifndef CONFIG_DISABLE_SIGNALS
  void *sigdeliver; /* Actual type is sig_deliver_t */
-#endif

  /* These are saved copies of LR and CPSR used during
   * signal processing.
@@ -144,6 +143,7 @@ struct xcptcontext

  uint32 saved_pc;
  uint32 saved_cpsr;
+#endif

  /* Register save area */

@@ -151,9 +151,9 @@ struct xcptcontext
 };
 #endif

-/************************************************************
+/****************************************************************************
 * Inline functions
- ************************************************************/
+ ****************************************************************************/

 #ifndef __ASSEMBLY__

@@ -203,13 +203,13 @@ static inline void system_call(swint_t func, int parm1,
 }
 #endif

-/************************************************************
+/****************************************************************************
 * Public Variables
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Public Function Prototypes
- ************************************************************/
+ ****************************************************************************/

 #ifndef __ASSEMBLY__
 #ifdef __cplusplus
@@ -225,5 +225,5 @@ extern "C" {
 #endif
 #endif

-#endif /* __ARCH_IRQ_H */
+#endif /* __ARCH_ARM_INCLUDE_IRQ_H */

--- a/arch/arm/include/limits.h
+++ b/arch/arm/include/limits.h
@@ -1,7 +1,7 @@
-/************************************************************
- * limits.h
+/****************************************************************************
+ * arch/arm/include/limits.h
 *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
@@ -31,18 +31,18 @@
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
- ************************************************************/
+ ****************************************************************************/

-#ifndef __ARCH_LIMITS_H
-#define __ARCH_LIMITS_H
+#ifndef __ARCH_ARM_INCLUDE_LIMITS_H
+#define __ARCH_ARM_INCLUDE_LIMITS_H

-/************************************************************
+/****************************************************************************
 * Included Files
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Definitions
- ************************************************************/
+ ****************************************************************************/

 #define CHAR_BIT        8
 #define SCHAR_MIN	0x80
@@ -72,4 +72,4 @@
 #define LLONG_MIN	0x7fffffffffffffff
 #define ULLONG_MAX	0xffffffffffffffff

-#endif /* __ARCH_LIMITS_H */
+#endif /* __ARCH_ARM_INCLUDE_LIMITS_H */
--- a/arch/arm/include/serial.h
+++ b/arch/arm/include/serial.h
@@ -1,7 +1,7 @@
-/************************************************************
- * arch/serial.h
+/****************************************************************************
+ * arch/arm/include/serial.h
 *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
@@ -31,18 +31,18 @@
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
- ************************************************************/
+ ****************************************************************************/

-#ifndef __ARCH_SERIAL_H
-#define __ARCH_SERIAL_H
+#ifndef __ARCH_ARM_INCLUDE_SERIAL_H
+#define __ARCH_ARM_INCLUDE_SERIAL_H

-/************************************************************
+/****************************************************************************
 * Included Files
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Definitions
- ************************************************************/
+ ****************************************************************************/

 /* IOCTL commands supported by the ARM serial driver */

@@ -50,12 +50,12 @@
 #define TIOCCBRK        0x5402  /* " " "           " */
 #define TIOCSERGSTRUCT  0x5403  /* Get up_dev_t for port */

-/************************************************************
+/****************************************************************************
 * Public Data
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Public Functions
- ************************************************************/
+ ****************************************************************************/

-#endif /* __ARCH_SERIAL_H */
+#endif /* __ARCH_ARM_INCLUDE_SERIAL_H */
--- a/arch/arm/include/str71x/irq.h
+++ b/arch/arm/include/str71x/irq.h
@@ -0,0 +1,120 @@
+/************************************************************************************
+ * arch/arm/include/str71x/irq.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/* This file should never be included directed but, rather,
+ * only indirectly through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_STR71X_IRQ_H
+#define __ARCH_ARM_INCLUDE_STR71X_IRQ_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* IRQ channels */
+
+#define STR71X_IRQ_T0TIMI     (0)
+#define STR71X_IRQ_FLASH      (1)
+#define STR71X_IRQ_RCCU       (2)
+#define STR71X_IRQ_RTC        (3)
+#define STR71X_IRQ_WDG        (4)
+#define STR71X_IRQ_XTI        (5)
+#define STR71X_IRQ_USBHP      (6)
+#define STR71X_IRQ_I2C0ITERR  (7)
+#define STR71X_IRQ_I2C1ITERR  (8)
+#define STR71X_IRQ_UART0      (9)
+#define STR71X_IRQ_UART1     (10)
+#define STR71X_IRQ_UART2     (11)
+#define STR71X_IRQ_UART3     (12)
+#define STR71X_IRQ_SPI0      (13)
+#define STR71X_IRQ_SPI1      (14)
+#define STR71X_IRQ_I2C0      (15)
+#define STR71X_IRQ_I2C1      (16)
+#define STR71X_IRQ_CAN       (17)
+#define STR71X_IRQ_ADC       (18)
+#define STR71X_IRQ_T1TIMI    (19)
+#define STR71X_IRQ_T2TIMI    (20)
+#define STR71X_IRQ_T3TIMI    (21)
+#define STR71X_IRQ_HDLC      (25)
+#define STR71X_IRQ_USBLP     (26)
+#define STR71X_IRQ_T0TOI     (29)
+#define STR71X_IRQ_T0OC1     (30)
+#define STR71X_IRQ_T0OC2     (31)
+
+#define STR71X_IRQ_SYSTIMER  STR71X_IRQ_T0TIMI
+#define NR_IRQS               32
+
+/* FIQ channels */
+
+#define STR71X_FIQ_T0TIMI     (0X00000001)
+#define STR71X_FIQ_WDG        (0X00000002)
+#define STR71X_FIQ_WDGT0TIMIS (0X00000003)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_STR71X_IRQ_H */
+
--- a/arch/arm/include/types.h
+++ b/arch/arm/include/types.h
@@ -1,7 +1,7 @@
-/************************************************************
- * arch/types.h
+/****************************************************************************
+ * arch/arm/include/types.h
 *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
@@ -31,26 +31,26 @@
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
- ************************************************************/
+ ****************************************************************************/

-/* This file should never be included directed but, rather,
- * only indirectly through sys/types.h
+/* This file should never be included directed but, rather, only indirectly
+ * through sys/types.h
 */

-#ifndef __ARCH_TYPES_H
-#define __ARCH_TYPES_H
+#ifndef __ARCH_ARM_INCLUDE_TYPES_H
+#define __ARCH_ARM_INCLUDE_TYPES_H

-/************************************************************
+/****************************************************************************
 * Included Files
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Definitions
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Type Declarations
- ************************************************************/
+ ****************************************************************************/

 #ifndef __ASSEMBLY__

@@ -75,8 +75,8 @@ typedef unsigned int irqstate_t;

 #endif /* __ASSEMBLY__ */

-/************************************************************
+/****************************************************************************
 * Global Function Prototypes
- ************************************************************/
+ ****************************************************************************/

-#endif /* __ARCH_TYPES_H */
+#endif /* __ARCH_ARM_INCLUDE_TYPES_H */
--- a/arch/arm/include/watchdog.h
+++ b/arch/arm/include/watchdog.h
@@ -1,7 +1,7 @@
-/************************************************************
- * watchdog.h
+/****************************************************************************
+ * arch/arm/include/watchdog.h
 *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
@@ -31,33 +31,33 @@
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
- ************************************************************/
+ ****************************************************************************/

-#ifndef __ARCH_WATCHDOG_H
-#define __ARCH_WATCHDOG_H
+#ifndef __ARCH_ARM_INCLUDE_WATCHDOG_H
+#define __ARCH_ARM_INCLUDE_WATCHDOG_H

-/************************************************************
+/****************************************************************************
 * Included Files
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Definitions
- ************************************************************/
+ ****************************************************************************/

 /* IOCTL commands supported by the C5471 watchdog driver */

 #define WDIOC_KEEPALIVE 0x5701  /* Restart the watchdog timer */

-/************************************************************
+/****************************************************************************
 * Private Data
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Private Functions
- ************************************************************/
+ ****************************************************************************/

-/************************************************************
+/****************************************************************************
 * Public Functions
- ************************************************************/
+ ****************************************************************************/

-#endif /* __ARCH_WATCHDOG_H */
+#endif /* __ARCH_ARM_INCLUDE_WATCHDOG_H */
--- a/arch/arm/src/common/up_assert.c
+++ b/arch/arm/src/common/up_assert.c
@@ -160,7 +160,7 @@ static void up_dumpstate(void)
  if (rtcb->pid == 0)
    {
      ustackbase = g_heapbase - 4;
-      ustacksize = CONFIG_PROC_STACK_SIZE;
+      ustacksize = CONFIG_IDLETHREAD_STACKSIZE;
    }
  else
    {
--- a/arch/arm/src/common/up_blocktask.c
+++ b/arch/arm/src/common/up_blocktask.c
@@ -54,11 +54,11 @@
 ****************************************************************************/

 /****************************************************************************
- * Private Funtions
+ * Private Functions
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/common/up_copystate.c
+++ b/arch/arm/src/common/up_copystate.c
@@ -57,7 +57,7 @@
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/common/up_dataabort.c
+++ b/arch/arm/src/common/up_dataabort.c
@@ -66,7 +66,7 @@
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/common/up_doirq.c
+++ b/arch/arm/src/common/up_doirq.c
@@ -63,7 +63,7 @@
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 void up_doirq(int irq, uint32* regs)
--- a/arch/arm/src/common/up_exit.c
+++ b/arch/arm/src/common/up_exit.c
@@ -148,7 +148,7 @@ void _exit(int status)

  (void)irqsave();

-  slldbg("TCB=%p exitting\n", tcb);
+  slldbg("TCB=%p exitting\n", g_readytorun.head);

 #if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
  slldbg("Other tasks:\n");
@@ -164,7 +164,6 @@ void _exit(int status)
   */

  tcb = (_TCB*)g_readytorun.head;
-  slldbg("New Active Task TCB=%p\n", tcb);

  /* Then switch contexts */

--- a/arch/arm/src/common/up_head.S
+++ b/arch/arm/src/common/up_head.S
@@ -297,7 +297,7 @@ __start:
 	 * _sbss is the start of the BSS region (see ld.script)
 	 * _ebss is the end of the BSS regsion (see ld.script)
 	 * The idle task stack starts at the end of BSS and is
-	 * of size CONFIG_PROC_STACK_SIZE.  The heap continues
+	 * of size CONFIG_IDLETHREAD_STACKSIZE.  The heap continues
 	 * from there until the end of memory.  See g_heapbase
 	 * below.
 	 */
@@ -305,7 +305,7 @@ __start:
 .Linitparms:
 	.long	_sbss
 	.long	_ebss
-	.long	_ebss+CONFIG_PROC_STACK_SIZE-4
+	.long	_ebss+CONFIG_IDLETHREAD_STACKSIZE-4
 	.size	.Lvstart, .-.Lvstart

 	/* This global variable is unsigned long g_heapbase and is
@@ -318,7 +318,7 @@ __start:
 	.globl	g_heapbase
 	.type	g_heapbase, object
 g_heapbase:
-	.long	_ebss+CONFIG_PROC_STACK_SIZE
+	.long	_ebss+CONFIG_IDLETHREAD_STACKSIZE
 	.size	g_heapbase, .-g_heapbase
 	.end

--- a/arch/arm/src/common/up_idle.c
+++ b/arch/arm/src/common/up_idle.c
@@ -51,11 +51,11 @@
 ****************************************************************************/

 /****************************************************************************
- * Private Funtions
+ * Private Functions
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/common/up_initialstate.c
+++ b/arch/arm/src/common/up_initialstate.c
@@ -53,11 +53,11 @@
 ****************************************************************************/

 /****************************************************************************
- * Private Funtions
+ * Private Functions
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/common/up_nommuhead.S
+++ b/arch/arm/src/common/up_nommuhead.S
@@ -132,14 +132,14 @@ __start:
 	 * _sbss is the start of the BSS region (see ld.script)
 	 * _ebss is the end of the BSS regsion (see ld.script)
 	 * The idle task stack starts at the end of BSS and is
-	 * of size CONFIG_PROC_STACK_SIZE.  The heap continues
+	 * of size CONFIG_IDLETHREAD_STACKSIZE.  The heap continues
 	 * from there until the end of memory.  See g_heapbase
 	 * below.
 	 */

 LC0:	.long	_sbss
 	.long	_ebss
-	.long	_ebss+CONFIG_PROC_STACK_SIZE-4
+	.long	_ebss+CONFIG_IDLETHREAD_STACKSIZE-4

 #ifdef CONFIG_BOOT_FROM_FLASH
 LC2:	.long	_eronly	/* Where .data defaults are stored in FLASH */
@@ -158,7 +158,7 @@ LC2:	.long	_eronly	/* Where .data defaults are stored in FLASH */
 	.globl	g_heapbase
 	.type	g_heapbase, object
 g_heapbase:
-	.long	_ebss+CONFIG_PROC_STACK_SIZE
+	.long	_ebss+CONFIG_IDLETHREAD_STACKSIZE
 	.size	g_heapbase, .-g_heapbase

 	.end
--- a/arch/arm/src/common/up_prefetchabort.c
+++ b/arch/arm/src/common/up_prefetchabort.c
@@ -66,7 +66,7 @@
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/common/up_releasepending.c
+++ b/arch/arm/src/common/up_releasepending.c
@@ -54,11 +54,11 @@
 ****************************************************************************/

 /****************************************************************************
- * Private Funtions
+ * Private Functions
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/common/up_reprioritizertr.c
+++ b/arch/arm/src/common/up_reprioritizertr.c
@@ -54,11 +54,11 @@
 ****************************************************************************/

 /****************************************************************************
- * Private Funtions
+ * Private Functions
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/common/up_schedulesigaction.c
+++ b/arch/arm/src/common/up_schedulesigaction.c
@@ -60,11 +60,11 @@
 ****************************************************************************/

 /****************************************************************************
- * Private Funtions
+ * Private Functions
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/common/up_sigdeliver.c
+++ b/arch/arm/src/common/up_sigdeliver.c
@@ -65,7 +65,7 @@
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/common/up_unblocktask.c
+++ b/arch/arm/src/common/up_unblocktask.c
@@ -55,11 +55,11 @@
 ****************************************************************************/

 /****************************************************************************
- * Private Funtions
+ * Private Functions
 ****************************************************************************/

 /****************************************************************************
- * Public Funtions
+ * Public Functions
 ****************************************************************************/

 /****************************************************************************
--- a/arch/arm/src/lpc214x/lpc214x_decodeirq.c
+++ b/arch/arm/src/lpc214x/lpc214x_decodeirq.c
@@ -65,7 +65,7 @@
 * Private Data
 ********************************************************************************/

-/* This type arry maps 4 bits into the bit number of the lowest bit that it set */
+/* This array maps 4 bits into the bit number of the lowest bit that it set */

 #ifndef CONFIG_SUPPRESS_INTERRUPTS
 static uint8 g_nibblemap[16] = { 0, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0 };
--- a/arch/arm/src/lpc214x/lpc214x_head.S
+++ b/arch/arm/src/lpc214x/lpc214x_head.S
@@ -592,14 +592,14 @@ __start:
 	 * _sbss is the start of the BSS region (see ld.script)
 	 * _ebss is the end of the BSS regsion (see ld.script)
 	 * The idle task stack starts at the end of BSS and is
-	 * of size CONFIG_PROC_STACK_SIZE.  The heap continues
+	 * of size CONFIG_IDLETHREAD_STACKSIZE.  The heap continues
 	 * from there until the end of memory.  See g_heapbase
 	 * below.
 	 */

 LC0:	.long	_sbss
 	.long	_ebss
-	.long	_ebss+CONFIG_PROC_STACK_SIZE-4
+	.long	_ebss+CONFIG_IDLETHREAD_STACKSIZE-4

 #ifdef CONFIG_BOOT_FROM_FLASH
 LC2:	.long	_eronly	/* Where .data defaults are stored in FLASH */
@@ -618,7 +618,7 @@ LC2:	.long	_eronly	/* Where .data defaults are stored in FLASH */
 	.globl	g_heapbase
 	.type	g_heapbase, object
 g_heapbase:
-	.long	_ebss+CONFIG_PROC_STACK_SIZE
+	.long	_ebss+CONFIG_IDLETHREAD_STACKSIZE
 	.size	g_heapbase, .-g_heapbase

 	.end
--- a/arch/arm/src/str71x/Make.defs
+++ b/arch/arm/src/str71x/Make.defs
@@ -0,0 +1,57 @@
+##############################################################################
+# arch/arm/src/str71x/Make.defs
+#
+#   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+##############################################################################
+
+HEAD_ASRC	= str71x_head.S
+
+CMN_ASRCS	= up_saveusercontext.S up_fullcontextrestore.S up_vectors.S
+CMN_CSRCS	= up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
+		  up_createstack.c up_dataabort.c up_mdelay.c up_udelay.c \
+		  up_exit.c up_idle.c up_initialize.c up_initialstate.c \
+		  up_interruptcontext.c up_prefetchabort.c up_releasepending.c \
+		  up_releasestack.c up_reprioritizertr.c up_syscall.c up_unblocktask.c \
+		  up_undefinedinsn.c up_usestack.c up_lowputs.c
+
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+CMN_CSRCS	+= up_schedulesigaction.c up_sigdeliver.c
+endif
+
+CHIP_ASRCS	= 
+CHIP_CSRCS	= str71x_prccu.c str71x_lowputc.c str71x_decodeirq.c str71x_irq.c \
+		  str71x_timerisr.c str71x_serial.c
+
+ifeq ($(CONFIG_USBDEV),y)
+CHIP_CSRCS	+= str71x_usbdev.c
+endif
+
--- a/arch/arm/src/str71x/chip.h
+++ b/arch/arm/src/str71x/chip.h
@@ -0,0 +1,81 @@
+/************************************************************************************
+ * arch/arm/src/str71x/chip.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_CHIP_H
+#define __ARCH_ARM_SRC_STR71X_CHIP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+#include "str71x_map.h"     /* Memory map */
+#include "str71x_emi.h"     /* External memory interface */
+#include "str71x_rccu.h"    /* Reset and clock control unit */
+#include "str71x_pcu.h"     /* Power control unit */
+#include "str71x_gpio.h"    /* I/O ports */
+#include "str71x_eic.h"     /* Enhanced interrupt controller */
+#include "str71x_xti.h"     /* External interrupts (XTI) */
+#include "str71x_rtc.h"     /* Real Time Clock (RTC) */
+#include "str71x_wdog.h"    /* Watchdog timer */
+#include "str71x_timer.h"   /* Timers */
+#include "str71x_can.h"     /* Controller Area Network (CAN) */
+#include "str71x_i2c.h"     /* I2C */
+#include "str71x_bspi.h"    /* Buffered SPI (BSPI) */
+#include "str71x_uart.h"    /* UART */
+#include "str71x_usb.h"     /* USB */
+#include "str71x_adc12.h"   /* ADC */
+#include "str71x_apb.h"     /* USB */
+#include "str71x_flash.h"   /* Flash */
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_CHIP_H */
--- a/arch/arm/src/str71x/str71x_adc12.h
+++ b/arch/arm/src/str71x/str71x_adc12.h
@@ -0,0 +1,109 @@
+/************************************************************************************
+ * arch/arm/src/str71x/str71x_adc12.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_ADC12_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_ADC12_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* ADC12 registers ******************************************************************/
+
+#define STR71X_ADC12_DATA0    (STR71X_ADC12_BASE + 0x0000)    /* 16-bits wide */
+#define STR71X_ADC12_DATA1    (STR71X_ADC12_BASE + 0x0008)    /* 16-bits wide */
+#define STR71X_ADC12_DATA2    (STR71X_ADC12_BASE + 0x0010)    /* 16-bits wide */
+#define STR71X_ADC12_DATA3    (STR71X_ADC12_BASE + 0x0018)    /* 16-bits wide */
+#define STR71X_ADC12_CSR      (STR71X_ADC12_BASE + 0x0020)    /* 16-bits wide */
+#define STR71X_ADC12_CPR      (STR71X_ADC12_BASE + 0x0030)    /* 16-bits wide */
+
+/* Register bit settings ************************************************************/
+/* ADC12 Conversion modes */
+
+#define STR71X_ADC12_SINGLE   (0)
+#define STR71X_ADC12_ROUND    (1)
+
+/* ADC12 Channels */
+
+#define STR71X_ADC12_CHANNEL0 (0x00)
+#define STR71X_ADC12_CHANNEL1 (0x10)
+#define STR71X_ADC12_CHANNEL2 (0x20)
+#define STR71X_ADC12_CHANNEL3 (0x30)
+
+/* ADC12 control status register */
+
+#define STR71X_ADC12_DA0      (0x0001)
+#define STR71X_ADC12_DA1      (0x0002)
+#define STR71X_ADC12_DA2      (0x0004)
+#define STR71X_ADC12_DA3      (0x0008)
+#define STR71X_ADC12_OR       (0x2000)
+
+/* Interrupt bits for channel n */
+
+#define STR71X_ADC12_IT0      (0x0100)
+#define STR71X_ADC12_IT1      (0x0200)
+#define STR71X_ADC12_IT2      (0x0400)
+#define STR71X_ADC12_IT3      (0x0800)
+#define STR71X_ADC12_ITALL    (0x0f00)
+
+/* Mode selection */
+
+#define STR71X_ADC12_MODE     (0x0040)
+
+/* Converter configuration */
+
+#define STR71X_ADC12_START    (0x0020)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_ADC12_H */
--- a/arch/arm/src/str71x/str71x_apb.h
+++ b/arch/arm/src/str71x/str71x_apb.h
@@ -0,0 +1,109 @@
+/************************************************************************************
+ * arch/arm/src/str71x/str71x_apb.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_APB_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_APB_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* APB register offsets *************************************************************/
+
+#define STR71X_APB_CKDIS_OFFSET   (0x0010) /* 32-bits wide */
+#define STR71X_APB_SWRES_OFFSET   (0x0014) /* 32-bits wide */
+
+/* APB register addresses ***********************************************************/
+
+#define STR71X_APB1_CKDIS         (STR71X_APB1_BASE + STR71X_APB_CKDIS_OFFSET)
+#define STR71X_APB1_SWRES         (STR71X_APB1_BASE + STR71X_APB_SWRES_OFFSET)
+
+#define STR71X_APB2_CKDIS         (STR71X_APB2_BASE + STR71X_APB_CKDIS_OFFSET)
+#define STR71X_APB2_SWRES         (STR71X_APB2_BASE + STR71X_APB_SWRES_OFFSET)
+
+/* Register bit settings ***********************************************************/
+
+/* APB1 periperals */
+
+#define STR71X_APB1_I2C0          (0x0001) /* Bit 0:  I2C0 */
+#define STR71X_APB1_I2C1          (0x0002) /* Bit 1:  I2C1 */
+#define STR71X_APB1_UART0         (0x0008) /* Bit 3:  UART0 */
+#define STR71X_APB1_UART1         (0x0010) /* Bit 4:  UART1 */
+#define STR71X_APB1_UART2         (0x0020) /* Bit 5:  UART2 */
+#define STR71X_APB1_UART3         (0x0040) /* Bit 6:  UART3 */
+#define STR71X_APB1_USB           (0x0080) /* Bit 7:  USB */
+#define STR71X_APB1_CAN           (0x0100) /* Bit 8:  CAN */
+#define STR71X_APB1_BSPI0         (0x0200) /* Bit 9:  BSPI0 */
+#define STR71X_APB1_BSPI1         (0x0400) /* Bit 10: BSPI1 */
+#define STR71X_APB1_HDLC          (0x2000) /* Bit 13: HDLC */
+#define STR71X_APB1_APB1ALL       (0x27fb)
+
+/* APB2 Peripherals */
+
+#define STR71X_APB2_XTI           (0x0001) /* Bit 0:  XTI */
+#define STR71X_APB2_GPIO0         (0x0004) /* Bit 2:  IOPORT0 */
+#define STR71X_APB2_GPIO1         (0x0008) /* Bit 3:  IOPORT1 */
+#define STR71X_APB2_GPIO2         (0x0010) /* Bit 4:  IOPORT2 */
+#define STR71X_APB2_ADC12         (0x0040) /* Bit 6:  ADC */
+#define STR71X_APB2_CKOUT         (0x0080) /* Bit 7:  CKOUT */
+#define STR71X_APB2_TIM0          (0x0100) /* Bit 8:  TIMER0 */
+#define STR71X_APB2_TIM1          (0x0200) /* Bit 9:  TIMER1 */
+#define STR71X_APB2_TIM2          (0x0400) /* Bit 10: TIMER2 */
+#define STR71X_APB2_TIM3          (0x0800) /* Bit 11: TIMER3 */
+#define STR71X_APB2_RTC           (0x1000) /* Bit 12: RTC */
+#define STR71X_APB2_EIC           (0x4000) /* Bit 14: EIC */
+#define STR71X_APB2_APB2ALL       (0x5fdd)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_APB_H */
--- a/arch/arm/src/str71x/str71x_bspi.h
+++ b/arch/arm/src/str71x/str71x_bspi.h
@@ -0,0 +1,147 @@
+/************************************************************************************
+ * arch/arm/src/str71x/str71x_bspi.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_BSPI_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_BSPI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define STR71X_BSPI_RXR_OFFSET  (0x0000) /* 16-bits wide */
+#define STR71X_BSPI_TXR_OFFSET  (0x0004) /* 16-bits wide */
+#define STR71X_BSPI_CSR1_OFFSET (0x0008) /* 16-bits wide */
+#define STR71X_BSPI_CSR2_OFFSET (0x000c) /* 16-bits wide */
+#define STR71X_BSPI_CLK_OFFSET  (0x0010) /* 16-bits wide */
+
+/* Registers ************************************************************************/
+
+#define STR71X_BSPI_RXR(b)      ((b) + STR71X_BSPI_RXR_OFFSET)
+#define STR71X_BSPI_TXR(b)      ((b) + STR71X_BSPI_TXR_OFFSET)
+#define STR71X_BSPI_CSR1(b)     ((b) + STR71X_BSPI_CSR1_OFFSET)
+#define STR71X_BSPI_CSR2(b)     ((b) + STR71X_BSPI_CSR2_OFFSET)
+#define STR71X_BSPI_CLK(b)      ((b) + STR71X_BSPI_CLK_OFFSET)
+
+#define STR71X_BSPI0_RXR        (STR71X_BSPI0_BASE + STR71X_BSPI_RXR_OFFSET)
+#define STR71X_BSPI0_TXR        (STR71X_BSPI0_BASE + STR71X_BSPI_TXR_OFFSET)
+#define STR71X_BSPI0_CSR1       (STR71X_BSPI0_BASE + STR71X_BSPI_CSR1_OFFSET)
+#define STR71X_BSPI0_CSR2       (STR71X_BSPI0_BASE + STR71X_BSPI_CSR2_OFFSET)
+#define STR71X_BSPI0_CLK        (STR71X_BSPI0_BASE + STR71X_BSPI_CLK_OFFSET)
+
+#define STR71X_BSPI1_RXR        (STR71X_BSPI1_BASE + STR71X_BSPI_RXR_OFFSET)
+#define STR71X_BSPI1_TXR        (STR71X_BSPI1_BASE + STR71X_BSPI_TXR_OFFSET)
+#define STR71X_BSPI1_CSR1       (STR71X_BSPI1_BASE + STR71X_BSPI_CSR1_OFFSET)
+#define STR71X_BSPI1_CSR2       (STR71X_BSPI1_BASE + STR71X_BSPI_CSR2_OFFSET)
+#define STR71X_BSPI1_CLK        (STR71X_BSPI1_BASE + STR71X_BSPI_CLK_OFFSET)
+
+/* Register bit settings ***********************************************************/
+
+/* BSPI control/status register 1 */
+
+#define STR71X_BSPICSR1_BSPE        0x0001 /* Bit 0: BSPI enable */
+#define STR71X_BSPICSR1_MSTR        0x0002 /* Bit 1: Master/Slave select */
+#define STR71X_BSPICSR1_RIEMASK     0x000c /* Bit 2-3: BSPI receive interrupt enable */
+#define STR71X_BSPICSR1_RIEDISABLED 0x0000 /*   Disabled */
+#define STR71X_BSPICSR1_RIERFNE     0x0004 /*   Receive FIFO not empty */
+#define STR71X_BSPICSR1_RIERFF      0x000c /*   Receive FIFO full */
+#define STR71X_BSPICSR1_BEIE        0x0080 /* Bit 7: Bus error interrupt enable */
+#define STR71X_BSPICSR1_CPOL        0x0100 /* Bit 8: Clock polarity select */
+#define STR71X_BSPICSR1_CPHA        0x0200 /* Bit 9: Clock phase select */
+#define STR71X_BSPICSR1_WLMASK      0x0c00 /* Bits 10-11: Word length */
+#define STR71X_BSPICSR1_WL8BIT      0x0000 /*   8-bits */
+#define STR71X_BSPICSR1_WL16BIT     0x0400 /*   16-bits */
+#define STR71X_BSPICSR1_RFEMASK     0xf000 /* Bits 12-15: Receive FIFO enable */
+#define STR71X_BSPICSR1_RFE1        0x0000 /*   Word 1 enabled */
+#define STR71X_BSPICSR1_RFE12       0x1000 /*   Word 1-2 enabled */
+#define STR71X_BSPICSR1_RFE13       0x2000 /*   Word 1-3 enabled */
+#define STR71X_BSPICSR1_RFE14       0x3000 /*   Word 1-4 enabled */
+#define STR71X_BSPICSR1_RFE15       0x4000 /*   Word 1-5 enabled */
+#define STR71X_BSPICSR1_RFE16       0x5000 /*   Word 1-6 enabled */
+#define STR71X_BSPICSR1_RFE17       0x6000 /*   Word 1-7 enabled */
+#define STR71X_BSPICSR1_RFE18       0x7000 /*   Word 1-8 enabled */
+#define STR71X_BSPICSR1_RFE19       0x8000 /*   Word 1-9 enabled */
+#define STR71X_BSPICSR1_RFE110      0x9000 /*   Word 1-10 enabled */
+
+/* BSPI control/status register 1 */
+
+#define STR71X_BSPICSR2_DFIFO       0x0000 /* Bit 0: FIFO disable */
+#define STR71X_BSPICSR2_BERR        0x0000 /* Bit 2: Bus error */
+#define STR71X_BSPICSR2_RFNE        0x0000 /* Bit 3: Receiver FIFO not empty */
+#define STR71X_BSPICSR2_RFF         0x0000 /* Bit 4: Receiver FIFO full */
+#define STR71X_BSPICSR2_ROFL        0x0000 /* Bit 5: Receiver overflow */
+#define STR71X_BSPICSR2_TFE         0x0000 /* Bit 6: Transmit FIFO empty */
+#define STR71X_BSPICSR2_TUFL        0x0000 /* Bit 7: Transmit FIFO underflow */
+#define STR71X_BSPICSR2_TFF         0x0000 /* Bit 8: Transmit FIFO full */
+#define STR71X_BSPICSR2_TFNE        0x0000 /* Bit 9: Transmit FIFO not empty */
+#define STR71X_BSPICSR2_TFEMASK     0x3c00 /* Bit 10-13:  Transmit FIFO enable*/
+#define STR71X_BSPICSR2_TFE1        0x0000 /*   Word 1 enabled  */
+#define STR71X_BSPICSR2_TFE12       0x0000 /*   Word 1-2 enabled  */
+#define STR71X_BSPICSR2_TFE13       0x0000 /*   Word 1-3 enabled  */
+#define STR71X_BSPICSR2_TFE14       0x0000 /*   Word 1-4 enabled  */
+#define STR71X_BSPICSR2_TFE15       0x0000 /*   Word 1-5 enabled  */
+#define STR71X_BSPICSR2_TFE16       0x0000 /*   Word 1-6 enabled  */
+#define STR71X_BSPICSR2_TFE17       0x0000 /*   Word 1-7 enabled  */
+#define STR71X_BSPICSR2_TFE18       0x0000 /*   Word 1-8 enabled  */
+#define STR71X_BSPICSR2_TFE19       0x0000 /*   Word 1-9 enabled  */
+#define STR71X_BSPICSR2_TFE110      0x0000 /*   Word 1-10 enabled  */
+#define STR71X_BSPICSR2_TIEMASK     0xc000 /* Bit 14-15:  BSPI transmit interrupt enable */
+#define STR71X_BSPICSR2_TIEDISABLED 0x0000 /*   Disabled  */
+#define STR71X_BSPICSR2_TIETFE      0x4000 /*   Interrupt on transmit FIFO empty  */
+#define STR71X_BSPICSR2_TIETUFL     0x8000 /*   Interrupt on transmit underlow */
+#define STR71X_BSPICSR2_TIETFF      0xc000 /*   Interrupt on transmit FIFO full  */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_BSPI_H */
--- a/arch/arm/src/str71x/str71x_can.h
+++ b/arch/arm/src/str71x/str71x_can.h
@@ -0,0 +1,207 @@
+/************************************************************************************
+ * arch/arm/src/str71x/str71x_can.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_CAN_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_CAN_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Registers ************************************************************************/
+
+#define STR71X_CAN_CR           (STR71X_CAN_BASE + 0x0000) /* 16-bits wide */
+#define STR71X_CAN_SR           (STR71X_CAN_BASE + 0x0004) /* 16-bits wide */
+#define STR71X_CAN_ERR          (STR71X_CAN_BASE + 0x0008) /* 16-bits wide */
+#define STR71X_CAN_BTR          (STR71X_CAN_BASE + 0x000c) /* 16-bits wide */
+#define STR71X_CAN_IDR          (STR71X_CAN_BASE + 0x0010) /* 16-bits wide */
+#define STR71X_CAN_TESTR        (STR71X_CAN_BASE + 0x0014) /* 16-bits wide */
+#define STR71X_CAN_BRPR         (STR71X_CAN_BASE + 0x0018) /* 16-bits wide */
+
+#define STR71X_CAN_IF1BASE      (STR71X_CAN_BASE + 0x0020)
+#define STR71X_CAN_IF2BASE      (STR71X_CAN_BASE + 0x0080)
+
+#define STR71X_CAN_CRR_OFFSET   (0x0000) /* 16-bits wide */
+#define STR71X_CAN_CMR_OFFSET   (0x0004) /* 16-bits wide */
+#define STR71X_CAN_M1R_OFFSET   (0x0008) /* 16-bits wide */
+#define STR71X_CAN_M2R_OFFSET   (0x000c) /* 16-bits wide */
+#define STR71X_CAN_A1R_OFFSET   (0x0010) /* 16-bits wide */
+#define STR71X_CAN_A2R_OFFSET   (0x0014) /* 16-bits wide */
+#define STR71X_CAN_MCR_OFFSET   (0x0018) /* 16-bits wide */
+#define STR71X_CAN_DA1R_OFFSET  (0x001c) /* 16-bits wide */
+#define STR71X_CAN_DA2R_OFFSET  (0x0020) /* 16-bits wide */
+#define STR71X_CAN_DB1R_OFFSET  (0x0024) /* 16-bits wide */
+#define STR71X_CAN_DB2R_OFFSET  (0x0028) /* 16-bits wide */
+
+#define STR71X_CAN_CRR(b)       ((b) + STR71X_CAN_CRR_OFFSET)
+#define STR71X_CAN_CMR(b)       ((b) + STR71X_CAN_CMR_OFFSET)
+#define STR71X_CAN_M1R(b)       ((b) + STR71X_CAN_M1R_OFFSET)
+#define STR71X_CAN_M2R(b)       ((b) + STR71X_CAN_M2R_OFFSET)
+#define STR71X_CAN_A1R(b)       ((b) + STR71X_CAN_A1R_OFFSET)
+#define STR71X_CAN_A2R(b)       ((b) + STR71X_CAN_A2R_OFFSET)
+#define STR71X_CAN_MCR(b)       ((b) + STR71X_CAN_MCR_OFFSET)
+#define STR71X_CAN_DA1R(b)      ((b) + STR71X_CAN_DA1R_OFFSET)
+#define STR71X_CAN_DA2R(b)      ((b) + STR71X_CAN_DA2R_OFFSET)
+#define STR71X_CAN_DB1R(b)      ((b) + STR71X_CAN_DB1R_OFFSET)
+#define STR71X_CAN_DB2R(b)      ((b) + STR71X_CAN_DB2R_OFFSET)
+
+#define STR71X_CAN_IF1CRR       (STR71X_CAN_IF1BASE + STR71X_CAN_CRR_OFFSET)
+#define STR71X_CAN_IF1CMR       (STR71X_CAN_IF1BASE + STR71X_CAN_CMR_OFFSET)
+#define STR71X_CAN_IF1M1R       (STR71X_CAN_IF1BASE + STR71X_CAN_M1R_OFFSET)
+#define STR71X_CAN_IF1M2R       (STR71X_CAN_IF1BASE + STR71X_CAN_M2R_OFFSET)
+#define STR71X_CAN_IF1A1R       (STR71X_CAN_IF1BASE + STR71X_CAN_A1R_OFFSET)
+#define STR71X_CAN_IF1A2R       (STR71X_CAN_IF1BASE + STR71X_CAN_A2R_OFFSET)
+#define STR71X_CAN_IF1MCR       (STR71X_CAN_IF1BASE + STR71X_CAN_MCR_OFFSET)
+#define STR71X_CAN_IF1DA1R      (STR71X_CAN_IF1BASE + STR71X_CAN_DA1R_OFFSET)
+#define STR71X_CAN_IF1DA2R      (STR71X_CAN_IF1BASE + STR71X_CAN_DA2R_OFFSET)
+#define STR71X_CAN_IF1DB1R      (STR71X_CAN_IF1BASE + STR71X_CAN_DB1R_OFFSET)
+#define STR71X_CAN_IF1DB2R      (STR71X_CAN_IF1BASE + STR71X_CAN_DB2R_OFFSET)
+
+#define STR71X_CAN_IF2CRR       (STR71X_CAN_IF2BASE + STR71X_CAN_CRR_OFFSET)
+#define STR71X_CAN_IF2CMR       (STR71X_CAN_IF2BASE + STR71X_CAN_CMR_OFFSET)
+#define STR71X_CAN_IF2M1R       (STR71X_CAN_IF2BASE + STR71X_CAN_M1R_OFFSET)
+#define STR71X_CAN_IF2M2R       (STR71X_CAN_IF2BASE + STR71X_CAN_M2R_OFFSET)
+#define STR71X_CAN_IF2A1R       (STR71X_CAN_IF2BASE + STR71X_CAN_A1R_OFFSET)
+#define STR71X_CAN_IF2A2R       (STR71X_CAN_IF2BASE + STR71X_CAN_A2R_OFFSET)
+#define STR71X_CAN_IF2MCR       (STR71X_CAN_IF2BASE + STR71X_CAN_MCR_OFFSET)
+#define STR71X_CAN_IF2DA1R      (STR71X_CAN_IF2BASE + STR71X_CAN_DA1R_OFFSET)
+#define STR71X_CAN_IF2DA2R      (STR71X_CAN_IF2BASE + STR71X_CAN_DA2R_OFFSET)
+#define STR71X_CAN_IF2DB1R      (STR71X_CAN_IF2BASE + STR71X_CAN_DB1R_OFFSET)
+#define STR71X_CAN_IF2DB2R      (STR71X_CAN_IF2BASE + STR71X_CAN_DB2R_OFFSET)
+
+#define STR71X_CAN_TR1R         (STR71X_CAN_BASE + 0x0100) /* 16-bits wide */
+#define STR71X_CAN_TR2R         (STR71X_CAN_BASE + 0x0104) /* 16-bits wide */
+#define STR71X_CAN_ND1R         (STR71X_CAN_BASE + 0x0120) /* 16-bits wide */
+#define STR71X_CAN_ND2R         (STR71X_CAN_BASE + 0x0124) /* 16-bits wide */
+#define STR71X_CAN_IP1R         (STR71X_CAN_BASE + 0x0140) /* 16-bits wide */
+#define STR71X_CAN_IP2R         (STR71X_CAN_BASE + 0x0144) /* 16-bits wide */
+#define STR71X_CAN_MV1R         (STR71X_CAN_BASE + 0x0160) /* 16-bits wide */
+#define STR71X_CAN_MV2R         (STR71X_CAN_BASE + 0x0164) /* 16-bits wide */
+
+/* Register bit settings ***********************************************************/
+
+/* Control register */
+
+#define STR41X_CANCR_INIT       (0x0001)
+#define STR41X_CANCR_IE         (0x0002)
+#define STR41X_CANCR_SIE        (0x0004)
+#define STR41X_CANCR_EIE        (0x0008)
+#define STR41X_CANCR_DAR        (0x0020)
+#define STR41X_CANCR_CCE        (0x0040)
+#define STR41X_CANCR_TEST       (0x0080)
+
+/* Status register */
+
+#define STR41X_CANSR_LEC        (0x0007)
+#define STR41X_CANSR_TXOK       (0x0008)
+#define STR41X_CANSR_RXOK       (0x0010)
+#define STR41X_CANSR_EPASS      (0x0020)
+#define STR41X_CANSR_EWARN      (0x0040)
+#define STR41X_CANSR_BOFF       (0x0080)
+
+/* Test register */
+
+#define STR41X_CANTESTR_BASIC   (0x0004)
+#define STR41X_CANTESTR_SILENT  (0x0008)
+#define STR41X_CANTESTR_LBACK   (0x0010)
+#define STR41X_CANTESTR_TX0     (0x0020)
+#define STR41X_CANTESTR_TX1     (0x0040)
+#define STR41X_CANTESTR_RX      (0x0080)
+
+/* IFn / Command Request register */
+
+#define STR41X_CANCRR_BUSY      (0x8000)
+
+/* IFn / Command Mask register */
+
+#define STR41X_CANCMR_DATAB     (0x0001)
+#define STR41X_CANCMR_DATAA     (0x0002)
+#define STR41X_CANCMR_TXRQST    (0x0004)
+#define STR41X_CANCMR_CLRINTPND (0x0008)
+#define STR41X_CANCMR_CONTROL   (0x0010)
+#define STR41X_CANCMR_ARB       (0x0020)
+#define STR41X_CANCMR_MASK      (0x0040)
+#define STR41X_CANCMR_WRRD      (0x0080)
+
+/* IFn / Mask 2 register */
+
+#define STR41X_CANM2R_MXTD      (0x8000)
+#define STR41X_CANM2R_MDIR      (0x4000)
+
+/* IFn / Arbitration 2 register */
+
+#define STR41X_CANA2R_DIR       (0x2000)
+#define STR41X_CANA2R_XTD       (0x4000)
+#define STR41X_CANA2R_MSGVAL    (0x8000)
+
+/* IFn / Message Control register */
+
+#define STR41X_CANMCR_EOB       (0x0080)
+#define STR41X_CANMCR_TXRQST    (0x0100)
+#define STR41X_CANMCR_RMTEN     (0x0200)
+#define STR41X_CANMCR_RXIE      (0x0400)
+#define STR41X_CANMCR_TXIE      (0x0800)
+#define STR41X_CANMCR_UMASK     (0x1000)
+#define STR41X_CANMCR_INTPND    (0x2000)
+#define STR41X_CANMCR_MSGLST    (0x4000)
+#define STR41X_CANMCR_NEWDAT    (0x8000)
+
+/* Message ID limits */
+
+#define STR41X_CAN_LASTSTDID    ((1 << 11) - 1)
+#define STR41X_CAN_LASTEXTID    ((1 << 29) - 1)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_CAN_H */
+
--- a/arch/arm/src/str71x/str71x_decodeirq.c
+++ b/arch/arm/src/str71x/str71x_decodeirq.c
@@ -0,0 +1,125 @@
+/********************************************************************************
+ * arch/arm/src/str71x/str71x_decodeirq.c
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************/
+
+/********************************************************************************
+ * Included Files
+ ********************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <assert.h>
+#include <debug.h>
+
+#include "up_arch.h"
+#include "os_internal.h"
+#include "up_internal.h"
+#include "chip.h"
+
+/********************************************************************************
+ * Definitions
+ ********************************************************************************/
+
+/********************************************************************************
+ * Private Types
+ ********************************************************************************/
+
+/********************************************************************************
+ * Public Data
+ ********************************************************************************/
+
+/********************************************************************************
+ * Private Data
+ ********************************************************************************/
+
+/********************************************************************************
+ * Private Functions
+ ********************************************************************************/
+
+/********************************************************************************
+ * Public Funstions
+ ********************************************************************************/
+
+/********************************************************************************
+ * up_decodeirq()
+ *
+ * Description:
+ *   Read the IRQ number from the IVR register.  During intialization, the IVR
+ *   register was set to zero.  Each SIR[n] register was programmed to contain
+ *   the IRQ number.  At IRQ processing time (when this function run), the IVR
+ *   should contain the desired IRQ number.
+ *
+ ********************************************************************************/
+
+void up_decodeirq(uint32 *regs)
+{
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+  lib_lowprintf("Unexpected IRQ\n");
+  current_regs = regs;
+  PANIC(OSERR_ERREXCEPTION);
+#else
+  /* Read the IRQ number from the IVR register (Could probably get the same
+   * info from CIC register without the setup.
+   */
+
+  unsigned int irq = getreg32(STR71X_EIC_IVR);
+
+  /* Verify that the resulting IRQ number is valid */
+
+  if (irq < NR_IRQS)
+    {
+      /* Current regs non-zero indicates that we are processing an interrupt;
+       * current_regs is also used to manage interrupt level context switches.
+       */
+
+      current_regs = regs;
+
+      /* Deliver the IRQ */
+
+      irq_dispatch(irq, regs);
+
+      /* Indicate that we are no long in an interrupt handler */
+
+      current_regs = NULL;
+    }
+#if CONFIG_DEBUG
+  else
+    {
+      PANIC(OSERR_ERREXCEPTION); /* Normally never happens */
+    }
+#endif
+#endif
+}
--- a/arch/arm/src/str71x/str71x_eic.h
+++ b/arch/arm/src/str71x/str71x_eic.h
@@ -0,0 +1,173 @@
+/************************************************************************************
+ * arch/arm/src/str71x/str71x_eic.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_EIC_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_EIC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <arch/irq.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Enhanced Interupt Controller (EIC) register offsets ******************************/
+
+#define STR71X_EIC_ICR_OFFSET      (0x0000)  /* 32-bits wide */
+#define STR71X_EIC_CICR_OFFSET     (0x0004)  /* 32-bits wide */
+#define STR71X_EIC_CIPR_OFFSET     (0x0008)  /* 32-bits wide */
+#define STR71X_EIC_IVR_OFFSET      (0x0018)  /* 32-bits wide */
+#define STR71X_EIC_FIR_OFFSET      (0x001c)  /* 32-bits wide */
+#define STR71X_EIC_IER_OFFSET      (0x0020)  /* 32-bits wide */
+#define STR71X_EIC_IPR_OFFSET      (0x0040)  /* 32-bits wide */
+
+#define STR71X_EIC_SIR_OFFSET      (0x0060)  /* 32 x 32-bits */
+#define STR71X_EIC_SIR0_OFFSET     (0x0060)  /* 32-bits wide */
+#define STR71X_EIC_SIR1_OFFSET     (0x0064)  /* 32-bits wide */
+#define STR71X_EIC_SIR2_OFFSET     (0x0068)  /* 32-bits wide */
+#define STR71X_EIC_SIR3_OFFSET     (0x006c)  /* 32-bits wide */
+#define STR71X_EIC_SIR4_OFFSET     (0x0070)  /* 32-bits wide */
+#define STR71X_EIC_SIR5_OFFSET     (0x0074)  /* 32-bits wide */
+#define STR71X_EIC_SIR6_OFFSET     (0x0078)  /* 32-bits wide */
+#define STR71X_EIC_SIR7_OFFSET     (0x007c)  /* 32-bits wide */
+#define STR71X_EIC_SIR8_OFFSET     (0x0080)  /* 32-bits wide */
+#define STR71X_EIC_SIR9_OFFSET     (0x0084)  /* 32-bits wide */
+#define STR71X_EIC_SIR10_OFFSET    (0x0088)  /* 32-bits wide */
+#define STR71X_EIC_SIR11_OFFSET    (0x008c)  /* 32-bits wide */
+#define STR71X_EIC_SIR12_OFFSET    (0x0090)  /* 32-bits wide */
+#define STR71X_EIC_SIR13_OFFSET    (0x0094)  /* 32-bits wide */
+#define STR71X_EIC_SIR14_OFFSET    (0x0098)  /* 32-bits wide */
+#define STR71X_EIC_SIR15_OFFSET    (0x009c)  /* 32-bits wide */
+#define STR71X_EIC_SIR16_OFFSET    (0x00a0)  /* 32-bits wide */
+#define STR71X_EIC_SIR17_OFFSET    (0x00a4)  /* 32-bits wide */
+#define STR71X_EIC_SIR18_OFFSET    (0x00a8)  /* 32-bits wide */
+#define STR71X_EIC_SIR19_OFFSET    (0x00ac)  /* 32-bits wide */
+#define STR71X_EIC_SIR20_OFFSET    (0x00b0)  /* 32-bits wide */
+#define STR71X_EIC_SIR21_OFFSET    (0x00b4)  /* 32-bits wide */
+#define STR71X_EIC_SIR22_OFFSET    (0x00b8)  /* 32-bits wide */
+#define STR71X_EIC_SIR23_OFFSET    (0x00bc)  /* 32-bits wide */
+#define STR71X_EIC_SIR24_OFFSET    (0x00c0)  /* 32-bits wide */
+#define STR71X_EIC_SIR25_OFFSET    (0x00c4)  /* 32-bits wide */
+#define STR71X_EIC_SIR26_OFFSET    (0x00c8)  /* 32-bits wide */
+#define STR71X_EIC_SIR27_OFFSET    (0x00cc)  /* 32-bits wide */
+#define STR71X_EIC_SIR28_OFFSET    (0x00d0)  /* 32-bits wide */
+#define STR71X_EIC_SIR29_OFFSET    (0x00d4)  /* 32-bits wide */
+#define STR71X_EIC_SIR30_OFFSET    (0x00d8)  /* 32-bits wide */
+#define STR71X_EIC_SIR31_OFFSET    (0x00dc)  /* 32-bits wide */
+
+#define STR71X_EIC_NCHANNELS       (32)
+#define STR71X_EIC_SIR_BASE        (STR71X_EIC_BASE + STR71X_EIC_SIR_OFFSET)
+
+/* Enhanced Interupt Controller (EIC) registers *************************************/
+
+#define STR71X_EIC_ICR             (STR71X_EIC_BASE + STR71X_EIC_ICR_OFFSET)
+#define STR71X_EIC_CICR            (STR71X_EIC_BASE + STR71X_EIC_CICR_OFFSET)
+#define STR71X_EIC_CIPR            (STR71X_EIC_BASE + STR71X_EIC_CIPR_OFFSET)
+#define STR71X_EIC_IVR             (STR71X_EIC_BASE + STR71X_EIC_IVR_OFFSET)
+#define STR71X_EIC_FIR             (STR71X_EIC_BASE + STR71X_EIC_FIR_OFFSET)
+#define STR71X_EIC_IER             (STR71X_EIC_BASE + STR71X_EIC_IER_OFFSET)
+#define STR71X_EIC_IPR             (STR71X_EIC_BASE + STR71X_EIC_IPR_OFFSET)
+
+#define STR71X_EIC_SIR(n)          (STR71X_EIC_SIR_BASE + ((n) << 2))
+
+#define STR71X_EIC_SIR0            (STR71X_EIC_BASE + STR71X_EIC_SIR0_OFFSET)
+#define STR71X_EIC_SIR1            (STR71X_EIC_BASE + STR71X_EIC_SIR1_OFFSET)
+#define STR71X_EIC_SIR2            (STR71X_EIC_BASE + STR71X_EIC_SIR2_OFFSET)
+#define STR71X_EIC_SIR3            (STR71X_EIC_BASE + STR71X_EIC_SIR3_OFFSET)
+#define STR71X_EIC_SIR4            (STR71X_EIC_BASE + STR71X_EIC_SIR4_OFFSET)
+#define STR71X_EIC_SIR5            (STR71X_EIC_BASE + STR71X_EIC_SIR5_OFFSET)
+#define STR71X_EIC_SIR6            (STR71X_EIC_BASE + STR71X_EIC_SIR6_OFFSET)
+#define STR71X_EIC_SIR7            (STR71X_EIC_BASE + STR71X_EIC_SIR7_OFFSET)
+#define STR71X_EIC_SIR8            (STR71X_EIC_BASE + STR71X_EIC_SIR8_OFFSET)
+#define STR71X_EIC_SIR9            (STR71X_EIC_BASE + STR71X_EIC_SIR9_OFFSET)
+#define STR71X_EIC_SIR10           (STR71X_EIC_BASE + STR71X_EIC_SIR10_OFFSET)
+#define STR71X_EIC_SIR11           (STR71X_EIC_BASE + STR71X_EIC_SIR11_OFFSET)
+#define STR71X_EIC_SIR12           (STR71X_EIC_BASE + STR71X_EIC_SIR12_OFFSET)
+#define STR71X_EIC_SIR13           (STR71X_EIC_BASE + STR71X_EIC_SIR13_OFFSET)
+#define STR71X_EIC_SIR14           (STR71X_EIC_BASE + STR71X_EIC_SIR14_OFFSET)
+#define STR71X_EIC_SIR15           (STR71X_EIC_BASE + STR71X_EIC_SIR15_OFFSET)
+#define STR71X_EIC_SIR16           (STR71X_EIC_BASE + STR71X_EIC_SIR16_OFFSET)
+#define STR71X_EIC_SIR17           (STR71X_EIC_BASE + STR71X_EIC_SIR17_OFFSET)
+#define STR71X_EIC_SIR18           (STR71X_EIC_BASE + STR71X_EIC_SIR18_OFFSET)
+#define STR71X_EIC_SIR19           (STR71X_EIC_BASE + STR71X_EIC_SIR19_OFFSET)
+#define STR71X_EIC_SIR20           (STR71X_EIC_BASE + STR71X_EIC_SIR20_OFFSET)
+#define STR71X_EIC_SIR21           (STR71X_EIC_BASE + STR71X_EIC_SIR21_OFFSET)
+#define STR71X_EIC_SIR22           (STR71X_EIC_BASE + STR71X_EIC_SIR22_OFFSET)
+#define STR71X_EIC_SIR23           (STR71X_EIC_BASE + STR71X_EIC_SIR23_OFFSET)
+#define STR71X_EIC_SIR24           (STR71X_EIC_BASE + STR71X_EIC_SIR24_OFFSET)
+#define STR71X_EIC_SIR25           (STR71X_EIC_BASE + STR71X_EIC_SIR25_OFFSET)
+#define STR71X_EIC_SIR26           (STR71X_EIC_BASE + STR71X_EIC_SIR26_OFFSET)
+#define STR71X_EIC_SIR27           (STR71X_EIC_BASE + STR71X_EIC_SIR27_OFFSET)
+#define STR71X_EIC_SIR28           (STR71X_EIC_BASE + STR71X_EIC_SIR28_OFFSET)
+#define STR71X_EIC_SIR29           (STR71X_EIC_BASE + STR71X_EIC_SIR29_OFFSET)
+#define STR71X_EIC_SIR30           (STR71X_EIC_BASE + STR71X_EIC_SIR30_OFFSET)
+#define STR71X_EIC_SIR31           (STR71X_EIC_BASE + STR71X_EIC_SIR31_OFFSET)
+
+/* Register bit settings ************************************************************/
+
+/* Interrupt control register (ICR) bit definitions */
+
+#define STR71X_EICICR_IRQEN        (0x00000001) /* Bit 0: IRQ output enable */
+#define STR71X_EICICR_FIQEN        (0x00000002) /* Bit 1: FIQ output enable */
+
+/* Fast interrupt register (FIR) bit definitions */
+
+#define STR71X_EICFIR_FIE          (0x00000001) /* Bit 0: FIQ channel 1/0 enable */
+#define STR71X_EICFIR_FIP          (0x00000002) /* Bit 1: channel 1/0 FIQ pending */
+
+/* Source interrrupt register definitions */
+
+#define STR71X_EICSIR_SIPLMASK     (0x0000000f) /* Bits 0-3: Source interrupt priority level */
+#define STR71X_EICSIR_SIVMASK      (0xffff0000) /* Bits 16-31: Source interrupt vector */
+
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_EIC_H */
--- a/arch/arm/src/str71x/str71x_emi.h
+++ b/arch/arm/src/str71x/str71x_emi.h
@@ -0,0 +1,103 @@
+/************************************************************************************
+ * arch/arm/src/str71x/str71x_emi.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_EMI_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_EMI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* External Memory Interfac (EMI) register offset ***********************************/
+
+#define STR71X_EMI_BCON0_OFFSET     (0x0000) /* 16-bits wide */
+#define STR71X_EMI_BCON1_OFFSET     (0x0004) /* 16-bits wide */
+#define STR71X_EMI_BCON2_OFFSET     (0x0008) /* 16-bits wide */
+#define STR71X_EMI_BCON3_OFFSET     (0x000c) /* 16-bits wide */
+
+/* External Memory Interfac (EMI) register addresses ********************************/
+
+#define STR71X_EMI_BCON0            (STR71X_EMI_BASE + STR71X_EMI_BCON0_OFFSET)
+#define STR71X_EMI_BCON1            (STR71X_EMI_BASE + STR71X_EMI_BCON1_OFFSET)
+#define STR71X_EMI_BCON2            (STR71X_EMI_BASE + STR71X_EMI_BCON2_OFFSET)
+#define STR71X_EMI_BCON3            (STR71X_EMI_BASE + STR71X_EMI_BCON3_OFFSET)
+
+/* Register bit settings ***********************************************************/
+
+/* Bank-N configuration register (BCONn) bit definitions */
+
+#define STR71X_EMIBCON_BSIZEMASK    (0x0003) /* Bits 0-1: Bank size */
+#define STR71X_EMIBCON_BSIZE8       (0x0000) /*   8-bit */
+#define STR71X_EMIBCON_BSIZE16      (0x0001) /*   16-bit */
+#define STR71X_EMIBCON_WSMASK       (0x003c) /* Bits 2-5: Wait states */
+#define STR71X_EMIBCON_WS0          (0x0000) /*   0 waitstates */
+#define STR71X_EMIBCON_WS1          (0x0004) /*   1 waitstates */
+#define STR71X_EMIBCON_WS2          (0x0008) /*   2 waitstates */
+#define STR71X_EMIBCON_WS3          (0x000c) /*   3 waitstates */
+#define STR71X_EMIBCON_WS4          (0x0010) /*   4 waitstates */
+#define STR71X_EMIBCON_WS5          (0x0014) /*   5 waitstates */
+#define STR71X_EMIBCON_WS6          (0x0018) /*   6 waitstates */
+#define STR71X_EMIBCON_WS7          (0x001c) /*   7 waitstates */
+#define STR71X_EMIBCON_WS8          (0x0020) /*   8 waitstates */
+#define STR71X_EMIBCON_WS9          (0x0024) /*   9 waitstates */
+#define STR71X_EMIBCON_WS10         (0x0028) /*   10 waitstates */
+#define STR71X_EMIBCON_WS11         (0x002c) /*   11 waitstates */
+#define STR71X_EMIBCON_WS12         (0x0030) /*   12 waitstates */
+#define STR71X_EMIBCON_WS13         (0x0034) /*   13 waitstates */
+#define STR71X_EMIBCON_WS14         (0x0038) /*   14 waitstates */
+#define STR71X_EMIBCON_WS15         (0x003c) /*   15 waitstates */
+#define STR71X_EMIBCON_ENABLE       (0x8000) /* Bit 15: Bank enable */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_EMI_H */
--- a/arch/arm/src/str71x/str71x_flash.h
+++ b/arch/arm/src/str71x/str71x_flash.h
@@ -0,0 +1,123 @@
+/************************************************************************************
+ * arch/arm/src/str71x/str71x_flash.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_FLASH_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_FLASH_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Flash registers ******************************************************************/
+
+#define STR71X_FLASH_CR0       (STR71X_FLASHREG_BASE + 0x0000) /* 32-bits wide */
+#define STR71X_FLASH_CR1       (STR71X_FLASHREG_BASE + 0x0004) /* 32-bits wide */
+#define STR71X_FLASH_DR0       (STR71X_FLASHREG_BASE + 0x0008) /* 32-bits wide */
+#define STR71X_FLASH_DR1       (STR71X_FLASHREG_BASE + 0x000c) /* 32-bits wide */
+#define STR71X_FLASH_AR        (STR71X_FLASHREG_BASE + 0x0010) /* 32-bits wide */
+#define STR71X_FLASH_ER        (STR71X_FLASHREG_BASE + 0x0014) /* 32-bits wide */
+
+/* Register bit settings ************************************************************/
+
+#define STR71X_FLASH_B0F0       (0x00000001)
+#define STR71X_FLASH_B0F1       (0x00000002)
+#define STR71X_FLASH_B0F2       (0x00000004)
+#define STR71X_FLASH_B0F3       (0x00000008)
+#define STR71X_FLASH_B0F4       (0x00000010)
+#define STR71X_FLASH_B0F5       (0x00000020)
+#define STR71X_FLASH_B0F6       (0x00000040)
+#define STR71X_FLASH_B0F7       (0x00000080)
+
+#define STR71X_FLASH_B1F0       (0x00010000)
+#define STR71X_FLASH_B1F1       (0x00020000)
+
+#define STR71X_FLASH_B0         (STR71X_FLASH_B0F0|STR71X_FLASH_B0F1|\
+                                  STR71X_FLASH_B0F2|STR71X_FLASH_B0F3|\
+                                  STR71X_FLASH_B0F4|STR71X_FLASH_B0F5|\
+                                  STR71X_FLASH_B0F6| STR71X_FLASH_B0F7)
+#define STR71X_FLASH_B1         (STR71X_FLASH_B1F0|STR71X_FLASH_B1F1)
+
+#define STR71X_FLASH_BANK0      (0x1000000)
+#define STR71X_FLASH_BANK1      (0x2000000)
+
+#define STR71X_FLASH_BSYA0      (0x01) /* 000-00001 (0000 0001 (0x01 */ /* STR71X_FLASH_CR0.1 */
+#define STR71X_FLASH_BSYA1      (0x02) /* 000-00010 (0000 0010 (0x02 */ /* STR71X_FLASH_CR0.2 */
+#define STR71X_FLASH_LOCK       (0x04) /* 000-00100 (0000 0100 (0x04 */ /* STR71X_FLASH_CR0.4 */
+#define STR71X_FLASH_INTP       (0x14) /* 000-10100 (0001 0100 (0x14 */ /* STR71X_FLASH_CR0.20 */
+#define STR71X_FLASH_B0S        (0x38) /* 001-11000 (0011 1000 (0x38 */ /* STR71X_FLASH_CR1.24 */
+#define STR71X_FLASH_B1S        (0x39) /* 001-11001 (0011 1001 (0x39 */ /* STR71X_FLASH_CR1.25 */
+#define STR71X_FLASH_ERR        (0xa0) /* 101-00000 (1010 0000 (0xA0 */ /* STR71X_FLASH_ER.0 */
+#define STR71X_FLASH_ERER       (0xa1) /* 101-00001 (1010 0001 (0xA1 */ /* STR71X_FLASH_ER.1 */
+#define STR71X_FLASH_PGER       (0xa2) /* 101-00010 (1010 0010 (0xA2 */ /* STR71X_FLASH_ER.2 */
+#define STR71X_FLASH_10ER       (0xa3) /* 101-00011 (1010 0011 (0xA3 */ /* STR71X_FLASH_ER.3 */
+#define STR71X_FLASH_SEQER      (0xa6) /* 101-00110 (1010 0110 (0xA6 */ /* STR71X_FLASH_ER.6 */
+#define STR71X_FLASH_RESER      (0xa7) /* 101-00111 (1010 0111 (0xA7 */ /* STR71X_FLASH_ER.7 */
+#define STR71X_FLASH_WPF        (0xa8) /* 101-01000 (1010 1000 (0xA8 */ /* STR71X_FLASH_ER.8 */
+
+#define STR71X_FLASH_WMS_MASK   (0x80000000)
+#define STR71X_FLASH_SUSP_MASK  (0x40000000)
+#define STR71X_FLASH_WPG_MASK   (0x20000000)
+#define STR71X_FLASH_DWPG_MASK  (0x10000000)
+#define STR71X_FLASH_SER_MASK   (0x08000000)
+#define STR71X_FLASH_SPR_MASK   (0x01000000)
+#define STR71X_FLASH_DBGP_MASK  (0x00000002)
+#define STR71X_FLASH_ACCP_MASK  (0x00000001)
+
+#define STR71X_FLASH_Reg_Mask   (0xe0)
+#define STR71X_FLASH_Flag_Mask  (0x1f)
+
+#define STR71X_FLASH_INTM_Mask  (0x00200000)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_FLASH_H */
--- a/arch/arm/src/str71x/str71x_gpio.h
+++ b/arch/arm/src/str71x/str71x_gpio.h
@@ -0,0 +1,94 @@
+/************************************************************************************
+ * arch/arm/src/str71x/str71x_gpio.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_GPIO_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_GPIO_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* GPIO register offsets ************************************************************/
+
+#define STR71X_GPIO_PC0_OFFSET (0x0000)  /* 16-bits wide */
+#define STR71X_GPIO_PC1_OFFSET (0x0004)  /* 16-bits wide */
+#define STR71X_GPIO_PC2_OFFSET (0x0008)  /* 16-bits wide */
+#define STR71X_GPIO_PD_OFFSET  (0x000c)  /* 16-bits wide */
+
+/* GPIO register addresses **********************************************************/
+
+#define STR71X_GPIO_PC0(b)     ((b) + STR71X_GPIO_PC0_OFFSET)
+#define STR71X_GPIO_PC1(b)     ((b) + STR71X_GPIO_PC1_OFFSET)
+#define STR71X_GPIO_PC2(b)     ((b) + STR71X_GPIO_PC2_OFFSET)
+#define STR71X_GPIO_PD(b)      ((b) + STR71X_GPIO_PD_OFFSET)
+
+#define STR71X_GPIO0_PC0       (STR71X_GPIO0_BASE + STR71X_GPIO_PC0_OFFSET)
+#define STR71X_GPIO0_PC1       (STR71X_GPIO0_BASE + STR71X_GPIO_PC1_OFFSET)
+#define STR71X_GPIO0_PC2       (STR71X_GPIO0_BASE + STR71X_GPIO_PC2_OFFSET)
+#define STR71X_GPIO0_PD        (STR71X_GPIO0_BASE + STR71X_GPIO_PD_OFFSET)
+
+#define STR71X_GPIO1_PC0       (STR71X_GPIO1_BASE + STR71X_GPIO_PC0_OFFSET)
+#define STR71X_GPIO1_PC1       (STR71X_GPIO1_BASE + STR71X_GPIO_PC1_OFFSET)
+#define STR71X_GPIO1_PC2       (STR71X_GPIO1_BASE + STR71X_GPIO_PC2_OFFSET)
+#define STR71X_GPIO1_PD        (STR71X_GPIO1_BASE + STR71X_GPIO_PD_OFFSET)
+
+#define STR71X_GPIO2_PC0       (STR71X_GPIO2_BASE + STR71X_GPIO_PC0_OFFSET)
+#define STR71X_GPIO2_PC1       (STR71X_GPIO2_BASE + STR71X_GPIO_PC1_OFFSET)
+#define STR71X_GPIO2_PC2       (STR71X_GPIO2_BASE + STR71X_GPIO_PC2_OFFSET)
+#define STR71X_GPIO2_PD        (STR71X_GPIO2_BASE + STR71X_GPIO_PD_OFFSET)
+
+/* Register bit settings ************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_GPIO_H */
--- a/arch/arm/src/str71x/str71x_head.S
+++ b/arch/arm/src/str71x/str71x_head.S
--- a/arch/arm/src/str71x/str71x_i2c.h
+++ b/arch/arm/src/str71x/str71x_i2c.h
@@ -0,0 +1,153 @@
+/************************************************************************************
+ * arch/arm/src/str71x/str71x_i2c.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_I2C_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_I2C_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Register offets ******************************************************************/
+
+#define STR71X_I2C_CR_OFFSET   (0x0000) /* 8-bits wide */
+#define STR71X_I2C_SR1_OFFSET  (0x0004) /* 8-bits wide */
+#define STR71X_I2C_SR2_OFFSET  (0x0008) /* 8-bits wide */
+#define STR71X_I2C_CCR_OFFSET  (0x000c) /* 8-bits wide */
+#define STR71X_I2C_OAR1_OFFSET (0x0010) /* 8-bits wide */
+#define STR71X_I2C_OAR2_OFFSET (0x0014) /* 8-bits wide */
+#define STR71X_I2C_DR_OFFSET   (0x0018) /* 8-bits wide */
+#define STR71X_I2C_ECCR_OFFSET (0x001c) /* 8-bits wide */
+
+/* Registers ************************************************************************/
+
+#define STR71X_I2C_CR(b)       ((b) + STR71X_I2C_SR_OFFSET)
+#define STR71X_I2C_SR1(b)      ((b) + STR71X_I2C_SR1_OFFSET)
+#define STR71X_I2C_SR2(b)      ((b) + STR71X_I2C_SR2_OFFSET)
+#define STR71X_I2C_CCR(b)      ((b) + STR71X_I2C_CCR_OFFSET)
+#define STR71X_I2C_OAR1(b)     ((b) + STR71X_I2C_OAR1_OFFSET)
+#define STR71X_I2C_OAR2(b)     ((b) + STR71X_I2C_OAR2_OFFSET)
+#define STR71X_I2C_DR(b)       ((b) + STR71X_I2C_DR_OFFSET)
+#define STR71X_I2C_ECCR(b)     ((b) + STR71X_I2C_ECCR_OFFSET)
+
+#define STR71X_I2C0_CR         (STR71X_I2C0_BASE + STR71X_I2C_SR_OFFSET)
+#define STR71X_I2C0_SR1        (STR71X_I2C0_BASE + STR71X_I2C_SR1_OFFSET)
+#define STR71X_I2C0_SR2        (STR71X_I2C0_BASE + STR71X_I2C_SR2_OFFSET)
+#define STR71X_I2C0_CCR        (STR71X_I2C0_BASE + STR71X_I2C_CCR_OFFSET)
+#define STR71X_I2C0_OAR1       (STR71X_I2C0_BASE + STR71X_I2C_OAR1_OFFSET)
+#define STR71X_I2C0_OAR2       (STR71X_I2C0_BASE + STR71X_I2C_OAR2_OFFSET)
+#define STR71X_I2C0_DR         (STR71X_I2C0_BASE + STR71X_I2C_DR_OFFSET)
+#define STR71X_I2C0_ECCR       (STR71X_I2C0_BASE + STR71X_I2C_ECCR_OFFSET)
+
+#define STR71X_I2C1_CR         (STR71X_I2C1_BASE + STR71X_I2C_SR_OFFSET)
+#define STR71X_I2C1_SR1        (STR71X_I2C1_BASE + STR71X_I2C_SR1_OFFSET)
+#define STR71X_I2C1_SR2        (STR71X_I2C1_BASE + STR71X_I2C_SR2_OFFSET)
+#define STR71X_I2C1_CCR        (STR71X_I2C1_BASE + STR71X_I2C_CCR_OFFSET)
+#define STR71X_I2C1_OAR1       (STR71X_I2C1_BASE + STR71X_I2C_OAR1_OFFSET)
+#define STR71X_I2C1_OAR2       (STR71X_I2C1_BASE + STR71X_I2C_OAR2_OFFSET)
+#define STR71X_I2C1_DR         (STR71X_I2C1_BASE + STR71X_I2C_DR_OFFSET)
+#define STR71X_I2C1_ECCR       (STR71X_I2C1_BASE + STR71X_I2C_ECCR_OFFSET)
+
+/* Register bit settings ***********************************************************/
+
+/* I2C Control Register (CR) */
+
+#define STR71X_I2CCR_ITE        (0x01)    /* Bit 0: Interrupt enable */
+#define STR71X_I2CCR_STOP       (0x02)    /* Bit 1: Generation of a stop condition */
+#define STR71X_I2CCR_ACK        (0x04)    /* Bit 2: Acknowledge enable */
+#define STR71X_I2CCR_START      (0x08)    /* Bit 3: Generation of a start condition */
+#define STR71X_I2CCR_ENGC       (0x10)    /* Bit 4: Enable general call */
+#define STR71X_I2CCR_PE         (0x20)    /* Bit 5: Peripheral enable */
+
+/* I2C Status Register 1 (SR1) */
+
+#define STR71X_I2CSR1_SB        (0x01)    /* Bit 0: Start bit (master mode) */
+#define STR71X_I2CSR1_MSL       (0x02)    /* Bit 1: Master/slave */
+#define STR71X_I2CSR1_ADSL      (0x04)    /* Bit 2: Address matched */
+#define STR71X_I2CSR1_BTF       (0x08)    /* Bit 3: Byte transfer finished */
+#define STR71X_I2CSR1_BUSY      (0x10)    /* Bit 4: Bus busy */
+#define STR71X_I2CSR1_TRA       (0x20)    /* Bit 5: Transmitter/receiver */
+#define STR71X_I2CSR1_ADD10     (0x40)    /* Bit 6: 10-bit addressing in master mode */
+#define STR71X_I2CSR1_EVF       (0x80)    /* Bit 7: Event flag */
+
+/* I2C Status Register 2 (SR2) */
+
+#define STR71X_I2CSR2_GCAL      (0x01)    /* Bit 0: General call (slave mode) */
+#define STR71X_I2CSR2_BERR      (0x02)    /* Bit 1: Bus error */
+#define STR71X_I2CSR2_ARLO      (0x04)    /* Bit 2: Arbitration lost */
+#define STR71X_I2CSR2_STOPF     (0x08)    /* Bit 3: Stop detection (slave mode) */
+#define STR71X_I2CSR2_AF        (0x10)    /* Bit 4: Acknowledge failure */
+#define STR71X_I2CSR2_ENDAD     (0x20)    /* Bit 5: End of address transmission */
+
+/* I2C Clock Control Register (CCR) */
+
+#define STR71X_I2CCCR_DIVMASK   (0x7f)    /* Bits 0-6: 7 bits of the 12-bit clock divider */
+#define STR71X_I2CCCR_FMSM      (0x80)    /* Bit 7: Fast/standard I2C mode */
+
+/* I2C Extended Clock Control Register (ECCR) */
+
+#define STR71X_I2CECCR_DIVMASK  (0x1f)    /* Bits 0-5: 5 bits of the 12-bit clock divider */
+
+/* I2C Own Address Register 2 (OAR2) */
+
+#define STR71X_I2COAR2_ADDRMASK (0x06)    /* Bits 1-2: 2 bits of the 10-bit interface address */
+#define STR71X_I2COAR2_FREQMASK (0xe0)    /* Bits 5-7: Frequency */
+#define STR71X_I2COAR2_5_10     (0x00)    /*   FPCLK1 = 5 to 10 */
+#define STR71X_I2COAR2_10_16    (0x20)    /*   FPCLK1 = 10 to 16.67 */
+#define STR71X_I2COAR2_16_26    (0x40)    /*   FPCLK1 = 16.67 to 26.67 */
+#define STR71X_I2COAR2_26_40    (0x60)    /*   FPCLK1 = 26.67 to 40 */
+#define STR71X_I2COAR2_40_53    (0x80)    /*   FPCLK1 = 40 to 53.33 */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_I2C_H */
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