2 Commits

Author SHA1 Message Date
ImBonkers be30590504 arch/arm/stm32n6: Add STM32N6 chip support.
Introduce minimal chip support for the STMicro STM32N6 family
(Cortex-M55, ARMv8.1-M with TrustZone and FPU), sufficient to bring
up an NSH console over USART1.

Scope (deliberately minimal first drop):

  - Chip selector ARCH_CHIP_STM32N6 wired into arch/arm/Kconfig and
    chip-name mapping ("stm32n6").
  - Sub-Kconfig under arch/arm/src/stm32n6 with the STM32N657X0 chip
    selector and a single user-selectable USART (USART1).
  - Boot path: stm32_start with a naked dispatcher that clears the
    boot-ROM MSPLIM/PSPLIM stack limits before any compiler-emitted
    prologue, then runs vector relocation and SRAM-only heap init.
    The chip runs entirely in the Secure state; SAU is left in its
    reset configuration.
  - PLL1-based clock tree fed from HSI64 targeting 200 MHz CPU, with
    USART1 kernel-clock routed to HSI for a predictable BRR that is
    independent of any later clock change.
  - Low-level USART driver with full serial framework support.
    stm32_serial.c is adapted from arch/arm/src/stm32h5/stm32_serial.c
    (sibling ARMv8-M Mainline port with the same USART IP), stripped
    of DMA-RX, LPUART, the per-USART2..5 plumbing, RS-485 driver-enable,
    TIOCSINVERT/SWAP and HALFDUPLEX paths.
  - SysTick system timer.
  - GPIO, PWR and RCC helpers.

TrustZone, MPU, I/D-cache and Helium (MVE) are left disabled to
minimise bring-up surface; these will be added in follow-up patches
alongside the drivers that need them.

Signed-off-by: ImBonkers <samuelnlinden@pm.me>
2026-05-18 14:50:29 -03:00
Lup Yuen Lee c74206a982 CI: Split the Build Job arm-05 into multiple smaller jobs
CI Build Job `arm-05` (runtime 2 hours) has become the Performance Bottleneck for CI Workflow. That's because `arm-05` builds too many targets for nRF, RP2040, SAM 3, SAM A and SAM D. This PR splits `arm-05` into multiple smaller jobs, to reduce the CI Build Duration.

Before the PR: `arm-05` is overloaded, build requires 2 hours
- `arm-05` (2 hours): nRF, RP2040, SAM 3, SAM A, SAM D
- `arm-06` (56 mins): STM32 [a-m]*

After the PR: `arm-05` is offloaded (to `arm-06` and `arm-07`), completes within 1 hour
- `arm-05` (47 mins): nRF
- `arm-06` (1 hour): Reserve for RP2040 exclusively
- `arm-07` (1 hour 15 mins): SAM 3, SAM A, SAM D, STM32 [a-m]*

Build Jobs are sorted by Target Name. So we cascade the changes and rename the Build Jobs: `arm-07` becomes `arm-08`, `arm-08` becomes `arm-09` etc. Then `arm-13` becomes a new job `arm-14`. (Which we added to `build.yml`)

Performance of `arm-05` is discussed in https://github.com/apache/nuttx/issues/13775 and https://github.com/apache/nuttx/issues/12773
2024-10-09 13:45:26 +08:00