esp32s3/elf: Fix ELF loader on ESP32-S3 when using external PSRAM

Prior to this commit, it wasn't possible to load ELF modules from
the external PSRAM. There were two main issues about it: 1) copying
data using the instruction bus was being used instead of the data
bus (this, per si, isn't a problem, but requires special attention
regarding data alignment), and 2) the cache was not being properly
cleaned and flushed to properly access the loaded data using the
instruction bus.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>

arch/xtensa/Kconfig

@@ -89,6 +89,8 @@ config ARCH_CHIP_ESP32S3
 	select ARCH_HAVE_TEXT_HEAP_SEPARATE_DATA_ADDRESS
 	select ARCH_HAVE_TEXT_HEAP_WORD_ALIGNED_READ
 	select ARCH_HAVE_TESTSET
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_VECNOTIRQ
 	select LIBC_PREVENT_STRING_KERNEL
 	select LIBC_ARCH_MEMCPY if BUILD_FLAT

arch/xtensa/src/esp32s3/Make.defs

@@ -28,7 +28,7 @@ HEAD_CSRC  = esp32s3_start.c
 
 # Required ESP32-S3 files (arch/xtensa/src/esp32s3)
 
-CHIP_CSRCS  = esp32s3_irq.c esp32s3_clockconfig.c esp32s3_region.c
+CHIP_CSRCS  = esp32s3_cache.c esp32s3_irq.c esp32s3_clockconfig.c esp32s3_region.c
 CHIP_CSRCS += esp32s3_systemreset.c esp32s3_user.c esp32s3_allocateheap.c esp32s3_reset_reasons.c
 CHIP_CSRCS += esp32s3_wdt.c esp32s3_gpio.c esp32s3_lowputc.c esp32s3_serial.c
 CHIP_CSRCS += esp32s3_rtc_gpio.c esp32s3_libc_stubs.c esp32s3_spi_timing.c

arch/xtensa/src/esp32s3/esp32s3_textheap.c

@@ -87,7 +87,7 @@ void *up_textheap_memalign(size_t align, size_t size)
 
   if (ret == NULL)
     {
-      ret = kmm_memalign(align, size);
+      ret = memalign(align, size);
       if (ret)
         {
           /* kmm_memalign buffer is at the Data bus offset.  Adjust it so we
@@ -137,7 +137,7 @@ void up_textheap_free(void *p)
 #endif
         {
           p = up_textheap_data_address(p);
-          kmm_free(p);
+          free(p);
         }
     }
 }
@@ -171,7 +171,7 @@ bool up_textheap_heapmember(void *p)
 #endif
 
   p = up_textheap_data_address(p);
-  return kmm_heapmember(p);
+  return umm_heapmember(p);
 }
 
 /****************************************************************************

arch/xtensa/src/esp32s3/hal.mk

@@ -186,6 +186,8 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_
 
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)rtc_io.c
 
+CHIP_ASRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_cache_writeback_esp32s3.S
+
 ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)bootloader_banner_wrap.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console.c
@@ -213,8 +215,6 @@ ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_fields.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)efuse_controller$(DELIM)keys$(DELIM)with_key_purposes$(DELIM)esp_efuse_api_key.c
 
-  CHIP_ASRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_cache_writeback_esp32s3.S
-
   LDFLAGS += --wrap=bootloader_print_banner
 endif
 

boards/xtensa/esp32s3/common/scripts/esp32s3_rom_aliases.ld

@@ -24,11 +24,20 @@
 
 /* Lower-case aliases for symbols not compliant to nxstyle */
 
+PROVIDE( cache_get_dcache_line_size = Cache_Get_DCache_Line_Size );
+PROVIDE( cache_get_icache_line_size = Cache_Get_ICache_Line_Size );
 PROVIDE( cache_dbus_mmu_set = Cache_Dbus_MMU_Set );
 PROVIDE( cache_ibus_mmu_set = Cache_Ibus_MMU_Set );
+PROVIDE( cache_clean_addr = Cache_Clean_Addr );
 PROVIDE( cache_invalidate_addr = Cache_Invalidate_Addr );
 PROVIDE( cache_invalidate_dcache_all = Cache_Invalidate_DCache_All );
 PROVIDE( cache_invalidate_icache_all = Cache_Invalidate_ICache_All );
+PROVIDE( cache_invalidate_icache_items = Cache_Invalidate_ICache_Items );
+PROVIDE( cache_invalidate_dcache_items = Cache_Invalidate_DCache_Items );
+PROVIDE( cache_lock_icache_items = Cache_Lock_ICache_Items );
+PROVIDE( cache_lock_dcache_items = Cache_Lock_DCache_Items );
+PROVIDE( cache_unlock_icache_items = Cache_Unlock_ICache_Items );
+PROVIDE( cache_unlock_dcache_items = Cache_Unlock_DCache_Items );
 PROVIDE( cache_occupy_addr = Cache_Occupy_Addr );
 PROVIDE( cache_resume_dcache = Cache_Resume_DCache );
 PROVIDE( cache_resume_icache = Cache_Resume_ICache );

libs/libc/elf/elf_bind.c

@@ -32,6 +32,7 @@
 #include <assert.h>
 #include <debug.h>
 
+#include <nuttx/arch.h>
 #include <nuttx/cache.h>
 #include <nuttx/elf.h>
 #include <nuttx/lib/elf.h>

libs/libc/machine/xtensa/arch_elf.c

@@ -194,7 +194,7 @@ int up_relocateadd(const Elf32_Rela *rel, const Elf32_Sym *sym,
       break;
 
     case R_XTENSA_32:
-      (*(uint32_t *)addr) += value;
+      (*(uint32_t *)(up_textheap_data_address((void *)addr))) += value;
       break;
 
     case R_XTENSA_ASM_EXPAND: