esp32s3: Fix bug related to the PSRAM-allocated task stack

If both SPI Flash support (`CONFIG_ESP32S3_SPIFLASH`) and PSRAM
(`CONFIG_ESP32S3_SPIRAM`) are enabled, the PSRAM can only be
assigned to the user's heap (`CONFIG_ESP32S3_SPIRAM_USER_HEAP`).
Additionaly, `CONFIG_ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK` must be
set because the system will end up allocating tasks' stacks from
the external PSRAM. This has an impact when dealing with SPI flash
operations because the cache must be disabled and the running task
should not rely on any data from the PSRAM. To accomplish that, It
offloads the SPI flash operation to a work queue (which, by
definition, allocates its heap from the kernel heap).

The same (assigning the PSRAM to the user's heap) is valid when the
Wi-Fi is enabled because the lower-half driver requires data being
allocated from the internal memory (which can only be achieved by
allocating from the kernel heap when both the kernel and user heaps
exists).

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>

arch/xtensa/src/esp32s3/Kconfig

@@ -1090,9 +1090,12 @@ choice ESP32S3_SPIRAM_HEAP
 
 config ESP32S3_SPIRAM_COMMON_HEAP
 	bool "Additional region to kernel heap"
+	depends on !ESP32S3_SPIFLASH && !ESPRESSIF_WIFI && !BUILD_PROTECTED
 
 config ESP32S3_SPIRAM_USER_HEAP
 	bool "Separated userspace heap"
+	depends on SCHED_LPWORK
+	select ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK if ESP32S3_SPIFLASH
 	select MM_KERNEL_HEAP
 
 endchoice # ESP32S3_SPIRAM_HEAP
@@ -1949,10 +1952,7 @@ config ESP32S3_SPIFLASH_OP_TASK_STACKSIZE
 		to be finished.
 
 config ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK
-	bool "Support PSRAM As Task Stack"
-	default n
-	depends on ESP32S3_SPIRAM
-	select SCHED_LPWORK
+	bool
 	---help---
 		Enable this option, Tasks which use PSRAM as stack
 		can do SPI Flash read/write/erase/map/unmap. Otherwise,

boards/xtensa/esp32s3/esp32s3-devkit/configs/mbedtls/defconfig

@@ -33,7 +33,6 @@ CONFIG_ESP32S3_RT_TIMER_TASK_STACK_SIZE=4096
 CONFIG_ESP32S3_SPIFLASH=y
 CONFIG_ESP32S3_SPIRAM=y
 CONFIG_ESP32S3_SPIRAM_MODE_OCT=y
-CONFIG_ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK=y
 CONFIG_ESP32S3_STORAGE_MTD_SIZE=0x1e80000
 CONFIG_ESP32S3_UART0=y
 CONFIG_ESPRESSIF_WIFI=y
@@ -43,7 +42,6 @@ CONFIG_FS_LITTLEFS=y
 CONFIG_FS_LITTLEFS_MULTI_VERSION=y
 CONFIG_FS_LITTLEFS_VERSION="v2.10.1"
 CONFIG_FS_PROCFS=y
-CONFIG_HOST_MACOS=y
 CONFIG_IDLETHREAD_STACKSIZE=3072
 CONFIG_INIT_ENTRYPOINT="nsh_main"
 CONFIG_INIT_STACKSIZE=8192
@@ -64,6 +62,7 @@ CONFIG_NETDB_DNSCLIENT=y
 CONFIG_NETDEV_LATEINIT=y
 CONFIG_NETDEV_PHY_IOCTL=y
 CONFIG_NETDEV_WIRELESS_IOCTL=y
+CONFIG_NETDEV_WORK_THREAD=y
 CONFIG_NETUTILS_CJSON=y
 CONFIG_NETUTILS_IPERF=y
 CONFIG_NET_BROADCAST=y
@@ -85,6 +84,7 @@ CONFIG_PTHREAD_MUTEX_TYPES=y
 CONFIG_RAM_SIZE=114688
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_LPWORK=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SIG_DEFAULT=y
 CONFIG_SMP=y

boards/xtensa/esp32s3/esp32s3-devkit/configs/psram_usrheap/defconfig

@@ -23,8 +23,6 @@ CONFIG_BUILTIN=y
 CONFIG_ESP32S3_FLASH_FREQ_80M=y
 CONFIG_ESP32S3_SPIFLASH=y
 CONFIG_ESP32S3_SPIRAM=y
-CONFIG_ESP32S3_SPIRAM_USER_HEAP=y
-CONFIG_ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK=y
 CONFIG_ESP32S3_UART0=y
 CONFIG_FS_PROCFS=y
 CONFIG_HAVE_CXX=y
@@ -47,6 +45,7 @@ CONFIG_PREALLOC_TIMERS=4
 CONFIG_RAM_SIZE=114688
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_LPWORK=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_START_DAY=6
 CONFIG_START_MONTH=12

boards/xtensa/esp32s3/esp32s3-devkit/configs/toywasm/defconfig

@@ -30,7 +30,6 @@ CONFIG_ESP32S3_RT_TIMER_TASK_STACK_SIZE=4096
 CONFIG_ESP32S3_SPIFLASH=y
 CONFIG_ESP32S3_SPIRAM=y
 CONFIG_ESP32S3_SPIRAM_MODE_OCT=y
-CONFIG_ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK=y
 CONFIG_ESP32S3_STORAGE_MTD_SIZE=0x1e80000
 CONFIG_ESP32S3_UART0=y
 CONFIG_ESPRESSIF_WIFI=y
@@ -75,6 +74,7 @@ CONFIG_PTHREAD_MUTEX_TYPES=y
 CONFIG_RAM_SIZE=114688
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_LPWORK=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SIG_DEFAULT=y
 CONFIG_SMP=y