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Merge remote-tracking branch 'mirtos/master' into dev

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Change-Id: I85394b24ce27d20ecbb130b85d844ab540507031
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
This commit is contained in:
liuhaitao
2020-11-25 14:44:27 +08:00
parent 86dbc17a43 09778c38b1
commit c24f178af7
491 changed files with 13326 additions and 5249 deletions
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include/inttypes.h
+15
View File
@@ -306,6 +306,21 @@
#define SCNxFAST64 SCNx64
#endif
/* intmax_t/uintmax_t */
#define PRIdMAX "jd"
#define PRIiMAX "ji"
#define PRIoMAX "jo"
#define PRIuMAX "ju"
#define PRIxMAX "jx"
#define PRIXMAX "jX"
#define SCNdMAX "jd"
#define SCNiMAX "ji"
#define SCNoMAX "jo"
#define SCNuMAX "ju"
#define SCNxMAX "jx"
/****************************************************************************
* Type Definitions
****************************************************************************/
include/nuttx/analog/adc.h
+16
View File
@@ -298,6 +298,22 @@ FAR struct adc_dev_s *lmp92001_adc_initialize(FAR struct i2c_master_s *i2c,
FAR struct adc_dev_s *ads7828_initialize(FAR struct i2c_master_s *i2c,
uint8_t addr);
/****************************************************************************
* Name: max1161x_initialize
*
* Description:
* Initialize ADC
*
* Input Parameters:
* i2c - Pointer to a valid I2C master struct.
*
* Returned Value:
* Valid MX1161X device structure reference on success; a NULL on failure
*
****************************************************************************/
FAR struct adc_dev_s *max1161x_initialize(FAR struct i2c_master_s *i2c);
#if defined(__cplusplus)
}
#endif
include/nuttx/analog/ioctl.h
+7 -3
View File
@@ -82,13 +82,12 @@
/* See include/nuttx/analog/lm92001.h */
#define AN_LMP92001_FIRST (AN_FIRST + AN_NCMDS + AN_ADS2142_NCMDS)
#define AN_LMP92001_FIRST (AN_ADS2142_FIRST + AN_ADS2142_NCMDS)
#define AN_LMP92001_NCMDS 7
/* See include/nuttx/analog/ads7828.h */
#define AN_ADS7828_FIRST (AN_FIRST + AN_NCMDS + AN_ADS2142_NCMDS + \
AN_LMP92001_NCMDS)
#define AN_ADS7828_FIRST (AN_LMP92001_FIRST + AN_LMP92001_NCMDS)
#define AN_ADS7828_NCMDS 6
/* See arch/arm/src/stm32l4/stm32l4_adc.h */
@@ -96,6 +95,11 @@
#define AN_STM32L4_FIRST (AN_ADS7828_FIRST + AN_ADS7828_NCMDS)
#define AN_STM32L4_NCMDS 2
/* See include/nuttx/analog/max1161x.h */
#define AN_MAX1161X_FIRST (AN_STM32L4_FIRST + AN_STM32L4_NCMDS)
#define AN_MAX1161X_NCMDS 8
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
include/nuttx/analog/max1161x.h
+122
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@@ -0,0 +1,122 @@
/****************************************************************************
* include/nuttx/analog/max1161x.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_ANALOG_MAX1161X_H
#define __INCLUDE_NUTTX_ANALOG_MAX1161X_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/analog/ioctl.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* IOCTL Commands
* Cmd: ANIOC_MAX1161X_SET_REF Arg: enum max1161x_ref_e
* Cmd: ANIOC_MAX1161X_SET_CLOCK Arg: enum max1161x_clock_e
* Cmd: ANIOC_MAX1161X_SET_UNIBIP Arg: enum max1161x_unibip_e
* Cmd: ANIOC_MAX1161X_SET_SCAN Arg: enum max1161x_scan_e
* Cmd: ANIOC_MAX1161X_ADD_CHAN Arg: uint8_t value
* Cmd: ANIOC_MAX1161X_REMOVE_CHAN Arg: uint8_t value
* Cmd: ANIOC_MAX1161X_SET_SNGDIF Arg: enum max1161x_sngdif_e
* Cmd: ANIOC_MAX1161X_READ_CHANNEL Arg: struct adc_msg_s *channel
*/
#define ANIOC_MAX1161X_SET_REF _ANIOC(AN_MAX1161X_FIRST + 0)
#define ANIOC_MAX1161X_SET_CLOCK _ANIOC(AN_MAX1161X_FIRST + 1)
#define ANIOC_MAX1161X_SET_UNIBIP _ANIOC(AN_MAX1161X_FIRST + 2)
#define ANIOC_MAX1161X_SET_SCAN _ANIOC(AN_MAX1161X_FIRST + 3)
#define ANIOC_MAX1161X_ADD_CHAN _ANIOC(AN_MAX1161X_FIRST + 4)
#define ANIOC_MAX1161X_REMOVE_CHAN _ANIOC(AN_MAX1161X_FIRST + 5)
#define ANIOC_MAX1161X_SET_SNGDIF _ANIOC(AN_MAX1161X_FIRST + 6)
#define ANIOC_MAX1161X_READ_CHANNEL _ANIOC(AN_MAX1161X_FIRST + 7)
/****************************************************************************
* Public Types
****************************************************************************/
/* Setup Byte */
/****************************************************************************
* +----+----+----+------+---------+---------+---------------+
* |SEL2|SEL1|SEL0| VREF | Ref Pin | Ref Dir | Int Ref State |
* +----+----+----+------+---------+---------+---------------+
* | 0 | 0 | x | VDD | AIN | NC | off |
* | 0 | 1 | x | EXT | RIN | IN | off |
* | 1 | 0 | 0 | INT | AIN | NC | off |
* | 1 | 0 | 1 | INT | AIN | NC | on |
* | 1 | 1 | 0 | INT | ROUT | OUT | off |
* | 1 | 1 | 1 | INT | ROUT | OUT | on |
* +----+----+----+------+---------+---------+---------------+
****************************************************************************/
enum max1161x_ref_e
{
MAX1161X_REF_VDD_AIN_NC_OFF = 0u,
MAX1161X_REF_EXT_RIN_IN_OFF = 2u,
MAX1161X_REF_INT_AIN_NC_OFF = 4u,
MAX1161X_REF_INT_AIN_NC_ON = 5u,
MAX1161X_REF_INT_ROUT_OUT_OFF = 6u,
MAX1161X_REF_INT_ROUT_OUT_ON = 7u,
};
enum max1161x_clock_e
{
MAX1161X_CLOCK_INT = 0u,
MAX1161X_CLOCK_EXT
};
enum max1161x_unibip_e
{
MAX1161X_UNIPOLAR = 0u,
MAX1161X_BIPOLAR
};
enum max1161x_reset_e
{
MAX1161X_NO_RESET = 0u,
MAX1161X_RESET
};
/* Configuration Byte */
enum max1161x_scan_e
{
MAX1161X_SCAN_FROM_ZERO = 0u,
MAX1161X_SCAN_EIGHT_TIMES,
MAX1161X_SCAN_UPPER,
MAX1161X_SCAN_NONE
};
enum max1161x_sngdif_e
{
MAX1161X_DIFFERENTIAL = 0u,
MAX1161X_SINGLE_ENDED
};
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#endif /* __INCLUDE_NUTTX_ANALOG_MAX1161X_H */
include/nuttx/clock.h
+1 -1
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@@ -124,7 +124,7 @@
* the system timer is given by USEC_PER_TICK. This is the expected number
* of microseconds between calls from the processor-specific logic to
* nxsched_process_timer(). The default value of USEC_PER_TICK is 10000
* microseconds (100KHz). However, this default setting can be overridden
* microseconds (100 Hz). However, this default setting can be overridden
* by defining the interval in microseconds as CONFIG_USEC_PER_TICK in the
* NuttX configuration file.
*
include/nuttx/compiler.h
+12
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@@ -143,6 +143,9 @@
# define inline_function __attribute__ ((always_inline,no_instrument_function))
# define noinline_function __attribute__ ((noinline))
# define printflike(a, b) __attribute__((__format__ (__printf__, a, b)))
# define scanflike(a, b) __attribute__((__format__ (__scanf__, a, b)))
/* GCC does not use storage classes to qualify addressing */
# define FAR
@@ -358,6 +361,9 @@
# define inline_function
# define noinline_function
# define printflike(a, b)
# define scanflike(a, b)
/* The reentrant attribute informs SDCC that the function
* must be reentrant. In this case, SDCC will store input
* arguments on the stack to support reentrancy.
@@ -484,6 +490,8 @@
# define naked_function
# define inline_function
# define noinline_function
# define printflike(a, b)
# define scanflike(a, b)
/* REVISIT: */
@@ -584,6 +592,8 @@
# define naked_function
# define inline_function
# define noinline_function
# define printflike(a, b)
# define scanflike(a, b)
# define FAR
# define NEAR
@@ -639,6 +649,8 @@
# define naked_function
# define inline_function
# define noinline_function
# define printflike(a, b)
# define scanflike(a, b)
# define FAR
# define NEAR
include/nuttx/fs/fs.h
+4
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@@ -469,6 +469,9 @@ struct file_struct
FAR unsigned char *fs_bufend; /* Pointer to 1 past end of buffer */
FAR unsigned char *fs_bufpos; /* Current position in buffer */
FAR unsigned char *fs_bufread; /* Pointer to 1 past last buffered read char. */
# if CONFIG_STDIO_BUFFER_SIZE > 0
unsigned char fs_buffer[CONFIG_STDIO_BUFFER_SIZE];
# endif
#endif
uint16_t fs_oflags; /* Open mode flags */
uint8_t fs_flags; /* Stream flags */
@@ -481,6 +484,7 @@ struct file_struct
struct streamlist
{
sem_t sl_sem; /* For thread safety */
struct file_struct sl_std[3];
FAR struct file_struct *sl_head;
FAR struct file_struct *sl_tail;
};
include/nuttx/fs/ioctl.h
+6
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@@ -100,6 +100,7 @@
#define _NOTECTLBASE (0x2c00) /* Note filter control ioctl commands*/
#define _NOTERAMBASE (0x2d00) /* Noteram device ioctl commands*/
#define _RCIOCBASE (0x2e00) /* Remote Control device ioctl commands */
#define _HIMEMBASE (0x2f00) /* Himem device ioctl commands*/
#define _WLIOCBASE (0x8b00) /* Wireless modules ioctl network commands */
/* boardctl() commands share the same number space */
@@ -545,6 +546,11 @@
#define _RCIOCVALID(c) (_IOC_TYPE(c)==_RCIOCBASE)
#define _RCIOC(nr) _IOC(_RCIOCBASE,nr)
/* Hime drivers *************************************************************/
#define _HIMEMIOCVALID(c) (_IOC_TYPE(c) == _HIMEMBASE)
#define _HIMEMIOC(nr) _IOC(_HIMEMBASE, nr)
/* Wireless driver network ioctl definitions ********************************/
/* (see nuttx/include/wireless/wireless.h */
include/nuttx/himem/himem.h
+173
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@@ -0,0 +1,173 @@
/****************************************************************************
* include/nuttx/himem/himem.h
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_HIMEM_HIMEM_H
#define __INCLUDE_NUTTX_HIMEM_HIMEM_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/fs/ioctl.h>
#include <signal.h>
#ifdef CONFIG_ESP32_SPIRAM
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* ESP32 MMU block size */
#define ESP_HIMEM_BLKSZ (0x8000)
/* Command: HIMEMIOC_ALLOC_BLOCKS
* Description: Allocate a certain number of physical RAM blocks.
* Arguments: A structure containing the size of physical block to allocate
* and its esp_himem_handle_t.
* Return: Zero (OK) on success. Minus one will be returned on failure
* with the errno value set appropriately.
*/
#define HIMEMIOC_ALLOC_BLOCKS _HIMEMIOC(0x0001)
/* Command: HIMEMIOC_FREE_BLOCKS
* Description: Free a certain number of physical RAM blocks.
* Arguments: A structure containing the size of physical block to allocate
* and its esp_himem_handle_t.
* Return: Zero (OK) on success. Minus one will be returned on failure
* with the errno value set appropriately.
*/
#define HIMEMIOC_FREE_BLOCKS _HIMEMIOC(0x0002)
/* Command: HIMEMIOC_ALLOC_MAP_RANGE
* Description: Free the physical RAM blocks
* Arguments: A structure containing the block size and its
* esp_himem_rangehandle_t.
* Return: Zero (OK) on success. Minus one will be returned on failure
* with the errno value set appropriately.
*/
#define HIMEMIOC_ALLOC_MAP_RANGE _HIMEMIOC(0x0003)
/* Command: HIMEMIOC_FREE_MAP_RANGE
* Description: Maps the memory addresses to the physical psram range.
* Arguments: A structure containing the esp_himem_handle_t handle, the
* esp_himem_rangehandle_t, the ram offset, the range offset,
* the length, the memory flags and the output pointer.
* Return: Zero (OK) on success. Minus one will be returned on failure
* with the errno value set appropriately.
*/
#define HIMEMIOC_FREE_MAP_RANGE _HIMEMIOC(0x0004)
/* Command: HIMEMIOC_MAP
* Description: Maps the memory addresses to the physical psram range.
* Arguments: A structure containing the esp_himem_handle_t handle, the
* esp_himem_rangehandle_t, the ram offset, the range offset,
* the length, the memory flags and the output pointer.
* Return: Zero (OK) on success. Minus one will be returned on failure
* with the errno value set appropriately.
*/
#define HIMEMIOC_MAP _HIMEMIOC(0x0005)
/* Command: HIMEMIOC_UNMAP
* Description: Unmaps the memory addresses to the physical psram range.
* Arguments: A structure containing the esp_himem_rangehandle_t, the
* memory pointer and the memory length.
* the length, the memory flags and the output pointer.
* Return: Zero (OK) on success. Minus one will be returned on failure
* with the errno value set appropriately.
*/
#define HIMEMIOC_UNMAP _HIMEMIOC(0x0006)
/* Command: HIMEMIOC_GET_PHYS_SIZE
* Description: Get the size of physical external memory
* Arguments: None
* Return: Zero (OK) on success. Minus one will be returned on failure
* with the errno value set appropriately.
*/
#define HIMEMIOC_GET_PHYS_SIZE _HIMEMIOC(0x0007)
/* Command: HIMEMIOC_GET_FREE_SIZE
* Description: Get the amount of free memory
* Arguments: None
* Return: Zero (OK) on success. Minus one will be returned on failure
* with the errno value set appropriately.
*/
#define HIMEMIOC_GET_FREE_SIZE _HIMEMIOC(0x0008)
/****************************************************************************
* Public Types
****************************************************************************/
/* Handle for a window of address space */
typedef struct esp_himem_rangedata_t
{
int block_ct;
int block_start;
} esp_himem_rangedata_t;
/* Handle for a range of physical memory */
typedef struct esp_himem_ramdata_t
{
int block_ct;
uint16_t *block;
} esp_himem_ramdata_t;
/* Opaque pointers as handles for ram/range data */
typedef struct esp_himem_ramdata_t *esp_himem_handle_t;
typedef struct esp_himem_rangedata_t *esp_himem_rangehandle_t;
/* Structs with the parameters passed to the IOCTLs */
struct esp_himem_par
{
esp_himem_handle_t handle;
esp_himem_rangehandle_t range;
size_t ram_offset;
size_t range_offset;
size_t memfree;
size_t memcnt;
size_t len;
int flags;
uint32_t *ptr;
};
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
int esp_himem_init(void);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* CONFIG_ESP32_SPIRAM */
#endif /* __INCLUDE_NUTTX_HIMEM_HIMEM_H */
include/nuttx/net/mii.h
+65 -6
View File
@@ -71,9 +71,13 @@
#define MII_MMDCONTROL 0x0d /* MMD access control register */
#define MII_ESTATUS 0x0f /* Extended status register */
/* Extended Registers: Registers 16-31 may be used for vendor specific abilities */
/* Extended Registers: Registers 16-31 may be used for vendor specific
* abilities
*/
/* National Semiconductor DP83840: 0x07-0x11, 0x14, 0x1a, 0x1d-0x1f reserved */
/* National Semiconductor DP83840: 0x07-0x11, 0x14, 0x1a, 0x1d-0x1f
* reserved
*/
#define MII_DP83840_COUNTER 0x12 /* Disconnect counter */
#define MII_DP83840_FCSCOUNTER 0x13 /* False carrier sense counter */
@@ -143,7 +147,9 @@
#define MII_KSZ8081_PHYCTRL1 0x1e /* PHY Control 1 */
#define MII_KSZ8081_PHYCTRL2 0x1f /* PHY Control 2 */
/* National Semiconductor DP83848C PHY Extended Registers. 0x8-0x15, 0x13, 0x1c reserved */
/* National Semiconductor DP83848C PHY Extended Registers.
* 0x8-0x15, 0x13, 0x1c reserved
*/
#define MII_DP83848C_STS 0x10 /* RO PHY Status Register */
#define MII_DP83848C_MICR 0x11 /* RW MII Interrupt Control Register */
@@ -158,6 +164,24 @@
#define MII_DP83848C_CDCTRL1 0x1b /* RW CD Test Control Register and BIST Extensions Register */
#define MII_DP83848C_EDCR 0x1e /* RW Energy Detect Control Register */
/* Texas Instruments DP83825I PHY Extended Registers. */
#define MII_DP83825I_PHYSTS 0x10 /* RO PHY Status Register */
#define MII_DP83825I_PHYSCR 0x11 /* RW PHY Specific Control Register */
#define MII_DP83825I_MISR1 0x12 /* RO MII Interrupt Status Register 1 */
#define MII_DP83825I_MISR2 0x13 /* RO MII Interrupt Status Register 2 */
#define MII_DP83825I_FCSCR 0x14 /* RO False Carrier Sense Counter Register */
#define MII_DP83825I_RECR 0x15 /* RO Receive Error Counter Register */
#define MII_DP83825I_BICSR 0x16 /* RW BIST Control Register */
#define MII_DP83825I_RCSR 0x17 /* RW RMII and Control and Status Register */
#define MII_DP83825I_LEDCR 0x18 /* RW LED Direct Control Register */
#define MII_DP83825I_PHYCR 0x19 /* RW PHY Control Register */
#define MII_DP83825I_10BTSCR 0x1a /* RW 10Base-T Status/Control Register */
#define MII_DP83825I_BICSR1 0x1b /* RW BIST Control Register 1 */
#define MII_DP83825I_BICSR2 0x1c /* RW BIST Control Register 2 */
#define MII_DP83825I_LEDCR 0x1e /* RW Energy Detect Control Register */
#define MII_DP83825I_PHYRCR 0x1f /* RW PHY Reset Control Register */
/* SMSC LAN8720 PHY Extended Registers */
#define MII_LAN8720_REV 0x10 /* Silicon Revision Register */
@@ -219,7 +243,9 @@
#define MII_MSR_100BASETXFULL (1 << 14) /* Bit 14: 100BASE-TX full duplex able */
#define MII_MSR_100BASET4 (1 << 15) /* Bit 15: 100BASE-T4 able */
/* MII ID1 register bits: Bits 3-18 of the Organizationally Unique identifier (OUI) */
/* MII ID1 register bits: Bits 3-18 of the Organizationally Unique
* identifier (OUI)
*/
/* MII ID2 register bits */
@@ -318,6 +344,7 @@
# define MII_MMDCONTROL_FUNC_WINCR (3 << MII_MMDCONTROL_FUNC_SHIFT) /* Data, post incr on writes */
/* Extended status register */
/* Bits 0-11: Reserved */
#define MII_ESTATUS_1000BASETHALF (1 << 12) /* Bit 12: 1000BASE-T Half Duplex able */
#define MII_ESTATUS_1000BASETFULL (1 << 13) /* Bit 13: 1000BASE-T Full Duplex able */
@@ -348,6 +375,30 @@
#define MII_RBR_RMIIREV10 (1 << 4) /* Bit 4: 0=RMIIv1.2 1-RMIIv1.0 */
#define MII_RBR_RMIIMODE (1 << 5) /* Bit 5: 0=MII mode 1=RMII mode */
/* Texas Instruments DP83825I ***********************************************/
/* DP838825I MII ID1/2 register bits */
#define MII_PHYID1_DP83825I 0x2000 /* ID1 value for DP838825 */
#define MII_PHYID2_DP83825I 0xa140 /* ID2 value for DP838825 */
/* PHYSTS Register (0x10) */
#define MII_DP83825I_PHYSTS_SPEED (1 << 1) /* Bit 2: Speed Status Register */
#define MII_DP83825I_PHYSTS_DUPLEX (1 << 2) /* Bit 3: Duplex Status Register */
/* RCSC Register (0x17) */
#define MII_DP83825I_RCSC_ELAST_MASK 0x0003 /* Bits 0-1: Receive elasticity buffer */
# define MII_DP83825I_RCSC_ELAST_14 0x0000 /* 14 bit tolerance */
# define MII_DP83825I_RCSC_ELAST_2 0x0001 /* 2 bit tolerance */
# define MII_DP83825I_RCSC_ELAST_6 0x0002 /* 6 bit tolerance */
# define MII_DP83825I_RCSC_ELAST_10 0x0003 /* 10 bit tolerance */
#define MII_DP83825I_RCSC_RXUNFSTS (1 << 2) /* Bit 2: RX FIFO underflow */
#define MII_DP83825I_RCSC_RXOVFSTS (1 << 3) /* Bit 3: RX FIFO overflow */
#define MII_DP83825I_RCSC_RMIIREV10 (1 << 4) /* Bit 4: 0=RMIIv1.2 1-RMIIv1.0 */
#define MII_DP83825I_RCSC_RMIICS (1 << 7) /* Bit 7: 0=25MHz 1=50MHz */
/* SMSC LAN8720 *************************************************************/
/* SMSC LAN8720 MII ID1/2 register bits */
@@ -480,7 +531,7 @@
#define LM_LEDCONFIG_LED0_10BASET (6 << LM_LEDCONFIG_LED0_SHIFT) /* 10BASE-T mode */
#define LM_LEDCONFIG_LED0_FDUPLEX (7 << LM_LEDCONFIG_LED0_SHIFT) /* Full duplex */
#define LM_LEDCONFIG_LED0_OKRXTX (8 << LM_LEDCONFIG_LED0_SHIFT) /* Full duplex */
#define LM_LEDCONFIG_LED1_SHIFT (4) /* Bits 7-4: LED1 Source */
#define LM_LEDCONFIG_LED1_SHIFT (4) /* Bits 7-4: LED1 Source */
#define LM_LEDCONFIG_LED1_MASK (0x0f << LM_LEDCONFIG_LED1_SHIFT)
#define LM_LEDCONFIG_LED1_LINKOK (0 << LM_LEDCONFIG_LED1_SHIFT) /* Link OK */
#define LM_LEDCONFIG_LED1_RXTX (1 << LM_LEDCONFIG_LED1_SHIFT) /* RX or TX activity */
@@ -543,6 +594,7 @@
# define KS8721_10BTCR_MODE_10BTFD (5 << KS8721_10BTCR_MODE_SHIFT) /* 10BASE-T full duplex */
# define KS8721_10BTCR_MODE_100BTFD (6 << KS8721_10BTCR_MODE_SHIFT) /* 100BASE-T full duplex */
# define KS8721_10BTCR_MODE_ISOLATE (7 << KS8721_10BTCR_MODE_SHIFT) /* PHY/MII isolate */
#define KS8721_10BTCR_ISOLATE (1 << 5) /* Bit 5: PHY isolate */
#define KS8721_10BTCR_PAUSE (1 << 6) /* Bit 6: Enable pause */
#define KS8721_10BTCR_ANEGCOMP (1 << 7) /* Bit 7: Auto-negotiation complete */
@@ -567,9 +619,11 @@
#define MII_PHYID2_KSZ8081 0x1560 /* ID2 value for Micrel KSZ8081 */
/* KSZ8081 Digital Reserve Control */
/* Bits 5-15: Reserved */
#define KSZ8081_DRCTRL_PLLOFF (1 << 4) /* Bit 4: Turn PLL off in EDPD mode */
/* Bits 0-3: Reserved */
/* KSZ8041/51/81 Register 0x1b: Interrupt control/status */
#define MII_KSZ80X1_INT_JEN (1 << 15) /* Jabber interrupt enable */
@@ -613,10 +667,12 @@
# define MII_PHYCTRL2_MODE_DUPLEX (4 << MII_PHYCTRL2_MODE_SHIFT) /* Full duplex */
# define MII_PHYCTRL2_MODE_10FDX (5 << MII_PHYCTRL2_MODE_SHIFT) /* 10Base-T full-duplex */
# define MII_PHYCTRL2_MODE_100FDX (6 << MII_PHYCTRL2_MODE_SHIFT) /* 100Base-T full-duplex */
#define MII_PHYCTRL2_SEQTEST (1 << 1) /* Bit 1: Enable SQE test */
#define MII_PHYCTRL2_DISDS (1 << 0) /* Bit 1: Disable data scrambling */
/* KSZ8051/81 Register 0x1e: PHY Control 1 */
/* Bits 10-15: Reserved */
#define MII_PHYCTRL1_ENPAUSE (1 << 9) /* Bit 9: Enable pause */
#define MII_PHYCTRL1_LINKSTATUS (1 << 8) /* Bit 8: Link status */
@@ -721,6 +777,7 @@
# define MII_CONFIG2_SNR_AV64 (1 << MII_CONFIG2_SNR_SHIFT) /* signal to noise ratio averaging over 64 symbols */
# define MII_CONFIG2_SNR_AV128 (2 << MII_CONFIG2_SNR_SHIFT) /* signal to noise ratio averaging over 128 symbols */
# define MII_CONFIG2_SNR_AV256 (3 << MII_CONFIG2_SNR_SHIFT) /* signal to noise ratio averaging over 256 symbols */
#define MII_CONFIG2_WLIM_SHIFT (6) /* SQI warning limit */
#define MII_CONFIG2_WLIM_MASK (7 << MII_CONFIG2_WLIM_SHIFT)
# define MII_CONFIG2_WLIM_NO (0 << MII_CONFIG2_WLIM_SHIFT) /* no warning */
@@ -731,6 +788,7 @@
# define MII_CONFIG2_WLIM_E (5 << MII_CONFIG2_WLIM_SHIFT) /* Class E SNR warning limit */
# define MII_CONFIG2_WLIM_F (6 << MII_CONFIG2_WLIM_SHIFT) /* Class F SNR warning limit */
# define MII_CONFIG2_WLIM_G (7 << MII_CONFIG2_WLIM_SHIFT) /* Class G SNR warning limit */
#define MII_CONFIG2_SNR_F_SHIFT (3) /* signal to noise ratio fail limit */
#define MII_CONFIG2_SNR_F_MASK (7 << MII_CONFIG2_SNR_F_SHIFT)
# define MII_CONFIG2_SNR_F_NL (0 << MII_CONFIG2_SNR_F_SHIFT) /* no limit */
@@ -741,8 +799,9 @@
# define MII_CONFIG2_SNR_F_CLE (5 << MII_CONFIG2_SNR_F_SHIFT) /* Class E */
# define MII_CONFIG2_SNR_F_CLF (6 << MII_CONFIG2_SNR_F_SHIFT) /* Class F */
# define MII_CONFIG2_SNR_F_CLG (7 << MII_CONFIG2_SNR_F_SHIFT) /* Class G */
#define MII_CONFIG2_JUMBO_EN (1 << 2) /* enable packets up to 16 kB instead of 4 kB */
#define MII_CONFIG2_SLP_T_SHIFT (0) /* sleep request timeout */
#define MII_CONFIG2_SLP_T_SHIFT (0) /* sleep request timeout */
#define MII_CONFIG2_SLP_T_MASK (3 << MII_CONFIG2_SLP_T_SHIFT)
# define MII_CONFIG2_SLP_T_04 (0 << MII_CONFIG2_SLP_T_SHIFT) /* sleep request timeout 0.4 ms */
# define MII_CONFIG2_SLP_T_1 (1 << MII_CONFIG2_SLP_T_SHIFT) /* sleep request timeout 1 ms */
include/nuttx/power/pm.h
+28 -43
View File
@@ -1,37 +1,20 @@
/****************************************************************************
* include/nuttx/power/pm.h
* NuttX Power Management Interfaces
* arch/arm/src/nrf52/nrf52_pminitialize.c
*
* Copyright (C) 2011-2012, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Author: Matias Nitsche <mnitsche@dc.uba.ar>
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* http://www.apache.org/licenses/LICENSE-2.0
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
@@ -227,12 +210,12 @@ struct pm_governor_s
*
* Description:
* Invoked by the PM system during initialization, to allow the governor
* to initialize its internal data. This can be left to NULL if not needed
* by the governor.
* to initialize its internal data. This can be left to NULL if not
* needed by the governor.
*
* NOTE: since this will be called from pm_initialize(), the system
* is in very early boot state when this callback is invoked. Thus,
* only ver basic initialization should be performed (e.g. no memory
* only very basic initialization should be performed (e.g. no memory
* should be allocated).
*
**************************************************************************/
@@ -379,8 +362,9 @@ int pm_unregister(FAR struct pm_callback_s *callbacks);
* higher priorities. Higher priority activity can prevent the system
* from entering reduced power states for a longer period of time.
*
* As an example, a button press might be higher priority activity because
* it means that the user is actively interacting with the device.
* As an example, a button press might be higher priority activity
* because it means that the user is actively interacting with the
* device.
*
* Returned Value:
* None.
@@ -405,7 +389,8 @@ void pm_activity(int domain, int priority);
* domain - The domain of the PM activity
* state - The state want to stay.
*
* As an example, media player might stay in normal state during playback.
* As an example, media player might stay in normal state during
* playback.
*
* Returned Value:
* None.
@@ -465,15 +450,15 @@ uint32_t pm_staycount(int domain, enum pm_state_e state);
*
* Description:
* This function is called from the MCU-specific IDLE loop to monitor the
* the power management conditions. This function returns the "recommended"
* power management state based on the PM configuration and activity
* reported in the last sampling periods. The power management state is
* not automatically changed, however. The IDLE loop must call
* the power management conditions. This function returns the
* "recommended" power management state based on the PM configuration and
* activity reported in the last sampling periods. The power management
* state is not automatically changed, however. The IDLE loop must call
* pm_changestate() in order to make the state change.
*
* These two steps are separated because the platform-specific IDLE loop may
* have additional situational information that is not available to the
* the PM sub-system. For example, the IDLE loop may know that the
* These two steps are separated because the platform-specific IDLE loop
* may have additional situational information that is not available to
* the the PM sub-system. For example, the IDLE loop may know that the
* battery charge level is very low and may force lower power states
* even if there is activity.
*
include/nuttx/sensors/ioctl.h
+9 -9
View File
@@ -262,11 +262,11 @@
/* Command: SNIOC_GET_NEVENTBUF
* Description: the number of sensor events that sensor buffer of upper half holds.
* Argument: This is the number of events pointer, is output parameter.
* Note: We need to tell the application layer number of sensor events in
* sensor buffer. This buffer is used to solve the problem that the
* application layer can't read the sensor event in time. We recommend
* the number of sensor events in application layer's buffer is same as
* result by call this function.
* Note: Tell the application layer number of sensor events in sensor buffer.
* This buffer is used to solve the problem that the application layer
* can't read the sensor event in time. Recommend the number of sensor
* events in application layer's buffer is same as result by call this
* function.
* This is number of sensor events rather than the length of buffer.
* See sensor.h(struct sensor_lower_half_s buffer_bytes).
*/
@@ -274,11 +274,11 @@
#define SNIOC_GET_NEVENTBUF _SNIOC(0x0070)
/* Command: SNIOC_SET_BUFFER_SIZE
* Description: Use to set size of intermediate circual buffer in upper half driver.
* Description: Set size of intermediate circualr buffer in upper half driver.
* Argument: This is the size of buffer pointer.
* Note: The application layer can set size of intermediate circual buffer
* by this ioctl cmd. The size is in bytes, it should be a multiple of
* an event.
* Note: The application layer can set size of intermediate circualr buffer
* by this ioctl command. The size is in bytes, it should be a multiple
* of an event.
*/
#define SNIOC_SET_BUFFER_SIZE _SNIOC(0x0071)
include/nuttx/sensors/sensor.h
+15 -14
View File
@@ -446,7 +446,7 @@ struct sensor_ops_s
* If *period_us > max_delay it will be truncated to max_dealy and if
* *period_us < min_delay it will be replaced by min_delay.
*
* Before changing the interval, You need to push the prepared data to
* Before changing the interval, you need to push the prepared data to
* ensure that they are not lost.
*
* Input Parameters:
@@ -471,7 +471,7 @@ struct sensor_ops_s
* This function can be called while the sensor is activated,
* in which case it must not cause any sensor measurements to be lost.
* So, it is necessary to flush fifo or read ready data from data
* register to prevent data lost before You using batch mode.
* register to prevent data lost before you using batch mode.
*
* This sensor default mode isn't batch mode, so you need call this
* function and *latency_us != 0.
@@ -509,15 +509,16 @@ struct sensor_ops_s
/**************************************************************************
* Name: fetch
*
* We can fetch sensor register data by this function. It will use buffer
* of sensor_read provided and disables intermediate buffer of upper half.
* We recommend lowerhalf driver writer to use this function for slower
* ODR(output data rate) of sensor because this way saves space and simple.
* Fetch sensor register data by this function. It will use buffer of
* userspace provided and disables intermediate buffer of upper half. It's
* recommend that the lowerhalf driver writer to use this function for
* slower sensor ODR (output data rate) of sensor because this way saves
* space and it's simple.
*
* If fectch isn't NULL, upper half driver will disable intermediate
* If fetch isn't NULL, upper half driver will disable intermediate
* buffer and userspace can't set buffer size by ioctl.
*
* You can call this function to read sensor register data by i2c/spi bus
* You can call this function to read sensor register data by I2C/SPI bus
* when open mode is non-block, and poll are always successful.
* When you call this function and open mode is block, you will wait
* until sensor data ready, then read sensor data.
@@ -540,7 +541,7 @@ struct sensor_ops_s
/**************************************************************************
* Name: control
*
* In this method, user can set some special config for the sensor,
* With this method, the user can set some special config for the sensor,
* such as changing the custom mode, setting the custom resolution, reset,
* etc, which are all parsed and implemented by lower half driver.
*
@@ -656,14 +657,14 @@ extern "C"
* "upper half" Sensor device and registers that device so that can be used
* by application code.
*
* You can register the chararter device by node name format based on the
* You can register the character device by node name format based on the
* type of sensor. Multiple types of the same type are distinguished by
* numbers. eg: accel0, accel1. This type of sensor must be less than
* SENSOR_TYPE_COUNT. This API corresponds to the sensor_unregister.
*
* Input Parameters:
* dev - A pointer to an instance of lower half sensor driver. This
* instance is bound to the sensor driver and must persists as long
* instance is bound to the sensor driver and must persist as long
* as the driver persists.
* devno - The user specifies which device of this type, from 0. If the
* devno alerady exists, -EEXIST will be returned.
@@ -689,7 +690,7 @@ int sensor_register(FAR struct sensor_lowerhalf_s *dev, int devno);
*
* Input Parameters:
* dev - A pointer to an instance of lower half sensor driver. This
* instance is bound to the sensor driver and must persists as long
* instance is bound to the sensor driver and must persist as long
* as the driver persists.
* path - The user specifies path of device. ex: /dev/sensor/xxx.
* esize - The element size of intermediate circular buffer.
@@ -707,7 +708,7 @@ int sensor_custom_register(FAR struct sensor_lowerhalf_s *dev,
* Name: sensor_unregister
*
* Description:
* This function unregister character node and release all resource about
* This function unregisters character node and releases all resource from
* upper half driver. This API corresponds to the sensor_register.
*
* Input Parameters:
@@ -723,7 +724,7 @@ void sensor_unregister(FAR struct sensor_lowerhalf_s *dev, int devno);
* Name: sensor_custom_unregister
*
* Description:
* This function unregister character node and release all resource about
* This function unregisters character node and releases all resource from
* upper half driver. This API corresponds to the sensor_custom_register.
*
* Input Parameters:
include/nuttx/signal.h
+1 -1
View File
@@ -366,7 +366,7 @@ int nxsig_kill(pid_t pid, int signo);
* is forever.
*
* If the info argument is non-NULL, the selected signal number is stored
* in the si_signo member and the cause of the signal is store din the
* in the si_signo member and the cause of the signal is stored in the
* si_code member. The content of si_value is only meaningful if the
* signal was generated by sigqueue().
*
include/nuttx/spi/spi.h
+12 -12
View File
@@ -57,7 +57,7 @@
/* These SPI configuration options affect the form of the SPI interface:
*
* CONFIG_SPI_EXCHANGE - Driver supports a single exchange method
* (vs a recvblock() and sndblock ()methods).
* (vs a recvblock() and sndblock() methods).
* CONFIG_SPI_CMDDATA - Devices on the SPI bus require out-of-band support
* to distinguish command transfers from data transfers. Such devices
* will often support either 9-bit SPI (yech) or 8-bit SPI and a GPIO
@@ -95,7 +95,7 @@
* Name: SPI_SELECT
*
* Description:
* Enable/disable the SPI chip select. The implementation of this method
* Enable/disable the SPI chip select. The implementation of this method
* must include handshaking: If a device is selected, it must hold off
* all other attempts to select the device until the device is deselected.
* Required.
@@ -173,7 +173,7 @@
* Name: SPI_SETBITS
*
* Description:
* Set the number if bits per word.
* Set the number of bits per word.
*
* Input Parameters:
* dev - Device-specific state data
@@ -290,7 +290,7 @@
* Name: SPI_CMDDATA
*
* Description:
* Some devices require and additional out-of-band bit to specify if the
* Some devices require an additional out-of-band bit to specify if the
* next word sent to the device is a command or data. This is typical, for
* example, in "9-bit" displays where the 9th bit is the CMD/DATA bit.
* This function provides selection of command or data.
@@ -322,7 +322,7 @@
*
* Input Parameters:
* dev - Device-specific state data
* wd - The word to send. the size of the data is determined by the
* wd - The word to send. The size of the data is determined by the
* number of bits selected for the SPI interface.
*
* Returned Value:
@@ -341,7 +341,7 @@
* Input Parameters:
* dev - Device-specific state data
* buffer - A pointer to the buffer of data to be sent
* nwords - the length of data to send from the buffer in number of words.
* nwords - The length of data to send from the buffer in number of words.
* The wordsize is determined by the number of bits-per-word
* selected for the SPI interface. If nbits <= 8, the data is
* packed into uint8_t's; if nbits >8, the data is packed into
@@ -367,10 +367,10 @@
* Input Parameters:
* dev - Device-specific state data
* buffer - A pointer to the buffer in which to receive data
* nwords - the length of data that can be received in the buffer in number
* nwords - The length of data that can be received in the buffer in number
* of words. The wordsize is determined by the number of bits-
* per-word selected for the SPI interface. If nbits <= 8, the
* data is packed into uint8_t's; if nbits >8, the data is packed
* data is packed into uint8_t's; if nbits > 8, the data is packed
* into uint16_t's
*
* Returned Value:
@@ -394,8 +394,8 @@
* dev - Device-specific state data
* txbuffer - A pointer to the buffer of data to be sent
* rxbuffer - A pointer to the buffer in which to receive data
* nwords - the length of data that to be exchanged in units of words.
* The wordsize is determined by the number of bits-per-word
* nwords - The length of data to be exchanged in units of words. The
* wordsize is determined by the number of bits-per-word
* selected for the SPI interface. If nbits <= 8, the data is
* packed into uint8_t's; if nbits >8, the data is packed into
* uint16_t's
@@ -413,8 +413,8 @@
* Name: SPI_REGISTERCALLBACK
*
* Description:
* Register a callback that that will be invoked on any media status
* change (i.e, anything that would be reported differently by SPI_STATUS).
* Register a callback that will be invoked on any media status change
* (i.e, anything that would be reported differently by SPI_STATUS).
* Optional
*
* Input Parameters:
include/nuttx/streams.h
+5 -4
View File
@@ -310,7 +310,8 @@ void lib_rawsostream(FAR struct lib_rawsostream_s *outstream, int fd);
* Name: lib_lowoutstream
*
* Description:
* Initializes a stream for use with low-level, architecture-specific output.
* Initializes a stream for use with low-level, architecture-specific
* output.
* Defined in ib/stdio/lib_lowoutstream.c
*
* Input Parameters:
@@ -451,7 +452,7 @@ int lib_snoflush(FAR struct lib_sostream_s *this);
****************************************************************************/
int lib_sprintf(FAR struct lib_outstream_s *obj,
FAR const IPTR char *fmt, ...);
FAR const IPTR char *fmt, ...) printflike(2, 3);
/****************************************************************************
* Name: lib_vsprintf
@@ -463,7 +464,7 @@ int lib_sprintf(FAR struct lib_outstream_s *obj,
****************************************************************************/
int lib_vsprintf(FAR struct lib_outstream_s *obj,
FAR const IPTR char *src, va_list ap);
FAR const IPTR char *src, va_list ap) printflike(2, 0);
/****************************************************************************
* Name: lib_vscanf
@@ -475,7 +476,7 @@ int lib_vsprintf(FAR struct lib_outstream_s *obj,
****************************************************************************/
int lib_vscanf(FAR struct lib_instream_s *obj, FAR int *lastc,
FAR const IPTR char *src, va_list ap);
FAR const IPTR char *src, va_list ap) scanflike(3, 0);
#undef EXTERN
#if defined(__cplusplus)
include/stdint.h
+2 -33
View File
@@ -147,19 +147,6 @@
# define UINTMAX_MIN UINT64_MIN
# define UINTMAX_MAX UINT64_MAX
# define PRIdMAX PRId64
# define PRIiMAX PRIi64
# define PRIoMAX PRIo64
# define PRIuMAX PRIu64
# define PRIxMAX PRIx64
# define PRIXMAX PRIX64
# define SCNdMAX SCNd64
# define SCNiMAX SCNi64
# define SCNoMAX SCNo64
# define SCNuMAX SCNu64
# define SCNxMAX SCNx64
# define INTMAX_C(x) INT64_C(x)
# define UINTMAX_C(x) UINT64_C(x)
#else
@@ -169,19 +156,6 @@
# define UINTMAX_MIN UINT32_MIN
# define UINTMAX_MAX UINT32_MAX
# define PRIdMAX PRId32
# define PRIiMAX PRIi32
# define PRIoMAX PRIo32
# define PRIuMAX PRIu32
# define PRIxMAX PRIx32
# define PRIXMAX PRIX32
# define SCNdMAX SCNd32
# define SCNiMAX SCNi32
# define SCNoMAX SCNo32
# define SCNuMAX SCNu32
# define SCNxMAX SCNx32
# define INTMAX_C(x) INT32_C(x)
# define UINTMAX_C(x) UINT32_C(x)
#endif
@@ -300,13 +274,8 @@ typedef _uint_farptr_t uint_farptr_t;
/* Greatest-width integer types */
#ifdef __INT64_DEFINED
typedef _int64_t intmax_t;
typedef _uint64_t uintmax_t;
#else
typedef _int32_t intmax_t;
typedef _uint32_t uintmax_t;
#endif
typedef _intmax_t intmax_t;
typedef _uintmax_t uintmax_t;
#endif /* CONFIG_ARCH_STDINT_H */
#endif /* __INCLUDE_STDINT_H */
include/stdio.h
+31 -21
View File
@@ -78,9 +78,9 @@
/* The first three _iob entries are reserved for standard I/O */
#define stdin (nxsched_get_streams()->sl_head)
#define stdout (nxsched_get_streams()->sl_head->fs_next)
#define stderr (nxsched_get_streams()->sl_head->fs_next->fs_next)
#define stdin (&nxsched_get_streams()->sl_std[0])
#define stdout (&nxsched_get_streams()->sl_std[1])
#define stderr (&nxsched_get_streams()->sl_std[2])
/* Path to the directory where temporary files can be created */
@@ -141,13 +141,15 @@ int fgetc(FAR FILE *stream);
int fgetpos(FAR FILE *stream, FAR fpos_t *pos);
FAR char *fgets(FAR char *s, int n, FAR FILE *stream);
FAR FILE *fopen(FAR const char *path, FAR const char *type);
int fprintf(FAR FILE *stream, FAR const IPTR char *format, ...);
int fprintf(FAR FILE *stream, FAR const IPTR char *format, ...)
printflike(2, 3);
int fputc(int c, FAR FILE *stream);
int fputs(FAR const IPTR char *s, FAR FILE *stream);
size_t fread(FAR void *ptr, size_t size, size_t n_items, FAR FILE *stream);
FAR FILE *freopen(FAR const char *path, FAR const char *mode,
FAR FILE *stream);
int fscanf(FAR FILE *stream, FAR const IPTR char *fmt, ...);
int fscanf(FAR FILE *stream, FAR const IPTR char *fmt, ...)
scanflike(2, 3);
int fseek(FAR FILE *stream, long int offset, int whence);
int fseeko(FAR FILE *stream, off_t offset, int whence);
int fsetpos(FAR FILE *stream, FAR fpos_t *pos);
@@ -174,28 +176,35 @@ int ungetc(int c, FAR FILE *stream);
*/
void perror(FAR const char *s);
int printf(FAR const IPTR char *fmt, ...);
int printf(FAR const IPTR char *fmt, ...) printflike(1, 2);
int putc(int c, FAR FILE *stream);
int putchar(int c);
int puts(FAR const IPTR char *s);
int rename(FAR const char *oldpath, FAR const char *newpath);
int sprintf(FAR char *buf, FAR const IPTR char *fmt, ...);
int asprintf(FAR char **ptr, FAR const IPTR char *fmt, ...);
int sprintf(FAR char *buf, FAR const IPTR char *fmt, ...)
printflike(2, 3);
int asprintf(FAR char **ptr, FAR const IPTR char *fmt, ...)
printflike(2, 3);
int snprintf(FAR char *buf, size_t size,
FAR const IPTR char *fmt, ...);
int sscanf(FAR const char *buf, FAR const IPTR char *fmt, ...);
FAR const IPTR char *fmt, ...) printflike(3, 4);
int sscanf(FAR const char *buf, FAR const IPTR char *fmt, ...)
scanflike(2, 3);
int scanf(FAR const IPTR char *fmt, ...);
int vasprintf(FAR char **ptr, FAR const IPTR char *fmt, va_list ap);
int scanf(FAR const IPTR char *fmt, ...) scanflike(1, 2);
int vasprintf(FAR char **ptr, FAR const IPTR char *fmt, va_list ap)
printflike(2, 0);
int vfprintf(FAR FILE *stream, FAR const IPTR char *fmt,
va_list ap);
int vfscanf(FAR FILE *stream, FAR const IPTR char *fmt, va_list ap);
int vprintf(FAR const IPTR char *fmt, va_list ap);
int vscanf(FAR const IPTR char *fmt, va_list ap);
va_list ap) printflike(2, 0);
int vfscanf(FAR FILE *stream, FAR const IPTR char *fmt, va_list ap)
scanflike(2, 0);
int vprintf(FAR const IPTR char *fmt, va_list ap) printflike(1, 0);
int vscanf(FAR const IPTR char *fmt, va_list ap) scanflike(1, 0);
int vsnprintf(FAR char *buf, size_t size, FAR const IPTR char *fmt,
va_list ap);
int vsprintf(FAR char *buf, FAR const IPTR char *fmt, va_list ap);
int vsscanf(FAR const char *buf, FAR const IPTR char *fmt, va_list ap);
va_list ap) printflike(3, 0);
int vsprintf(FAR char *buf, FAR const IPTR char *fmt, va_list ap)
printflike(2, 0);
int vsscanf(FAR const char *buf, FAR const IPTR char *fmt, va_list ap)
scanflike(2, 0);
/* Operations on file descriptors including:
*
@@ -205,8 +214,9 @@ int vsscanf(FAR const char *buf, FAR const IPTR char *fmt, va_list ap);
*/
FAR FILE *fdopen(int fd, FAR const char *type);
int dprintf(int fd, FAR const IPTR char *fmt, ...);
int vdprintf(int fd, FAR const IPTR char *fmt, va_list ap);
int dprintf(int fd, FAR const IPTR char *fmt, ...) printflike(2, 3);
int vdprintf(int fd, FAR const IPTR char *fmt, va_list ap)
printflike(2, 0);
/* Operations on paths */
include/sys/epoll.h
+4
View File
@@ -74,6 +74,10 @@ enum EPOLL_EVENTS
#define EPOLLERR EPOLLERR
EPOLLHUP = POLLHUP,
#define EPOLLHUP EPOLLHUP
EPOLLRDHUP = 0x2000,
#define EPOLLRDHUP EPOLLRDHUP
EPOLLWAKEUP = 1u << 29,
#define EPOLLWAKEUP EPOLLWAKEUP
EPOLLONESHOT = 1u << 30,
#define EPOLLONESHOT EPOLLONESHOT
};