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boards: nxstyle fixes

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nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea
2021-03-20 13:01:22 +01:00
committed by Xiang Xiao
parent c798076084
commit b8175f2841
173 changed files with 2716 additions and 1833 deletions
Download Patch File Download Diff File Expand all files Collapse all files
boards/arm/kinetis/teensy-3.x/src/k20_pwm.c
+3 -1
View File
@@ -75,7 +75,9 @@ int kinetis_pwm_setup(void)
if (!initialized)
{
#ifdef CONFIG_KINETIS_FTM0_PWM
/* Call kinetis_pwminitialize() to get an instance of the PWM interface */
/* Call kinetis_pwminitialize() to get an instance of
* the PWM interface
*/
pwm = kinetis_pwminitialize(0);
if (!pwm)
boards/arm/stm32/clicker2-stm32/src/stm32_adc.c
+8 -2
View File
@@ -77,11 +77,17 @@
/* Identifying number of each ADC channel: Variable Resistor. */
#ifdef CONFIG_STM32_ADC1
static const uint8_t g_chanlist[ADC1_NCHANNELS] = {10};
static const uint8_t g_chanlist[ADC1_NCHANNELS] =
{
10
};
/* Configurations of pins used byte each ADC channels */
static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN10};
static const uint32_t g_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN10
};
#endif
/****************************************************************************
boards/arm/stm32/clicker2-stm32/src/stm32_appinit.c
+2 -2
View File
@@ -90,8 +90,8 @@ int board_app_initialize(uintptr_t arg)
#ifdef CONFIG_CLICKER2_STM32_SYSLOG_FILE
/* Delay some time for the automounter to finish mounting before bringing up
* file syslog.
/* Delay some time for the automounter to finish mounting before
* bringing up file syslog.
*/
nxsig_usleep(CONFIG_CLICKER2_STM32_SYSLOG_FILE_DELAY * 1000);
boards/arm/stm32/clicker2-stm32/src/stm32_autoleds.c
+4 -4
View File
@@ -145,7 +145,7 @@ static void board_led2_off(int led)
return;
}
stm32_gpiowrite(GPIO_LED2, false);
stm32_gpiowrite(GPIO_LED2, false);
}
/****************************************************************************
@@ -158,10 +158,10 @@ static void board_led2_off(int led)
void board_autoled_initialize(void)
{
/* Configure LED1-2 GPIOs for output */
/* Configure LED1-2 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
}
/****************************************************************************
boards/arm/stm32/clicker2-stm32/src/stm32_boot.c
+11 -10
View File
@@ -40,17 +40,18 @@
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
* All STM32 architectures must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spidev_initialize() has been brought into the link.
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function stm32_spidev_initialize() has been brought into the link.
*/
if (stm32_spidev_initialize)
@@ -60,10 +61,10 @@ void stm32_boardinitialize(void)
#endif
#ifdef CONFIG_STM32_OTGFS
/* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
* disabled, and 3) the weak function stm32_usb_configure() has been brought
* into the build. Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also
* selected.
/* Initialize USB if the 1) OTG FS controller is in the configuration and
* 2) disabled, and 3) the weak function stm32_usb_configure() has been
* brought into the build. Presumeably either CONFIG_USBDEV or
* CONFIG_USBHOST is also selected.
*/
stm32_usb_configure();
@@ -88,7 +89,7 @@ void stm32_boardinitialize(void)
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_initialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
boards/arm/stm32/clicker2-stm32/src/stm32_can.c
+2 -1
View File
@@ -39,7 +39,8 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ********************************************************************/
/* Configuration ************************************************************/
#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
# warning "Both CAN1 and CAN2 are enabled. Only CAN1 is connected."
boards/arm/stm32/clicker2-stm32/src/stm32_mrf24j40.c
+4 -3
View File
@@ -90,7 +90,7 @@ struct stm32_priv_s
* varying boards and MCUs.
*
* irq_attach - Attach the MRF24J40 interrupt handler to the GPIO
interrupt
* interrupt
* irq_enable - Enable or disable the GPIO interrupt
*/
@@ -217,7 +217,7 @@ static int stm32_mrf24j40_devsetup(FAR struct stm32_priv_s *priv)
/* Configure the interrupt pin */
stm32_configgpio(priv->intcfg);
stm32_configgpio(priv->intcfg);
/* Initialize the SPI bus and get an instance of the SPI interface */
@@ -269,7 +269,8 @@ static int stm32_mrf24j40_devsetup(FAR struct stm32_priv_s *priv)
ret = mac802154dev_register(mac, 0);
if (ret < 0)
{
wlerr("ERROR: Failed to register the MAC character driver /dev/ieee%d: %d\n",
wlerr("ERROR:");
wlerr(" Failed to register the MAC character driver /dev/ieee%d: %d\n",
0, ret);
return ret;
}
boards/arm/stm32/clicker2-stm32/src/stm32_spi.c
+34 -20
View File
@@ -48,7 +48,8 @@
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Mikroe Clicker2 STM32 board.
* Called to configure SPI chip select GPIO pins for the Mikroe Clicker2
* STM32 board.
*
****************************************************************************/
@@ -70,31 +71,34 @@ void weak_function stm32_spidev_initialize(void)
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
* must be provided by board-specific logic. They are implementations of
* the select and status methods of the SPI interface defined by struct
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods
* (including stm32_spibus_initialize()) are provided by common STM32
* logic. To use this common SPI logic on your board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
@@ -104,14 +108,17 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi2select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
switch (devid)
{
#ifdef CONFIG_IEEE802154_MRF24J40
case SPIDEV_IEEE802154(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB2_CS, !selected);
@@ -119,6 +126,7 @@ void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
#endif
#ifdef CONFIG_IEEE802154_XBEE
case SPIDEV_IEEE802154(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB2_CS, !selected);
@@ -126,6 +134,7 @@ void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
#endif
#ifdef CONFIG_MMCSD_SPI
case SPIDEV_MMCSD(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB2_CS, !selected);
@@ -152,14 +161,17 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi3select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
switch (devid)
{
#ifdef CONFIG_IEEE802154_MRF24J40
case SPIDEV_IEEE802154(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB1_CS, !selected);
@@ -167,6 +179,7 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
#endif
#ifdef CONFIG_IEEE802154_XBEE
case SPIDEV_IEEE802154(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB1_CS, !selected);
@@ -174,6 +187,7 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
#endif
#ifdef CONFIG_MMCSD_SPI
case SPIDEV_MMCSD(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB1_CS, !selected);
boards/arm/stm32/clicker2-stm32/src/stm32_usb.c
+10 -7
View File
@@ -53,15 +53,17 @@
* Name: stm32_usb_configure
*
* Description:
* Called from stm32_boardinitialize very early in inialization to setup USB-related
* GPIO pins for the Olimex STM32 P407 board.
* Called from stm32_boardinitialize very early in inialization to setup
* USB-related GPIO pins for the Olimex STM32 P407 board.
*
****************************************************************************/
void stm32_usb_configure(void)
{
#ifdef CONFIG_STM32_OTGFS
/* The OTG FS has an internal soft pull-up. No GPIO configuration is required */
/* The OTG FS has an internal soft pull-up.
* No GPIO configuration is required
*/
/* Configure the OTG FS VBUS sensing GPIO */
@@ -73,10 +75,11 @@ void stm32_usb_configure(void)
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
* used. This function is called whenever the USB enters or leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power, etc.
* while the USB is suspended.
* Board logic must provide the stm32_usbsuspend logic if the USBDEV
* driver is used. This function is called whenever the USB enters or
* leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power,
* etc. while the USB is suspended.
*
****************************************************************************/
boards/arm/stm32/fire-stm32v2/include/board.h
+67 -45
View File
@@ -37,7 +37,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Clocking *************************************************************************/
/* Clocking *****************************************************************/
/* HSI - 8 MHz RC factory-trimmed
* LSI - 40 KHz RC (30-60KHz, uncalibrated)
@@ -52,7 +52,10 @@
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
/* PLL source is HSE/1,
* PLL multipler is 9:
* PLL frequency is 8MHz (XTAL) x 9 = 72MHz
*/
#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC
#define STM32_CFGR_PLLXTPRE 0
@@ -102,7 +105,8 @@
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1 */
* Note: TIM1,8 are on APB2, others on APB1
*/
#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY
@@ -143,12 +147,15 @@
# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* LED definitions ******************************************************************/
/* The M3 Wildfire has 3 LEDs labeled LED1, LED2 and LED3. These LEDs are not
* used by the NuttX port unless CONFIG_ARCH_LEDS is defined. In that case, the
* usage by the board port is defined in include/board.h and src/up_autoleds.c.
/* LED definitions **********************************************************/
/* The M3 Wildfire has 3 LEDs labeled LED1, LED2 and LED3.
* These LEDs are not used by the NuttX port unless CONFIG_ARCH_LEDS is
* defined. In that case, the usage by the board port is defined in
* include/board.h and src/up_autoleds.c.
* The LEDs are used to encode OS-related events as follows:
*/
/* LED1 LED2 LED3 */
#define LED_STARTED 0 /* OFF OFF OFF */
#define LED_HEAPALLOCATE 1 /* ON OFF OFF */
@@ -170,12 +177,13 @@
#define BUTTON_KEY1_BIT (1 << BUTTON_KEY1)
#define BUTTON_KEY2_BIT (1 << BUTTON_KEY2)
/* Pin Remapping ********************************************************************/
/* Pin Remapping ************************************************************/
/* USB 2.0
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 70 PA11 PA11-USBDM USB2.0
* 71 PA12 PA12-USBDP USB2.0
@@ -184,13 +192,16 @@
/* 2.4" TFT + Touchscreen
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02
* 93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02
* 81 PD0 PD0-FSMC_D2 2.4" TFT + Touchscreen
@@ -227,9 +238,9 @@
/* AT24C02
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02
* 93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02
@@ -241,9 +252,9 @@
/* Potentiometer/ADC
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 16 PC1 PC1/ADC123-IN11 Potentiometer (R16)
* 24 PA1 PC1/ADC123-IN1
@@ -251,14 +262,18 @@
/* USARTs
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 68 PA9 PA9-US1-TX MAX3232, DB9 D8, Requires !CONFIG_STM32_USART1_REMAP
* 69 PA10 PA10-US1-RX MAX3232, DB9 D8, Requires !CONFIG_STM32_USART1_REMAP
* 25 PA2 PA2-US2-TX MAX3232, DB9 D7, Requires !CONFIG_STM32_USART2_REMAP
* 26 PA3 PA3-US2-RX MAX3232, DB9 D7, Requires !CONFIG_STM32_USART2_REMAP
* 68 PA9 PA9-US1-TX MAX3232, DB9 D8,
* Requires !CONFIG_STM32_USART1_REMAP
* 69 PA10 PA10-US1-RX MAX3232, DB9 D8,
* Requires !CONFIG_STM32_USART1_REMAP
* 25 PA2 PA2-US2-TX MAX3232, DB9 D7,
* Requires !CONFIG_STM32_USART2_REMAP
* 26 PA3 PA3-US2-RX MAX3232, DB9 D7,
* Requires !CONFIG_STM32_USART2_REMAP
*/
#if defined(CONFIG_STM32_USART1) && defined(CONFIG_STM32_USART1_REMAP)
@@ -271,14 +286,17 @@
/* 2MBit SPI FLASH
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
*/
#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP)
@@ -287,14 +305,17 @@
/* ENC28J60
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset
* 4 PE5 (no name) 10Mbps ENC28J60 Interrupt
*/
@@ -305,9 +326,9 @@
/* MP3
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 48 PB11 PB11-MP3-RST MP3
* 51 PB12 PB12-SPI2-NSS MP3
@@ -320,9 +341,9 @@
/* SD Card
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 65 PC8 PC8-SDIO-D0 SD card, pulled high
* 66 PC9 PC9-SDIO-D1 SD card, pulled high
@@ -334,9 +355,9 @@
/* CAN
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 95 PB8 PB8-CAN-RX CAN transceiver, Header 2H
* 96 PB9 PB9-CAN-TX CAN transceiver, Header 2H
@@ -369,10 +390,11 @@ extern "C"
* Name: fire_lcdclear
*
* Description:
* This is a non-standard LCD interface just for the M3 Wildfire board. Because
* of the various rotations, clearing the display in the normal way by writing a
* sequences of runs that covers the entire display can be very slow. Here the
* display is cleared by simply setting all GRAM memory to the specified color.
* This is a non-standard LCD interface just for the M3 Wildfire board.
* Because of the various rotations, clearing the display in the normal
* way by writing a sequences of runs that covers the entire display can be
* very slow. Here the display is cleared by simply setting all GRAM
* memory to the specified color.
*
****************************************************************************/
boards/arm/stm32/fire-stm32v2/src/stm32_appinit.c
+2
View File
@@ -39,6 +39,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Assume that we support everything until convinced otherwise */
@@ -48,6 +49,7 @@
#define HAVE_W25 1
/* Configuration ************************************************************/
/* SPI1 connects to the SD CARD (and to the SPI FLASH) */
#define STM32_MMCSDSPIPORTNO 1 /* SPI1 */
boards/arm/stm32/fire-stm32v2/src/stm32_autoleds.c
+10 -15
View File
@@ -135,19 +135,19 @@ static int led_pm_prepare(struct pm_callback_s *cb, int domain,
static const uint16_t g_ledbits[8] =
{
(LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS |
LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS),
LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS),
(LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS |
LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS),
LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS),
(LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS |
LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS),
LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS),
(LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS |
LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS),
LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS),
(LED_FLASH_ON_SETBITS | LED_FLASH_ON_CLRBITS |
LED_FLASH_OFF_SETBITS | LED_FLASH_OFF_CLRBITS)
LED_FLASH_OFF_SETBITS | LED_FLASH_OFF_CLRBITS)
};
#ifdef CONFIG_PM
@@ -248,35 +248,30 @@ static void led_pm_notify(struct pm_callback_s *cb, int domain,
case(PM_NORMAL):
{
/* Restore normal LEDs operation */
}
break;
case(PM_IDLE):
{
/* Entering IDLE mode - Turn leds off */
}
break;
case(PM_STANDBY):
{
/* Entering STANDBY mode - Logic for PM_STANDBY goes here */
}
break;
case(PM_SLEEP):
{
/* Entering SLEEP mode - Logic for PM_SLEEP goes here */
}
break;
default:
{
/* Should not get here */
}
break;
}
@@ -318,11 +313,11 @@ static int led_pm_prepare(struct pm_callback_s *cb, int domain,
#ifdef CONFIG_ARCH_LEDS
void board_autoled_initialize(void)
{
/* Configure LED1-4 GPIOs for output */
/* Configure LED1-4 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
}
/****************************************************************************
@@ -354,7 +349,7 @@ void up_ledpminitialize(void)
int ret = pm_register(&g_ledscb);
if (ret != OK)
{
{
board_autoled_on(LED_ASSERTION);
}
}
boards/arm/stm32/fire-stm32v2/src/stm32_boot.c
+8 -7
View File
@@ -48,16 +48,17 @@
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
* All STM32 architectures must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spidev_initialize() has been brought into the link.
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function stm32_spidev_initialize() has been brought into the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
@@ -68,8 +69,8 @@ void stm32_boardinitialize(void)
#endif
/* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build.
* disabled, and 3) the weak function stm32_usbinitialize() has been
* brought into the build.
*/
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
boards/arm/stm32/fire-stm32v2/src/stm32_enc28j60.c
+23 -13
View File
@@ -20,14 +20,17 @@
/* 2MBit SPI FLASH OR ENC28J60
*
* --- ------ -------------- -----------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -----------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
*/
/****************************************************************************
@@ -57,17 +60,22 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* ENC28J60
*
* --- ------ -------------- -----------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -----------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset
* 4 PE5 (no name) 10Mbps ENC28J60 Interrupt
*/
@@ -179,17 +187,19 @@ void arm_netinitialize(void)
/* Assumptions:
* 1) ENC28J60 pins were configured in up_spi.c early in the boot-up phase.
* 2) Clocking for the SPI1 peripheral was also provided earlier in boot-up.
* 2) Clocking for the SPI1 peripheral was also provided earlier in
* boot-up.
*/
spi = stm32_spibus_initialize(ENC28J60_SPI_PORTNO);
if (!spi)
{
nerr("ERROR: Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO);
nerr("ERROR: Failed to initialize SPI port %d\n",
ENC28J60_SPI_PORTNO);
return;
}
/* Take ENC28J60 out of reset (active low)*/
/* Take ENC28J60 out of reset (active low) */
stm32_gpiowrite(GPIO_ENC28J60_RESET, true);
boards/arm/stm32/fire-stm32v2/src/stm32_mmcsd.c
+6 -4
View File
@@ -37,6 +37,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#define HAVE_MMCSD 1 /* Assume that we have SD support */
@@ -89,16 +90,17 @@ int stm32_sdinitialize(int minor)
ret = mmcsd_slotinitialize(minor, sdio);
if (ret != OK)
{
ferr("ERROR: Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n",
ferr("ERROR:");
ferr(" Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n",
STM32_MMCSDSLOTNO, minor);
}
finfo("Bound SDIO slot %d to the MMC/SD driver, minor=%d\n",
STM32_MMCSDSLOTNO, minor);
/* Then let's guess and say that there is a card in the slot. I need to check to
* see if the M3 Wildfire board supports a GPIO to detect if there is a card in
* the slot.
/* Then let's guess and say that there is a card in the slot.
* I need to check to see if the M3 Wildfire board supports a GPIO to
* detect if there is a card in the slot.
*/
sdio_mediachange(sdio, true);
boards/arm/stm32/fire-stm32v2/src/stm32_selectlcd.c
+17 -9
View File
@@ -58,13 +58,16 @@
/* 2.4" TFT + Touchscreen. FSMC Bank1
*
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- -------------------------------------------------------------------
* --- ------ -------------- ------------------------------------------------
*
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60,
* SPI 2M FLASH
* 92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02
* 93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02
* 81 PD0 PD0-FSMC_D2 2.4" TFT + Touchscreen
@@ -90,7 +93,9 @@
* 45 PE14 PE14-FSMC_D11 2.4" TFT + Touchscreen
* 46 PE15 PE15-FSMC_D12 2.4" TFT + Touchscreen
*
* NOTE: SPI and I2C pin configuration is controlled in the SPI and I2C drivers, respectively.
* NOTE:
* SPI and I2C pin configuration is controlled in the SPI and I2C drivers,
* respectively.
*/
static const uint16_t g_lcdconfig[NCOMMON_CONFIG] =
@@ -159,14 +164,17 @@ void stm32_selectlcd(void)
/* Bank1 NOR/SRAM timing register configuration */
putreg32(FSMC_BTR_ADDSET(1)|FSMC_BTR_ADDHLD(0)|FSMC_BTR_DATAST(2)|FSMC_BTR_BUSTURN(0)|
FSMC_BTR_CLKDIV(0)|FSMC_BTR_DATLAT(0)|FSMC_BTR_ACCMODA, STM32_FSMC_BTR1);
putreg32(FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) |
FSMC_BTR_DATAST(2) | FSMC_BTR_BUSTURN(0) |
FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
FSMC_BTR_ACCMODA, STM32_FSMC_BTR1);
putreg32(0xffffffff, STM32_FSMC_BWTR4);
/* Enable the bank by setting the MBKEN bit */
putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1);
putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM |
FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1);
leave_critical_section(flags);
}
boards/arm/stm32/fire-stm32v2/src/stm32_spi.c
+22 -17
View File
@@ -94,31 +94,34 @@ void weak_function stm32_spidev_initialize(void)
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
* must be provided by board-specific logic. They are implementations of
* the select and status methods of the SPI interface defined by struct
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods
* (including stm32_spibus_initialize()) are provided by common STM32
* logic. To use this common SPI logic on your board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
#if 0 /* Need to study this */
if (devid == SPIDEV_LCD)
@@ -153,9 +156,11 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi2select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_AUDIO)
{
boards/arm/stm32/fire-stm32v2/src/stm32_usbdev.c
+11 -9
View File
@@ -69,11 +69,12 @@ void stm32_usbinitialize(void)
* Name: stm32_usbpullup
*
* Description:
* If USB is supported and the board supports a pullup via GPIO (for USB software
* connect and disconnect), then the board software must provide stm32_pullup.
* See include/nuttx/usb/usbdev.h for additional description of this method.
* Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
* NULL.
* If USB is supported and the board supports a pullup via GPIO (for USB
* software connect and disconnect), then the board software must provide
* stm32_pullup. See include/nuttx/usb/usbdev.h for additional description
* of this method.
* Alternatively, if no pull-up GPIO the following EXTERN can be redefined
* to be NULL.
*
****************************************************************************/
@@ -90,10 +91,11 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
* used. This function is called whenever the USB enters or leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power, etc.
* while the USB is suspended.
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver
* is used. This function is called whenever the USB enters or leaves
* suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power,
* etc. while the USB is suspended.
*
****************************************************************************/
boards/arm/stm32/fire-stm32v2/src/stm32_usbmsc.c
+2 -1
View File
@@ -57,7 +57,8 @@
int board_usbmsc_initialize(int port)
{
/* If system/usbmsc is built as an NSH command, then SD slot should
* already have been initialized in board_app_initialize() (see stm32_appinit.c).
* already have been initialized in board_app_initialize()
* (see stm32_appinit.c).
* In this case, there is nothing further to be done here.
*/
boards/arm/stm32/hymini-stm32v/src/stm32_appinit.c
+5 -3
View File
@@ -68,8 +68,8 @@
#define NSH_HAVEMMCSD 1
/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support
* is not enabled.
/* Can't support MMC/SD features if mountpoints are disabled or if SDIO
* support is not enabled.
*/
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO)
@@ -193,7 +193,9 @@ int board_app_initialize(uintptr_t arg)
ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_sdiodev);
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
syslog(LOG_ERR,
"ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n",
ret);
return ret;
}
boards/arm/stm32/hymini-stm32v/src/stm32_usbdev.c
+12 -9
View File
@@ -61,6 +61,7 @@ void stm32_usbinitialize(void)
uinfo("called\n");
/* USB Soft Connect Pullup */
stm32_configgpio(GPIO_USB_PULLUP);
}
@@ -68,11 +69,12 @@ void stm32_usbinitialize(void)
* Name: stm32_usbpullup
*
* Description:
* If USB is supported and the board supports a pullup via GPIO (for USB software
* connect and disconnect), then the board software must provide stm32_pullup.
* See include/nuttx/usb/usbdev.h for additional description of this method.
* Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
* NULL.
* If USB is supported and the board supports a pullup via GPIO
* (for USB software connect and disconnect), then the board software must
* provide stm32_pullup.
* See include/nuttx/usb/usbdev.h for additional description of this
* method. Alternatively, if no pull-up GPIO the following EXTERN can
* be redefined to be NULL.
*
****************************************************************************/
@@ -87,10 +89,11 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
* used. This function is called whenever the USB enters or leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power, etc.
* while the USB is suspended.
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver
* is used. This function is called whenever the USB enters or leaves
* suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power,
* etc. while the USB is suspended.
*
****************************************************************************/
boards/arm/stm32/hymini-stm32v/src/stm32_usbmsc.c
+10 -8
View File
@@ -54,7 +54,8 @@
# undef STM32_MMCSDSLOTNO
# define STM32_MMCSDSLOTNO 0
#else
/* Add configuration for new STM32 boards here */
/* Add configuration for new STM32 boards here */
# error "Unrecognized STM32 board"
#endif
@@ -73,7 +74,8 @@
int board_usbmsc_initialize(int port)
{
/* If system/usbmsc is built as an NSH command, then SD slot should
* already have been initialized in board_app_initialize() (see stm32_appinit.c).
* already have been initialized in board_app_initialize()
* (see stm32_appinit.c).
* In this case, there is nothing further to be done here.
*/
@@ -95,7 +97,7 @@ int board_usbmsc_initialize(int port)
/* Now bind the SDIO interface to the MMC/SD driver */
syslog(LOG_INFO,"Bind SDIO to the MMC/SD driver, minor=%d\n",
syslog(LOG_INFO, "Bind SDIO to the MMC/SD driver, minor=%d\n",
CONFIG_SYSTEM_USBMSC_DEVMINOR1);
ret = mmcsd_slotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, sdio);
@@ -109,16 +111,16 @@ int board_usbmsc_initialize(int port)
syslog(LOG_INFO, "Successfully bound SDIO to the MMC/SD driver\n");
/* Then let's guess and say that there is a card in the slot. I need to check to
* see if the Hy-Mini STM32v board supports a GPIO to detect if there is a card in
* the slot.
/* Then let's guess and say that there is a card in the slot.
* I need to check to see if the Hy-Mini STM32v board supports a GPIO to
* detect if there is a card in the slot.
*/
sdio_mediachange(sdio, true);
sdio_mediachange(sdio, true);
#endif /* CONFIG_NSH_BUILTIN_APPS */
return OK;
return OK;
}
#endif /* CONFIG_STM32_SDIO */
boards/arm/stm32/mikroe-stm32f4/include/board.h
+36 -32
View File
@@ -39,29 +39,30 @@
* Pre-processor Definitions
****************************************************************************/
/* Clocking *************************************************************************/
/* The Mikroe STM32F4 Mikromedia board features a single 32kHz crystal. The main
* clock uses the internal 16Mhz RC oscillator.
/* Clocking *****************************************************************/
/* The Mikroe STM32F4 Mikromedia board features a single 32kHz crystal.
* The main clock uses the internal 16Mhz RC oscillator.
*
* This is the canonical configuration:
* System Clock source : PLL (HSE)
* SYSCLK(Hz) : 168000000 Determined by PLL configuration
* HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
* APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
* APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
* HSI Frequency(Hz) : 16000000 (STM32_HSI_FREQUENCY)
* PLLM : 16 (STM32_PLLCFG_PLLM)
* PLLN : 336 (STM32_PLLCFG_PLLN)
* PLLP : 2 (STM32_PLLCFG_PLLP)
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
* Require 48MHz for USB OTG FS, : Enabled
* SDIO and RNG clock
* System Clock source :PLL (HSE)
* SYSCLK(Hz) :168000000 Determined by PLL configuration
* HCLK(Hz) :168000000 (STM32_RCC_CFGR_HPRE)
* AHB Prescaler :1 (STM32_RCC_CFGR_HPRE)
* APB1 Prescaler :4 (STM32_RCC_CFGR_PPRE1)
* APB2 Prescaler :2 (STM32_RCC_CFGR_PPRE2)
* HSI Frequency(Hz) :16000000 (STM32_HSI_FREQUENCY)
* PLLM :16 (STM32_PLLCFG_PLLM)
* PLLN :36 (STM32_PLLCFG_PLLN)
* PLLP :2 (STM32_PLLCFG_PLLP)
* PLLQ :7 (STM32_PLLCFG_PLLQ)
* Main regulator output voltage :Scale1 mode Needed for high speed SYSCLK
* Flash Latency(WS) :5
* Prefetch Buffer :OFF
* Instruction cache :ON
* Data cache :ON
* Require 48MHz for USB OTG FS, :Enabled
* SDIO and RNG clock
*/
/* HSI - 16 MHz RC factory-trimmed
@@ -147,9 +148,10 @@
#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
/* LED definitions ******************************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
* way. The following definitions are used to access individual LEDs.
/* LED definitions **********************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
@@ -175,8 +177,9 @@
#define BOARD_LED3_BIT (1 << BOARD_LED3)
#define BOARD_LED4_BIT (1 << BOARD_LED4)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the
* stm32f4discovery. The following definitions describe how NuttX controls the LEDs:
/* If CONFIG_ARCH_LEDs is defined,
* then NuttX will control the 4 LEDs on board the stm32f4discovery.
* The following definitions describe how NuttX controls the LEDs:
*/
#define LED_STARTED 0 /* LED1 */
@@ -188,7 +191,8 @@
#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */
#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */
/* Button definitions ***************************************************************/
/* Button definitions *******************************************************/
/* The STM32F4 Discovery supports one button: */
#define BUTTON_USER 0
@@ -199,12 +203,12 @@
#endif /* 0 */
/* Alternate function pin selections ************************************************/
/* Alternate function pin selections ****************************************/
/* UART2:
*
* The Mikroe-STM32F4 board has no on-board serial devices, but it brings out UART2
* to the expansion header.
* The Mikroe-STM32F4 board has no on-board serial devices, but it brings out
* UART2 to the expansion header.
* (See the README.txt file for other options)
*/
@@ -213,8 +217,8 @@
/* PWM
*
* The STM32F4 Discovery has no real on-board PWM devices, but the board can be
* configured to output a pulse train using TIM4 CH2 on PD13.
* The STM32F4 Discovery has no real on-board PWM devices, but the board can
* be configured to output a pulse train using TIM4 CH2 on PD13.
*/
#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
boards/arm/stm32/mikroe-stm32f4/src/stm32_boot.c
+9 -7
View File
@@ -56,7 +56,9 @@
void stm32_boardinitialize(void)
{
/* First reset the VS1053 since it tends to produce noise out of power on reset */
/* First reset the VS1053 since it tends to produce noise out of power on
* reset
*/
#ifdef CONFIG_AUDIO_VS1053
stm32_configgpio(GPIO_VS1053_RST);
@@ -68,8 +70,8 @@ void stm32_boardinitialize(void)
stm32_lcdinitialize();
#endif
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spidev_initialize() has been brought into the link.
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function stm32_spidev_initialize() has been brought into the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
@@ -79,10 +81,10 @@ void stm32_boardinitialize(void)
}
#endif
/* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build. Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also
* selected.
/* Initialize USB if the 1) OTG FS controller is in the configuration and
* 2) disabled, and 3) the weak function stm32_usbinitialize() has been
* brought into the build. Presumeably either CONFIG_USBDEV or
* CONFIG_USBHOST is also selected.
*/
#ifdef CONFIG_STM32_OTGFS
boards/arm/stm32/mikroe-stm32f4/src/stm32_extmem.c
+14 -7
View File
@@ -60,18 +60,25 @@
static const uint32_t g_addressconfig[STM32_FSMC_NADDRCONFIGS] =
{
GPIO_FSMC_A0, GPIO_FSMC_A1 , GPIO_FSMC_A2, GPIO_FSMC_A3, GPIO_FSMC_A4 , GPIO_FSMC_A5,
GPIO_FSMC_A6, GPIO_FSMC_A7, GPIO_FSMC_A8, GPIO_FSMC_A9, GPIO_FSMC_A10, GPIO_FSMC_A11,
GPIO_FSMC_A12, GPIO_FSMC_A13, GPIO_FSMC_A14, GPIO_FSMC_A15, GPIO_FSMC_A16, GPIO_FSMC_A17,
GPIO_FSMC_A18, GPIO_FSMC_A19, GPIO_FSMC_A20, GPIO_FSMC_A21, GPIO_FSMC_A22, GPIO_FSMC_A23,
GPIO_FSMC_A0, GPIO_FSMC_A1 , GPIO_FSMC_A2,
GPIO_FSMC_A3, GPIO_FSMC_A4 , GPIO_FSMC_A5,
GPIO_FSMC_A6, GPIO_FSMC_A7, GPIO_FSMC_A8,
GPIO_FSMC_A9, GPIO_FSMC_A10, GPIO_FSMC_A11,
GPIO_FSMC_A12, GPIO_FSMC_A13, GPIO_FSMC_A14,
GPIO_FSMC_A15, GPIO_FSMC_A16, GPIO_FSMC_A17,
GPIO_FSMC_A18, GPIO_FSMC_A19, GPIO_FSMC_A20,
GPIO_FSMC_A21, GPIO_FSMC_A22, GPIO_FSMC_A23,
GPIO_FSMC_A24, GPIO_FSMC_A25
};
static const uint32_t g_dataconfig[STM32_FSMC_NDATACONFIGS] =
{
GPIO_FSMC_D0, GPIO_FSMC_D1 , GPIO_FSMC_D2, GPIO_FSMC_D3, GPIO_FSMC_D4 , GPIO_FSMC_D5,
GPIO_FSMC_D6, GPIO_FSMC_D7, GPIO_FSMC_D8, GPIO_FSMC_D9, GPIO_FSMC_D10, GPIO_FSMC_D11,
GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14, GPIO_FSMC_D15
GPIO_FSMC_D0, GPIO_FSMC_D1 , GPIO_FSMC_D2,
GPIO_FSMC_D3, GPIO_FSMC_D4 , GPIO_FSMC_D5,
GPIO_FSMC_D6, GPIO_FSMC_D7, GPIO_FSMC_D8,
GPIO_FSMC_D9, GPIO_FSMC_D10, GPIO_FSMC_D11,
GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14,
GPIO_FSMC_D15
};
/****************************************************************************
boards/arm/stm32/nucleo-f207zg/src/stm32_boot.c
+14 -10
View File
@@ -41,9 +41,10 @@
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
* All STM32 architectures must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
@@ -66,12 +67,13 @@ void stm32_boardinitialize(void)
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional initialization call
* will be performed in the boot-up sequence to a function called
* board_late_initialize(). board_late_initialize() will be called immediately after
* up_initialize() is called and just before the initial application is started.
* This additional initialization phase may be used, for example, to initialize
* board-specific device drivers.
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize()
* will be called immediately after up_initialize() is called and just
* before the initial application is started.
* This additional initialization phase may be used, for example, to
* initialize board-specific device drivers.
*
****************************************************************************/
@@ -79,7 +81,9 @@ void stm32_boardinitialize(void)
void board_late_initialize(void)
{
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
/* Perform board bring-up here instead of from the board_app_initialize(). */
/* Perform board bring-up here instead of from the
* board_app_initialize().
*/
stm32_bringup();
#endif
boards/arm/stm32/nucleo-f303re/include/board.h
+8 -1
View File
@@ -73,7 +73,10 @@
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768 /* X2 on board */
/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
/* PLL source is HSE/1,
* PLL multipler is 9:
* PLL frequency is 8MHz (XTAL) x 9 = 72MHz
*/
#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC
#define STM32_CFGR_PLLXTPRE 0
@@ -140,6 +143,7 @@
#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
/* LED definitions **********************************************************/
/* The Nucleo F303RE board has three LEDs. Two of these are controlled by
* logic on the board and are not available for software control:
*
@@ -193,6 +197,7 @@
#define LED_PANIC 1
/* Button definitions *******************************************************/
/* The Nucleo F303RE supports two buttons; only one button is controllable
* by software:
*
@@ -207,6 +212,7 @@
#define BUTTON_USER_BIT (1 << BUTTON_USER)
/* Alternate function pin selections ****************************************/
/* CAN */
#define GPIO_CAN1_RX GPIO_CAN_RX_2
@@ -239,6 +245,7 @@
#define GPIO_USART2_TX GPIO_USART2_TX_2
/* DMA channels *************************************************************/
/* ADC */
#define ADC1_DMA_CHAN DMACHAN_ADC1
boards/arm/stm32/nucleo-f303ze/src/stm32_boot.c
+10 -7
View File
@@ -61,12 +61,13 @@ void stm32_boardinitialize(void)
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional initialization call
* will be performed in the boot-up sequence to a function called
* board_late_initialize(). board_late_initialize() will be called immediately after
* up_initialize() is called and just before the initial application is started.
* This additional initialization phase may be used, for example, to initialize
* board-specific device drivers.
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will
* be called immediately after up_initialize() is called and just before
* the initial application is started.
* This additional initialization phase may be used, for example, to
* initialize board-specific device drivers.
*
****************************************************************************/
@@ -74,7 +75,9 @@ void stm32_boardinitialize(void)
void board_late_initialize(void)
{
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
/* Perform board bring-up here instead of from the board_app_initialize(). */
/* Perform board bring-up here instead of from the
* board_app_initialize().
*/
stm32_bringup();
#endif
boards/arm/stm32/nucleo-f410rb/include/board.h
+38 -28
View File
@@ -38,26 +38,27 @@
* Pre-processor Definitions
****************************************************************************/
/* Clocking *************************************************************************/
/* The NUCLEO410RB supports both HSE and LSE crystals (X2 and X3). However, as
* shipped, the X3 crystals is not populated. Therefore the Nucleo-F410RB
* will need to run off the 16MHz HSI clock.
/* Clocking *****************************************************************/
/* The NUCLEO410RB supports both HSE and LSE crystals (X2 and X3).
* However, as shipped, the X3 crystals is not populated.
* Therefore the Nucleo-F410RB will need to run off the 16MHz HSI clock.
*
* System Clock source : PLL (HSI)
* SYSCLK(Hz) : 100000000 Determined by PLL configuration
* HCLK(Hz) : 100000000 (STM32_RCC_CFGR_HPRE)
* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
* APB1 Prescaler : 2 (STM32_RCC_CFGR_PPRE1)
* APB2 Prescaler : 1 (STM32_RCC_CFGR_PPRE2)
* HSI Frequency(Hz) : 16000000 (nominal)
* PLLM : 2 (STM32_PLLCFG_PLLM)
* PLLN : 50 (STM32_PLLCFG_PLLN)
* PLLP : 4 (STM32_PLLCFG_PLLP)
* PLLQ : 8 (STM32_PLLCFG_PPQ)
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
* System Clock source : PLL (HSI)
* SYSCLK(Hz) : 100000000 Determined by PLL configuration
* HCLK(Hz) : 100000000 (STM32_RCC_CFGR_HPRE)
* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
* APB1 Prescaler : 2 (STM32_RCC_CFGR_PPRE1)
* APB2 Prescaler : 1 (STM32_RCC_CFGR_PPRE2)
* HSI Frequency(Hz) : 16000000 (nominal)
* PLLM : 2 (STM32_PLLCFG_PLLM)
* PLLN : 50 (STM32_PLLCFG_PLLN)
* PLLP : 4 (STM32_PLLCFG_PLLP)
* PLLQ : 8 (STM32_PLLCFG_PPQ)
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
*/
/* HSI - 16 MHz RC factory-trimmed
@@ -74,10 +75,14 @@
*
* Formulae:
*
* VCO input frequency = PLL input clock frequency / PLLM, 2 <= PLLM <= 63
* VCO output frequency = VCO input frequency × PLLN, 50 <= PLLN <= 432
* PLL output clock frequency = VCO frequency / PLLP, PLLP = 2, 4, 6, or 8
* USB OTG FS clock frequency = VCO frequency / PLLQ, 2 <= PLLQ <= 15
* VCO input frequency = PLL input clock frequency / PLLM,
* 2 <= PLLM <= 63
* VCO output frequency = VCO input frequency × PLLN,
* 50 <= PLLN <= 432
* PLL output clock frequency = VCO frequency / PLLP,
* PLLP = 2, 4, 6, or 8
* USB OTG FS clock frequency = VCO frequency / PLLQ,
* 2 <= PLLQ <= 15
*
* We will configure like this
*
@@ -113,6 +118,7 @@
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* Timers driven from APB1 will be twice PCLK1 */
/* REVISIT */
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
@@ -124,6 +130,7 @@
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY)
/* Timers driven from APB2 will be PCLK2 */
/* REVISIT */
#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY)
@@ -134,6 +141,7 @@
* otherwise frequency is 2xAPBx.
* Note: TIM1,9,11 are on APB2, others on APB1
*/
/* REVISIT */
#define BOARD_TIM1_FREQUENCY STM32_APB2_TIM1_CLKIN
@@ -142,9 +150,10 @@
#define BOARD_TIM9_FREQUENCY STM32_APB2_TIM9_CLKIN
#define BOARD_TIM11_FREQUENCY STM32_APB2_TIM11_CLKIN
/* DMA Channel/Stream Selections ****************************************************/
/* Stream selections are arbitrary for now but might become important in the future
* is we set aside more DMA channels/streams.
/* DMA Channel/Stream Selections ********************************************/
/* Stream selections are arbitrary for now but might become important in the
* future is we set aside more DMA channels/streams.
*/
#define ADC1_DMA_CHAN DMAMAP_ADC1_1
@@ -155,7 +164,7 @@
#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX
#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX
/* Alternate function pin selections ************************************************/
/* Alternate function pin selections ****************************************/
/* USART1:
* RXD: PA10 CN9 pin 3, CN10 pin 33
@@ -284,7 +293,8 @@
/* Buttons
*
* B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32
* B1 USER:
* the user button is connected to the I/O PC13 (pin 2) of the STM32
* microcontroller.
*/
boards/arm/stm32/nucleo-f429zi/src/stm32_romfs_initialize.c
+1 -1
View File
@@ -18,7 +18,7 @@
*
****************************************************************************/
/* This file provides contents of an optional ROMFS volume, mounted at boot /*
/* This file provides contents of an optional ROMFS volume, mounted at boot */
/****************************************************************************
* Included Files
boards/arm/stm32/nucleo-f446re/src/stm32_ajoystick.c
+13 -7
View File
@@ -99,13 +99,16 @@
* Private Function Prototypes
****************************************************************************/
static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower);
static ajoy_buttonset_t
ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower);
static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
FAR struct ajoy_sample_s *sample);
static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower);
static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
ajoy_buttonset_t press, ajoy_buttonset_t release,
ajoy_handler_t handler, FAR void *arg);
static ajoy_buttonset_t
ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower);
static void
ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
ajoy_buttonset_t press, ajoy_buttonset_t release,
ajoy_handler_t handler, FAR void *arg);
static void ajoy_disable(void);
static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg);
@@ -113,6 +116,7 @@ static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg);
/****************************************************************************
* Private Data
****************************************************************************/
/* Pin configuration for each Itead joystick button. Index using AJOY_*
* button definitions in include/nuttx/input/ajoystick.h.
*/
@@ -163,7 +167,8 @@ static FAR void *g_ajoyarg;
*
****************************************************************************/
static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower)
static ajoy_buttonset_t
ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower)
{
iinfo("Supported: %02x\n", AJOY_SUPPORTED);
return (ajoy_buttonset_t)AJOY_SUPPORTED;
@@ -278,7 +283,8 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
*
****************************************************************************/
static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower)
static ajoy_buttonset_t
ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower)
{
ajoy_buttonset_t ret = 0;
int i;
boards/arm/stm32/nucleo-f446re/src/stm32_spi.c
+6 -6
View File
@@ -20,7 +20,7 @@
/****************************************************************************
* Included Files
***************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@@ -43,7 +43,7 @@
/****************************************************************************
* Public Data
***************************************************************************/
****************************************************************************/
/* Global driver instances */
@@ -56,7 +56,7 @@ struct spi_dev_s *g_spi2;
/****************************************************************************
* Public Functions
***************************************************************************/
****************************************************************************/
/****************************************************************************
* Name: stm32_spidev_initialize
@@ -65,7 +65,7 @@ struct spi_dev_s *g_spi2;
* Called to configure SPI chip select GPIO pins for the Nucleo-F401RE and
* Nucleo-F411RE boards.
*
***************************************************************************/
****************************************************************************/
void weak_function stm32_spidev_initialize(void)
{
@@ -107,8 +107,8 @@ void weak_function stm32_spidev_initialize(void)
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
boards/arm/stm32/nucleo-f4x1re/include/board.h
+12 -10
View File
@@ -30,11 +30,7 @@
# include <stdint.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *************************************************************************/
/* Clocking *****************************************************************/
#if defined(CONFIG_ARCH_CHIP_STM32F401RE)
# include <arch/board/nucleo-f401re.h>
@@ -42,9 +38,14 @@
# include <arch/board/nucleo-f411re.h>
#endif
/* DMA Channel/Stream Selections ****************************************************/
/* Stream selections are arbitrary for now but might become important in the future
* is we set aside more DMA channels/streams.
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* DMA Channel/Stream Selections ********************************************/
/* Stream selections are arbitrary for now but might become important in
* the future is we set aside more DMA channels/streams.
*
* SDIO DMA
*   DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA
@@ -60,7 +61,7 @@
#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX
#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX
/* Alternate function pin selections ************************************************/
/* Alternate function pin selections ****************************************/
/* USART1:
* RXD: PA10 CN9 pin 3, CN10 pin 33
@@ -190,7 +191,8 @@
/* Buttons
*
* B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32
* B1 USER:
* the user button is connected to the I/O PC13 (pin 2) of the STM32
* microcontroller.
*/
boards/arm/stm32/nucleo-f4x1re/include/nucleo-f401re.h
+14 -4
View File
@@ -74,10 +74,14 @@
*
* Formulae:
*
* VCO input frequency = PLL input clock frequency / PLLM, 2 <= PLLM <= 63
* VCO output frequency = VCO input frequency × PLLN, 192 <= PLLN <= 432
* PLL output clock frequency = VCO frequency / PLLP, PLLP = 2, 4, 6, or 8
* USB OTG FS clock frequency = VCO frequency / PLLQ, 2 <= PLLQ <= 15
* VCO input frequency = PLL input clock frequency / PLLM,
* 2 <= PLLM <= 63
* VCO output frequency = VCO input frequency × PLLN,
* 192 <= PLLN <= 432
* PLL output clock frequency = VCO frequency / PLLP,
* PLLP = 2, 4, 6, or 8
* USB OTG FS clock frequency = VCO frequency / PLLQ,
* 2 <= PLLQ <= 15
*
* We would like to have SYSYCLK=84MHz and we must have the USB clock= 48MHz.
* Some possible solutions include:
@@ -123,6 +127,7 @@
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* Timers driven from APB1 will be twice PCLK1 */
/* REVISIT */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
@@ -141,6 +146,7 @@
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/1)
/* Timers driven from APB2 will be twice PCLK2 */
/* REVISIT */
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
@@ -153,6 +159,7 @@
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
*/
/* REVISIT */
#define BOARD_TIM1_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
@@ -171,6 +178,7 @@
*
* HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz
*/
/* REVISIT */
#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT)
@@ -178,6 +186,7 @@
/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz
* DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
*/
/* REVISIT */
#ifdef CONFIG_SDIO_DMA
@@ -189,6 +198,7 @@
/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz
* DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
*/
/* REVISIT */
#ifdef CONFIG_SDIO_DMA
boards/arm/stm32/nucleo-f4x1re/include/nucleo-f411re.h
+16 -5
View File
@@ -74,14 +74,19 @@
*
* Formulae:
*
* VCO input frequency = PLL input clock frequency / PLLM, 2 <= PLLM <= 63
* VCO output frequency = VCO input frequency × PLLN, 192 <= PLLN <= 432
* PLL output clock frequency = VCO frequency / PLLP, PLLP = 2, 4, 6, or 8
* USB OTG FS clock frequency = VCO frequency / PLLQ, 2 <= PLLQ <= 15
* VCO input frequency = PLL input clock frequency / PLLM,
* 2 <= PLLM <= 63
* VCO output frequency = VCO input frequency × PLLN,
* 192 <= PLLN <= 432
* PLL output clock frequency = VCO frequency / PLLP,
* PLLP = 2, 4, 6, or 8
* USB OTG FS clock frequency = VCO frequency / PLLQ,
* 2 <= PLLQ <= 15
*
* There is no config for 100 MHz and 48 MHz for usb,
* so we would like to have SYSYCLK=104MHz and we must have the USB clock= 48MHz.
* so we would like to have SYSYCLK=104MHz and we must have
* the USB clock= 48MHz.
*
* PLLQ = 13 PLLP = 6 PLLN=390 PLLM=10
*
@@ -119,6 +124,7 @@
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* Timers driven from APB1 will be twice PCLK1 */
/* REVISIT */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
@@ -137,6 +143,7 @@
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/1)
/* Timers driven from APB2 will be twice PCLK2 */
/* REVISIT */
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
@@ -149,6 +156,7 @@
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
*/
/* REVISIT */
#define BOARD_TIM1_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
@@ -167,6 +175,7 @@
*
* HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz
*/
/* REVISIT */
#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT)
@@ -174,6 +183,7 @@
/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz
* DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
*/
/* REVISIT */
#ifdef CONFIG_SDIO_DMA
@@ -185,6 +195,7 @@
/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz
* DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
*/
/* REVISIT */
#ifdef CONFIG_SDIO_DMA
boards/arm/stm32/nucleo-f4x1re/src/stm32_adc.c
+17 -4
View File
@@ -55,28 +55,41 @@
/****************************************************************************
* Private Data
****************************************************************************/
/* Identifying number of each ADC channel. */
#ifdef CONFIG_AJOYSTICK
#ifdef CONFIG_ADC_DMA
/* The Itead analog joystick gets inputs on ADC_IN0 and ADC_IN1 */
static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {0, 1};
static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
{
0, 1
};
/* Configurations of pins used byte each ADC channels */
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0, GPIO_ADC1_IN0};
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN0, GPIO_ADC1_IN0
};
#else
/* Without DMA, only a single channel can be supported */
/* The Itead analog joystick gets input on ADC_IN0 */
static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {0};
static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
{
0
};
/* Configurations of pins used byte each ADC channels */
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0};
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN0
};
#endif /* CONFIG_ADC_DMA */
#endif /* CONFIG_AJOYSTICK */
boards/arm/stm32/nucleo-f4x1re/src/stm32_ajoystick.c
+25 -18
View File
@@ -42,6 +42,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Check for pre-requisites and pin conflicts */
#ifdef CONFIG_AJOYSTICK
@@ -98,10 +99,12 @@
* Private Function Prototypes
****************************************************************************/
static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower);
static ajoy_buttonset_t
ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower);
static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
FAR struct ajoy_sample_s *sample);
static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower);
static ajoy_buttonset_t
ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower);
static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
ajoy_buttonset_t press, ajoy_buttonset_t release,
ajoy_handler_t handler, FAR void *arg);
@@ -112,6 +115,7 @@ static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg);
/****************************************************************************
* Private Data
****************************************************************************/
/* Pin configuration for each Itead joystick button. Index using AJOY_*
* button definitions in include/nuttx/input/ajoystick.h.
*/
@@ -162,7 +166,8 @@ static FAR void *g_ajoyarg;
*
****************************************************************************/
static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower)
static ajoy_buttonset_t
ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower)
{
iinfo("Supported: %02x\n", AJOY_SUPPORTED);
return (ajoy_buttonset_t)AJOY_SUPPORTED;
@@ -277,7 +282,8 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
*
****************************************************************************/
static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower)
static ajoy_buttonset_t
ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower)
{
ajoy_buttonset_t ret = 0;
int i;
@@ -343,26 +349,26 @@ static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
for (i = 0; i < AJOY_NGPIOS; i++)
{
/* Enable interrupts on each pin that has either a press or
* release event associated with it.
*/
/* Enable interrupts on each pin that has either a press or
* release event associated with it.
*/
bit = (1 << i);
if ((either & bit) != 0)
{
/* Active low so a press corresponds to a falling edge and
* a release corresponds to a rising edge.
*/
bit = (1 << i);
if ((either & bit) != 0)
{
/* Active low so a press corresponds to a falling edge and
* a release corresponds to a rising edge.
*/
falling = ((press & bit) != 0);
rising = ((release & bit) != 0);
falling = ((press & bit) != 0);
rising = ((release & bit) != 0);
iinfo("GPIO %d: rising: %d falling: %d\n",
iinfo("GPIO %d: rising: %d falling: %d\n",
i, rising, falling);
stm32_gpiosetevent(g_joygpio[i], rising, falling,
stm32_gpiosetevent(g_joygpio[i], rising, falling,
true, ajoy_interrupt, NULL);
}
}
}
}
@@ -439,6 +445,7 @@ int board_ajoy_initialize(void)
iinfo("Initialize ADC driver: /dev/adc0\n");
/* NOTE: The ADC driver was initialized earlier in the bring-up sequence. */
/* Open the ADC driver for reading. */
ret = file_open(&g_adcfile, "/dev/adc0", O_RDONLY);
boards/arm/stm32/nucleo-f4x1re/src/stm32_spi.c
+4 -4
View File
@@ -108,12 +108,12 @@ void weak_function stm32_spidev_initialize(void)
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in
* your board-specific logic. These functions will perform chip
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
boards/arm/stm32/olimex-stm32-e407/src/stm32_adc.c
+13 -5
View File
@@ -80,16 +80,24 @@
*/
#ifdef CONFIG_STM32_ADC1
static const uint8_t g_chanlist[ADC1_NCHANNELS] = {1};
static const uint8_t g_chanlist[ADC1_NCHANNELS] =
{
1
};
/* Configurations of pins used byte each ADC channels
*
* {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5,
* GPIO_ADC1_IN6, GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9, GPIO_ADC1_IN10,
* GPIO_ADC1_IN11, GPIO_ADC1_IN12, GPIO_ADC1_IN13, GPIO_ADC1_IN15};
* {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3,
* GPIO_ADC1_IN4, GPIO_ADC1_IN5, GPIO_ADC1_IN6,
* GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9,
* GPIO_ADC1_IN10, GPIO_ADC1_IN11, GPIO_ADC1_IN12,
* GPIO_ADC1_IN13, GPIO_ADC1_IN15};
*/
static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN1};
static const uint32_t g_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN1
};
#endif
/****************************************************************************
boards/arm/stm32/olimex-stm32-e407/src/stm32_autoleds.c
+2 -2
View File
@@ -49,9 +49,9 @@
void board_autoled_initialize(void)
{
/* Configure LED_STATUS GPIO for output */
/* Configure LED_STATUS GPIO for output */
stm32_configgpio(GPIO_LED_STATUS);
stm32_configgpio(GPIO_LED_STATUS);
}
/****************************************************************************
boards/arm/stm32/olimex-stm32-e407/src/stm32_boot.c
+6 -5
View File
@@ -39,7 +39,7 @@
/****************************************************************************
* Public Functions
***************************************************************************/
****************************************************************************/
/****************************************************************************
* Name: stm32_boardinitialize
@@ -55,9 +55,10 @@
void stm32_boardinitialize(void)
{
#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_OTGHS)
/* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build. Presumeably either CONFIG_USBDEV is also selected.
/* Initialize USB if the 1) OTG FS controller is in the configuration and
* 2) disabled, and 3) the weak function stm32_usbinitialize() has been
* brought into the build. Presumeably either CONFIG_USBDEV is also
* selected.
*/
if (stm32_usbinitialize)
@@ -85,7 +86,7 @@ void stm32_boardinitialize(void)
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_initialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
boards/arm/stm32/olimex-stm32-h405/include/board.h
+23 -18
View File
@@ -84,7 +84,7 @@
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* Timers driven from APB1 will be twice PCLK1 (60Mhz)*/
/* Timers driven from APB1 will be twice PCLK1 (60Mhz) */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
@@ -101,7 +101,7 @@
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* Timers driven from APB2 will be twice PCLK2 (120Mhz)*/
/* Timers driven from APB2 will be twice PCLK2 (120Mhz) */
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
@@ -123,9 +123,11 @@
#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
/* LED definitions ******************************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status LED in any
* way. The following definitions are used to access individual LEDs.
/* LED definitions **********************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status
* LED in any way.
* The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
@@ -137,8 +139,9 @@
#define BOARD_LED_STATUS_BIT (1 << BOARD_LED1)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of the
* Olimex STM32-H405. The following definitions describe how NuttX controls the LEDs:
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of
* the Olimex STM32-H405.
* The following definitions describe how NuttX controls the LEDs:
*/
#define LED_STARTED 0 /* LED_STATUS on */
@@ -150,7 +153,8 @@
#define LED_ASSERTION 6 /* LED_STATUS off */
#define LED_PANIC 7 /* LED_STATUS blinking */
/* Button definitions ***************************************************************/
/* Button definitions *******************************************************/
/* The Olimex STM32-H405 supports one buttons: */
#define BUTTON_BUT 0
@@ -158,19 +162,20 @@
#define BUTTON_BUT_BIT (1 << BUTTON_BUT)
/* Alternate function pin selections ************************************************/
/* Alternate function pin selections ****************************************/
//USART3:
#define GPIO_USART3_RX GPIO_USART3_RX_1 //PB11
#define GPIO_USART3_TX GPIO_USART3_TX_1 //PB10
#define GPIO_USART3_CTS GPIO_USART3_CTS_1 //PB13
#define GPIO_USART3_RTS GPIO_USART3_RTS_1 //PB14
/* USART3: */
#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11 */
#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10 */
#define GPIO_USART3_CTS GPIO_USART3_CTS_1 /* PB13 */
#define GPIO_USART3_RTS GPIO_USART3_RTS_1 /* PB14 */
/* CAN: */
#define GPIO_CAN1_RX GPIO_CAN1_RX_2 //PB8
#define GPIO_CAN1_TX GPIO_CAN1_TX_2 //PB9
#define GPIO_CAN2_RX GPIO_CAN1_RX_2 //PB5
#define GPIO_CAN2_TX GPIO_CAN1_TX_2 //PB6
#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */
#define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PB9 */
#define GPIO_CAN2_RX GPIO_CAN1_RX_2 /* PB5 */
#define GPIO_CAN2_TX GPIO_CAN1_TX_2 /* PB6 */
#endif /* __BOARDS_ARM_STM32_OLIMEX_STM32_H405_INCLUDE_BOARD_H */
boards/arm/stm32/olimex-stm32-h405/src/stm32_adc.c
+25 -11
View File
@@ -41,7 +41,8 @@
* Pre-processor Definitions
****************************************************************************/
/* Configuration ********************************************************************/
/* Configuration ************************************************************/
/* Up to 3 ADC interfaces are supported */
#if STM32_NADC < 3
@@ -68,6 +69,7 @@
/****************************************************************************
* Private Data
****************************************************************************/
/* The Olimex STM32-P405 has a 10 Kohm potentiometer AN_TR connected to PC0
* ADC123_IN10
*/
@@ -75,19 +77,31 @@
/* Identifying number of each ADC channel: Variable Resistor. */
#ifdef CONFIG_STM32_ADC1
static const uint8_t g_chanlist[ADC1_NCHANNELS] = {1};/*, 2, 3,
4, 5, 6,
7, 8, 9,
10, 11, 12,
13, 15};*/
static const uint8_t g_chanlist[ADC1_NCHANNELS] =
{
1
};
/* , 2, 3,
* 4, 5, 6,
* 7, 8, 9,
* 10, 11, 12,
* 13, 15
* };
*/
/* Configurations of pins used byte each ADC channels */
static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN1};/*, GPIO_ADC1_IN2, GPIO_ADC1_IN3,
GPIO_ADC1_IN4, GPIO_ADC1_IN5, GPIO_ADC1_IN6,
GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9,
GPIO_ADC1_IN10, GPIO_ADC1_IN11, GPIO_ADC1_IN12,
GPIO_ADC1_IN13, GPIO_ADC1_IN15};*/
static const uint32_t g_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN1
};
/* , GPIO_ADC1_IN2, GPIO_ADC1_IN3,
* GPIO_ADC1_IN4, GPIO_ADC1_IN5, GPIO_ADC1_IN6,
* GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9,
* GPIO_ADC1_IN10, GPIO_ADC1_IN11, GPIO_ADC1_IN12,
* GPIO_ADC1_IN13, GPIO_ADC1_IN15
* };
*/
#endif
/****************************************************************************
boards/arm/stm32/olimex-stm32-h405/src/stm32_autoleds.c
+2 -2
View File
@@ -46,9 +46,9 @@
void board_autoled_initialize(void)
{
/* Configure LED_STATUS GPIO for output */
/* Configure LED_STATUS GPIO for output */
stm32_configgpio(GPIO_LED_STATUS);
stm32_configgpio(GPIO_LED_STATUS);
}
/****************************************************************************
boards/arm/stm32/olimex-stm32-h405/src/stm32_boot.c
+7 -6
View File
@@ -49,9 +49,10 @@
void stm32_boardinitialize(void)
{
/* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build. Presumeably either CONFIG_USBDEV is also selected.
/* Initialize USB if the 1) OTG FS controller is in the configuration and
* 2) disabled, and 3) the weak function stm32_usbinitialize() has been
* brought into the build. Presumeably either CONFIG_USBDEV is also
* selected.
*/
#ifdef CONFIG_STM32_OTGFS
@@ -80,7 +81,7 @@ void stm32_boardinitialize(void)
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_intitialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
@@ -91,8 +92,8 @@ void stm32_boardinitialize(void)
void board_late_initialize(void)
{
/* Perform NSH initialization here instead of from the NSH. This
* alternative NSH initialization is necessary when NSH is ran in user-space
* but the initialization function must run in kernel space.
* alternative NSH initialization is necessary when NSH is ran in
* user-space but the initialization function must run in kernel space.
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
boards/arm/stm32/olimex-stm32-h407/src/stm32_adc.c
+8 -2
View File
@@ -80,7 +80,10 @@
*/
#ifdef CONFIG_STM32_ADC1
static const uint8_t g_chanlist[ADC1_NCHANNELS] = {1};
static const uint8_t g_chanlist[ADC1_NCHANNELS] =
{
1
};
/* Configurations of pins used byte each ADC channels
*
@@ -90,7 +93,10 @@ static const uint8_t g_chanlist[ADC1_NCHANNELS] = {1};
* GPIO_ADC1_IN13, GPIO_ADC1_IN15};
*/
static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN1};
static const uint32_t g_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN1
};
#endif
/****************************************************************************
boards/arm/stm32/olimex-stm32-h407/src/stm32_autoleds.c
+2 -2
View File
@@ -49,9 +49,9 @@
void board_autoled_initialize(void)
{
/* Configure LED_STATUS GPIO for output */
/* Configure LED_STATUS GPIO for output */
stm32_configgpio(GPIO_LED_STATUS);
stm32_configgpio(GPIO_LED_STATUS);
}
/****************************************************************************
boards/arm/stm32/olimex-stm32-h407/src/stm32_boot.c
+7 -5
View File
@@ -52,9 +52,10 @@
void stm32_boardinitialize(void)
{
#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_OTGHS)
/* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build. Presumeably either CONFIG_USBDEV is also selected.
/* Initialize USB if the 1) OTG FS controller is in the configuration and
* 2) disabled, and 3) the weak function stm32_usbinitialize() has been
* brought into the build.
* Presumeably either CONFIG_USBDEV is also selected.
*/
if (stm32_usbinitialize)
@@ -82,7 +83,7 @@ void stm32_boardinitialize(void)
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_intitialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
@@ -93,7 +94,8 @@ void stm32_boardinitialize(void)
void board_late_initialize(void)
{
#ifndef CONFIG_LIB_BOARDCTL
/* Perform NSH initialization here instead of from the board_app_initialize.
/* Perform NSH initialization here instead of from the
* board_app_initialize.
* If CONFIG_LIB_BOARDCTL=y we assume that come application will perform
* the initialization by calling board_app_initialize indirectly through
* boardctl().
boards/arm/stm32/olimex-stm32-h407/src/stm32_bringup.c
+6 -4
View File
@@ -42,8 +42,9 @@
#include "stm32.h"
#include "olimex-stm32-h407.h"
/* Conditional logic in olimex-stm32-h407.h will determine if certain features
* are supported. Tests for these features need to be made after including
/* Conditional logic in olimex-stm32-h407.h will determine if certain
* features are supported.
* Tests for these features need to be made after including
* olimex-stm32-h407.h.
*/
@@ -114,8 +115,9 @@ int stm32_bringup(void)
#endif
#ifdef HAVE_USBHOST
/* Initialize USB host operation. stm32_usbhost_initialize() starts a thread
* will monitor for USB connection and disconnection events.
/* Initialize USB host operation.
* stm32_usbhost_initialize() starts a thread will monitor for USB
* connection and disconnection events.
*/
ret = stm32_usbhost_initialize();
boards/arm/stm32/olimex-stm32-h407/src/stm32_sdio.c
+1
View File
@@ -119,6 +119,7 @@ int stm32_sdio_initialize(void)
#endif
/* Mount the SDIO-based MMC/SD block driver */
/* First, get an instance of the SDIO interface */
finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);

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