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arch/stm32h7: Extend support to all STM32H7x3xx
All parts in the STM32H7x3xx family have the same pinmap, etc.,
so extending support to all members of the family required only
minimal changes: Adding them to Kconfig, extending some
preprocessor logic, and minor code changes.
arch/arm/src/stm32h7/Kconfig:
* Add explicit support for all microcontrollers in the
STM32H7x3xx family by adding support for:
- STM32H743AG
- STM32H743AI
- STM32H743BG
- STM32H743BI
- STM32H743IG
- STM32H743II
- STM32H743VG
- STM32H743VI
- STM32H743XG
- STM32H743XI
- STM32H743ZG
- STM32H753AI
- STM32H753BI
- STM32H753VI
- STM32H753XI
- STM32H753ZI
* Fix TODO items for IO_CONFIG (all STM32H7X3XX).
* Because 100-pin parts lack GPIO ports F and G, but have
port H, create the new hidden configs STM32H7_HAVE_GPIOF
and STM32H7_HAVE_GPIOG.
* STM32H7_STM32H7X3XX:
- Select STM32H7_HAVE_GPIOF and STM32H7_HAVE_GPIOG only
when not STM32H7_IO_CONFIG_V (100-pin part).
- STM32H7_STM32H7X3XX: select STM32H7_HAVE_SPI5 for all
IO configs except V (100-pin part), which doesn't expose
SPI5 due to pin count.
* STM32H7_STM32H7X7XX: Always select STM32H7_HAVE_GPIOF and
STM32H7_HAVE_GPIOG because we aren't adding more part
numbers in this family.
* Remove extraneous (duplicate) "bool" and "default n"
lines.
* config STM32H7_FMC: Fix indent (contents were indented
with spaces while rest of file uses tabs).
arch/arm/include/stm32h7/chip.h:
* Extend preprocessor logic to add support for the new
MCU part numbers.
* Expand table of differences between family members.
* Define STM32H7_NGPIO based on IO_CONFIGs decided in Kconfig.
* If IO config is not known, issue compile-time #error
with grep-friendly "CONFIG_STM32H7_IO_CONFIG_x Not Set."
Suggested by davids5.
arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h:
arch/arm/src/stm32h7/stm32h7x3xx_rcc.c:
arch/arm/src/stm32h7/stm32h7x7xx_rcc.c:
* When checking STM32H7_NGPIO > 5 or 6, check also
CONFIG_STM32H7_HAVE_GPIOF or CONFIG_STM32H7_HAVE_GPIOG.
arch/arm/src/stm32h7/stm32_gpio.c:
* stm32_configgpio(): When applicable, make sure we're not
trying to configure one of the missing ports.
* Fix nxstyle complains (wrong end of line comment position
and several long lines). No functional changes.
* g_gpiobase[]: Init base address for ports F and G according to
CONFIG_STM32H7_HAVE_GPIOF and CONFIG_STM32H7_HAVE_GPIOG.
* stm32_configgpio(): Replace complicated check with g_gpiobase[]
null check. Suggested by davids5.
* stm32_gpiowrite() and stm32_gpioread(): Add previously missing
null check of g_gpiobase[].
arch/arm/src/stm32h7/stm32_gpio.h:
* Wrap the defines GPIO_PORTA, GPIO_PORTB, GPIO_PORTC, GPIO_PORTD,
GPIO_PORTE, GPIO_PORTF, GPIO_PORTG, GPIO_PORTH, GPIO_PORTI,
GPIO_PORTJ, and GPIO_PORTK in conditional logic so that the
compiler will prevent use of ports that do not exist on the
target MCU.
* Fix nxstyle complaints.
Documentation/NuttX.html:
* Remove copy-and-pasted anchor for stm32f76xx77xx.
* Correct link to README.txt for Nucleo-H743ZI board,
formerly on BitBucket, now on GitHub.
* Add list item for STMicro STM32H747I-DISCO board.
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
This commit is contained in:
committed by
patacongo
parent
0668a1552d
commit
9b9d1fc7ca
@@ -49,12 +49,19 @@
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/* STM32H7x3xx Differences between family members:
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*
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* ----------- ----------------
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* ----------- ---------------- ----- ----
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* SPI
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* PART PACKAGE GPIOs I2S
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* ----------- ---------------- ----- ----
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* STM32H7x3Ax UFBGA169 132 6/3
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* STM32H7x3Bx LQFP208 168 6/3
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* STM32H7x3Ix LQFP176/UFBGA176 140 6/3
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* STM32H7x3Vx LQFP100/TFBGA100 82 5/3
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* STM32H7x3Xx TFBGA240 168 6/3
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* STM32H7x3Zx LQFP144 114 6/3
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* ----------- ---------------- ----- ----
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*
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* PART PACKAGE
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* ----------- ----------------
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* STM32H7x3Zx LQFP144
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* ----------- ----------------
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* Parts STM32H7xxxG have 1024Kb of FLASH
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*
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* Parts STM32H7xxxI have 2048Kb of FLASH
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*
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@@ -62,7 +69,24 @@
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* with CONFIG_STM32H7_FLASH_OVERRIDE_x
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*/
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#if defined(CONFIG_ARCH_CHIP_STM32H743ZI) || defined(CONFIG_ARCH_CHIP_STM32H753II)
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#if defined (CONFIG_ARCH_CHIP_STM32H743AG) || \
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defined (CONFIG_ARCH_CHIP_STM32H743AI) || \
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defined (CONFIG_ARCH_CHIP_STM32H743BG) || \
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defined (CONFIG_ARCH_CHIP_STM32H743BI) || \
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defined (CONFIG_ARCH_CHIP_STM32H743IG) || \
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defined (CONFIG_ARCH_CHIP_STM32H743II) || \
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defined (CONFIG_ARCH_CHIP_STM32H743VG) || \
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defined (CONFIG_ARCH_CHIP_STM32H743VI) || \
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defined (CONFIG_ARCH_CHIP_STM32H743XG) || \
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defined (CONFIG_ARCH_CHIP_STM32H743XI) || \
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defined (CONFIG_ARCH_CHIP_STM32H743ZG) || \
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defined (CONFIG_ARCH_CHIP_STM32H743ZI) || \
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defined (CONFIG_ARCH_CHIP_STM32H753AI) || \
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defined (CONFIG_ARCH_CHIP_STM32H753BI) || \
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defined (CONFIG_ARCH_CHIP_STM32H753II) || \
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defined (CONFIG_ARCH_CHIP_STM32H753VI) || \
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defined (CONFIG_ARCH_CHIP_STM32H753XI) || \
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defined (CONFIG_ARCH_CHIP_STM32H753ZI)
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#elif defined(CONFIG_ARCH_CHIP_STM32H747XI)
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#else
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# error STM32 H7 chip not identified
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@@ -92,7 +116,22 @@
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/* Peripherals */
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# define STM32H7_NGPIO (11) /* GPIOA-GPIOK */
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# if defined(CONFIG_STM32H7_IO_CONFIG_A)
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# define STM32H7_NGPIO (10) /* GPIOA-GPIOJ */
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# elif defined(CONFIG_STM32H7_IO_CONFIG_B)
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# define STM32H7_NGPIO (11) /* GPIOA-GPIOK */
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# elif defined(CONFIG_STM32H7_IO_CONFIG_I)
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# define STM32H7_NGPIO (9) /* GPIOA-GPIOI */
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# elif defined(CONFIG_STM32H7_IO_CONFIG_V)
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# define STM32H7_NGPIO (8) /* GPIOA-GPIOH, missing GPIOF-GPIOG */
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# elif defined(CONFIG_STM32H7_IO_CONFIG_X)
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# define STM32H7_NGPIO (11) /* GPIOA-GPIOK */
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# elif defined(CONFIG_STM32H7_IO_CONFIG_Z)
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# define STM32H7_NGPIO (8) /* GPIOA-GPIOH */
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# else
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# error CONFIG_STM32H7_IO_CONFIG_x Not Set
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# endif
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# define STM32H7_NDMA (4) /* (4) DMA1, DMA2, BDMA and MDMA */
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# define STM32H7_NADC (3) /* (3) ADC1-3*/
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# define STM32H7_NDAC (2) /* (2) DAC1-2*/
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@@ -172,7 +211,7 @@
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# define STM32H7_NFMC 0 /* No FMC memory controller */
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#endif
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/* NVIC priority levels **************************************************************/
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/* NVIC priority levels *************************************************************/
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/* 16 Programmable interrupt levels */
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