arch/arm/src/tiva/hardware/tm4c: Fix wrong description on define TIVA_1WIRE_BASE: Was "EEPROM and Key Locker" (same as the item above). Now "1-Wire Master Module." Make DMACTL symbols visible for TM4C123: Remove "#ifdef CONFIG_ARCH_CHIP_TM4C129" guard around UART DMA Control (DMACTL) symbols. These bits are valid on TM4C123 devices, as well as on TM4C129. Also, improve the comment on UART_DMACTL_DMAERR.

This commit is contained in:
Nathan Hartman
2019-08-21 17:41:24 -06:00
committed by Gregory Nutt
parent 962ccb0f68
commit 92bf3bfece
2 changed files with 4 additions and 6 deletions
@@ -411,7 +411,7 @@
/* -0xaefff: Reserved */
# define TIVA_EEPROM_BASE (TIVA_PERIPH1_BASE + 0xaf000) /* -0xaffff: EEPROM and Key Locker */
/* -0xb5fff: Reserved */
# define TIVA_1WIRE_BASE (TIVA_PERIPH1_BASE + 0xb6000) /* -0xb6fff: EEPROM and Key Locker */
# define TIVA_1WIRE_BASE (TIVA_PERIPH1_BASE + 0xb6000) /* -0xb6fff: 1-Wire Master Module */
/* -0xb7fff: Reserved */
# define TIVA_I2C8_BASE (TIVA_PERIPH1_BASE + 0xb8000) /* -0xb8fff: I2C8 */
# define TIVA_I2C9_BASE (TIVA_PERIPH1_BASE + 0xb9000) /* -0xb9fff: I2C9 */
+3 -5
View File
@@ -637,11 +637,9 @@
/* UART DMA Control (DMACTL) */
#if defined(CONFIG_ARCH_CHIP_TM4C129)
# define UART_DMACTL_RXDMAE (1 << 0) /* Bit 0: Receive DMA Enable */
# define UART_DMACTL_TXDMAE (1 << 1) /* Bit 1: Transmit DMA Enable */
# define UART_DMACTL_DMAERR (1 << 2) /* Bit 2: DMA on Error */
#endif
#define UART_DMACTL_RXDMAE (1 << 0) /* Bit 0: Receive DMA Enable */
#define UART_DMACTL_TXDMAE (1 << 1) /* Bit 1: Transmit DMA Enable */
#define UART_DMACTL_DMAERR (1 << 2) /* Bit 2: Stop DMA receive if UART error */
/* UART 9-Bit Self Address (9BITADDR) */