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https://github.com/apache/nuttx.git
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arch/arm/src/nrf52: add a low-level RTC interface
This commit is contained in:
raiden00pl
committed by
Abdelatif Guettouche
Abdelatif Guettouche
parent
f6235c52f7
commit
774ea6eae7
@@ -94,6 +94,10 @@ config NRF52_TIMER
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bool
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default n
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config NRF52_RTC
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bool
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default n
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config NRF52_SPI_MASTER_WORKAROUND_1BYTE_TRANSFER
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bool "SPI Master 1 Byte transfer anomaly workaround"
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depends on NRF52_SPI_MASTER && ARCH_FAMILY_NRF52832
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@@ -210,14 +214,17 @@ config NRF52_TIMER4
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config NRF52_RTC0
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bool "RTC0"
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select NRF52_RTC
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default n
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config NRF52_RTC1
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bool "RTC1"
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select NRF52_RTC
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default n
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config NRF52_RTC2
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bool "RTC2"
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select NRF52_RTC
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default n
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config NRF52_I2S
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@@ -133,3 +133,7 @@ endif
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ifeq ($(CONFIG_NRF52_TIMER),y)
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CHIP_CSRCS += nrf52_tim.c
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endif
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ifeq ($(CONFIG_NRF52_RTC),y)
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CHIP_CSRCS += nrf52_rtc.c
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endif
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@@ -0,0 +1,108 @@
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/************************************************************************************
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* arch/arm/src/nrf52/hardware/nrf52_rtc.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_RTC_H
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#define __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_RTC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/nrf52_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Register offsets for RTC *********************************************************/
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#define NRF52_RTC_TASKS_START_OFFSET 0x0000 /* Start RTC counter */
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#define NRF52_RTC_TASKS_STOP_OFFSET 0x0004 /* Stop RTC counter */
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#define NRF52_RTC_TASKS_CLEAR_OFFSET 0x0008 /* Clear RTC counter */
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#define NRF52_RTC_TASKS_TRIGOVRFLW_OFFSET 0x000c /* Clear Set counter to 0xfffff0 */
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#define NRF52_RTC_EVENTS_TICK_OFFSET 0x0100 /* Event on counter increment */
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#define NRF52_RTC_EVENTS_OVRFLW_OFFSET 0x0104 /* Event on counter overflow */
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#define NRF52_RTC_EVENTS_COMPARE_OFFSET(x) (0x0140 + ((x) * 0x04)) /* Compare event on CC[x] match */
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#define NRF52_RTC_INTENSET_OFFSET 0x0304 /* Enable interrupt */
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#define NRF52_RTC_INTENCLR_OFFSET 0x0308 /* Disable interrupt */
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#define NRF52_RTC_EVTEN_OFFSET 0x0340 /* Enable or disable event routing */
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#define NRF52_RTC_EVTENSET_OFFSET 0x0344 /* Enable event routing */
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#define NRF52_RTC_EVTENCLR_OFFSET 0x0348 /* Disable event routing */
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#define NRF52_RTC_COUNTER_OFFSET 0x0504 /* Current counter value */
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#define NRF52_RTC_PRESCALER_OFFSET 0x0508 /* 12 bit prescaler for counter frequency */
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#define NRF52_RTC_CC_OFFSET(x) (0x0540 + ((x) * 0x04)) /* Compare register x */
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/* Register offsets for RTC *********************************************************/
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/* TASKS_START Register */
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#define RTC_TASKS_START (1 << 0) /* Bit 0: Start RTC counter */
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/* TASKS_STOP Register */
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#define RTC_TASKS_STOP (1 << 0) /* Bit 0: Stop RTC counter */
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/* TASKS_CLEAR Register */
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#define RTC_TASKS_CLEAR (1 << 0) /* Bit 0: Clear RTC counter */
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/* TASKS_TRIGOVRFLW Register */
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#define RTC_TASKS_TRIGOVRFLW (1 << 0) /* Bit 0: Set counter to 0xfffff0 */
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/* EVENTS_TICK Register */
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#define RTC_EVENTS_TICK (1 << 0) /* Bit 0: Event on counter increment */
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/* EVENTS_OVRFLW Register */
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#define RTC_EVENTS_OVRFLW (1 << 0) /* Bit 0: Event on counter overflow */
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/* EVENTS_COMPARE Register */
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#define RTC_EVENTS_COMPARE (1 << 0) /* Bit 0: Eompare event on CC[x] match */
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/* INTENSET/INTENCLR Register */
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#define RTC_INT_TICK (1 << 0) /* Bit 0: TICK interrupt*/
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#define RTC_INT_OVRFLW (1 << 1) /* Bit 1: OVRFLW interrupt */
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#define RTC_INT_COMPARE(x) (1 << (16 + (x))) /* Bit 16-19: COMPARE[x] interrupt */
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/* EVTEN/EVTENSET/EVTSENCLR Register */
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#define RTC_EVTEN_TICK (1 << 0) /* Bit 0: TICK event */
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#define RTC_EVTEN_OVRFLW (1 << 1) /* Bit 1: OVRFLW event */
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#define RTC_EVTEN_COMPARE(x) (1 << (16 + (x))) /* Bit 16-19: COMPARE[x] event */
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/* COUNTER Register */
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#define RTC_COUNTER_MASK (0x00ffffff) /* Bits 0-23: Counter value */
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/* PRESCALER Register */
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#define RTC_PRESCALER_MASK (0x00000fff) /* Bits 0-11: Prescaler value */
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#define RTC_PRESCALER_MAX (0x00000fff)
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/* CC Register */
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#define RTC_CC_MASK (0x00ffffff) /* Bits 0-23: Comapre register */
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#endif /* __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_RTC_H */
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,119 @@
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/****************************************************************************
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* arch/arm/src/nrf52/nrf52_rtc.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_NRF52_NRF52_RTC_H
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#define __ARCH_ARM_SRC_NRF52_NRF52_RTC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Helpers ******************************************************************/
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#define NRF52_RTC_START(d) ((d)->ops->start(d))
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#define NRF52_RTC_STOP(d) ((d)->ops->stop(d))
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#define NRF52_RTC_CLEAR(d) ((d)->ops->clear(d))
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#define NRF52_RTC_TRGOVRFLW(d) ((d)->ops->trgovrflw(d))
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#define NRF52_RTC_SETCC(d, i, cc) ((d)->ops->setcc(d, i, cc))
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#define NRF52_RTC_GETCC(d, i, cc) ((d)->ops->setcc(d, i, cc))
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#define NRF52_RTC_SETPRE(d, pre) ((d)->ops->setpre(d, pre))
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#define NRF52_RTC_SETISR(d, hnd, arg, s) ((d)->ops->setisr(d, hnd, arg, s))
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#define NRF52_RTC_ENABLEINT(d, s) ((d)->ops->enableint(d, s))
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#define NRF52_RTC_DISABLEINT(d, s) ((d)->ops->disableint(d, s))
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#define NRF52_RTC_CHECKINT(d, s) ((d)->ops->checkint(d, s))
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#define NRF52_RTC_ACKINT(d, s) ((d)->ops->ackint(d, s))
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* RTC CC index */
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enum nrf52_rtc_cc_e
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{
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NRF52_RTC_CC0 = 0,
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NRF52_RTC_CC1 = 1,
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NRF52_RTC_CC2 = 2,
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NRF52_RTC_CC3 = 3,
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};
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/* RTC IRQ source */
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enum nrf52_rtc_irq_e
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{
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NRF52_RTC_INT_TICK = 0,
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NRF52_RTC_INT_OVRFLW = 1,
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NRF52_RTC_INT_COMPARE0 = 2,
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NRF52_RTC_INT_COMPARE1 = 3,
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NRF52_RTC_INT_COMPARE2 = 4,
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NRF52_RTC_INT_COMPARE3 = 5,
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};
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/* NRF52 RTC device */
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struct nrf52_rtc_dev_s
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{
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struct nrf52_rtc_ops_s *ops;
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};
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/* NRF52 RTC ops */
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struct nrf52_rtc_ops_s
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{
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/* RTC tasks */
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CODE int (*start)(FAR struct nrf52_rtc_dev_s *dev);
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CODE int (*stop)(FAR struct nrf52_rtc_dev_s *dev);
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CODE int (*clear)(FAR struct nrf52_rtc_dev_s *dev);
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CODE int (*trgovrflw)(FAR struct nrf52_rtc_dev_s *dev);
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/* RTC operations */
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CODE int (*setcc)(FAR struct nrf52_rtc_dev_s *dev, uint8_t i, uint32_t cc);
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CODE int (*getcc)(FAR struct nrf52_rtc_dev_s *dev, uint8_t i,
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FAR uint32_t *cc);
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CODE int (*setpre)(FAR struct nrf52_rtc_dev_s *dev, uint16_t pre);
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/* RTC interrupts */
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CODE int (*setisr)(FAR struct nrf52_rtc_dev_s *dev, xcpt_t handler,
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FAR void * arg);
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CODE int (*enableint)(FAR struct nrf52_rtc_dev_s *dev, uint8_t source);
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CODE int (*disableint)(FAR struct nrf52_rtc_dev_s *dev, uint8_t source);
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CODE int (*checkint)(FAR struct nrf52_rtc_dev_s *dev, uint8_t source);
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CODE int (*ackint)(FAR struct nrf52_rtc_dev_s *dev, uint8_t source);
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};
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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FAR struct nrf52_rtc_dev_s *nrf52_rtc_init(int rtc);
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int nrf52_rtc_deinit(FAR struct nrf52_rtc_dev_s *dev);
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#endif /* __ARCH_ARM_SRC_NRF52_NRF52_RTC_H */
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