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fix: update aw88266a lib
CHAMPION-140 update aw88266a lib of stable version Signed-off-by: genghuihui <genghuihui@xiaomi.com> Change-Id: Ia426c3d895d3bb1b1bdf8a187bdc5a017be0ffe5
This commit is contained in:
+220
-105
@@ -49,6 +49,7 @@
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#define AW88266A_CHIPID (0x2013)
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#define AW88266A_SOFT_RESET (0x55aa)
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#define MAX_RETRIES 3
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#define AW88266A_SYSST_CHECK_MAX 10
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#define ARRAY_SIZE(array) sizeof(array) / sizeof(array[0])
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/****************************************************************************
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@@ -216,72 +217,126 @@ static int aw88266a_release(FAR struct audio_lowerhalf_s *dev);
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static const unsigned char g_aw88266a_reg_access[AW88266A_REG_MAX] =
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{
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[AW88266A_ID_REG] = (REG_RD_ACCESS),
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[AW88266A_SYSST_REG] = (REG_RD_ACCESS),
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[AW88266A_SYSINT_REG] = (REG_RD_ACCESS),
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[AW88266A_SYSINTM_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_SYSCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_SYSCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_I2SCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_I2SCFG1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_I2SCFG2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_HAGCCFG1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_HAGCCFG2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_HAGCCFG3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_HAGCCFG4_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_HAGCCFG5_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_HAGCCFG6_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_HAGCCFG7_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_HAGCST_REG] = (REG_RD_ACCESS),
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[AW88266A_PRODID_REG] = (REG_RD_ACCESS),
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[AW88266A_VBAT_REG] = (REG_RD_ACCESS),
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[AW88266A_TEMP_REG] = (REG_RD_ACCESS),
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[AW88266A_PVDD_REG] = (REG_RD_ACCESS),
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[AW88266A_DBGCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_I2SINT_REG] = (REG_RD_ACCESS),
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[AW88266A_I2SCAPCNT_REG] = (REG_RD_ACCESS),
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[AW88266A_CRCIN_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_CRCOUT_REG] = (REG_RD_ACCESS),
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[AW88266A_VSNCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_ISNCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_ISNCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_VTMCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_VTMCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_VTMCTRL3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_ISNDAT_REG] = (REG_RD_ACCESS),
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[AW88266A_VSNDAT_REG] = (REG_RD_ACCESS),
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[AW88266A_PWMCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_PWMCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_BSTCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_BSTCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_BSTCTRL3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_BSTDBG1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_BSTDBG2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_BSTDBG3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_PLLCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_PLLCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_PLLCTRL3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_CDACTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_CDACTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_SADCCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_TESTCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_TESTCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_EFCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_EFCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_EFWH_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_EFWM2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_EFWM1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_EFWL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW88266A_EFRH_REG] = (REG_RD_ACCESS),
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[AW88266A_EFRM2_REG] = (REG_RD_ACCESS),
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[AW88266A_EFRM1_REG] = (REG_RD_ACCESS),
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[AW88266A_EFRL_REG] = (REG_RD_ACCESS),
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[AW88266A_TESTDET_REG] = (REG_RD_ACCESS),
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[AW88266A_ID_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_SYSST_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_SYSINT_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_SYSINTM_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_SYSCTRL_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_SYSCTRL2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_I2SCTRL1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_I2SCTRL2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DACCFG1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DACCFG2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DACCFG3_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DACCFG4_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DACCFG5_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DACCFG6_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DACCFG7_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_PWMCTRL_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_I2SCFG1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DBGCTRL_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DACST_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_VBAT_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_TEMP_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_PVDD_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_ISNDAT_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_VSNDAT_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_I2SINT_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_I2SCAPCNT_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_ANASTA1_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_ANASTA2_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_ANASTA3_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_TESTDET_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_TESTIN_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_TESTOUT_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_VSNTM1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_VSNTM2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_ISNCTRL1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_PLLCTRL1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_PLLCTRL2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_PLLCTRL3_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_CDACTRL1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_CDACTRL2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_SADCCTRL1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_BSTCTRL1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_BSTCTRL2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_BSTCTRL3_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_BSTCTRL4_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_BSTCTRL5_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_BSTCTRL6_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DSMCFG1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DSMCFG2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DSMCFG3_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DSMCFG4_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DSMCFG5_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DSMCFG6_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DSMCFG7_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_DSMCFG8_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_TESTCTRL1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_TESTCTRL2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_EFCTRL1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_EFCTRL2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_EFWH_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_EFWM2_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_EFWM1_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_EFWL_REG] = (AW88266A_REG_RD_ACCESS |
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AW88266A_REG_WR_ACCESS),
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[AW88266A_EFRH_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_EFRM2_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_EFRM1_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_EFRL_REG] = (AW88266A_REG_RD_ACCESS),
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[AW88266A_TM_REG] = (AW88266A_REG_NONE_ACCESS),
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};
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static const aw88266a_reg_cfg_t g_aw88266a_spk_cfg[] =
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{
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{0x03, 0xfff},
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{0x03, 0xffff},
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{0x04, 0xb240},
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{0x05, 0x6007},
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{0x06, 0x84e8},
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@@ -400,7 +455,7 @@ static void aw88266a_run_pwd(FAR struct aw88266a_dev_s *priv,
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{
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aw88266a_write_reg_bit(priv, AW88266A_SYSCTRL_REG,
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AW88266A_PWDN_MASK,
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AW88266A_PWDN_NORMAL_WORKING);
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AW88266A_PWDN_WORKING_VALUE);
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}
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}
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@@ -430,10 +485,10 @@ static void aw88266a_set_channel(FAR struct aw88266a_dev_s *priv,
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}
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else
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{
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reg_value = AW88266A_CHSEL_MONO_LR2_VALUE;
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reg_value = AW88266A_CHSEL_MONO_VALUE;
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}
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aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL_REG,
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aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL1_REG,
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AW88266A_CHSEL_MASK, reg_value);
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}
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@@ -449,79 +504,67 @@ static void aw88266a_set_rate(FAR struct aw88266a_dev_s *priv,
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uint16_t rate)
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{
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uint16_t reg_value;
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uint32_t cco_mux_value;
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switch (rate)
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{
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case 8000:
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{
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reg_value = AW88266A_I2SSR_8KHZ_VALUE;
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cco_mux_value = AW88266A_I2S_CCO_MUX_8_16_32KHZ_VALUE;
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reg_value = AW88266A_I2SSR_8_KHZ_VALUE;
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}
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break;
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case 11000:
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{
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reg_value = AW88266A_I2SSR_11P025KHZ_VALUE;
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cco_mux_value = AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE;
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reg_value = AW88266A_I2SSR_11_KHZ_VALUE;
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}
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break;
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case 16000:
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{
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reg_value = AW88266A_I2SSR_16KHZ_VALUE;
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cco_mux_value = AW88266A_I2S_CCO_MUX_8_16_32KHZ_VALUE;
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reg_value = AW88266A_I2SSR_16_KHZ_VALUE;
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}
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break;
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case 22000:
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{
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reg_value = AW88266A_I2SSR_22P05KHZ_VALUE;
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cco_mux_value = AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE;
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reg_value = AW88266A_I2SSR_22_KHZ_VALUE;
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}
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break;
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case 24000:
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{
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reg_value = AW88266A_I2SSR_24KHZ_VALUE;
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cco_mux_value = AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE;
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reg_value = AW88266A_I2SSR_24_KHZ_VALUE;
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}
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break;
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case 32000:
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{
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reg_value = AW88266A_I2SSR_32KHZ_VALUE;
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cco_mux_value = AW88266A_I2S_CCO_MUX_8_16_32KHZ_VALUE;
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reg_value = AW88266A_I2SSR_32_KHZ_VALUE;
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}
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break;
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case 44000:
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{
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reg_value = AW88266A_I2SSR_44P1KHZ_VALUE;
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cco_mux_value = AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE;
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reg_value = AW88266A_I2SSR_44_KHZ_VALUE;
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}
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break;
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case 48000:
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{
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reg_value = AW88266A_I2SSR_48KHZ_VALUE;
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cco_mux_value = AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE;
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reg_value = AW88266A_I2SSR_48_KHZ_VALUE;
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}
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break;
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default:
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{
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reg_value = AW88266A_I2SSR_48KHZ_VALUE;
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reg_value = AW88266A_I2SSR_48_KHZ_VALUE;
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}
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break;
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}
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aw88266a_write_reg_bit(priv, AW88266A_PLLCTRL1_REG,
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AW88266A_I2S_CCO_MUX_MASK, cco_mux_value);
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/* set rate */
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aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL_REG,
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aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL1_REG,
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AW88266A_I2SSR_MASK, reg_value);
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}
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@@ -567,7 +610,7 @@ static void aw88266a_set_width(FAR struct aw88266a_dev_s *priv,
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/* set width */
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aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL_REG,
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aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL1_REG,
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AW88266A_I2SFS_MASK, reg_value);
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}
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@@ -580,25 +623,25 @@ static void aw88266a_set_width(FAR struct aw88266a_dev_s *priv,
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****************************************************************************/
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static void aw88266a_set_blck(FAR struct aw88266a_dev_s *priv,
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uint32_t bclk)
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uint8_t bclk_factor)
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{
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uint16_t reg_value;
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switch (bclk)
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switch (bclk_factor)
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{
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case 512000:
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case 32:
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{
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reg_value = AW88266A_I2SBCK_32FS_VALUE;
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}
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break;
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case 768000:
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case 48:
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{
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reg_value = AW88266A_I2SBCK_48FS_VALUE;
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}
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break;
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case 1024000:
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case 64:
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{
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reg_value = AW88266A_I2SBCK_64FS_VALUE;
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}
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@@ -613,7 +656,7 @@ static void aw88266a_set_blck(FAR struct aw88266a_dev_s *priv,
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/* set fs */
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aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL_REG,
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aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL1_REG,
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AW88266A_I2SBCK_MASK, reg_value);
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}
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@@ -669,13 +712,72 @@ static void aw88266a_dump_register(FAR struct aw88266a_dev_s *priv)
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for (i = 0; i < AW88266A_REG_MAX; i++)
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{
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if (g_aw88266a_reg_access[i] & REG_RD_ACCESS)
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if (g_aw88266a_reg_access[i] & AW88266A_REG_RD_ACCESS)
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{
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reg_val = aw88266a_read_reg(priv, i);
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}
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}
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}
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/****************************************************************************
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* Name: aw88266a_pll_check
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*
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* Description:
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* check aw88266a pll clock
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*
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****************************************************************************/
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static int aw88266a_pll_check(FAR struct aw88266a_dev_s *priv)
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{
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int ret;
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uint8_t i;
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uint16_t reg_val;
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for (i = 0; i < AW88266A_SYSST_CHECK_MAX; i++)
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{
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reg_val = aw88266a_read_reg(priv, AW88266A_SYSST_REG);
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if (((reg_val & (~AW88266A_SYSST_CHECK_MASK)) &
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AW88266A_SYSST_CHECK) == AW88266A_SYSST_CHECK)
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{
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ret = OK;
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break;
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}
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else
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{
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auderr("ERROR: check pll fail:cnt=%d reg_val=0x%04x\n\n",
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i, reg_val);
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ret = ERROR;
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up_mdelay(2);
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}
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}
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return ret;
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}
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/****************************************************************************
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||||
* Name: aw88266a_run_amp
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*
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||||
* Description:
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||||
* enable/disable aw88266a amp running status
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||||
*
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||||
****************************************************************************/
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||||
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||||
static void aw88266a_run_amp(FAR struct aw88266a_dev_s *priv, bool status)
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||||
{
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||||
if (status)
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{
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||||
aw88266a_write_reg_bit(priv, AW88266A_SYSCTRL_REG,
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||||
AW88266A_AMPPD_MASK,
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||||
AW88266A_AMPPD_WORKING_VALUE);
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||||
}
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||||
else
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||||
{
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||||
aw88266a_write_reg_bit(priv, AW88266A_SYSCTRL_REG,
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||||
AW88266A_AMPPD_MASK,
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||||
AW88266A_AMPPD_POWER_DOWN_VALUE);
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||||
}
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||||
}
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||||
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||||
/****************************************************************************
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||||
* Name: aw88266a_set_gain
|
||||
*
|
||||
@@ -697,8 +799,8 @@ static int aw88266a_set_gain(FAR struct aw88266a_dev_s *priv, int gain)
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||||
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||||
/* cal real gain */
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||||
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||||
gain = (((gain / AW88266A_VOL_6DB_STEP) << 6)
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||||
+ (gain % AW88266A_VOL_6DB_STEP));
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||||
gain = (((gain / AW88266A_VOL_STEP_DB) << 6)
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||||
+ (gain % AW88266A_VOL_STEP_DB));
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||||
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||||
/* get reg_val form real gain */
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||||
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||||
@@ -727,7 +829,7 @@ int aw88266a_get_gain(FAR struct aw88266a_dev_s *priv, FAR int *gain)
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||||
reg_val = (reg_val & (~0xfc00));
|
||||
|
||||
*gain = AW88266A_GAIN_MAX -
|
||||
((reg_val >> 6) * AW88266A_VOL_6DB_STEP + (reg_val & 0x3f));
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||||
((reg_val >> 6) * AW88266A_VOL_STEP_DB + (reg_val & 0x3f));
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||||
|
||||
return OK;
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||||
}
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||||
@@ -1033,9 +1135,7 @@ static int aw88266a_configure(FAR struct audio_lowerhalf_s *dev,
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||||
aw88266a_set_channel(priv, priv->nchannels);
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||||
aw88266a_set_rate(priv, priv->samprate);
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||||
aw88266a_set_width(priv, priv->bpsamp);
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||||
aw88266a_set_blck(priv, priv->bclk);
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||||
|
||||
aw88266a_set_volume(priv, 100);
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||||
aw88266a_set_blck(priv, priv->lower->bclk_factor);
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||||
}
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||||
break;
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||||
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||||
@@ -1063,6 +1163,7 @@ static int aw88266a_shutdown(FAR struct audio_lowerhalf_s *dev)
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||||
FAR struct aw88266a_dev_s *priv = (FAR struct aw88266a_dev_s *)dev;
|
||||
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||||
aw88266a_run_mute(priv, true);
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||||
aw88266a_run_amp(priv, false);
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||||
aw88266a_run_pwd(priv, true);
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||||
|
||||
audinfo("shutdown OK\n");
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||||
@@ -1085,6 +1186,20 @@ aw88266a_start(FAR struct audio_lowerhalf_s *dev,
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||||
static int aw88266a_start(FAR struct audio_lowerhalf_s *dev)
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||||
#endif
|
||||
{
|
||||
FAR struct aw88266a_dev_s *priv = (FAR struct aw88266a_dev_s *)dev;
|
||||
|
||||
aw88266a_run_pwd(priv, false);
|
||||
|
||||
if (aw88266a_pll_check(priv) < 0)
|
||||
{
|
||||
auderr("ERROR: aw88266a pll check failed\n");
|
||||
}
|
||||
|
||||
aw88266a_run_amp(priv, true);
|
||||
aw88266a_run_mute(priv, false);
|
||||
aw88266a_set_volume(priv, 100);
|
||||
|
||||
audinfo("Return OK\n");
|
||||
return OK;
|
||||
}
|
||||
|
||||
@@ -1208,10 +1323,6 @@ aw88266a_reserve(FAR struct audio_lowerhalf_s *dev, FAR void **session)
|
||||
static int aw88266a_reserve(FAR struct audio_lowerhalf_s *dev)
|
||||
#endif
|
||||
{
|
||||
FAR struct aw88266a_dev_s *priv = (FAR struct aw88266a_dev_s *)dev;
|
||||
|
||||
aw88266a_run_pwd(priv, false);
|
||||
aw88266a_run_mute(priv, false);
|
||||
audinfo("Reserve OK\n");
|
||||
|
||||
return OK;
|
||||
@@ -1276,6 +1387,10 @@ static void aw88266a_write_reg(FAR struct aw88266a_dev_s *priv,
|
||||
{
|
||||
auderr("ERROR: I2C_TRANSFER failed: %d\n", ret);
|
||||
}
|
||||
else
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
audinfo("retries=%d regaddr=%02x\n", retries, regaddr);
|
||||
}
|
||||
|
||||
+1341
-735
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user