diff --git a/drivers/audio/aw88266a.c b/drivers/audio/aw88266a.c
index 4041849a4a9..0cadde5b8ac 100644
--- a/drivers/audio/aw88266a.c
+++ b/drivers/audio/aw88266a.c
@@ -49,6 +49,7 @@
 #define AW88266A_CHIPID             (0x2013)
 #define AW88266A_SOFT_RESET         (0x55aa)
 #define MAX_RETRIES                 3
+#define AW88266A_SYSST_CHECK_MAX    10
 #define ARRAY_SIZE(array)           sizeof(array) / sizeof(array[0])
 
 /****************************************************************************
@@ -216,72 +217,126 @@ static int aw88266a_release(FAR struct audio_lowerhalf_s *dev);
 
 static const unsigned char g_aw88266a_reg_access[AW88266A_REG_MAX] =
 {
-  [AW88266A_ID_REG]       = (REG_RD_ACCESS),
-  [AW88266A_SYSST_REG]    = (REG_RD_ACCESS),
-  [AW88266A_SYSINT_REG]   = (REG_RD_ACCESS),
-  [AW88266A_SYSINTM_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_SYSCTRL_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_SYSCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_I2SCTRL_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_I2SCFG1_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_I2SCFG2_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_HAGCCFG1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_HAGCCFG2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_HAGCCFG3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_HAGCCFG4_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_HAGCCFG5_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_HAGCCFG6_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_HAGCCFG7_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_HAGCST_REG]   = (REG_RD_ACCESS),
-  [AW88266A_PRODID_REG]   = (REG_RD_ACCESS),
-  [AW88266A_VBAT_REG]     = (REG_RD_ACCESS),
-  [AW88266A_TEMP_REG]     = (REG_RD_ACCESS),
-  [AW88266A_PVDD_REG]     = (REG_RD_ACCESS),
-  [AW88266A_DBGCTRL_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_I2SINT_REG]   = (REG_RD_ACCESS),
-  [AW88266A_I2SCAPCNT_REG]  = (REG_RD_ACCESS),
-  [AW88266A_CRCIN_REG]    = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_CRCOUT_REG]   = (REG_RD_ACCESS),
-  [AW88266A_VSNCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_ISNCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_ISNCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_VTMCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_VTMCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_VTMCTRL3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_ISNDAT_REG]   = (REG_RD_ACCESS),
-  [AW88266A_VSNDAT_REG]   = (REG_RD_ACCESS),
-  [AW88266A_PWMCTRL_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_PWMCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_BSTCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_BSTCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_BSTCTRL3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_BSTDBG1_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_BSTDBG2_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_BSTDBG3_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_PLLCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_PLLCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_PLLCTRL3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_CDACTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_CDACTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_SADCCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_TESTCTRL1_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_TESTCTRL2_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_EFCTRL1_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_EFCTRL2_REG]  = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_EFWH_REG]     = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_EFWM2_REG]    = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_EFWM1_REG]    = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_EFWL_REG]     = (REG_RD_ACCESS | REG_WR_ACCESS),
-  [AW88266A_EFRH_REG]     = (REG_RD_ACCESS),
-  [AW88266A_EFRM2_REG]    = (REG_RD_ACCESS),
-  [AW88266A_EFRM1_REG]    = (REG_RD_ACCESS),
-  [AW88266A_EFRL_REG]     = (REG_RD_ACCESS),
-  [AW88266A_TESTDET_REG]  = (REG_RD_ACCESS),
+  [AW88266A_ID_REG]           = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_SYSST_REG]        = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_SYSINT_REG]       = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_SYSINTM_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_SYSCTRL_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_SYSCTRL2_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_I2SCTRL1_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_I2SCTRL2_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DACCFG1_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DACCFG2_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DACCFG3_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DACCFG4_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DACCFG5_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DACCFG6_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DACCFG7_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_PWMCTRL_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_I2SCFG1_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DBGCTRL_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DACST_REG]        = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_VBAT_REG]         = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_TEMP_REG]         = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_PVDD_REG]         = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_ISNDAT_REG]       = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_VSNDAT_REG]       = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_I2SINT_REG]       = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_I2SCAPCNT_REG]    = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_ANASTA1_REG]      = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_ANASTA2_REG]      = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_ANASTA3_REG]      = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_TESTDET_REG]      = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_TESTIN_REG]       = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_TESTOUT_REG]      = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_VSNTM1_REG]       = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_VSNTM2_REG]       = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_ISNCTRL1_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_PLLCTRL1_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_PLLCTRL2_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_PLLCTRL3_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_CDACTRL1_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_CDACTRL2_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_SADCCTRL1_REG]    = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_BSTCTRL1_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_BSTCTRL2_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_BSTCTRL3_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_BSTCTRL4_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_BSTCTRL5_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_BSTCTRL6_REG]     = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DSMCFG1_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DSMCFG2_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DSMCFG3_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DSMCFG4_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DSMCFG5_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DSMCFG6_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DSMCFG7_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_DSMCFG8_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_TESTCTRL1_REG]    = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_TESTCTRL2_REG]    = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_EFCTRL1_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_EFCTRL2_REG]      = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_EFWH_REG]         = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_EFWM2_REG]        = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_EFWM1_REG]        = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_EFWL_REG]         = (AW88266A_REG_RD_ACCESS |
+                                 AW88266A_REG_WR_ACCESS),
+  [AW88266A_EFRH_REG]         = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_EFRM2_REG]        = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_EFRM1_REG]        = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_EFRL_REG]         = (AW88266A_REG_RD_ACCESS),
+  [AW88266A_TM_REG]           = (AW88266A_REG_NONE_ACCESS),
 };
 
 static const aw88266a_reg_cfg_t g_aw88266a_spk_cfg[] =
 {
-  {0x03, 0xfff},
+  {0x03, 0xffff},
   {0x04, 0xb240},
   {0x05, 0x6007},
   {0x06, 0x84e8},
@@ -400,7 +455,7 @@ static void aw88266a_run_pwd(FAR struct aw88266a_dev_s *priv,
     {
       aw88266a_write_reg_bit(priv, AW88266A_SYSCTRL_REG,
                              AW88266A_PWDN_MASK,
-                             AW88266A_PWDN_NORMAL_WORKING);
+                             AW88266A_PWDN_WORKING_VALUE);
     }
 }
 
@@ -430,10 +485,10 @@ static void aw88266a_set_channel(FAR struct aw88266a_dev_s *priv,
     }
   else
     {
-      reg_value = AW88266A_CHSEL_MONO_LR2_VALUE;
+      reg_value = AW88266A_CHSEL_MONO_VALUE;
     }
 
-  aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL_REG,
+  aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL1_REG,
                          AW88266A_CHSEL_MASK, reg_value);
 }
 
@@ -449,79 +504,67 @@ static void aw88266a_set_rate(FAR struct aw88266a_dev_s *priv,
                               uint16_t rate)
 {
   uint16_t  reg_value;
-  uint32_t cco_mux_value;
 
   switch (rate)
   {
     case 8000:
       {
-        reg_value = AW88266A_I2SSR_8KHZ_VALUE;
-        cco_mux_value = AW88266A_I2S_CCO_MUX_8_16_32KHZ_VALUE;
+        reg_value = AW88266A_I2SSR_8_KHZ_VALUE;
       }
       break;
 
     case 11000:
       {
-        reg_value = AW88266A_I2SSR_11P025KHZ_VALUE;
-        cco_mux_value = AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE;
+        reg_value = AW88266A_I2SSR_11_KHZ_VALUE;
       }
       break;
 
     case 16000:
       {
-        reg_value = AW88266A_I2SSR_16KHZ_VALUE;
-        cco_mux_value = AW88266A_I2S_CCO_MUX_8_16_32KHZ_VALUE;
+        reg_value = AW88266A_I2SSR_16_KHZ_VALUE;
       }
       break;
 
     case 22000:
       {
-        reg_value = AW88266A_I2SSR_22P05KHZ_VALUE;
-        cco_mux_value = AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE;
+        reg_value = AW88266A_I2SSR_22_KHZ_VALUE;
       }
       break;
 
     case 24000:
       {
-        reg_value = AW88266A_I2SSR_24KHZ_VALUE;
-        cco_mux_value = AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE;
+        reg_value = AW88266A_I2SSR_24_KHZ_VALUE;
       }
       break;
 
     case 32000:
       {
-        reg_value = AW88266A_I2SSR_32KHZ_VALUE;
-        cco_mux_value = AW88266A_I2S_CCO_MUX_8_16_32KHZ_VALUE;
+        reg_value = AW88266A_I2SSR_32_KHZ_VALUE;
       }
       break;
 
     case 44000:
       {
-        reg_value = AW88266A_I2SSR_44P1KHZ_VALUE;
-        cco_mux_value = AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE;
+        reg_value = AW88266A_I2SSR_44_KHZ_VALUE;
       }
       break;
 
     case 48000:
       {
-        reg_value = AW88266A_I2SSR_48KHZ_VALUE;
-        cco_mux_value = AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE;
+        reg_value = AW88266A_I2SSR_48_KHZ_VALUE;
       }
       break;
 
     default:
       {
-        reg_value = AW88266A_I2SSR_48KHZ_VALUE;
+        reg_value = AW88266A_I2SSR_48_KHZ_VALUE;
       }
       break;
   }
 
-  aw88266a_write_reg_bit(priv, AW88266A_PLLCTRL1_REG,
-                         AW88266A_I2S_CCO_MUX_MASK, cco_mux_value);
-
   /* set rate */
 
-  aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL_REG,
+  aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL1_REG,
                          AW88266A_I2SSR_MASK, reg_value);
 }
 
@@ -567,7 +610,7 @@ static void aw88266a_set_width(FAR struct aw88266a_dev_s *priv,
 
   /* set width */
 
-  aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL_REG,
+  aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL1_REG,
                          AW88266A_I2SFS_MASK, reg_value);
 }
 
@@ -580,25 +623,25 @@ static void aw88266a_set_width(FAR struct aw88266a_dev_s *priv,
  ****************************************************************************/
 
 static void aw88266a_set_blck(FAR struct aw88266a_dev_s *priv,
-                              uint32_t bclk)
+                              uint8_t bclk_factor)
 {
   uint16_t  reg_value;
 
-  switch (bclk)
+  switch (bclk_factor)
   {
-    case 512000:
+    case 32:
       {
         reg_value = AW88266A_I2SBCK_32FS_VALUE;
       }
       break;
 
-    case 768000:
+    case 48:
       {
         reg_value = AW88266A_I2SBCK_48FS_VALUE;
       }
       break;
 
-    case 1024000:
+    case 64:
       {
         reg_value = AW88266A_I2SBCK_64FS_VALUE;
       }
@@ -613,7 +656,7 @@ static void aw88266a_set_blck(FAR struct aw88266a_dev_s *priv,
 
   /* set fs */
 
-  aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL_REG,
+  aw88266a_write_reg_bit(priv, AW88266A_I2SCTRL1_REG,
                          AW88266A_I2SBCK_MASK, reg_value);
 }
 
@@ -669,13 +712,72 @@ static void aw88266a_dump_register(FAR struct aw88266a_dev_s *priv)
 
   for (i = 0; i < AW88266A_REG_MAX; i++)
     {
-      if (g_aw88266a_reg_access[i] & REG_RD_ACCESS)
+      if (g_aw88266a_reg_access[i] & AW88266A_REG_RD_ACCESS)
         {
           reg_val = aw88266a_read_reg(priv, i);
         }
     }
 }
 
+/****************************************************************************
+ * Name: aw88266a_pll_check
+ *
+ * Description:
+ *   check aw88266a pll clock
+ *
+ ****************************************************************************/
+
+static int aw88266a_pll_check(FAR struct aw88266a_dev_s *priv)
+{
+  int ret;
+  uint8_t i;
+  uint16_t reg_val;
+
+  for (i = 0; i < AW88266A_SYSST_CHECK_MAX; i++)
+    {
+      reg_val = aw88266a_read_reg(priv, AW88266A_SYSST_REG);
+      if (((reg_val & (~AW88266A_SYSST_CHECK_MASK)) &
+            AW88266A_SYSST_CHECK) == AW88266A_SYSST_CHECK)
+        {
+          ret = OK;
+          break;
+        }
+      else
+        {
+          auderr("ERROR: check pll fail:cnt=%d reg_val=0x%04x\n\n",
+                 i, reg_val);
+          ret = ERROR;
+          up_mdelay(2);
+        }
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: aw88266a_run_amp
+ *
+ * Description:
+ *   enable/disable aw88266a amp running status
+ *
+ ****************************************************************************/
+
+static void aw88266a_run_amp(FAR struct aw88266a_dev_s *priv, bool status)
+{
+  if (status)
+    {
+      aw88266a_write_reg_bit(priv, AW88266A_SYSCTRL_REG,
+                             AW88266A_AMPPD_MASK,
+                             AW88266A_AMPPD_WORKING_VALUE);
+    }
+  else
+    {
+      aw88266a_write_reg_bit(priv, AW88266A_SYSCTRL_REG,
+                             AW88266A_AMPPD_MASK,
+                             AW88266A_AMPPD_POWER_DOWN_VALUE);
+    }
+}
+
 /****************************************************************************
  * Name: aw88266a_set_gain
  *
@@ -697,8 +799,8 @@ static int aw88266a_set_gain(FAR struct aw88266a_dev_s *priv, int gain)
 
   /* cal real gain */
 
-  gain = (((gain / AW88266A_VOL_6DB_STEP) << 6)
-          + (gain % AW88266A_VOL_6DB_STEP));
+  gain = (((gain / AW88266A_VOL_STEP_DB) << 6)
+          + (gain % AW88266A_VOL_STEP_DB));
 
   /* get reg_val form real gain */
 
@@ -727,7 +829,7 @@ int aw88266a_get_gain(FAR struct aw88266a_dev_s *priv, FAR int *gain)
   reg_val = (reg_val & (~0xfc00));
 
   *gain = AW88266A_GAIN_MAX -
-          ((reg_val >> 6) * AW88266A_VOL_6DB_STEP + (reg_val & 0x3f));
+          ((reg_val >> 6) * AW88266A_VOL_STEP_DB + (reg_val & 0x3f));
 
   return OK;
 }
@@ -1033,9 +1135,7 @@ static int aw88266a_configure(FAR struct audio_lowerhalf_s *dev,
           aw88266a_set_channel(priv, priv->nchannels);
           aw88266a_set_rate(priv, priv->samprate);
           aw88266a_set_width(priv, priv->bpsamp);
-          aw88266a_set_blck(priv, priv->bclk);
-
-          aw88266a_set_volume(priv, 100);
+          aw88266a_set_blck(priv, priv->lower->bclk_factor);
         }
         break;
 
@@ -1063,6 +1163,7 @@ static int aw88266a_shutdown(FAR struct audio_lowerhalf_s *dev)
   FAR struct aw88266a_dev_s *priv = (FAR struct aw88266a_dev_s *)dev;
 
   aw88266a_run_mute(priv, true);
+  aw88266a_run_amp(priv, false);
   aw88266a_run_pwd(priv, true);
 
   audinfo("shutdown OK\n");
@@ -1085,6 +1186,20 @@ aw88266a_start(FAR struct audio_lowerhalf_s *dev,
 static int aw88266a_start(FAR struct audio_lowerhalf_s *dev)
 #endif
 {
+  FAR struct aw88266a_dev_s *priv = (FAR struct aw88266a_dev_s *)dev;
+
+  aw88266a_run_pwd(priv, false);
+
+  if (aw88266a_pll_check(priv) < 0)
+    {
+      auderr("ERROR: aw88266a pll check failed\n");
+    }
+
+  aw88266a_run_amp(priv, true);
+  aw88266a_run_mute(priv, false);
+  aw88266a_set_volume(priv, 100);
+
+  audinfo("Return OK\n");
   return OK;
 }
 
@@ -1208,10 +1323,6 @@ aw88266a_reserve(FAR struct audio_lowerhalf_s *dev, FAR void **session)
 static int aw88266a_reserve(FAR struct audio_lowerhalf_s *dev)
 #endif
 {
-  FAR struct aw88266a_dev_s *priv = (FAR struct aw88266a_dev_s *)dev;
-
-  aw88266a_run_pwd(priv, false);
-  aw88266a_run_mute(priv, false);
   audinfo("Reserve OK\n");
 
   return OK;
@@ -1276,6 +1387,10 @@ static void aw88266a_write_reg(FAR struct aw88266a_dev_s *priv,
         {
           auderr("ERROR: I2C_TRANSFER failed: %d\n", ret);
         }
+      else
+        {
+          break;
+        }
 
       audinfo("retries=%d regaddr=%02x\n", retries, regaddr);
     }
diff --git a/drivers/audio/aw88266a.h b/drivers/audio/aw88266a.h
index 85ebfa6f5c9..59a549d860b 100644
--- a/drivers/audio/aw88266a.h
+++ b/drivers/audio/aw88266a.h
@@ -26,55 +26,61 @@
  ****************************************************************************/
 
 /* registers list */
-
 #define AW88266A_ID_REG                             (0x00)
 #define AW88266A_SYSST_REG                          (0x01)
 #define AW88266A_SYSINT_REG                         (0x02)
 #define AW88266A_SYSINTM_REG                        (0x03)
 #define AW88266A_SYSCTRL_REG                        (0x04)
 #define AW88266A_SYSCTRL2_REG                       (0x05)
-#define AW88266A_I2SCTRL_REG                        (0x06)
-#define AW88266A_I2SCFG1_REG                        (0x07)
-#define AW88266A_I2SCFG2_REG                        (0x08)
-#define AW88266A_HAGCCFG1_REG                       (0x09)
-#define AW88266A_HAGCCFG2_REG                       (0x0A)
-#define AW88266A_HAGCCFG3_REG                       (0x0B)
-#define AW88266A_HAGCCFG4_REG                       (0x0C)
-#define AW88266A_HAGCCFG5_REG                       (0x0D)
-#define AW88266A_HAGCCFG6_REG                       (0x0E)
-#define AW88266A_HAGCCFG7_REG                       (0x0F)
-#define AW88266A_HAGCST_REG                         (0x10)
-#define AW88266A_PRODID_REG                         (0x11)
-#define AW88266A_VBAT_REG                           (0x12)
-#define AW88266A_TEMP_REG                           (0x13)
-#define AW88266A_PVDD_REG                           (0x14)
-#define AW88266A_DBGCTRL_REG                        (0x20)
-#define AW88266A_I2SINT_REG                         (0x21)
-#define AW88266A_I2SCAPCNT_REG                      (0x22)
-#define AW88266A_CRCIN_REG                          (0x38)
-#define AW88266A_CRCOUT_REG                         (0x39)
-#define AW88266A_VSNCTRL1_REG                       (0x50)
+#define AW88266A_I2SCTRL1_REG                       (0x06)
+#define AW88266A_I2SCTRL2_REG                       (0x07)
+#define AW88266A_DACCFG1_REG                        (0x08)
+#define AW88266A_DACCFG2_REG                        (0x09)
+#define AW88266A_DACCFG3_REG                        (0x0A)
+#define AW88266A_DACCFG4_REG                        (0x0B)
+#define AW88266A_DACCFG5_REG                        (0x0C)
+#define AW88266A_DACCFG6_REG                        (0x0D)
+#define AW88266A_DACCFG7_REG                        (0x0E)
+#define AW88266A_PWMCTRL_REG                        (0x10)
+#define AW88266A_I2SCFG1_REG                        (0x11)
+#define AW88266A_DBGCTRL_REG                        (0x12)
+#define AW88266A_DACST_REG                          (0x20)
+#define AW88266A_VBAT_REG                           (0x21)
+#define AW88266A_TEMP_REG                           (0x22)
+#define AW88266A_PVDD_REG                           (0x23)
+#define AW88266A_ISNDAT_REG                         (0x24)
+#define AW88266A_VSNDAT_REG                         (0x25)
+#define AW88266A_I2SINT_REG                         (0x26)
+#define AW88266A_I2SCAPCNT_REG                      (0x27)
+#define AW88266A_ANASTA1_REG                        (0x28)
+#define AW88266A_ANASTA2_REG                        (0x29)
+#define AW88266A_ANASTA3_REG                        (0x2A)
+#define AW88266A_TESTDET_REG                        (0x2B)
+#define AW88266A_TESTIN_REG                         (0x38)
+#define AW88266A_TESTOUT_REG                        (0x39)
+#define AW88266A_VSNTM1_REG                         (0x50)
+#define AW88266A_VSNTM2_REG                         (0x51)
 #define AW88266A_ISNCTRL1_REG                       (0x52)
-#define AW88266A_ISNCTRL2_REG                       (0x53)
-#define AW88266A_VTMCTRL1_REG                       (0x54)
-#define AW88266A_VTMCTRL2_REG                       (0x55)
-#define AW88266A_VTMCTRL3_REG                       (0x56)
-#define AW88266A_ISNDAT_REG                         (0x57)
-#define AW88266A_VSNDAT_REG                         (0x58)
-#define AW88266A_PWMCTRL_REG                        (0x59)
-#define AW88266A_PWMCTRL2_REG                       (0x5A)
+#define AW88266A_PLLCTRL1_REG                       (0x53)
+#define AW88266A_PLLCTRL2_REG                       (0x54)
+#define AW88266A_PLLCTRL3_REG                       (0x55)
+#define AW88266A_CDACTRL1_REG                       (0x56)
+#define AW88266A_CDACTRL2_REG                       (0x57)
+#define AW88266A_SADCCTRL1_REG                      (0x58)
 #define AW88266A_BSTCTRL1_REG                       (0x60)
 #define AW88266A_BSTCTRL2_REG                       (0x61)
 #define AW88266A_BSTCTRL3_REG                       (0x62)
-#define AW88266A_BSTDBG1_REG                        (0x63)
-#define AW88266A_BSTDBG2_REG                        (0x64)
-#define AW88266A_BSTDBG3_REG                        (0x65)
-#define AW88266A_PLLCTRL1_REG                       (0x66)
-#define AW88266A_PLLCTRL2_REG                       (0x67)
-#define AW88266A_PLLCTRL3_REG                       (0x68)
-#define AW88266A_CDACTRL1_REG                       (0x69)
-#define AW88266A_CDACTRL2_REG                       (0x6A)
-#define AW88266A_SADCCTRL_REG                       (0x6B)
+#define AW88266A_BSTCTRL4_REG                       (0x63)
+#define AW88266A_BSTCTRL5_REG                       (0x64)
+#define AW88266A_BSTCTRL6_REG                       (0x65)
+#define AW88266A_DSMCFG1_REG                        (0x66)
+#define AW88266A_DSMCFG2_REG                        (0x67)
+#define AW88266A_DSMCFG3_REG                        (0x68)
+#define AW88266A_DSMCFG4_REG                        (0x69)
+#define AW88266A_DSMCFG5_REG                        (0x6A)
+#define AW88266A_DSMCFG6_REG                        (0x6B)
+#define AW88266A_DSMCFG7_REG                        (0x6C)
+#define AW88266A_DSMCFG8_REG                        (0x6D)
 #define AW88266A_TESTCTRL1_REG                      (0x70)
 #define AW88266A_TESTCTRL2_REG                      (0x71)
 #define AW88266A_EFCTRL1_REG                        (0x72)
@@ -87,15 +93,14 @@
 #define AW88266A_EFRM2_REG                          (0x79)
 #define AW88266A_EFRM1_REG                          (0x7A)
 #define AW88266A_EFRL_REG                           (0x7B)
-#define AW88266A_TESTDET_REG                        (0x7C)
+#define AW88266A_TM_REG                             (0x7C)
 
 #define AW88266A_REG_MAX                            (0x7D)
 
-#define REG_NONE_ACCESS                             (0)
-#define REG_RD_ACCESS                               (1 << 0)
-#define REG_WR_ACCESS                               (1 << 1)
+#define AW88266A_REG_NONE_ACCESS                    (0)
+#define AW88266A_REG_RD_ACCESS                      (1 << 0)
+#define AW88266A_REG_WR_ACCESS                      (1 << 1)
 #define AW88266A_GAIN_MAX                           (767)
-#define AW88266A_VOL_6DB_STEP                       (6 * 8)
 
 /* detail information of registers begin
  * ID (0x00) detail
@@ -107,13 +112,15 @@
 #define AW88266A_IDCODE_MASK                        \
   (~(((1 << AW88266A_IDCODE_BITS_LEN) - 1 ) << AW88266A_IDCODE_START_BIT))
 
-#define AW88266A_IDCODE_DEFAULT_VALUE               (0x1852)
+#define AW88266A_IDCODE_DEFAULT_VALUE               (0x2013)
 #define AW88266A_IDCODE_DEFAULT                     \
   (AW88266A_IDCODE_DEFAULT_VALUE << AW88266A_IDCODE_START_BIT)
 
 /* default value of ID (0x00)
- * #define  AW88266A_ID_DEFAULT (0x1852)
- * SYSST (0x01) detail
+ * #define AW88266A_ID_DEFAULT (0x2013)
+ */
+
+/* SYSST (0x01) detail
  * OVP2S bit 15 (SYSST 0x01)
  */
 
@@ -122,12 +129,13 @@
 #define AW88266A_OVP2S_MASK                         \
   (~(((1 << AW88266A_OVP2S_BITS_LEN) - 1) << AW88266A_OVP2S_START_BIT))
 
-#define AW88266A_OVP2S_NONE                         (0)
-#define AW88266A_OVP2S_NONE_VALUE                   \
-  (AW88266A_OVP2S_NONE << AW88266A_OVP2S_START_BIT)
-#define AW88266A_OVP2S_TRIG                         (1)
-#define AW88266A_OVP2S_TRIG_VALUE                   \
-  (AW88266A_OVP2S_TRIG << AW88266A_OVP2S_START_BIT)
+#define AW88266A_OVP2S_NORMAL                       (0)
+#define AW88266A_OVP2S_NORMAL_VALUE                 \
+  (AW88266A_OVP2S_NORMAL << AW88266A_OVP2S_START_BIT)
+
+#define AW88266A_OVP2S_OVP                          (1)
+#define AW88266A_OVP2S_OVP_VALUE                    \
+  (AW88266A_OVP2S_OVP << AW88266A_OVP2S_START_BIT)
 
 #define AW88266A_OVP2S_DEFAULT_VALUE                (0)
 #define AW88266A_OVP2S_DEFAULT                      \
@@ -140,13 +148,13 @@
 #define AW88266A_UVLS_MASK                          \
   (~(((1 << AW88266A_UVLS_BITS_LEN) - 1) << AW88266A_UVLS_START_BIT))
 
-#define AW88266A_UVLS_VDD_ABOVE_2P8V                (0)
-#define AW88266A_UVLS_VDD_ABOVE_2P8V_VALUE          \
-  (AW88266A_UVLS_VDD_ABOVE_2P8V << AW88266A_UVLS_START_BIT)
+#define AW88266A_UVLS_NORMAL                        (0)
+#define AW88266A_UVLS_NORMAL_VALUE                  \
+  (AW88266A_UVLS_NORMAL << AW88266A_UVLS_START_BIT)
 
-#define AW88266A_UVLS_VDD_BELOW_2P8V                (1)
-#define AW88266A_UVLS_VDD_BELOW_2P8V_VALUE          \
-  (AW88266A_UVLS_VDD_BELOW_2P8V << AW88266A_UVLS_START_BIT)
+#define AW88266A_UVLS_UVLO                          (1)
+#define AW88266A_UVLS_UVLO_VALUE                    \
+  (AW88266A_UVLS_UVLO << AW88266A_UVLS_START_BIT)
 
 #define AW88266A_UVLS_DEFAULT_VALUE                 (0)
 #define AW88266A_UVLS_DEFAULT                       \
@@ -177,12 +185,13 @@
 #define AW88266A_BSTOCS_MASK                        \
   (~(((1 << AW88266A_BSTOCS_BITS_LEN) - 1) << AW88266A_BSTOCS_START_BIT))
 
-#define AW88266A_BSTOCS_NONE                        (0)
-#define AW88266A_BSTOCS_NONE_VALUE                  \
-  (AW88266A_BSTOCS_NONE << AW88266A_BSTOCS_START_BIT)
-#define AW88266A_BSTOCS_TRIG                        (1)
-#define AW88266A_BSTOCS_TRIG_VALUE                  \
-  (AW88266A_BSTOCS_TRIG << AW88266A_BSTOCS_START_BIT)
+#define AW88266A_BSTOCS_NORMAL                      (0)
+#define AW88266A_BSTOCS_NORMAL_VALUE                \
+  (AW88266A_BSTOCS_NORMAL << AW88266A_BSTOCS_START_BIT)
+
+#define AW88266A_BSTOCS_OVER_CURRENT                (1)
+#define AW88266A_BSTOCS_OVER_CURRENT_VALUE          \
+  (AW88266A_BSTOCS_OVER_CURRENT << AW88266A_BSTOCS_START_BIT)
 
 #define AW88266A_BSTOCS_DEFAULT_VALUE               (0)
 #define AW88266A_BSTOCS_DEFAULT                     \
@@ -195,12 +204,13 @@
 #define AW88266A_OVPS_MASK                          \
   (~(((1 << AW88266A_OVPS_BITS_LEN) - 1) << AW88266A_OVPS_START_BIT))
 
-#define AW88266A_OVPS_NONE                          (0)
-#define AW88266A_OVPS_NONE_VALUE                    \
-  (AW88266A_OVPS_NONE << AW88266A_OVPS_START_BIT)
-#define AW88266A_OVPS_TRIG                          (1)
-#define AW88266A_OVPS_NONE_VALUE                    \
-  (AW88266A_OVPS_NONE << AW88266A_OVPS_START_BIT)
+#define AW88266A_OVPS_NORMAL                        (0)
+#define AW88266A_OVPS_NORMAL_VALUE                  \
+  (AW88266A_OVPS_NORMAL << AW88266A_OVPS_START_BIT)
+
+#define AW88266A_OVPS_OVP                           (1)
+#define AW88266A_OVPS_OVP_VALUE                     \
+  (AW88266A_OVPS_OVP << AW88266A_OVPS_START_BIT)
 
 #define AW88266A_OVPS_DEFAULT_VALUE                 (0)
 #define AW88266A_OVPS_DEFAULT                       \
@@ -242,25 +252,6 @@
 #define AW88266A_SWS_DEFAULT                        \
   (AW88266A_SWS_DEFAULT_VALUE << AW88266A_SWS_START_BIT)
 
-/* CLIPS bit 7 (SYSST 0x01) */
-
-#define AW88266A_CLIPS_START_BIT                    (7)
-#define AW88266A_CLIPS_BITS_LEN                     (1)
-#define AW88266A_CLIPS_MASK                         \
-  (~(((1 << AW88266A_CLIPS_BITS_LEN) - 1) << AW88266A_CLIPS_START_BIT))
-
-#define AW88266A_CLIPS_NOT_CLIPPING                 (0)
-#define AW88266A_CLIPS_NOT_CLIPPING_VALUE           \
-  (AW88266A_CLIPS_NOT_CLIPPING << AW88266A_CLIPS_START_BIT)
-
-#define AW88266A_CLIPS_CLIPPING                     (1)
-#define AW88266A_CLIPS_CLIPPING_VALUE               \
-  (AW88266A_CLIPS_CLIPPING << AW88266A_CLIPS_START_BIT)
-
-#define AW88266A_CLIPS_DEFAULT_VALUE                (0)
-#define AW88266A_CLIPS_DEFAULT                      \
-  (AW88266A_CLIPS_DEFAULT_VALUE << AW88266A_CLIPS_START_BIT)
-
 /* NOCLKS bit 5 (SYSST 0x01) */
 
 #define AW88266A_NOCLKS_START_BIT                   (5)
@@ -268,13 +259,13 @@
 #define AW88266A_NOCLKS_MASK                        \
   (~(((1 << AW88266A_NOCLKS_BITS_LEN) - 1) << AW88266A_NOCLKS_START_BIT))
 
-#define AW88266A_NOCLKS_NONE                        (0)
-#define AW88266A_NOCLKS_NONE_VALUE                  \
-  (AW88266A_NOCLKS_NONE << AW88266A_NOCLKS_START_BIT)
+#define AW88266A_NOCLKS_CLOCK_OK                    (0)
+#define AW88266A_NOCLKS_CLOCK_OK_VALUE              \
+  (AW88266A_NOCLKS_CLOCK_OK << AW88266A_NOCLKS_START_BIT)
 
-#define AW88266A_NOCLKS_TRIG                        (1)
-#define AW88266A_NOCLKS_TRIG_VALUE                  \
-  (AW88266A_NOCLKS_NONE << AW88266A_NOCLKS_START_BIT)
+#define AW88266A_NOCLKS_NO_CLOCK                    (1)
+#define AW88266A_NOCLKS_NO_CLOCK_VALUE              \
+  (AW88266A_NOCLKS_NO_CLOCK << AW88266A_NOCLKS_START_BIT)
 
 #define AW88266A_NOCLKS_DEFAULT_VALUE               (0)
 #define AW88266A_NOCLKS_DEFAULT                     \
@@ -287,12 +278,13 @@
 #define AW88266A_CLKS_MASK                          \
   (~(((1 << AW88266A_CLKS_BITS_LEN) - 1) << AW88266A_CLKS_START_BIT))
 
-#define AW88266A_CLKS_NONE                          (0)
-#define AW88266A_CLKS_NONE_VALUE                    \
-  (AW88266A_CLKS_NONE << AW88266A_CLKS_START_BIT)
-#define AW88266A_CLKS_TRIG                          (1)
-#define AW88266A_CLKS_TRIG_VALUE                    \
-  (AW88266A_CLKS_TRIG << AW88266A_CLKS_START_BIT)
+#define AW88266A_CLKS_NOT_STABLE                    (0)
+#define AW88266A_CLKS_NOT_STABLE_VALUE              \
+  (AW88266A_CLKS_NOT_STABLE << AW88266A_CLKS_START_BIT)
+
+#define AW88266A_CLKS_STABLE                        (1)
+#define AW88266A_CLKS_STABLE_VALUE                  \
+  (AW88266A_CLKS_STABLE << AW88266A_CLKS_START_BIT)
 
 #define AW88266A_CLKS_DEFAULT_VALUE                 (0)
 #define AW88266A_CLKS_DEFAULT                       \
@@ -305,34 +297,37 @@
 #define AW88266A_OCDS_MASK                          \
   (~(((1 << AW88266A_OCDS_BITS_LEN) - 1) << AW88266A_OCDS_START_BIT))
 
-#define AW88266A_OCDS_NONE                          (0)
-#define AW88266A_OCDS_NONE_VALUE                    \
-  (AW88266A_OCDS_NONE << AW88266A_OCDS_START_BIT)
-#define AW88266A_OCDS_TRIG                          (1)
-#define AW88266A_OCDS_TRIG_VALUE                    \
-  (AW88266A_OCDS_TRIG << AW88266A_OCDS_START_BIT)
+#define AW88266A_OCDS_NORAML                        (0)
+#define AW88266A_OCDS_NORAML_VALUE                  \
+  (AW88266A_OCDS_NORAML << AW88266A_OCDS_START_BIT)
+
+#define AW88266A_OCDS_OC                            (1)
+#define AW88266A_OCDS_OC_VALUE                      \
+  (AW88266A_OCDS_OC << AW88266A_OCDS_START_BIT)
 
 #define AW88266A_OCDS_DEFAULT_VALUE                 (0)
 #define AW88266A_OCDS_DEFAULT                       \
   (AW88266A_OCDS_DEFAULT_VALUE << AW88266A_OCDS_START_BIT)
 
-/* CLIP_PRES bit 2 (SYSST 0x01) */
+/* UVL_DVDDS bit 2 (SYSST 0x01) */
 
-#define AW88266A_CLIP_PRES_START_BIT                (2)
-#define AW88266A_CLIP_PRES_BITS_LEN                 (1)
-#define AW88266A_CLIP_PRES_MASK                     \
-  (~(((1 << AW88266A_CLIP_PRES_BITS_LEN) - 1) << AW88266A_CLIP_PRES_START_BIT))
+#define AW88266A_UVL_DVDDS_START_BIT                (2)
+#define AW88266A_UVL_DVDDS_BITS_LEN                 (1)
+#define AW88266A_UVL_DVDDS_MASK                     \
+  (~(((1 << AW88266A_UVL_DVDDS_BITS_LEN) - 1) <<    \
+  AW88266A_UVL_DVDDS_START_BIT))
 
-#define AW88266A_CLIP_PRES_NONE                     (0)
-#define AW88266A_CLIP_PRES_NONE_VALUE               \
-  (AW88266A_CLIP_PRES_NONE << AW88266A_CLIP_PRES_START_BIT)
-#define AW88266A_CLIP_PRES_TRIG                     (1)
-#define AW88266A_CLIP_PRES_TRIG_VALUE               \
-  (AW88266A_CLIP_PRES_TRIG << AW88266A_CLIP_PRES_START_BIT)
+#define AW88266A_UVL_DVDDS_NORMAL                   (0)
+#define AW88266A_UVL_DVDDS_NORMAL_VALUE             \
+  (AW88266A_UVL_DVDDS_NORMAL << AW88266A_UVL_DVDDS_START_BIT)
 
-#define AW88266A_CLIP_PRES_DEFAULT_VALUE            (0)
-#define AW88266A_CLIP_PRES_DEFAULT                  \
-  (AW88266A_CLIP_PRES_DEFAULT_VALUE << AW88266A_CLIP_PRES_START_BIT)
+#define AW88266A_UVL_DVDDS_UVLO                     (1)
+#define AW88266A_UVL_DVDDS_UVLO_VALUE               \
+  (AW88266A_UVL_DVDDS_UVLO << AW88266A_UVL_DVDDS_START_BIT)
+
+#define AW88266A_UVL_DVDDS_DEFAULT_VALUE            (0)
+#define AW88266A_UVL_DVDDS_DEFAULT                  \
+  (AW88266A_UVL_DVDDS_DEFAULT_VALUE << AW88266A_UVL_DVDDS_START_BIT)
 
 /* OTHS bit 1 (SYSST 0x01) */
 
@@ -341,12 +336,13 @@
 #define AW88266A_OTHS_MASK                          \
   (~(((1 << AW88266A_OTHS_BITS_LEN) - 1) << AW88266A_OTHS_START_BIT))
 
-#define AW88266A_OTHS_NONE                          (0)
-#define AW88266A_OTHS_NONE_VALUE                    \
-  (AW88266A_OTHS_NONE << AW88266A_OTHS_START_BIT)
-#define AW88266A_OTHS_TRIG                          (1)
-#define AW88266A_OTHS_TRIG_VALUE                    \
-  (AW88266A_OTHS_TRIG << AW88266A_OTHS_START_BIT)
+#define AW88266A_OTHS_NORMAL                        (0)
+#define AW88266A_OTHS_NORMAL_VALUE                  \
+  (AW88266A_OTHS_NORMAL << AW88266A_OTHS_START_BIT)
+
+#define AW88266A_OTHS_OT                            (1)
+#define AW88266A_OTHS_OT_VALUE                      \
+  (AW88266A_OTHS_OT << AW88266A_OTHS_START_BIT)
 
 #define AW88266A_OTHS_DEFAULT_VALUE                 (0)
 #define AW88266A_OTHS_DEFAULT                       \
@@ -371,30 +367,20 @@
   (AW88266A_PLLS_DEFAULT_VALUE << AW88266A_PLLS_START_BIT)
 
 #define AW88266A_SYSST_CHECK_MASK                   \
-  (~(AW88266A_UVLS_VDD_BELOW_2P8V_VALUE |           \
-  AW88266A_BSTOCS_TRIG_VALUE |                      \
+  (~(AW88266A_UVLS_UVLO_VALUE |                     \
+  AW88266A_BSTOCS_OVER_CURRENT_VALUE |              \
   AW88266A_BSTS_FINISHED_VALUE |                    \
   AW88266A_SWS_SWITCHING_VALUE |                    \
-  AW88266A_NOCLKS_TRIG_VALUE |                      \
-  AW88266A_CLKS_TRIG_VALUE |                        \
-  AW88266A_OCDS_TRIG_VALUE |                        \
-  AW88266A_OTHS_TRIG_VALUE |                        \
+  AW88266A_NOCLKS_NO_CLOCK_VALUE |                  \
+  AW88266A_CLKS_STABLE_VALUE |                      \
+  AW88266A_OCDS_OC_VALUE |                          \
+  AW88266A_OTHS_OT_VALUE |                          \
   AW88266A_PLLS_LOCKED_VALUE))
 
 #define AW88266A_SYSST_CHECK                        \
-  (AW88266A_CLKS_TRIG_VALUE |                       \
-  AW88266A_PLLS_LOCKED_VALUE)
-
-#define AW88266A_IIS_CHECK_MASK                     \
-  (~(AW88266A_UVLS_VDD_BELOW_2P8V_VALUE |           \
-  AW88266A_NOCLKS_TRIG_VALUE |                      \
-  AW88266A_CLKS_TRIG_VALUE |                        \
-  AW88266A_OCDS_TRIG_VALUE |                        \
-  AW88266A_OTHS_TRIG_VALUE |                        \
-  AW88266A_PLLS_LOCKED_VALUE))
-
-#define AW88266A_IIS_CHECK                          \
-  (AW88266A_CLKS_TRIG_VALUE |                       \
+  (AW88266A_BSTS_FINISHED_VALUE |                   \
+  AW88266A_SWS_SWITCHING_VALUE |                    \
+  AW88266A_CLKS_STABLE_VALUE |                      \
   AW88266A_PLLS_LOCKED_VALUE)
 
 /* default value of SYSST (0x01)
@@ -478,17 +464,6 @@
 #define AW88266A_SWI_DEFAULT                        \
   (AW88266A_SWI_DEFAULT_VALUE << AW88266A_SWI_START_BIT)
 
-/* CLIPI bit 7 (SYSINT 0x02) */
-
-#define AW88266A_CLIPI_START_BIT                    (7)
-#define AW88266A_CLIPI_BITS_LEN                     (1)
-#define AW88266A_CLIPI_MASK                         \
-  (~(((1 << AW88266A_CLIPI_BITS_LEN) - 1) << AW88266A_CLIPI_START_BIT))
-
-#define AW88266A_CLIPI_DEFAULT_VALUE                (0)
-#define AW88266A_CLIPI_DEFAULT                      \
-  (AW88266A_CLIPI_DEFAULT_VALUE << AW88266A_CLIPI_START_BIT)
-
 /* NOCLKI bit 5 (SYSINT 0x02) */
 
 #define AW88266A_NOCLKI_START_BIT                   (5)
@@ -512,6 +487,7 @@
   (AW88266A_CLKI_DEFAULT_VALUE << AW88266A_CLKI_START_BIT)
 
 /* OCDI bit 3 (SYSINT 0x02) */
+
 #define AW88266A_OCDI_START_BIT                     (3)
 #define AW88266A_OCDI_BITS_LEN                      (1)
 #define AW88266A_OCDI_MASK                          \
@@ -521,16 +497,17 @@
 #define AW88266A_OCDI_DEFAULT                       \
   (AW88266A_OCDI_DEFAULT_VALUE << AW88266A_OCDI_START_BIT)
 
-/* CLIP_PREI bit 2 (SYSINT 0x02) */
+/* UVL_DVDDI bit 2 (SYSINT 0x02) */
 
-#define AW88266A_CLIP_PREI_START_BIT                (2)
-#define AW88266A_CLIP_PREI_BITS_LEN                 (1)
-#define AW88266A_CLIP_PREI_MASK                     \
-  (~(((1 << AW88266A_CLIP_PREI_BITS_LEN) - 1) << AW88266A_CLIP_PREI_START_BIT))
+#define AW88266A_UVL_DVDDI_START_BIT                (2)
+#define AW88266A_UVL_DVDDI_BITS_LEN                 (1)
+#define AW88266A_UVL_DVDDI_MASK                     \
+  (~((( 1<< AW88266A_UVL_DVDDI_BITS_LEN) - 1) <<    \
+  AW88266A_UVL_DVDDI_START_BIT))
 
-#define AW88266A_CLIP_PREI_DEFAULT_VALUE            (0)
-#define AW88266A_CLIP_PREI_DEFAULT                  \
-  (AW88266A_CLIP_PREI_DEFAULT_VALUE << AW88266A_CLIP_PREI_START_BIT)
+#define AW88266A_UVL_DVDDI_DEFAULT_VALUE            (0)
+#define AW88266A_UVL_DVDDI_DEFAULT                  \
+  (AW88266A_UVL_DVDDI_DEFAULT_VALUE << AW88266A_UVL_DVDDI_START_BIT)
 
 /* OTHI bit 1 (SYSINT 0x02) */
 
@@ -591,6 +568,17 @@
 #define AW88266A_ADPM_DEFAULT                       \
   (AW88266A_ADPM_DEFAULT_VALUE<<AW88266A_ADPM_START_BIT)
 
+/* DSPM bit 12 (SYSINTM 0x03) */
+
+#define AW88266A_DSPM_START_BIT                     (12)
+#define AW88266A_DSPM_BITS_LEN                      (1)
+#define AW88266A_DSPM_MASK                          \
+  (~(((1 << AW88266A_DSPM_BITS_LEN) - 1) << AW88266A_DSPM_START_BIT))
+
+#define AW88266A_DSPM_DEFAULT_VALUE                 (1)
+#define AW88266A_DSPM_DEFAULT                       \
+  (AW88266A_DSPM_DEFAULT_VALUE << AW88266A_DSPM_START_BIT)
+
 /* BSTOCM bit 11 (SYSINTM 0x03) */
 
 #define AW88266A_BSTOCM_START_BIT                   (11)
@@ -646,7 +634,19 @@
 #define AW88266A_CLIPM_DEFAULT                      \
   (AW88266A_CLIPM_DEFAULT_VALUE << AW88266A_CLIPM_START_BIT)
 
+/* WDM bit 6 (SYSINTM 0x03) */
+
+#define AW88266A_WDM_START_BIT                      (6)
+#define AW88266A_WDM_BITS_LEN                       (1)
+#define AW88266A_WDM_MASK                           \
+  (~(((1 << AW88266A_WDM_BITS_LEN) - 1) << AW88266A_WDM_START_BIT))
+
+#define AW88266A_WDM_DEFAULT_VALUE                  (1)
+#define AW88266A_WDM_DEFAULT                        \
+  (AW88266A_WDM_DEFAULT_VALUE << AW88266A_WDM_START_BIT)
+
 /* NOCLKM bit 5 (SYSINTM 0x03) */
+
 #define AW88266A_NOCLKM_START_BIT                   (5)
 #define AW88266A_NOCLKM_BITS_LEN                    (1)
 #define AW88266A_NOCLKM_MASK                        \
@@ -678,16 +678,17 @@
 #define AW88266A_OCDM_DEFAULT                       \
   (AW88266A_OCDM_DEFAULT_VALUE << AW88266A_OCDM_START_BIT)
 
-/* CLIP_PREM bit 2 (SYSINTM 0x03) */
+/* UVL_DVDDM bit 2 (SYSINTM 0x03) */
 
-#define AW88266A_CLIP_PREM_START_BIT                (2)
-#define AW88266A_CLIP_PREM_BITS_LEN                 (1)
-#define AW88266A_CLIP_PREM_MASK                     \
-  (~(((1 << AW88266A_CLIP_PREM_BITS_LEN) - 1) << AW88266A_CLIP_PREM_START_BIT))
+#define AW88266A_UVL_DVDDM_START_BIT                (2)
+#define AW88266A_UVL_DVDDM_BITS_LEN                 (1)
+#define AW88266A_UVL_DVDDM_MASK                     \
+  (~(((1 << AW88266A_UVL_DVDDM_BITS_LEN) - 1) <<    \
+  AW88266A_UVL_DVDDM_START_BIT))
 
-#define AW88266A_CLIP_PREM_DEFAULT_VALUE            (1)
-#define AW88266A_CLIP_PREM_DEFAULT                  \
-  (AW88266A_CLIP_PREM_DEFAULT_VALUE << AW88266A_CLIP_PREM_START_BIT)
+#define AW88266A_UVL_DVDDM_DEFAULT_VALUE            (1)
+#define AW88266A_UVL_DVDDM_DEFAULT                  \
+  (AW88266A_UVL_DVDDM_DEFAULT_VALUE << AW88266A_UVL_DVDDM_START_BIT)
 
 /* OTHM bit 1 (SYSINTM 0x03) */
 
@@ -711,117 +712,160 @@
 #define AW88266A_PLLM_DEFAULT                       \
   (AW88266A_PLLM_DEFAULT_VALUE << AW88266A_PLLM_START_BIT)
 
-/* default value of SYSINTM (0x03)
- * #define  AW88266A_SYSINTM_DEFAULT (0xEFBF)
- * SYSCTRL (0x04) detail
- * SPK_GAIN bit 14:12 (SYSCTRL 0x04)
+/* default value of SYSINTM (0x03) */
+
+#define AW88266A_SYSINTM_DEFAULT                    (0xFFFF)
+
+/* SYSCTRL (0x04) detail
+ * DRVSTREN bit 15 (SYSCTRL 0x04)
  */
 
-#define AW88266A_SPK_GAIN_START_BIT                 (12)
-#define AW88266A_SPK_GAIN_BITS_LEN                  (3)
-#define AW88266A_SPK_GAIN_MASK                      \
-  (~((( 1 << AW88266A_SPK_GAIN_BITS_LEN) - 1) << AW88266A_SPK_GAIN_START_BIT))
+#define AW88266A_DRVSTREN_START_BIT                 (15)
+#define AW88266A_DRVSTREN_BITS_LEN                  (1)
+#define AW88266A_DRVSTREN_MASK                      \
+  (~(((1 << AW88266A_DRVSTREN_BITS_LEN) - 1) << AW88266A_DRVSTREN_START_BIT))
 
-#define AW88266A_SPK_GAIN_AV7                       (0)
-#define AW88266A_SPK_GAIN_AV7_VALUE                 \
-  (AW88266A_SPK_GAIN_AV7 << AW88266A_SPK_GAIN_START_BIT)
-#define AW88266A_SPK_GAIN_AV8                       (1)
-#define AW88266A_SPK_GAIN_AV8_VALUE                 \
-  (AW88266A_SPK_GAIN_AV8 << AW88266A_SPK_GAIN_START_BIT)
-#define AW88266A_SPK_GAIN_AV10                      (2)
-#define AW88266A_SPK_GAIN_AV10_VALUE                \
-  (AW88266A_SPK_GAIN_AV10 << AW88266A_SPK_GAIN_START_BIT)
-#define AW88266A_SPK_GAIN_AV14                      (3)
-#define AW88266A_SPK_GAIN_AV14_VALUE                \
-  (AW88266A_SPK_GAIN_AV14 << AW88266A_SPK_GAIN_START_BIT)
-#define AW88266A_SPK_GAIN_AV16                      (4)
-#define AW88266A_SPK_GAIN_AV16_VALUE                \
-  (AW88266A_SPK_GAIN_AV16 << AW88266A_SPK_GAIN_START_BIT)
-#define AW88266A_SPK_GAIN_AV20                      (5)
-#define AW88266A_SPK_GAIN_AV20_VALUE                \
-  (AW88266A_SPK_GAIN_AV20 << AW88266A_SPK_GAIN_START_BIT)
+#define AW88266A_DRVSTREN_4MA                       (0)
+#define AW88266A_DRVSTREN_4MA_VALUE                 \
+  (AW88266A_DRVSTREN_4MA << AW88266A_DRVSTREN_START_BIT)
 
-#define AW88266A_SPK_GAIN_DEFAULT_VALUE             (0x4)
-#define AW88266A_SPK_GAIN_DEFAULT                   \
-  (AW88266A_SPK_GAIN_DEFAULT_VALUE << AW88266A_SPK_GAIN_START_BIT)
+#define AW88266A_DRVSTREN_12MA                      (1)
+#define AW88266A_DRVSTREN_12MA_VALUE                \
+  (AW88266A_DRVSTREN_12MA << AW88266A_DRVSTREN_START_BIT)
 
-/* RCV_GAIN bit 11:10 (SYSCTRL 0x04) */
+#define AW88266A_DRVSTREN_DEFAULT_VALUE             (1)
+#define AW88266A_DRVSTREN_DEFAULT                   \
+  (AW88266A_DRVSTREN_DEFAULT_VALUE << AW88266A_DRVSTREN_START_BIT)
 
-#define AW88266A_RCV_GAIN_START_BIT                 (10)
-#define AW88266A_RCV_GAIN_BITS_LEN                  (2)
-#define AW88266A_RCV_GAIN_MASK                      \
-  (~(((1 << AW88266A_RCV_GAIN_BITS_LEN) - 1) << AW88266A_RCV_GAIN_START_BIT))
+/* SET_GAIN bit 14:12 (SYSCTRL 0x04) */
 
-#define AW88266A_RCV_GAIN_AV4P5                     (0)
-#define AW88266A_RCV_GAIN_AV4P5_VALUE               \
-  (AW88266A_RCV_GAIN_AV4P5 << AW88266A_RCV_GAIN_START_BIT)
-#define AW88266A_RCV_GAIN_AV5                       (1)
-#define AW88266A_RCV_GAIN_AV5_VALUE                 \
-  (AW88266A_RCV_GAIN_AV5 << AW88266A_RCV_GAIN_START_BIT)
-#define AW88266A_RCV_GAIN_AV5P5                     (2)
-#define AW88266A_RCV_GAIN_AV5P5_VALUE               \
-  (AW88266A_RCV_GAIN_AV5P5 << AW88266A_RCV_GAIN_START_BIT)
-#define AW88266A_RCV_GAIN_AV7P5                     (3)
-#define AW88266A_RCV_GAIN_AV7P5_VALUE               \
-  (AW88266A_RCV_GAIN_AV7P5 << AW88266A_RCV_GAIN_START_BIT)
+#define AW88266A_SET_GAIN_START_BIT                 (12)
+#define AW88266A_SET_GAIN_BITS_LEN                  (3)
+#define AW88266A_SET_GAIN_MASK                      \
+  (~(((1 << AW88266A_SET_GAIN_BITS_LEN) - 1) << AW88266A_SET_GAIN_START_BIT))
 
-#define AW88266A_RCV_GAIN_DEFAULT_VALUE             (0)
-#define AW88266A_RCV_GAIN_DEFAULT                   \
-  (AW88266A_RCV_GAIN_DEFAULT_VALUE << AW88266A_RCV_GAIN_START_BIT)
+#define AW88266A_SET_GAIN_4P5_AV                    (0)
+#define AW88266A_SET_GAIN_4P5_AV_VALUE              \
+  (AW88266A_SET_GAIN_4P5_AV << AW88266A_SET_GAIN_START_BIT)
 
-/* INTMODE bit 9 (SYSCTRL 0x04) */
+#define AW88266A_SET_GAIN_5P0_AV                    (1)
+#define AW88266A_SET_GAIN_5P0_AV_VALUE              \
+  (AW88266A_SET_GAIN_5P0_AV << AW88266A_SET_GAIN_START_BIT)
 
-#define AW88266A_INTMODE_START_BIT                  (9)
-#define AW88266A_INTMODE_BITS_LEN                   (1)
-#define AW88266A_INTMODE_MASK                       \
-  (~(((1 << AW88266A_INTMODE_BITS_LEN) - 1) << AW88266A_INTMODE_START_BIT))
+#define AW88266A_SET_GAIN_6P0_AV                    (2)
+#define AW88266A_SET_GAIN_6P0_AV_VALUE              \
+  (AW88266A_SET_GAIN_6P0_AV << AW88266A_SET_GAIN_START_BIT)
 
-#define AW88266A_INTMODE_OPENDRAIN                  (0)
-#define AW88266A_INTMODE_OPENDRAIN_VALUE            \
-  (AW88266A_INTMODE_OPENDRAIN << AW88266A_INTMODE_START_BIT)
-#define AW88266A_INTMODE_PUSHPULL                   (1)
-#define AW88266A_INTMODE_PUSHPULL_VALUE             \
-  (AW88266A_INTMODE_PUSHPULL << AW88266A_INTMODE_START_BIT)
+#define AW88266A_SET_GAIN_6P7_AV                    (3)
+#define AW88266A_SET_GAIN_6P7_AV_VALUE              \
+  (AW88266A_SET_GAIN_6P7_AV << AW88266A_SET_GAIN_START_BIT)
 
-#define AW88266A_INTMODE_DEFAULT_VALUE              (0)
-#define AW88266A_INTMODE_DEFAULT                    \
-  (AW88266A_INTMODE_DEFAULT_VALUE<<AW88266A_INTMODE_START_BIT)
+#define AW88266A_SET_GAIN_10_AV                     (4)
+#define AW88266A_SET_GAIN_10_AV_VALUE               \
+  (AW88266A_SET_GAIN_10_AV << AW88266A_SET_GAIN_START_BIT)
 
-/* INTN bit 8 (SYSCTRL 0x04) */
+#define AW88266A_SET_GAIN_12_AV                     (5)
+#define AW88266A_SET_GAIN_12_AV_VALUE               \
+  (AW88266A_SET_GAIN_12_AV << AW88266A_SET_GAIN_START_BIT)
 
-#define AW88266A_INTN_START_BIT                     (8)
-#define AW88266A_INTN_BITS_LEN                      (1)
-#define AW88266A_INTN_MASK                          \
-  (~(((1 << AW88266A_INTN_BITS_LEN) - 1) << AW88266A_INTN_START_BIT))
+#define AW88266A_SET_GAIN_DEFAULT_VALUE             (0x5)
+#define AW88266A_SET_GAIN_DEFAULT                   \
+  (AW88266A_SET_GAIN_DEFAULT_VALUE << AW88266A_SET_GAIN_START_BIT)
 
-#define AW88266A_INTN_SYSINT                        (0)
-#define AW88266A_INTN_SYSINT_VALUE                  \
-  (AW88266A_INTN_SYSINT << AW88266A_INTN_START_BIT)
-#define AW88266A_INTN_SYSST                         (1)
-#define AW88266A_INTN_SYSST_VALUE                   \
-  (AW88266A_INTN_SYSST << AW88266A_INTN_START_BIT)
+/* RMSE bit 11 (SYSCTRL 0x04) */
 
-#define AW88266A_INTN_DEFAULT_VALUE                 (0)
-#define AW88266A_INTN_DEFAULT                       \
-  (AW88266A_INTN_DEFAULT_VALUE << AW88266A_INTN_START_BIT)
+#define AW88266A_RMSE_START_BIT                     (11)
+#define AW88266A_RMSE_BITS_LEN                      (1)
+#define AW88266A_RMSE_MASK                          \
+  (~(((1 << AW88266A_RMSE_BITS_LEN) - 1) << AW88266A_RMSE_START_BIT))
 
-/* RCV_MODE bit 7 (SYSCTRL 0x04) */
+#define AW88266A_RMSE_PEAK_AGC                      (0)
+#define AW88266A_RMSE_PEAK_AGC_VALUE                \
+  (AW88266A_RMSE_PEAK_AGC << AW88266A_RMSE_START_BIT)
 
-#define AW88266A_RCV_MODE_START_BIT                 (7)
-#define AW88266A_RCV_MODE_BITS_LEN                  (1)
-#define AW88266A_RCV_MODE_MASK                      \
-  (~(((1 << AW88266A_RCV_MODE_BITS_LEN) - 1) << AW88266A_RCV_MODE_START_BIT))
+#define AW88266A_RMSE_RMS_AGC                       (1)
+#define AW88266A_RMSE_RMS_AGC_VALUE                 \
+  (AW88266A_RMSE_RMS_AGC << AW88266A_RMSE_START_BIT)
 
-#define AW88266A_RCV_MODE_SPEAKER                   (0)
-#define AW88266A_RCV_MODE_SPEAKER_MODE              \
-  (AW88266A_RCV_MODE_SPEAKER_MODE << AW88266A_RCV_MODE_START_BIT)
-#define AW88266A_RCV_MODE_RECEIVER                  (1)
-#define AW88266A_RCV_MODE_RECEIVER_MODE             \
-  (AW88266A_RCV_MODE_RECEIVER_MODE << AW88266A_RCV_MODE_START_BIT)
+#define AW88266A_RMSE_DEFAULT_VALUE                 (0)
+#define AW88266A_RMSE_DEFAULT                       \
+  (AW88266A_RMSE_DEFAULT_VALUE << AW88266A_RMSE_START_BIT)
 
-#define AW88266A_RCV_MODE_DEFAULT_VALUE             (0)
-#define AW88266A_RCV_MODE_DEFAULT                   \
-  (AW88266A_RCV_MODE_DEFAULT_VALUE<<AW88266A_RCV_MODE_START_BIT)
+/* HAGCE bit 10 (SYSCTRL 0x04) */
+
+#define AW88266A_HAGCE_START_BIT                    (10)
+#define AW88266A_HAGCE_BITS_LEN                     (1)
+#define AW88266A_HAGCE_MASK                         \
+  (~(((1 << AW88266A_HAGCE_BITS_LEN) - 1) << AW88266A_HAGCE_START_BIT))
+
+#define AW88266A_HAGCE_DISABLE                      (0)
+#define AW88266A_HAGCE_DISABLE_VALUE                \
+  (AW88266A_HAGCE_DISABLE << AW88266A_HAGCE_START_BIT)
+
+#define AW88266A_HAGCE_ENABLE                       (1)
+#define AW88266A_HAGCE_ENABLE_VALUE                 \
+  (AW88266A_HAGCE_ENABLE << AW88266A_HAGCE_START_BIT)
+
+#define AW88266A_HAGCE_DEFAULT_VALUE                (0)
+#define AW88266A_HAGCE_DEFAULT                      \
+  (AW88266A_HAGCE_DEFAULT_VALUE << AW88266A_HAGCE_START_BIT)
+
+/* HDCCE bit 9 (SYSCTRL 0x04) */
+
+#define AW88266A_HDCCE_START_BIT                    (9)
+#define AW88266A_HDCCE_BITS_LEN                     (1)
+#define AW88266A_HDCCE_MASK                         \
+  (~(((1 << AW88266A_HDCCE_BITS_LEN) - 1) << AW88266A_HDCCE_START_BIT))
+
+#define AW88266A_HDCCE_DISABLE                      (0)
+#define AW88266A_HDCCE_DISABLE_VALUE                \
+  (AW88266A_HDCCE_DISABLE << AW88266A_HDCCE_START_BIT)
+
+#define AW88266A_HDCCE_ENABLE                       (1)
+#define AW88266A_HDCCE_ENABLE_VALUE                 \
+  (AW88266A_HDCCE_ENABLE << AW88266A_HDCCE_START_BIT)
+
+#define AW88266A_HDCCE_DEFAULT_VALUE                (1)
+#define AW88266A_HDCCE_DEFAULT                      \
+  (AW88266A_HDCCE_DEFAULT_VALUE << AW88266A_HDCCE_START_BIT)
+
+/* HMUTE bit 8 (SYSCTRL 0x04) */
+
+#define AW88266A_HMUTE_START_BIT                    (8)
+#define AW88266A_HMUTE_BITS_LEN                     (1)
+#define AW88266A_HMUTE_MASK                         \
+  (~(((1 << AW88266A_HMUTE_BITS_LEN) - 1) << AW88266A_HMUTE_START_BIT))
+
+#define AW88266A_HMUTE_DISABLE                      (0)
+#define AW88266A_HMUTE_DISABLE_VALUE                \
+  (AW88266A_HMUTE_DISABLE << AW88266A_HMUTE_START_BIT)
+
+#define AW88266A_HMUTE_ENABLE                       (1)
+#define AW88266A_HMUTE_ENABLE_VALUE                 \
+  (AW88266A_HMUTE_ENABLE << AW88266A_HMUTE_START_BIT)
+
+#define AW88266A_HMUTE_DEFAULT_VALUE                (1)
+#define AW88266A_HMUTE_DEFAULT                      \
+  (AW88266A_HMUTE_DEFAULT_VALUE << AW88266A_HMUTE_START_BIT)
+
+/* EN_TRAN bit 7 (SYSCTRL 0x04) */
+
+#define AW88266A_EN_TRAN_START_BIT                  (7)
+#define AW88266A_EN_TRAN_BITS_LEN                   (1)
+#define AW88266A_EN_TRAN_MASK                       \
+  (~(((1 << AW88266A_EN_TRAN_BITS_LEN) - 1) << AW88266A_EN_TRAN_START_BIT))
+
+#define AW88266A_EN_TRAN_SPK                        (0)
+#define AW88266A_EN_TRAN_SPK_VALUE                  \
+  (AW88266A_EN_TRAN_SPK << AW88266A_EN_TRAN_START_BIT)
+
+#define AW88266A_EN_TRAN_RCV                        (1)
+#define AW88266A_EN_TRAN_RCV_VALUE                  \
+  (AW88266A_EN_TRAN_RCV << AW88266A_EN_TRAN_START_BIT)
+
+#define AW88266A_EN_TRAN_DEFAULT_VALUE              (0)
+#define AW88266A_EN_TRAN_DEFAULT                    \
+  (AW88266A_EN_TRAN_DEFAULT_VALUE << AW88266A_EN_TRAN_START_BIT)
 
 /* I2SEN bit 6 (SYSCTRL 0x04) */
 
@@ -848,12 +892,13 @@
 #define AW88266A_WSINV_MASK                         \
   (~(((1<<AW88266A_WSINV_BITS_LEN)-1)<<AW88266A_WSINV_START_BIT))
 
-#define AW88266A_WSINV_NO_SWITCH                    (0)
-#define AW88266A_WSINV_NO_SWITCH_VALUE              \
-  (AW88266A_WSINV_NO_SWITCH << AW88266A_WSINV_START_BIT)
-#define AW88266A_WSINV_LEFTRIGHT_SWITCH             (1)
-#define AW88266A_WSINV_LEFTRIGHT_SWITCH_VALUE       \
-  (AW88266A_WSINV_LEFTRIGHT_SWITCH << AW88266A_WSINV_START_BIT)
+#define AW88266A_WSINV_NOT_SWITCH                   (0)
+#define AW88266A_WSINV_NOT_SWITCH_VALUE             \
+  (AW88266A_WSINV_NOT_SWITCH << AW88266A_WSINV_START_BIT)
+
+#define AW88266A_WSINV_SWITCH                       (1)
+#define AW88266A_WSINV_SWITCH_VALUE                 \
+  (AW88266A_WSINV_SWITCH << AW88266A_WSINV_START_BIT)
 
 #define AW88266A_WSINV_DEFAULT_VALUE                (0)
 #define AW88266A_WSINV_DEFAULT                      \
@@ -887,9 +932,10 @@
 #define AW88266A_IPLL_BCK                           (0)
 #define AW88266A_IPLL_BCK_VALUE                     \
   (AW88266A_IPLL_BCK << AW88266A_IPLL_START_BIT)
+
 #define AW88266A_IPLL_WCK                           (1)
 #define AW88266A_IPLL_WCK_VALUE                     \
-  (AW88266A_IPLL_WWCK << AW88266A_IPLL_START_BIT)
+  (AW88266A_IPLL_WCK << AW88266A_IPLL_START_BIT)
 
 #define AW88266A_IPLL_DEFAULT_VALUE                 (0)
 #define AW88266A_IPLL_DEFAULT                       \
@@ -902,9 +948,10 @@
 #define AW88266A_AMPPD_MASK                         \
   (~(((1 << AW88266A_AMPPD_BITS_LEN) - 1) << AW88266A_AMPPD_START_BIT))
 
-#define AW88266A_AMPPD_NORMAL_WORKING               (0)
-#define AW88266A_AMPPD_NORMAL_WORKING_VALUE         \
-  (AW88266A_AMPPD_NORMAL_WORKING << AW88266A_AMPPD_START_BIT)
+#define AW88266A_AMPPD_WORKING                      (0)
+#define AW88266A_AMPPD_WORKING_VALUE                \
+  (AW88266A_AMPPD_WORKING << AW88266A_AMPPD_START_BIT)
+
 #define AW88266A_AMPPD_POWER_DOWN                   (1)
 #define AW88266A_AMPPD_POWER_DOWN_VALUE             \
   (AW88266A_AMPPD_POWER_DOWN << AW88266A_AMPPD_START_BIT)
@@ -920,9 +967,10 @@
 #define AW88266A_PWDN_MASK                          \
   (~(((1 << AW88266A_PWDN_BITS_LEN) - 1) << AW88266A_PWDN_START_BIT))
 
-#define AW88266A_PWDN_NORMAL_WORKING                (0)
-#define AW88266A_PWDN_NORMAL_WORKING_VALUE          \
-  (AW88266A_PWDN_NORMAL_WORKING << AW88266A_PWDN_START_BIT)
+#define AW88266A_PWDN_WORKING                       (0)
+#define AW88266A_PWDN_WORKING_VALUE                 \
+  (AW88266A_PWDN_WORKING << AW88266A_PWDN_START_BIT)
+
 #define AW88266A_PWDN_POWER_DOWN                    (1)
 #define AW88266A_PWDN_POWER_DOWN_VALUE              \
   (AW88266A_PWDN_POWER_DOWN << AW88266A_PWDN_START_BIT)
@@ -932,154 +980,148 @@
   (AW88266A_PWDN_DEFAULT_VALUE << AW88266A_PWDN_START_BIT)
 
 /* default value of SYSCTRL (0x04)
- * #define  AW88266A_SYSCTRL_DEFAULT (0x4003)
- * SYSCTRL2 (0x05) detail
- * RMSE bit 7 (SYSCTRL2 0x05)
+ * #define AW88266A_SYSCTRL_DEFAULT (0xD303)
  */
 
-#define AW88266A_RMSE_START_BIT                     (7)
-#define AW88266A_RMSE_BITS_LEN                      (1)
-#define AW88266A_RMSE_MASK                          \
-  (~(((1 << AW88266A_RMSE_BITS_LEN) - 1) << AW88266A_RMSE_START_BIT))
+/* SYSCTRL2 (0x05) detail
+ * IV2CH bit 15 (SYSCTRL2 0x05)
+ */
 
-#define AW88266A_RMSE_DISABLE                       (0)
-#define AW88266A_RMSE_DISABLE_VALUE                 \
-  (AW88266A_RMSE_DISABLE << AW88266A_RMSE_START_BIT)
-#define AW88266A_RMSE_ENABLE                        (1)
-#define AW88266A_RMSE_ENABLE_VALUE                  \
-  (AW88266A_RMSE_ENABLE << AW88266A_RMSE_START_BIT)
+#define AW88266A_IV2CH_START_BIT                    (15)
+#define AW88266A_IV2CH_BITS_LEN                     (1)
+#define AW88266A_IV2CH_MASK                         \
+  (~(((1 << AW88266A_IV2CH_BITS_LEN) - 1) << AW88266A_IV2CH_START_BIT))
 
-#define AW88266A_RMSE_DEFAULT_VALUE                 (0)
-#define AW88266A_RMSE_DEFAULT                       \
-  (AW88266A_RMSE_DEFAULT_VALUE << AW88266A_RMSE_START_BIT)
+#define AW88266A_IV2CH_LEGACY                       (0)
+#define AW88266A_IV2CH_LEGACY_VALUE                 \
+  (AW88266A_IV2CH_LEGACY << AW88266A_IV2CH_START_BIT)
 
-/* HAGCE bit 6 (SYSCTRL2 0x05) */
+#define AW88266A_IV2CH_SPECIAL                      (1)
+#define AW88266A_IV2CH_SPECIAL_VALUE                \
+  (AW88266A_IV2CH_SPECIAL << AW88266A_IV2CH_START_BIT)
 
-#define AW88266A_HAGCE_START_BIT                    (6)
-#define AW88266A_HAGCE_BITS_LEN                     (1)
-#define AW88266A_HAGCE_MASK                         \
-  (~(((1 << AW88266A_HAGCE_BITS_LEN) - 1) << AW88266A_HAGCE_START_BIT))
+#define AW88266A_IV2CH_DEFAULT_VALUE                (0)
+#define AW88266A_IV2CH_DEFAULT                      \
+  (AW88266A_IV2CH_DEFAULT_VALUE << AW88266A_IV2CH_START_BIT)
 
-#define AW88266A_HAGCE_DISABLE                      (0)
-#define AW88266A_HAGCE_DISABLE_VALUE                \
-  (AW88266A_HAGCE_DISABLE << AW88266A_HAGCE_START_BIT)
-#define AW88266A_HAGCE_ENABLE                       (1)
-#define AW88266A_HAGCE_ENABLE_VALUE                 \
-  (AW88266A_HAGCE_ENABLE << AW88266A_HAGCE_START_BIT)
+/* I2SDOSEL bit 14 (SYSCTRL2 0x05) */
 
-#define AW88266A_HAGCE_DEFAULT_VALUE                (0)
-#define AW88266A_HAGCE_DEFAULT                      \
-  (AW88266A_HAGCE_DEFAULT_VALUE << AW88266A_HAGCE_START_BIT)
+#define AW88266A_I2SDOSEL_START_BIT                 (14)
+#define AW88266A_I2SDOSEL_BITS_LEN                  (1)
+#define AW88266A_I2SDOSEL_MASK                      \
+  (~(((1 << AW88266A_I2SDOSEL_BITS_LEN) - 1) << AW88266A_I2SDOSEL_START_BIT))
 
-/* HDCCE bit 5 (SYSCTRL2 0x05) */
+#define AW88266A_I2SDOSEL_ZEROS                     (0)
+#define AW88266A_I2SDOSEL_ZEROS_VALUE               \
+  (AW88266A_I2SDOSEL_ZEROS << AW88266A_I2SDOSEL_START_BIT)
 
-#define AW88266A_HDCCE_START_BIT                    (5)
-#define AW88266A_HDCCE_BITS_LEN                     (1)
-#define AW88266A_HDCCE_MASK                         \
-  (~(((1 << AW88266A_HDCCE_BITS_LEN) - 1) << AW88266A_HDCCE_START_BIT))
+#define AW88266A_I2SDOSEL_TXDATA                    (1)
+#define AW88266A_I2SDOSEL_TXDATA_VALUE              \
+  (AW88266A_I2SDOSEL_TXDATA << AW88266A_I2SDOSEL_START_BIT)
 
-#define AW88266A_HDCCE_DISABLE                      (0)
-#define AW88266A_HDCCE_DISABLE_VALUE                \
-  (AW88266A_HDCCE_DISABLE << AW88266A_HDCCE_START_BIT)
-#define AW88266A_HDCCE_ENABLE                       (1)
-#define AW88266A_HDCCE_ENABLE_VALUE                 \
-  (AW88266A_HDCCE_ENABLE << AW88266A_HDCCE_START_BIT)
+#define AW88266A_I2SDOSEL_DEFAULT_VALUE             (1)
+#define AW88266A_I2SDOSEL_DEFAULT                   \
+  (AW88266A_I2SDOSEL_DEFAULT_VALUE << AW88266A_I2SDOSEL_START_BIT)
 
-#define AW88266A_HDCCE_DEFAULT_VALUE                (1)
-#define AW88266A_HDCCE_DEFAULT                      \
-  (AW88266A_HDCCE_DEFAULT_VALUE << AW88266A_HDCCE_START_BIT)
+/* DOHZ bit 13 (SYSCTRL2 0x05) */
 
-/* HMUTE bit 4 (SYSCTRL2 0x05) */
+#define AW88266A_DOHZ_START_BIT                     (13)
+#define AW88266A_DOHZ_BITS_LEN                      (1)
+#define AW88266A_DOHZ_MASK                          \
+  (~(((1 << AW88266A_DOHZ_BITS_LEN) - 1) << AW88266A_DOHZ_START_BIT))
 
-#define AW88266A_HMUTE_START_BIT                    (4)
-#define AW88266A_HMUTE_BITS_LEN                     (1)
-#define AW88266A_HMUTE_MASK                         \
-  (~(((1 << AW88266A_HMUTE_BITS_LEN) - 1) << AW88266A_HMUTE_START_BIT))
+#define AW88266A_DOHZ_ALL                           (0)
+#define AW88266A_DOHZ_ALL_VALUE                     \
+  (AW88266A_DOHZ_ALL << AW88266A_DOHZ_START_BIT)
 
-#define AW88266A_HMUTE_DISABLE                      (0)
-#define AW88266A_HMUTE_DISABLE_VALUE                \
-  (AW88266A_HMUTE_DISABLE << AW88266A_HMUTE_START_BIT)
-#define AW88266A_HMUTE_ENABLE                       (1)
-#define AW88266A_HMUTE_ENABLE_VALUE                 \
-  (AW88266A_HMUTE_ENABLE << AW88266A_HMUTE_START_BIT)
+#define AW88266A_DOHZ_HIZ                           (1)
+#define AW88266A_DOHZ_HIZ_VALUE                     \
+  (AW88266A_DOHZ_HIZ << AW88266A_DOHZ_START_BIT)
 
-#define AW88266A_HMUTE_DEFAULT_VALUE                (1)
-#define AW88266A_HMUTE_DEFAULT                      \
-  (AW88266A_HMUTE_DEFAULT_VALUE << AW88266A_HMUTE_START_BIT)
+#define AW88266A_DOHZ_DEFAULT_VALUE                 (1)
+#define AW88266A_DOHZ_DEFAULT                       \
+  (AW88266A_DOHZ_DEFAULT_VALUE << AW88266A_DOHZ_START_BIT)
 
-/* BST_IPEAK bit 3:0 (SYSCTRL2 0x05) */
+/* I2SCHS bit 12 (SYSCTRL2 0x05) */
 
-#define AW88266A_BST_IPEAK_START_BIT                (0)
-#define AW88266A_BST_IPEAK_BITS_LEN                 (4)
-#define AW88266A_BST_IPEAK_MASK                     \
-  (~(((1 << AW88266A_BST_IPEAK_BITS_LEN) - 1) << AW88266A_BST_IPEAK_START_BIT))
+#define AW88266A_I2SCHS_START_BIT                   (12)
+#define AW88266A_I2SCHS_BITS_LEN                    (1)
+#define AW88266A_I2SCHS_MASK                        \
+  (~(((1 << AW88266A_I2SCHS_BITS_LEN) - 1) << AW88266A_I2SCHS_START_BIT))
 
-#define AW88266A_BST_IPEAK_1P5A                     (0)
-#define AW88266A_BST_IPEAK_1P5A_VALUE               \
-  (AW88266A_BST_IPEAK_1P5A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_1P75A                    (1)
-#define AW88266A_BST_IPEAK_1P75A_VALUE              \
-  (AW88266A_BST_IPEAK_1P75A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_2P0A                     (2)
-#define AW88266A_BST_IPEAK_2P0A_VALUE               \
-  (AW88266A_BST_IPEAK_2P0A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_2P25A                    (3)
-#define AW88266A_BST_IPEAK_2P25A_VALUE              \
-  (AW88266A_BST_IPEAK_2P25A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_2P5A                     (4)
-#define AW88266A_BST_IPEAK_2P5A_VALUE               \
-  (AW88266A_BST_IPEAK_2P5A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_2P75A                    (5)
-#define AW88266A_BST_IPEAK_2P75A_VALUE              \
-  (AW88266A_BST_IPEAK_2P75A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_3P0A                     (6)
-#define AW88266A_BST_IPEAK_3P0A_VALUE               \
-  (AW88266A_BST_IPEAK_3P0A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_3P25A                    (7)
-#define AW88266A_BST_IPEAK_3P25A_VALUE              \
-  (AW88266A_BST_IPEAK_3P25A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_3P5A                     (8)
-#define AW88266A_BST_IPEAK_3P5A_VALUE               \
-  (AW88266A_BST_IPEAK_3P5A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_3P75A                    (9)
-#define AW88266A_BST_IPEAK_3P75A_VALUE              \
-  (AW88266A_BST_IPEAK_3P75A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_4A                       (10)
-#define AW88266A_BST_IPEAK_4A_VALUE                 \
-  (AW88266A_BST_IPEAK_4A << AW88266A_BST_IPEAK_START_BIT)
-#define AW88266A_BST_IPEAK_4P25A                    (11)
-#define AW88266A_BST_IPEAK_4P25A_VALUE              \
-  (AW88266A_BST_IPEAK_4P25A << AW88266A_BST_IPEAK_START_BIT)
+#define AW88266A_I2SCHS_LEFT                        (0)
+#define AW88266A_I2SCHS_LEFT_VALUE                  \
+  (AW88266A_I2SCHS_LEFT << AW88266A_I2SCHS_START_BIT)
 
-#define AW88266A_BST_IPEAK_DEFAULT_VALUE            (8)
-#define AW88266A_BST_IPEAK_DEFAULT                  \
-  (AW88266A_BST_IPEAK_DEFAULT_VALUE << AW88266A_BST_IPEAK_START_BIT)
+#define AW88266A_I2SCHS_RIGHT                       (1)
+#define AW88266A_I2SCHS_RIGHT_VALUE                 \
+  (AW88266A_I2SCHS_RIGHT << AW88266A_I2SCHS_START_BIT)
+
+#define AW88266A_I2SCHS_DEFAULT_VALUE               (0)
+#define AW88266A_I2SCHS_DEFAULT                     \
+  (AW88266A_I2SCHS_DEFAULT_VALUE << AW88266A_I2SCHS_START_BIT)
+
+/* INTMODE bit 11 (SYSCTRL2 0x05) */
+
+#define AW88266A_INTMODE_START_BIT                  (11)
+#define AW88266A_INTMODE_BITS_LEN                   (1)
+#define AW88266A_INTMODE_MASK                       \
+  (~(((1 << AW88266A_INTMODE_BITS_LEN) - 1) << AW88266A_INTMODE_START_BIT))
+
+#define AW88266A_INTMODE_OPENMINUS_DRAIN            (0)
+#define AW88266A_INTMODE_OPENMINUS_DRAIN_VALUE      \
+  (AW88266A_INTMODE_OPENMINUS_DRAIN << AW88266A_INTMODE_START_BIT)
+
+#define AW88266A_INTMODE_PUSHPULL                   (1)
+#define AW88266A_INTMODE_PUSHPULL_VALUE             \
+  (AW88266A_INTMODE_PUSHPULL << AW88266A_INTMODE_START_BIT)
+
+#define AW88266A_INTMODE_DEFAULT_VALUE              (0)
+#define AW88266A_INTMODE_DEFAULT                    \
+  (AW88266A_INTMODE_DEFAULT_VALUE << AW88266A_INTMODE_START_BIT)
+
+/* INTN bit 10 (SYSCTRL2 0x05) */
+
+#define AW88266A_INTN_START_BIT                     (10)
+#define AW88266A_INTN_BITS_LEN                      (1)
+#define AW88266A_INTN_MASK                          \
+  (~(((1 << AW88266A_INTN_BITS_LEN) - 1) << AW88266A_INTN_START_BIT))
+
+#define AW88266A_INTN_SYSINT                        (0)
+#define AW88266A_INTN_SYSINT_VALUE                  \
+  (AW88266A_INTN_SYSINT << AW88266A_INTN_START_BIT)
+
+#define AW88266A_INTN_SYSST                         (1)
+#define AW88266A_INTN_SYSST_VALUE                   \
+  (AW88266A_INTN_SYSST << AW88266A_INTN_START_BIT)
+
+#define AW88266A_INTN_DEFAULT_VALUE                 (0)
+#define AW88266A_INTN_DEFAULT                       \
+  (AW88266A_INTN_DEFAULT_VALUE << AW88266A_INTN_START_BIT)
+
+/* VOL bit 9:0 (SYSCTRL2 0x05) */
+
+#define AW88266A_VOL_START_BIT                      (0)
+#define AW88266A_VOL_BITS_LEN                       (10)
+#define AW88266A_VOL_MASK                           \
+  (~(((1 << AW88266A_VOL_BITS_LEN) - 1) << AW88266A_VOL_START_BIT))
+
+#define AW88266A_MUTE_VOL                           (90 * 8)
+#define AW88266A_VOL_STEP_DB                        (6 * 8)
+
+#define AW88266A_VOL_DEFAULT_VALUE                  (0)
+#define AW88266A_VOL_DEFAULT                        \
+  (AW88266A_VOL_DEFAULT_VALUE << AW88266A_VOL_START_BIT)
 
 /* default value of SYSCTRL2 (0x05)
- * #define  AW88266A_SYSCTRL2_DEFAULT (0x0038)
- * I2SCTRL (0x06) detail
- * INPLEV bit 13 (I2SCTRL 0x06)
+ * #define AW88266A_SYSCTRL2_DEFAULT  (0x6000)
  */
 
-#define AW88266A_INPLEV_START_BIT                   (13)
-#define AW88266A_INPLEV_BITS_LEN                    (1)
-#define AW88266A_INPLEV_MASK                        \
-  (~(((1 << AW88266A_INPLEV_BITS_LEN) - 1) << AW88266A_INPLEV_START_BIT))
+/* I2SCTRL1 (0x06) detail
+ * I2SRXEN bit 15 (I2SCTRL1 0x06)
+ */
 
-#define AW88266A_INPLEV_NOT_ATTENUATED              (0)
-#define AW88266A_INPLEV_NOT_ATTENUATED_VALUE        \
-  (AW88266A_INPLEV_NOT_ATTENUATED << AW88266A_INPLEV_START_BIT)
-#define AW88266A_INPLEV_ATTENUATED_MINUS_6DB        (1)
-#define AW88266A_INPLEV_ATTENUATED_MINUS_6DB_VALUE  \
-  (AW88266A_INPLEV_ATTENUATED_MINUS_6DB << AW88266A_INPLEV_START_BIT)
-
-#define AW88266A_INPLEV_DEFAULT_VALUE               (0)
-#define AW88266A_INPLEV_DEFAULT                     \
-  (AW88266A_INPLEV_DEFAULT_VALUE << AW88266A_INPLEV_START_BIT)
-
-/* I2SRXEN bit 12 (I2SCTRL 0x06) */
-
-#define AW88266A_I2SRXEN_START_BIT                  (12)
+#define AW88266A_I2SRXEN_START_BIT                  (15)
 #define AW88266A_I2SRXEN_BITS_LEN                   (1)
 #define AW88266A_I2SRXEN_MASK                       \
   (~(((1 << AW88266A_I2SRXEN_BITS_LEN) - 1) << AW88266A_I2SRXEN_START_BIT))
@@ -1095,7 +1137,53 @@
 #define AW88266A_I2SRXEN_DEFAULT                    \
   (AW88266A_I2SRXEN_DEFAULT_VALUE << AW88266A_I2SRXEN_START_BIT)
 
-/* CHSEL bit 11:10 (I2SCTRL 0x06) */
+/* I2STXEN bit 14 (I2SCTRL1 0x06) */
+
+#define AW88266A_I2STXEN_START_BIT                  (14)
+#define AW88266A_I2STXEN_BITS_LEN                   (1)
+#define AW88266A_I2STXEN_MASK                       \
+  (~(((1 << AW88266A_I2STXEN_BITS_LEN) - 1) << AW88266A_I2STXEN_START_BIT))
+
+#define AW88266A_I2STXEN_DISABLE                    (0)
+#define AW88266A_I2STXEN_DISABLE_VALUE              \
+  (AW88266A_I2STXEN_DISABLE << AW88266A_I2STXEN_START_BIT)
+
+#define AW88266A_I2STXEN_ENABLE                     (1)
+#define AW88266A_I2STXEN_ENABLE_VALUE               \
+  (AW88266A_I2STXEN_ENABLE << AW88266A_I2STXEN_START_BIT)
+
+#define AW88266A_I2STXEN_DEFAULT_VALUE              (0)
+#define AW88266A_I2STXEN_DEFAULT                    \
+  (AW88266A_I2STXEN_DEFAULT_VALUE << AW88266A_I2STXEN_START_BIT)
+
+/* CFSEL bit 13:12 (I2SCTRL1 0x06) */
+
+#define AW88266A_CFSEL_START_BIT                    (12)
+#define AW88266A_CFSEL_BITS_LEN                     (2)
+#define AW88266A_CFSEL_MASK                         \
+  (~(((1 << AW88266A_CFSEL_BITS_LEN) - 1) << AW88266A_CFSEL_START_BIT))
+
+#define AW88266A_CFSEL_HAGC                         (0)
+#define AW88266A_CFSEL_HAGC_VALUE                   \
+  (AW88266A_CFSEL_HAGC << AW88266A_CFSEL_START_BIT)
+
+#define AW88266A_CFSEL_IV                           (1)
+#define AW88266A_CFSEL_IV_VALUE                     \
+  (AW88266A_CFSEL_IV << AW88266A_CFSEL_START_BIT)
+
+#define AW88266A_CFSEL_IVT_IPVT                     (2)
+#define AW88266A_CFSEL_IVT_IPVT_VALUE               \
+  (AW88266A_CFSEL_IVT_IPVT << AW88266A_CFSEL_START_BIT)
+
+#define AW88266A_CFSEL_RESERVED                     (3)
+#define AW88266A_CFSEL_RESERVED_VALUE               \
+  (AW88266A_CFSEL_RESERVED << AW88266A_CFSEL_START_BIT)
+
+#define AW88266A_CFSEL_DEFAULT_VALUE                (0)
+#define AW88266A_CFSEL_DEFAULT                      \
+  (AW88266A_CFSEL_DEFAULT_VALUE << AW88266A_CFSEL_START_BIT)
+
+/* CHSEL bit 11:10 (I2SCTRL1 0x06) */
 
 #define AW88266A_CHSEL_START_BIT                    (10)
 #define AW88266A_CHSEL_BITS_LEN                     (2)
@@ -1105,36 +1193,42 @@
 #define AW88266A_CHSEL_RESERVED                     (0)
 #define AW88266A_CHSEL_RESERVED_VALUE               \
   (AW88266A_CHSEL_RESERVED << AW88266A_CHSEL_START_BIT)
+
 #define AW88266A_CHSEL_LEFT                         (1)
 #define AW88266A_CHSEL_LEFT_VALUE                   \
   (AW88266A_CHSEL_LEFT << AW88266A_CHSEL_START_BIT)
+
 #define AW88266A_CHSEL_RIGHT                        (2)
 #define AW88266A_CHSEL_RIGHT_VALUE                  \
   (AW88266A_CHSEL_RIGHT << AW88266A_CHSEL_START_BIT)
-#define AW88266A_CHSEL_MONO_LR2                     (3)
-#define AW88266A_CHSEL_MONO_LR2_VALUE               \
-  (AW88266A_CHSEL_MONO_LR2 << AW88266A_CHSEL_START_BIT)
+
+#define AW88266A_CHSEL_MONO                         (3)
+#define AW88266A_CHSEL_MONO_VALUE                   \
+  (AW88266A_CHSEL_MONO << AW88266A_CHSEL_START_BIT)
 
 #define AW88266A_CHSEL_DEFAULT_VALUE                (1)
 #define AW88266A_CHSEL_DEFAULT                      \
   (AW88266A_CHSEL_DEFAULT_VALUE << AW88266A_CHSEL_START_BIT)
 
-/* I2SMD bit 9:8 (I2SCTRL 0x06) */
+/* I2SMD bit 9:8 (I2SCTRL1 0x06) */
 
 #define AW88266A_I2SMD_START_BIT                    (8)
 #define AW88266A_I2SMD_BITS_LEN                     (2)
 #define AW88266A_I2SMD_MASK                         \
   (~(((1 << AW88266A_I2SMD_BITS_LEN) - 1) << AW88266A_I2SMD_START_BIT))
 
-#define AW88266A_I2SMD_STANDARD_I2S                 (0)
-#define AW88266A_I2SMD_STANDARD_I2S_VALUE           \
-  (AW88266A_I2SMD_STANDARD_I2S << AW88266A_I2SMD_START_BIT)
+#define AW88266A_I2SMD_PHILIP_STANDARD              (0)
+#define AW88266A_I2SMD_PHILIP_STANDARD_VALUE        \
+  (AW88266A_I2SMD_PHILIP_STANDARD << AW88266A_I2SMD_START_BIT)
+
 #define AW88266A_I2SMD_MSB_JUSTIFIED                (1)
 #define AW88266A_I2SMD_MSB_JUSTIFIED_VALUE          \
   (AW88266A_I2SMD_MSB_JUSTIFIED << AW88266A_I2SMD_START_BIT)
+
 #define AW88266A_I2SMD_LSB_JUSTIFIED                (2)
 #define AW88266A_I2SMD_LSB_JUSTIFIED_VALUE          \
   (AW88266A_I2SMD_LSB_JUSTIFIED << AW88266A_I2SMD_START_BIT)
+
 #define AW88266A_I2SMD_RESERVED                     (3)
 #define AW88266A_I2SMD_RESERVED_VALUE               \
   (AW88266A_I2SMD_RESERVED << AW88266A_I2SMD_START_BIT)
@@ -1143,7 +1237,7 @@
 #define AW88266A_I2SMD_DEFAULT                      \
   (AW88266A_I2SMD_DEFAULT_VALUE << AW88266A_I2SMD_START_BIT)
 
-/* I2SFS bit 7:6 (I2SCTRL 0x06) */
+/* I2SFS bit 7:6 (I2SCTRL1 0x06) */
 
 #define AW88266A_I2SFS_START_BIT                    (6)
 #define AW88266A_I2SFS_BITS_LEN                     (2)
@@ -1167,7 +1261,7 @@
 #define AW88266A_I2SFS_DEFAULT                      \
   (AW88266A_I2SFS_DEFAULT_VALUE << AW88266A_I2SFS_START_BIT)
 
-/* I2SBCK bit 5:4 (I2SCTRL 0x06) */
+/* I2SBCK bit 5:4 (I2SCTRL1 0x06) */
 
 #define AW88266A_I2SBCK_START_BIT                   (4)
 #define AW88266A_I2SBCK_BITS_LEN                    (2)
@@ -1191,78 +1285,138 @@
 #define AW88266A_I2SBCK_DEFAULT			                \
   (AW88266A_I2SBCK_DEFAULT_VALUE<<AW88266A_I2SBCK_START_BIT)
 
-/* I2SSR bit 3:0 (I2SCTRL 0x06) */
+/* I2SSR bit 3:0 (I2SCTRL1 0x06) */
 
 #define AW88266A_I2SSR_START_BIT                    (0)
 #define AW88266A_I2SSR_BITS_LEN                     (4)
 #define AW88266A_I2SSR_MASK                         \
   (~(((1 << AW88266A_I2SSR_BITS_LEN) - 1) << AW88266A_I2SSR_START_BIT))
 
-/* I2S CCO_UMX */
+#define AW88266A_I2SSR_8_KHZ                        (0)
+#define AW88266A_I2SSR_8_KHZ_VALUE                  \
+  (AW88266A_I2SSR_8_KHZ << AW88266A_I2SSR_START_BIT)
 
-#define AW88266A_I2S_CCO_MUX_START_BIT              (14)
-#define AW88266A_I2S_CCO_MUX_BITS_LEN               (1)
-#define AW88266A_I2S_CCO_MUX_MASK                   \
- (~(((1 << AW88266A_I2S_CCO_MUX_BITS_LEN) - 1) << AW88266A_I2S_CCO_MUX_START_BIT))
+#define AW88266A_I2SSR_11_KHZ                       (1)
+#define AW88266A_I2SSR_11_KHZ_VALUE                 \
+  (AW88266A_I2SSR_11_KHZ << AW88266A_I2SSR_START_BIT)
 
-#define AW88266A_I2S_CCO_MUX_8_16_32KHZ_BIT_VALUE   (0)
-#define AW88266A_I2S_CCO_MUX_8_16_32KHZ_VALUE       \
-  (AW88266A_I2S_CCO_MUX_8_16_32KHZ_BIT_VALUE << AW88266A_I2S_CCO_MUX_START_BIT)
+#define AW88266A_I2SSR_12_KHZ                       (2)
+#define AW88266A_I2SSR_12_KHZ_VALUE                 \
+  (AW88266A_I2SSR_12_KHZ << AW88266A_I2SSR_START_BIT)
 
-#define AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_BIT_VALUE (1)
-#define AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_VALUE     \
-  (AW88266A_I2S_CCO_MUX_EXC_8_16_32KHZ_BIT_VALUE <<   \
-  AW88266A_I2S_CCO_MUX_START_BIT)
+#define AW88266A_I2SSR_16_KHZ                       (3)
+#define AW88266A_I2SSR_16_KHZ_VALUE                 \
+  (AW88266A_I2SSR_16_KHZ << AW88266A_I2SSR_START_BIT)
 
-#define AW88266A_I2SSR_8KHZ                         (0)
-#define AW88266A_I2SSR_8KHZ_VALUE                   \
-  (AW88266A_I2SSR_8KHZ << AW88266A_I2SSR_START_BIT)
-#define AW88266A_I2SSR_11P025KHZ                    (1)
-#define AW88266A_I2SSR_11P025KHZ_VALUE              \
-  (AW88266A_I2SSR_11P025KHZ << AW88266A_I2SSR_START_BIT)
-#define AW88266A_I2SSR_12KHZ                        (2)
-#define AW88266A_I2SSR_12KHZ_VALUE                  \
-  (AW88266A_I2SSR_12KHZ << AW88266A_I2SSR_START_BIT)
-#define AW88266A_I2SSR_16KHZ                        (3)
-#define AW88266A_I2SSR_16KHZ_VALUE                  \
-  (AW88266A_I2SSR_16KHZ << AW88266A_I2SSR_START_BIT)
-#define AW88266A_I2SSR_22P05KHZ                     (4)
-#define AW88266A_I2SSR_22P05KHZ_VALUE               \
-  (AW88266A_I2SSR_22P05KHZ << AW88266A_I2SSR_START_BIT)
-#define AW88266A_I2SSR_24KHZ                        (5)
-#define AW88266A_I2SSR_24KHZ_VALUE                  \
-  (AW88266A_I2SSR_24KHZ << AW88266A_I2SSR_START_BIT)
-#define AW88266A_I2SSR_32KHZ                        (6)
-#define AW88266A_I2SSR_32KHZ_VALUE                  \
-  (AW88266A_I2SSR_32KHZ << AW88266A_I2SSR_START_BIT)
-#define AW88266A_I2SSR_44P1KHZ                      (7)
-#define AW88266A_I2SSR_44P1KHZ_VALUE                \
-  (AW88266A_I2SSR_44P1KHZ << AW88266A_I2SSR_START_BIT)
-#define AW88266A_I2SSR_48KHZ                        (8)
-#define AW88266A_I2SSR_48KHZ_VALUE                  \
-  (AW88266A_I2SSR_48KHZ << AW88266A_I2SSR_START_BIT)
-#define AW88266A_I2SSR_96KHZ                        (9)
-#define AW88266A_I2SSR_96KHZ_VALUE                  \
-  (AW88266A_I2SSR_96KHZ << AW88266A_I2SSR_START_BIT)
-#define AW88266A_I2SSR_192KHZ                       (10)
-#define AW88266A_I2SSR_192KHZ_VALUE                 \
-  (AW88266A_I2SSR_192KHZ << AW88266A_I2SSR_START_BIT)
+#define AW88266A_I2SSR_22_KHZ                       (4)
+#define AW88266A_I2SSR_22_KHZ_VALUE                 \
+  (AW88266A_I2SSR_22_KHZ << AW88266A_I2SSR_START_BIT)
+
+#define AW88266A_I2SSR_24_KHZ                       (5)
+#define AW88266A_I2SSR_24_KHZ_VALUE                 \
+  (AW88266A_I2SSR_24_KHZ << AW88266A_I2SSR_START_BIT)
+
+#define AW88266A_I2SSR_32_KHZ                       (6)
+#define AW88266A_I2SSR_32_KHZ_VALUE                 \
+  (AW88266A_I2SSR_32_KHZ << AW88266A_I2SSR_START_BIT)
+
+#define AW88266A_I2SSR_44_KHZ                       (7)
+#define AW88266A_I2SSR_44_KHZ_VALUE                 \
+  (AW88266A_I2SSR_44_KHZ << AW88266A_I2SSR_START_BIT)
+
+#define AW88266A_I2SSR_48_KHZ                       (8)
+#define AW88266A_I2SSR_48_KHZ_VALUE                 \
+  (AW88266A_I2SSR_48_KHZ << AW88266A_I2SSR_START_BIT)
+
+#define AW88266A_I2SSR_96_KHZ                       (9)
+#define AW88266A_I2SSR_96_KHZ_VALUE                 \
+  (AW88266A_I2SSR_96_KHZ << AW88266A_I2SSR_START_BIT)
+
+#define AW88266A_I2SSR_192_KHZ                      (10)
+#define AW88266A_I2SSR_192_KHZ_VALUE                \
+  (AW88266A_I2SSR_192_KHZ << AW88266A_I2SSR_START_BIT)
 
 #define AW88266A_I2SSR_DEFAULT_VALUE                (8)
 #define AW88266A_I2SSR_DEFAULT                      \
   (AW88266A_I2SSR_DEFAULT_VALUE<<AW88266A_I2SSR_START_BIT)
 
-/* default value of I2SCTRL (0x06)
- * #define  AW88266A_I2SCTRL_DEFAULT  (0x14E8)
- * I2SCFG1 (0x07) detail
- * I2S_TX_SLOTVLD bit 13:12 (I2SCFG1 0x07)
+/* default value of I2SCTRL1 (0x06)
+ * #define AW88266A_I2SCTRL1_DEFAULT  (0x84E8)
  */
 
-#define AW88266A_I2S_TX_SLOTVLD_START_BIT           (12)
-#define AW88266A_I2S_TX_SLOTVLD_BITS_LEN            (2)
+/* I2SCTRL2 (0x07) detail
+ * FSYNC_TYPE bit 15 (I2SCTRL2 0x07)
+ */
+
+#define AW88266A_FSYNC_TYPE_START_BIT               (15)
+#define AW88266A_FSYNC_TYPE_BITS_LEN                (1)
+#define AW88266A_FSYNC_TYPE_MASK                    \
+  (~(((1 << AW88266A_FSYNC_TYPE_BITS_LEN) - 1) <<   \
+  AW88266A_FSYNC_TYPE_START_BIT))
+
+#define AW88266A_FSYNC_TYPE_ONEMINUS_SLOT           (0)
+#define AW88266A_FSYNC_TYPE_ONEMINUS_SLOT_VALUE     \
+  (AW88266A_FSYNC_TYPE_ONEMINUS_SLOT << AW88266A_FSYNC_TYPE_START_BIT)
+
+#define AW88266A_FSYNC_TYPE_ONEMINUS_BCK            (1)
+#define AW88266A_FSYNC_TYPE_ONEMINUS_BCK_VALUE      \
+  (AW88266A_FSYNC_TYPE_ONEMINUS_BCK << AW88266A_FSYNC_TYPE_START_BIT)
+
+#define AW88266A_FSYNC_TYPE_DEFAULT_VALUE           (0)
+#define AW88266A_FSYNC_TYPE_DEFAULT                 \
+  (AW88266A_FSYNC_TYPE_DEFAULT_VALUE << AW88266A_FSYNC_TYPE_START_BIT)
+
+/* SLOT_NUM bit 14:12 (I2SCTRL2 0x07) */
+
+#define AW88266A_SLOT_NUM_START_BIT                 (12)
+#define AW88266A_SLOT_NUM_BITS_LEN                  (3)
+#define AW88266A_SLOT_NUM_MASK                      \
+  (~(((1 << AW88266A_SLOT_NUM_BITS_LEN) - 1) << AW88266A_SLOT_NUM_START_BIT))
+
+#define AW88266A_SLOT_NUM_I2S_MODE                  (0)
+#define AW88266A_SLOT_NUM_I2S_MODE_VALUE            \
+  (AW88266A_SLOT_NUM_I2S_MODE << AW88266A_SLOT_NUM_START_BIT)
+
+#define AW88266A_SLOT_NUM_TDM1S                     (1)
+#define AW88266A_SLOT_NUM_TDM1S_VALUE               \
+  (AW88266A_SLOT_NUM_TDM1S << AW88266A_SLOT_NUM_START_BIT)
+
+#define AW88266A_SLOT_NUM_TDM2S                     (2)
+#define AW88266A_SLOT_NUM_TDM2S_VALUE               \
+  (AW88266A_SLOT_NUM_TDM2S << AW88266A_SLOT_NUM_START_BIT)
+
+#define AW88266A_SLOT_NUM_TDM4S                     (3)
+#define AW88266A_SLOT_NUM_TDM4S_VALUE               \
+  (AW88266A_SLOT_NUM_TDM4S << AW88266A_SLOT_NUM_START_BIT)
+
+#define AW88266A_SLOT_NUM_TDM6S                     (4)
+#define AW88266A_SLOT_NUM_TDM6S_VALUE               \
+  (AW88266A_SLOT_NUM_TDM6S << AW88266A_SLOT_NUM_START_BIT)
+
+#define AW88266A_SLOT_NUM_TDM8S                     (5)
+#define AW88266A_SLOT_NUM_TDM8S_VALUE               \
+  (AW88266A_SLOT_NUM_TDM8S << AW88266A_SLOT_NUM_START_BIT)
+
+#define AW88266A_SLOT_NUM_TDM16S                    (6)
+#define AW88266A_SLOT_NUM_TDM16S_VALUE              \
+  (AW88266A_SLOT_NUM_TDM16S << AW88266A_SLOT_NUM_START_BIT)
+
+/* #define AW88266A_SLOT_NUM_TDM16S  (7)
+ * #define AW88266A_SLOT_NUM_TDM16S_VALUE
+ * (AW88266A_SLOT_NUM_TDM16S << AW88266A_SLOT_NUM_START_BIT)
+ */
+
+#define AW88266A_SLOT_NUM_DEFAULT_VALUE             (0)
+#define AW88266A_SLOT_NUM_DEFAULT                   \
+  (AW88266A_SLOT_NUM_DEFAULT_VALUE << AW88266A_SLOT_NUM_START_BIT)
+
+/* I2S_TX_SLOTVLD bit 11:8 (I2SCTRL2 0x07) */
+
+#define AW88266A_I2S_TX_SLOTVLD_START_BIT           (8)
+#define AW88266A_I2S_TX_SLOTVLD_BITS_LEN            (4)
 #define AW88266A_I2S_TX_SLOTVLD_MASK                \
-  (~(((1 << AW88266A_I2S_TX_SLOTVLD_BITS_LEN) - 1) << \
-  AW88266A_I2S_TX_SLOTVLD_START_BIT))
+  (~(((1 << AW88266A_I2S_TX_SLOTVLD_BITS_LEN) - 1)  \
+  << AW88266A_I2S_TX_SLOTVLD_START_BIT))
 
 #define AW88266A_I2S_TX_SLOTVLD_SLOT_0              (0)
 #define AW88266A_I2S_TX_SLOTVLD_SLOT_0_VALUE        \
@@ -1277,299 +1431,224 @@
 #define AW88266A_I2S_TX_SLOTVLD_SLOT_3_VALUE        \
   (AW88266A_I2S_TX_SLOTVLD_SLOT_3 << AW88266A_I2S_TX_SLOTVLD_START_BIT)
 
+#define AW88266A_I2S_TX_SLOTVLD_SLOT_4              (4)
+#define AW88266A_I2S_TX_SLOTVLD_SLOT_4_VALUE        \
+  (AW88266A_I2S_TX_SLOTVLD_SLOT_4 << AW88266A_I2S_TX_SLOTVLD_START_BIT)
+
+#define AW88266A_I2S_TX_SLOTVLD_SLOT_5              (5)
+#define AW88266A_I2S_TX_SLOTVLD_SLOT_5_VALUE        \
+  (AW88266A_I2S_TX_SLOTVLD_SLOT_5 << AW88266A_I2S_TX_SLOTVLD_START_BIT)
+
+#define AW88266A_I2S_TX_SLOTVLD_SLOT_6              (6)
+#define AW88266A_I2S_TX_SLOTVLD_SLOT_6_VALUE        \
+  (AW88266A_I2S_TX_SLOTVLD_SLOT_6 << AW88266A_I2S_TX_SLOTVLD_START_BIT)
+
+#define AW88266A_I2S_TX_SLOTVLD_SLOT_15             (15)
+#define AW88266A_I2S_TX_SLOTVLD_SLOT_15_VALUE       \
+  (AW88266A_I2S_TX_SLOTVLD_SLOT_15 << AW88266A_I2S_TX_SLOTVLD_START_BIT)
+
 #define AW88266A_I2S_TX_SLOTVLD_DEFAULT_VALUE       (0)
 #define AW88266A_I2S_TX_SLOTVLD_DEFAULT             \
   (AW88266A_I2S_TX_SLOTVLD_DEFAULT_VALUE << AW88266A_I2S_TX_SLOTVLD_START_BIT)
 
-/* I2S_RX_SLOTVLD bit 11:8 (I2SCFG1 0x07) */
+/* I2S_RXR_SLOTVLD bit 7:4 (I2SCTRL2 0x07) */
 
-#define AW88266A_I2S_RX_SLOTVLD_START_BIT           (8)
-#define AW88266A_I2S_RX_SLOTVLD_BITS_LEN            (4)
-#define AW88266A_I2S_RX_SLOTVLD_MASK                \
-  (~(((1 << AW88266A_I2S_RX_SLOTVLD_BITS_LEN) - 1) << \
-  AW88266A_I2S_RX_SLOTVLD_START_BIT))
+#define AW88266A_I2S_RXR_SLOTVLD_START_BIT          (4)
+#define AW88266A_I2S_RXR_SLOTVLD_BITS_LEN           (4)
+#define AW88266A_I2S_RXR_SLOTVLD_MASK               \
+  (~(((1 << AW88266A_I2S_RXR_SLOTVLD_BITS_LEN) - 1) \
+  << AW88266A_I2S_RXR_SLOTVLD_START_BIT))
 
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_0_AND_1       (3)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_0_AND_1_VALUE \
-  (AW88266A_I2S_RX_SLOTVLD_SLOTS_0_AND_1 <<         \
-  AW88266A_I2S_RX_SLOTVLD_START_BIT)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_0_AND_2       (5)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_0_AND_2_VALUE \
-  (AW88266A_I2S_RX_SLOTVLD_SLOTS_0_AND_2 <<         \
-  AW88266A_I2S_RX_SLOTVLD_START_BIT)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_1_AND_2       (6)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_1_AND_2_VALUE \
-  (AW88266A_I2S_RX_SLOTVLD_SLOTS_1_AND_2 <<         \
-  AW88266A_I2S_RX_SLOTVLD_START_BIT)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_0_AND_3       (9)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_0_AND_3_VALUE \
-  (AW88266A_I2S_RX_SLOTVLD_SLOTS_0_AND_3 <<         \
-  AW88266A_I2S_RX_SLOTVLD_START_BIT)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_1_AND_3       (10)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_1_AND_3_VALUE \
-  (AW88266A_I2S_RX_SLOTVLD_SLOTS_1_AND_3 <<         \
-  AW88266A_I2S_RX_SLOTVLD_START_BIT)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_2_AND_3       (12)
-#define AW88266A_I2S_RX_SLOTVLD_SLOTS_2_AND_3_VALUE \
-  (AW88266A_I2S_RX_SLOTVLD_SLOTS_2_AND_3 <<         \
-  AW88266A_I2S_RX_SLOTVLD_START_BIT)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_0             (0)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_0_VALUE       \
+  (AW88266A_I2S_RXR_SLOTVLD_SLOT_0 << AW88266A_I2S_RXR_SLOTVLD_START_BIT)
 
-#define AW88266A_I2S_RX_SLOTVLD_DEFAULT_VALUE       (3)
-#define AW88266A_I2S_RX_SLOTVLD_DEFAULT             \
-  (AW88266A_I2S_RX_SLOTVLD_DEFAULT_VALUE <<         \
-  AW88266A_I2S_RX_SLOTVLD_START_BIT)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_1             (1)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_1_VALUE       \
+  (AW88266A_I2S_RXR_SLOTVLD_SLOT_1 << AW88266A_I2S_RXR_SLOTVLD_START_BIT)
 
-/* CFSEL bit 7:6 (I2SCFG1 0x07) */
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_2             (2)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_2_VALUE       \
+  (AW88266A_I2S_RXR_SLOTVLD_SLOT_2 << AW88266A_I2S_RXR_SLOTVLD_START_BIT)
 
-#define AW88266A_CFSEL_START_BIT                    (6)
-#define AW88266A_CFSEL_BITS_LEN                     (2)
-#define AW88266A_CFSEL_MASK                         \
-  (~(((1 << AW88266A_CFSEL_BITS_LEN) - 1) << AW88266A_CFSEL_START_BIT))
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_3             (3)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_3_VALUE       \
+  (AW88266A_I2S_RXR_SLOTVLD_SLOT_3 << AW88266A_I2S_RXR_SLOTVLD_START_BIT)
 
-#define AW88266A_CFSEL_HAGC_DATA                    (0)
-#define AW88266A_CFSEL_HAGC_DATA_VALUE              \
-  (AW88266A_CFSEL_HAGC_DATA << AW88266A_CFSEL_START_BIT)
-#define AW88266A_CFSEL_IV_SENSE_DATA                (1)
-#define AW88266A_CFSEL_IV_SENSE_DATA_VALUE          \
-  (AW88266A_CFSEL_IV_SENSE_DATA << AW88266A_CFSEL_START_BIT)
-#define AW88266A_CFSEL_IVT_DATA_MAPPING_ACCORDING_TO_I2S_AUDIO_RES        (2)
-#define AW88266A_CFSEL_IVT_DATA_MAPPING_ACCORDING_TO_I2S_AUDIO_RES_VALUE  \
-  (AW88266A_CFSEL_IVT_DATA_MAPPING_ACCORDING_TO_I2S_AUDIO_RES <<          \
-  AW88266A_CFSEL_START_BIT)
-#define AW88266A_CFSEL_IVT_DATA_MAPPING_AS__I_PVDD_VBAT_V_T_SYNC          (3)
-#define AW88266A_CFSEL_IVT_DATA_MAPPING_AS__I_PVDD_VBAT_V_T_SYNC_VALUE    \
-  (AW88266A_CFSEL_IVT_DATA_MAPPING_AS__I_PVDD_VBAT_V_T_SYNC <<            \
-  AW88266A_CFSEL_START_BIT)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_4             (4)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_4_VALUE       \
+  (AW88266A_I2S_RXR_SLOTVLD_SLOT_4 << AW88266A_I2S_RXR_SLOTVLD_START_BIT)
 
-#define AW88266A_CFSEL_DEFAULT_VALUE                (0)
-#define AW88266A_CFSEL_DEFAULT                      \
-  (AW88266A_CFSEL_DEFAULT_VALUE << AW88266A_CFSEL_START_BIT)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_5             (5)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_5_VALUE       \
+  (AW88266A_I2S_RXR_SLOTVLD_SLOT_5 << AW88266A_I2S_RXR_SLOTVLD_START_BIT)
 
-/* DRVSTREN bit 5 (I2SCFG1 0x07) */
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_6             (6)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_6_VALUE       \
+  (AW88266A_I2S_RXR_SLOTVLD_SLOT_6 << AW88266A_I2S_RXR_SLOTVLD_START_BIT)
 
-#define AW88266A_DRVSTREN_START_BIT                 (5)
-#define AW88266A_DRVSTREN_BITS_LEN                  (1)
-#define AW88266A_DRVSTREN_MASK                      \
-  (~(((1 << AW88266A_DRVSTREN_BITS_LEN) - 1) << AW88266A_DRVSTREN_START_BIT))
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_15            (15)
+#define AW88266A_I2S_RXR_SLOTVLD_SLOT_15_VALUE      \
+  (AW88266A_I2S_RXR_SLOTVLD_SLOT_15 << AW88266A_I2S_RXR_SLOTVLD_START_BIT)
 
-#define AW88266A_DRVSTREN_2MA                       (0)
-#define AW88266A_DRVSTREN_2MA_VALUE                 \
-  (AW88266A_DRVSTREN_2MA << AW88266A_DRVSTREN_START_BIT)
-#define AW88266A_DRVSTREN_8MA                       (1)
-#define AW88266A_DRVSTREN_8MA_VALUE                 \
-  (AW88266A_DRVSTREN_8MA << AW88266A_DRVSTREN_START_BIT)
+#define AW88266A_I2S_RXR_SLOTVLD_DEFAULT_VALUE      (1)
+#define AW88266A_I2S_RXR_SLOTVLD_DEFAULT            \
+  (AW88266A_I2S_RXR_SLOTVLD_DEFAULT_VALUE << AW88266A_I2S_RXR_SLOTVLD_START_BIT)
 
-#define AW88266A_DRVSTREN_DEFAULT_VALUE             (1)
-#define AW88266A_DRVSTREN_DEFAULT                   \
-  (AW88266A_DRVSTREN_DEFAULT_VALUE << AW88266A_DRVSTREN_START_BIT)
+/* I2S_RXL_SLOTVLD bit 3:0 (I2SCTRL2 0x07) */
 
-/* DOHZ bit 4 (I2SCFG1 0x07) */
+#define AW88266A_I2S_RXL_SLOTVLD_START_BIT          (0)
+#define AW88266A_I2S_RXL_SLOTVLD_BITS_LEN           (4)
+#define AW88266A_I2S_RXL_SLOTVLD_MASK               \
+  (~(((1 << AW88266A_I2S_RXL_SLOTVLD_BITS_LEN) - 1) \
+  << AW88266A_I2S_RXL_SLOTVLD_START_BIT))
 
-#define AW88266A_DOHZ_START_BIT                     (4)
-#define AW88266A_DOHZ_BITS_LEN                      (1)
-#define AW88266A_DOHZ_MASK                          \
-  (~(((1 << AW88266A_DOHZ_BITS_LEN) - 1) << AW88266A_DOHZ_START_BIT))
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_0             (0)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_0_VALUE       \
+  (AW88266A_I2S_RXL_SLOTVLD_SLOT_0 << AW88266A_I2S_RXL_SLOTVLD_START_BIT)
 
-#define AW88266A_DOHZ_ALL_AVAILABLE                 (0)
-#define AW88266A_DOHZ_ALL_AVAILABLE_VALUE           \
-  (AW88266A_DOHZ_ALL_AVAILABLE << AW88266A_DOHZ_START_BIT)
-#define AW88266A_DOHZ_HIZ                           (1)
-#define AW88266A_DOHZ_HIZ_VALUE                     \
-  (AW88266A_DOHZ_HIZ << AW88266A_DOHZ_START_BIT)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_1             (1)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_1_VALUE       \
+  (AW88266A_I2S_RXL_SLOTVLD_SLOT_1 << AW88266A_I2S_RXL_SLOTVLD_START_BIT)
 
-#define AW88266A_DOHZ_DEFAULT_VALUE                 (1)
-#define AW88266A_DOHZ_DEFAULT                       \
-  (AW88266A_DOHZ_DEFAULT_VALUE << AW88266A_DOHZ_START_BIT)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_2             (2)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_2_VALUE       \
+  (AW88266A_I2S_RXL_SLOTVLD_SLOT_2 << AW88266A_I2S_RXL_SLOTVLD_START_BIT)
 
-/* FSYNC_TYPE bit 3 (I2SCFG1 0x07) */
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_3             (3)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_3_VALUE       \
+  (AW88266A_I2S_RXL_SLOTVLD_SLOT_3 << AW88266A_I2S_RXL_SLOTVLD_START_BIT)
 
-#define AW88266A_FSYNC_TYPE_START_BIT               (3)
-#define AW88266A_FSYNC_TYPE_BITS_LEN                (1)
-#define AW88266A_FSYNC_TYPE_MASK                    \
-  (~(((1 << AW88266A_FSYNC_TYPE_BITS_LEN) - 1) << AW88266A_FSYNC_TYPE_START_BIT))
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_4             (4)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_4_VALUE       \
+  (AW88266A_I2S_RXL_SLOTVLD_SLOT_4 << AW88266A_I2S_RXL_SLOTVLD_START_BIT)
 
-#define AW88266A_FSYNC_TYPE_ONE_SLOT                (0)
-#define AW88266A_FSYNC_TYPE_ONE_SLOT_VALUE          \
-  (AW88266A_FSYNC_TYPE_ONE_SLOT << AW88266A_FSYNC_TYPE_START_BIT)
-#define AW88266A_FSYNC_TYPE_ONE_BCK                 (1)
-#define AW88266A_FSYNC_TYPE_ONE_BCK_VALUE           \
-  (AW88266A_FSYNC_TYPE_ONE_BCK << AW88266A_FSYNC_TYPE_START_BIT)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_5             (5)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_5_VALUE       \
+  (AW88266A_I2S_RXL_SLOTVLD_SLOT_5 << AW88266A_I2S_RXL_SLOTVLD_START_BIT)
 
-#define AW88266A_FSYNC_TYPE_DEFAULT_VALUE           (0)
-#define AW88266A_FSYNC_TYPE_DEFAULT                 \
-  (AW88266A_FSYNC_TYPE_DEFAULT_VALUE << AW88266A_FSYNC_TYPE_START_BIT)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_6             (6)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_6_VALUE       \
+  (AW88266A_I2S_RXL_SLOTVLD_SLOT_6 << AW88266A_I2S_RXL_SLOTVLD_START_BIT)
 
-/* SLOT_NUM bit 2 (I2SCFG1 0x07) */
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_15            (15)
+#define AW88266A_I2S_RXL_SLOTVLD_SLOT_15_VALUE      \
+  (AW88266A_I2S_RXL_SLOTVLD_SLOT_15 << AW88266A_I2S_RXL_SLOTVLD_START_BIT)
 
-#define AW88266A_SLOT_NUM_START_BIT                 (2)
-#define AW88266A_SLOT_NUM_BITS_LEN                  (1)
-#define AW88266A_SLOT_NUM_MASK                      \
-  (~(((1 << AW88266A_SLOT_NUM_BITS_LEN) - 1) << AW88266A_SLOT_NUM_START_BIT))
+#define AW88266A_I2S_RXL_SLOTVLD_DEFAULT_VALUE      (0)
+#define AW88266A_I2S_RXL_SLOTVLD_DEFAULT            \
+  (AW88266A_I2S_RXL_SLOTVLD_DEFAULT_VALUE <<        \
+  AW88266A_I2S_RXL_SLOTVLD_START_BIT)
 
-#define AW88266A_SLOT_NUM_2_SLOTS                   (0)
-#define AW88266A_SLOT_NUM_2_SLOTS_VALUE             \
-  (AW88266A_SLOT_NUM_2_SLOTS << AW88266A_SLOT_NUM_START_BIT)
-#define AW88266A_SLOT_NUM_4_SLOTS                   (1)
-#define AW88266A_SLOT_NUM_4_SLOTS_VALUE             \
-  (AW88266A_SLOT_NUM_4_SLOTS << AW88266A_SLOT_NUM_START_BIT)
-
-#define AW88266A_SLOT_NUM_DEFAULT_VALUE             (0)
-#define AW88266A_SLOT_NUM_DEFAULT                   \
-  (AW88266A_SLOT_NUM_DEFAULT_VALUE << AW88266A_SLOT_NUM_START_BIT)
-
-/* I2SCHS bit 1 (I2SCFG1 0x07) */
-
-#define AW88266A_I2SCHS_START_BIT                   (1)
-#define AW88266A_I2SCHS_BITS_LEN                    (1)
-#define AW88266A_I2SCHS_MASK                        \
-  (~(((1 << AW88266A_I2SCHS_BITS_LEN) - 1) << AW88266A_I2SCHS_START_BIT))
-
-#define AW88266A_I2SCHS_LEFT_CHANNEL                (0)
-#define AW88266A_I2SCHS_LEFT_CHANNEL_VALUE          \
-  (AW88266A_I2SCHS_LEFT_CHANNEL << AW88266A_I2SCHS_START_BIT)
-#define AW88266A_I2SCHS_RIGHT_CHANNEL               (1)
-#define AW88266A_I2SCHS_RIGHT_CHANNEL_VALUE         \
-  (AW88266A_I2SCHS_RIGHT_CHANNEL << AW88266A_I2SCHS_START_BIT)
-
-#define AW88266A_I2SCHS_DEFAULT_VALUE               (0)
-#define AW88266A_I2SCHS_DEFAULT                     \
-  (AW88266A_I2SCHS_DEFAULT_VALUE << AW88266A_I2SCHS_START_BIT)
-
-/* I2STXEN bit 0 (I2SCFG1 0x07) */
-
-#define AW88266A_I2STXEN_START_BIT                  (0)
-#define AW88266A_I2STXEN_BITS_LEN                   (1)
-#define AW88266A_I2STXEN_MASK                       \
-  (~(((1 << AW88266A_I2STXEN_BITS_LEN) - 1) << AW88266A_I2STXEN_START_BIT))
-
-#define AW88266A_I2STXEN_DISABLE                    (0)
-#define AW88266A_I2STXEN_DISABLE_VALUE              \
-  (AW88266A_I2STXEN_DISABLE << AW88266A_I2STXEN_START_BIT)
-#define AW88266A_I2STXEN_ENABLE                     (1)
-#define AW88266A_I2STXEN_ENABLE_VALUE               \
-  (AW88266A_I2STXEN_ENABLE << AW88266A_I2STXEN_START_BIT)
-
-#define AW88266A_I2STXEN_DEFAULT_VALUE              (0)
-#define AW88266A_I2STXEN_DEFAULT                    \
-  (AW88266A_I2STXEN_DEFAULT_VALUE << AW88266A_I2STXEN_START_BIT)
-
-/* default value of I2SCFG1 (0x07)
- * #define  AW88266A_I2SCFG1_DEFAULT (0x0330)
- * I2SCFG2 (0x08) detail
- * RX_FLS bit 15 (I2SCFG2 0x08)
+/* default value of I2SCTRL2 (0x07)
+ * #define AW88266A_I2SCTRL2_DEFAULT  (0x0010)
  */
 
-#define AW88266A_RX_FLS_START_BIT                   (15)
-#define AW88266A_RX_FLS_BITS_LEN                    (1)
-#define AW88266A_RX_FLS_MASK                        \
-  (~(((1 << AW88266A_RX_FLS_BITS_LEN) - 1) << AW88266A_RX_FLS_START_BIT))
-
-#define AW88266A_RX_FLS_NORMAL_WORK_MODE            (0)
-#define AW88266A_RX_FLS_NORMAL_WORK_MODE_VALUE      \
-  (AW88266A_RX_FLS_NORMAL_WORK_MODE << AW88266A_RX_FLS_START_BIT)
-#define AW88266A_RX_FLS_FLUSH_FIFO                  (1)
-#define AW88266A_RX_FLS_FLUSH_FIFO_VALUE            \
-  (AW88266A_RX_FLS_FLUSH_FIFO << AW88266A_RX_FLS_START_BIT)
-
-#define AW88266A_RX_FLS_DEFAULT_VALUE               (0)
-#define AW88266A_RX_FLS_DEFAULT                     \
-  (AW88266A_RX_FLS_DEFAULT_VALUE << AW88266A_RX_FLS_START_BIT)
-
-/* RX_THRS bit 13:12 (I2SCFG2 0x08) */
-
-#define AW88266A_RX_THRS_START_BIT                  (12)
-#define AW88266A_RX_THRS_BITS_LEN                   (2)
-#define AW88266A_RX_THRS_MASK                       \
-  (~(((1 << AW88266A_RX_THRS_BITS_LEN) - 1) << AW88266A_RX_THRS_START_BIT))
-
-#define AW88266A_RX_THRS_DEFAULT_VALUE              (2)
-#define AW88266A_RX_THRS_DEFAULT                    \
-  (AW88266A_RX_THRS_DEFAULT_VALUE << AW88266A_RX_THRS_START_BIT)
-
-/* TX_FLS bit 11 (I2SCFG2 0x08) */
-
-#define AW88266A_TX_FLS_START_BIT                   (11)
-#define AW88266A_TX_FLS_BITS_LEN                    (1)
-#define AW88266A_TX_FLS_MASK                        \
- (~(((1 << AW88266A_TX_FLS_BITS_LEN) - 1) << AW88266A_TX_FLS_START_BIT))
-
-#define AW88266A_TX_FLS_NORMAL_WORK_MODE            (0)
-#define AW88266A_TX_FLS_NORMAL_WORK_MODE_VALUE      \
-  (AW88266A_TX_FLS_NORMAL_WORK_MODE << AW88266A_TX_FLS_START_BIT)
-#define AW88266A_TX_FLS_FLUSH_FIFO                  (1)
-#define AW88266A_TX_FLS_FLUSH_FIFO_VALUE            \
-  (AW88266A_TX_FLS_FLUSH_FIFO << AW88266A_TX_FLS_START_BIT)
-
-#define AW88266A_TX_FLS_DEFAULT_VALUE               (0)
-#define AW88266A_TX_FLS_DEFAULT                     \
-  (AW88266A_TX_FLS_DEFAULT_VALUE << AW88266A_TX_FLS_START_BIT)
-
-/* TX_THRS bit 9:8 (I2SCFG2 0x08) */
-
-#define AW88266A_TX_THRS_START_BIT                  (8)
-#define AW88266A_TX_THRS_BITS_LEN                   (2)
-#define AW88266A_TX_THRS_MASK                       \
-  (~(((1 << AW88266A_TX_THRS_BITS_LEN) - 1) << AW88266A_TX_THRS_START_BIT))
-
-#define AW88266A_TX_THRS_DEFAULT_VALUE              (1)
-#define AW88266A_TX_THRS_DEFAULT                    \
-  (AW88266A_TX_THRS_DEFAULT_VALUE << AW88266A_TX_THRS_START_BIT)
-
-/* VDSEL bit 3 (I2SCFG2 0x08) */
-
-#define AW88266A_VDSEL_START_BIT                    (3)
-#define AW88266A_VDSEL_BITS_LEN                     (1)
-#define AW88266A_VDSEL_MASK                         \
-  (~(((1 << AW88266A_VDSEL_BITS_LEN) - 1) << AW88266A_VDSEL_START_BIT))
-
-#define AW88266A_VDSEL_DAC_DATA                     (0)
-#define AW88266A_VDSEL_DAC_DATA_VALUE               \
-  (AW88266A_VDSEL_DAC_DATA << AW88266A_VDSEL_START_BIT)
-#define AW88266A_VDSEL_VSENSE_DATA                  (1)
-#define AW88266A_VDSEL_VSENSE_DATA_VALUE            \
-  (AW88266A_VDSEL_VSENSE_DATA << AW88266A_VDSEL_START_BIT)
-
-#define AW88266A_VDSEL_DEFAULT_VALUE                (0)
-#define AW88266A_VDSEL_DEFAULT                      \
-  (AW88266A_VDSEL_DEFAULT_VALUE << AW88266A_VDSEL_START_BIT)
-
-/* IV2CH bit 2 (I2SCFG2 0x08) */
-
-#define AW88266A_IV2CH_START_BIT                    (2)
-#define AW88266A_IV2CH_BITS_LEN                     (1)
-#define AW88266A_IV2CH_MASK                         \
-  (~(((1 << AW88266A_IV2CH_BITS_LEN) - 1) << AW88266A_IV2CH_START_BIT))
-
-#define AW88266A_IV2CH_LEGACY_MODE                  (0)
-#define AW88266A_IV2CH_LEGACY_MODE_VALUE            \
-  (AW88266A_IV2CH_LEGACY_MODE << AW88266A_IV2CH_START_BIT)
-#define AW88266A_IV2CH_16BITS_PER_CHANNEL           (1)
-#define AW88266A_IV2CH_16BITS_PER_CHANNEL_VALUE     \
-  (AW88266A_IV2CH_16BITS_PER_CHANNEL << AW88266A_IV2CH_START_BIT)
-
-#define AW88266A_IV2CH_DEFAULT_VALUE                (0)
-#define AW88266A_IV2CH_DEFAULT                      \
-  (AW88266A_IV2CH_DEFAULT_VALUE << AW88266A_IV2CH_START_BIT)
-
-/* default value of I2SCFG2 (0x08)
- * #define  AW88266A_I2SCFG2_DEFAULT (0x2100)
- * HAGCCFG4 (0x0C) detail
- * VOL bit 15:8 (HAGCCFG4 0x0C)
+/* DACCFG1 (0x08) detail
+ * RVTH bit 15:8 (DACCFG1 0x08)
  */
 
-#define AW88266A_VOL_START_BIT                      (0)
-#define AW88266A_VOL_BITS_LEN                       (10)
-#define AW88266A_VOL_MASK                           \
-  (~(((1 << AW88266A_VOL_BITS_LEN) - 1) << AW88266A_VOL_START_BIT))
+#define AW88266A_RVTH_START_BIT                     (8)
+#define AW88266A_RVTH_BITS_LEN                      (8)
+#define AW88266A_RVTH_MASK                          \
+  (~(((1 << AW88266A_RVTH_BITS_LEN) - 1) << AW88266A_RVTH_START_BIT))
 
-#define AW88266A_VOLUME_MAX                         (0)
-#define AW88266A_VOLUME_MIN                         (-255)
+#define AW88266A_RVTH_DEFAULT_VALUE                 (0x39)
+#define AW88266A_RVTH_DEFAULT                       \
+  (AW88266A_RVTH_DEFAULT_VALUE << AW88266A_RVTH_START_BIT)
 
-#define AW88266A_VOL_DEFAULT_VALUE                  (0)
-#define AW88266A_VOL_DEFAULT                        \
-  (AW88266A_VOL_DEFAULT_VALUE << AW88266A_VOL_START_BIT)
+/* AVTH bit 7:0 (DACCFG1 0x08) */
 
-/* HOLDTH bit 7:0 (HAGCCFG4 0x0C) */
+#define AW88266A_AVTH_START_BIT                     (0)
+#define AW88266A_AVTH_BITS_LEN                      (8)
+#define AW88266A_AVTH_MASK                          \
+  (~(((1 << AW88266A_AVTH_BITS_LEN) - 1) << AW88266A_AVTH_START_BIT))
+
+#define AW88266A_AVTH_DEFAULT_VALUE                 (0x40)
+#define AW88266A_AVTH_DEFAULT                       \
+  (AW88266A_AVTH_DEFAULT_VALUE << AW88266A_AVTH_START_BIT)
+
+/* default value of DACCFG1 (0x08)
+ * #define AW88266A_DACCFG1_DEFAULT (0x3940)
+ */
+
+/* DACCFG2 (0x09) detail
+ * ATTH bit 15:0 (DACCFG2 0x09)
+ */
+
+#define AW88266A_ATTH_START_BIT                     (0)
+#define AW88266A_ATTH_BITS_LEN                      (16)
+#define AW88266A_ATTH_MASK                          \
+  (~(((1 << AW88266A_ATTH_BITS_LEN) - 1) << AW88266A_ATTH_START_BIT))
+
+#define AW88266A_ATTH_RESERVED                      (0)
+#define AW88266A_ATTH_RESERVED_VALUE                \
+  (AW88266A_ATTH_RESERVED << AW88266A_ATTH_START_BIT)
+
+#define AW88266A_ATTH_DEFAULT_VALUE                 (0x0030)
+#define AW88266A_ATTH_DEFAULT                       \
+  (AW88266A_ATTH_DEFAULT_VALUE << AW88266A_ATTH_START_BIT)
+
+/* default value of DACCFG2 (0x09)
+ * #define AW88266A_DACCFG2_DEFAULT (0x0030)
+ */
+
+/* DACCFG3 (0x0A) detail
+ * RTTH bit 15:0 (DACCFG3 0x0A)
+ */
+
+#define AW88266A_RTTH_START_BIT                     (0)
+#define AW88266A_RTTH_BITS_LEN                      (16)
+#define AW88266A_RTTH_MASK                          \
+  (~(((1 << AW88266A_RTTH_BITS_LEN) - 1) << AW88266A_RTTH_START_BIT))
+
+#define AW88266A_RTTH_RESERVED                      (0)
+#define AW88266A_RTTH_RESERVED_VALUE                \
+  (AW88266A_RTTH_RESERVED << AW88266A_RTTH_START_BIT)
+
+#define AW88266A_RTTH_DEFAULT_VALUE                 (0x01E0)
+#define AW88266A_RTTH_DEFAULT                       \
+  (AW88266A_RTTH_DEFAULT_VALUE << AW88266A_RTTH_START_BIT)
+
+/* default value of DACCFG3 (0x0A)
+ * #define AW88266A_DACCFG3_DEFAULT (0x01E0)
+ */
+
+/* DACCFG4 (0x0B) detail
+ * IIC_GEN_ADDR bit 15:9 (DACCFG4 0x0B)
+ */
+
+#define AW88266A_IIC_GEN_ADDR_START_BIT             (9)
+#define AW88266A_IIC_GEN_ADDR_BITS_LEN              (7)
+#define AW88266A_IIC_GEN_ADDR_MASK                  \
+  (~(((1 << AW88266A_IIC_GEN_ADDR_BITS_LEN) - 1) << \
+  AW88266A_IIC_GEN_ADDR_START_BIT))
+
+#define AW88266A_IIC_GEN_ADDR_DEFAULT_VALUE         (0x0E)
+#define AW88266A_IIC_GEN_ADDR_DEFAULT               \
+  (AW88266A_IIC_GEN_ADDR_DEFAULT_VALUE << AW88266A_IIC_GEN_ADDR_START_BIT)
+
+/* IIC_GEN_EN bit 8 (DACCFG4 0x0B) */
+
+#define AW88266A_IIC_GEN_EN_START_BIT               (8)
+#define AW88266A_IIC_GEN_EN_BITS_LEN                (1)
+#define AW88266A_IIC_GEN_EN_MASK                    \
+ (~(((1 << AW88266A_IIC_GEN_EN_BITS_LEN) - 1) <<    \
+ AW88266A_IIC_GEN_EN_START_BIT))
+
+#define AW88266A_IIC_GEN_EN_DISABLE                 (0)
+#define AW88266A_IIC_GEN_EN_DISABLE_VALUE           \
+  (AW88266A_IIC_GEN_EN_DISABLE << AW88266A_IIC_GEN_EN_START_BIT)
+
+#define AW88266A_IIC_GEN_EN_ENABLE                  (1)
+#define AW88266A_IIC_GEN_EN_ENABLE_VALUE            \
+  (AW88266A_IIC_GEN_EN_ENABLE << AW88266A_IIC_GEN_EN_START_BIT)
+
+#define AW88266A_IIC_GEN_EN_DEFAULT_VALUE           (0)
+#define AW88266A_IIC_GEN_EN_DEFAULT                 \
+  (AW88266A_IIC_GEN_EN_DEFAULT_VALUE << AW88266A_IIC_GEN_EN_START_BIT)
+
+/* HOLDTH bit 7:0 (DACCFG4 0x0B) */
 
 #define AW88266A_HOLDTH_START_BIT                   (0)
 #define AW88266A_HOLDTH_BITS_LEN                    (8)
@@ -1584,22 +1663,549 @@
 #define AW88266A_HOLDTH_DEFAULT                     \
   (AW88266A_HOLDTH_DEFAULT_VALUE << AW88266A_HOLDTH_START_BIT)
 
-/* default value of HAGCCFG4 (0x0C)
- * #define  AW88266A_HAGCCFG4_DEFAULT (0x0064)
- * #define  AW88266A_TESTDET_DEFAULT (0x0000)
+/* default value of DACCFG4 (0x0B)
+ * #define AW88266A_DACCFG4_DEFAULT (0x1C64)
  */
 
-#define AW88266A_EF_VSN_GESLP_MASK                  (0x03ff)
-#define AW88266A_EF_VSN_GESLP_SIGN_MASK             (0x0200)
-#define AW88266A_EF_VSN_GESLP_NEG                   (0xfc00)
+/* DACST (0x20) detail
+ * SET_GAIN_ST bit 10:8 (DACST 0x20)
+ */
 
-#define AW88266A_EF_ISN_GESLP_MASK                  (0x03ff)
-#define AW88266A_EF_ISN_GESLP_SIGN_MASK             (0x0200)
-#define AW88266A_EF_ISN_GESLP_NEG                   (0xfc00)
+#define AW88266A_SET_GAIN_ST_START_BIT              (8)
+#define AW88266A_SET_GAIN_ST_BITS_LEN               (3)
+#define AW88266A_SET_GAIN_ST_MASK                   \
+  (~(((1 << AW88266A_SET_GAIN_ST_BITS_LEN) - 1) <<  \
+  AW88266A_SET_GAIN_ST_START_BIT))
+
+#define AW88266A_SET_GAIN_ST_4P5_AV                 (0)
+#define AW88266A_SET_GAIN_ST_4P5_AV_VALUE           \
+  (AW88266A_SET_GAIN_ST_4P5_AV << AW88266A_SET_GAIN_ST_START_BIT)
+
+#define AW88266A_SET_GAIN_ST_5P0_AV                 (1)
+#define AW88266A_SET_GAIN_ST_5P0_AV_VALUE           \
+  (AW88266A_SET_GAIN_ST_5P0_AV << AW88266A_SET_GAIN_ST_START_BIT)
+
+#define AW88266A_SET_GAIN_ST_6P0_AV                 (2)
+#define AW88266A_SET_GAIN_ST_6P0_AV_VALUE           \
+  (AW88266A_SET_GAIN_ST_6P0_AV << AW88266A_SET_GAIN_ST_START_BIT)
+
+#define AW88266A_SET_GAIN_ST_6P7_AV                 (3)
+#define AW88266A_SET_GAIN_ST_6P7_AV_VALUE           \
+  (AW88266A_SET_GAIN_ST_6P7_AV << AW88266A_SET_GAIN_ST_START_BIT)
+
+#define AW88266A_SET_GAIN_ST_10_AV                  (4)
+#define AW88266A_SET_GAIN_ST_10_AV_VALUE            \
+  (AW88266A_SET_GAIN_ST_10_AV << AW88266A_SET_GAIN_ST_START_BIT)
+
+#define AW88266A_SET_GAIN_ST_12_AV                  (5)
+#define AW88266A_SET_GAIN_ST_12_AV_VALUE            \
+  (AW88266A_SET_GAIN_ST_12_AV << AW88266A_SET_GAIN_ST_START_BIT)
+
+#define AW88266A_SET_GAIN_ST_DEFAULT_VALUE          (5)
+#define AW88266A_SET_GAIN_ST_DEFAULT                \
+  (AW88266A_SET_GAIN_ST_DEFAULT_VALUE << AW88266A_SET_GAIN_ST_START_BIT)
+
+/* BSTVOUT_ST bit 3:0 (DACST 0x20) */
+
+#define AW88266A_BSTVOUT_ST_START_BIT               (0)
+#define AW88266A_BSTVOUT_ST_BITS_LEN                (4)
+#define AW88266A_BSTVOUT_ST_MASK                    \
+  (~(((1 << AW88266A_BSTVOUT_ST_BITS_LEN) - 1) <<   \
+  AW88266A_BSTVOUT_ST_START_BIT))
+
+#define AW88266A_BSTVOUT_ST_3P25V                   (0)
+#define AW88266A_BSTVOUT_ST_3P25V_VALUE             \
+  (AW88266A_BSTVOUT_ST_3P25V << AW88266A_BSTVOUT_ST_START_BIT)
+
+#define AW88266A_BSTVOUT_ST_3P50V                   (1)
+#define AW88266A_BSTVOUT_ST_3P50V_VALUE             \
+  (AW88266A_BSTVOUT_ST_3P50V << AW88266A_BSTVOUT_ST_START_BIT)
+
+#define AW88266A_BSTVOUT_ST_3P75V                   (2)
+#define AW88266A_BSTVOUT_ST_3P75V_VALUE             \
+  (AW88266A_BSTVOUT_ST_3P75V << AW88266A_BSTVOUT_ST_START_BIT)
+
+#define AW88266A_BSTVOUT_ST_7P00V                   (15)
+#define AW88266A_BSTVOUT_ST_7P00V_VALUE             \
+  (AW88266A_BSTVOUT_ST_7P00V << AW88266A_BSTVOUT_ST_START_BIT)
+
+#define AW88266A_BSTVOUT_ST_DEFAULT_VALUE           (0)
+#define AW88266A_BSTVOUT_ST_DEFAULT                 \
+  (AW88266A_BSTVOUT_ST_DEFAULT_VALUE << AW88266A_BSTVOUT_ST_START_BIT)
+
+/* default value of DACST (0x20)
+ * #define AW88266A_DACST_DEFAULT (0x0500)
+ */
+
+/* VBAT (0x21) detail
+ * VBAT_DET bit 9:0 (VBAT 0x21)
+ */
+
+#define AW88266A_VBAT_DET_START_BIT                 (0)
+#define AW88266A_VBAT_DET_BITS_LEN                  (10)
+#define AW88266A_VBAT_DET_MASK                      \
+  (~(((1 << AW88266A_VBAT_DET_BITS_LEN) - 1) << AW88266A_VBAT_DET_START_BIT))
+
+#define AW88266A_VBAT_DET_DEFAULT_VALUE             (0x263)
+#define AW88266A_VBAT_DET_DEFAULT                   \
+  (AW88266A_VBAT_DET_DEFAULT_VALUE << AW88266A_VBAT_DET_START_BIT)
+
+/* default value of VBAT (0x21)
+ * #define AW88266A_VBAT_DEFAULT (0x0263)
+ */
+
+/* TEMP (0x22) detail
+ * TEMP_DET bit 9:0 (TEMP 0x22)
+ */
+
+#define AW88266A_TEMP_DET_START_BIT                 (0)
+#define AW88266A_TEMP_DET_BITS_LEN                  (10)
+#define AW88266A_TEMP_DET_MASK                      \
+  (~(((1 << AW88266A_TEMP_DET_BITS_LEN) - 1) << AW88266A_TEMP_DET_START_BIT))
+
+#define AW88266A_TEMP_DET_MINUS_40_DEGREE           (0x3D8)
+#define AW88266A_TEMP_DET_MINUS_40_DEGREE_VALUE     \
+  (AW88266A_TEMP_DET_MINUS_40_DEGREE << AW88266A_TEMP_DET_START_BIT)
+
+#define AW88266A_TEMP_DET_0_DEGREE                  (0x00)
+#define AW88266A_TEMP_DET_0_DEGREE_VALUE            \
+  (AW88266A_TEMP_DET_0_DEGREE << AW88266A_TEMP_DET_START_BIT)
+
+#define AW88266A_TEMP_DET_1_DEGREE                  (0x01)
+#define AW88266A_TEMP_DET_1_DEGREE_VALUE            \
+  (AW88266A_TEMP_DET_1_DEGREE << AW88266A_TEMP_DET_START_BIT)
+
+#define AW88266A_TEMP_DET_25_DEGREE                 (0x19)
+#define AW88266A_TEMP_DET_25_DEGREE_VALUE           \
+  (AW88266A_TEMP_DET_25_DEGREE << AW88266A_TEMP_DET_START_BIT)
+
+#define AW88266A_TEMP_DET_55_DEGREE                 (0x37)
+#define AW88266A_TEMP_DET_55_DEGREE_VALUE           \
+  (AW88266A_TEMP_DET_55_DEGREE << AW88266A_TEMP_DET_START_BIT)
+
+#define AW88266A_TEMP_DET_DEFAULT_VALUE             (0x019)
+#define AW88266A_TEMP_DET_DEFAULT                   \
+  (AW88266A_TEMP_DET_DEFAULT_VALUE << AW88266A_TEMP_DET_START_BIT)
+
+/* default value of TEMP (0x22)
+ * #define AW88266A_TEMP_DEFAULT  (0x0019)
+ */
+
+/* PVDD (0x23) detail
+ * PVDD_DET bit 9:0 (PVDD 0x23)
+ */
+
+#define AW88266A_PVDD_DET_START_BIT                 (0)
+#define AW88266A_PVDD_DET_BITS_LEN                  (10)
+#define AW88266A_PVDD_DET_MASK                      \
+  (~(((1 << AW88266A_PVDD_DET_BITS_LEN) - 1) << AW88266A_PVDD_DET_START_BIT))
+
+#define AW88266A_PVDD_DET_DEFAULT_VALUE             (0x263)
+#define AW88266A_PVDD_DET_DEFAULT                   \
+  (AW88266A_PVDD_DET_DEFAULT_VALUE << AW88266A_PVDD_DET_START_BIT)
+
+/* default value of PVDD (0x23)
+ * #define AW88266A_PVDD_DEFAULT  (0x0263)
+ */
+
+/* CCO_MUX bit 2 (PLLCTRL3 0x55) */
+
+#define AW88266A_CCO_MUX_START_BIT                  (2)
+#define AW88266A_CCO_MUX_BITS_LEN                   (1)
+#define AW88266A_CCO_MUX_MASK                       \
+  (~(((1 << AW88266A_CCO_MUX_BITS_LEN) - 1) << AW88266A_CCO_MUX_START_BIT))
+
+#define AW88266A_CCO_MUX_DIVIDED                    (0)
+#define AW88266A_CCO_MUX_DIVIDED_VALUE              \
+  (AW88266A_CCO_MUX_DIVIDED << AW88266A_CCO_MUX_START_BIT)
+
+#define AW88266A_CCO_MUX_BYPASS                     (1)
+#define AW88266A_CCO_MUX_BYPASS_VALUE               \
+  (AW88266A_CCO_MUX_BYPASS << AW88266A_CCO_MUX_START_BIT)
+
+/* BSTCTRL1 (0x60) detail
+ * BURST_OVPCTR bit 15 (BSTCTRL1 0x60)
+ */
+
+#define AW88266A_BURST_OVPCTR_START_BIT             (15)
+#define AW88266A_BURST_OVPCTR_BITS_LEN              (1)
+#define AW88266A_BURST_OVPCTR_MASK                  \
+  (~(((1 << AW88266A_BURST_OVPCTR_BITS_LEN) - 1) << \
+  AW88266A_BURST_OVPCTR_START_BIT))
+
+#define AW88266A_BURST_OVPCTR_DISABLE               (0)
+#define AW88266A_BURST_OVPCTR_DISABLE_VALUE         \
+  (AW88266A_BURST_OVPCTR_DISABLE << AW88266A_BURST_OVPCTR_START_BIT)
+
+#define AW88266A_BURST_OVPCTR_ENABLE                (1)
+#define AW88266A_BURST_OVPCTR_ENABLE_VALUE          \
+  (AW88266A_BURST_OVPCTR_ENABLE << AW88266A_BURST_OVPCTR_START_BIT)
+
+#define AW88266A_BURST_OVPCTR_DEFAULT_VALUE         (1)
+#define AW88266A_BURST_OVPCTR_DEFAULT               \
+  (AW88266A_BURST_OVPCTR_DEFAULT_VALUE << AW88266A_BURST_OVPCTR_START_BIT)
+
+/* BST_RTH bit 13:8 (BSTCTRL1 0x60) */
+
+#define AW88266A_BST_RTH_START_BIT                  (8)
+#define AW88266A_BST_RTH_BITS_LEN                   (6)
+#define AW88266A_BST_RTH_MASK                       \
+  (~(((1 << AW88266A_BST_RTH_BITS_LEN) - 1) << AW88266A_BST_RTH_START_BIT))
+
+#define AW88266A_BST_RTH_DEFAULT_VALUE              (4)
+#define AW88266A_BST_RTH_DEFAULT                    \
+  (AW88266A_BST_RTH_DEFAULT_VALUE << AW88266A_BST_RTH_START_BIT)
+
+/* BST_ATH bit 5:0 (BSTCTRL1 0x60) */
+
+#define AW88266A_BST_ATH_START_BIT                  (0)
+#define AW88266A_BST_ATH_BITS_LEN                   (6)
+#define AW88266A_BST_ATH_MASK                       \
+  (~(((1 << AW88266A_BST_ATH_BITS_LEN) - 1) << AW88266A_BST_ATH_START_BIT))
+
+#define AW88266A_BST_ATH_DEFAULT_VALUE              (2)
+#define AW88266A_BST_ATH_DEFAULT                    \
+  (AW88266A_BST_ATH_DEFAULT_VALUE << AW88266A_BST_ATH_START_BIT)
+
+/* default value of BSTCTRL1 (0x60)
+ * #define AW88266A_BSTCTRL1_DEFAULT  (0x8402)
+ */
+
+/* BSTCTRL2 (0x61) detail
+ * BST_VOUT6_SEL bit 15 (BSTCTRL2 0x61)
+ */
+
+#define AW88266A_BST_VOUT6_SEL_START_BIT            (15)
+#define AW88266A_BST_VOUT6_SEL_BITS_LEN             (1)
+#define AW88266A_BST_VOUT6_SEL_MASK                 \
+  (~(((1 << AW88266A_BST_VOUT6_SEL_BITS_LEN) - 1) <<\
+  AW88266A_BST_VOUT6_SEL_START_BIT))
+
+#define AW88266A_BST_VOUT6_SEL_6P0V                 (0)
+#define AW88266A_BST_VOUT6_SEL_6P0V_VALUE           \
+  (AW88266A_BST_VOUT6_SEL_6P0V << AW88266A_BST_VOUT6_SEL_START_BIT)
+
+#define AW88266A_BST_VOUT6_SEL_6P1V                 (1)
+#define AW88266A_BST_VOUT6_SEL_6P1V_VALUE           \
+  (AW88266A_BST_VOUT6_SEL_6P1V << AW88266A_BST_VOUT6_SEL_START_BIT)
+
+#define AW88266A_BST_VOUT6_SEL_DEFAULT_VALUE        (0)
+#define AW88266A_BST_VOUT6_SEL_DEFAULT              \
+  (AW88266A_BST_VOUT6_SEL_DEFAULT_VALUE << AW88266A_BST_VOUT6_SEL_START_BIT)
+
+/* BST_IPEAK bit 14:12 (BSTCTRL2 0x61) */
+
+#define AW88266A_BST_IPEAK_START_BIT                (12)
+#define AW88266A_BST_IPEAK_BITS_LEN                 (3)
+#define AW88266A_BST_IPEAK_MASK                     \
+  (~(((1 << AW88266A_BST_IPEAK_BITS_LEN) - 1) <<    \
+  AW88266A_BST_IPEAK_START_BIT))
+
+#define AW88266A_BST_IPEAK_1P20A                    (0)
+#define AW88266A_BST_IPEAK_1P20A_VALUE              \
+  (AW88266A_BST_IPEAK_1P20A << AW88266A_BST_IPEAK_START_BIT)
+
+#define AW88266A_BST_IPEAK_1P40A                    (1)
+#define AW88266A_BST_IPEAK_1P40A_VALUE              \
+  (AW88266A_BST_IPEAK_1P40A << AW88266A_BST_IPEAK_START_BIT)
+
+#define AW88266A_BST_IPEAK_1P60A                    (2)
+#define AW88266A_BST_IPEAK_1P60A_VALUE              \
+  (AW88266A_BST_IPEAK_1P60A << AW88266A_BST_IPEAK_START_BIT)
+
+#define AW88266A_BST_IPEAK_1P80A                    (3)
+#define AW88266A_BST_IPEAK_1P80A_VALUE              \
+  (AW88266A_BST_IPEAK_1P80A << AW88266A_BST_IPEAK_START_BIT)
+
+#define AW88266A_BST_IPEAK_2P00A                    (4)
+#define AW88266A_BST_IPEAK_2P00A_VALUE              \
+  (AW88266A_BST_IPEAK_2P00A << AW88266A_BST_IPEAK_START_BIT)
+
+#define AW88266A_BST_IPEAK_2P25A                    (5)
+#define AW88266A_BST_IPEAK_2P25A_VALUE              \
+  (AW88266A_BST_IPEAK_2P25A << AW88266A_BST_IPEAK_START_BIT)
+
+#define AW88266A_BST_IPEAK_2P50A                    (6)
+#define AW88266A_BST_IPEAK_2P50A_VALUE              \
+  (AW88266A_BST_IPEAK_2P50A << AW88266A_BST_IPEAK_START_BIT)
+
+#define AW88266A_BST_IPEAK_2P75A                    (7)
+#define AW88266A_BST_IPEAK_2P75A_VALUE              \
+  (AW88266A_BST_IPEAK_2P75A << AW88266A_BST_IPEAK_START_BIT)
+
+#define AW88266A_BST_IPEAK_DEFAULT_VALUE            (6)
+#define AW88266A_BST_IPEAK_DEFAULT                  \
+  (AW88266A_BST_IPEAK_DEFAULT_VALUE << AW88266A_BST_IPEAK_START_BIT)
+
+/* BST_TDEG bit 11:8 (BSTCTRL2 0x61) */
+
+#define AW88266A_BST_TDEG_START_BIT                 (8)
+#define AW88266A_BST_TDEG_BITS_LEN                  (4)
+#define AW88266A_BST_TDEG_MASK                      \
+  (~(((1 << AW88266A_BST_TDEG_BITS_LEN) - 1) <<     \
+  AW88266A_BST_TDEG_START_BIT))
+
+#define AW88266A_BST_TDEG_0P50_MS                   (0)
+#define AW88266A_BST_TDEG_0P50_MS_VALUE             \
+  (AW88266A_BST_TDEG_0P50_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_1P00_MS                   (1)
+#define AW88266A_BST_TDEG_1P00_MS_VALUE             \
+  (AW88266A_BST_TDEG_1P00_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_2P00_MS                   (2)
+#define AW88266A_BST_TDEG_2P00_MS_VALUE             \
+  (AW88266A_BST_TDEG_2P00_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_4P00_MS                   (3)
+#define AW88266A_BST_TDEG_4P00_MS_VALUE             \
+  (AW88266A_BST_TDEG_4P00_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_8P00_MS                   (4)
+#define AW88266A_BST_TDEG_8P00_MS_VALUE             \
+  (AW88266A_BST_TDEG_8P00_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_10P7_MS                   (5)
+#define AW88266A_BST_TDEG_10P7_MS_VALUE             \
+  (AW88266A_BST_TDEG_10P7_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_13P3_MS                   (6)
+#define AW88266A_BST_TDEG_13P3_MS_VALUE             \
+  (AW88266A_BST_TDEG_13P3_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_16P0_MS                   (7)
+#define AW88266A_BST_TDEG_16P0_MS_VALUE             \
+  (AW88266A_BST_TDEG_16P0_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_18P6_MS                   (8)
+#define AW88266A_BST_TDEG_18P6_MS_VALUE             \
+  (AW88266A_BST_TDEG_18P6_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_21P3_MS                   (9)
+#define AW88266A_BST_TDEG_21P3_MS_VALUE             \
+  (AW88266A_BST_TDEG_21P3_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_24P0_MS                   (10)
+#define AW88266A_BST_TDEG_24P0_MS_VALUE             \
+  (AW88266A_BST_TDEG_24P0_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_32P0_MS                   (11)
+#define AW88266A_BST_TDEG_32P0_MS_VALUE             \
+  (AW88266A_BST_TDEG_32P0_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_64P0_MS                   (12)
+#define AW88266A_BST_TDEG_64P0_MS_VALUE             \
+  (AW88266A_BST_TDEG_64P0_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_128_MS                    (13)
+#define AW88266A_BST_TDEG_128_MS_VALUE              \
+  (AW88266A_BST_TDEG_128_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_256_MS                    (14)
+#define AW88266A_BST_TDEG_256_MS_VALUE              \
+  (AW88266A_BST_TDEG_256_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_1200_MS                   (15)
+#define AW88266A_BST_TDEG_1200_MS_VALUE             \
+  (AW88266A_BST_TDEG_1200_MS << AW88266A_BST_TDEG_START_BIT)
+
+#define AW88266A_BST_TDEG_DEFAULT_VALUE             (11)
+#define AW88266A_BST_TDEG_DEFAULT                   \
+  (AW88266A_BST_TDEG_DEFAULT_VALUE << AW88266A_BST_TDEG_START_BIT)
+
+/* BURST_FRE bit 7 (BSTCTRL2 0x61) */
+
+#define AW88266A_BURST_FRE_START_BIT                (7)
+#define AW88266A_BURST_FRE_BITS_LEN                 (1)
+#define AW88266A_BURST_FRE_MASK                     \
+  (~(((1 << AW88266A_BURST_FRE_BITS_LEN) - 1) <<    \
+  AW88266A_BURST_FRE_START_BIT))
+
+#define AW88266A_BURST_FRE_20KHZ                    (0)
+#define AW88266A_BURST_FRE_20KHZ_VALUE              \
+  (AW88266A_BURST_FRE_20KHZ << AW88266A_BURST_FRE_START_BIT)
+
+#define AW88266A_BURST_FRE_30KHZ                    (1)
+#define AW88266A_BURST_FRE_30KHZ_VALUE              \
+  (AW88266A_BURST_FRE_30KHZ << AW88266A_BURST_FRE_START_BIT)
+
+#define AW88266A_BURST_FRE_DEFAULT_VALUE            (0)
+#define AW88266A_BURST_FRE_DEFAULT                  \
+  (AW88266A_BURST_FRE_DEFAULT_VALUE << AW88266A_BURST_FRE_START_BIT)
+
+/* RSQN_DLY_EN bit 6 (BSTCTRL2 0x61) */
+
+#define AW88266A_RSQN_DLY_EN_START_BIT              (6)
+#define AW88266A_RSQN_DLY_EN_BITS_LEN               (1)
+#define AW88266A_RSQN_DLY_EN_MASK                   \
+  (~(((1 << AW88266A_RSQN_DLY_EN_BITS_LEN) - 1) <<  \
+  AW88266A_RSQN_DLY_EN_START_BIT))
+
+#define AW88266A_RSQN_DLY_EN_6NS                    (0)
+#define AW88266A_RSQN_DLY_EN_6NS_VALUE              \
+  (AW88266A_RSQN_DLY_EN_6NS << AW88266A_RSQN_DLY_EN_START_BIT)
+
+#define AW88266A_RSQN_DLY_EN_12NS                   (1)
+#define AW88266A_RSQN_DLY_EN_12NS_VALUE             \
+  (AW88266A_RSQN_DLY_EN_12NS << AW88266A_RSQN_DLY_EN_START_BIT)
+
+#define AW88266A_RSQN_DLY_EN_DEFAULT_VALUE          (0)
+#define AW88266A_RSQN_DLY_EN_DEFAULT                \
+  (AW88266A_RSQN_DLY_EN_DEFAULT_VALUE << AW88266A_RSQN_DLY_EN_START_BIT)
+
+/* BST_MODE bit 5:4 (BSTCTRL2 0x61) */
+
+#define AW88266A_BST_MODE_START_BIT                 (4)
+#define AW88266A_BST_MODE_BITS_LEN                  (2)
+#define AW88266A_BST_MODE_MASK                      \
+  (~(((1 << AW88266A_BST_MODE_BITS_LEN) - 1) << AW88266A_BST_MODE_START_BIT))
+
+#define AW88266A_BST_MODE_TRANSPARENT               (0)
+#define AW88266A_BST_MODE_TRANSPARENT_VALUE         \
+  (AW88266A_BST_MODE_TRANSPARENT << AW88266A_BST_MODE_START_BIT)
+
+#define AW88266A_BST_MODE_FORCE_BOOST               (1)
+#define AW88266A_BST_MODE_FORCE_BOOST_VALUE         \
+  (AW88266A_BST_MODE_FORCE_BOOST << AW88266A_BST_MODE_START_BIT)
+
+#define AW88266A_BST_MODE_CLASS_G                   (2)
+#define AW88266A_BST_MODE_CLASS_G_VALUE             \
+  (AW88266A_BST_MODE_CLASS_G << AW88266A_BST_MODE_START_BIT)
+
+#define AW88266A_BST_MODE_CLASS_H                   (3)
+#define AW88266A_BST_MODE_CLASS_H_VALUE             \
+  (AW88266A_BST_MODE_CLASS_H << AW88266A_BST_MODE_START_BIT)
+
+#define AW88266A_BST_MODE_DEFAULT_VALUE             (0x3)
+#define AW88266A_BST_MODE_DEFAULT                   \
+  (AW88266A_BST_MODE_DEFAULT_VALUE << AW88266A_BST_MODE_START_BIT)
+
+/* VOUT_VREFSET bit 3:0 (BSTCTRL2 0x61) */
+
+#define AW88266A_VOUT_VREFSET_START_BIT             (0)
+#define AW88266A_VOUT_VREFSET_BITS_LEN              (4)
+#define AW88266A_VOUT_VREFSET_MASK                  \
+  (~(((1 << AW88266A_VOUT_VREFSET_BITS_LEN) - 1) << \
+  AW88266A_VOUT_VREFSET_START_BIT))
+
+#define AW88266A_VOUT_VREFSET_3P25V                 (0)
+#define AW88266A_VOUT_VREFSET_3P25V_VALUE           \
+  (AW88266A_VOUT_VREFSET_3P25V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_3P50V                 (1)
+#define AW88266A_VOUT_VREFSET_3P50V_VALUE           \
+  (AW88266A_VOUT_VREFSET_3P50V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_3P75V                 (2)
+#define AW88266A_VOUT_VREFSET_3P75V_VALUE           \
+  (AW88266A_VOUT_VREFSET_3P75V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_4P00V                 (3)
+#define AW88266A_VOUT_VREFSET_4P00V_VALUE           \
+  (AW88266A_VOUT_VREFSET_4P00V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_4P25V                 (4)
+#define AW88266A_VOUT_VREFSET_4P25V_VALUE           \
+  (AW88266A_VOUT_VREFSET_4P25V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_4P50V                 (5)
+#define AW88266A_VOUT_VREFSET_4P50V_VALUE           \
+  (AW88266A_VOUT_VREFSET_4P50V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_4P75V                 (6)
+#define AW88266A_VOUT_VREFSET_4P75V_VALUE           \
+  (AW88266A_VOUT_VREFSET_4P75V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_5P00V                 (7)
+#define AW88266A_VOUT_VREFSET_5P00V_VALUE           \
+  (AW88266A_VOUT_VREFSET_5P00V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_5P25V                 (8)
+#define AW88266A_VOUT_VREFSET_5P25V_VALUE           \
+  (AW88266A_VOUT_VREFSET_5P25V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_5P50V                 (9)
+#define AW88266A_VOUT_VREFSET_5P50V_VALUE           \
+  (AW88266A_VOUT_VREFSET_5P50V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_5P75V                 (10)
+#define AW88266A_VOUT_VREFSET_5P75V_VALUE           \
+  (AW88266A_VOUT_VREFSET_5P75V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_6P00V                 (11)
+#define AW88266A_VOUT_VREFSET_6P00V_VALUE           \
+  (AW88266A_VOUT_VREFSET_6P00V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_6P25V                 (12)
+#define AW88266A_VOUT_VREFSET_6P25V_VALUE           \
+  (AW88266A_VOUT_VREFSET_6P25V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_6P50V                 (13)
+#define AW88266A_VOUT_VREFSET_6P50V_VALUE           \
+  (AW88266A_VOUT_VREFSET_6P50V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_6P75V                 (14)
+#define AW88266A_VOUT_VREFSET_6P75V_VALUE           \
+  (AW88266A_VOUT_VREFSET_6P75V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_7P00V                 (15)
+#define AW88266A_VOUT_VREFSET_7P00V_VALUE           \
+  (AW88266A_VOUT_VREFSET_7P00V << AW88266A_VOUT_VREFSET_START_BIT)
+
+#define AW88266A_VOUT_VREFSET_DEFAULT_VALUE         (0xB)
+#define AW88266A_VOUT_VREFSET_DEFAULT               \
+  (AW88266A_VOUT_VREFSET_DEFAULT_VALUE << AW88266A_VOUT_VREFSET_START_BIT)
+
+/* default value of BSTCTRL2 (0x61) */
+
+/* #define AW88266A_BSTCTRL2_DEFAULT  (0x6B3B) */
+
+/* EF_ISN_GESLP bit 9:0 (EFRH 0x78) */
+
+#define AW88266A_EF_ISN_GESLP_START_BIT             (0)
+#define AW88266A_EF_ISN_GESLP_BITS_LEN              (10)
+#define AW88266A_EF_ISN_GESLP_MASK                  \
+  (~(((1 << AW88266A_EF_ISN_GESLP_BITS_LEN) - 1) << \
+  AW88266A_EF_ISN_GESLP_START_BIT))
+
+/* EF_VSN_GESLP bit 9:0 (EFRM2 0x79) */
+
+#define AW88266A_EF_VSN_GESLP_START_BIT             (0)
+#define AW88266A_EF_VSN_GESLP_BITS_LEN              (10)
+#define AW88266A_EF_VSN_GESLP_MASK                  \
+  (~(((1 << AW88266A_EF_VSN_GESLP_BITS_LEN) - 1) << \
+  AW88266A_EF_VSN_GESLP_START_BIT))
+
+/* detail information of registers end */
+
+#define AW88266A_EFVER_CHECK                        (0x0007)
+#define AW88266A_EFVERH_START_BIT                   (13)
+#define AW88266A_EFVERL_START_BIT                   (10)
+
+#define AW88266A_EFVERH_MASK                        (~(7 << 13))
+#define AW88266A_EFVERL_MASK                        (~(7 << 10))
+
+/* Volume Coefficient */
+
+#define AW88266A_VOL_STEP	                          (6 * 8)
+
+/* Vcalb */
+
+#define AW88266A_EF_ISN_GESLP2_SIGN_MASK            (~0x0200)
+#define AW88266A_EF_ISN_GESLP2_NEG                  (~0xFC00)
+
+#define AW88266A_EF_ISN_GESLP_SIGN_MASK             (~0x0200)
+#define AW88266A_EF_ISN_GESLP_NEG                   (~0xFC00)
 
 #define AW88266A_CABL_BASE_VALUE                    (1000)
 #define AW88266A_ICABLK_FACTOR                      (1)
 #define AW88266A_VCABLK_FACTOR                      (1)
 
 #define AW88266A_VCAL_FACTOR                        (1<<13)
-#endif
\ No newline at end of file
+
+#define AW88266A_MONITOR_VBAT_RANGE                 (6025)
+#define AW88266A_MONITOR_INT_10BIT                  (1023)
+#define AW88266A_MONITOR_TEMP_SIGN_MASK             (~(1<<9))
+#define AW88266A_MONITOR_TEMP_NEG_MASK              (0XFC00)
+
+#endif