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Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section()

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This commit is contained in:
Gregory Nutt
2016-02-13 19:11:09 -06:00
parent 3caffdd82e
commit 70e502adb0
312 changed files with 2038 additions and 2232 deletions
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arch/arm/src/a1x/a1x_irq.c
+9 -22
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/a1x/a1x_irq.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -45,7 +45,6 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include "up_arch.h"
#include "up_internal.h"
@@ -54,24 +53,12 @@
#include "a1x_pio.h"
#include "a1x_irq.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -91,7 +78,7 @@ static void a1x_dumpintc(const char *msg, int irq)
/* Dump some relevant ARMv7 register contents */
flags = irqsave();
flags = enter_critical_section();
lldbg("ARMv7 (%s, irq=%d):\n", msg, irq);
lldbg(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
@@ -126,7 +113,7 @@ static void a1x_dumpintc(const char *msg, int irq)
getreg32(A1X_INTC_PRIO0), getreg32(A1X_INTC_PRIO1),
getreg32(A1X_INTC_PRIO2), getreg32(A1X_INTC_PRIO3),
getreg32(A1X_INTC_PRIO4));
irqrestore(flags);
leave_critical_section(flags);
}
#else
# define a1x_dumpintc(msg, irq)
@@ -339,7 +326,7 @@ void up_disable_irq(int irq)
{
/* These operations must be atomic */
flags = irqsave();
flags = enter_critical_section();
/* Make sure that the interrupt is disabled. */
@@ -356,7 +343,7 @@ void up_disable_irq(int irq)
putreg32(regval, regaddr);
a1x_dumpintc("disable", irq);
irqrestore(flags);
leave_critical_section(flags);
}
#ifdef CONFIG_A1X_PIO_IRQ
@@ -387,7 +374,7 @@ void up_enable_irq(int irq)
{
/* These operations must be atomic */
flags = irqsave();
flags = enter_critical_section();
/* Make sure that the interrupt is enabled. */
@@ -404,7 +391,7 @@ void up_enable_irq(int irq)
putreg32(regval, regaddr);
a1x_dumpintc("enable", irq);
irqrestore(flags);
leave_critical_section(flags);
}
#ifdef CONFIG_A1X_PIO_IRQ
@@ -440,7 +427,7 @@ int up_prioritize_irq(int irq, int priority)
{
/* These operations must be atomic */
flags = irqsave();
flags = enter_critical_section();
/* Set the new priority */
@@ -451,7 +438,7 @@ int up_prioritize_irq(int irq, int priority)
putreg32(regval, regaddr);
a1x_dumpintc("prioritize", irq);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
arch/arm/src/a1x/a1x_pio.c
+9 -8
View File
@@ -44,6 +44,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
@@ -232,7 +233,7 @@ int a1x_pio_config(pio_pinset_t cfgset)
/* Disable interrupts to prohibit re-entrance. */
flags = irqsave();
flags = enter_critical_section();
/* Set the peripheral ID (0=input, 1=output) and interrupt mode */
@@ -333,7 +334,7 @@ int a1x_pio_config(pio_pinset_t cfgset)
putreg32(regval, dataddr);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -355,7 +356,7 @@ void a1x_pio_write(pio_pinset_t pinset, bool value)
/* Disable interrupts to prohibit re-entrance. */
flags = irqsave();
flags = enter_critical_section();
/* Set the output value (will have no effect on inputs */
@@ -372,7 +373,7 @@ void a1x_pio_write(pio_pinset_t pinset, bool value)
}
putreg32(regval, regaddr);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -422,10 +423,10 @@ void a1x_pio_irqenable(int irq)
* register.
*/
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(A1X_PIO_INT_CTL);
regval |= PIO_INT_CTL(irq);
irqrestore(flags);
leave_critical_section(flags);
}
}
#endif
@@ -455,10 +456,10 @@ void a1x_pio_irqdisable(int irq)
* register.
*/
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(A1X_PIO_INT_CTL);
regval &= ~PIO_INT_CTL(irq);
irqrestore(flags);
leave_critical_section(flags);
}
}
#endif
arch/arm/src/a1x/a1x_serial.c
+22 -22
View File
@@ -755,7 +755,7 @@ static inline void a1x_uart0config(void)
/* Step 1: Enable power to UART0 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART0 */
@@ -765,7 +765,7 @@ static inline void a1x_uart0config(void)
a1x_pio_config(PIO_UART0_TX);
a1x_pio_config(PIO_UART0_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@@ -776,7 +776,7 @@ static inline void a1x_uart1config(void)
/* Step 1: Enable power to UART1 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART1 */
@@ -786,7 +786,7 @@ static inline void a1x_uart1config(void)
a1x_pio_config(PIO_UART1_TX);
a1x_pio_config(PIO_UART1_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@@ -797,7 +797,7 @@ static inline void a1x_uart2config(void)
/* Step 1: Enable power to UART2 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking on UART2 */
@@ -807,7 +807,7 @@ static inline void a1x_uart2config(void)
a1x_pio_config(PIO_UART2_TX);
a1x_pio_config(PIO_UART2_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@@ -818,7 +818,7 @@ static inline void a1x_uart3config(void)
/* Step 1: Enable power to UART3 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART3 */
@@ -828,7 +828,7 @@ static inline void a1x_uart3config(void)
a1x_pio_config(PIO_UART3_TX);
a1x_pio_config(PIO_UART3_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@@ -839,7 +839,7 @@ static inline void a1x_uart4config(void)
/* Step 1: Enable power to UART4 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART4 */
@@ -849,7 +849,7 @@ static inline void a1x_uart4config(void)
a1x_pio_config(PIO_UART4_TX);
a1x_pio_config(PIO_UART4_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@@ -860,7 +860,7 @@ static inline void a1x_uart5config(void)
/* Step 1: Enable power to UART5 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART5 */
@@ -870,7 +870,7 @@ static inline void a1x_uart5config(void)
a1x_pio_config(PIO_UART5_TX);
a1x_pio_config(PIO_UART5_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@@ -881,7 +881,7 @@ static inline void a1x_uart6config(void)
/* Step 1: Enable power to UART6 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART6 */
@@ -891,7 +891,7 @@ static inline void a1x_uart6config(void)
a1x_pio_config(PIO_UART6_TX);
a1x_pio_config(PIO_UART6_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@@ -902,7 +902,7 @@ static inline void a1x_uart7config(void)
/* Step 1: Enable power to UART7 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART7 */
@@ -912,7 +912,7 @@ static inline void a1x_uart7config(void)
a1x_pio_config(PIO_UART7_TX);
a1x_pio_config(PIO_UART7_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@@ -1292,18 +1292,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv, true);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_enablebreaks(priv, false);
irqrestore(flags);
leave_critical_section(flags);
}
break;
@@ -1466,7 +1466,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@@ -1486,7 +1486,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
up_serialout(priv, A1X_UART_IER_OFFSET, priv->ier);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
arch/arm/src/arm/up_schedulesigaction.c
+4 -15
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_schedulesigaction.c
*
* Copyright (C) 2007-2010, 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2010, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,7 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "arm.h"
@@ -52,18 +53,6 @@
#ifndef CONFIG_DISABLE_SIGNALS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -109,7 +98,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Make sure that interrupts are disabled */
flags = irqsave();
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
@@ -198,7 +187,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */
arch/arm/src/armv6-m/up_dumpnvic.c
+3 -3
View File
@@ -42,7 +42,7 @@
#include <sys/types.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
@@ -81,7 +81,7 @@ void up_dumpnvic(FAR const char *msg)
/* The following requires exclusive access to the NVIC/SYSCON registers */
flags = irqsave();
flags = enter_critical_section();
lldbg("NVIC: %s\n", msg);
lldbg(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n",
@@ -105,7 +105,7 @@ void up_dumpnvic(FAR const char *msg)
getreg32(ARMV6M_SYSCON_CCR), getreg32(ARMV6M_SYSCON_SHPR2),
getreg32(ARMV6M_SYSCON_SHPR3));
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_DEBUG */
arch/arm/src/armv6-m/up_schedulesigaction.c
+4 -3
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv6-m/up_schedulesigaction.c
*
* Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,7 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "psr.h"
@@ -110,7 +111,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Make sure that interrupts are disabled */
flags = irqsave();
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
@@ -208,7 +209,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */
arch/arm/src/armv7-a/arm_addrenv.c
+3 -3
View File
@@ -115,7 +115,7 @@
#include <nuttx/arch.h>
#include <nuttx/pgalloc.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "pgalloc.h"
#include "cache.h"
@@ -169,7 +169,7 @@ static int up_addrenv_initdata(uintptr_t l2table)
#endif
DEBUGASSERT(l2table);
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page table address */
@@ -220,7 +220,7 @@ static int up_addrenv_initdata(uintptr_t l2table)
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif /* CONFIG_BUILD_KERNEL */
arch/arm/src/armv7-a/arm_addrenv_shm.c
+7 -6
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7/arm_addrenv_shm.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,7 @@
#include <string.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include <nuttx/addrenv.h>
@@ -141,7 +142,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
* global resources.
*/
flags = irqsave();
flags = enter_critical_section();
group->tg_addrenv.shm[shmndx] = (FAR uintptr_t *)paddr;
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
@@ -171,7 +172,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
*/
paddr = (uintptr_t)l1entry & ~SECTION_MASK;
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page\
@@ -215,7 +216,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
}
return OK;
@@ -282,7 +283,7 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages)
*/
paddr = (uintptr_t)l1entry & ~SECTION_MASK;
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page
@@ -333,7 +334,7 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages)
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
}
return OK;
arch/arm/src/armv7-a/arm_addrenv_utils.c
+6 -6
View File
@@ -44,7 +44,7 @@
#include <nuttx/pgalloc.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "cache.h"
#include "mmu.h"
@@ -133,7 +133,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
DEBUGASSERT(MM_ISALIGNED(paddr));
list[i] = (FAR uintptr_t *)paddr;
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page address */
@@ -163,7 +163,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
#ifndef CONFIG_ARCH_PGPOOL_MAPPING
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
return -ENOMEM;
}
@@ -187,7 +187,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
}
return npages;
@@ -226,7 +226,7 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
paddr = (uintptr_t)list[i];
if (paddr != 0)
{
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page address */
@@ -265,7 +265,7 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
/* And free the L2 page table itself */
arch/arm/src/armv7-a/arm_l2cc_pl310.c
+28 -28
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/armv7-a/chip/arm-l2cc_pl310.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Reference: "CoreLink™ Level 2 Cache Controller L2C-310", Revision r3p2,
@@ -48,7 +48,7 @@
#include <assert.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "l2cc.h"
@@ -436,10 +436,10 @@ void l2cc_enable(void)
/* Invalidate and enable the cache (must be disabled to do this!) */
flags = irqsave();
flags = enter_critical_section();
l2cc_invalidate_all();
putreg32(L2CC_CR_L2CEN, L2CC_CR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -462,14 +462,14 @@ void l2cc_disable(void)
/* Flush all ways using the Clean Invalidate Way Register (CIWR). */
flags = irqsave();
flags = enter_critical_section();
pl310_flush_all();
/* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */
putreg32(0, L2CC_CR);
dsb();
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -495,9 +495,9 @@ void l2cc_sync(void)
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -521,7 +521,7 @@ void l2cc_invalidate_all(void)
/* Invalidate all ways */
flags = irqsave();
flags = enter_critical_section();
/* Disable the L2 cache while we invalidate it */
@@ -547,7 +547,7 @@ void l2cc_invalidate_all(void)
/* Then re-enable the L2 cache if it was enabled before */
putreg32(regval, L2CC_CR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -574,7 +574,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Check if the start address is aligned with a cacheline */
flags = irqsave();
flags = enter_critical_section();
if ((startaddr & PL310_CACHE_LINE_MASK) != 0)
{
/* No.. align down and flush the cache line by writing the address to
@@ -601,7 +601,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
putreg32(endaddr, L2CC_CIPALR);
}
irqrestore(flags);
leave_critical_section(flags);
/* Loop, invalidated the address range by cache line. Interrupts are re-
* enabled momentarily every PL310_GULP_SIZE bytes.
@@ -619,7 +619,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Disable interrupts and invalidate the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Invalidate the cache line by writing the address to the
@@ -635,16 +635,16 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -669,7 +669,7 @@ void l2cc_clean_all(void)
* Ways Register (CWR).
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(PL310_WAY_MASK, L2CC_CWR);
/* Wait for cache operation by way to complete */
@@ -681,7 +681,7 @@ void l2cc_clean_all(void)
*/
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -737,7 +737,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
/* Disable interrupts and clean the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Clean the cache line by writing the address to the Clean
@@ -753,16 +753,16 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -785,9 +785,9 @@ void l2cc_flush_all(void)
/* Flush all ways using the Clean Invalidate Way Register (CIWR). */
flags = irqsave();
flags = enter_critical_section();
pl310_flush_all();
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -843,7 +843,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)
/* Disable interrupts and flush the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Flush the cache line by writing the address to the Clean
@@ -859,16 +859,16 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_ARMV7A_L2CC_PL310 */
arch/arm/src/armv7-a/arm_pgalloc.c
+7 -6
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7/arm_pgalloc.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/sched.h>
#include <nuttx/arch.h>
#include <nuttx/addrenv.h>
@@ -89,7 +90,7 @@ static uintptr_t alloc_pgtable(void)
{
DEBUGASSERT(MM_ISALIGNED(paddr));
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page address */
@@ -119,7 +120,7 @@ static uintptr_t alloc_pgtable(void)
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
}
return paddr;
@@ -258,7 +259,7 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages)
return 0;
}
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page address */
@@ -282,7 +283,7 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages)
#ifndef CONFIG_ARCH_PGPOOL_MAPPING
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
return 0;
}
@@ -311,7 +312,7 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages)
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
}
return brkaddr;
arch/arm/src/armv7-a/arm_schedulesigaction.c
+4 -3
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_schedulesigaction.c
*
* Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,7 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "arm.h"
@@ -109,7 +110,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Make sure that interrupts are disabled */
flags = irqsave();
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
@@ -197,7 +198,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */
arch/arm/src/armv7-a/cache.h
+3 -2
View File
@@ -41,6 +41,7 @@
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include "cp15_cacheops.h"
#include "l2cc.h"
@@ -103,10 +104,10 @@ static inline void arch_invalidate_dcache(uintptr_t start, uintptr_t end)
static inline void arch_invalidate_dcache_all(void)
{
#ifdef CONFIG_ARCH_L2CACHE
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
cp15_invalidate_dcache_all();
l2cc_invalidate_all();
irqrestore(flags);
leave_critical_section(flags);
#else
cp15_invalidate_dcache_all();
#endif
arch/arm/src/armv7-m/up_ramvec_attach.c
+2 -2
View File
@@ -114,7 +114,7 @@ int up_ramvec_attach(int irq, up_vector_t vector)
* common exception handler.
*/
flags = irqsave();
flags = enter_critical_section();
if (vector == NULL)
{
/* Disable the interrupt if we can before detaching it. We might
@@ -133,7 +133,7 @@ int up_ramvec_attach(int irq, up_vector_t vector)
/* Save the new vector in the vector table */
g_ram_vectors[irq] = vector;
irqrestore(flags);
leave_critical_section(flags);
ret = OK;
}
arch/arm/src/armv7-m/up_schedulesigaction.c
+4 -3
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-m/up_schedulesigaction.c
*
* Copyright (C) 2009-2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,7 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "psr.h"
@@ -99,7 +100,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Make sure that interrupts are disabled */
flags = irqsave();
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
@@ -213,7 +214,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */
arch/arm/src/armv7-r/arm_l2cc_pl310.c
+28 -28
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/armv7-r/chip/arm-l2cc_pl310.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Reference: "CoreLink™ Level 2 Cache Controller L2C-310", Revision r3p2,
@@ -48,7 +48,7 @@
#include <assert.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "l2cc.h"
@@ -436,10 +436,10 @@ void l2cc_enable(void)
/* Invalidate and enable the cache (must be disabled to do this!) */
flags = irqsave();
flags = enter_critical_section();
l2cc_invalidate_all();
putreg32(L2CC_CR_L2CEN, L2CC_CR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -462,14 +462,14 @@ void l2cc_disable(void)
/* Flush all ways using the Clean Invalidate Way Register (CIWR). */
flags = irqsave();
flags = enter_critical_section();
pl310_flush_all();
/* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */
putreg32(0, L2CC_CR);
dsb();
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -495,9 +495,9 @@ void l2cc_sync(void)
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -521,7 +521,7 @@ void l2cc_invalidate_all(void)
/* Invalidate all ways */
flags = irqsave();
flags = enter_critical_section();
/* Disable the L2 cache while we invalidate it */
@@ -547,7 +547,7 @@ void l2cc_invalidate_all(void)
/* Then re-enable the L2 cache if it was enabled before */
putreg32(regval, L2CC_CR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -574,7 +574,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Check if the start address is aligned with a cacheline */
flags = irqsave();
flags = enter_critical_section();
if ((startaddr & PL310_CACHE_LINE_MASK) != 0)
{
/* No.. align down and flush the cache line by writing the address to
@@ -601,7 +601,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
putreg32(endaddr, L2CC_CIPALR);
}
irqrestore(flags);
leave_critical_section(flags);
/* Loop, invalidated the address range by cache line. Interrupts are re-
* enabled momentarily every PL310_GULP_SIZE bytes.
@@ -619,7 +619,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Disable interrupts and invalidate the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Invalidate the cache line by writing the address to the
@@ -635,16 +635,16 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -669,7 +669,7 @@ void l2cc_clean_all(void)
* Ways Register (CWR).
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(PL310_WAY_MASK, L2CC_CWR);
/* Wait for cache operation by way to complete */
@@ -681,7 +681,7 @@ void l2cc_clean_all(void)
*/
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -737,7 +737,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
/* Disable interrupts and clean the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Clean the cache line by writing the address to the Clean
@@ -753,16 +753,16 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -785,9 +785,9 @@ void l2cc_flush_all(void)
/* Flush all ways using the Clean Invalidate Way Register (CIWR). */
flags = irqsave();
flags = enter_critical_section();
pl310_flush_all();
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -843,7 +843,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)
/* Disable interrupts and flush the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Flush the cache line by writing the address to the Clean
@@ -859,16 +859,16 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_ARMV7R_L2CC_PL310 */
arch/arm/src/armv7-r/arm_schedulesigaction.c
+4 -3
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_schedulesigaction.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,7 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "arm.h"
@@ -97,7 +98,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Make sure that interrupts are disabled */
flags = irqsave();
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
@@ -185,7 +186,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */
arch/arm/src/armv7-r/cache.h
+3 -2
View File
@@ -41,6 +41,7 @@
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include "cp15_cacheops.h"
#include "l2cc.h"
@@ -103,10 +104,10 @@ static inline void arch_invalidate_dcache(uintptr_t start, uintptr_t end)
static inline void arch_invalidate_dcache_all(void)
{
#ifdef CONFIG_ARCH_L2CACHE
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
cp15_invalidate_dcache_all();
l2cc_invalidate_all();
irqrestore(flags);
leave_critical_section(flags);
#else
cp15_invalidate_dcache_all();
#endif
arch/arm/src/c5471/c5471_ethernet.c
+4 -4
View File
@@ -1746,7 +1746,7 @@ static int c5471_ifdown(struct net_driver_s *dev)
/* Disable the Ethernet interrupt */
flags = irqsave();
flags = enter_critical_section();
up_disable_irq(C5471_IRQ_ETHER);
/* Disable interrupts going from EIM Module to Interrupt Module. */
@@ -1770,7 +1770,7 @@ static int c5471_ifdown(struct net_driver_s *dev)
/* Reset the device */
c5471->c_bifup = false;
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -1799,7 +1799,7 @@ static int c5471_txavail(struct net_driver_s *dev)
irqstate_t flags;
ndbg("Polling\n");
flags = irqsave();
flags = enter_critical_section();
/* Ignore the notification if the interface is not yet up */
@@ -1817,7 +1817,7 @@ static int c5471_txavail(struct net_driver_s *dev)
}
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
arch/arm/src/c5471/c5471_serial.c
+4 -4
View File
@@ -641,18 +641,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_disablebreaks(priv);
irqrestore(flags);
leave_critical_section(flags);
}
break;
arch/arm/src/calypso/calypso_irq.c
+1
View File
@@ -45,6 +45,7 @@
#include <stdio.h>
#include <stdint.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
arch/arm/src/calypso/calypso_serial.c
+4 -4
View File
@@ -729,18 +729,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_disablebreaks(priv);
irqrestore(flags);
leave_critical_section(flags);
}
break;
arch/arm/src/common/up_modifyreg16.c
+3 -3
View File
@@ -42,7 +42,7 @@
#include <stdint.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@@ -76,10 +76,10 @@ void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits)
irqstate_t flags;
uint16_t regval;
flags = irqsave();
flags = enter_critical_section();
regval = getreg16(addr);
regval &= ~clearbits;
regval |= setbits;
putreg16(regval, addr);
irqrestore(flags);
leave_critical_section(flags);
}
arch/arm/src/common/up_modifyreg32.c
+3 -3
View File
@@ -42,7 +42,7 @@
#include <stdint.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@@ -76,10 +76,10 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(addr);
regval &= ~clearbits;
regval |= setbits;
putreg32(regval, addr);
irqrestore(flags);
leave_critical_section(flags);
}
arch/arm/src/common/up_modifyreg8.c
+3 -3
View File
@@ -42,7 +42,7 @@
#include <stdint.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@@ -76,10 +76,10 @@ void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits)
irqstate_t flags;
uint8_t regval;
flags = irqsave();
flags = enter_critical_section();
regval = getreg8(addr);
regval &= ~clearbits;
regval |= setbits;
putreg8(regval, addr);
irqrestore(flags);
leave_critical_section(flags);
}
arch/arm/src/dm320/dm320_framebuffer.c
+9 -6
View File
@@ -45,8 +45,9 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/video/fb.h>
#include <nuttx/irq.h>
#include <nuttx/kmalloc.h>
#include <nuttx/video/fb.h>
#include <nuttx/nx/nxglib.h>
#include "up_arch.h"
@@ -1198,7 +1199,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c
}
#endif
flags = irqsave();
flags = enter_critical_section();
for (i = cmap.first, len = 0; i < 256 && len < cmap.len, i++, len++)
{
/* Convert the RGB to YUV */
@@ -1226,6 +1227,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c
putreg16(regval, DM320_OSD_OSDWIN1MD);
#endif
leave_critical_section(flags);
return 0;
}
#endif
@@ -1246,7 +1248,7 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
}
#endif
flags = irqsave();
flags = enter_critical_section();
attrib->pos.x = getreg16(DM320_OSD_CURXP);
attrib->pos.y = getreg16(DM320_OSD_CURYP);
@@ -1254,7 +1256,7 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
attrib->size.w = getreg16(DM320_OSD_CURXL);
attrib->size.h = getreg16(DM320_OSD_CURYL);
#endif
irqrestore(flags);
leave_critical_section(flags);
attrib->mxsize.w = MAX_XRES;
attrib->mxsize.h = MAX_YRES;
@@ -1291,7 +1293,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
/* Set cursor position */
flags = irqsave();
flags = enter_critical_section();
if ((settings->flags & FB_CUR_SETPOSITION) != 0)
{
gvdbg("x=%d y=%d\n", settings->pos.x, settings->pos.y);
@@ -1339,8 +1341,9 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
{
regval &= ~1;
}
putreg16(regval, DM320_OSD_RECTCUR);
irqrestore(flags);
leave_critical_section(flags);
gvdbg("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
gvdbg("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));
arch/arm/src/dm320/dm320_serial.c
+4 -4
View File
@@ -566,18 +566,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv, true);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_enablebreaks(priv, false);
irqrestore(flags);
leave_critical_section(flags);
}
break;
arch/arm/src/dm320/dm320_usbdev.c
+15 -15
View File
@@ -53,7 +53,7 @@
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbdev_trace.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@@ -895,9 +895,9 @@ static void dm320_reqcomplete(struct dm320_ep_s *privep, int16_t result)
/* Remove the completed request at the head of the endpoint request list */
flags = irqsave();
flags = enter_critical_section();
privreq = dm320_rqdequeue(privep);
irqrestore(flags);
leave_critical_section(flags);
if (privreq)
{
@@ -1954,11 +1954,11 @@ static int dm320_epdisable(FAR struct usbdev_ep_s *ep)
/* Cancel any ongoing activity and reset the endpoint */
flags = irqsave();
flags = enter_critical_section();
dm320_cancelrequests(privep);
dm320_epreset(privep->epphy);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -2093,7 +2093,7 @@ static int dm320_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
req->result = -EINPROGRESS;
req->xfrd = 0;
flags = irqsave();
flags = enter_critical_section();
/* Check for NULL packet */
@@ -2152,7 +2152,7 @@ static int dm320_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
}
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@@ -2181,9 +2181,9 @@ static int dm320_epcancel(struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
usbtrace(TRACE_EPCANCEL, privep->epphy);
priv = privep->dev;
flags = irqsave();
flags = enter_critical_section();
dm320_cancelrequests(privep);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -2305,10 +2305,10 @@ static int dm320_getframe(struct usbdev_s *dev)
* because the operation is not atomic.
*/
flags = irqsave();
flags = enter_critical_section();
ret = dm320_getreg8(DM320_USB_FRAME2) << 8;
ret |= dm320_getreg8(DM320_USB_FRAME1);
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@@ -2325,9 +2325,9 @@ static int dm320_wakeup(struct usbdev_s *dev)
irqstate_t flags;
usbtrace(TRACE_DEVWAKEUP, 0);
flags = irqsave();
flags = enter_critical_section();
dm320_putreg8(USB_POWER_RESUME, DM320_USB_POWER);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -2372,7 +2372,7 @@ static int dm320_pullup(struct usbdev_s *dev, bool enable)
usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
GIO_SET_OUTPUT(CONFIG_DM320_GIO_USBDPPULLUP); /* Set D+ pullup */
@@ -2382,7 +2382,7 @@ static int dm320_pullup(struct usbdev_s *dev, bool enable)
GIO_CLEAR_OUTPUT(CONFIG_DM320_GIO_USBDPPULLUP); /* Clear D+ pullup */
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif
arch/arm/src/efm32/efm32_adc.c
+5 -4
View File
@@ -52,6 +52,7 @@
#include <unistd.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/analog/adc.h>
@@ -815,7 +816,7 @@ static void adc_hw_reset(struct efm32_dev_s *priv, bool reset)
* is used by several different drivers.
*/
flags = irqsave();
flags = enter_critical_section();
/* Set or clear the selected bit in the APB2 reset register */
@@ -834,7 +835,7 @@ static void adc_hw_reset(struct efm32_dev_s *priv, bool reset)
}
putreg32(regval, EFM32_RCC_APB2RSTR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -897,7 +898,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
#endif
avdbg("intf: ADC%d\n", priv->intf);
flags = irqsave();
flags = enter_critical_section();
/* Enable ADC reset state */
@@ -1012,7 +1013,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
adc_startconv(priv, true);
irqrestore(flags);
leave_critical_section(flags);
avdbg("SR: 0x%08x CR1: 0x%08x CR2: 0x%08x\n",
adc_getreg(priv, EFM32_ADC_SR_OFFSET),
arch/arm/src/efm32/efm32_dma.c
+7 -6
View File
@@ -46,6 +46,7 @@
#include <assert.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@@ -686,7 +687,7 @@ void efm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
/* Enable DMA completion interrupts */
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(EFM32_DMA_IEN);
regval |= bit;
putreg32(regval, EFM32_DMA_IEN);
@@ -694,7 +695,7 @@ void efm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
/* Enable the channel */
putreg32(bit, EFM32_DMA_CHENS);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -722,7 +723,7 @@ void efm32_dmastop(DMA_HANDLE handle)
/* Disable the channel */
flags = irqsave();
flags = enter_critical_section();
putreg32(bit, EFM32_DMA_CHENC);
/* Disable Channel interrupts */
@@ -730,7 +731,7 @@ void efm32_dmastop(DMA_HANDLE handle)
regval = getreg32(EFM32_DMA_IEN);
regval |= bit;
putreg32(regval, EFM32_DMA_IEN);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -753,7 +754,7 @@ void efm32_dmasample(DMA_HANDLE handle, struct efm32_dmaregs_s *regs)
/* Sample DMA registers. */
flags = irqsave();
flags = enter_critical_section();
regs->status = getreg32(EFM32_DMA_STATUS);
regs->ctrlbase = getreg32(EFM32_DMA_CTRLBASE);
@@ -782,7 +783,7 @@ void efm32_dmasample(DMA_HANDLE handle, struct efm32_dmaregs_s *regs)
regaddr = EFM32_DMA_CHn_CTRL(dmach->chan)
regs->chnctrl = getreg32(regaddr);
irqrestore(flags);
leave_critical_section(flags);
}
#endif
arch/arm/src/efm32/efm32_flash.c
+7 -5
View File
@@ -69,9 +69,11 @@
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
@@ -645,7 +647,7 @@ ssize_t __ramfunc__ up_progmem_erasepage(size_t page)
efm32_flash_unlock();
flags = irqsave();
flags = enter_critical_section();
/* enable writing to the flash */
@@ -706,7 +708,7 @@ ssize_t __ramfunc__ up_progmem_erasepage(size_t page)
}
}
irqrestore(flags);
leave_critical_section(flags);
if (ret != 0)
{
@@ -813,7 +815,7 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size)
page_words = num_words - word_count;
}
flags = irqsave();
flags = enter_critical_section();
/* First we load address. The address is auto-incremented within a page.
* Therefore the address phase is only needed once for each page.
@@ -828,7 +830,7 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size)
ret = msc_load_write_data(p_data, page_words, true);
}
irqrestore(flags);
leave_critical_section(flags);
if (ret != 0)
{
arch/arm/src/efm32/efm32_gpioirq.c
+9 -9
View File
@@ -44,7 +44,7 @@
#include <assert.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "chip/efm32_gpio.h"
@@ -208,7 +208,7 @@ void efm32_gpioirq(gpio_pinset_t pinset)
/* Make sure that the pin interrupt is disabled */
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(EFM32_GPIO_IEN);
regval &= ~bit;
putreg32(regval, EFM32_GPIO_IEN);
@@ -258,7 +258,7 @@ void efm32_gpioirq(gpio_pinset_t pinset)
}
putreg32(regval, EFM32_GPIO_EXTIFALL);
irqrestore(flags);
leave_critical_section(flags);
}
/************************************************************************************
@@ -281,11 +281,11 @@ void efm32_gpioirqenable(int irq)
uint32_t regval;
uint32_t bit;
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(EFM32_GPIO_IEN);
regval |= bit;
putreg32(regval, EFM32_GPIO_IEN);
irqrestore(flags);
leave_critical_section(flags);
#else
bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 1);
#endif
@@ -312,11 +312,11 @@ void efm32_gpioirqdisable(int irq)
uint32_t bit;
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(EFM32_GPIO_IEN);
regval &= ~bit;
putreg32(regval, EFM32_GPIO_IEN);
irqrestore(flags);
leave_critical_section(flags);
#else
bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 0);
#endif
@@ -343,11 +343,11 @@ void efm32_gpioirqclear(int irq)
uint32_t bit;
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(EFM32_GPIO_IFC);
regval |= bit;
putreg32(regval, EFM32_GPIO_IFC);
irqrestore(flags);
leave_critical_section(flags);
#else
bitband_set_peripheral(EFM32_GPIO_IFC, (irq - EFM32_IRQ_EXTI0), 1);
#endif
arch/arm/src/efm32/efm32_i2c.c
+5 -5
View File
@@ -1760,7 +1760,7 @@ FAR struct i2c_master_s *efm32_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = irqsave();
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
{
@@ -1768,7 +1768,7 @@ FAR struct i2c_master_s *efm32_i2cbus_initialize(int port)
efm32_i2c_init(priv);
}
irqrestore(flags);
leave_critical_section(flags);
return (struct i2c_master_s *)priv;
}
@@ -1794,15 +1794,15 @@ int efm32_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
return ERROR;
}
flags = irqsave();
flags = enter_critical_section();
if (--priv->refs)
{
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
irqrestore(flags);
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
arch/arm/src/efm32/efm32_idle.c
+3 -3
View File
@@ -46,7 +46,7 @@
#include <nuttx/board.h>
#include <nuttx/power/pm.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "chip.h"
#include "up_internal.h"
@@ -104,7 +104,7 @@ static void up_idlepm(void)
if (newstate != oldstate)
{
flags = irqsave();
flags = enter_critical_section();
/* Perform board-specific, state-dependent logic here */
@@ -148,7 +148,7 @@ static void up_idlepm(void)
break;
}
irqrestore(flags);
leave_critical_section(flags);
}
}
#else
arch/arm/src/efm32/efm32_irq.c
+3 -3
View File
@@ -45,7 +45,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "nvic.h"
#include "ram_vectors.h"
@@ -112,7 +112,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
@@ -145,7 +145,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
#endif
#endif
#endif
irqrestore(flags);
leave_critical_section(flags);
}
#else
# define efm32_dumpnvic(msg, irq)
arch/arm/src/efm32/efm32_leserial.c
+8 -8
View File
@@ -327,10 +327,10 @@ static void efm32_restoreuartint(struct efm32_leuart_s *priv, uint32_t ien)
/* Re-enable/re-disable interrupts corresponding to the state of bits in ien */
flags = irqsave();
flags = enter_critical_section();
priv->ien = ien;
efm32_setuartint(priv);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -341,14 +341,14 @@ static void efm32_disableuartint(struct efm32_leuart_s *priv, uint32_t *ien)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (ien)
{
*ien = priv->ien;
}
efm32_restoreuartint(priv, 0);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -635,7 +635,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable)
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
@@ -653,7 +653,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable)
efm32_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -700,7 +700,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable)
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Enable the TX interrupt */
@@ -724,7 +724,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable)
efm32_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
arch/arm/src/efm32/efm32_pwm.c
+3 -2
View File
@@ -45,6 +45,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <arch/board/board.h>
@@ -810,7 +811,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
* to prevent any concurrent access to the reset register.
*/
flags = irqsave();
flags = enter_critical_section();
/* Reset the timer - stopping the output and putting the timer back
* into a state where pwm_start() can be called.
@@ -818,7 +819,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
pwm_putreg(priv, EFM32_TIMER_CMD_OFFSET, TIMER_CMD_STOP);
irqrestore(flags);
leave_critical_section(flags);
pwm_dumpregs(priv, "After stop");
return OK;
arch/arm/src/efm32/efm32_rtc_burtc.c
+9 -8
View File
@@ -45,6 +45,7 @@
#include <stdio.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
@@ -333,7 +334,7 @@ static uint64_t efm32_get_burtc_tick(void)
uint64_t val;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
do
{
@@ -353,7 +354,7 @@ static uint64_t efm32_get_burtc_tick(void)
while (getreg32(EFM32_BURTC_IF) & BURTC_IF_COMP0);
irqrestore(flags);
leave_critical_section(flags);
val = (uint64_t)cnt_carry*__CNT_TOP + cnt + cnt_zero;
@@ -477,7 +478,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
uint64_t val;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
cnt_reg = getreg32(EFM32_BURTC_CNT);
@@ -504,7 +505,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
putreg32(cnt_carry, __CNT_CARRY_REG);
putreg32(cnt , __CNT_ZERO_REG);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -552,12 +553,12 @@ int efm32_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback)
/* The set the alarm */
flags = irqsave();
flags = enter_critical_section();
stm32_rtc_beginwr();
putreg16(regvals.cnth, STM32_RTC_ALRH);
putreg16(regvals.cntl, STM32_RTC_ALRL);
stm32_rtc_endwr();
irqrestore(flags);
leave_critical_section(flags);
ret = OK;
}
@@ -595,12 +596,12 @@ int efm32_rtc_cancelalarm(void)
/* Unset the alarm */
flags = irqsave();
flags = enter_critical_section();
stm32_rtc_beginwr();
putreg16(0xffff, STM32_RTC_ALRH);
putreg16(0xffff, STM32_RTC_ALRL);
stm32_rtc_endwr();
irqrestore(flags);
leave_critical_section(flags);
ret = OK;
}
arch/arm/src/efm32/efm32_serial.c
+8 -8
View File
@@ -576,10 +576,10 @@ static void efm32_restoreuartint(struct efm32_usart_s *priv, uint32_t ien)
/* Re-enable/re-disable interrupts corresponding to the state of bits in ien */
flags = irqsave();
flags = enter_critical_section();
priv->ien = ien;
efm32_setuartint(priv);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -591,14 +591,14 @@ static void efm32_disableuartint(struct efm32_usart_s *priv, uint32_t *ien)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (ien)
{
*ien = priv->ien;
}
efm32_restoreuartint(priv, 0);
irqrestore(flags);
leave_critical_section(flags);
}
#endif
@@ -1086,7 +1086,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable)
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
@@ -1104,7 +1104,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable)
efm32_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -1151,7 +1151,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable)
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Enable the TX interrupt */
@@ -1175,7 +1175,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable)
efm32_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
arch/arm/src/efm32/efm32_spi.c
+11 -10
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arm/arm/src/efm32/efm32_spi.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2014 Bouteville Pierre-Noel. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Bouteville Pierre-Noel <pnb990@gmail.com>
@@ -49,6 +49,7 @@
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/wdog.h>
#include <nuttx/clock.h>
@@ -454,7 +455,7 @@ static void spi_dmarxwait(struct efm32_spidev_s *priv)
/* Take the semaphore (perhaps waiting). */
flags = irqsave();
flags = enter_critical_section();
while (sem_wait(&priv->rxdmasem) != 0)
{
/* The only case that an error should occur here is if the wait was
@@ -472,7 +473,7 @@ static void spi_dmarxwait(struct efm32_spidev_s *priv)
wd_cancel(priv->wdog);
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif
@@ -491,7 +492,7 @@ static void spi_dmatxwait(struct efm32_spidev_s *priv)
/* Take the semaphore (perhaps waiting). */
flags = irqsave();
flags = enter_critical_section();
while (sem_wait(&priv->txdmasem) != 0)
{
/* The only case that an error should occur here is if the wait was
@@ -509,7 +510,7 @@ static void spi_dmatxwait(struct efm32_spidev_s *priv)
wd_cancel(priv->wdog);
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif
@@ -1444,7 +1445,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
/* Start the DMAs */
flags = irqsave();
flags = enter_critical_section();
spi_dmarxstart(priv);
spi_dmatxstart(priv);
@@ -1462,7 +1463,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
spi_dmatxwait(priv);
spi_dmarxwait(priv);
irqrestore(flags);
leave_critical_section(flags);
}
}
#endif /* CONFIG_EFM32_SPI_DMA */
@@ -1718,7 +1719,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
{
/* No, then initialize it now */
flags = irqsave();
flags = enter_critical_section();
/* Initialize the state structure */
@@ -1731,14 +1732,14 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
if (ret < 0)
{
spidbg("ERROR: Failed to initialize SPI port %d\n", port);
irqrestore(flags);
leave_critical_section(flags);
return NULL;
}
/* Now we are initialized */
priv->initialized = true;
irqrestore(flags);
leave_critical_section(flags);
}
return (struct spi_dev_s *)priv;
arch/arm/src/efm32/efm32_usbdev.c
+26 -26
View File
@@ -53,7 +53,7 @@
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbdev_trace.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@@ -4030,7 +4030,7 @@ static void efm32_epout_disable(FAR struct efm32_ep_s *privep)
* Global OUT NAK mode in the core.
*/
flags = irqsave();
flags = enter_critical_section();
efm32_enablegonak(privep);
/* Disable the required OUT endpoint by setting the EPDIS and SNAK bits
@@ -4075,7 +4075,7 @@ static void efm32_epout_disable(FAR struct efm32_ep_s *privep)
efm32_req_cancel(privep, -ESHUTDOWN);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -4138,7 +4138,7 @@ static void efm32_epin_disable(FAR struct efm32_ep_s *privep)
* the DIEPCTLx register.
*/
flags = irqsave();
flags = enter_critical_section();
regaddr = EFM32_USB_DIEPCTL(privep->epphy);
regval = efm32_getreg(regaddr);
regval &= ~USB_DIEPCTL_USBACTEP;
@@ -4169,7 +4169,7 @@ static void efm32_epin_disable(FAR struct efm32_ep_s *privep)
/* Cancel any queued write requests */
efm32_req_cancel(privep, -ESHUTDOWN);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -4356,7 +4356,7 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
/* Disable Interrupts */
flags = irqsave();
flags = enter_critical_section();
/* If we are stalled, then drop all requests on the floor */
@@ -4401,7 +4401,7 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
}
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@@ -4428,7 +4428,7 @@ static int efm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
usbtrace(TRACE_EPCANCEL, privep->epphy);
flags = irqsave();
flags = enter_critical_section();
/* FIXME: if the request is the first, then we need to flush the EP
* otherwise just remove it from the list
@@ -4437,7 +4437,7 @@ static int efm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
*/
efm32_req_cancel(privep, -ESHUTDOWN);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -4641,7 +4641,7 @@ static int efm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume)
/* Set or clear the stall condition as requested */
flags = irqsave();
flags = enter_critical_section();
if (resume)
{
ret = efm32_ep_clrstall(privep);
@@ -4650,7 +4650,7 @@ static int efm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume)
{
ret = efm32_ep_setstall(privep);
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@@ -4709,7 +4709,7 @@ static FAR struct usbdev_ep_s *efm32_ep_alloc(FAR struct usbdev_s *dev,
/* Get the set of available endpoints depending on the direction */
flags = irqsave();
flags = enter_critical_section();
epavail = priv->epavail[in];
/* A physical address of 0 means that any endpoint will do */
@@ -4755,7 +4755,7 @@ static FAR struct usbdev_ep_s *efm32_ep_alloc(FAR struct usbdev_s *dev,
/* And return the pointer to the standard endpoint structure */
irqrestore(flags);
leave_critical_section(flags);
return in ? &priv->epin[epno].ep : &priv->epout[epno].ep;
}
}
@@ -4764,7 +4764,7 @@ static FAR struct usbdev_ep_s *efm32_ep_alloc(FAR struct usbdev_s *dev,
}
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_NOEP), (uint16_t)eplog);
irqrestore(flags);
leave_critical_section(flags);
return NULL;
}
@@ -4788,9 +4788,9 @@ static void efm32_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep)
{
/* Mark the endpoint as available */
flags = irqsave();
flags = enter_critical_section();
priv->epavail[privep->isin] |= (1 << privep->epphy);
irqrestore(flags);
leave_critical_section(flags);
}
}
@@ -4832,7 +4832,7 @@ static int efm32_wakeup(struct usbdev_s *dev)
/* Is wakeup enabled? */
flags = irqsave();
flags = enter_critical_section();
if (priv->wakeup)
{
/* Yes... is the core suspended? */
@@ -4858,7 +4858,7 @@ static int efm32_wakeup(struct usbdev_s *dev)
}
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -4902,7 +4902,7 @@ static int efm32_pullup(struct usbdev_s *dev, bool enable)
usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
regval = efm32_getreg(EFM32_USB_DCTL);
if (enable)
{
@@ -4922,7 +4922,7 @@ static int efm32_pullup(struct usbdev_s *dev, bool enable)
}
efm32_putreg(regval, EFM32_USB_DCTL);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -5544,7 +5544,7 @@ void up_usbuninitialize(void)
/* Disconnect device */
flags = irqsave();
flags = enter_critical_section();
efm32_pullup(&priv->usbdev, false);
priv->usbdev.speed = USB_SPEED_UNKNOWN;
@@ -5580,7 +5580,7 @@ void up_usbuninitialize(void)
/* TODO: Turn off USB power and clocking */
priv->devstate = DEVSTATE_DEFAULT;
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -5688,9 +5688,9 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
* canceled while the class driver is still bound.
*/
flags = irqsave();
flags = enter_critical_section();
efm32_usbreset(priv);
irqrestore(flags);
leave_critical_section(flags);
/* Unbind the class driver */
@@ -5698,7 +5698,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
/* Disable USB controller interrupts */
flags = irqsave();
flags = enter_critical_section();
up_disable_irq(EFM32_IRQ_USB);
/* Disconnect device */
@@ -5708,7 +5708,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
/* Unhook the driver */
priv->driver = NULL;
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
arch/arm/src/efm32/efm32_usbhost.c
+16 -16
View File
@@ -57,7 +57,7 @@
#include <nuttx/usb/usbhost_devaddr.h>
#include <nuttx/usb/usbhost_trace.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "chip.h" /* Includes default GPIO settings */
#include <arch/board/board.h> /* May redefine GPIO settings */
@@ -1078,7 +1078,7 @@ static void efm32_chan_halt(FAR struct efm32_usbhost_s *priv, int chidx,
static int efm32_chan_waitsetup(FAR struct efm32_usbhost_s *priv,
FAR struct efm32_chan_s *chan)
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
int ret = -ENODEV;
/* Is the device still connected? */
@@ -1097,7 +1097,7 @@ static int efm32_chan_waitsetup(FAR struct efm32_usbhost_s *priv,
ret = OK;
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@@ -1120,7 +1120,7 @@ static int efm32_chan_asynchsetup(FAR struct efm32_usbhost_s *priv,
FAR struct efm32_chan_s *chan,
usbhost_asynch_t callback, FAR void *arg)
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
int ret = -ENODEV;
/* Is the device still connected? */
@@ -1137,7 +1137,7 @@ static int efm32_chan_asynchsetup(FAR struct efm32_usbhost_s *priv,
ret = OK;
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
#endif
@@ -1165,7 +1165,7 @@ static int efm32_chan_wait(FAR struct efm32_usbhost_s *priv,
* while we wait.
*/
flags = irqsave();
flags = enter_critical_section();
/* Loop, testing for an end of transfer condition. The channel 'result'
* was set to EBUSY and 'waiter' was set to true before the transfer; 'waiter'
@@ -1193,7 +1193,7 @@ static int efm32_chan_wait(FAR struct efm32_usbhost_s *priv,
/* The transfer is complete re-enable interrupts and return the result */
ret = -(int)chan->result;
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@@ -3743,7 +3743,7 @@ static void efm32_txfe_enable(FAR struct efm32_usbhost_s *priv, int chidx)
* (it would be sufficent just to disable the GINT interrupt).
*/
flags = irqsave();
flags = enter_critical_section();
/* Should we enable the periodic or non-peridic Tx FIFO empty interrupts */
@@ -3765,7 +3765,7 @@ static void efm32_txfe_enable(FAR struct efm32_usbhost_s *priv, int chidx)
/* Enable interrupts */
efm32_putreg(EFM32_USB_GINTMSK, regval);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -3806,7 +3806,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
/* Loop until a change in connection state is detected */
flags = irqsave();
flags = enter_critical_section();
for (; ; )
{
/* Is there a change in the connection state of the single root hub
@@ -3825,7 +3825,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
/* And return the root hub port */
*hport = connport;
irqrestore(flags);
leave_critical_section(flags);
uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
@@ -3842,7 +3842,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
priv->hport = NULL;
*hport = connport;
irqrestore(flags);
leave_critical_section(flags);
uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
@@ -4709,7 +4709,7 @@ static int efm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
* completion of the transfer being cancelled.
*/
flags = irqsave();
flags = enter_critical_section();
/* Halt the channel */
@@ -4757,7 +4757,7 @@ static int efm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
}
#endif
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -4799,7 +4799,7 @@ static int efm32_connect(FAR struct usbhost_driver_s *drvr,
/* Report the connection event */
flags = irqsave();
flags = enter_critical_section();
priv->hport = hport;
if (priv->pscwait)
{
@@ -4807,7 +4807,7 @@ static int efm32_connect(FAR struct usbhost_driver_s *drvr,
efm32_givesem(&priv->pscsem);
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif
arch/arm/src/imx/imx_irq.c
+2 -2
View File
@@ -2,7 +2,7 @@
* arch/arm/src/imc/imx_irq.c
* arch/arm/src/chip/imx_irq.c
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -41,7 +41,7 @@
#include <nuttx/config.h>
#include <stdint.h>
#include <nuttx/irq.h>
#include <arch/irq.h>
#include "chip.h"
#include "up_arch.h"
arch/arm/src/imx/imx_spi.c
+3 -3
View File
@@ -49,7 +49,7 @@
#include <nuttx/arch.h>
#include <nuttx/spi/spi.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "up_internal.h"
@@ -541,7 +541,7 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
/* Prime the Tx FIFO to start the sequence (saves one interrupt) */
#ifndef CONFIG_SPI_POLLWAIT
flags = irqsave();
flags = enter_critical_section();
ntxd = spi_performtx(priv);
spi_startxfr(priv, ntxd);
@@ -550,7 +550,7 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
regval = spi_getreg(priv, CSPI_INTCS_OFFSET);
regval |= CSPI_INTCS_TEEN;
spi_putreg(priv, CSPI_INTCS_OFFSET, regval);
irqrestore(flags);
leave_critical_section(flags);
/* Wait for the transfer to complete. Since there is no handshake
* with SPI, the following should complete even if there are problems
arch/arm/src/kinetis/kinetis_enet.c
+4 -4
View File
@@ -1045,7 +1045,7 @@ static int kinetis_ifdown(struct net_driver_s *dev)
/* Disable the Ethernet interrupts at the NVIC */
flags = irqsave();
flags = enter_critical_section();
up_disable_irq(KINETIS_IRQ_EMACTMR);
up_disable_irq(KINETIS_IRQ_EMACTX);
up_disable_irq(KINETIS_IRQ_EMACRX);
@@ -1067,7 +1067,7 @@ static int kinetis_ifdown(struct net_driver_s *dev)
/* Mark the device "down" */
priv->bifup = false;
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@@ -1100,7 +1100,7 @@ static int kinetis_txavail(struct net_driver_s *dev)
* level processing.
*/
flags = irqsave();
flags = enter_critical_section();
/* Ignore the notification if the interface is not yet up */
@@ -1120,7 +1120,7 @@ static int kinetis_txavail(struct net_driver_s *dev)
}
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
arch/arm/src/kinetis/kinetis_irq.c
+2 -2
View File
@@ -108,7 +108,7 @@ static void kinetis_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
@@ -149,7 +149,7 @@ static void kinetis_dumpnvic(const char *msg, int irq)
getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY));
#endif
irqrestore(flags);
leave_critical_section(flags);
}
#else
# define kinetis_dumpnvic(msg, irq)
arch/arm/src/kinetis/kinetis_pinirq.c
+5 -2
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_pinirq.c
*
* Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2011, 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,7 @@
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@@ -286,7 +287,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr)
/* Get the table associated with this port */
DEBUGASSERT(port < KINETIS_NPORTS);
flags = irqsave();
flags = enter_critical_section();
switch (port)
{
#ifdef CONFIG_KINETIS_PORTAINTS
@@ -315,6 +316,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr)
break;
#endif
default:
leave_critical_section(flags);
return NULL;
}
@@ -325,6 +327,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr)
/* And return the old PIN isr address */
leave_critical_section(flags);
return oldisr;
#else
return NULL;
arch/arm/src/kinetis/kinetis_sdhc.c
+9 -9
View File
@@ -54,7 +54,7 @@
#include <nuttx/wqueue.h>
#include <nuttx/mmcsd.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@@ -455,7 +455,7 @@ static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints
* operation.
*/
flags = irqsave();
flags = enter_critical_section();
priv->waitevents = waitevents;
priv->wkupevent = wkupevent;
priv->waitints = waitints;
@@ -464,7 +464,7 @@ static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints
#endif
putreg32(priv->xfrints | priv->waitints | SDHC_INT_CINT,
KINETIS_SDHC_IRQSIGEN);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -485,11 +485,11 @@ static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints
static void kinetis_configxfrints(struct kinetis_dev_s *priv, uint32_t xfrints)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
priv->xfrints = xfrints;
putreg32(priv->xfrints | priv->waitints | SDHC_INT_CINT,
KINETIS_SDHC_IRQSIGEN);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -2881,7 +2881,7 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
/* Update card status */
flags = irqsave();
flags = enter_critical_section();
cdstatus = priv->cdstatus;
if (cardinslot)
{
@@ -2901,7 +2901,7 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
kinetis_callback(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -2927,7 +2927,7 @@ void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
/* Update card status */
flags = irqsave();
flags = enter_critical_section();
if (wrprotect)
{
priv->cdstatus |= SDIO_STATUS_WRPROTECTED;
@@ -2938,6 +2938,6 @@ void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
}
fvdbg("cdstatus: %02x\n", priv->cdstatus);
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_KINETIS_SDHC */
arch/arm/src/kinetis/kinetis_serial.c
+10 -10
View File
@@ -556,12 +556,12 @@ static void up_setuartint(struct up_dev_s *priv)
/* Re-enable/re-disable interrupts corresponding to the state of bits in ie */
flags = irqsave();
flags = enter_critical_section();
regval = up_serialin(priv, KINETIS_UART_C2_OFFSET);
regval &= ~UART_C2_ALLINTS;
regval |= priv->ie;
up_serialout(priv, KINETIS_UART_C2_OFFSET, regval);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -574,10 +574,10 @@ static void up_restoreuartint(struct up_dev_s *priv, uint8_t ie)
/* Re-enable/re-disable interrupts corresponding to the state of bits in ie */
flags = irqsave();
flags = enter_critical_section();
priv->ie = ie & UART_C2_ALLINTS;
up_setuartint(priv);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -588,14 +588,14 @@ static void up_disableuartint(struct up_dev_s *priv, uint8_t *ie)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (ie)
{
*ie = priv->ie;
}
up_restoreuartint(priv, 0);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -1050,7 +1050,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
@@ -1073,7 +1073,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
up_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@@ -1133,7 +1133,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Enable the TX interrupt */
@@ -1157,7 +1157,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
up_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
arch/arm/src/kinetis/kinetis_wdog.c
+3 -3
View File
@@ -40,7 +40,7 @@
#include <nuttx/config.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "kinetis.h"
@@ -80,13 +80,13 @@ static void kinetis_wdunlock(void)
* to assure that the following steps are atomic.
*/
flags = irqsave();
flags = enter_critical_section();
/* Write 0xC520 followed by 0xD928 to the unlock register */
putreg16(0xc520, KINETIS_WDOG_UNLOCK);
putreg16(0xd928, KINETIS_WDOG_UNLOCK);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

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