diff --git a/arch/arm/src/a1x/a1x_irq.c b/arch/arm/src/a1x/a1x_irq.c index de49179bffb..9d2ae9a56ea 100644 --- a/arch/arm/src/a1x/a1x_irq.c +++ b/arch/arm/src/a1x/a1x_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/a1x/a1x_irq.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,7 +45,6 @@ #include #include -#include #include "up_arch.h" #include "up_internal.h" @@ -54,24 +53,12 @@ #include "a1x_pio.h" #include "a1x_irq.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private types - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ volatile uint32_t *current_regs; -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -91,7 +78,7 @@ static void a1x_dumpintc(const char *msg, int irq) /* Dump some relevant ARMv7 register contents */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("ARMv7 (%s, irq=%d):\n", msg, irq); lldbg(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr()); @@ -126,7 +113,7 @@ static void a1x_dumpintc(const char *msg, int irq) getreg32(A1X_INTC_PRIO0), getreg32(A1X_INTC_PRIO1), getreg32(A1X_INTC_PRIO2), getreg32(A1X_INTC_PRIO3), getreg32(A1X_INTC_PRIO4)); - irqrestore(flags); + leave_critical_section(flags); } #else # define a1x_dumpintc(msg, irq) @@ -339,7 +326,7 @@ void up_disable_irq(int irq) { /* These operations must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Make sure that the interrupt is disabled. */ @@ -356,7 +343,7 @@ void up_disable_irq(int irq) putreg32(regval, regaddr); a1x_dumpintc("disable", irq); - irqrestore(flags); + leave_critical_section(flags); } #ifdef CONFIG_A1X_PIO_IRQ @@ -387,7 +374,7 @@ void up_enable_irq(int irq) { /* These operations must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Make sure that the interrupt is enabled. */ @@ -404,7 +391,7 @@ void up_enable_irq(int irq) putreg32(regval, regaddr); a1x_dumpintc("enable", irq); - irqrestore(flags); + leave_critical_section(flags); } #ifdef CONFIG_A1X_PIO_IRQ @@ -440,7 +427,7 @@ int up_prioritize_irq(int irq, int priority) { /* These operations must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Set the new priority */ @@ -451,7 +438,7 @@ int up_prioritize_irq(int irq, int priority) putreg32(regval, regaddr); a1x_dumpintc("prioritize", irq); - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/a1x/a1x_pio.c b/arch/arm/src/a1x/a1x_pio.c index bc80416d870..8016b007594 100644 --- a/arch/arm/src/a1x/a1x_pio.c +++ b/arch/arm/src/a1x/a1x_pio.c @@ -44,6 +44,7 @@ #include #include +#include #include #include @@ -232,7 +233,7 @@ int a1x_pio_config(pio_pinset_t cfgset) /* Disable interrupts to prohibit re-entrance. */ - flags = irqsave(); + flags = enter_critical_section(); /* Set the peripheral ID (0=input, 1=output) and interrupt mode */ @@ -333,7 +334,7 @@ int a1x_pio_config(pio_pinset_t cfgset) putreg32(regval, dataddr); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -355,7 +356,7 @@ void a1x_pio_write(pio_pinset_t pinset, bool value) /* Disable interrupts to prohibit re-entrance. */ - flags = irqsave(); + flags = enter_critical_section(); /* Set the output value (will have no effect on inputs */ @@ -372,7 +373,7 @@ void a1x_pio_write(pio_pinset_t pinset, bool value) } putreg32(regval, regaddr); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -422,10 +423,10 @@ void a1x_pio_irqenable(int irq) * register. */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(A1X_PIO_INT_CTL); regval |= PIO_INT_CTL(irq); - irqrestore(flags); + leave_critical_section(flags); } } #endif @@ -455,10 +456,10 @@ void a1x_pio_irqdisable(int irq) * register. */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(A1X_PIO_INT_CTL); regval &= ~PIO_INT_CTL(irq); - irqrestore(flags); + leave_critical_section(flags); } } #endif diff --git a/arch/arm/src/a1x/a1x_serial.c b/arch/arm/src/a1x/a1x_serial.c index 2fb4a5383b3..225ce8bb620 100644 --- a/arch/arm/src/a1x/a1x_serial.c +++ b/arch/arm/src/a1x/a1x_serial.c @@ -755,7 +755,7 @@ static inline void a1x_uart0config(void) /* Step 1: Enable power to UART0 */ - flags = irqsave(); + flags = enter_critical_section(); #warning Missing logic /* Step 2: Enable clocking to UART0 */ @@ -765,7 +765,7 @@ static inline void a1x_uart0config(void) a1x_pio_config(PIO_UART0_TX); a1x_pio_config(PIO_UART0_RX); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -776,7 +776,7 @@ static inline void a1x_uart1config(void) /* Step 1: Enable power to UART1 */ - flags = irqsave(); + flags = enter_critical_section(); #warning Missing logic /* Step 2: Enable clocking to UART1 */ @@ -786,7 +786,7 @@ static inline void a1x_uart1config(void) a1x_pio_config(PIO_UART1_TX); a1x_pio_config(PIO_UART1_RX); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -797,7 +797,7 @@ static inline void a1x_uart2config(void) /* Step 1: Enable power to UART2 */ - flags = irqsave(); + flags = enter_critical_section(); #warning Missing logic /* Step 2: Enable clocking on UART2 */ @@ -807,7 +807,7 @@ static inline void a1x_uart2config(void) a1x_pio_config(PIO_UART2_TX); a1x_pio_config(PIO_UART2_RX); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -818,7 +818,7 @@ static inline void a1x_uart3config(void) /* Step 1: Enable power to UART3 */ - flags = irqsave(); + flags = enter_critical_section(); #warning Missing logic /* Step 2: Enable clocking to UART3 */ @@ -828,7 +828,7 @@ static inline void a1x_uart3config(void) a1x_pio_config(PIO_UART3_TX); a1x_pio_config(PIO_UART3_RX); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -839,7 +839,7 @@ static inline void a1x_uart4config(void) /* Step 1: Enable power to UART4 */ - flags = irqsave(); + flags = enter_critical_section(); #warning Missing logic /* Step 2: Enable clocking to UART4 */ @@ -849,7 +849,7 @@ static inline void a1x_uart4config(void) a1x_pio_config(PIO_UART4_TX); a1x_pio_config(PIO_UART4_RX); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -860,7 +860,7 @@ static inline void a1x_uart5config(void) /* Step 1: Enable power to UART5 */ - flags = irqsave(); + flags = enter_critical_section(); #warning Missing logic /* Step 2: Enable clocking to UART5 */ @@ -870,7 +870,7 @@ static inline void a1x_uart5config(void) a1x_pio_config(PIO_UART5_TX); a1x_pio_config(PIO_UART5_RX); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -881,7 +881,7 @@ static inline void a1x_uart6config(void) /* Step 1: Enable power to UART6 */ - flags = irqsave(); + flags = enter_critical_section(); #warning Missing logic /* Step 2: Enable clocking to UART6 */ @@ -891,7 +891,7 @@ static inline void a1x_uart6config(void) a1x_pio_config(PIO_UART6_TX); a1x_pio_config(PIO_UART6_RX); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -902,7 +902,7 @@ static inline void a1x_uart7config(void) /* Step 1: Enable power to UART7 */ - flags = irqsave(); + flags = enter_critical_section(); #warning Missing logic /* Step 2: Enable clocking to UART7 */ @@ -912,7 +912,7 @@ static inline void a1x_uart7config(void) a1x_pio_config(PIO_UART7_TX); a1x_pio_config(PIO_UART7_RX); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -1292,18 +1292,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); up_enablebreaks(priv, true); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_enablebreaks(priv, false); - irqrestore(flags); + leave_critical_section(flags); } break; @@ -1466,7 +1466,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { #ifndef CONFIG_SUPPRESS_SERIAL_INTS @@ -1486,7 +1486,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_serialout(priv, A1X_UART_IER_OFFSET, priv->ier); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/arm/up_schedulesigaction.c b/arch/arm/src/arm/up_schedulesigaction.c index 91412d62f9b..c27bd11dfb0 100644 --- a/arch/arm/src/arm/up_schedulesigaction.c +++ b/arch/arm/src/arm/up_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/arm/up_schedulesigaction.c * - * Copyright (C) 2007-2010, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2010, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "arm.h" @@ -52,18 +53,6 @@ #ifndef CONFIG_DISABLE_SIGNALS -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -109,7 +98,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -198,7 +187,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/arm/src/armv6-m/up_dumpnvic.c b/arch/arm/src/armv6-m/up_dumpnvic.c index 5d6be8cabd9..36c2fdf2168 100644 --- a/arch/arm/src/armv6-m/up_dumpnvic.c +++ b/arch/arm/src/armv6-m/up_dumpnvic.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include "up_arch.h" @@ -81,7 +81,7 @@ void up_dumpnvic(FAR const char *msg) /* The following requires exclusive access to the NVIC/SYSCON registers */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC: %s\n", msg); lldbg(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n", @@ -105,7 +105,7 @@ void up_dumpnvic(FAR const char *msg) getreg32(ARMV6M_SYSCON_CCR), getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3)); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DEBUG */ diff --git a/arch/arm/src/armv6-m/up_schedulesigaction.c b/arch/arm/src/armv6-m/up_schedulesigaction.c index 6aa990e7216..9c7cb168783 100644 --- a/arch/arm/src/armv6-m/up_schedulesigaction.c +++ b/arch/arm/src/armv6-m/up_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/armv6-m/up_schedulesigaction.c * - * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "psr.h" @@ -110,7 +111,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -208,7 +209,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/arm/src/armv7-a/arm_addrenv.c b/arch/arm/src/armv7-a/arm_addrenv.c index 3b0617dcfa6..56d4d05ceea 100644 --- a/arch/arm/src/armv7-a/arm_addrenv.c +++ b/arch/arm/src/armv7-a/arm_addrenv.c @@ -115,7 +115,7 @@ #include #include -#include +#include #include "pgalloc.h" #include "cache.h" @@ -169,7 +169,7 @@ static int up_addrenv_initdata(uintptr_t l2table) #endif DEBUGASSERT(l2table); - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_ARCH_PGPOOL_MAPPING /* Get the virtual address corresponding to the physical page table address */ @@ -220,7 +220,7 @@ static int up_addrenv_initdata(uintptr_t l2table) mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); #endif - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif /* CONFIG_BUILD_KERNEL */ diff --git a/arch/arm/src/armv7-a/arm_addrenv_shm.c b/arch/arm/src/armv7-a/arm_addrenv_shm.c index ef5905cc0fb..3bd2715350a 100644 --- a/arch/arm/src/armv7-a/arm_addrenv_shm.c +++ b/arch/arm/src/armv7-a/arm_addrenv_shm.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/armv7/arm_addrenv_shm.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include #include @@ -141,7 +142,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr) * global resources. */ - flags = irqsave(); + flags = enter_critical_section(); group->tg_addrenv.shm[shmndx] = (FAR uintptr_t *)paddr; #ifdef CONFIG_ARCH_PGPOOL_MAPPING @@ -171,7 +172,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr) */ paddr = (uintptr_t)l1entry & ~SECTION_MASK; - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_ARCH_PGPOOL_MAPPING /* Get the virtual address corresponding to the physical page\ @@ -215,7 +216,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr) mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); #endif - irqrestore(flags); + leave_critical_section(flags); } return OK; @@ -282,7 +283,7 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages) */ paddr = (uintptr_t)l1entry & ~SECTION_MASK; - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_ARCH_PGPOOL_MAPPING /* Get the virtual address corresponding to the physical page @@ -333,7 +334,7 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages) mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); #endif - irqrestore(flags); + leave_critical_section(flags); } return OK; diff --git a/arch/arm/src/armv7-a/arm_addrenv_utils.c b/arch/arm/src/armv7-a/arm_addrenv_utils.c index 10a5a5a4d40..fc62c9b1261 100644 --- a/arch/arm/src/armv7-a/arm_addrenv_utils.c +++ b/arch/arm/src/armv7-a/arm_addrenv_utils.c @@ -44,7 +44,7 @@ #include -#include +#include #include "cache.h" #include "mmu.h" @@ -133,7 +133,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen, DEBUGASSERT(MM_ISALIGNED(paddr)); list[i] = (FAR uintptr_t *)paddr; - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_ARCH_PGPOOL_MAPPING /* Get the virtual address corresponding to the physical page address */ @@ -163,7 +163,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen, #ifndef CONFIG_ARCH_PGPOOL_MAPPING mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); #endif - irqrestore(flags); + leave_critical_section(flags); return -ENOMEM; } @@ -187,7 +187,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen, mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); #endif - irqrestore(flags); + leave_critical_section(flags); } return npages; @@ -226,7 +226,7 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen, paddr = (uintptr_t)list[i]; if (paddr != 0) { - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_ARCH_PGPOOL_MAPPING /* Get the virtual address corresponding to the physical page address */ @@ -265,7 +265,7 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen, mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); #endif - irqrestore(flags); + leave_critical_section(flags); /* And free the L2 page table itself */ diff --git a/arch/arm/src/armv7-a/arm_l2cc_pl310.c b/arch/arm/src/armv7-a/arm_l2cc_pl310.c index 7935dd50762..64aeaf3b8bc 100644 --- a/arch/arm/src/armv7-a/arm_l2cc_pl310.c +++ b/arch/arm/src/armv7-a/arm_l2cc_pl310.c @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/armv7-a/chip/arm-l2cc_pl310.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Reference: "CoreLink™ Level 2 Cache Controller L2C-310", Revision r3p2, @@ -48,7 +48,7 @@ #include #include -#include +#include #include "up_arch.h" #include "l2cc.h" @@ -436,10 +436,10 @@ void l2cc_enable(void) /* Invalidate and enable the cache (must be disabled to do this!) */ - flags = irqsave(); + flags = enter_critical_section(); l2cc_invalidate_all(); putreg32(L2CC_CR_L2CEN, L2CC_CR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -462,14 +462,14 @@ void l2cc_disable(void) /* Flush all ways using the Clean Invalidate Way Register (CIWR). */ - flags = irqsave(); + flags = enter_critical_section(); pl310_flush_all(); /* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */ putreg32(0, L2CC_CR); dsb(); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -495,9 +495,9 @@ void l2cc_sync(void) * EB, are empty. */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(0, L2CC_CSR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -521,7 +521,7 @@ void l2cc_invalidate_all(void) /* Invalidate all ways */ - flags = irqsave(); + flags = enter_critical_section(); /* Disable the L2 cache while we invalidate it */ @@ -547,7 +547,7 @@ void l2cc_invalidate_all(void) /* Then re-enable the L2 cache if it was enabled before */ putreg32(regval, L2CC_CR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -574,7 +574,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr) /* Check if the start address is aligned with a cacheline */ - flags = irqsave(); + flags = enter_critical_section(); if ((startaddr & PL310_CACHE_LINE_MASK) != 0) { /* No.. align down and flush the cache line by writing the address to @@ -601,7 +601,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr) putreg32(endaddr, L2CC_CIPALR); } - irqrestore(flags); + leave_critical_section(flags); /* Loop, invalidated the address range by cache line. Interrupts are re- * enabled momentarily every PL310_GULP_SIZE bytes. @@ -619,7 +619,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr) /* Disable interrupts and invalidate the gulp */ - flags = irqsave(); + flags = enter_critical_section(); while (startaddr < gulpend) { /* Invalidate the cache line by writing the address to the @@ -635,16 +635,16 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr) /* Enable interrupts momentarily */ - irqrestore(flags); + leave_critical_section(flags); } /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and * EB, are empty. */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(0, L2CC_CSR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -669,7 +669,7 @@ void l2cc_clean_all(void) * Ways Register (CWR). */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(PL310_WAY_MASK, L2CC_CWR); /* Wait for cache operation by way to complete */ @@ -681,7 +681,7 @@ void l2cc_clean_all(void) */ putreg32(0, L2CC_CSR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -737,7 +737,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr) /* Disable interrupts and clean the gulp */ - flags = irqsave(); + flags = enter_critical_section(); while (startaddr < gulpend) { /* Clean the cache line by writing the address to the Clean @@ -753,16 +753,16 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr) /* Enable interrupts momentarily */ - irqrestore(flags); + leave_critical_section(flags); } /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and * EB, are empty. */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(0, L2CC_CSR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -785,9 +785,9 @@ void l2cc_flush_all(void) /* Flush all ways using the Clean Invalidate Way Register (CIWR). */ - flags = irqsave(); + flags = enter_critical_section(); pl310_flush_all(); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -843,7 +843,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr) /* Disable interrupts and flush the gulp */ - flags = irqsave(); + flags = enter_critical_section(); while (startaddr < gulpend) { /* Flush the cache line by writing the address to the Clean @@ -859,16 +859,16 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr) /* Enable interrupts momentarily */ - irqrestore(flags); + leave_critical_section(flags); } /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and * EB, are empty. */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(0, L2CC_CSR); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_ARMV7A_L2CC_PL310 */ diff --git a/arch/arm/src/armv7-a/arm_pgalloc.c b/arch/arm/src/armv7-a/arm_pgalloc.c index 82ad115660d..d430f8b68b3 100644 --- a/arch/arm/src/armv7-a/arm_pgalloc.c +++ b/arch/arm/src/armv7-a/arm_pgalloc.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/armv7/arm_pgalloc.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include #include @@ -89,7 +90,7 @@ static uintptr_t alloc_pgtable(void) { DEBUGASSERT(MM_ISALIGNED(paddr)); - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_ARCH_PGPOOL_MAPPING /* Get the virtual address corresponding to the physical page address */ @@ -119,7 +120,7 @@ static uintptr_t alloc_pgtable(void) mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); #endif - irqrestore(flags); + leave_critical_section(flags); } return paddr; @@ -258,7 +259,7 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages) return 0; } - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_ARCH_PGPOOL_MAPPING /* Get the virtual address corresponding to the physical page address */ @@ -282,7 +283,7 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages) #ifndef CONFIG_ARCH_PGPOOL_MAPPING mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); #endif - irqrestore(flags); + leave_critical_section(flags); return 0; } @@ -311,7 +312,7 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages) mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); #endif - irqrestore(flags); + leave_critical_section(flags); } return brkaddr; diff --git a/arch/arm/src/armv7-a/arm_schedulesigaction.c b/arch/arm/src/armv7-a/arm_schedulesigaction.c index 46ad11c07c1..678d21cf351 100644 --- a/arch/arm/src/armv7-a/arm_schedulesigaction.c +++ b/arch/arm/src/armv7-a/arm_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/armv7-a/arm_schedulesigaction.c * - * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "arm.h" @@ -109,7 +110,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -197,7 +198,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/arm/src/armv7-a/cache.h b/arch/arm/src/armv7-a/cache.h index 4f64f9d274c..dda36271e2d 100644 --- a/arch/arm/src/armv7-a/cache.h +++ b/arch/arm/src/armv7-a/cache.h @@ -41,6 +41,7 @@ ************************************************************************************/ #include +#include #include "cp15_cacheops.h" #include "l2cc.h" @@ -103,10 +104,10 @@ static inline void arch_invalidate_dcache(uintptr_t start, uintptr_t end) static inline void arch_invalidate_dcache_all(void) { #ifdef CONFIG_ARCH_L2CACHE - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); cp15_invalidate_dcache_all(); l2cc_invalidate_all(); - irqrestore(flags); + leave_critical_section(flags); #else cp15_invalidate_dcache_all(); #endif diff --git a/arch/arm/src/armv7-m/up_ramvec_attach.c b/arch/arm/src/armv7-m/up_ramvec_attach.c index 44ca535692d..f6e20c2cb60 100644 --- a/arch/arm/src/armv7-m/up_ramvec_attach.c +++ b/arch/arm/src/armv7-m/up_ramvec_attach.c @@ -114,7 +114,7 @@ int up_ramvec_attach(int irq, up_vector_t vector) * common exception handler. */ - flags = irqsave(); + flags = enter_critical_section(); if (vector == NULL) { /* Disable the interrupt if we can before detaching it. We might @@ -133,7 +133,7 @@ int up_ramvec_attach(int irq, up_vector_t vector) /* Save the new vector in the vector table */ g_ram_vectors[irq] = vector; - irqrestore(flags); + leave_critical_section(flags); ret = OK; } diff --git a/arch/arm/src/armv7-m/up_schedulesigaction.c b/arch/arm/src/armv7-m/up_schedulesigaction.c index cff165bc1e3..d415fd59288 100644 --- a/arch/arm/src/armv7-m/up_schedulesigaction.c +++ b/arch/arm/src/armv7-m/up_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/armv7-m/up_schedulesigaction.c * - * Copyright (C) 2009-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "psr.h" @@ -99,7 +100,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -213,7 +214,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/arm/src/armv7-r/arm_l2cc_pl310.c b/arch/arm/src/armv7-r/arm_l2cc_pl310.c index 440198e8122..e019e70e95f 100644 --- a/arch/arm/src/armv7-r/arm_l2cc_pl310.c +++ b/arch/arm/src/armv7-r/arm_l2cc_pl310.c @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/armv7-r/chip/arm-l2cc_pl310.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Reference: "CoreLink™ Level 2 Cache Controller L2C-310", Revision r3p2, @@ -48,7 +48,7 @@ #include #include -#include +#include #include "up_arch.h" #include "l2cc.h" @@ -436,10 +436,10 @@ void l2cc_enable(void) /* Invalidate and enable the cache (must be disabled to do this!) */ - flags = irqsave(); + flags = enter_critical_section(); l2cc_invalidate_all(); putreg32(L2CC_CR_L2CEN, L2CC_CR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -462,14 +462,14 @@ void l2cc_disable(void) /* Flush all ways using the Clean Invalidate Way Register (CIWR). */ - flags = irqsave(); + flags = enter_critical_section(); pl310_flush_all(); /* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */ putreg32(0, L2CC_CR); dsb(); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -495,9 +495,9 @@ void l2cc_sync(void) * EB, are empty. */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(0, L2CC_CSR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -521,7 +521,7 @@ void l2cc_invalidate_all(void) /* Invalidate all ways */ - flags = irqsave(); + flags = enter_critical_section(); /* Disable the L2 cache while we invalidate it */ @@ -547,7 +547,7 @@ void l2cc_invalidate_all(void) /* Then re-enable the L2 cache if it was enabled before */ putreg32(regval, L2CC_CR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -574,7 +574,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr) /* Check if the start address is aligned with a cacheline */ - flags = irqsave(); + flags = enter_critical_section(); if ((startaddr & PL310_CACHE_LINE_MASK) != 0) { /* No.. align down and flush the cache line by writing the address to @@ -601,7 +601,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr) putreg32(endaddr, L2CC_CIPALR); } - irqrestore(flags); + leave_critical_section(flags); /* Loop, invalidated the address range by cache line. Interrupts are re- * enabled momentarily every PL310_GULP_SIZE bytes. @@ -619,7 +619,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr) /* Disable interrupts and invalidate the gulp */ - flags = irqsave(); + flags = enter_critical_section(); while (startaddr < gulpend) { /* Invalidate the cache line by writing the address to the @@ -635,16 +635,16 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr) /* Enable interrupts momentarily */ - irqrestore(flags); + leave_critical_section(flags); } /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and * EB, are empty. */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(0, L2CC_CSR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -669,7 +669,7 @@ void l2cc_clean_all(void) * Ways Register (CWR). */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(PL310_WAY_MASK, L2CC_CWR); /* Wait for cache operation by way to complete */ @@ -681,7 +681,7 @@ void l2cc_clean_all(void) */ putreg32(0, L2CC_CSR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -737,7 +737,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr) /* Disable interrupts and clean the gulp */ - flags = irqsave(); + flags = enter_critical_section(); while (startaddr < gulpend) { /* Clean the cache line by writing the address to the Clean @@ -753,16 +753,16 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr) /* Enable interrupts momentarily */ - irqrestore(flags); + leave_critical_section(flags); } /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and * EB, are empty. */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(0, L2CC_CSR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -785,9 +785,9 @@ void l2cc_flush_all(void) /* Flush all ways using the Clean Invalidate Way Register (CIWR). */ - flags = irqsave(); + flags = enter_critical_section(); pl310_flush_all(); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -843,7 +843,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr) /* Disable interrupts and flush the gulp */ - flags = irqsave(); + flags = enter_critical_section(); while (startaddr < gulpend) { /* Flush the cache line by writing the address to the Clean @@ -859,16 +859,16 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr) /* Enable interrupts momentarily */ - irqrestore(flags); + leave_critical_section(flags); } /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and * EB, are empty. */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(0, L2CC_CSR); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_ARMV7R_L2CC_PL310 */ diff --git a/arch/arm/src/armv7-r/arm_schedulesigaction.c b/arch/arm/src/armv7-r/arm_schedulesigaction.c index 204621e1db7..459fa9a0b3b 100644 --- a/arch/arm/src/armv7-r/arm_schedulesigaction.c +++ b/arch/arm/src/armv7-r/arm_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/armv7-r/arm_schedulesigaction.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "arm.h" @@ -97,7 +98,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -185,7 +186,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/arm/src/armv7-r/cache.h b/arch/arm/src/armv7-r/cache.h index ec0a892c3fa..2c60fe2c3d6 100644 --- a/arch/arm/src/armv7-r/cache.h +++ b/arch/arm/src/armv7-r/cache.h @@ -41,6 +41,7 @@ ************************************************************************************/ #include +#include #include "cp15_cacheops.h" #include "l2cc.h" @@ -103,10 +104,10 @@ static inline void arch_invalidate_dcache(uintptr_t start, uintptr_t end) static inline void arch_invalidate_dcache_all(void) { #ifdef CONFIG_ARCH_L2CACHE - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); cp15_invalidate_dcache_all(); l2cc_invalidate_all(); - irqrestore(flags); + leave_critical_section(flags); #else cp15_invalidate_dcache_all(); #endif diff --git a/arch/arm/src/c5471/c5471_ethernet.c b/arch/arm/src/c5471/c5471_ethernet.c index 91b6cb224d9..11c157f35f4 100644 --- a/arch/arm/src/c5471/c5471_ethernet.c +++ b/arch/arm/src/c5471/c5471_ethernet.c @@ -1746,7 +1746,7 @@ static int c5471_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(C5471_IRQ_ETHER); /* Disable interrupts going from EIM Module to Interrupt Module. */ @@ -1770,7 +1770,7 @@ static int c5471_ifdown(struct net_driver_s *dev) /* Reset the device */ c5471->c_bifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -1799,7 +1799,7 @@ static int c5471_txavail(struct net_driver_s *dev) irqstate_t flags; ndbg("Polling\n"); - flags = irqsave(); + flags = enter_critical_section(); /* Ignore the notification if the interface is not yet up */ @@ -1817,7 +1817,7 @@ static int c5471_txavail(struct net_driver_s *dev) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/c5471/c5471_serial.c b/arch/arm/src/c5471/c5471_serial.c index 485ad9de2a6..55cf918f180 100644 --- a/arch/arm/src/c5471/c5471_serial.c +++ b/arch/arm/src/c5471/c5471_serial.c @@ -641,18 +641,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); up_enablebreaks(priv); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disablebreaks(priv); - irqrestore(flags); + leave_critical_section(flags); } break; diff --git a/arch/arm/src/calypso/calypso_irq.c b/arch/arm/src/calypso/calypso_irq.c index 2dd811f3a9c..091110e0fb9 100644 --- a/arch/arm/src/calypso/calypso_irq.c +++ b/arch/arm/src/calypso/calypso_irq.c @@ -45,6 +45,7 @@ #include #include + #include #include diff --git a/arch/arm/src/calypso/calypso_serial.c b/arch/arm/src/calypso/calypso_serial.c index d8e4b7f61f6..344070aacae 100644 --- a/arch/arm/src/calypso/calypso_serial.c +++ b/arch/arm/src/calypso/calypso_serial.c @@ -729,18 +729,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); up_enablebreaks(priv); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disablebreaks(priv); - irqrestore(flags); + leave_critical_section(flags); } break; diff --git a/arch/arm/src/common/up_modifyreg16.c b/arch/arm/src/common/up_modifyreg16.c index 32ebd6f96a9..f5c55bde9d7 100644 --- a/arch/arm/src/common/up_modifyreg16.c +++ b/arch/arm/src/common/up_modifyreg16.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits) irqstate_t flags; uint16_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg16(addr); regval &= ~clearbits; regval |= setbits; putreg16(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/arm/src/common/up_modifyreg32.c b/arch/arm/src/common/up_modifyreg32.c index a8787328475..10f8fedcb16 100644 --- a/arch/arm/src/common/up_modifyreg32.c +++ b/arch/arm/src/common/up_modifyreg32.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(addr); regval &= ~clearbits; regval |= setbits; putreg32(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/arm/src/common/up_modifyreg8.c b/arch/arm/src/common/up_modifyreg8.c index 92ed48eff2b..93cb9f6e27d 100644 --- a/arch/arm/src/common/up_modifyreg8.c +++ b/arch/arm/src/common/up_modifyreg8.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits) irqstate_t flags; uint8_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg8(addr); regval &= ~clearbits; regval |= setbits; putreg8(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/arm/src/dm320/dm320_framebuffer.c b/arch/arm/src/dm320/dm320_framebuffer.c index 8c08138fd86..6a7f44e819a 100644 --- a/arch/arm/src/dm320/dm320_framebuffer.c +++ b/arch/arm/src/dm320/dm320_framebuffer.c @@ -45,8 +45,9 @@ #include #include -#include +#include #include +#include #include #include "up_arch.h" @@ -1198,7 +1199,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c } #endif - flags = irqsave(); + flags = enter_critical_section(); for (i = cmap.first, len = 0; i < 256 && len < cmap.len, i++, len++) { /* Convert the RGB to YUV */ @@ -1226,6 +1227,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c putreg16(regval, DM320_OSD_OSDWIN1MD); #endif + leave_critical_section(flags); return 0; } #endif @@ -1246,7 +1248,7 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora } #endif - flags = irqsave(); + flags = enter_critical_section(); attrib->pos.x = getreg16(DM320_OSD_CURXP); attrib->pos.y = getreg16(DM320_OSD_CURYP); @@ -1254,7 +1256,7 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora attrib->size.w = getreg16(DM320_OSD_CURXL); attrib->size.h = getreg16(DM320_OSD_CURYL); #endif - irqrestore(flags); + leave_critical_section(flags); attrib->mxsize.w = MAX_XRES; attrib->mxsize.h = MAX_YRES; @@ -1291,7 +1293,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs /* Set cursor position */ - flags = irqsave(); + flags = enter_critical_section(); if ((settings->flags & FB_CUR_SETPOSITION) != 0) { gvdbg("x=%d y=%d\n", settings->pos.x, settings->pos.y); @@ -1339,8 +1341,9 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs { regval &= ~1; } + putreg16(regval, DM320_OSD_RECTCUR); - irqrestore(flags); + leave_critical_section(flags); gvdbg("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP)); gvdbg("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP)); diff --git a/arch/arm/src/dm320/dm320_serial.c b/arch/arm/src/dm320/dm320_serial.c index 5f56d6a349f..2b840ab8121 100644 --- a/arch/arm/src/dm320/dm320_serial.c +++ b/arch/arm/src/dm320/dm320_serial.c @@ -566,18 +566,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); up_enablebreaks(priv, true); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_enablebreaks(priv, false); - irqrestore(flags); + leave_critical_section(flags); } break; diff --git a/arch/arm/src/dm320/dm320_usbdev.c b/arch/arm/src/dm320/dm320_usbdev.c index ea7b808cb58..f0f87b7f584 100644 --- a/arch/arm/src/dm320/dm320_usbdev.c +++ b/arch/arm/src/dm320/dm320_usbdev.c @@ -53,7 +53,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -895,9 +895,9 @@ static void dm320_reqcomplete(struct dm320_ep_s *privep, int16_t result) /* Remove the completed request at the head of the endpoint request list */ - flags = irqsave(); + flags = enter_critical_section(); privreq = dm320_rqdequeue(privep); - irqrestore(flags); + leave_critical_section(flags); if (privreq) { @@ -1954,11 +1954,11 @@ static int dm320_epdisable(FAR struct usbdev_ep_s *ep) /* Cancel any ongoing activity and reset the endpoint */ - flags = irqsave(); + flags = enter_critical_section(); dm320_cancelrequests(privep); dm320_epreset(privep->epphy); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2093,7 +2093,7 @@ static int dm320_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r req->result = -EINPROGRESS; req->xfrd = 0; - flags = irqsave(); + flags = enter_critical_section(); /* Check for NULL packet */ @@ -2152,7 +2152,7 @@ static int dm320_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -2181,9 +2181,9 @@ static int dm320_epcancel(struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) usbtrace(TRACE_EPCANCEL, privep->epphy); priv = privep->dev; - flags = irqsave(); + flags = enter_critical_section(); dm320_cancelrequests(privep); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2305,10 +2305,10 @@ static int dm320_getframe(struct usbdev_s *dev) * because the operation is not atomic. */ - flags = irqsave(); + flags = enter_critical_section(); ret = dm320_getreg8(DM320_USB_FRAME2) << 8; ret |= dm320_getreg8(DM320_USB_FRAME1); - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -2325,9 +2325,9 @@ static int dm320_wakeup(struct usbdev_s *dev) irqstate_t flags; usbtrace(TRACE_DEVWAKEUP, 0); - flags = irqsave(); + flags = enter_critical_section(); dm320_putreg8(USB_POWER_RESUME, DM320_USB_POWER); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2372,7 +2372,7 @@ static int dm320_pullup(struct usbdev_s *dev, bool enable) usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); - flags = irqsave(); + flags = enter_critical_section(); if (enable) { GIO_SET_OUTPUT(CONFIG_DM320_GIO_USBDPPULLUP); /* Set D+ pullup */ @@ -2382,7 +2382,7 @@ static int dm320_pullup(struct usbdev_s *dev, bool enable) GIO_CLEAR_OUTPUT(CONFIG_DM320_GIO_USBDPPULLUP); /* Clear D+ pullup */ } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/efm32/efm32_adc.c b/arch/arm/src/efm32/efm32_adc.c index c156ec7872f..102384ff3de 100644 --- a/arch/arm/src/efm32/efm32_adc.c +++ b/arch/arm/src/efm32/efm32_adc.c @@ -52,6 +52,7 @@ #include #include +#include #include #include @@ -815,7 +816,7 @@ static void adc_hw_reset(struct efm32_dev_s *priv, bool reset) * is used by several different drivers. */ - flags = irqsave(); + flags = enter_critical_section(); /* Set or clear the selected bit in the APB2 reset register */ @@ -834,7 +835,7 @@ static void adc_hw_reset(struct efm32_dev_s *priv, bool reset) } putreg32(regval, EFM32_RCC_APB2RSTR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -897,7 +898,7 @@ static void adc_reset(FAR struct adc_dev_s *dev) #endif avdbg("intf: ADC%d\n", priv->intf); - flags = irqsave(); + flags = enter_critical_section(); /* Enable ADC reset state */ @@ -1012,7 +1013,7 @@ static void adc_reset(FAR struct adc_dev_s *dev) adc_startconv(priv, true); - irqrestore(flags); + leave_critical_section(flags); avdbg("SR: 0x%08x CR1: 0x%08x CR2: 0x%08x\n", adc_getreg(priv, EFM32_ADC_SR_OFFSET), diff --git a/arch/arm/src/efm32/efm32_dma.c b/arch/arm/src/efm32/efm32_dma.c index 8980f737908..a96bc160c0d 100644 --- a/arch/arm/src/efm32/efm32_dma.c +++ b/arch/arm/src/efm32/efm32_dma.c @@ -46,6 +46,7 @@ #include #include +#include #include #include "up_arch.h" @@ -686,7 +687,7 @@ void efm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg) /* Enable DMA completion interrupts */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(EFM32_DMA_IEN); regval |= bit; putreg32(regval, EFM32_DMA_IEN); @@ -694,7 +695,7 @@ void efm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg) /* Enable the channel */ putreg32(bit, EFM32_DMA_CHENS); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -722,7 +723,7 @@ void efm32_dmastop(DMA_HANDLE handle) /* Disable the channel */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(bit, EFM32_DMA_CHENC); /* Disable Channel interrupts */ @@ -730,7 +731,7 @@ void efm32_dmastop(DMA_HANDLE handle) regval = getreg32(EFM32_DMA_IEN); regval |= bit; putreg32(regval, EFM32_DMA_IEN); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -753,7 +754,7 @@ void efm32_dmasample(DMA_HANDLE handle, struct efm32_dmaregs_s *regs) /* Sample DMA registers. */ - flags = irqsave(); + flags = enter_critical_section(); regs->status = getreg32(EFM32_DMA_STATUS); regs->ctrlbase = getreg32(EFM32_DMA_CTRLBASE); @@ -782,7 +783,7 @@ void efm32_dmasample(DMA_HANDLE handle, struct efm32_dmaregs_s *regs) regaddr = EFM32_DMA_CHn_CTRL(dmach->chan) regs->chnctrl = getreg32(regaddr); - irqrestore(flags); + leave_critical_section(flags); } #endif diff --git a/arch/arm/src/efm32/efm32_flash.c b/arch/arm/src/efm32/efm32_flash.c index 8f2d5627f06..a35422b73da 100644 --- a/arch/arm/src/efm32/efm32_flash.c +++ b/arch/arm/src/efm32/efm32_flash.c @@ -69,9 +69,11 @@ ************************************************************************************/ #include -#include + #include +#include +#include #include @@ -645,7 +647,7 @@ ssize_t __ramfunc__ up_progmem_erasepage(size_t page) efm32_flash_unlock(); - flags = irqsave(); + flags = enter_critical_section(); /* enable writing to the flash */ @@ -706,7 +708,7 @@ ssize_t __ramfunc__ up_progmem_erasepage(size_t page) } } - irqrestore(flags); + leave_critical_section(flags); if (ret != 0) { @@ -813,7 +815,7 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size) page_words = num_words - word_count; } - flags = irqsave(); + flags = enter_critical_section(); /* First we load address. The address is auto-incremented within a page. * Therefore the address phase is only needed once for each page. @@ -828,7 +830,7 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size) ret = msc_load_write_data(p_data, page_words, true); } - irqrestore(flags); + leave_critical_section(flags); if (ret != 0) { diff --git a/arch/arm/src/efm32/efm32_gpioirq.c b/arch/arm/src/efm32/efm32_gpioirq.c index f778bc894c3..8c3527e9f55 100644 --- a/arch/arm/src/efm32/efm32_gpioirq.c +++ b/arch/arm/src/efm32/efm32_gpioirq.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "up_arch.h" #include "chip/efm32_gpio.h" @@ -208,7 +208,7 @@ void efm32_gpioirq(gpio_pinset_t pinset) /* Make sure that the pin interrupt is disabled */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(EFM32_GPIO_IEN); regval &= ~bit; putreg32(regval, EFM32_GPIO_IEN); @@ -258,7 +258,7 @@ void efm32_gpioirq(gpio_pinset_t pinset) } putreg32(regval, EFM32_GPIO_EXTIFALL); - irqrestore(flags); + leave_critical_section(flags); } /************************************************************************************ @@ -281,11 +281,11 @@ void efm32_gpioirqenable(int irq) uint32_t regval; uint32_t bit; bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0)); - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(EFM32_GPIO_IEN); regval |= bit; putreg32(regval, EFM32_GPIO_IEN); - irqrestore(flags); + leave_critical_section(flags); #else bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 1); #endif @@ -312,11 +312,11 @@ void efm32_gpioirqdisable(int irq) uint32_t bit; bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0)); - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(EFM32_GPIO_IEN); regval &= ~bit; putreg32(regval, EFM32_GPIO_IEN); - irqrestore(flags); + leave_critical_section(flags); #else bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 0); #endif @@ -343,11 +343,11 @@ void efm32_gpioirqclear(int irq) uint32_t bit; bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0)); - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(EFM32_GPIO_IFC); regval |= bit; putreg32(regval, EFM32_GPIO_IFC); - irqrestore(flags); + leave_critical_section(flags); #else bitband_set_peripheral(EFM32_GPIO_IFC, (irq - EFM32_IRQ_EXTI0), 1); #endif diff --git a/arch/arm/src/efm32/efm32_i2c.c b/arch/arm/src/efm32/efm32_i2c.c index 6656aa6a988..3f4638390e6 100644 --- a/arch/arm/src/efm32/efm32_i2c.c +++ b/arch/arm/src/efm32/efm32_i2c.c @@ -1760,7 +1760,7 @@ FAR struct i2c_master_s *efm32_i2cbus_initialize(int port) * power-up hardware and configure GPIOs. */ - flags = irqsave(); + flags = enter_critical_section(); if ((volatile int)priv->refs++ == 0) { @@ -1768,7 +1768,7 @@ FAR struct i2c_master_s *efm32_i2cbus_initialize(int port) efm32_i2c_init(priv); } - irqrestore(flags); + leave_critical_section(flags); return (struct i2c_master_s *)priv; } @@ -1794,15 +1794,15 @@ int efm32_i2cbus_uninitialize(FAR struct i2c_master_s *dev) return ERROR; } - flags = irqsave(); + flags = enter_critical_section(); if (--priv->refs) { - irqrestore(flags); + leave_critical_section(flags); return OK; } - irqrestore(flags); + leave_critical_section(flags); /* Disable power and other HW resource (GPIO's) */ diff --git a/arch/arm/src/efm32/efm32_idle.c b/arch/arm/src/efm32/efm32_idle.c index 9e0c218e0e9..5c3d6270bcf 100644 --- a/arch/arm/src/efm32/efm32_idle.c +++ b/arch/arm/src/efm32/efm32_idle.c @@ -46,7 +46,7 @@ #include #include -#include +#include #include "chip.h" #include "up_internal.h" @@ -104,7 +104,7 @@ static void up_idlepm(void) if (newstate != oldstate) { - flags = irqsave(); + flags = enter_critical_section(); /* Perform board-specific, state-dependent logic here */ @@ -148,7 +148,7 @@ static void up_idlepm(void) break; } - irqrestore(flags); + leave_critical_section(flags); } } #else diff --git a/arch/arm/src/efm32/efm32_irq.c b/arch/arm/src/efm32/efm32_irq.c index 29999b0eb14..5c87e8a336b 100644 --- a/arch/arm/src/efm32/efm32_irq.c +++ b/arch/arm/src/efm32/efm32_irq.c @@ -45,7 +45,7 @@ #include #include -#include +#include #include "nvic.h" #include "ram_vectors.h" @@ -112,7 +112,7 @@ static void efm32_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" INTCTRL: %08x VECTAB: %08x\n", getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); @@ -145,7 +145,7 @@ static void efm32_dumpnvic(const char *msg, int irq) #endif #endif #endif - irqrestore(flags); + leave_critical_section(flags); } #else # define efm32_dumpnvic(msg, irq) diff --git a/arch/arm/src/efm32/efm32_leserial.c b/arch/arm/src/efm32/efm32_leserial.c index 2c8bcf46501..cf6ba14d2b2 100644 --- a/arch/arm/src/efm32/efm32_leserial.c +++ b/arch/arm/src/efm32/efm32_leserial.c @@ -327,10 +327,10 @@ static void efm32_restoreuartint(struct efm32_leuart_s *priv, uint32_t ien) /* Re-enable/re-disable interrupts corresponding to the state of bits in ien */ - flags = irqsave(); + flags = enter_critical_section(); priv->ien = ien; efm32_setuartint(priv); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -341,14 +341,14 @@ static void efm32_disableuartint(struct efm32_leuart_s *priv, uint32_t *ien) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (ien) { *ien = priv->ien; } efm32_restoreuartint(priv, 0); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -635,7 +635,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable) struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Receive an interrupt when their is anything in the Rx data register (or an Rx @@ -653,7 +653,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable) efm32_setuartint(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -700,7 +700,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable) struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Enable the TX interrupt */ @@ -724,7 +724,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable) efm32_setuartint(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/efm32/efm32_pwm.c b/arch/arm/src/efm32/efm32_pwm.c index 3a02c14698a..04941d44344 100644 --- a/arch/arm/src/efm32/efm32_pwm.c +++ b/arch/arm/src/efm32/efm32_pwm.c @@ -45,6 +45,7 @@ #include #include +#include #include #include #include @@ -810,7 +811,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) * to prevent any concurrent access to the reset register. */ - flags = irqsave(); + flags = enter_critical_section(); /* Reset the timer - stopping the output and putting the timer back * into a state where pwm_start() can be called. @@ -818,7 +819,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) pwm_putreg(priv, EFM32_TIMER_CMD_OFFSET, TIMER_CMD_STOP); - irqrestore(flags); + leave_critical_section(flags); pwm_dumpregs(priv, "After stop"); return OK; diff --git a/arch/arm/src/efm32/efm32_rtc_burtc.c b/arch/arm/src/efm32/efm32_rtc_burtc.c index cb493c7e82d..914ebd03ff3 100644 --- a/arch/arm/src/efm32/efm32_rtc_burtc.c +++ b/arch/arm/src/efm32/efm32_rtc_burtc.c @@ -45,6 +45,7 @@ #include #include +#include #include #include @@ -333,7 +334,7 @@ static uint64_t efm32_get_burtc_tick(void) uint64_t val; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); do { @@ -353,7 +354,7 @@ static uint64_t efm32_get_burtc_tick(void) while (getreg32(EFM32_BURTC_IF) & BURTC_IF_COMP0); - irqrestore(flags); + leave_critical_section(flags); val = (uint64_t)cnt_carry*__CNT_TOP + cnt + cnt_zero; @@ -477,7 +478,7 @@ int up_rtc_settime(FAR const struct timespec *tp) uint64_t val; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); cnt_reg = getreg32(EFM32_BURTC_CNT); @@ -504,7 +505,7 @@ int up_rtc_settime(FAR const struct timespec *tp) putreg32(cnt_carry, __CNT_CARRY_REG); putreg32(cnt , __CNT_ZERO_REG); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -552,12 +553,12 @@ int efm32_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) /* The set the alarm */ - flags = irqsave(); + flags = enter_critical_section(); stm32_rtc_beginwr(); putreg16(regvals.cnth, STM32_RTC_ALRH); putreg16(regvals.cntl, STM32_RTC_ALRL); stm32_rtc_endwr(); - irqrestore(flags); + leave_critical_section(flags); ret = OK; } @@ -595,12 +596,12 @@ int efm32_rtc_cancelalarm(void) /* Unset the alarm */ - flags = irqsave(); + flags = enter_critical_section(); stm32_rtc_beginwr(); putreg16(0xffff, STM32_RTC_ALRH); putreg16(0xffff, STM32_RTC_ALRL); stm32_rtc_endwr(); - irqrestore(flags); + leave_critical_section(flags); ret = OK; } diff --git a/arch/arm/src/efm32/efm32_serial.c b/arch/arm/src/efm32/efm32_serial.c index bfcef819fa5..f393f17c83f 100644 --- a/arch/arm/src/efm32/efm32_serial.c +++ b/arch/arm/src/efm32/efm32_serial.c @@ -576,10 +576,10 @@ static void efm32_restoreuartint(struct efm32_usart_s *priv, uint32_t ien) /* Re-enable/re-disable interrupts corresponding to the state of bits in ien */ - flags = irqsave(); + flags = enter_critical_section(); priv->ien = ien; efm32_setuartint(priv); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -591,14 +591,14 @@ static void efm32_disableuartint(struct efm32_usart_s *priv, uint32_t *ien) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (ien) { *ien = priv->ien; } efm32_restoreuartint(priv, 0); - irqrestore(flags); + leave_critical_section(flags); } #endif @@ -1086,7 +1086,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable) struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Receive an interrupt when their is anything in the Rx data register (or an Rx @@ -1104,7 +1104,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable) efm32_setuartint(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1151,7 +1151,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable) struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Enable the TX interrupt */ @@ -1175,7 +1175,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable) efm32_setuartint(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/efm32/efm32_spi.c b/arch/arm/src/efm32/efm32_spi.c index 19668e56d4b..05c0ab7c519 100644 --- a/arch/arm/src/efm32/efm32_spi.c +++ b/arch/arm/src/efm32/efm32_spi.c @@ -1,7 +1,7 @@ /**************************************************************************** * arm/arm/src/efm32/efm32_spi.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2014 Bouteville Pierre-Noel. All rights reserved. * Authors: Gregory Nutt * Bouteville Pierre-Noel @@ -49,6 +49,7 @@ #include #include +#include #include #include #include @@ -454,7 +455,7 @@ static void spi_dmarxwait(struct efm32_spidev_s *priv) /* Take the semaphore (perhaps waiting). */ - flags = irqsave(); + flags = enter_critical_section(); while (sem_wait(&priv->rxdmasem) != 0) { /* The only case that an error should occur here is if the wait was @@ -472,7 +473,7 @@ static void spi_dmarxwait(struct efm32_spidev_s *priv) wd_cancel(priv->wdog); } - irqrestore(flags); + leave_critical_section(flags); } #endif @@ -491,7 +492,7 @@ static void spi_dmatxwait(struct efm32_spidev_s *priv) /* Take the semaphore (perhaps waiting). */ - flags = irqsave(); + flags = enter_critical_section(); while (sem_wait(&priv->txdmasem) != 0) { /* The only case that an error should occur here is if the wait was @@ -509,7 +510,7 @@ static void spi_dmatxwait(struct efm32_spidev_s *priv) wd_cancel(priv->wdog); } - irqrestore(flags); + leave_critical_section(flags); } #endif @@ -1444,7 +1445,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer, /* Start the DMAs */ - flags = irqsave(); + flags = enter_critical_section(); spi_dmarxstart(priv); spi_dmatxstart(priv); @@ -1462,7 +1463,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer, spi_dmatxwait(priv); spi_dmarxwait(priv); - irqrestore(flags); + leave_critical_section(flags); } } #endif /* CONFIG_EFM32_SPI_DMA */ @@ -1718,7 +1719,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port) { /* No, then initialize it now */ - flags = irqsave(); + flags = enter_critical_section(); /* Initialize the state structure */ @@ -1731,14 +1732,14 @@ struct spi_dev_s *efm32_spibus_initialize(int port) if (ret < 0) { spidbg("ERROR: Failed to initialize SPI port %d\n", port); - irqrestore(flags); + leave_critical_section(flags); return NULL; } /* Now we are initialized */ priv->initialized = true; - irqrestore(flags); + leave_critical_section(flags); } return (struct spi_dev_s *)priv; diff --git a/arch/arm/src/efm32/efm32_usbdev.c b/arch/arm/src/efm32/efm32_usbdev.c index 308cd49022a..fb20993657f 100644 --- a/arch/arm/src/efm32/efm32_usbdev.c +++ b/arch/arm/src/efm32/efm32_usbdev.c @@ -53,7 +53,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -4030,7 +4030,7 @@ static void efm32_epout_disable(FAR struct efm32_ep_s *privep) * Global OUT NAK mode in the core. */ - flags = irqsave(); + flags = enter_critical_section(); efm32_enablegonak(privep); /* Disable the required OUT endpoint by setting the EPDIS and SNAK bits @@ -4075,7 +4075,7 @@ static void efm32_epout_disable(FAR struct efm32_ep_s *privep) efm32_req_cancel(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -4138,7 +4138,7 @@ static void efm32_epin_disable(FAR struct efm32_ep_s *privep) * the DIEPCTLx register. */ - flags = irqsave(); + flags = enter_critical_section(); regaddr = EFM32_USB_DIEPCTL(privep->epphy); regval = efm32_getreg(regaddr); regval &= ~USB_DIEPCTL_USBACTEP; @@ -4169,7 +4169,7 @@ static void efm32_epin_disable(FAR struct efm32_ep_s *privep) /* Cancel any queued write requests */ efm32_req_cancel(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -4356,7 +4356,7 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * /* Disable Interrupts */ - flags = irqsave(); + flags = enter_critical_section(); /* If we are stalled, then drop all requests on the floor */ @@ -4401,7 +4401,7 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -4428,7 +4428,7 @@ static int efm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * usbtrace(TRACE_EPCANCEL, privep->epphy); - flags = irqsave(); + flags = enter_critical_section(); /* FIXME: if the request is the first, then we need to flush the EP * otherwise just remove it from the list @@ -4437,7 +4437,7 @@ static int efm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * */ efm32_req_cancel(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4641,7 +4641,7 @@ static int efm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) /* Set or clear the stall condition as requested */ - flags = irqsave(); + flags = enter_critical_section(); if (resume) { ret = efm32_ep_clrstall(privep); @@ -4650,7 +4650,7 @@ static int efm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) { ret = efm32_ep_setstall(privep); } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -4709,7 +4709,7 @@ static FAR struct usbdev_ep_s *efm32_ep_alloc(FAR struct usbdev_s *dev, /* Get the set of available endpoints depending on the direction */ - flags = irqsave(); + flags = enter_critical_section(); epavail = priv->epavail[in]; /* A physical address of 0 means that any endpoint will do */ @@ -4755,7 +4755,7 @@ static FAR struct usbdev_ep_s *efm32_ep_alloc(FAR struct usbdev_s *dev, /* And return the pointer to the standard endpoint structure */ - irqrestore(flags); + leave_critical_section(flags); return in ? &priv->epin[epno].ep : &priv->epout[epno].ep; } } @@ -4764,7 +4764,7 @@ static FAR struct usbdev_ep_s *efm32_ep_alloc(FAR struct usbdev_s *dev, } usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_NOEP), (uint16_t)eplog); - irqrestore(flags); + leave_critical_section(flags); return NULL; } @@ -4788,9 +4788,9 @@ static void efm32_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) { /* Mark the endpoint as available */ - flags = irqsave(); + flags = enter_critical_section(); priv->epavail[privep->isin] |= (1 << privep->epphy); - irqrestore(flags); + leave_critical_section(flags); } } @@ -4832,7 +4832,7 @@ static int efm32_wakeup(struct usbdev_s *dev) /* Is wakeup enabled? */ - flags = irqsave(); + flags = enter_critical_section(); if (priv->wakeup) { /* Yes... is the core suspended? */ @@ -4858,7 +4858,7 @@ static int efm32_wakeup(struct usbdev_s *dev) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4902,7 +4902,7 @@ static int efm32_pullup(struct usbdev_s *dev, bool enable) usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); regval = efm32_getreg(EFM32_USB_DCTL); if (enable) { @@ -4922,7 +4922,7 @@ static int efm32_pullup(struct usbdev_s *dev, bool enable) } efm32_putreg(regval, EFM32_USB_DCTL); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -5544,7 +5544,7 @@ void up_usbuninitialize(void) /* Disconnect device */ - flags = irqsave(); + flags = enter_critical_section(); efm32_pullup(&priv->usbdev, false); priv->usbdev.speed = USB_SPEED_UNKNOWN; @@ -5580,7 +5580,7 @@ void up_usbuninitialize(void) /* TODO: Turn off USB power and clocking */ priv->devstate = DEVSTATE_DEFAULT; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -5688,9 +5688,9 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) * canceled while the class driver is still bound. */ - flags = irqsave(); + flags = enter_critical_section(); efm32_usbreset(priv); - irqrestore(flags); + leave_critical_section(flags); /* Unbind the class driver */ @@ -5698,7 +5698,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Disable USB controller interrupts */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(EFM32_IRQ_USB); /* Disconnect device */ @@ -5708,7 +5708,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Unhook the driver */ priv->driver = NULL; - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/efm32/efm32_usbhost.c b/arch/arm/src/efm32/efm32_usbhost.c index 7a7b0556223..cc9fe1c7d8d 100644 --- a/arch/arm/src/efm32/efm32_usbhost.c +++ b/arch/arm/src/efm32/efm32_usbhost.c @@ -57,7 +57,7 @@ #include #include -#include +#include #include "chip.h" /* Includes default GPIO settings */ #include /* May redefine GPIO settings */ @@ -1078,7 +1078,7 @@ static void efm32_chan_halt(FAR struct efm32_usbhost_s *priv, int chidx, static int efm32_chan_waitsetup(FAR struct efm32_usbhost_s *priv, FAR struct efm32_chan_s *chan) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); int ret = -ENODEV; /* Is the device still connected? */ @@ -1097,7 +1097,7 @@ static int efm32_chan_waitsetup(FAR struct efm32_usbhost_s *priv, ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -1120,7 +1120,7 @@ static int efm32_chan_asynchsetup(FAR struct efm32_usbhost_s *priv, FAR struct efm32_chan_s *chan, usbhost_asynch_t callback, FAR void *arg) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); int ret = -ENODEV; /* Is the device still connected? */ @@ -1137,7 +1137,7 @@ static int efm32_chan_asynchsetup(FAR struct efm32_usbhost_s *priv, ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -1165,7 +1165,7 @@ static int efm32_chan_wait(FAR struct efm32_usbhost_s *priv, * while we wait. */ - flags = irqsave(); + flags = enter_critical_section(); /* Loop, testing for an end of transfer condition. The channel 'result' * was set to EBUSY and 'waiter' was set to true before the transfer; 'waiter' @@ -1193,7 +1193,7 @@ static int efm32_chan_wait(FAR struct efm32_usbhost_s *priv, /* The transfer is complete re-enable interrupts and return the result */ ret = -(int)chan->result; - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -3743,7 +3743,7 @@ static void efm32_txfe_enable(FAR struct efm32_usbhost_s *priv, int chidx) * (it would be sufficent just to disable the GINT interrupt). */ - flags = irqsave(); + flags = enter_critical_section(); /* Should we enable the periodic or non-peridic Tx FIFO empty interrupts */ @@ -3765,7 +3765,7 @@ static void efm32_txfe_enable(FAR struct efm32_usbhost_s *priv, int chidx) /* Enable interrupts */ efm32_putreg(EFM32_USB_GINTMSK, regval); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3806,7 +3806,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn, /* Loop until a change in connection state is detected */ - flags = irqsave(); + flags = enter_critical_section(); for (; ; ) { /* Is there a change in the connection state of the single root hub @@ -3825,7 +3825,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn, /* And return the root hub port */ *hport = connport; - irqrestore(flags); + leave_critical_section(flags); uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO"); return OK; @@ -3842,7 +3842,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn, priv->hport = NULL; *hport = connport; - irqrestore(flags); + leave_critical_section(flags); uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO"); return OK; @@ -4709,7 +4709,7 @@ static int efm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) * completion of the transfer being cancelled. */ - flags = irqsave(); + flags = enter_critical_section(); /* Halt the channel */ @@ -4757,7 +4757,7 @@ static int efm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) } #endif - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4799,7 +4799,7 @@ static int efm32_connect(FAR struct usbhost_driver_s *drvr, /* Report the connection event */ - flags = irqsave(); + flags = enter_critical_section(); priv->hport = hport; if (priv->pscwait) { @@ -4807,7 +4807,7 @@ static int efm32_connect(FAR struct usbhost_driver_s *drvr, efm32_givesem(&priv->pscsem); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/imx/imx_irq.c b/arch/arm/src/imx/imx_irq.c index 13c1a958c99..43f35caf125 100644 --- a/arch/arm/src/imx/imx_irq.c +++ b/arch/arm/src/imx/imx_irq.c @@ -2,7 +2,7 @@ * arch/arm/src/imc/imx_irq.c * arch/arm/src/chip/imx_irq.c * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,7 +41,7 @@ #include #include -#include +#include #include "chip.h" #include "up_arch.h" diff --git a/arch/arm/src/imx/imx_spi.c b/arch/arm/src/imx/imx_spi.c index 7318aecca62..5a17f6523fd 100644 --- a/arch/arm/src/imx/imx_spi.c +++ b/arch/arm/src/imx/imx_spi.c @@ -49,7 +49,7 @@ #include #include -#include +#include #include #include "up_internal.h" @@ -541,7 +541,7 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer, /* Prime the Tx FIFO to start the sequence (saves one interrupt) */ #ifndef CONFIG_SPI_POLLWAIT - flags = irqsave(); + flags = enter_critical_section(); ntxd = spi_performtx(priv); spi_startxfr(priv, ntxd); @@ -550,7 +550,7 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer, regval = spi_getreg(priv, CSPI_INTCS_OFFSET); regval |= CSPI_INTCS_TEEN; spi_putreg(priv, CSPI_INTCS_OFFSET, regval); - irqrestore(flags); + leave_critical_section(flags); /* Wait for the transfer to complete. Since there is no handshake * with SPI, the following should complete even if there are problems diff --git a/arch/arm/src/kinetis/kinetis_enet.c b/arch/arm/src/kinetis/kinetis_enet.c index d9258c26fa6..95e511546ff 100644 --- a/arch/arm/src/kinetis/kinetis_enet.c +++ b/arch/arm/src/kinetis/kinetis_enet.c @@ -1045,7 +1045,7 @@ static int kinetis_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupts at the NVIC */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(KINETIS_IRQ_EMACTMR); up_disable_irq(KINETIS_IRQ_EMACTX); up_disable_irq(KINETIS_IRQ_EMACRX); @@ -1067,7 +1067,7 @@ static int kinetis_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->bifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -1100,7 +1100,7 @@ static int kinetis_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Ignore the notification if the interface is not yet up */ @@ -1120,7 +1120,7 @@ static int kinetis_txavail(struct net_driver_s *dev) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c index 437d2b94b7f..49575a6b1b4 100644 --- a/arch/arm/src/kinetis/kinetis_irq.c +++ b/arch/arm/src/kinetis/kinetis_irq.c @@ -108,7 +108,7 @@ static void kinetis_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" INTCTRL: %08x VECTAB: %08x\n", getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); @@ -149,7 +149,7 @@ static void kinetis_dumpnvic(const char *msg, int irq) getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY)); #endif - irqrestore(flags); + leave_critical_section(flags); } #else # define kinetis_dumpnvic(msg, irq) diff --git a/arch/arm/src/kinetis/kinetis_pinirq.c b/arch/arm/src/kinetis/kinetis_pinirq.c index 9b5724ffc35..3c4da9d3c74 100644 --- a/arch/arm/src/kinetis/kinetis_pinirq.c +++ b/arch/arm/src/kinetis/kinetis_pinirq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/kinetis/kinetis_pinirq.c * - * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "up_arch.h" @@ -286,7 +287,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr) /* Get the table associated with this port */ DEBUGASSERT(port < KINETIS_NPORTS); - flags = irqsave(); + flags = enter_critical_section(); switch (port) { #ifdef CONFIG_KINETIS_PORTAINTS @@ -315,6 +316,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr) break; #endif default: + leave_critical_section(flags); return NULL; } @@ -325,6 +327,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr) /* And return the old PIN isr address */ + leave_critical_section(flags); return oldisr; #else return NULL; diff --git a/arch/arm/src/kinetis/kinetis_sdhc.c b/arch/arm/src/kinetis/kinetis_sdhc.c index b70be54f58e..5af56d50df8 100644 --- a/arch/arm/src/kinetis/kinetis_sdhc.c +++ b/arch/arm/src/kinetis/kinetis_sdhc.c @@ -54,7 +54,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -455,7 +455,7 @@ static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints * operation. */ - flags = irqsave(); + flags = enter_critical_section(); priv->waitevents = waitevents; priv->wkupevent = wkupevent; priv->waitints = waitints; @@ -464,7 +464,7 @@ static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints #endif putreg32(priv->xfrints | priv->waitints | SDHC_INT_CINT, KINETIS_SDHC_IRQSIGEN); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -485,11 +485,11 @@ static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints static void kinetis_configxfrints(struct kinetis_dev_s *priv, uint32_t xfrints) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); priv->xfrints = xfrints; putreg32(priv->xfrints | priv->waitints | SDHC_INT_CINT, KINETIS_SDHC_IRQSIGEN); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2881,7 +2881,7 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) /* Update card status */ - flags = irqsave(); + flags = enter_critical_section(); cdstatus = priv->cdstatus; if (cardinslot) { @@ -2901,7 +2901,7 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) kinetis_callback(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2927,7 +2927,7 @@ void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) /* Update card status */ - flags = irqsave(); + flags = enter_critical_section(); if (wrprotect) { priv->cdstatus |= SDIO_STATUS_WRPROTECTED; @@ -2938,6 +2938,6 @@ void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) } fvdbg("cdstatus: %02x\n", priv->cdstatus); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_KINETIS_SDHC */ diff --git a/arch/arm/src/kinetis/kinetis_serial.c b/arch/arm/src/kinetis/kinetis_serial.c index 3f4e606ce45..42052c6a7dc 100644 --- a/arch/arm/src/kinetis/kinetis_serial.c +++ b/arch/arm/src/kinetis/kinetis_serial.c @@ -556,12 +556,12 @@ static void up_setuartint(struct up_dev_s *priv) /* Re-enable/re-disable interrupts corresponding to the state of bits in ie */ - flags = irqsave(); + flags = enter_critical_section(); regval = up_serialin(priv, KINETIS_UART_C2_OFFSET); regval &= ~UART_C2_ALLINTS; regval |= priv->ie; up_serialout(priv, KINETIS_UART_C2_OFFSET, regval); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -574,10 +574,10 @@ static void up_restoreuartint(struct up_dev_s *priv, uint8_t ie) /* Re-enable/re-disable interrupts corresponding to the state of bits in ie */ - flags = irqsave(); + flags = enter_critical_section(); priv->ie = ie & UART_C2_ALLINTS; up_setuartint(priv); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -588,14 +588,14 @@ static void up_disableuartint(struct up_dev_s *priv, uint8_t *ie) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (ie) { *ie = priv->ie; } up_restoreuartint(priv, 0); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1050,7 +1050,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Receive an interrupt when their is anything in the Rx data register (or an Rx @@ -1073,7 +1073,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) up_setuartint(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1133,7 +1133,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Enable the TX interrupt */ @@ -1157,7 +1157,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_setuartint(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/kinetis/kinetis_wdog.c b/arch/arm/src/kinetis/kinetis_wdog.c index b9d49e42518..9dc29b80d89 100644 --- a/arch/arm/src/kinetis/kinetis_wdog.c +++ b/arch/arm/src/kinetis/kinetis_wdog.c @@ -40,7 +40,7 @@ #include -#include +#include #include "up_arch.h" #include "kinetis.h" @@ -80,13 +80,13 @@ static void kinetis_wdunlock(void) * to assure that the following steps are atomic. */ - flags = irqsave(); + flags = enter_critical_section(); /* Write 0xC520 followed by 0xD928 to the unlock register */ putreg16(0xc520, KINETIS_WDOG_UNLOCK); putreg16(0xd928, KINETIS_WDOG_UNLOCK); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/kl/kl_dumpgpio.c b/arch/arm/src/kl/kl_dumpgpio.c index 9c21e9b851b..b6ea6de6283 100644 --- a/arch/arm/src/kl/kl_dumpgpio.c +++ b/arch/arm/src/kl/kl_dumpgpio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/kl/kl_gpio.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -42,6 +42,7 @@ #include #include +#include #include "up_arch.h" #include "chip.h" @@ -120,7 +121,7 @@ void kl_dumpgpio(gpio_cfgset_t pinset, const char *msg) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("GPIO%c pinset: %08x base: %08x -- %s\n", g_portchar[port], pinset, base, msg); @@ -129,7 +130,7 @@ void kl_dumpgpio(gpio_cfgset_t pinset, const char *msg) getreg32(base + KL_GPIO_PDIR_OFFSET), getreg32(base + KL_GPIO_PDDR_OFFSET)); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DEBUG */ diff --git a/arch/arm/src/kl/kl_idle.c b/arch/arm/src/kl/kl_idle.c index ce7ec7ff356..380291611d2 100644 --- a/arch/arm/src/kl/kl_idle.c +++ b/arch/arm/src/kl/kl_idle.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "chip.h" #include "up_internal.h" @@ -97,7 +97,7 @@ static void up_idlepm(void) if (newstate != oldstate) { - flags = irqsave(); + flags = enter_critical_section(); /* Perform board-specific, state-dependent logic here */ @@ -141,7 +141,7 @@ static void up_idlepm(void) break; } - irqrestore(flags); + leave_critical_section(flags); } } #else diff --git a/arch/arm/src/kl/kl_irq.c b/arch/arm/src/kl/kl_irq.c index 783e6d1a723..9c5ca2e6a61 100644 --- a/arch/arm/src/kl/kl_irq.c +++ b/arch/arm/src/kl/kl_irq.c @@ -89,7 +89,7 @@ static void kl_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" ISER: %08x ICER: %08x\n", @@ -113,7 +113,7 @@ static void kl_dumpnvic(const char *msg, int irq) lldbg(" SHPR2: %08x SHPR3: %08x\n", getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3)); - irqrestore(flags); + leave_critical_section(flags); } #else diff --git a/arch/arm/src/kl/kl_pwm.c b/arch/arm/src/kl/kl_pwm.c index 85a9d80847a..c4714178e4c 100644 --- a/arch/arm/src/kl/kl_pwm.c +++ b/arch/arm/src/kl/kl_pwm.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/kl/kl_pwm.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * Alan Carvalho de Assis * @@ -46,6 +46,7 @@ #include #include +#include #include #include #include @@ -626,7 +627,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) * to prevent any concurrent access to the reset register. */ - flags = irqsave(); + flags = enter_critical_section(); /* Disable further interrupts and stop the timer */ @@ -666,7 +667,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) return -EINVAL; } - irqrestore(flags); + leave_critical_section(flags); pwm_dumpregs(priv, "After stop"); return OK; diff --git a/arch/arm/src/kl/kl_serial.c b/arch/arm/src/kl/kl_serial.c index 8bce6245571..5b4e8f35d6d 100644 --- a/arch/arm/src/kl/kl_serial.c +++ b/arch/arm/src/kl/kl_serial.c @@ -342,12 +342,12 @@ static void up_setuartint(struct up_dev_s *priv) /* Re-enable/re-disable interrupts corresponding to the state of bits in ie */ - flags = irqsave(); + flags = enter_critical_section(); regval = up_serialin(priv, KL_UART_C2_OFFSET); regval &= ~UART_C2_ALLINTS; regval |= priv->ie; up_serialout(priv, KL_UART_C2_OFFSET, regval); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -360,10 +360,10 @@ static void up_restoreuartint(struct up_dev_s *priv, uint8_t ie) /* Re-enable/re-disable interrupts corresponding to the state of bits in ie */ - flags = irqsave(); + flags = enter_critical_section(); priv->ie = ie & UART_C2_ALLINTS; up_setuartint(priv); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -374,14 +374,14 @@ static void up_disableuartint(struct up_dev_s *priv, uint8_t *ie) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (ie) { *ie = priv->ie; } up_restoreuartint(priv, 0); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -697,7 +697,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Receive an interrupt when their is anything in the Rx data register @@ -715,7 +715,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) up_setuartint(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -767,7 +767,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Enable the TX interrupt */ @@ -791,7 +791,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_setuartint(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc11xx/lpc11_gpiodbg.c b/arch/arm/src/lpc11xx/lpc11_gpiodbg.c index 725dae25737..6be8d9c55fe 100644 --- a/arch/arm/src/lpc11xx/lpc11_gpiodbg.c +++ b/arch/arm/src/lpc11xx/lpc11_gpiodbg.c @@ -43,7 +43,7 @@ #include #include #include -#include +#include #include "up_arch.h" #include "chip.h" @@ -156,7 +156,7 @@ int lpc11_dumpgpio(lpc11_pinset_t pinset, const char *msg) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("GPIO%c pin%d (pinset: %08x) -- %s\n", port + '0', pin, pinset, msg); @@ -183,7 +183,7 @@ int lpc11_dumpgpio(lpc11_pinset_t pinset, const char *msg) lldbg(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n", base+LPC11_GPIOINT_INTENR_OFFSET, getreg32(base+LPC11_GPIOINT_INTENR_OFFSET), base+LPC11_GPIOINT_INTENF_OFFSET, getreg32(base+LPC11_GPIOINT_INTENF_OFFSET)); - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif /* CONFIG_DEBUG_GPIO */ diff --git a/arch/arm/src/lpc11xx/lpc11_gpioint.c b/arch/arm/src/lpc11xx/lpc11_gpioint.c index ce2ed33f2b6..4ce6b48c9ed 100644 --- a/arch/arm/src/lpc11xx/lpc11_gpioint.c +++ b/arch/arm/src/lpc11xx/lpc11_gpioint.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -121,7 +121,7 @@ static void lpc11_setintedge(uint32_t intbase, unsigned int pin, /* These must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Set/clear the rising edge enable bit */ @@ -150,7 +150,7 @@ static void lpc11_setintedge(uint32_t intbase, unsigned int pin, } putreg32(regval, intbase + LPC11_GPIOINT_INTENF_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc11xx/lpc11_i2c.c b/arch/arm/src/lpc11xx/lpc11_i2c.c index 66afcde90e0..f838629fb2e 100644 --- a/arch/arm/src/lpc11xx/lpc11_i2c.c +++ b/arch/arm/src/lpc11xx/lpc11_i2c.c @@ -61,7 +61,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -253,10 +253,10 @@ static void lpc11_i2c_timeout(int argc, uint32_t arg, ...) { struct lpc11_i2cdev_s *priv = (struct lpc11_i2cdev_s *)arg; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->state = 0xff; sem_post(&priv->wait); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -492,7 +492,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_LPC11_I2C0 if (port == 0) @@ -580,7 +580,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port) return NULL; } - irqrestore(flags); + leave_critical_section(flags); putreg32(I2C_CONSET_I2EN, priv->base + LPC11_I2C_CONSET_OFFSET); diff --git a/arch/arm/src/lpc11xx/lpc11_irq.c b/arch/arm/src/lpc11xx/lpc11_irq.c index 445f408652f..6d3761e4575 100644 --- a/arch/arm/src/lpc11xx/lpc11_irq.c +++ b/arch/arm/src/lpc11xx/lpc11_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc11xx/lpc11_irq.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -68,10 +68,6 @@ volatile uint32_t *current_regs; -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -89,7 +85,7 @@ static void lpc11_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" ISER: %08x ICER: %08x\n", @@ -113,7 +109,7 @@ static void lpc11_dumpnvic(const char *msg, int irq) lldbg(" SHPR2: %08x SHPR3: %08x\n", getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3)); - irqrestore(flags); + leave_critical_section(flags); } #else diff --git a/arch/arm/src/lpc11xx/lpc11_serial.c b/arch/arm/src/lpc11xx/lpc11_serial.c index e97a57a0dc3..c8fc508e724 100644 --- a/arch/arm/src/lpc11xx/lpc11_serial.c +++ b/arch/arm/src/lpc11xx/lpc11_serial.c @@ -343,7 +343,7 @@ static inline void lpc11_uart0config(void) /* Step 1: Pins configuration */ - flags = irqsave(); + flags = enter_critical_section(); lpc11_configgpio(GPIO_UART0_TXD); lpc11_configgpio(GPIO_UART0_RXD); @@ -356,7 +356,7 @@ static inline void lpc11_uart0config(void) /* Step 3: Enable clocking UART */ putreg32(1, LPC11_SYSCON_UARTCLKDIV); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -682,18 +682,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); up_enablebreaks(priv, true); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_enablebreaks(priv, false); - irqrestore(flags); + leave_critical_section(flags); } break; @@ -863,7 +863,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { #ifndef CONFIG_SUPPRESS_SERIAL_INTS @@ -883,7 +883,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_serialout(priv, LPC11_UART_IER_OFFSET, priv->ier); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc11xx/lpc11_spi.c b/arch/arm/src/lpc11xx/lpc11_spi.c index ac39b52a9b7..178bd77c360 100644 --- a/arch/arm/src/lpc11xx/lpc11_spi.c +++ b/arch/arm/src/lpc11xx/lpc11_spi.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc11xx/lpc11_spi.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -562,7 +563,7 @@ FAR struct spi_dev_s *lpc11_spibus_initialize(int port) * #define GPIO_SPI_SCK GPIO_SPI_SCK_1 */ - flags = irqsave(); + flags = enter_critical_section(); lpc11_configgpio(GPIO_SPI_SCK); lpc11_configgpio(GPIO_SPI_MISO); lpc11_configgpio(GPIO_SPI_MOSI); @@ -579,7 +580,7 @@ FAR struct spi_dev_s *lpc11_spibus_initialize(int port) regval = getreg32(LPC11_SYSCON_PCONP); regval |= SYSCON_PCONP_PCSPI; putreg32(regval, LPC11_SYSCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); /* Configure 8-bit SPI mode and master mode */ diff --git a/arch/arm/src/lpc11xx/lpc11_ssp.c b/arch/arm/src/lpc11xx/lpc11_ssp.c index e6336b0af89..c94eac7692d 100644 --- a/arch/arm/src/lpc11xx/lpc11_ssp.c +++ b/arch/arm/src/lpc11xx/lpc11_ssp.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc11xx/lpc11_ssp.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -812,7 +813,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp0initialize(void) * #define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 */ - flags = irqsave(); + flags = enter_critical_section(); lpc11_configgpio(GPIO_SSP0_SCK); lpc11_configgpio(GPIO_SSP0_MISO); lpc11_configgpio(GPIO_SSP0_MOSI); @@ -831,7 +832,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp0initialize(void) regval = getreg32(LPC11_SYSCON_PCONP); regval |= SYSCON_PCONP_PCSSP0; putreg32(regval, LPC11_SYSCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); return &g_ssp0dev; } @@ -866,7 +867,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp1initialize(void) * #define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 */ - flags = irqsave(); + flags = enter_critical_section(); lpc11_configgpio(GPIO_SSP1_SCK); lpc11_configgpio(GPIO_SSP1_MISO); lpc11_configgpio(GPIO_SSP1_MOSI); @@ -885,7 +886,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp1initialize(void) regval = getreg32(LPC11_SYSCON_PCONP); regval |= SYSCON_PCONP_PCSSP1; putreg32(regval, LPC11_SYSCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); return &g_ssp1dev; } @@ -919,7 +920,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp2initialize(void) * #define GPIO_SSP2_SCK GPIO_SSP2_SCK_1 */ - flags = irqsave(); + flags = enter_critical_section(); lpc11_configgpio(GPIO_SSP2_SCK); lpc11_configgpio(GPIO_SSP2_MISO); lpc11_configgpio(GPIO_SSP2_MOSI); @@ -938,7 +939,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp2initialize(void) regval = getreg32(LPC11_SYSCON_PCONP); regval |= SYSCON_PCONP_PCSSP2; putreg32(regval, LPC11_SYSCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); return &g_ssp2dev; } diff --git a/arch/arm/src/lpc11xx/lpc11_timer.c b/arch/arm/src/lpc11xx/lpc11_timer.c index 6f72540765c..b9106becbcc 100644 --- a/arch/arm/src/lpc11xx/lpc11_timer.c +++ b/arch/arm/src/lpc11xx/lpc11_timer.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc11xx/lpc11_timer.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ #include #include +#include #include #include #include @@ -290,7 +291,7 @@ static int timer_timer(FAR struct lpc11_timer_s *priv, irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); putreg32(info->frequency, LPC11_TMR0_MR1); /* Set TIMER0 MR1 = number of counts */ putreg32(info->frequency, LPC11_TMR1_MR0); /* Set TIMER1 MR0 = number of counts */ @@ -298,7 +299,7 @@ static int timer_timer(FAR struct lpc11_timer_s *priv, putreg32(1, LPC11_TMR0_TCR); /* Start timer0 */ putreg32(1, LPC11_TMR1_TCR); /* Start timer1 */ - irqrestore(flags); + leave_critical_section(flags); timer_dumpregs(priv, "After starting"); return OK; } @@ -385,7 +386,7 @@ static int timer_setup(FAR struct pwm_lowerhalf_s *dev) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); /* Power on the timer peripherals */ @@ -442,7 +443,7 @@ static int timer_setup(FAR struct pwm_lowerhalf_s *dev) /* configure the output pins GPIO3.26 */ // lpc11_configgpio(GPIO_MAT0p1_2); - irqrestore(flags); + leave_critical_section(flags); pwm_dumpgpio(priv->pincfg, "TIMER setup"); return OK; } @@ -530,7 +531,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev) * to prevent any concurrent access to the reset register. */ - flags = irqsave(); + flags = enter_critical_section(); /* Disable further interrupts and stop the timer */ @@ -548,7 +549,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev) * into a state where timer_start() can be called. */ - irqrestore(flags); + leave_critical_section(flags); pwmdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit); timer_dumpregs(priv, "After stop"); diff --git a/arch/arm/src/lpc17xx/lpc17_adc.c b/arch/arm/src/lpc17xx/lpc17_adc.c index 220691ebfa4..9d761c6afad 100644 --- a/arch/arm/src/lpc17xx/lpc17_adc.c +++ b/arch/arm/src/lpc17xx/lpc17_adc.c @@ -7,7 +7,7 @@ * * This file is a part of NuttX: * - * Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2013, 2016 Gregory Nutt. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -53,6 +53,7 @@ #include #include +#include #include #include @@ -152,7 +153,7 @@ static void adc_reset(FAR struct adc_dev_s *dev) uint32_t clkdiv; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCADC; @@ -236,7 +237,7 @@ static void adc_reset(FAR struct adc_dev_s *dev) lpc17_configgpio(GPIO_AD0p7); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -573,7 +574,7 @@ static int adc_interrupt(int irq, void *context) LPC17_ADC_CR); //lpc17_gpiowrite(LPCXPRESSO_GPIO0_21, 0); /* Reset pin P0.21 */ -//irqrestore(saved_state); +//leave_critical_section(saved_state); return OK; #endif /* CONFIG_ADC_BURSTMODE */ } diff --git a/arch/arm/src/lpc17xx/lpc17_can.c b/arch/arm/src/lpc17xx/lpc17_can.c index a2a09058c30..c3949f2778e 100644 --- a/arch/arm/src/lpc17xx/lpc17_can.c +++ b/arch/arm/src/lpc17xx/lpc17_can.c @@ -55,6 +55,7 @@ #include #include +#include #include #include @@ -505,7 +506,7 @@ static void can_reset(FAR struct can_dev_s *dev) canvdbg("CAN%d\n", priv->port); - flags = irqsave(); + flags = enter_critical_section(); /* Disable the CAN and stop ongong transmissions */ @@ -530,7 +531,7 @@ static void can_reset(FAR struct can_dev_s *dev) can_putreg(priv, LPC17_CAN_MOD_OFFSET, 0); /* Leave Reset Mode */ #endif can_putcommon(LPC17_CANAF_AFMR, CANAF_AFMR_ACCBP); /* All RX messages accepted */ - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -620,7 +621,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable) * to protect this code section. */ - flags = irqsave(); + flags = enter_critical_section(); regval = can_getreg(priv, LPC17_CAN_IER_OFFSET); if (enable) { @@ -632,7 +633,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable) } can_putreg(priv, LPC17_CAN_IER_OFFSET, regval); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -668,14 +669,14 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable) * to protect this code section. */ - flags = irqsave(); + flags = enter_critical_section(); /* Disable all TX interrupts */ regval = can_getreg(priv, LPC17_CAN_IER_OFFSET); regval &= ~(CAN_IER_TIE1 | CAN_IER_TIE2 | CAN_IER_TIE3); can_putreg(priv, LPC17_CAN_IER_OFFSET, regval); - irqrestore(flags); + leave_critical_section(flags); } } @@ -780,7 +781,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg) DEBUGASSERT((tid & ~CAN_TID_ID11_MASK) == 0); } - flags = irqsave(); + flags = enter_critical_section(); /* Pick a transmit buffer */ @@ -881,7 +882,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg) ret = -EBUSY; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -1241,7 +1242,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port) canllvdbg("CAN%d\n", port); - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_LPC17_CAN1 if (port == 1) @@ -1299,14 +1300,14 @@ FAR struct can_dev_s *lpc17_caninitialize(int port) #endif { candbg("Unsupported port: %d\n", port); - irqrestore(flags); + leave_critical_section(flags); return NULL; } /* Then just perform a CAN reset operation */ can_reset(candev); - irqrestore(flags); + leave_critical_section(flags); return candev; } #endif diff --git a/arch/arm/src/lpc17xx/lpc17_dac.c b/arch/arm/src/lpc17xx/lpc17_dac.c index adc9db849c5..d5100c5e50a 100644 --- a/arch/arm/src/lpc17xx/lpc17_dac.c +++ b/arch/arm/src/lpc17xx/lpc17_dac.c @@ -7,7 +7,7 @@ * * This file is a part of NuttX: * - * Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2014, 2016 Gregory Nutt. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -53,6 +53,7 @@ #include #include +#include #include #include @@ -117,7 +118,7 @@ static void dac_reset(FAR struct dac_dev_s *dev) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC17_SYSCON_PCLKSEL0); regval &= ~SYSCON_PCLKSEL0_DAC_MASK; @@ -128,7 +129,7 @@ static void dac_reset(FAR struct dac_dev_s *dev) lpc17_configgpio(GPIO_AOUT); - irqrestore(flags); + leave_critical_section(flags); } /* Configure the DAC. This method is called the first time that the DAC diff --git a/arch/arm/src/lpc17xx/lpc17_ethernet.c b/arch/arm/src/lpc17xx/lpc17_ethernet.c index fc30eac4149..993c4296aab 100644 --- a/arch/arm/src/lpc17xx/lpc17_ethernet.c +++ b/arch/arm/src/lpc17xx/lpc17_ethernet.c @@ -1129,14 +1129,14 @@ static void lpc17_rxdone_work(FAR void *arg) * lp-txpending TX underrun state is in effect. */ - flags = irqsave(); + flags = enter_critical_section(); if (!priv->lp_txpending) { priv->lp_inten |= ETH_RXINTS; lpc17_putreg(priv->lp_inten, LPC17_ETH_INTEN); } - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_NET_NOINTS */ @@ -1896,7 +1896,7 @@ static int lpc17_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(LPC17_IRQ_ETH); /* Cancel the TX poll timer and TX timeout timers */ @@ -1908,7 +1908,7 @@ static int lpc17_ifdown(struct net_driver_s *dev) lpc17_ethreset(priv); priv->lp_ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3114,7 +3114,7 @@ static void lpc17_ethreset(struct lpc17_driver_s *priv) /* Reset the MAC */ - flags = irqsave(); + flags = enter_critical_section(); /* Put the MAC into the reset state */ @@ -3164,7 +3164,7 @@ static void lpc17_ethreset(struct lpc17_driver_s *priv) /* Clear any pending interrupts (shouldn't be any) */ lpc17_putreg(0xffffffff, LPC17_ETH_INTCLR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc17xx/lpc17_gpdma.c b/arch/arm/src/lpc17xx/lpc17_gpdma.c index dbecb2ec3ae..4a93267718d 100644 --- a/arch/arm/src/lpc17xx/lpc17_gpdma.c +++ b/arch/arm/src/lpc17xx/lpc17_gpdma.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc17xx/lpc17_gpdma.c * - * Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include "up_internal.h" @@ -136,11 +137,11 @@ static void lpc17_dmainprogress(struct lpc17_dmach_s *dmach) /* Increment the DMA in progress counter */ - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(!dmach->inprogress && g_dma_inprogress < LPC17_NDMACH); g_dma_inprogress++; dmach->inprogress = true; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -167,7 +168,7 @@ static void lpc17_dmadone(struct lpc17_dmach_s *dmach) /* Increment the DMA in progress counter */ - flags = irqsave(); + flags = enter_critical_section(); if (dmach->inprogress) { DEBUGASSERT(g_dma_inprogress > 0); @@ -175,7 +176,7 @@ static void lpc17_dmadone(struct lpc17_dmach_s *dmach) g_dma_inprogress--; } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc17xx/lpc17_gpiodbg.c b/arch/arm/src/lpc17xx/lpc17_gpiodbg.c index 16d3a3fd86e..fc6ce33162b 100644 --- a/arch/arm/src/lpc17xx/lpc17_gpiodbg.c +++ b/arch/arm/src/lpc17xx/lpc17_gpiodbg.c @@ -43,7 +43,7 @@ #include #include #include -#include +#include #include "up_arch.h" #include "chip.h" @@ -156,7 +156,7 @@ int lpc17_dumpgpio(lpc17_pinset_t pinset, const char *msg) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("GPIO%c pin%d (pinset: %08x) -- %s\n", port + '0', pin, pinset, msg); @@ -183,7 +183,7 @@ int lpc17_dumpgpio(lpc17_pinset_t pinset, const char *msg) lldbg(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n", base+LPC17_GPIOINT_INTENR_OFFSET, getreg32(base+LPC17_GPIOINT_INTENR_OFFSET), base+LPC17_GPIOINT_INTENF_OFFSET, getreg32(base+LPC17_GPIOINT_INTENF_OFFSET)); - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif /* CONFIG_DEBUG_GPIO */ diff --git a/arch/arm/src/lpc17xx/lpc17_gpioint.c b/arch/arm/src/lpc17xx/lpc17_gpioint.c index 1fa18a36819..46acb05e6fa 100644 --- a/arch/arm/src/lpc17xx/lpc17_gpioint.c +++ b/arch/arm/src/lpc17xx/lpc17_gpioint.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -121,7 +121,7 @@ static void lpc17_setintedge(uint32_t intbase, unsigned int pin, /* These must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Set/clear the rising edge enable bit */ @@ -150,7 +150,7 @@ static void lpc17_setintedge(uint32_t intbase, unsigned int pin, } putreg32(regval, intbase + LPC17_GPIOINT_INTENF_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc17xx/lpc17_i2c.c b/arch/arm/src/lpc17xx/lpc17_i2c.c index b195dd88da7..9b106fdda4e 100644 --- a/arch/arm/src/lpc17xx/lpc17_i2c.c +++ b/arch/arm/src/lpc17xx/lpc17_i2c.c @@ -61,7 +61,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -253,10 +253,10 @@ static void lpc17_i2c_timeout(int argc, uint32_t arg, ...) { struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *)arg; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->state = 0xff; sem_post(&priv->wait); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -492,7 +492,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_LPC17_I2C0 if (port == 0) @@ -585,7 +585,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port) return NULL; } - irqrestore(flags); + leave_critical_section(flags); putreg32(I2C_CONSET_I2EN, priv->base + LPC17_I2C_CONSET_OFFSET); diff --git a/arch/arm/src/lpc17xx/lpc17_irq.c b/arch/arm/src/lpc17xx/lpc17_irq.c index 1804f4193d4..295f6359430 100644 --- a/arch/arm/src/lpc17xx/lpc17_irq.c +++ b/arch/arm/src/lpc17xx/lpc17_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc17/lpc17_irq.c * - * Copyright (C) 2010-2011, 2013-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2010-2011, 2013-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -105,7 +105,7 @@ static void lpc17_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" INTCTRL: %08x VECTAB: %08x\n", getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); @@ -127,7 +127,7 @@ static void lpc17_dumpnvic(const char *msg, int irq) lldbg(" %08x %08x %08x %08x\n", getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY), getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY)); - irqrestore(flags); + leave_critical_section(flags); } #else # define lpc17_dumpnvic(msg, irq) diff --git a/arch/arm/src/lpc17xx/lpc17_mcpwm.c b/arch/arm/src/lpc17xx/lpc17_mcpwm.c index 26fe1410960..f8d552941b0 100644 --- a/arch/arm/src/lpc17xx/lpc17_mcpwm.c +++ b/arch/arm/src/lpc17xx/lpc17_mcpwm.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc17xx/lpc17_mcpwm.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ #include #include +#include #include #include #include @@ -291,12 +292,12 @@ static int mcpwm_timer(FAR struct lpc17_mcpwmtimer_s *priv, irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); putreg32(info->frequency, LPC17_MCPWM_LIM0); /* Set PWMMR0 = number of counts */ putreg32(info->duty, LPC17_MCPWM_MAT0); /* Set PWM cycle */ - irqrestore(flags); + leave_critical_section(flags); mcpwm_dumpregs(priv, "After starting"); return OK; } @@ -423,7 +424,7 @@ static int mcpwm_setup(FAR struct pwm_lowerhalf_s *dev) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); /* Power on the mcpwm peripheral */ @@ -493,7 +494,7 @@ static int mcpwm_setup(FAR struct pwm_lowerhalf_s *dev) putreg32((1 << 0), LPC17_MCPWM_CONSET); /* Start MCPWM timer0 */ - irqrestore(flags); + leave_critical_section(flags); pwm_dumpgpio(priv->pincfg, "PWM setup"); return OK; } @@ -581,7 +582,7 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev) * to prevent any concurrent access to the reset register. */ - flags = irqsave(); + flags = enter_critical_section(); /* Disable further interrupts and stop the timer */ @@ -599,7 +600,7 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev) * into a state where mcpwm_start() can be called. */ - irqrestore(flags); + leave_critical_section(flags); pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit); mcpwm_dumpregs(priv, "After stop"); diff --git a/arch/arm/src/lpc17xx/lpc17_pwm.c b/arch/arm/src/lpc17xx/lpc17_pwm.c index 273f3ed3133..4f8c79315c6 100644 --- a/arch/arm/src/lpc17xx/lpc17_pwm.c +++ b/arch/arm/src/lpc17xx/lpc17_pwm.c @@ -45,6 +45,7 @@ #include #include +#include #include #include #include @@ -305,7 +306,7 @@ static int pwm_timer(FAR struct lpc17_pwmtimer_s *priv, { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); putreg32(info->frequency, LPC17_PWM1_MR0); /* Set PWMMR0 = number of counts */ putreg32(info->duty, LPC17_PWM1_MR1); /* Set PWM cycle */ @@ -314,7 +315,7 @@ static int pwm_timer(FAR struct lpc17_pwmtimer_s *priv, putreg32(PWMENA1, LPC17_PWM1_PCR); /* Enable PWM outputs */ putreg32(TCR_CNT_EN | TCR_PWM_EN, LPC17_PWM1_TCR); /* Enable PWM Timer */ - irqrestore(flags); + leave_critical_section(flags); pwm_dumpregs(priv, "After starting"); return OK; } @@ -441,7 +442,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); /* Power on the pwm peripheral */ @@ -464,7 +465,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev) putreg32(1, LPC17_PWM1_PR); /* Prescaler count frequency: Fpclk/1 */ putreg32(1 << 1, LPC17_PWM1_MCR); /* Reset on match register MR0 */ - irqrestore(flags); + leave_critical_section(flags); pwm_dumpgpio(priv->pincfg, "PWM setup"); return OK; } @@ -552,7 +553,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) * to prevent any concurrent access to the reset register. */ - flags = irqsave(); + flags = enter_critical_section(); /* Disable further interrupts and stop the timer */ @@ -570,7 +571,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) * into a state where pwm_start() can be called. */ - irqrestore(flags); + leave_critical_section(flags); pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit); pwm_dumpregs(priv, "After stop"); diff --git a/arch/arm/src/lpc17xx/lpc17_sdcard.c b/arch/arm/src/lpc17xx/lpc17_sdcard.c index 80ab3727ffd..e6cb9fafd7e 100644 --- a/arch/arm/src/lpc17xx/lpc17_sdcard.c +++ b/arch/arm/src/lpc17xx/lpc17_sdcard.c @@ -54,7 +54,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -560,7 +560,7 @@ static void lpc17_configwaitints(struct lpc17_dev_s *priv, uint32_t waitmask, * operation. */ - flags = irqsave(); + flags = enter_critical_section(); priv->waitevents = waitevents; priv->wkupevent = wkupevent; priv->waitmask = waitmask; @@ -568,7 +568,7 @@ static void lpc17_configwaitints(struct lpc17_dev_s *priv, uint32_t waitmask, priv->xfrflags = 0; #endif putreg32(priv->xfrmask | priv->waitmask, LPC17_SDCARD_MASK0); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -589,10 +589,10 @@ static void lpc17_configwaitints(struct lpc17_dev_s *priv, uint32_t waitmask, static void lpc17_configxfrints(struct lpc17_dev_s *priv, uint32_t xfrmask) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); priv->xfrmask = xfrmask; putreg32(priv->xfrmask | priv->waitmask, LPC17_SDCARD_MASK0); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1436,7 +1436,7 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev) /* Disable clocking */ - flags = irqsave(); + flags = enter_critical_section(); /* Disable the SD Interface */ @@ -1478,7 +1478,7 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev) lpc17_setclock(LPC17_CLCKCR_INIT | SDCARD_CLOCK_CLKEN); lpc17_setpwrctrl(SDCARD_PWR_CTRL_ON); - irqrestore(flags); + leave_critical_section(flags); fvdbg("CLCKR: %08x POWER: %08x\n", getreg32(LPC17_SDCARD_CLOCK), getreg32(LPC17_SDCARD_PWR)); @@ -2241,7 +2241,7 @@ static sdio_eventset_t lpc17_eventwait(FAR struct sdio_dev_s *dev, * be non-zero (and, hopefully, the semaphore count will also be non-zero. */ - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(priv->waitevents != 0 || priv->wkupevent != 0); /* Check if the timeout event is specified in the event set */ @@ -2309,7 +2309,7 @@ static sdio_eventset_t lpc17_eventwait(FAR struct sdio_dev_s *dev, #endif errout: - irqrestore(flags); + leave_critical_section(flags); lpc17_dumpsamples(priv); return wkupevent; } @@ -2771,7 +2771,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) /* Update card status */ - flags = irqsave(); + flags = enter_critical_section(); cdstatus = priv->cdstatus; if (cardinslot) { @@ -2789,7 +2789,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) { lpc17_callback(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2815,7 +2815,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) /* Update card status */ - flags = irqsave(); + flags = enter_critical_section(); if (wrprotect) { priv->cdstatus |= SDIO_STATUS_WRPROTECTED; @@ -2825,6 +2825,6 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED; } fvdbg("cdstatus: %02x\n", priv->cdstatus); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_LPC17_SDCARD */ diff --git a/arch/arm/src/lpc17xx/lpc17_serial.c b/arch/arm/src/lpc17xx/lpc17_serial.c index 2c2e773502b..a4303401758 100644 --- a/arch/arm/src/lpc17xx/lpc17_serial.c +++ b/arch/arm/src/lpc17xx/lpc17_serial.c @@ -690,7 +690,7 @@ static inline void lpc17_uart0config(void) /* Step 1: Enable power on UART0 */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCUART0; putreg32(regval, LPC17_SYSCON_PCONP); @@ -708,7 +708,7 @@ static inline void lpc17_uart0config(void) lpc17_configgpio(GPIO_UART0_TXD); lpc17_configgpio(GPIO_UART0_RXD); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -720,7 +720,7 @@ static inline void lpc17_uart1config(void) /* Step 1: Enable power on UART1 */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCUART1; putreg32(regval, LPC17_SYSCON_PCONP); @@ -748,7 +748,7 @@ static inline void lpc17_uart1config(void) lpc17_configgpio(GPIO_UART1_RI); #endif #endif - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -760,7 +760,7 @@ static inline void lpc17_uart2config(void) /* Step 1: Enable power on UART2 */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCUART2; putreg32(regval, LPC17_SYSCON_PCONP); @@ -778,7 +778,7 @@ static inline void lpc17_uart2config(void) lpc17_configgpio(GPIO_UART2_TXD); lpc17_configgpio(GPIO_UART2_RXD); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -790,7 +790,7 @@ static inline void lpc17_uart3config(void) /* Step 1: Enable power on UART3 */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCUART3; putreg32(regval, LPC17_SYSCON_PCONP); @@ -808,7 +808,7 @@ static inline void lpc17_uart3config(void) lpc17_configgpio(GPIO_UART3_TXD); lpc17_configgpio(GPIO_UART3_RXD); - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -1196,18 +1196,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); up_enablebreaks(priv, true); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_enablebreaks(priv, false); - irqrestore(flags); + leave_critical_section(flags); } break; @@ -1377,7 +1377,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { #ifndef CONFIG_SUPPRESS_SERIAL_INTS @@ -1397,7 +1397,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_serialout(priv, LPC17_UART_IER_OFFSET, priv->ier); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc17xx/lpc17_spi.c b/arch/arm/src/lpc17xx/lpc17_spi.c index 5ada9849c91..c915d1dfc23 100644 --- a/arch/arm/src/lpc17xx/lpc17_spi.c +++ b/arch/arm/src/lpc17xx/lpc17_spi.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc17xx/lpc17_spi.c * - * Copyright (C) 2010, 2012-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2012-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -553,7 +554,7 @@ FAR struct spi_dev_s *lpc17_spibus_initialize(int port) * #define GPIO_SPI_SCK GPIO_SPI_SCK_1 */ - flags = irqsave(); + flags = enter_critical_section(); lpc17_configgpio(GPIO_SPI_SCK); lpc17_configgpio(GPIO_SPI_MISO); lpc17_configgpio(GPIO_SPI_MOSI); @@ -570,7 +571,7 @@ FAR struct spi_dev_s *lpc17_spibus_initialize(int port) regval = getreg32(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCSPI; putreg32(regval, LPC17_SYSCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); /* Configure 8-bit SPI mode and master mode */ diff --git a/arch/arm/src/lpc17xx/lpc17_ssp.c b/arch/arm/src/lpc17xx/lpc17_ssp.c index 656ed4d185c..9cdee092423 100644 --- a/arch/arm/src/lpc17xx/lpc17_ssp.c +++ b/arch/arm/src/lpc17xx/lpc17_ssp.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc17xx/lpc17_ssp.c * - * Copyright (C) 2010-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2010-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -801,7 +802,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp0initialize(void) * #define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 */ - flags = irqsave(); + flags = enter_critical_section(); lpc17_configgpio(GPIO_SSP0_SCK); lpc17_configgpio(GPIO_SSP0_MISO); lpc17_configgpio(GPIO_SSP0_MOSI); @@ -820,7 +821,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp0initialize(void) regval = getreg32(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCSSP0; putreg32(regval, LPC17_SYSCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); return &g_ssp0dev; } @@ -855,7 +856,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp1initialize(void) * #define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 */ - flags = irqsave(); + flags = enter_critical_section(); lpc17_configgpio(GPIO_SSP1_SCK); lpc17_configgpio(GPIO_SSP1_MISO); lpc17_configgpio(GPIO_SSP1_MOSI); @@ -874,7 +875,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp1initialize(void) regval = getreg32(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCSSP1; putreg32(regval, LPC17_SYSCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); return &g_ssp1dev; } @@ -908,7 +909,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp2initialize(void) * #define GPIO_SSP2_SCK GPIO_SSP2_SCK_1 */ - flags = irqsave(); + flags = enter_critical_section(); lpc17_configgpio(GPIO_SSP2_SCK); lpc17_configgpio(GPIO_SSP2_MISO); lpc17_configgpio(GPIO_SSP2_MOSI); @@ -927,7 +928,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp2initialize(void) regval = getreg32(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCSSP2; putreg32(regval, LPC17_SYSCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); return &g_ssp2dev; } diff --git a/arch/arm/src/lpc17xx/lpc17_timer.c b/arch/arm/src/lpc17xx/lpc17_timer.c index 5869a3188d0..b4a821ffc0b 100644 --- a/arch/arm/src/lpc17xx/lpc17_timer.c +++ b/arch/arm/src/lpc17xx/lpc17_timer.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc17xx/lpc17_timer.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ #include #include +#include #include #include #include @@ -290,7 +291,7 @@ static int timer_timer(FAR struct lpc17_timer_s *priv, irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); putreg32(info->frequency, LPC17_TMR0_MR1); /* Set TIMER0 MR1 = number of counts */ putreg32(info->frequency, LPC17_TMR1_MR0); /* Set TIMER1 MR0 = number of counts */ @@ -298,7 +299,7 @@ static int timer_timer(FAR struct lpc17_timer_s *priv, putreg32(1, LPC17_TMR0_TCR); /* Start timer0 */ putreg32(1, LPC17_TMR1_TCR); /* Start timer1 */ - irqrestore(flags); + leave_critical_section(flags); timer_dumpregs(priv, "After starting"); return OK; } @@ -385,7 +386,7 @@ static int timer_setup(FAR struct pwm_lowerhalf_s *dev) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); /* Power on the timer peripherals */ @@ -442,7 +443,7 @@ static int timer_setup(FAR struct pwm_lowerhalf_s *dev) /* configure the output pins GPIO3.26 */ // lpc17_configgpio(GPIO_MAT0p1_2); - irqrestore(flags); + leave_critical_section(flags); pwm_dumpgpio(priv->pincfg, "TIMER setup"); return OK; } @@ -530,7 +531,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev) * to prevent any concurrent access to the reset register. */ - flags = irqsave(); + flags = enter_critical_section(); /* Disable further interrupts and stop the timer */ @@ -548,7 +549,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev) * into a state where timer_start() can be called. */ - irqrestore(flags); + leave_critical_section(flags); pwmdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit); timer_dumpregs(priv, "After stop"); diff --git a/arch/arm/src/lpc17xx/lpc17_usbdev.c b/arch/arm/src/lpc17xx/lpc17_usbdev.c index 5463f28935e..9995e03cdad 100644 --- a/arch/arm/src/lpc17xx/lpc17_usbdev.c +++ b/arch/arm/src/lpc17xx/lpc17_usbdev.c @@ -53,7 +53,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -659,7 +659,7 @@ static uint32_t lpc17_usbcmd(uint16_t cmd, uint8_t data) /* Disable interrupt and clear CDFULL and CCEMPTY interrupt status */ - flags = irqsave(); + flags = enter_critical_section(); lpc17_putreg(USBDEV_INT_CDFULL | USBDEV_INT_CCEMPTY, LPC17_USBDEV_INTCLR); /* Shift the command in position and mask out extra bits */ @@ -782,7 +782,7 @@ static uint32_t lpc17_usbcmd(uint16_t cmd, uint8_t data) /* Restore the interrupt flags */ - irqrestore(flags); + leave_critical_section(flags); return tmp; } @@ -1022,9 +1022,9 @@ static void lpc17_reqcomplete(struct lpc17_ep_s *privep, int16_t result) /* Remove the completed request at the head of the endpoint request list */ - flags = irqsave(); + flags = enter_critical_section(); privreq = lpc17_rqdequeue(privep); - irqrestore(flags); + leave_critical_section(flags); if (privreq) { @@ -2622,7 +2622,7 @@ static int lpc17_epdisable(FAR struct usbdev_ep_s *ep) /* Cancel any ongoing activity */ - flags = irqsave(); + flags = enter_critical_section(); lpc17_cancelrequests(privep); /* Disable endpoint and interrupt */ @@ -2637,7 +2637,7 @@ static int lpc17_epdisable(FAR struct usbdev_ep_s *ep) regval &= ~mask; lpc17_putreg(regval, LPC17_USBDEV_EPINTEN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2815,7 +2815,7 @@ static int lpc17_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r req->result = -EINPROGRESS; req->xfrd = 0; - flags = irqsave(); + flags = enter_critical_section(); /* If we are stalled, then drop all requests on the floor */ @@ -2861,7 +2861,7 @@ static int lpc17_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -2888,9 +2888,9 @@ static int lpc17_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r usbtrace(TRACE_EPCANCEL, privep->epphy); - flags = irqsave(); + flags = enter_critical_section(); lpc17_cancelrequests(privep); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2909,7 +2909,7 @@ static int lpc17_epstall(FAR struct usbdev_ep_s *ep, bool resume) /* STALL or RESUME the endpoint */ - flags = irqsave(); + flags = enter_critical_section(); usbtrace(resume ? TRACE_EPRESUME : TRACE_EPSTALL, privep->epphy); lpc17_usbcmd(CMD_USBDEV_EPSETSTATUS | privep->epphy, (resume ? 0 : CMD_SETSTAUS_ST)); @@ -2919,7 +2919,7 @@ static int lpc17_epstall(FAR struct usbdev_ep_s *ep, bool resume) { (void)lpc17_wrrequest(privep); } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3021,7 +3021,7 @@ static FAR struct usbdev_ep_s *lpc17_allocep(FAR struct usbdev_s *dev, uint8_t e { /* Yes.. now see if any of the request endpoints are available */ - flags = irqsave(); + flags = enter_critical_section(); epset &= priv->epavail; if (epset) { @@ -3035,7 +3035,7 @@ static FAR struct usbdev_ep_s *lpc17_allocep(FAR struct usbdev_s *dev, uint8_t e /* Mark the IN/OUT endpoint no longer available */ priv->epavail &= ~(3 << (bit & ~1)); - irqrestore(flags); + leave_critical_section(flags); /* And return the pointer to the standard endpoint structure */ @@ -3044,7 +3044,7 @@ static FAR struct usbdev_ep_s *lpc17_allocep(FAR struct usbdev_s *dev, uint8_t e } /* Shouldn't get here */ } - irqrestore(flags); + leave_critical_section(flags); } usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_NOEP), (uint16_t)eplog); @@ -3071,9 +3071,9 @@ static void lpc17_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) { /* Mark the endpoint as available */ - flags = irqsave(); + flags = enter_critical_section(); priv->epavail |= (1 << privep->epphy); - irqrestore(flags); + leave_critical_section(flags); } } @@ -3117,14 +3117,14 @@ static int lpc17_wakeup(struct usbdev_s *dev) usbtrace(TRACE_DEVWAKEUP, (uint16_t)g_usbdev.devstatus); - flags = irqsave(); + flags = enter_critical_section(); if (DEVSTATUS_CONNECT(g_usbdev.devstatus)) { arg |= CMD_STATUS_CONNECT; } lpc17_usbcmd(CMD_USBDEV_SETSTATUS, arg); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3201,7 +3201,7 @@ void up_usbinitialize(void) /* Step 1: Enable power by setting PCUSB in the PCONP register */ - flags = irqsave(); + flags = enter_critical_section(); regval = lpc17_getreg(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCUSB; lpc17_putreg(regval, LPC17_SYSCON_PCONP); @@ -3240,7 +3240,7 @@ void up_usbinitialize(void) regval = lpc17_getreg(LPC17_SYSCON_USBINTST); regval &= ~SYSCON_USBINTST_ENINTS; lpc17_putreg(regval, LPC17_SYSCON_USBINTST); - irqrestore(flags); + leave_critical_section(flags); /* Initialize the device state structure */ @@ -3325,11 +3325,11 @@ void up_usbinitialize(void) * driver */ - flags = irqsave(); + flags = enter_critical_section(); regval = lpc17_getreg(LPC17_SYSCON_USBINTST); regval |= SYSCON_USBINTST_ENINTS; lpc17_putreg(regval, LPC17_SYSCON_USBINTST); - irqrestore(flags); + leave_critical_section(flags); /* Disconnect device */ @@ -3373,7 +3373,7 @@ void up_usbuninitialize(void) /* Disconnect device */ - flags = irqsave(); + flags = enter_critical_section(); lpc17_pullup(&priv->usbdev, false); priv->usbdev.speed = USB_SPEED_UNKNOWN; lpc17_usbcmd(CMD_USBDEV_CONFIG, 0); @@ -3388,7 +3388,7 @@ void up_usbuninitialize(void) regval = lpc17_getreg(LPC17_SYSCON_PCONP); regval &= ~SYSCON_PCONP_PCUSB; lpc17_putreg(regval, LPC17_SYSCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc17xx/lpc17_usbhost.c b/arch/arm/src/lpc17xx/lpc17_usbhost.c index 0c13c7be3b0..94003be06d7 100644 --- a/arch/arm/src/lpc17xx/lpc17_usbhost.c +++ b/arch/arm/src/lpc17xx/lpc17_usbhost.c @@ -56,7 +56,7 @@ #include #include -#include +#include #include /* May redefine GPIO settings */ @@ -660,14 +660,14 @@ static struct lpc17_gtd_s *lpc17_tdalloc(void) * interrupt handler. */ - flags = irqsave(); + flags = enter_critical_section(); ret = (struct lpc17_gtd_s *)g_tdfree; if (ret) { g_tdfree = ((struct lpc17_list_s *)ret)->flink; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -759,14 +759,14 @@ static uint8_t *lpc17_allocio(void) /* lpc17_freeio() may be called from the interrupt level */ - flags = irqsave(); + flags = enter_critical_section(); ret = (uint8_t *)g_iofree; if (ret) { g_iofree = ((struct lpc17_list_s *)ret)->flink; } - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -787,11 +787,11 @@ static void lpc17_freeio(uint8_t *buffer) /* Could be called from the interrupt level */ - flags = irqsave(); + flags = enter_critical_section(); iofree = (struct lpc17_list_s *)buffer; iofree->flink = g_iofree; g_iofree = iofree; - irqrestore(flags); + leave_critical_section(flags); } #endif @@ -814,14 +814,14 @@ static struct lpc17_xfrinfo_s *lpc17_alloc_xfrinfo(void) /* lpc17_free_xfrinfo() may be called from the interrupt level */ - flags = irqsave(); + flags = enter_critical_section(); ret = (struct lpc17_xfrinfo_s *)g_xfrfree; if (ret) { g_xfrfree = ((struct lpc17_list_s *)ret)->flink; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -840,11 +840,11 @@ static void lpc17_free_xfrinfo(struct lpc17_xfrinfo_s *xfrinfo) /* Could be called from the interrupt level */ - flags = irqsave(); + flags = enter_critical_section(); node = (struct lpc17_list_s *)xfrinfo; node->flink = g_xfrfree; g_xfrfree = node; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -863,7 +863,7 @@ static inline int lpc17_addctrled(struct lpc17_usbhost_s *priv, /* Disable control list processing while we modify the list */ - flags = irqsave(); + flags = enter_critical_section(); regval = lpc17_getreg(LPC17_USBHOST_CTRL); regval &= ~OHCI_CTRL_CLE; lpc17_putreg(regval, LPC17_USBHOST_CTRL); @@ -881,7 +881,7 @@ static inline int lpc17_addctrled(struct lpc17_usbhost_s *priv, regval |= OHCI_CTRL_CLE; lpc17_putreg(regval, LPC17_USBHOST_CTRL); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -904,7 +904,7 @@ static inline int lpc17_remctrled(struct lpc17_usbhost_s *priv, /* Disable control list processing while we modify the list */ - flags = irqsave(); + flags = enter_critical_section(); regval = lpc17_getreg(LPC17_USBHOST_CTRL); regval &= ~OHCI_CTRL_CLE; lpc17_putreg(regval, LPC17_USBHOST_CTRL); @@ -963,7 +963,7 @@ static inline int lpc17_remctrled(struct lpc17_usbhost_s *priv, lpc17_putreg(regval, LPC17_USBHOST_CTRL); } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -984,7 +984,7 @@ static inline int lpc17_addbulked(struct lpc17_usbhost_s *priv, /* Disable bulk list processing while we modify the list */ - flags = irqsave(); + flags = enter_critical_section(); regval = lpc17_getreg(LPC17_USBHOST_CTRL); regval &= ~OHCI_CTRL_BLE; lpc17_putreg(regval, LPC17_USBHOST_CTRL); @@ -1002,7 +1002,7 @@ static inline int lpc17_addbulked(struct lpc17_usbhost_s *priv, regval |= OHCI_CTRL_BLE; lpc17_putreg(regval, LPC17_USBHOST_CTRL); - irqrestore(flags); + leave_critical_section(flags); return OK; #else return -ENOSYS; @@ -1029,7 +1029,7 @@ static inline int lpc17_rembulked(struct lpc17_usbhost_s *priv, /* Disable bulk list processing while we modify the list */ - flags = irqsave(); + flags = enter_critical_section(); regval = lpc17_getreg(LPC17_USBHOST_CTRL); regval &= ~OHCI_CTRL_BLE; lpc17_putreg(regval, LPC17_USBHOST_CTRL); @@ -1082,7 +1082,7 @@ static inline int lpc17_rembulked(struct lpc17_usbhost_s *priv, lpc17_putreg(regval, LPC17_USBHOST_CTRL); } - irqrestore(flags); + leave_critical_section(flags); return OK; #else return -ENOSYS; @@ -1494,7 +1494,7 @@ static int lpc17_enqueuetd(struct lpc17_usbhost_s *priv, static int lpc17_wdhwait(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed) { struct lpc17_xfrinfo_s *xfrinfo; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); int ret = -ENODEV; DEBUGASSERT(ed && ed->xfrinfo); @@ -1512,7 +1512,7 @@ static int lpc17_wdhwait(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed) ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -1942,7 +1942,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn, struct usbhost_hubport_s *connport; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); for (; ; ) { /* Is there a change in the connection state of the single root hub @@ -1965,7 +1965,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn, /* And return the root hub port */ *hport = connport; - irqrestore(flags); + leave_critical_section(flags); udbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO"); @@ -1985,7 +1985,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn, priv->hport = NULL; *hport = connport; - irqrestore(flags); + leave_critical_section(flags); udbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO"); return OK; @@ -2856,7 +2856,7 @@ static void lpc17_dma_free(struct lpc17_usbhost_s *priv, /* Could be called from the interrupt level */ - flags = irqsave(); + flags = enter_critical_section(); if (userbuffer && newbuffer) { /* If this is an IN transaction, get the user data from the AHB @@ -2875,7 +2875,7 @@ static void lpc17_dma_free(struct lpc17_usbhost_s *priv, lpc17_freeio(newbuffer); } - irqrestore(flags); + leave_critical_section(flags); } #endif @@ -3313,7 +3313,7 @@ static int lpc17_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) /* These first steps must be atomic as possible */ - flags = irqsave(); + flags = enter_critical_section(); /* It is possible there there is no transfer to be in progress */ @@ -3417,7 +3417,7 @@ static int lpc17_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) /* Determine the return value */ - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3458,7 +3458,7 @@ static int lpc17_connect(FAR struct usbhost_driver_s *drvr, /* Report the connection event */ - flags = irqsave(); + flags = enter_critical_section(); priv->hport = hport; if (priv->pscwait) { @@ -3466,7 +3466,7 @@ static int lpc17_connect(FAR struct usbhost_driver_s *drvr, lpc17_givesem(&priv->pscsem); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif @@ -3644,11 +3644,11 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller) * because this register may be shared with other drivers. */ - flags = irqsave(); + flags = enter_critical_section(); regval = lpc17_getreg(LPC17_SYSCON_PCONP); regval |= SYSCON_PCONP_PCUSB; lpc17_putreg(regval, LPC17_SYSCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); /* Enable clocking on USB (USB PLL clocking was initialized in very low- * evel clock setup logic (see lpc17_clockconfig.c)). We do still need @@ -3833,11 +3833,11 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller) * because this register may be shared with other drivers. */ - flags = irqsave(); + flags = enter_critical_section(); regval = lpc17_getreg(LPC17_SYSCON_USBINTST); regval |= SYSCON_USBINTST_ENINTS; lpc17_putreg(regval, LPC17_SYSCON_USBINTST); - irqrestore(flags); + leave_critical_section(flags); /* If there is a USB device in the slot at power up, then we will not * get the status change interrupt to signal us that the device is diff --git a/arch/arm/src/lpc214x/lpc214x_irq.c b/arch/arm/src/lpc214x/lpc214x_irq.c index 3c12b75d91d..6542243245c 100644 --- a/arch/arm/src/lpc214x/lpc214x_irq.c +++ b/arch/arm/src/lpc214x/lpc214x_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc214x/lpc214x_irq.c * - * Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009, 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -153,7 +153,7 @@ void up_enable_irq(int irq) { /* Disable all interrupts */ - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); /* Enable the irq by setting the corresponding bit in the VIC * Interrupt Enable register. @@ -161,7 +161,7 @@ void up_enable_irq(int irq) uint32_t val = vic_getreg(LPC214X_VIC_INTENABLE_OFFSET); vic_putreg(val | (1 << irq), LPC214X_VIC_INTENABLE_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } } @@ -184,7 +184,7 @@ void up_attach_vector(int irq, int vector, vic_vector_t handler) /* Disable all interrupts */ - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); /* Save the vector address */ @@ -194,7 +194,7 @@ void up_attach_vector(int irq, int vector, vic_vector_t handler) vic_putreg(((irq << LPC214X_VECTCNTL_IRQSHIFT) | LPC214X_VECTCNTL_ENABLE), LPC214X_VIC_VECTCNTL0_OFFSET + offset); - irqrestore(flags); + leave_critical_section(flags); } } #endif diff --git a/arch/arm/src/lpc214x/lpc214x_serial.c b/arch/arm/src/lpc214x/lpc214x_serial.c index 4da47327573..a3cc08157ca 100644 --- a/arch/arm/src/lpc214x/lpc214x_serial.c +++ b/arch/arm/src/lpc214x/lpc214x_serial.c @@ -590,18 +590,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); up_enablebreaks(priv, true); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_enablebreaks(priv, false); - irqrestore(flags); + leave_critical_section(flags); } break; diff --git a/arch/arm/src/lpc214x/lpc214x_usbdev.c b/arch/arm/src/lpc214x/lpc214x_usbdev.c index 1ceb9c807e2..5c058a6bc3b 100644 --- a/arch/arm/src/lpc214x/lpc214x_usbdev.c +++ b/arch/arm/src/lpc214x/lpc214x_usbdev.c @@ -53,7 +53,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -609,7 +609,7 @@ static uint32_t lpc214x_usbcmd(uint16_t cmd, uint8_t data) /* Disable interrupt and clear CDFULL and CCEMPTY interrupt status */ - flags = irqsave(); + flags = enter_critical_section(); lpc214x_putreg(USBDEV_DEVINT_CDFULL | USBDEV_DEVINT_CCEMTY, LPC214X_USBDEV_DEVINTCLR); @@ -727,7 +727,7 @@ static uint32_t lpc214x_usbcmd(uint16_t cmd, uint8_t data) /* Restore the interrupt flags */ - irqrestore(flags); + leave_critical_section(flags); return tmp; } @@ -967,9 +967,9 @@ static void lpc214x_reqcomplete(struct lpc214x_ep_s *privep, int16_t result) /* Remove the completed request at the head of the endpoint request list */ - flags = irqsave(); + flags = enter_critical_section(); privreq = lpc214x_rqdequeue(privep); - irqrestore(flags); + leave_critical_section(flags); if (privreq) { @@ -2588,7 +2588,7 @@ static int lpc214x_epdisable(FAR struct usbdev_ep_s *ep) /* Cancel any ongoing activity */ - flags = irqsave(); + flags = enter_critical_section(); lpc214x_cancelrequests(privep); /* Disable endpoint and interrupt */ @@ -2603,7 +2603,7 @@ static int lpc214x_epdisable(FAR struct usbdev_ep_s *ep) reg &= ~mask; lpc214x_putreg(reg, LPC214X_USBDEV_EPINTEN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2781,7 +2781,7 @@ static int lpc214x_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s req->result = -EINPROGRESS; req->xfrd = 0; - flags = irqsave(); + flags = enter_critical_section(); /* If we are stalled, then drop all requests on the floor */ @@ -2827,7 +2827,7 @@ static int lpc214x_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -2853,9 +2853,9 @@ static int lpc214x_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s #endif usbtrace(TRACE_EPCANCEL, privep->epphy); - flags = irqsave(); + flags = enter_critical_section(); lpc214x_cancelrequests(privep); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2874,7 +2874,7 @@ static int lpc214x_epstall(FAR struct usbdev_ep_s *ep, bool resume) /* STALL or RESUME the endpoint */ - flags = irqsave(); + flags = enter_critical_section(); usbtrace(resume ? TRACE_EPRESUME : TRACE_EPSTALL, privep->epphy); lpc214x_usbcmd(CMD_USB_EP_SETSTATUS | privep->epphy, (resume ? 0 : USBDEV_EPSTALL)); @@ -2884,7 +2884,7 @@ static int lpc214x_epstall(FAR struct usbdev_ep_s *ep, bool resume) { (void)lpc214x_wrrequest(privep); } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2986,7 +2986,7 @@ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, uint8_t { /* Yes.. now see if any of the request endpoints are available */ - flags = irqsave(); + flags = enter_critical_section(); epset &= priv->epavail; if (epset) { @@ -3000,7 +3000,7 @@ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, uint8_t /* Mark the IN/OUT endpoint no longer available */ priv->epavail &= ~(3 << (bit & ~1)); - irqrestore(flags); + leave_critical_section(flags); /* And return the pointer to the standard endpoint structure */ @@ -3009,7 +3009,7 @@ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, uint8_t } /* Shouldn't get here */ } - irqrestore(flags); + leave_critical_section(flags); } usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_NOEP), (uint16_t)eplog); @@ -3036,9 +3036,9 @@ static void lpc214x_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) { /* Mark the endpoint as available */ - flags = irqsave(); + flags = enter_critical_section(); priv->epavail |= (1 << privep->epphy); - irqrestore(flags); + leave_critical_section(flags); } } @@ -3082,14 +3082,14 @@ static int lpc214x_wakeup(struct usbdev_s *dev) usbtrace(TRACE_DEVWAKEUP, (uint16_t)g_usbdev.devstatus); - flags = irqsave(); + flags = enter_critical_section(); if (DEVSTATUS_CONNECT(g_usbdev.devstatus)) { arg |= USBDEV_DEVSTATUS_CONNECT; } lpc214x_usbcmd(CMD_USB_DEV_SETSTATUS, arg); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3289,7 +3289,7 @@ void up_usbuninitialize(void) /* Disconnect device */ - flags = irqsave(); + flags = enter_critical_section(); lpc214x_pullup(&priv->usbdev, false); priv->usbdev.speed = USB_SPEED_UNKNOWN; lpc214x_usbcmd(CMD_USB_DEV_CONFIG, 0); @@ -3304,7 +3304,7 @@ void up_usbuninitialize(void) reg = lpc214x_getreg(LPC214X_PCON_PCONP); reg &= ~LPC214X_PCONP_PCUSB; lpc214x_putreg(reg, LPC214X_PCON_PCONP); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc2378/lpc23xx_i2c.c b/arch/arm/src/lpc2378/lpc23xx_i2c.c index 857b2f7c14d..54efbc52c00 100644 --- a/arch/arm/src/lpc2378/lpc23xx_i2c.c +++ b/arch/arm/src/lpc2378/lpc23xx_i2c.c @@ -66,7 +66,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -258,10 +258,10 @@ static void lpc2378_i2c_timeout(int argc, uint32_t arg, ...) { struct lpc2378_i2cdev_s *priv = (struct lpc2378_i2cdev_s *)arg; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->state = 0xff; sem_post(&priv->wait); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -497,7 +497,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_LPC2378_I2C0 if (port == 0) @@ -596,7 +596,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port) return NULL; } - irqrestore(flags); + leave_critical_section(flags); putreg32(I2C_CONSET_I2EN, priv->base + I2C_CONSET_OFFSET); diff --git a/arch/arm/src/lpc2378/lpc23xx_irq.c b/arch/arm/src/lpc2378/lpc23xx_irq.c index a455fef615c..33524c3b1cf 100644 --- a/arch/arm/src/lpc2378/lpc23xx_irq.c +++ b/arch/arm/src/lpc2378/lpc23xx_irq.c @@ -177,7 +177,7 @@ void up_enable_irq(int irq) { /* Disable all interrupts */ - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); /* Enable the irq by setting the corresponding bit in the VIC Interrupt * Enable register. @@ -185,7 +185,7 @@ void up_enable_irq(int irq) uint32_t val = vic_getreg(VIC_INTENABLE_OFFSET); vic_putreg(val | (1 << irq), VIC_INTENABLE_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } } @@ -263,7 +263,7 @@ void up_attach_vector(int irq, int vector, vic_vector_t handler) /* Disable all interrupts */ - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); /* Save the vector address */ @@ -280,7 +280,7 @@ void up_attach_vector(int irq, int vector, vic_vector_t handler) uint32_t val = vic_getreg(VIC_INTENABLE_OFFSET); vic_putreg(val | (1 << irq), VIC_INTENABLE_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } } #endif diff --git a/arch/arm/src/lpc2378/lpc23xx_serial.c b/arch/arm/src/lpc2378/lpc23xx_serial.c index 9e3403c4c9e..b591e5091a4 100644 --- a/arch/arm/src/lpc2378/lpc23xx_serial.c +++ b/arch/arm/src/lpc2378/lpc23xx_serial.c @@ -709,9 +709,9 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, * unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); up_enablebreaks(priv, true); - irqrestore(flags); + leave_critical_section(flags); } break; @@ -719,9 +719,9 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) * unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_enablebreaks(priv, false); - irqrestore(flags); + leave_critical_section(flags); } break; diff --git a/arch/arm/src/lpc2378/lpc23xx_spi.c b/arch/arm/src/lpc2378/lpc23xx_spi.c index d483d1c98e0..42c951c9540 100644 --- a/arch/arm/src/lpc2378/lpc23xx_spi.c +++ b/arch/arm/src/lpc2378/lpc23xx_spi.c @@ -52,6 +52,7 @@ #include #include +#include #include #include @@ -557,7 +558,7 @@ FAR struct spi_dev_s *lpc23_spibus_initialize(int port) * #define GPIO_SPI_SCK GPIO_SPI_SCK_1 */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC23XX_SCB_BASE+SCB_PCONP_OFFSET); regval |= PCSPI; @@ -578,7 +579,7 @@ FAR struct spi_dev_s *lpc23_spibus_initialize(int port) regval |= SPI_PINSEL1; putreg32(regval, LPC23XX_PINSEL1); - irqrestore(flags); + leave_critical_section(flags); /* Configure 8-bit SPI mode and master mode */ diff --git a/arch/arm/src/lpc31xx/lpc31_ehci.c b/arch/arm/src/lpc31xx/lpc31_ehci.c index 1d2fe2a45a6..924b4f6408a 100644 --- a/arch/arm/src/lpc31xx/lpc31_ehci.c +++ b/arch/arm/src/lpc31xx/lpc31_ehci.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc31xx/lpc31_ehci.c * - * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -48,6 +48,7 @@ #include #include +#include #include #include #include @@ -1588,7 +1589,7 @@ static int lpc31_ioc_setup(struct lpc31_rhport_s *rhport, struct lpc31_epinfo_s /* Is the device still connected? */ - flags = irqsave(); + flags = enter_critical_section(); if (rhport->connected) { /* Then set iocwait to indicate that we expect to be informed when @@ -1607,7 +1608,7 @@ static int lpc31_ioc_setup(struct lpc31_rhport_s *rhport, struct lpc31_epinfo_s ret = OK; /* We are good to go */ } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -2575,7 +2576,7 @@ static inline int lpc31_ioc_async_setup(struct lpc31_rhport_s *rhport, /* Is the device still connected? */ - flags = irqsave(); + flags = enter_critical_section(); if (rhport->connected) { /* Then save callback information to used when either (1) the @@ -2591,7 +2592,7 @@ static inline int lpc31_ioc_async_setup(struct lpc31_rhport_s *rhport, ret = OK; /* We are good to go */ } - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -3450,7 +3451,7 @@ static int lpc31_wait(FAR struct usbhost_connection_s *conn, * ports or until an error occurs. */ - flags = irqsave(); + flags = enter_critical_section(); for (; ; ) { /* Check for a change in the connection state on any root hub port */ @@ -3472,7 +3473,7 @@ static int lpc31_wait(FAR struct usbhost_connection_s *conn, connport->connected = rhport->connected; *hport = connport; - irqrestore(flags); + leave_critical_section(flags); usbhost_vtrace2(EHCI_VTRACE2_MONWAKEUP, rhpndx + 1, rhport->connected); @@ -3493,7 +3494,7 @@ static int lpc31_wait(FAR struct usbhost_connection_s *conn, g_ehci.hport = NULL; *hport = (struct usbhost_hubport_s *)connport; - irqrestore(flags); + leave_critical_section(flags); usbhost_vtrace2(EHCI_VTRACE2_MONWAKEUP, connport->port + 1, connport->connected); @@ -4510,7 +4511,7 @@ static int lpc31_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) * related race conditions. */ - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_USBHOST_ASYNCH callback = epinfo->callback; arg = epinfo->arg; @@ -4522,7 +4523,6 @@ static int lpc31_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) epinfo->arg = NULL; #endif epinfo->iocwait = false; - irqrestore(flags); /* This will prevent any callbacks from occurring while are performing * the cancellation. The transfer may still be in progress, however, so @@ -4531,7 +4531,7 @@ static int lpc31_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) epinfo->callback = NULL; epinfo->arg = NULL; - irqrestore(flags); + leave_critical_section(flags); /* Bail if there is no transfer in progress for this endpoint */ @@ -4691,7 +4691,7 @@ static int lpc31_connect(FAR struct usbhost_driver_s *drvr, /* Report the connection event */ - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(g_ehci.hport == NULL); /* REVISIT */ g_ehci.hport = hport; @@ -4701,7 +4701,7 @@ static int lpc31_connect(FAR struct usbhost_driver_s *drvr, lpc31_givesem(&g_ehci.pscsem); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/lpc31xx/lpc31_i2c.c b/arch/arm/src/lpc31xx/lpc31_i2c.c index 284f37f16c3..79d9667a9df 100644 --- a/arch/arm/src/lpc31xx/lpc31_i2c.c +++ b/arch/arm/src/lpc31xx/lpc31_i2c.c @@ -53,7 +53,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -409,7 +409,7 @@ static void i2c_timeout(int argc, uint32_t arg, ...) { struct lpc31_i2cdev_s *priv = (struct lpc31_i2cdev_s *) arg; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); if (priv->state != I2C_STATE_DONE) { @@ -435,7 +435,7 @@ static void i2c_timeout(int argc, uint32_t arg, ...) sem_post(&priv->wait); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -473,7 +473,7 @@ static int i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs /* Get exclusive access to the I2C bus */ sem_wait(&priv->mutex); - flags = irqsave(); + flags = enter_critical_section(); /* Set up for the transfer */ @@ -507,7 +507,7 @@ static int i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs wd_cancel(priv->timeout); ret = count - priv->nmsg; - irqrestore(flags); + leave_critical_section(flags); sem_post(&priv->mutex); return ret; } diff --git a/arch/arm/src/lpc31xx/lpc31_irq.c b/arch/arm/src/lpc31xx/lpc31_irq.c index f8009fe3704..f95f711c4d9 100644 --- a/arch/arm/src/lpc31xx/lpc31_irq.c +++ b/arch/arm/src/lpc31xx/lpc31_irq.c @@ -2,7 +2,7 @@ * arch/arm/src/lpc31xx/lpc31_irq.c * arch/arm/src/chip/lpc31_irq.c * - * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without diff --git a/arch/arm/src/lpc31xx/lpc31_serial.c b/arch/arm/src/lpc31xx/lpc31_serial.c index ea046e81fe5..0b449998f32 100644 --- a/arch/arm/src/lpc31xx/lpc31_serial.c +++ b/arch/arm/src/lpc31xx/lpc31_serial.c @@ -604,18 +604,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); up_enablebreaks(); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disablebreaks(); - irqrestore(flags); + leave_critical_section(flags); } break; diff --git a/arch/arm/src/lpc31xx/lpc31_usbdev.c b/arch/arm/src/lpc31xx/lpc31_usbdev.c index bfde5058ab2..6eacff1df95 100644 --- a/arch/arm/src/lpc31xx/lpc31_usbdev.c +++ b/arch/arm/src/lpc31xx/lpc31_usbdev.c @@ -58,7 +58,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -1948,7 +1948,7 @@ static int lpc31_epdisable(FAR struct usbdev_ep_s *ep) #endif usbtrace(TRACE_EPDISABLE, privep->epphy); - flags = irqsave(); + flags = enter_critical_section(); /* Disable Endpoint */ if (LPC31_EPPHYIN(privep->epphy)) @@ -1961,7 +1961,7 @@ static int lpc31_epdisable(FAR struct usbdev_ep_s *ep) /* Cancel any ongoing activity */ lpc31_cancelrequests(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2104,7 +2104,7 @@ static int lpc31_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r /* Disable Interrupts */ - flags = irqsave(); + flags = enter_critical_section(); /* If we are stalled, then drop all requests on the floor */ @@ -2127,7 +2127,7 @@ static int lpc31_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -2154,7 +2154,7 @@ static int lpc31_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r usbtrace(TRACE_EPCANCEL, privep->epphy); - flags = irqsave(); + flags = enter_critical_section(); /* FIXME: if the request is the first, then we need to flush the EP * otherwise just remove it from the list @@ -2163,7 +2163,7 @@ static int lpc31_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r */ lpc31_cancelrequests(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2182,7 +2182,7 @@ static int lpc31_epstall(FAR struct usbdev_ep_s *ep, bool resume) /* STALL or RESUME the endpoint */ - flags = irqsave(); + flags = enter_critical_section(); usbtrace(resume ? TRACE_EPRESUME : TRACE_EPSTALL, privep->epphy); uint32_t addr = LPC31_USBDEV_ENDPTCTRL(privep->epphy); @@ -2204,7 +2204,7 @@ static int lpc31_epstall(FAR struct usbdev_ep_s *ep, bool resume) lpc31_setbits (ctrl_xs, addr); } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2306,7 +2306,7 @@ static FAR struct usbdev_ep_s *lpc31_allocep(FAR struct usbdev_s *dev, uint8_t e { /* Yes.. now see if any of the request endpoints are available */ - flags = irqsave(); + flags = enter_critical_section(); epset &= priv->epavail; if (epset) { @@ -2320,7 +2320,7 @@ static FAR struct usbdev_ep_s *lpc31_allocep(FAR struct usbdev_s *dev, uint8_t e /* Mark the IN/OUT endpoint no longer available */ priv->epavail &= ~(3 << (bit & ~1)); - irqrestore(flags); + leave_critical_section(flags); /* And return the pointer to the standard endpoint structure */ @@ -2329,7 +2329,7 @@ static FAR struct usbdev_ep_s *lpc31_allocep(FAR struct usbdev_s *dev, uint8_t e } /* Shouldn't get here */ } - irqrestore(flags); + leave_critical_section(flags); } usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_NOEP), (uint16_t)eplog); @@ -2356,9 +2356,9 @@ static void lpc31_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) { /* Mark the endpoint as available */ - flags = irqsave(); + flags = enter_critical_section(); priv->epavail |= (1 << privep->epphy); - irqrestore(flags); + leave_critical_section(flags); } } @@ -2403,9 +2403,9 @@ static int lpc31_wakeup(struct usbdev_s *dev) usbtrace(TRACE_DEVWAKEUP, 0); - flags = irqsave(); + flags = enter_critical_section(); lpc31_setbits(USBDEV_PRTSC1_FPR, LPC31_USBDEV_PORTSC1); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2447,12 +2447,12 @@ static int lpc31_pullup(struct usbdev_s *dev, bool enable) { usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); if (enable) lpc31_setbits (USBDEV_USBCMD_RS, LPC31_USBDEV_USBCMD); else lpc31_clrbits (USBDEV_USBCMD_RS, LPC31_USBDEV_USBCMD); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2617,7 +2617,7 @@ void up_usbuninitialize(void) /* Disconnect device */ - flags = irqsave(); + flags = enter_critical_section(); lpc31_pullup(&priv->usbdev, false); priv->usbdev.speed = USB_SPEED_UNKNOWN; @@ -2637,7 +2637,7 @@ void up_usbuninitialize(void) lpc31_disableclock (CLKID_USBOTGAHBCLK); lpc31_disableclock (CLKID_EVENTROUTERPCLK); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc43xx/lpc43_adc.c b/arch/arm/src/lpc43xx/lpc43_adc.c index e8d25507174..487c0b5cf37 100644 --- a/arch/arm/src/lpc43xx/lpc43_adc.c +++ b/arch/arm/src/lpc43xx/lpc43_adc.c @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/lpc43xx/lpc43_adc.c * - * Copyright(C) 2012 Gregory Nutt. All rights reserved. + * Copyright(C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Ported from from the LPC17 version: @@ -58,6 +58,7 @@ #include #include +#include #include #include @@ -188,7 +189,7 @@ static void adc_reset(FAR struct adc_dev_s *dev) priv->mask_int &= ~(priv->mask_int >> 1); } - flags = irqsave(); + flags = enter_critical_section(); /* Clock peripheral */ @@ -302,7 +303,7 @@ static void adc_reset(FAR struct adc_dev_s *dev) } #endif /* PINCONF_ADC0_C7 */ - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc43xx/lpc43_dac.c b/arch/arm/src/lpc43xx/lpc43_dac.c index 196d4512198..16fa92a3654 100644 --- a/arch/arm/src/lpc43xx/lpc43_dac.c +++ b/arch/arm/src/lpc43xx/lpc43_dac.c @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/lpc43xx/lpc43_dac.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Ported from from the LPC17 version: @@ -58,6 +58,7 @@ #include #include +#include #include #include @@ -122,7 +123,7 @@ static void dac_reset(FAR struct dac_dev_s *dev) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC43_SYSCON_PCLKSEL0); regval &= ~SYSCON_PCLKSEL0_DAC_MASK; @@ -133,7 +134,7 @@ static void dac_reset(FAR struct dac_dev_s *dev) lpc43_configgpio(GPIO_AOUT); - irqrestore(flags); + leave_critical_section(flags); } /* Configure the DAC. This method is called the first time that the DAC diff --git a/arch/arm/src/lpc43xx/lpc43_ehci.c b/arch/arm/src/lpc43xx/lpc43_ehci.c index 29f361bc851..48691731e6b 100644 --- a/arch/arm/src/lpc43xx/lpc43_ehci.c +++ b/arch/arm/src/lpc43xx/lpc43_ehci.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc43xx/lpc43_ehci.c * - * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include #include @@ -1475,7 +1476,7 @@ static int lpc43_ioc_setup(struct lpc43_rhport_s *rhport, struct lpc43_epinfo_s /* Is the device still connected? */ - flags = irqsave(); + flags = enter_critical_section(); if (rhport->connected) { /* Then set iocwait to indicate that we expect to be informed when @@ -1494,7 +1495,7 @@ static int lpc43_ioc_setup(struct lpc43_rhport_s *rhport, struct lpc43_epinfo_s ret = OK; /* We are good to go */ } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -2433,7 +2434,7 @@ static inline int lpc43_ioc_async_setup(struct lpc43_rhport_s *rhport, /* Is the device still connected? */ - flags = irqsave(); + flags = enter_critical_section(); if (rhport->connected) { /* Then save callback information to used when either (1) the @@ -2449,7 +2450,7 @@ static inline int lpc43_ioc_async_setup(struct lpc43_rhport_s *rhport, ret = OK; /* We are good to go */ } - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -3280,7 +3281,7 @@ static int lpc43_wait(FAR struct usbhost_connection_s *conn, * ports or until an error occurs. */ - flags = irqsave(); + flags = enter_critical_section(); for (; ; ) { /* Check for a change in the connection state on any root hub port */ @@ -3302,7 +3303,7 @@ static int lpc43_wait(FAR struct usbhost_connection_s *conn, connport->connected = rhport->connected; *hport = connport; - irqrestore(flags); + leave_critical_section(flags); usbhost_vtrace2(EHCI_VTRACE2_MONWAKEUP, rhpndx + 1, rhport->connected); @@ -3323,7 +3324,7 @@ static int lpc43_wait(FAR struct usbhost_connection_s *conn, g_ehci.hport = NULL; *hport = (struct usbhost_hubport_s *)connport; - irqrestore(flags); + leave_critical_section(flags); usbhost_vtrace2(EHCI_VTRACE2_MONWAKEUP, connport->port + 1, connport->connected); @@ -4334,7 +4335,7 @@ static int lpc43_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) * related race conditions. */ - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_USBHOST_ASYNCH callback = epinfo->callback; arg = epinfo->arg; @@ -4346,7 +4347,6 @@ static int lpc43_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) epinfo->arg = NULL; #endif epinfo->iocwait = false; - irqrestore(flags); /* This will prevent any callbacks from occurring while are performing * the cancellation. The transfer may still be in progress, however, so @@ -4355,7 +4355,7 @@ static int lpc43_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) epinfo->callback = NULL; epinfo->arg = NULL; - irqrestore(flags); + leave_critical_section(flags); /* Bail if there is no transfer in progress for this endpoint */ @@ -4515,7 +4515,7 @@ static int lpc43_connect(FAR struct usbhost_driver_s *drvr, /* Report the connection event */ - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(g_ehci.hport == NULL); /* REVISIT */ g_ehci.hport = hport; @@ -4525,7 +4525,7 @@ static int lpc43_connect(FAR struct usbhost_driver_s *drvr, lpc43_givesem(&g_ehci.pscsem); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/lpc43xx/lpc43_ethernet.c b/arch/arm/src/lpc43xx/lpc43_ethernet.c index 4782ac54c82..2eab571eadb 100644 --- a/arch/arm/src/lpc43xx/lpc43_ethernet.c +++ b/arch/arm/src/lpc43xx/lpc43_ethernet.c @@ -2436,7 +2436,7 @@ static int lpc43_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(LPC43M4_IRQ_ETHERNET); /* Cancel the TX poll timer and TX timeout timers */ @@ -2454,7 +2454,7 @@ static int lpc43_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2563,12 +2563,12 @@ static int lpc43_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Perform the out-of-cycle poll now */ lpc43_txavail_process(priv); - irqrestore(flags); + leave_critical_section(flags); #endif return OK; diff --git a/arch/arm/src/lpc43xx/lpc43_gpio.c b/arch/arm/src/lpc43xx/lpc43_gpio.c index aaa18eccd97..3d5db11b7e4 100644 --- a/arch/arm/src/lpc43xx/lpc43_gpio.c +++ b/arch/arm/src/lpc43xx/lpc43_gpio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc43/lpc43_gpio.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -37,13 +37,15 @@ * Included Files ****************************************************************************/ -#include #include -#include #include #include +#include +#include +#include + #include "up_arch.h" #include "lpc43_gpio.h" @@ -166,7 +168,7 @@ int lpc43_gpio_config(uint16_t gpiocfg) /* Handle the GPIO configuration by the basic mode of the pin */ - flags = irqsave(); + flags = enter_critical_section(); switch (gpiocfg & GPIO_MODE_MASK) { case GPIO_MODE_INPUT: /* GPIO input pin */ @@ -197,7 +199,7 @@ int lpc43_gpio_config(uint16_t gpiocfg) break; } - irqrestore(flags); + leave_critical_section(flags); return ret; } diff --git a/arch/arm/src/lpc43xx/lpc43_gpioint.c b/arch/arm/src/lpc43xx/lpc43_gpioint.c index 6de112b2fa5..51e010ba330 100644 --- a/arch/arm/src/lpc43xx/lpc43_gpioint.c +++ b/arch/arm/src/lpc43xx/lpc43_gpioint.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc43/lpc43_gpioint.c * - * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -58,9 +58,11 @@ #include #include -#include #include +#include +#include + #include "up_arch.h" #include "chip.h" #include "chip/lpc43_scu.h" @@ -115,7 +117,7 @@ int lpc43_gpioint_grpinitialize(int group, bool anded, bool level) /* Select the group register base address and disable the group interrupt */ - flags = irqsave(); + flags = enter_critical_section(); if (group == 0) { grpbase = LPC43_GRP0INT_BASE; @@ -152,7 +154,7 @@ int lpc43_gpioint_grpinitialize(int group, bool anded, bool level) putreg32(regval, grpbase + LPC43_GRPINT_CTRL_OFFSET); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -280,7 +282,7 @@ int lpc43_gpioint_grpconfig(uint16_t gpiocfg) /* Select the group register base address */ - flags = irqsave(); + flags = enter_critical_section(); if (GPIO_IS_GROUP0(gpiocfg)) { grpbase = LPC43_GRP0INT_BASE; @@ -315,7 +317,7 @@ int lpc43_gpioint_grpconfig(uint16_t gpiocfg) regval |= bitmask; putreg32(regval, regaddr); - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/lpc43xx/lpc43_i2c.c b/arch/arm/src/lpc43xx/lpc43_i2c.c index 639c158ccea..a7ddfa4726c 100644 --- a/arch/arm/src/lpc43xx/lpc43_i2c.c +++ b/arch/arm/src/lpc43xx/lpc43_i2c.c @@ -64,7 +64,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -239,10 +239,10 @@ static void lpc43_i2c_timeout(int argc, uint32_t arg, ...) { struct lpc43_i2cdev_s *priv = (struct lpc43_i2cdev_s *)arg; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->state = 0xff; sem_post(&priv->wait); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -471,7 +471,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_LPC43_I2C0 if (port == 0) @@ -535,7 +535,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port) return NULL; } - irqrestore(flags); + leave_critical_section(flags); putreg32(I2C_CONSET_I2EN, priv->base + LPC43_I2C_CONSET_OFFSET); diff --git a/arch/arm/src/lpc43xx/lpc43_idle.c b/arch/arm/src/lpc43xx/lpc43_idle.c index 8b15bb079a4..cd59d9d1ab4 100644 --- a/arch/arm/src/lpc43xx/lpc43_idle.c +++ b/arch/arm/src/lpc43xx/lpc43_idle.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "up_internal.h" @@ -96,7 +96,7 @@ static void up_idlepm(void) if (newstate != oldstate) { - flags = irqsave(); + flags = enter_critical_section(); /* Perform board-specific, state-dependent logic here */ @@ -140,7 +140,7 @@ static void up_idlepm(void) break; } - irqrestore(flags); + leave_critical_section(flags); } } #else diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c index 692bc2beaae..7cd7f7d9214 100644 --- a/arch/arm/src/lpc43xx/lpc43_irq.c +++ b/arch/arm/src/lpc43xx/lpc43_irq.c @@ -110,7 +110,7 @@ static void lpc43_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" INTCTRL: %08x VECTAB: %08x\n", getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); @@ -136,7 +136,7 @@ static void lpc43_dumpnvic(const char *msg, int irq) lldbg(" %08x %08x %08x\n", getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY), getreg32(NVIC_IRQ56_59_PRIORITY)); - irqrestore(flags); + leave_critical_section(flags); } #else # define lpc43_dumpnvic(msg, irq) diff --git a/arch/arm/src/lpc43xx/lpc43_rgu.c b/arch/arm/src/lpc43xx/lpc43_rgu.c index fd9bc0d37d8..9671a4f8a59 100644 --- a/arch/arm/src/lpc43xx/lpc43_rgu.c +++ b/arch/arm/src/lpc43xx/lpc43_rgu.c @@ -40,7 +40,7 @@ #include -#include +#include #include #include "nvic.h" @@ -92,7 +92,7 @@ void lpc43_softreset(void) /* Disable interrupts */ - flags = irqsave(); + flags = enter_critical_section(); /* Reset all of the peripherals that we can (safely) */ @@ -121,5 +121,5 @@ void lpc43_softreset(void) putreg32(0xffffffff, NVIC_IRQ0_31_CLRPEND); putreg32(0xffffffff, NVIC_IRQ32_63_CLRPEND); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/arm/src/lpc43xx/lpc43_rit.c b/arch/arm/src/lpc43xx/lpc43_rit.c index 8eec814ac3a..f80cd550ac0 100644 --- a/arch/arm/src/lpc43xx/lpc43_rit.c +++ b/arch/arm/src/lpc43xx/lpc43_rit.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc43/lpc43_rit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Brandon Warhurst * * Redistribution and use in source and binary forms, with or without @@ -47,12 +47,13 @@ * Included Files ****************************************************************************/ -#include #include -#include #include +#include +#include + #include "up_arch.h" #include "chip/lpc43_rit.h" #include "lpc43_rit.h" @@ -89,7 +90,7 @@ static int lpc43_RIT_isr(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); putreg32(RIT_CTRL_INT, LPC43_RIT_CTRL); @@ -103,7 +104,7 @@ static int lpc43_RIT_isr(int irq, FAR void *context) sched_alarm_expiration(&g_ts); } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/lpc43xx/lpc43_serial.c b/arch/arm/src/lpc43xx/lpc43_serial.c index 0cd0ae9a159..12896bf6209 100644 --- a/arch/arm/src/lpc43xx/lpc43_serial.c +++ b/arch/arm/src/lpc43xx/lpc43_serial.c @@ -921,7 +921,7 @@ static inline int up_set_rs485_mode(struct up_dev_s *priv, uint64_t tmp; DEBUGASSERT(priv && mode); - flags = irqsave(); + flags = enter_critical_section(); /* Are we enabling or disabling RS-485 support? */ @@ -1000,7 +1000,7 @@ static inline int up_set_rs485_mode(struct up_dev_s *priv, up_serialout(priv, LPC43_UART_RS485DLY_OFFSET, regval); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif @@ -1022,7 +1022,7 @@ static inline int up_get_rs485_mode(struct up_dev_s *priv, uint32_t regval; DEBUGASSERT(priv && mode); - flags = irqsave(); + flags = enter_critical_section(); /* Assume disabled */ @@ -1061,7 +1061,7 @@ static inline int up_get_rs485_mode(struct up_dev_s *priv, mode->delay_rts_after_send = (1000 * regval) / priv->baud; } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif @@ -1142,18 +1142,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); up_enablebreaks(priv, true); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_enablebreaks(priv, false); - irqrestore(flags); + leave_critical_section(flags); } break; @@ -1267,7 +1267,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { #ifndef CONFIG_SUPPRESS_SERIAL_INTS @@ -1286,7 +1286,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) priv->ier &= ~UART_IER_THREIE; up_serialout(priv, LPC43_UART_IER_OFFSET, priv->ier); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/lpc43xx/lpc43_spifi.c b/arch/arm/src/lpc43xx/lpc43_spifi.c index d20462562ff..0d90ea9fceb 100644 --- a/arch/arm/src/lpc43xx/lpc43_spifi.c +++ b/arch/arm/src/lpc43xx/lpc43_spifi.c @@ -53,7 +53,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -1164,7 +1164,7 @@ FAR struct mtd_dev_s *lpc43_spifi_initialize(void) * CGU registers will be modified. */ - flags = irqsave(); + flags = enter_critical_section(); /* The SPIFI will receive clocking from a divider per the settings * provided in the board.h file. Configure PLL1 as the input clock @@ -1180,7 +1180,7 @@ FAR struct mtd_dev_s *lpc43_spifi_initialize(void) /* Configure SPIFI pins */ lpc43_spifi_pinconfig(); - irqrestore(flags); + leave_critical_section(flags); /* Initialize the SPIFI ROM driver */ diff --git a/arch/arm/src/lpc43xx/lpc43_ssp.c b/arch/arm/src/lpc43xx/lpc43_ssp.c index 46034c29b74..be4172c8a50 100644 --- a/arch/arm/src/lpc43xx/lpc43_ssp.c +++ b/arch/arm/src/lpc43xx/lpc43_ssp.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc43xx/lpc43_ssp.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -693,7 +694,7 @@ static inline FAR struct lpc43_sspdev_s *lpc43_ssp0initialize(void) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); /* Configure clocking */ @@ -720,7 +721,7 @@ static inline FAR struct lpc43_sspdev_s *lpc43_ssp0initialize(void) lpc43_pin_config(PINCONF_SSP0_MISO); lpc43_pin_config(PINCONF_SSP0_MOSI); - irqrestore(flags); + leave_critical_section(flags); return &g_ssp0dev; } @@ -746,7 +747,7 @@ static inline FAR struct lpc43_sspdev_s *lpc43_ssp1initialize(void) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); /* Configure clocking */ @@ -773,7 +774,7 @@ static inline FAR struct lpc43_sspdev_s *lpc43_ssp1initialize(void) lpc43_pin_config(PINCONF_SSP1_MISO); lpc43_pin_config(PINCONF_SSP1_MOSI); - irqrestore(flags); + leave_critical_section(flags); return &g_ssp1dev; } diff --git a/arch/arm/src/lpc43xx/lpc43_tickless_rit.c b/arch/arm/src/lpc43xx/lpc43_tickless_rit.c index e792bba5423..f7c94d3a6e5 100644 --- a/arch/arm/src/lpc43xx/lpc43_tickless_rit.c +++ b/arch/arm/src/lpc43xx/lpc43_tickless_rit.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc43/lpc43_rit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -44,14 +44,16 @@ * Included Files ****************************************************************************/ -#include #include -#include -#include #include #include +#include +#include +#include +#include + #include "up_arch.h" #include "chip.h" #include "chip/lpc43_rit.h" @@ -292,7 +294,7 @@ static uint32_t lpc43_tl_tick2ts(uint32_t ticks, FAR struct timespec *ts, static inline void lpc43_tl_sync_up(void) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (synch == 0) { @@ -307,7 +309,7 @@ static inline void lpc43_tl_sync_down(void) synch--; if (synch == 0) { - irqrestore(g_flags); + leave_critical_section(g_flags); } } @@ -596,7 +598,7 @@ static int lpc43_tl_isr(int irq, FAR void *context) void up_timer_initialize(void) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); ctrl_cache = getreg32(LPC43_RIT_CTRL); ctrl_cache &= ~RIT_CTRL_INT; /* Set interrupt to 0 */ @@ -631,7 +633,7 @@ void up_timer_initialize(void) lpc43_tl_calibrate_init(); - irqrestore(flags); + leave_critical_section(flags); } /* No reg changes, only processing */ diff --git a/arch/arm/src/lpc43xx/lpc43_uart.c b/arch/arm/src/lpc43xx/lpc43_uart.c index c0775265c2f..bfa881817ca 100644 --- a/arch/arm/src/lpc43xx/lpc43_uart.c +++ b/arch/arm/src/lpc43xx/lpc43_uart.c @@ -41,7 +41,7 @@ #include -#include +#include #include #include "up_internal.h" @@ -329,7 +329,7 @@ void lpc43_usart0_setup(void) /* Connect USART0 into the clock source specified in board.h */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC43_BASE_USART0_CLK); regval &= ~BASE_USART0_CLK_CLKSEL_MASK; @@ -366,7 +366,7 @@ void lpc43_usart0_setup(void) lpc43_pin_config(PINCONF_U0_DIR); #endif - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -378,7 +378,7 @@ void lpc43_uart1_setup(void) /* Connect UART1 into the clock source specified in board.h */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC43_BASE_UART1_CLK); regval &= ~BASE_UART1_CLK_CLKSEL_MASK; @@ -415,7 +415,7 @@ void lpc43_uart1_setup(void) #endif #endif - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -427,7 +427,7 @@ void lpc43_usart2_setup(void) /* Connect USART2 the clock source specified in board.h */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC43_BASE_USART2_CLK); regval &= ~BASE_USART2_CLK_CLKSEL_MASK; @@ -465,7 +465,7 @@ void lpc43_usart2_setup(void) lpc43_pin_config(PINCONF_U2_DIR); #endif - irqrestore(flags); + leave_critical_section(flags); }; #endif @@ -477,7 +477,7 @@ void lpc43_usart3_setup(void) /* Connect USART3 into the clock source specified in board.h */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(LPC43_BASE_USART3_CLK); regval &= ~BASE_USART3_CLK_CLKSEL_MASK; @@ -514,7 +514,7 @@ void lpc43_usart3_setup(void) lpc43_pin_config(PINCONF_U3_DIR); #endif - irqrestore(flags); + leave_critical_section(flags); }; #endif diff --git a/arch/arm/src/lpc43xx/lpc43_usb0dev.c b/arch/arm/src/lpc43xx/lpc43_usb0dev.c index 4fa18d54c80..36be49a807a 100644 --- a/arch/arm/src/lpc43xx/lpc43_usb0dev.c +++ b/arch/arm/src/lpc43xx/lpc43_usb0dev.c @@ -63,7 +63,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -2065,7 +2065,7 @@ static int lpc43_epdisable(FAR struct usbdev_ep_s *ep) #endif usbtrace(TRACE_EPDISABLE, privep->epphy); - flags = irqsave(); + flags = enter_critical_section(); /* Disable Endpoint */ @@ -2084,7 +2084,7 @@ static int lpc43_epdisable(FAR struct usbdev_ep_s *ep) lpc43_cancelrequests(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2227,7 +2227,7 @@ static int lpc43_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r /* Disable Interrupts */ - flags = irqsave(); + flags = enter_critical_section(); /* If we are stalled, then drop all requests on the floor */ @@ -2254,7 +2254,7 @@ static int lpc43_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -2281,7 +2281,7 @@ static int lpc43_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r usbtrace(TRACE_EPCANCEL, privep->epphy); - flags = irqsave(); + flags = enter_critical_section(); /* FIXME: if the request is the first, then we need to flush the EP * otherwise just remove it from the list @@ -2290,7 +2290,7 @@ static int lpc43_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r */ lpc43_cancelrequests(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2309,7 +2309,7 @@ static int lpc43_epstall(FAR struct usbdev_ep_s *ep, bool resume) /* STALL or RESUME the endpoint */ - flags = irqsave(); + flags = enter_critical_section(); usbtrace(resume ? TRACE_EPRESUME : TRACE_EPSTALL, privep->epphy); uint32_t addr = LPC43_USBDEV_ENDPTCTRL(privep->epphy >> 1); @@ -2331,7 +2331,7 @@ static int lpc43_epstall(FAR struct usbdev_ep_s *ep, bool resume) lpc43_setbits (ctrl_xs, addr); } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2433,7 +2433,7 @@ static FAR struct usbdev_ep_s *lpc43_allocep(FAR struct usbdev_s *dev, uint8_t e { /* Yes.. now see if any of the request endpoints are available */ - flags = irqsave(); + flags = enter_critical_section(); epset &= priv->epavail; if (epset) { @@ -2447,7 +2447,7 @@ static FAR struct usbdev_ep_s *lpc43_allocep(FAR struct usbdev_s *dev, uint8_t e /* Mark endpoint no longer available */ priv->epavail &= ~bit; - irqrestore(flags); + leave_critical_section(flags); /* And return the pointer to the standard endpoint structure */ @@ -2459,7 +2459,7 @@ static FAR struct usbdev_ep_s *lpc43_allocep(FAR struct usbdev_s *dev, uint8_t e } - irqrestore(flags); + leave_critical_section(flags); } usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_NOEP), (uint16_t)eplog); @@ -2486,9 +2486,9 @@ static void lpc43_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) { /* Mark the endpoint as available */ - flags = irqsave(); + flags = enter_critical_section(); priv->epavail |= (1 << privep->epphy); - irqrestore(flags); + leave_critical_section(flags); } } @@ -2534,9 +2534,9 @@ static int lpc43_wakeup(struct usbdev_s *dev) usbtrace(TRACE_DEVWAKEUP, 0); - flags = irqsave(); + flags = enter_critical_section(); lpc43_setbits(USBDEV_PRTSC1_FPR, LPC43_USBDEV_PORTSC1); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2578,7 +2578,7 @@ static int lpc43_pullup(struct usbdev_s *dev, bool enable) { usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); if (enable) { lpc43_setbits (USBDEV_USBCMD_RS, LPC43_USBDEV_USBCMD); @@ -2588,7 +2588,7 @@ static int lpc43_pullup(struct usbdev_s *dev, bool enable) lpc43_clrbits (USBDEV_USBCMD_RS, LPC43_USBDEV_USBCMD); } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2616,7 +2616,7 @@ void up_usbinitialize(void) uint32_t regval; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); /* Initialize the device state structure */ @@ -2718,7 +2718,7 @@ void up_usbinitialize(void) irq_attach(LPC43M4_IRQ_USB0, lpc43_usbinterrupt); up_enable_irq(LPC43M4_IRQ_USB0); - irqrestore(flags); + leave_critical_section(flags); /* Reset/Re-initialize the USB hardware */ @@ -2746,7 +2746,7 @@ void up_usbuninitialize(void) /* Disconnect device */ - flags = irqsave(); + flags = enter_critical_section(); lpc43_pullup(&priv->usbdev, false); priv->usbdev.speed = USB_SPEED_UNKNOWN; @@ -2765,7 +2765,7 @@ void up_usbuninitialize(void) lpc43_pll0usbdisable(); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/moxart/moxart_16550.c b/arch/arm/src/moxart/moxart_16550.c index 1078e920f30..2754eab0cab 100644 --- a/arch/arm/src/moxart/moxart_16550.c +++ b/arch/arm/src/moxart/moxart_16550.c @@ -2,7 +2,7 @@ * arch/arm/src/moxart/moxart_irq.c * Driver for MoxaRT IRQ controller * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved. * Author: Anton D. Kachalov * * Redistribution and use in source and binary forms, with or without @@ -43,8 +43,9 @@ #include #include #include -#include +#include +#include #include #include #include @@ -129,7 +130,7 @@ int uart_ioctl(struct file *filep, int cmd, unsigned long arg) break; } - flags = irqsave(); + flags = enter_critical_section(); /* Update mode register with requested mode */ @@ -138,7 +139,7 @@ int uart_ioctl(struct file *filep, int cmd, unsigned long arg) vmode = opmode << 2 * bitm_off; putreg32(getreg32(CONFIG_UART_MOXA_MODE_REG) | vmode, CONFIG_UART_MOXA_MODE_REG); - irqrestore(flags); + leave_critical_section(flags); ret = OK; break; } @@ -146,13 +147,13 @@ int uart_ioctl(struct file *filep, int cmd, unsigned long arg) case MOXA_GET_OP_MODE: { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); /* Read from mode register */ opmode = (getreg32(CONFIG_UART_MOXA_MODE_REG) >> 2 * bitm_off) & OP_MODE_MASK; - irqrestore(flags); + leave_critical_section(flags); *(unsigned long *)arg = opmode; ret = OK; break; diff --git a/arch/arm/src/moxart/moxart_irq.c b/arch/arm/src/moxart/moxart_irq.c index 4a5ec2e13ff..044bca0734d 100644 --- a/arch/arm/src/moxart/moxart_irq.c +++ b/arch/arm/src/moxart/moxart_irq.c @@ -42,6 +42,7 @@ #include #include + #include #include #include diff --git a/arch/arm/src/nuc1xx/nuc_dumpgpio.c b/arch/arm/src/nuc1xx/nuc_dumpgpio.c index e9966ef3aad..480bb4f588d 100644 --- a/arch/arm/src/nuc1xx/nuc_dumpgpio.c +++ b/arch/arm/src/nuc1xx/nuc_dumpgpio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/nuc/nuc_gpio.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -42,6 +42,8 @@ #include #include +#include + #include "up_arch.h" #include "chip.h" @@ -120,7 +122,7 @@ void nuc_dumpgpio(gpio_cfgset_t pinset, const char *msg) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("GPIO%c pinset: %08x base: %08x -- %s\n", g_portchar[port], pinset, base, msg); @@ -137,7 +139,7 @@ void nuc_dumpgpio(gpio_cfgset_t pinset, const char *msg) lldbg(" ISRC: %08x\n", getreg32(base + NUC_GPIO_ISRC_OFFSET)); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DEBUG */ diff --git a/arch/arm/src/nuc1xx/nuc_gpio.c b/arch/arm/src/nuc1xx/nuc_gpio.c index 56c0e97c5fc..0e2b11d54c1 100644 --- a/arch/arm/src/nuc1xx/nuc_gpio.c +++ b/arch/arm/src/nuc1xx/nuc_gpio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/nuc1xx/nuc_gpio.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "up_arch.h" @@ -253,7 +254,7 @@ void nuc_gpiowrite(gpio_cfgset_t pinset, bool value) /* Disable interrupts -- the following operations must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Allow writing only to the selected pin in the DOUT register */ @@ -262,7 +263,7 @@ void nuc_gpiowrite(gpio_cfgset_t pinset, bool value) /* Set the pin to the selected value and re-enable interrupts */ putreg32(((uint32_t)value << pin), base + NUC_GPIO_DOUT_OFFSET); - irqrestore(flags); + leave_critical_section(flags); #endif } diff --git a/arch/arm/src/nuc1xx/nuc_idle.c b/arch/arm/src/nuc1xx/nuc_idle.c index 5414c70e74a..db4c46e796a 100644 --- a/arch/arm/src/nuc1xx/nuc_idle.c +++ b/arch/arm/src/nuc1xx/nuc_idle.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "chip.h" #include "up_internal.h" @@ -97,7 +97,7 @@ static void up_idlepm(void) if (newstate != oldstate) { - flags = irqsave(); + flags = enter_critical_section(); /* Perform board-specific, state-dependent logic here */ @@ -141,7 +141,7 @@ static void up_idlepm(void) break; } - irqrestore(flags); + leave_critical_section(flags); } } #else diff --git a/arch/arm/src/nuc1xx/nuc_irq.c b/arch/arm/src/nuc1xx/nuc_irq.c index 8e2b4a2c90c..a385eb1fb38 100644 --- a/arch/arm/src/nuc1xx/nuc_irq.c +++ b/arch/arm/src/nuc1xx/nuc_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/nuc1xx/nuc_irq.c * - * Copyright (C) 2009-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -89,7 +89,7 @@ static void nuc_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" ISER: %08x ICER: %08x\n", @@ -113,7 +113,7 @@ static void nuc_dumpnvic(const char *msg, int irq) lldbg(" SHPR2: %08x SHPR3: %08x\n", getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3)); - irqrestore(flags); + leave_critical_section(flags); } #else diff --git a/arch/arm/src/nuc1xx/nuc_serial.c b/arch/arm/src/nuc1xx/nuc_serial.c index d31bcf3bedb..dcf203115b6 100644 --- a/arch/arm/src/nuc1xx/nuc_serial.c +++ b/arch/arm/src/nuc1xx/nuc_serial.c @@ -337,7 +337,7 @@ static uint32_t up_setier(struct nuc_dev_s *priv, /* Make sure that this is atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Get the current IER setting */ @@ -348,7 +348,7 @@ static uint32_t up_setier(struct nuc_dev_s *priv, priv->ier &= ~clrbits; priv->ier |= setbits; up_serialout(priv, NUC_UART_IER_OFFSET, priv->ier); - irqrestore(flags); + leave_critical_section(flags); /* Return the value of the IER before modification */ @@ -878,7 +878,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) #ifndef CONFIG_SUPPRESS_SERIAL_INTS /* Enable receive data, line status and buffer error interrupts */ - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); (void)up_setier(priv, 0, (UART_IER_RDA_IEN | UART_IER_RLS_IEN | UART_IER_BUF_ERR_IEN)); @@ -904,7 +904,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) up_rxto_enable(priv); } - irqrestore(flags); + leave_critical_section(flags); #endif } else @@ -964,7 +964,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) #ifndef CONFIG_SUPPRESS_SERIAL_INTS /* Enable the THR empty interrupt */ - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); (void)up_setier(priv, 0, UART_IER_THRE_IEN); /* Fake a TX interrupt here by just calling uart_xmitchars() with @@ -972,7 +972,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) */ uart_xmitchars(dev); - irqrestore(flags); + leave_critical_section(flags); #endif } else diff --git a/arch/arm/src/sam34/sam4cm_freerun.c b/arch/arm/src/sam34/sam4cm_freerun.c index 0183367282e..63bcea20315 100644 --- a/arch/arm/src/sam34/sam4cm_freerun.c +++ b/arch/arm/src/sam34/sam4cm_freerun.c @@ -54,7 +54,7 @@ #include #include -#include +#include #include #include "sam4cm_freerun.h" @@ -231,7 +231,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts) * If we do not handle the overflow here then, it will be lost. */ - flags = irqsave(); + flags = enter_critical_section(); overflow = freerun->overflow; counter = sam_tc_getcounter(freerun->tch); sr = sam_tc_getpending(freerun->tch); @@ -255,7 +255,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts) freerun->overflow = overflow; } - irqrestore(flags); + leave_critical_section(flags); tcvdbg("counter=%lu (%lu) overflow=%lu, sr=%08lx\n", (unsigned long)counter, (unsigned long)verify, diff --git a/arch/arm/src/sam34/sam4cm_oneshot.c b/arch/arm/src/sam34/sam4cm_oneshot.c index 5a0816528c0..a793350d66c 100644 --- a/arch/arm/src/sam34/sam4cm_oneshot.c +++ b/arch/arm/src/sam34/sam4cm_oneshot.c @@ -54,7 +54,7 @@ #include #include -#include +#include #include #include "sam4cm_oneshot.h" @@ -261,7 +261,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, /* Was the oneshot already running? */ - flags = irqsave(); + flags = enter_critical_section(); if (oneshot->running) { /* Yes.. then cancel it */ @@ -311,7 +311,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, */ oneshot->running = true; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -351,7 +351,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) /* Was the timer running? */ - flags = irqsave(); + flags = enter_critical_section(); if (!oneshot->running) { /* No.. Just return zero timer remaining and successful cancellation. @@ -361,7 +361,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) ts->tv_sec = 0; ts->tv_nsec = 0; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -389,7 +389,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) oneshot->running = false; oneshot->handler = NULL; oneshot->arg = NULL; - irqrestore(flags); + leave_critical_section(flags); /* Did the caller provide us with a location to return the time * remaining? diff --git a/arch/arm/src/sam34/sam4cm_tc.c b/arch/arm/src/sam34/sam4cm_tc.c index 2ca8cf268b1..91ab9c3ca2e 100644 --- a/arch/arm/src/sam34/sam4cm_tc.c +++ b/arch/arm/src/sam34/sam4cm_tc.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sam34/sam_tc.c * - * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * References: @@ -57,6 +57,7 @@ #include #include +#include #include #include @@ -764,7 +765,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel) * because there is no semaphore protection. */ - flags = irqsave(); + flags = enter_critical_section(); if (!chan->initialized) { /* Initialize the channel. */ @@ -822,7 +823,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel) /* Get exclusive access to the timer/count data structure */ sam_takesem(chan); - irqrestore(flags); + leave_critical_section(flags); /* Is it available? */ @@ -1026,7 +1027,7 @@ tc_handler_t sam_tc_attach(TC_HANDLE handle, tc_handler_t handler, /* Remember the old interrupt handler and set the new handler */ - flags = irqsave(); + flags = enter_critical_section(); oldhandler = chan->handler; chan->handler = handler; @@ -1046,7 +1047,7 @@ tc_handler_t sam_tc_attach(TC_HANDLE handle, tc_handler_t handler, sam_chan_putreg(chan, SAM_TC_IDR_OFFSET, TC_INT_ALL & ~mask); sam_chan_putreg(chan, SAM_TC_IER_OFFSET, TC_INT_ALL & mask); - irqrestore(flags); + leave_critical_section(flags); return oldhandler; } diff --git a/arch/arm/src/sam34/sam4l_gpio.c b/arch/arm/src/sam34/sam4l_gpio.c index 3c09beb535d..4dcefcef55e 100644 --- a/arch/arm/src/sam34/sam4l_gpio.c +++ b/arch/arm/src/sam34/sam4l_gpio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sam34/sam4l_gpio.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,6 +44,7 @@ #include #include +#include #include #include @@ -54,14 +55,6 @@ #include "sam_gpio.h" #include "chip/sam4l_gpio.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Types - ****************************************************************************/ - /**************************************************************************** * Private Data ****************************************************************************/ @@ -71,8 +64,9 @@ static const char g_portchar[4] = { 'A', 'B', 'C', 'D' }; #endif /**************************************************************************** - * Private Function Prototypes + * Private Functions ****************************************************************************/ + /**************************************************************************** * Name: sam_gpiobase * @@ -544,7 +538,7 @@ int sam_dumpgpio(uint32_t pinset, const char *msg) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("GPIO%c pinset: %08x base: %08x -- %s\n", g_portchar[port], pinset, base, msg); lldbg(" GPER: %08x PMR0: %08x PMR1: %08x PMR2: %08x\n", @@ -562,7 +556,7 @@ int sam_dumpgpio(uint32_t pinset, const char *msg) lldbg(" OSRR0: %08x EVER: %08x PARAM: %08x VERS: %08x\n", getreg32(base + SAM_GPIO_OSRR0_OFFSET), getreg32(base + SAM_GPIO_EVER_OFFSET), getreg32(base + SAM_GPIO_PARAMETER_OFFSET), getreg32(base + SAM_GPIO_VERSION_OFFSET)); - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/sam34/sam4l_periphclks.c b/arch/arm/src/sam34/sam4l_periphclks.c index 9230b0f7110..34562184042 100644 --- a/arch/arm/src/sam34/sam4l_periphclks.c +++ b/arch/arm/src/sam34/sam4l_periphclks.c @@ -41,7 +41,7 @@ #include -#include +#include #include #include "up_arch.h" @@ -429,7 +429,7 @@ void sam_modifyperipheral(uintptr_t regaddr, uint32_t clrbits, /* Make sure that the following operations are atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Enable/disabling clocking */ @@ -440,7 +440,7 @@ void sam_modifyperipheral(uintptr_t regaddr, uint32_t clrbits, SAM_PM_UNLOCK); putreg32(regval, regaddr); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -459,7 +459,7 @@ void sam_pba_modifydivmask(uint32_t clrbits, uint32_t setbits) /* Make sure that the following operations are atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Modify the PBA DIVMASK */ @@ -470,7 +470,7 @@ void sam_pba_modifydivmask(uint32_t clrbits, uint32_t setbits) SAM_PM_UNLOCK); putreg32(regval, SAM_PM_PBADIVMASK); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -488,7 +488,7 @@ void sam_pba_enableperipheral(uint32_t bitset) /* The following operations must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Enable the APBA bridge if necessary */ @@ -497,7 +497,7 @@ void sam_pba_enableperipheral(uint32_t bitset) sam_hsb_enableperipheral(PM_HSBMASK_APBA); } - irqrestore(flags); + leave_critical_section(flags); /* Enable the module */ @@ -523,7 +523,7 @@ void sam_pba_disableperipheral(uint32_t bitset) /* Disable the APBA bridge if possible */ - flags = irqsave(); + flags = enter_critical_section(); if (getreg32(SAM_PM_PBAMASK) == 0) { @@ -544,7 +544,7 @@ void sam_pba_disableperipheral(uint32_t bitset) sam_pba_disabledivmask(PM_PBADIVMASK_TIMER_CLOCKS); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -562,7 +562,7 @@ void sam_pbb_enableperipheral(uint32_t bitset) /* The following operations must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Enable the APBB bridge if necessary */ @@ -571,7 +571,7 @@ void sam_pbb_enableperipheral(uint32_t bitset) sam_hsb_enableperipheral(PM_HSBMASK_APBB); } - irqrestore(flags); + leave_critical_section(flags); /* Enable the module */ @@ -597,14 +597,14 @@ void sam_pbb_disableperipheral(uint32_t bitset) /* Disable the APBB bridge if possible */ - flags = irqsave(); + flags = enter_critical_section(); if (getreg32(SAM_PM_PBBMASK) == 0) { sam_hsb_disableperipheral(PM_HSBMASK_APBB); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -637,7 +637,7 @@ void sam_usbc_enableclk(void) /* Enable USBC clocking (possibly along with the PBB peripheral bridge) */ - flags = irqsave(); + flags = enter_critical_section(); sam_hsb_enableperipheral(PM_HSBMASK_USBC); sam_pbb_enableperipheral(PM_PBBMASK_USBC); @@ -669,7 +669,7 @@ void sam_usbc_enableclk(void) regval = getreg32(SAM_SCIF_GCCTRL7); regval |= SCIF_GCCTRL_CEN; putreg32(regval, SAM_SCIF_GCCTRL7); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_SAM34_USBC */ diff --git a/arch/arm/src/sam34/sam_dmac.c b/arch/arm/src/sam34/sam_dmac.c index 28c4c5ecc43..26bd9c3a498 100644 --- a/arch/arm/src/sam34/sam_dmac.c +++ b/arch/arm/src/sam34/sam_dmac.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sam34/sam_dmac.c * - * Copyright (C) 2010, 2013-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2013-2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -48,7 +48,6 @@ #include #include -#include #include "up_arch.h" #include "up_internal.h" @@ -1715,9 +1714,9 @@ void sam_dmastop(DMA_HANDLE handle) dmavdbg("dmach: %p\n", dmach); DEBUGASSERT(dmach != NULL); - flags = irqsave(); + flags = enter_critical_section(); sam_dmaterminate(dmach, -EINTR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1743,7 +1742,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs) * cause lost interrupts. */ - flags = irqsave(); + flags = enter_critical_section(); regs->gcfg = getreg32(SAM_DMAC_GCFG); regs->en = getreg32(SAM_DMAC_EN); regs->sreq = getreg32(SAM_DMAC_SREQ); @@ -1760,7 +1759,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs) regs->ctrla = getreg32(dmach->base + SAM_DMACHAN_CTRLA_OFFSET); regs->ctrlb = getreg32(dmach->base + SAM_DMACHAN_CTRLB_OFFSET); regs->cfg = getreg32(dmach->base + SAM_DMACHAN_CFG_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DEBUG_DMA */ diff --git a/arch/arm/src/sam34/sam_emac.c b/arch/arm/src/sam34/sam_emac.c index 4694fb381f8..d33f1d8aabb 100644 --- a/arch/arm/src/sam34/sam_emac.c +++ b/arch/arm/src/sam34/sam_emac.c @@ -2036,7 +2036,7 @@ static int sam_ifdown(struct net_driver_s *dev) /* Disable the EMAC interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(SAM_IRQ_EMAC); /* Cancel the TX poll timer and TX timeout timers */ @@ -2054,7 +2054,7 @@ static int sam_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2163,12 +2163,12 @@ static int sam_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Perform the out-of-cycle poll now */ sam_txavail_process(priv); - irqrestore(flags); + leave_critical_section(flags); #endif return OK; diff --git a/arch/arm/src/sam34/sam_gpio.c b/arch/arm/src/sam34/sam_gpio.c index 5d3bad6f266..b0f45e89e7b 100644 --- a/arch/arm/src/sam34/sam_gpio.c +++ b/arch/arm/src/sam34/sam_gpio.c @@ -2,7 +2,7 @@ * arch/arm/src/sam34/sam_gpio.c * General Purpose Input/Output (GPIO) logic for the SAM3U, SAM4S and SAM4E * - * Copyright (C) 2010, 2013-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2013-2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ #include #include +#include #include #include @@ -65,14 +66,6 @@ # error Unrecognized SAM architecture #endif -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Types - ****************************************************************************/ - /**************************************************************************** * Private Data ****************************************************************************/ @@ -82,8 +75,9 @@ static const char g_portchar[4] = { 'A', 'B', 'C', 'D' }; #endif /**************************************************************************** - * Private Function Prototypes + * Private Functions ****************************************************************************/ + /**************************************************************************** * Name: sam_gpiobase * @@ -382,7 +376,7 @@ int sam_configgpio(gpio_pinset_t cfgset) /* Disable interrupts to prohibit re-entrance. */ - flags = irqsave(); + flags = enter_critical_section(); /* Enable writing to GPIO registers */ @@ -417,7 +411,7 @@ int sam_configgpio(gpio_pinset_t cfgset) /* Disable writing to GPIO registers */ putreg32(PIO_WPMR_WPEN | PIO_WPMR_WPKEY, base + SAM_PIO_WPMR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -493,7 +487,7 @@ int sam_dumpgpio(uint32_t pinset, const char *msg) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("PIO%c pinset: %08x base: %08x -- %s\n", g_portchar[port], pinset, base, msg); lldbg(" PSR: %08x OSR: %08x IFSR: %08x ODSR: %08x\n", @@ -532,7 +526,7 @@ int sam_dumpgpio(uint32_t pinset, const char *msg) getreg32(base + SAM_PIO_SCHMITT_OFFSET)); #endif #endif - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/sam34/sam_hsmci.c b/arch/arm/src/sam34/sam_hsmci.c index 0a5548cb976..21e9098cd5a 100644 --- a/arch/arm/src/sam34/sam_hsmci.c +++ b/arch/arm/src/sam34/sam_hsmci.c @@ -54,7 +54,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -622,11 +622,11 @@ static void sam_configwaitints(struct sam_dev_s *priv, uint32_t waitmask, /* Save all of the data in one, atomic operation. */ - flags = irqsave(); + flags = enter_critical_section(); priv->waitevents = waitevents; priv->wkupevent = 0; priv->waitmask = waitmask; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -653,12 +653,12 @@ static void sam_disablewaitints(struct sam_dev_s *priv, * operation. */ - flags = irqsave(); + flags = enter_critical_section(); priv->waitevents = 0; priv->wkupevent = wkupevent; priv->waitmask = 0; putreg32(~priv->xfrmask, SAM_HSMCI_IDR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -701,10 +701,10 @@ static inline void sam_configxfrints(struct sam_dev_s *priv, uint32_t xfrmask) static void sam_disablexfrints(struct sam_dev_s *priv) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->xfrmask = 0; putreg32(~priv->waitmask, SAM_HSMCI_IDR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1385,7 +1385,7 @@ static void sam_reset(FAR struct sdio_dev_s *dev) /* Enable the MCI clock */ - flags = irqsave(); + flags = enter_critical_section(); sam_hsmci_enableclk(); /* Reset the MCI */ @@ -1452,7 +1452,7 @@ static void sam_reset(FAR struct sdio_dev_s *dev) /* DMA data transfer support */ priv->widebus = false; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2730,7 +2730,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) /* Update card status */ - flags = irqsave(); + flags = enter_critical_section(); cdstatus = priv->cdstatus; if (cardinslot) { @@ -2750,7 +2750,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) sam_callback(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2776,7 +2776,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) /* Update card status */ - flags = irqsave(); + flags = enter_critical_section(); if (wrprotect) { priv->cdstatus |= SDIO_STATUS_WRPROTECTED; @@ -2787,6 +2787,6 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) } fvdbg("cdstatus: %02x\n", priv->cdstatus); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_SAM34_HSMCI */ diff --git a/arch/arm/src/sam34/sam_irq.c b/arch/arm/src/sam34/sam_irq.c index 314aff78e98..0d533bc0aff 100644 --- a/arch/arm/src/sam34/sam_irq.c +++ b/arch/arm/src/sam34/sam_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sam34/sam_irq.c * - * Copyright (C) 2009, 2011, 2013-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011, 2013-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -111,7 +111,7 @@ static void sam_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" INTCTRL: %08x VECTAB: %08x\n", getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); @@ -152,7 +152,7 @@ static void sam_dumpnvic(const char *msg, int irq) #if SAM_IRQ_NEXTINT > 79 # warning Missing logic #endif - irqrestore(flags); + leave_critical_section(flags); } #else # define sam_dumpnvic(msg, irq) diff --git a/arch/arm/src/sam34/sam_lowputc.c b/arch/arm/src/sam34/sam_lowputc.c index 11548c6ef5d..8fb1123b838 100644 --- a/arch/arm/src/sam34/sam_lowputc.c +++ b/arch/arm/src/sam34/sam_lowputc.c @@ -41,7 +41,7 @@ #include -#include +#include #include "up_internal.h" #include "up_arch.h" @@ -294,18 +294,18 @@ void up_lowputc(char ch) * atomic. */ - flags = irqsave(); + flags = enter_critical_section(); if ((getreg32(SAM_CONSOLE_BASE + SAM_UART_SR_OFFSET) & UART_INT_TXEMPTY) != 0) { /* Send the character */ putreg32((uint32_t)ch, SAM_CONSOLE_BASE + SAM_UART_THR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); return; } - irqrestore(flags); + leave_critical_section(flags); } #endif } diff --git a/arch/arm/src/sam34/sam_rtc.c b/arch/arm/src/sam34/sam_rtc.c index 0694e276e95..8dbe4e9e1af 100644 --- a/arch/arm/src/sam34/sam_rtc.c +++ b/arch/arm/src/sam34/sam_rtc.c @@ -675,7 +675,7 @@ int sam_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) /* Is there already something waiting on the ALARM? */ - flags = irqsave(); + flags = enter_critical_section(); if (g_alarmcb == NULL) { /* No.. Save the callback function pointer */ @@ -746,7 +746,7 @@ int sam_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif diff --git a/arch/arm/src/sam34/sam_rtt.c b/arch/arm/src/sam34/sam_rtt.c index 5a7415f6f2d..a0c94f7ef77 100644 --- a/arch/arm/src/sam34/sam_rtt.c +++ b/arch/arm/src/sam34/sam_rtt.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sam34/sam_rtt.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * Bob Dioron * @@ -46,6 +46,8 @@ #include #include #include + +#include #include #include @@ -577,7 +579,7 @@ static tccb_t sam34_sethandler(FAR struct timer_lowerhalf_s *lower, irqstate_t flags; tccb_t oldhandler; - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(priv); rttvdbg("Entry: handler=%p\n", handler); @@ -590,7 +592,7 @@ static tccb_t sam34_sethandler(FAR struct timer_lowerhalf_s *lower, priv->handler = handler; - irqrestore(flags); + leave_critical_section(flags); return oldhandler; } diff --git a/arch/arm/src/sam34/sam_serial.c b/arch/arm/src/sam34/sam_serial.c index b5381015d76..cb96ea0a344 100644 --- a/arch/arm/src/sam34/sam_serial.c +++ b/arch/arm/src/sam34/sam_serial.c @@ -667,7 +667,7 @@ static void up_disableallints(struct up_dev_s *priv, uint32_t *imr) /* The following must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); if (imr) { /* Return the current interrupt mask */ @@ -678,7 +678,7 @@ static void up_disableallints(struct up_dev_s *priv, uint32_t *imr) /* Disable all interrupts */ up_serialout(priv, SAM_UART_IDR_OFFSET, UART_INT_ALLINTS); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1307,7 +1307,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX holding register register @@ -1332,7 +1332,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_serialout(priv, SAM_UART_IDR_OFFSET, UART_INT_TXRDY); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/sam34/sam_spi.c b/arch/arm/src/sam34/sam_spi.c index a791ff498cb..424d9218449 100644 --- a/arch/arm/src/sam34/sam_spi.c +++ b/arch/arm/src/sam34/sam_spi.c @@ -52,6 +52,7 @@ #include +#include #include #include #include @@ -1831,7 +1832,7 @@ struct spi_dev_s *sam_spibus_initialize(int port) { /* Enable clocking to the SPI block */ - flags = irqsave(); + flags = enter_critical_section(); #if defined(CONFIG_SAM34_SPI0) && defined(CONFIG_SAM34_SPI1) if (spino == 0) #endif @@ -1873,7 +1874,7 @@ struct spi_dev_s *sam_spibus_initialize(int port) spi_putreg(spi, SPI_CR_SWRST, SAM_SPI_CR_OFFSET); spi_putreg(spi, SPI_CR_SWRST, SAM_SPI_CR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); /* Configure the SPI mode register */ diff --git a/arch/arm/src/sam34/sam_tc.c b/arch/arm/src/sam34/sam_tc.c index 4ab135da3c7..a95fa495273 100644 --- a/arch/arm/src/sam34/sam_tc.c +++ b/arch/arm/src/sam34/sam_tc.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sam34/sam_tc.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * Bob Dioron * @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -527,7 +528,7 @@ static tccb_t sam34_sethandler(FAR struct timer_lowerhalf_s *lower, irqstate_t flags; tccb_t oldhandler; - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(priv); tcvdbg("Entry: handler=%p\n", handler); @@ -540,7 +541,7 @@ static tccb_t sam34_sethandler(FAR struct timer_lowerhalf_s *lower, priv->handler = handler; - irqrestore(flags); + leave_critical_section(flags); return oldhandler; } diff --git a/arch/arm/src/sam34/sam_twi.c b/arch/arm/src/sam34/sam_twi.c index 4ffd90b5a80..32490413548 100644 --- a/arch/arm/src/sam34/sam_twi.c +++ b/arch/arm/src/sam34/sam_twi.c @@ -58,7 +58,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -732,7 +732,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev, * interrupt level. */ - flags = irqsave(); + flags = enter_critical_section(); twi_startmessage(priv, msgs); /* And wait for the transfers to complete. Interrupts will be re-enabled @@ -745,7 +745,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev, i2cdbg("ERROR: Transfer failed: %d\n", ret); } - irqrestore(flags); + leave_critical_section(flags); twi_givesem(&priv->exclsem); return ret; } @@ -926,7 +926,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus) i2cvdbg("Initializing TWI%d\n", bus); - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_SAM34_TWI0 if (bus == 0) @@ -983,7 +983,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus) else #endif { - irqrestore(flags); + leave_critical_section(flags); i2cdbg("ERROR: Unsupported bus: TWI%d\n", bus); return NULL; } @@ -1012,7 +1012,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus) /* Enable Interrupts */ up_enable_irq(priv->irq); - irqrestore(flags); + leave_critical_section(flags); return &priv->dev; } diff --git a/arch/arm/src/sam34/sam_udp.c b/arch/arm/src/sam34/sam_udp.c index bc78542d178..0a74f5ba243 100644 --- a/arch/arm/src/sam34/sam_udp.c +++ b/arch/arm/src/sam34/sam_udp.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sam34/sam_udp.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * This driver derives in a small part from the SAMA5D3 UDP driver: @@ -58,6 +58,7 @@ #include #include +#include #include #include #include @@ -803,9 +804,9 @@ static void sam_req_complete(struct sam_ep_s *privep, int16_t result) /* Remove the completed request at the head of the endpoint request list */ - flags = irqsave(); + flags = enter_critical_section(); privreq = sam_req_dequeue(&privep->reqq); - irqrestore(flags); + leave_critical_section(flags); if (privreq) { @@ -2557,7 +2558,7 @@ static int sam_ep_stall(struct sam_ep_s *privep) /* Check that endpoint is enabled and not already in Halt state */ - flags = irqsave(); + flags = enter_critical_section(); if ((privep->epstate != UDP_EPSTATE_DISABLED) && (privep->epstate != UDP_EPSTATE_STALLED)) { @@ -2582,7 +2583,7 @@ static int sam_ep_stall(struct sam_ep_s *privep) sam_csr_setbits(epno, UDPEP_CSR_FORCESTALL); } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2601,7 +2602,7 @@ static int sam_ep_resume(struct sam_ep_s *privep) DEBUGASSERT(/* privep->epstate == UDP_EPSTATE_IDLE && */ privep->dev); - flags = irqsave(); + flags = enter_critical_section(); /* Check if the endpoint is stalled */ @@ -2646,7 +2647,7 @@ static int sam_ep_resume(struct sam_ep_s *privep) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2665,7 +2666,7 @@ sam_ep_reserve(struct sam_usbdev_s *priv, uint8_t epset) irqstate_t flags; int epndx = 0; - flags = irqsave(); + flags = enter_critical_section(); epset &= priv->epavail; if (epset) { @@ -2690,7 +2691,7 @@ sam_ep_reserve(struct sam_usbdev_s *priv, uint8_t epset) } } - irqrestore(flags); + leave_critical_section(flags); return privep; } @@ -2706,9 +2707,9 @@ sam_ep_reserve(struct sam_usbdev_s *priv, uint8_t epset) static inline void sam_ep_unreserve(struct sam_usbdev_s *priv, struct sam_ep_s *privep) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->epavail |= SAM_EP_BIT(USB_EPNO(privep->ep.eplog)); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2955,14 +2956,14 @@ static int sam_ep_disable(struct usbdev_ep_s *ep) /* Reset the endpoint and cancel any ongoing activity */ - flags = irqsave(); + flags = enter_critical_section(); priv = privep->dev; sam_ep_reset(priv, epno); /* Revert to the addressed-but-not-configured state */ sam_setdevaddr(priv, priv->devaddr); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3100,7 +3101,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) req->result = -EINPROGRESS; req->xfrd = 0; privreq->inflight = 0; - flags = irqsave(); + flags = enter_critical_section(); /* Handle IN (device-to-host) requests. NOTE: If the class device is * using the bi-directional EP0, then we assume that they intend the EP0 @@ -3168,7 +3169,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -3190,9 +3191,9 @@ static int sam_ep_cancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req) #endif usbtrace(TRACE_EPCANCEL, USB_EPNO(ep->eplog)); - flags = irqsave(); + flags = enter_critical_section(); sam_req_cancel(privep, -EAGAIN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3233,7 +3234,7 @@ static int sam_ep_stallresume(struct usbdev_ep_s *ep, bool resume) * requests before sending the stall. */ - flags = irqsave(); + flags = enter_critical_section(); epno = USB_EPNO(ep->eplog); if (epno != 0 && USB_ISEPIN(ep->eplog)) { @@ -3247,7 +3248,7 @@ static int sam_ep_stallresume(struct usbdev_ep_s *ep, bool resume) */ privep->pending = true; - irqrestore(flags); + leave_critical_section(flags); return OK; } } @@ -3257,7 +3258,7 @@ static int sam_ep_stallresume(struct usbdev_ep_s *ep, bool resume) */ ret = sam_ep_stall(privep); - irqrestore(flags); + leave_critical_section(flags); } return ret; @@ -3418,7 +3419,7 @@ static int sam_wakeup(struct usbdev_s *dev) /* Resume normal operation */ - flags = irqsave(); + flags = enter_critical_section(); sam_resume(priv); /* Activate a remote wakeup. Setting the Enable Send Resume (ESR) bit @@ -3461,7 +3462,7 @@ static int sam_wakeup(struct usbdev_s *dev) regval = sam_getreg(SAM_UDP_GLBSTAT); regval |= UDP_GLBSTAT_ESR; sam_putreg(regval, SAM_UDP_GLBSTAT); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3883,7 +3884,7 @@ void up_usbuninitialize(void) struct sam_usbdev_s *priv = &g_udp; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); usbtrace(TRACE_DEVUNINIT, 0); /* Disable and detach the UDP IRQ */ @@ -3901,7 +3902,7 @@ void up_usbuninitialize(void) sam_hw_shutdown(priv); sam_sw_shutdown(priv); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -4011,7 +4012,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) * canceled while the class driver is still bound. */ - flags = irqsave(); + flags = enter_critical_section(); /* Unbind the class driver */ @@ -4035,7 +4036,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Unhook the driver */ priv->driver = NULL; - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/sam34/sam_wdt.c b/arch/arm/src/sam34/sam_wdt.c index eebb503785b..dbb3f6f895e 100644 --- a/arch/arm/src/sam34/sam_wdt.c +++ b/arch/arm/src/sam34/sam_wdt.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sam34/sam_wdt.c * - * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * Bob Doiron * @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -545,7 +546,8 @@ static xcpt_t sam34_capture(FAR struct watchdog_lowerhalf_s *lower, wdvdbg("Entry: handler=%p\n", handler); /* Get the old handler return value */ - flags = irqsave(); + + flags = enter_critical_section(); oldhandler = priv->handler; /* Save the new handler */ @@ -574,8 +576,9 @@ static xcpt_t sam34_capture(FAR struct watchdog_lowerhalf_s *lower, up_disable_irq(STM32_IRQ_WWDG); } - irqrestore(flags); + leave_critical_section(flags); return oldhandler; + #endif ASSERT(0); return NULL; diff --git a/arch/arm/src/sama5/sam_dbgu.c b/arch/arm/src/sama5/sam_dbgu.c index e232d03009a..e04f57c6d7b 100644 --- a/arch/arm/src/sama5/sam_dbgu.c +++ b/arch/arm/src/sama5/sam_dbgu.c @@ -252,7 +252,7 @@ static void dbgu_shutdown(struct uart_dev_s *dev) /* The following must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Reset and disable receiver and transmitter */ @@ -262,7 +262,7 @@ static void dbgu_shutdown(struct uart_dev_s *dev) /* Disable all interrupts */ putreg32(DBGU_INT_ALLINTS, SAM_DBGU_IDR); - irqrestore(flags); + leave_critical_section(flags); #endif } @@ -510,7 +510,7 @@ static void dbgu_txint(struct uart_dev_s *dev, bool enable) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX holding register register @@ -534,7 +534,7 @@ static void dbgu_txint(struct uart_dev_s *dev, bool enable) putreg32(DBGU_INT_TXRDY, SAM_DBGU_IDR); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/sama5/sam_dmac.c b/arch/arm/src/sama5/sam_dmac.c index 645ec3b0312..990e05df545 100644 --- a/arch/arm/src/sama5/sam_dmac.c +++ b/arch/arm/src/sama5/sam_dmac.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sama5/sam3u_dmac.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -48,7 +48,6 @@ #include #include -#include #include "up_arch.h" #include "cache.h" @@ -2342,9 +2341,9 @@ void sam_dmastop(DMA_HANDLE handle) dmavdbg("dmach: %p\n", dmach); DEBUGASSERT(dmach != NULL); - flags = irqsave(); + flags = enter_critical_section(); sam_dmaterminate(dmach, -EINTR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2371,7 +2370,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs) * cause lost interrupts. */ - flags = irqsave(); + flags = enter_critical_section(); regs->gcfg = sam_getdmac(dmac, SAM_DMAC_GCFG_OFFSET); regs->en = sam_getdmac(dmac, SAM_DMAC_EN_OFFSET); regs->sreq = sam_getdmac(dmac, SAM_DMAC_SREQ_OFFSET); @@ -2393,7 +2392,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs) regs->cfg = sam_getdmach(dmach, SAM_DMAC_CH_CFG_OFFSET); regs->spip = sam_getdmach(dmach, SAM_DMAC_CH_SPIP_OFFSET); regs->dpip = sam_getdmach(dmach, SAM_DMAC_CH_DPIP_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DEBUG_DMA */ diff --git a/arch/arm/src/sama5/sam_ehci.c b/arch/arm/src/sama5/sam_ehci.c index 47b98cb21cd..a6cb3d0d7aa 100644 --- a/arch/arm/src/sama5/sam_ehci.c +++ b/arch/arm/src/sama5/sam_ehci.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sama5/sam_ehci.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include #include @@ -1400,7 +1401,7 @@ static int sam_ioc_setup(struct sam_rhport_s *rhport, struct sam_epinfo_s *epinf /* Is the device still connected? */ - flags = irqsave(); + flags = enter_critical_section(); if (rhport->connected) { /* Then set iocwait to indicate that we expect to be informed when @@ -1419,7 +1420,7 @@ static int sam_ioc_setup(struct sam_rhport_s *rhport, struct sam_epinfo_s *epinf ret = OK; /* We are good to go */ } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -2390,7 +2391,7 @@ static inline int sam_ioc_async_setup(struct sam_rhport_s *rhport, /* Is the device still connected? */ - flags = irqsave(); + flags = enter_critical_section(); if (rhport->connected) { /* Then save callback information to used when either (1) the @@ -2406,7 +2407,7 @@ static inline int sam_ioc_async_setup(struct sam_rhport_s *rhport, ret = OK; /* We are good to go */ } - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -3287,7 +3288,7 @@ static int sam_wait(FAR struct usbhost_connection_s *conn, * ports or until an error occurs. */ - flags = irqsave(); + flags = enter_critical_section(); for (; ; ) { /* Check for a change in the connection state on any root hub port */ @@ -3309,7 +3310,7 @@ static int sam_wait(FAR struct usbhost_connection_s *conn, connport->connected = rhport->connected; *hport = connport; - irqrestore(flags); + leave_critical_section(flags); usbhost_vtrace2(EHCI_VTRACE2_MONWAKEUP, rhpndx + 1, rhport->connected); @@ -3330,7 +3331,7 @@ static int sam_wait(FAR struct usbhost_connection_s *conn, g_ehci.hport = NULL; *hport = (struct usbhost_hubport_s *)connport; - irqrestore(flags); + leave_critical_section(flags); usbhost_vtrace2(EHCI_VTRACE2_MONWAKEUP, connport->port + 1, connport->connected); @@ -4331,7 +4332,7 @@ static int sam_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) * related race conditions. */ - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_USBHOST_ASYNCH callback = epinfo->callback; arg = epinfo->arg; @@ -4343,7 +4344,7 @@ static int sam_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) epinfo->arg = NULL; #endif epinfo->iocwait = false; - irqrestore(flags); + leave_critical_section(flags); /* Bail if there is no transfer in progress for this endpoint */ @@ -4503,7 +4504,7 @@ static int sam_connect(FAR struct usbhost_driver_s *drvr, /* Report the connection event */ - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(g_ehci.hport == NULL); /* REVISIT */ g_ehci.hport = hport; @@ -4513,7 +4514,7 @@ static int sam_connect(FAR struct usbhost_driver_s *drvr, sam_givesem(&g_ehci.pscsem); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif @@ -4749,7 +4750,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller) /* Enable UHP peripheral clocking */ - flags = irqsave(); + flags = enter_critical_section(); sam_uhphs_enableclk(); /* Enable OHCI clocks */ @@ -4778,7 +4779,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller) regval &= ~SFR_OHCIICR_RES2; #endif putreg32(regval, SAM_SFR_OHCIICR); - irqrestore(flags); + leave_critical_section(flags); /* Note that no pin configuration is required. All USB HS pins have * dedicated function diff --git a/arch/arm/src/sama5/sam_emaca.c b/arch/arm/src/sama5/sam_emaca.c index 9ce94c5dacd..5d3ad03e60b 100644 --- a/arch/arm/src/sama5/sam_emaca.c +++ b/arch/arm/src/sama5/sam_emaca.c @@ -1779,7 +1779,7 @@ static int sam_ifdown(struct net_driver_s *dev) /* Disable the EMAC interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(SAM_IRQ_EMAC); /* Cancel the TX poll timer and TX timeout timers */ @@ -1797,7 +1797,7 @@ static int sam_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -1831,7 +1831,7 @@ static int sam_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Ignore the notification if the interface is not yet up */ @@ -1842,7 +1842,7 @@ static int sam_txavail(struct net_driver_s *dev) sam_dopoll(priv); } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/sama5/sam_emacb.c b/arch/arm/src/sama5/sam_emacb.c index ec734e3089b..fccc2d51f03 100644 --- a/arch/arm/src/sama5/sam_emacb.c +++ b/arch/arm/src/sama5/sam_emacb.c @@ -2464,7 +2464,7 @@ static int sam_ifdown(struct net_driver_s *dev) /* Disable the EMAC interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(priv->attr->irq); /* Cancel the TX poll timer and TX timeout timers */ @@ -2482,7 +2482,7 @@ static int sam_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2591,12 +2591,12 @@ static int sam_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Perform the out-of-cycle poll now */ sam_txavail_process(priv); - irqrestore(flags); + leave_critical_section(flags); #endif return OK; diff --git a/arch/arm/src/sama5/sam_flexcom_serial.c b/arch/arm/src/sama5/sam_flexcom_serial.c index d377fdae56d..022cd1e67be 100644 --- a/arch/arm/src/sama5/sam_flexcom_serial.c +++ b/arch/arm/src/sama5/sam_flexcom_serial.c @@ -524,7 +524,7 @@ static void flexus_disableallints(struct flexus_dev_s *priv, uint32_t *imr) /* The following must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Return the current interrupt state */ @@ -536,7 +536,7 @@ static void flexus_disableallints(struct flexus_dev_s *priv, uint32_t *imr) /* Disable all interrupts */ flexus_serialout(priv, SAM_FLEXUS_IDR_OFFSET, FLEXUS_INT_ALLINTS); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1127,7 +1127,7 @@ static void flexus_txint(struct uart_dev_s *dev, bool enable) struct flexus_dev_s *priv = (struct flexus_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX holding register register @@ -1152,7 +1152,7 @@ static void flexus_txint(struct uart_dev_s *dev, bool enable) flexus_serialout(priv, SAM_FLEXUS_IDR_OFFSET, FLEXUS_INT_TXRDY); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/sama5/sam_freerun.c b/arch/arm/src/sama5/sam_freerun.c index 90ad9676f17..18d2556bbf5 100644 --- a/arch/arm/src/sama5/sam_freerun.c +++ b/arch/arm/src/sama5/sam_freerun.c @@ -55,7 +55,7 @@ #include #include -#include +#include #include #include "sam_freerun.h" @@ -248,7 +248,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts) * If we do not handle the overflow here then, it will be lost. */ - flags = irqsave(); + flags = enter_critical_section(); overflow = freerun->overflow; counter = sam_tc_getcounter(freerun->tch); sr = sam_tc_getpending(freerun->tch); @@ -272,7 +272,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts) freerun->overflow = overflow; } - irqrestore(flags); + leave_critical_section(flags); tcvdbg("counter=%lu (%lu) overflow=%lu, sr=%08lx\n", (unsigned long)counter, (unsigned long)verify, diff --git a/arch/arm/src/sama5/sam_gmac.c b/arch/arm/src/sama5/sam_gmac.c index 021fd842709..8426e7dcb3b 100644 --- a/arch/arm/src/sama5/sam_gmac.c +++ b/arch/arm/src/sama5/sam_gmac.c @@ -1734,7 +1734,7 @@ static int sam_ifdown(struct net_driver_s *dev) /* Disable the GMAC interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(SAM_IRQ_GMAC); /* Cancel the TX poll timer and TX timeout timers */ @@ -1752,7 +1752,7 @@ static int sam_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -1786,7 +1786,7 @@ static int sam_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Ignore the notification if the interface is not yet up */ @@ -1797,7 +1797,7 @@ static int sam_txavail(struct net_driver_s *dev) sam_dopoll(priv); } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/sama5/sam_hsmci.c b/arch/arm/src/sama5/sam_hsmci.c index 84a654f1516..54a7e34d9a5 100644 --- a/arch/arm/src/sama5/sam_hsmci.c +++ b/arch/arm/src/sama5/sam_hsmci.c @@ -54,7 +54,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -815,11 +815,11 @@ static inline void sam_configwaitints(struct sam_dev_s *priv, /* Save all of the data in one, atomic operation. */ - flags = irqsave(); + flags = enter_critical_section(); priv->waitevents = waitevents; priv->wkupevent = 0; priv->waitmask = waitmask; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -846,12 +846,12 @@ static void sam_disablewaitints(struct sam_dev_s *priv, * operation. */ - flags = irqsave(); + flags = enter_critical_section(); priv->waitevents = 0; priv->wkupevent = wkupevent; priv->waitmask = 0; sam_putreg(priv, ~priv->xfrmask, SAM_HSMCI_IDR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -894,10 +894,10 @@ static inline void sam_configxfrints(struct sam_dev_s *priv, uint32_t xfrmask) static void sam_disablexfrints(struct sam_dev_s *priv) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->xfrmask = 0; sam_putreg(priv, ~priv->waitmask, SAM_HSMCI_IDR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1710,7 +1710,7 @@ static void sam_reset(FAR struct sdio_dev_s *dev) /* Reset the MCI */ - flags = irqsave(); + flags = enter_critical_section(); sam_putreg(priv, HSMCI_CR_SWRST, SAM_HSMCI_CR_OFFSET); /* Disable the MCI */ @@ -1766,7 +1766,7 @@ static void sam_reset(FAR struct sdio_dev_s *dev) /* DMA data transfer support */ priv->widebus = false; /* Required for DMA support */ - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3098,7 +3098,7 @@ static void sam_callback(void *arg) fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n", priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus); - flags = irqsave(); + flags = enter_critical_section(); if (priv->callback) { /* Yes.. Check for enabled callback events */ @@ -3164,7 +3164,7 @@ static void sam_callback(void *arg) } } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3382,7 +3382,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) * still be atomic. */ - flags = irqsave(); + flags = enter_critical_section(); cdstatus = priv->cdstatus; if (cardinslot) { @@ -3402,7 +3402,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) sam_callback(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3428,7 +3428,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) /* Update card status */ - flags = irqsave(); + flags = enter_critical_section(); if (wrprotect) { priv->cdstatus |= SDIO_STATUS_WRPROTECTED; @@ -3439,7 +3439,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) } fvdbg("cdstatus: %02x\n", priv->cdstatus); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_SAMA5_HSMCI0 || CONFIG_SAMA5_HSMCI1 || CONFIG_SAMA5_HSMCI2 */ diff --git a/arch/arm/src/sama5/sam_irq.c b/arch/arm/src/sama5/sam_irq.c index 0cca64f8eb5..d09dc52c0bc 100644 --- a/arch/arm/src/sama5/sam_irq.c +++ b/arch/arm/src/sama5/sam_irq.c @@ -124,7 +124,7 @@ static void sam_dumpaic(const char *msg, uintptr_t base, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("AIC (%s, base=%08x irq=%d):\n", msg, base, irq); /* Select the register set associated with this irq */ @@ -167,7 +167,7 @@ static void sam_dumpaic(const char *msg, uintptr_t base, int irq) getreg32(base + SAM_AIC_WPMR_OFFSET), getreg32(base + SAM_AIC_WPSR_OFFSET)); - irqrestore(flags); + leave_critical_section(flags); } #else # define sam_dumpaic(msg, base, irq) @@ -696,7 +696,7 @@ static void sam_disable_irq(uintptr_t base, int irq) { /* These operations must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Select the register set associated with this irq */ @@ -706,7 +706,7 @@ static void sam_disable_irq(uintptr_t base, int irq) putreg32(AIC_IDCR_INTD, base + SAM_AIC_IDCR_OFFSET); sam_dumpaic("disable", base, irq); - irqrestore(flags); + leave_critical_section(flags); } #ifdef CONFIG_SAMA5_PIO_IRQ else @@ -748,7 +748,7 @@ static void sam_enable_irq(uintptr_t base, int irq) { /* These operations must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Select the register set associated with this irq */ @@ -758,7 +758,7 @@ static void sam_enable_irq(uintptr_t base, int irq) putreg32(AIC_IECR_INTEN, base + SAM_AIC_IECR_OFFSET); sam_dumpaic("enable", base, irq); - irqrestore(flags); + leave_critical_section(flags); } #ifdef CONFIG_SAMA5_PIO_IRQ else @@ -806,7 +806,7 @@ static int sam_prioritize_irq(uint32_t base, int irq, int priority) { /* These operations must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Select the register set associated with this irq */ @@ -827,7 +827,7 @@ static int sam_prioritize_irq(uint32_t base, int irq, int priority) putreg32(AIC_WPMR_WPKEY | AIC_WPMR_WPEN, base + SAM_AIC_WPMR_OFFSET); sam_dumpaic("prioritize", base, irq); - irqrestore(flags); + leave_critical_section(flags); } return OK; @@ -867,7 +867,7 @@ static void _sam_irq_srctype(uintptr_t base, int irq, /* These operations must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Select the register set associated with this irq */ @@ -888,7 +888,7 @@ static void _sam_irq_srctype(uintptr_t base, int irq, putreg32(AIC_WPMR_WPKEY | AIC_WPMR_WPEN, base + SAM_AIC_WPMR_OFFSET); sam_dumpaic("srctype", base, irq); - irqrestore(flags); + leave_critical_section(flags); } void sam_irq_srctype(int irq, enum sam_srctype_e srctype) diff --git a/arch/arm/src/sama5/sam_lowputc.c b/arch/arm/src/sama5/sam_lowputc.c index c0413c259f5..84e7a37d213 100644 --- a/arch/arm/src/sama5/sam_lowputc.c +++ b/arch/arm/src/sama5/sam_lowputc.c @@ -41,7 +41,7 @@ #include -#include +#include #include "up_internal.h" #include "up_arch.h" @@ -252,18 +252,18 @@ void up_lowputc(char ch) * atomic. */ - flags = irqsave(); + flags = enter_critical_section(); if ((getreg32(SAM_CONSOLE_VBASE + SAM_UART_SR_OFFSET) & UART_INT_TXEMPTY) != 0) { /* Send the character */ putreg32((uint32_t)ch, SAM_CONSOLE_VBASE + SAM_UART_THR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); return; } - irqrestore(flags); + leave_critical_section(flags); } #elif defined(SAMA5_HAVE_FLEXCOM_CONSOLE) @@ -280,18 +280,18 @@ void up_lowputc(char ch) * atomic. */ - flags = irqsave(); + flags = enter_critical_section(); if ((getreg32(SAM_CONSOLE_VBASE + SAM_FLEXUS_CSR_OFFSET) & FLEXUS_INT_TXEMPTY) != 0) { /* Send the character */ putreg32((uint32_t)ch, SAM_CONSOLE_VBASE + SAM_FLEXUS_THR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); return; } - irqrestore(flags); + leave_critical_section(flags); } #elif defined(CONFIG_SAMA5_DBGU_CONSOLE) @@ -307,17 +307,17 @@ void up_lowputc(char ch) * atomic. */ - flags = irqsave(); + flags = enter_critical_section(); if ((getreg32(SAM_DBGU_SR) & DBGU_INT_TXEMPTY) != 0) { /* Send the character */ putreg32((uint32_t)ch, SAM_DBGU_THR); - irqrestore(flags); + leave_critical_section(flags); return; } - irqrestore(flags); + leave_critical_section(flags); } #endif } diff --git a/arch/arm/src/sama5/sam_nand.c b/arch/arm/src/sama5/sam_nand.c index 3a5e90afc7b..d5d235d2168 100644 --- a/arch/arm/src/sama5/sam_nand.c +++ b/arch/arm/src/sama5/sam_nand.c @@ -64,7 +64,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -685,7 +685,7 @@ static void nand_wait_cmddone(struct sam_nandcs_s *priv) /* Wait for the CMDDONE interrupt to occur */ - flags = irqsave(); + flags = enter_critical_section(); do { ret = sem_wait(&g_nand.waitsem); @@ -699,7 +699,7 @@ static void nand_wait_cmddone(struct sam_nandcs_s *priv) /* CMDDONE received */ g_nand.cmddone = false; - irqrestore(flags); + leave_critical_section(flags); #else /* Poll for the CMDDONE event (latching other events as necessary) */ @@ -736,7 +736,7 @@ static void nand_setup_cmddone(struct sam_nandcs_s *priv) */ nand_getreg(SAM_HSMC_SR); - flags = irqsave(); + flags = enter_critical_section(); /* Mark CMDDONE not received */ @@ -745,7 +745,7 @@ static void nand_setup_cmddone(struct sam_nandcs_s *priv) /* Enable the CMDDONE interrupt */ nand_putreg(SAM_HSMC_IER, HSMC_NFCINT_CMDDONE); - irqrestore(flags); + leave_critical_section(flags); #else /* Just sample and clear any pending NFC status, then clear CMDDONE status */ @@ -776,7 +776,7 @@ static void nand_wait_xfrdone(struct sam_nandcs_s *priv) /* Wait for the XFRDONE interrupt to occur */ - flags = irqsave(); + flags = enter_critical_section(); do { ret = sem_wait(&g_nand.waitsem); @@ -790,7 +790,7 @@ static void nand_wait_xfrdone(struct sam_nandcs_s *priv) /* XFRDONE received */ g_nand.xfrdone = false; - irqrestore(flags); + leave_critical_section(flags); #else /* Poll for the XFRDONE event (latching other events as necessary) */ @@ -827,7 +827,7 @@ static void nand_setup_xfrdone(struct sam_nandcs_s *priv) */ nand_getreg(SAM_HSMC_SR); - flags = irqsave(); + flags = enter_critical_section(); /* Mark XFRDONE not received */ @@ -836,7 +836,7 @@ static void nand_setup_xfrdone(struct sam_nandcs_s *priv) /* Enable the XFRDONE interrupt */ nand_putreg(SAM_HSMC_IER, HSMC_NFCINT_XFRDONE); - irqrestore(flags); + leave_critical_section(flags); #else /* Just sample and clear any pending NFC status, then clear XFRDONE status */ @@ -867,7 +867,7 @@ static void nand_wait_rbedge(struct sam_nandcs_s *priv) /* Wait for the RBEDGE0 interrupt to occur */ - flags = irqsave(); + flags = enter_critical_section(); do { ret = sem_wait(&g_nand.waitsem); @@ -881,7 +881,7 @@ static void nand_wait_rbedge(struct sam_nandcs_s *priv) /* RBEDGE0 received */ g_nand.rbedge = false; - irqrestore(flags); + leave_critical_section(flags); #else /* Poll for the RBEDGE0 event (latching other events as necessary) */ @@ -918,7 +918,7 @@ static void nand_setup_rbedge(struct sam_nandcs_s *priv) */ nand_getreg(SAM_HSMC_SR); - flags = irqsave(); + flags = enter_critical_section(); /* Mark RBEDGE0 not received */ @@ -927,7 +927,7 @@ static void nand_setup_rbedge(struct sam_nandcs_s *priv) /* Enable the RBEDGE0 interrupt */ nand_putreg(SAM_HSMC_IER, HSMC_NFCINT_RBEDGE0); - irqrestore(flags); + leave_critical_section(flags); #else /* Just sample and clear any pending NFC status, then clear RBEDGE0 status */ @@ -991,7 +991,7 @@ static uint32_t nand_nfc_poll(void) * the interrupt level as well. */ - flags = irqsave(); + flags = enter_critical_section(); #endif /* Read the current HSMC status, clearing most pending conditions */ @@ -1038,7 +1038,7 @@ static uint32_t nand_nfc_poll(void) } #ifdef CONFIG_SAMA5_NAND_HSMCINTERRUPTS - irqrestore(flags); + leave_critical_section(flags); #endif return sr; } diff --git a/arch/arm/src/sama5/sam_ohci.c b/arch/arm/src/sama5/sam_ohci.c index 986a29f8912..5dbad089e96 100644 --- a/arch/arm/src/sama5/sam_ohci.c +++ b/arch/arm/src/sama5/sam_ohci.c @@ -57,7 +57,7 @@ #include #include -#include +#include #include /* May redefine PIO settings */ @@ -751,14 +751,14 @@ static struct sam_gtd_s *sam_tdalloc(void) * interrupt handler. */ - flags = irqsave(); + flags = enter_critical_section(); ret = (struct sam_gtd_s *)g_tdfree; if (ret) { g_tdfree = ((struct sam_list_s *)ret)->flink; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -841,7 +841,7 @@ static int sam_addctrled(struct sam_ed_s *ed) /* Disable control list processing while we modify the list */ - flags = irqsave(); + flags = enter_critical_section(); regval = sam_getreg(SAM_USBHOST_CTRL); regval &= ~OHCI_CTRL_CLE; sam_putreg(regval, SAM_USBHOST_CTRL); @@ -862,7 +862,7 @@ static int sam_addctrled(struct sam_ed_s *ed) regval |= OHCI_CTRL_CLE; sam_putreg(regval, SAM_USBHOST_CTRL); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -884,7 +884,7 @@ static inline int sam_remctrled(struct sam_ed_s *ed) /* Disable control list processing while we modify the list */ - flags = irqsave(); + flags = enter_critical_section(); regval = sam_getreg(SAM_USBHOST_CTRL); regval &= ~OHCI_CTRL_CLE; sam_putreg(regval, SAM_USBHOST_CTRL); @@ -938,7 +938,7 @@ static inline int sam_remctrled(struct sam_ed_s *ed) sam_putreg(regval, SAM_USBHOST_CTRL); } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -959,7 +959,7 @@ static inline int sam_addbulked(struct sam_ed_s *ed) /* Disable bulk list processing while we modify the list */ - flags = irqsave(); + flags = enter_critical_section(); regval = sam_getreg(SAM_USBHOST_CTRL); regval &= ~OHCI_CTRL_BLE; sam_putreg(regval, SAM_USBHOST_CTRL); @@ -980,7 +980,7 @@ static inline int sam_addbulked(struct sam_ed_s *ed) regval |= OHCI_CTRL_BLE; sam_putreg(regval, SAM_USBHOST_CTRL); - irqrestore(flags); + leave_critical_section(flags); return OK; #else return -ENOSYS; @@ -1006,7 +1006,7 @@ static inline int sam_rembulked(struct sam_ed_s *ed) /* Disable bulk list processing while we modify the list */ - flags = irqsave(); + flags = enter_critical_section(); regval = sam_getreg(SAM_USBHOST_CTRL); regval &= ~OHCI_CTRL_BLE; sam_putreg(regval, SAM_USBHOST_CTRL); @@ -1060,7 +1060,7 @@ static inline int sam_rembulked(struct sam_ed_s *ed) sam_putreg(regval, SAM_USBHOST_CTRL); } - irqrestore(flags); + leave_critical_section(flags); return OK; #else return -ENOSYS; @@ -1170,7 +1170,7 @@ static inline int sam_addinted(const struct usbhost_epdesc_s *epdesc, * at the next SOF... need to check. */ - flags = irqsave(); + flags = enter_critical_section(); regval = sam_getreg(SAM_USBHOST_CTRL); regval &= ~OHCI_CTRL_PLE; sam_putreg(regval, SAM_USBHOST_CTRL); @@ -1247,7 +1247,7 @@ static inline int sam_addinted(const struct usbhost_epdesc_s *epdesc, regval |= OHCI_CTRL_PLE; sam_putreg(regval, SAM_USBHOST_CTRL); - irqrestore(flags); + leave_critical_section(flags); return OK; #else return -ENOSYS; @@ -1290,7 +1290,7 @@ static inline int sam_reminted(struct sam_ed_s *ed) * at the next SOF... need to check. */ - flags = irqsave(); + flags = enter_critical_section(); regval = sam_getreg(SAM_USBHOST_CTRL); regval &= ~OHCI_CTRL_PLE; sam_putreg(regval, SAM_USBHOST_CTRL); @@ -1402,7 +1402,7 @@ static inline int sam_reminted(struct sam_ed_s *ed) sam_putreg(regval, SAM_USBHOST_CTRL); } - irqrestore(flags); + leave_critical_section(flags); return OK; #else return -ENOSYS; @@ -1559,11 +1559,11 @@ static int sam_ep0enqueue(struct sam_rhport_s *rhport) /* Allocate a control ED and a tail TD */ - flags = irqsave(); + flags = enter_critical_section(); edctrl = sam_edalloc(); if (!edctrl) { - irqrestore(flags); + leave_critical_section(flags); return -ENOMEM; } @@ -1571,7 +1571,7 @@ static int sam_ep0enqueue(struct sam_rhport_s *rhport) if (!tdtail) { sam_edfree(edctrl); - irqrestore(flags); + leave_critical_section(flags); return -ENOMEM; } @@ -1612,7 +1612,7 @@ static int sam_ep0enqueue(struct sam_rhport_s *rhport) /* Add the ED to the control list */ ret = sam_addctrled(edctrl); - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -1649,7 +1649,7 @@ static void sam_ep0dequeue(struct sam_eplist_s *ep0) * Control list. We should never modify the control list while CLE is set. */ - flags = irqsave(); + flags = enter_critical_section(); regval = sam_getreg(SAM_USBHOST_CTRL); regval &= ~OHCI_CTRL_CLE; sam_putreg(regval, SAM_USBHOST_CTRL); @@ -1703,7 +1703,7 @@ static void sam_ep0dequeue(struct sam_eplist_s *ep0) } } - irqrestore(flags); + leave_critical_section(flags); /* Release any TDs that may still be attached to the ED. */ @@ -1742,7 +1742,7 @@ static int sam_wdhwait(struct sam_rhport_s *rhport, struct sam_ed_s *ed, uint8_t *buffer, uint16_t buflen) { struct sam_eplist_s *eplist; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); int ret = -ENODEV; /* Is the device still connected? */ @@ -1769,7 +1769,7 @@ static int sam_wdhwait(struct sam_rhport_s *rhport, struct sam_ed_s *ed, ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -1790,7 +1790,7 @@ static int sam_wdhasynch(struct sam_rhport_s *rhport, struct sam_ed_s *ed, uint8_t *buffer, uint16_t buflen) { struct sam_eplist_s *eplist; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); int ret = -ENODEV; /* Is the device still connected? */ @@ -1815,7 +1815,7 @@ static int sam_wdhasynch(struct sam_rhport_s *rhport, struct sam_ed_s *ed, ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -2340,7 +2340,7 @@ static int sam_wait(struct usbhost_connection_s *conn, * ports or until an error occurs. */ - flags = irqsave(); + flags = enter_critical_section(); for (; ; ) { /* Check for a change in the connection state on any root hub port */ @@ -2373,7 +2373,7 @@ static int sam_wait(struct usbhost_connection_s *conn, * port has the connection change. */ - irqrestore(flags); + leave_critical_section(flags); usbhost_vtrace2(OHCI_VTRACE2_WAKEUP, rhpndx + 1, g_ohci.rhport[rhpndx].connected); @@ -2396,7 +2396,7 @@ static int sam_wait(struct usbhost_connection_s *conn, g_ohci.hport = NULL; *hport = connport; - irqrestore(flags); + leave_critical_section(flags); usbhost_vtrace2(OHCI_VTRACE2_HUBWAKEUP, HPORT(connport), connport->connected); @@ -3648,7 +3648,7 @@ static int sam_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep) /* These first steps must be atomic as possible */ - flags = irqsave(); + flags = enter_critical_section(); /* It might be possible for no transfer to be in progress (callback == NULL * and wdhwait == false) @@ -3753,7 +3753,7 @@ static int sam_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep) eplist->buffer = NULL; eplist->buflen = 0; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3792,7 +3792,7 @@ static int sam_connect(struct usbhost_driver_s *drvr, /* Report the connection event */ - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(g_ohci.hport == NULL); /* REVISIT */ g_ohci.hport = hport; @@ -3802,7 +3802,7 @@ static int sam_connect(struct usbhost_driver_s *drvr, sam_givesem(&g_ohci.pscsem); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif @@ -3930,7 +3930,7 @@ struct usbhost_connection_s *sam_ohci_initialize(int controller) /* Enable UHP peripheral clocking */ - flags = irqsave(); + flags = enter_critical_section(); sam_uhphs_enableclk(); /* Enable OHCI clocks */ @@ -3963,7 +3963,7 @@ struct usbhost_connection_s *sam_ohci_initialize(int controller) putreg32(regval, SAM_SFR_OHCIICR); #endif - irqrestore(flags); + leave_critical_section(flags); /* Note that no pin configuration is required. All USB HS pins have * dedicated function diff --git a/arch/arm/src/sama5/sam_oneshot.c b/arch/arm/src/sama5/sam_oneshot.c index 3f4875fddd1..c86224155af 100644 --- a/arch/arm/src/sama5/sam_oneshot.c +++ b/arch/arm/src/sama5/sam_oneshot.c @@ -55,7 +55,7 @@ #include #include -#include +#include #include #include "sam_oneshot.h" @@ -263,7 +263,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, /* Was the oneshot already running? */ - flags = irqsave(); + flags = enter_critical_section(); if (oneshot->running) { /* Yes.. then cancel it */ @@ -313,7 +313,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, */ oneshot->running = true; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -353,7 +353,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) /* Was the timer running? */ - flags = irqsave(); + flags = enter_critical_section(); if (!oneshot->running) { /* No.. Just return zero timer remaining and successful cancellation. @@ -363,7 +363,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) ts->tv_sec = 0; ts->tv_nsec = 0; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -391,7 +391,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) oneshot->running = false; oneshot->handler = NULL; oneshot->arg = NULL; - irqrestore(flags); + leave_critical_section(flags); /* Did the caller provide us with a location to return the time * remaining? diff --git a/arch/arm/src/sama5/sam_rtc.c b/arch/arm/src/sama5/sam_rtc.c index 58ba64a7826..94bca911424 100644 --- a/arch/arm/src/sama5/sam_rtc.c +++ b/arch/arm/src/sama5/sam_rtc.c @@ -606,7 +606,7 @@ int sam_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) /* Is there already something waiting on the ALARM? */ - flags = irqsave(); + flags = enter_critical_section(); if (g_alarmcb == NULL) { /* No.. Save the callback function pointer */ @@ -677,7 +677,7 @@ int sam_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif diff --git a/arch/arm/src/sama5/sam_serial.c b/arch/arm/src/sama5/sam_serial.c index fb384e0a291..13e72eb986a 100644 --- a/arch/arm/src/sama5/sam_serial.c +++ b/arch/arm/src/sama5/sam_serial.c @@ -964,7 +964,7 @@ static void up_disableallints(struct up_dev_s *priv, uint32_t *imr) /* The following must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Return the current interrupt state */ @@ -976,7 +976,7 @@ static void up_disableallints(struct up_dev_s *priv, uint32_t *imr) /* Disable all interrupts */ up_serialout(priv, SAM_UART_IDR_OFFSET, UART_INT_ALLINTS); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1618,7 +1618,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX holding register register @@ -1643,7 +1643,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_serialout(priv, SAM_UART_IDR_OFFSET, UART_INT_TXRDY); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/sama5/sam_spi.c b/arch/arm/src/sama5/sam_spi.c index 40c8ffdb2ec..2d370fe7a94 100644 --- a/arch/arm/src/sama5/sam_spi.c +++ b/arch/arm/src/sama5/sam_spi.c @@ -56,6 +56,7 @@ #include +#include #include #include #include @@ -1759,7 +1760,7 @@ struct spi_dev_s *sam_spibus_initialize(int port) { /* Enable clocking to the SPI block */ - flags = irqsave(); + flags = enter_critical_section(); #if defined(CONFIG_SAMA5_SPI0) && defined(CONFIG_SAMA5_SPI1) if (spino == 0) #endif @@ -1801,7 +1802,7 @@ struct spi_dev_s *sam_spibus_initialize(int port) spi_putreg(spi, SPI_CR_SWRST, SAM_SPI_CR_OFFSET); spi_putreg(spi, SPI_CR_SWRST, SAM_SPI_CR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); /* Configure the SPI mode register */ diff --git a/arch/arm/src/sama5/sam_ssc.c b/arch/arm/src/sama5/sam_ssc.c index c04e23d3d56..52aac74b17d 100644 --- a/arch/arm/src/sama5/sam_ssc.c +++ b/arch/arm/src/sama5/sam_ssc.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sama5/sam_ssc.c * - * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -52,6 +52,7 @@ #include +#include #include #include #include @@ -881,7 +882,7 @@ static void ssc_dump_queues(struct sam_transport_s *xpt, const char *msg) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); i2sllvdbg("%s\n", msg); i2sllvdbg(" Pending:\n"); ssc_dump_queue(&xpt->pend); @@ -889,7 +890,7 @@ static void ssc_dump_queues(struct sam_transport_s *xpt, const char *msg) ssc_dump_queue(&xpt->act); i2sllvdbg(" Done:\n"); ssc_dump_queue(&xpt->done); - irqrestore(flags); + leave_critical_section(flags); } #endif @@ -988,14 +989,14 @@ static struct sam_buffer_s *ssc_buf_allocate(struct sam_ssc_s *priv) /* Get the buffer from the head of the free list */ - flags = irqsave(); + flags = enter_critical_section(); bfcontainer = priv->freelist; ASSERT(bfcontainer); /* Unlink the buffer from the freelist */ priv->freelist = bfcontainer->flink; - irqrestore(flags); + leave_critical_section(flags); return bfcontainer; } @@ -1023,10 +1024,10 @@ static void ssc_buf_free(struct sam_ssc_s *priv, struct sam_buffer_s *bfcontaine /* Put the buffer container back on the free list */ - flags = irqsave(); + flags = enter_critical_section(); bfcontainer->flink = priv->freelist; priv->freelist = bfcontainer; - irqrestore(flags); + leave_critical_section(flags); /* Wake up any threads waiting for a buffer container */ @@ -1468,9 +1469,9 @@ static void ssc_rx_worker(void *arg) * disabled. */ - flags = irqsave(); + flags = enter_critical_section(); (void)ssc_rxdma_setup(priv); - irqrestore(flags); + leave_critical_section(flags); } /* Process each buffer in the rx.done queue */ @@ -1482,9 +1483,9 @@ static void ssc_rx_worker(void *arg) * also modified from the interrupt level. */ - flags = irqsave(); + flags = enter_critical_section(); bfcontainer = (struct sam_buffer_s *)sq_remfirst(&priv->rx.done); - irqrestore(flags); + leave_critical_section(flags); DEBUGASSERT(bfcontainer && bfcontainer->apb && bfcontainer->callback); apb = bfcontainer->apb; @@ -1880,9 +1881,9 @@ static void ssc_tx_worker(void *arg) * disabled. */ - flags = irqsave(); + flags = enter_critical_section(); (void)ssc_txdma_setup(priv); - irqrestore(flags); + leave_critical_section(flags); } /* Process each buffer in the tx.done queue */ @@ -1894,9 +1895,9 @@ static void ssc_tx_worker(void *arg) * also modified from the interrupt level. */ - flags = irqsave(); + flags = enter_critical_section(); bfcontainer = (struct sam_buffer_s *)sq_remfirst(&priv->tx.done); - irqrestore(flags); + leave_critical_section(flags); /* Perform the TX transfer done callback */ @@ -2271,7 +2272,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, /* Add the buffer container to the end of the RX pending queue */ - flags = irqsave(); + flags = enter_critical_section(); sq_addlast((sq_entry_t *)bfcontainer, &priv->rx.pend); ssc_dump_rxqueues(priv, "Receving"); @@ -2281,7 +2282,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, ret = ssc_rxdma_setup(priv); DEBUGASSERT(ret == OK); - irqrestore(flags); + leave_critical_section(flags); ssc_exclsem_give(priv); return OK; @@ -2488,7 +2489,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, /* Add the buffer container to the end of the TX pending queue */ - flags = irqsave(); + flags = enter_critical_section(); sq_addlast((sq_entry_t *)bfcontainer, &priv->tx.pend); ssc_dump_txqueues(priv, "Transmitting"); @@ -2498,7 +2499,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, ret = ssc_txdma_setup(priv); DEBUGASSERT(ret == OK); - irqrestore(flags); + leave_critical_section(flags); ssc_exclsem_give(priv); return OK; @@ -3458,7 +3459,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port) ssc_buf_initialize(priv); - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_SAMA5_SSC0 if (port == 0) { @@ -3508,7 +3509,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port) goto errout_with_clocking; } - irqrestore(flags); + leave_critical_section(flags); scc_dump_regs(priv, "After initialization"); /* Success exit */ diff --git a/arch/arm/src/sama5/sam_tc.c b/arch/arm/src/sama5/sam_tc.c index b614f4d3ea1..54cf71242c3 100644 --- a/arch/arm/src/sama5/sam_tc.c +++ b/arch/arm/src/sama5/sam_tc.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sama5/sam_tc.c * - * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * References: @@ -57,6 +57,7 @@ #include #include +#include #include #include @@ -960,7 +961,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel) * because there is no semaphore protection. */ - flags = irqsave(); + flags = enter_critical_section(); if (!tc->initialized) { /* Initialize the timer counter data structure. */ @@ -1044,7 +1045,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel) /* Get exclusive access to the timer/count data structure */ sam_takesem(tc); - irqrestore(flags); + leave_critical_section(flags); /* Get the requested channel structure */ @@ -1252,7 +1253,7 @@ tc_handler_t sam_tc_attach(TC_HANDLE handle, tc_handler_t handler, /* Remember the old interrupt handler and set the new handler */ - flags = irqsave(); + flags = enter_critical_section(); oldhandler = chan->handler; chan->handler = handler; @@ -1272,7 +1273,7 @@ tc_handler_t sam_tc_attach(TC_HANDLE handle, tc_handler_t handler, sam_chan_putreg(chan, SAM_TC_IDR_OFFSET, TC_INT_ALL & ~mask); sam_chan_putreg(chan, SAM_TC_IER_OFFSET, TC_INT_ALL & mask); - irqrestore(flags); + leave_critical_section(flags); return oldhandler; } diff --git a/arch/arm/src/sama5/sam_tsd.c b/arch/arm/src/sama5/sam_tsd.c index 818de965997..3bed567508b 100644 --- a/arch/arm/src/sama5/sam_tsd.c +++ b/arch/arm/src/sama5/sam_tsd.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sama5/sam_tsd.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * * References: @@ -61,6 +61,7 @@ #include #include +#include #include #include #include @@ -305,7 +306,7 @@ static int sam_tsd_sample(struct sam_tsd_s *priv, struct sam_sample_s *sample) * from changing until it has been reported. */ - flags = irqsave(); + flags = enter_critical_section(); /* Is there new touchscreen sample data available? */ @@ -340,7 +341,7 @@ static int sam_tsd_sample(struct sam_tsd_s *priv, struct sam_sample_s *sample) ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -362,7 +363,7 @@ static int sam_tsd_waitsample(struct sam_tsd_s *priv, struct sam_sample_s *sampl */ sched_lock(); - flags = irqsave(); + flags = enter_critical_section(); /* Now release the semaphore that manages mutually exclusive access to * the device structure. This may cause other tasks to become ready to @@ -412,7 +413,7 @@ errout: * have pre-emption disabled. */ - irqrestore(flags); + leave_critical_section(flags); /* Restore pre-emption. We might get suspended here but that is okay * because we already have our sample. Note: this means that if there diff --git a/arch/arm/src/sama5/sam_twi.c b/arch/arm/src/sama5/sam_twi.c index 8599554c8c5..853f93904b3 100644 --- a/arch/arm/src/sama5/sam_twi.c +++ b/arch/arm/src/sama5/sam_twi.c @@ -59,7 +59,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -877,7 +877,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev, * interrupt level. */ - flags = irqsave(); + flags = enter_critical_section(); twi_startmessage(priv, msgs); /* And wait for the transfers to complete. Interrupts will be re-enabled @@ -890,7 +890,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev, i2cdbg("ERROR: Transfer failed: %d\n", ret); } - irqrestore(flags); + leave_critical_section(flags); twi_givesem(&priv->exclsem); return ret; } @@ -1123,7 +1123,7 @@ static void twi_setfrequency(struct twi_dev_s *priv, uint32_t frequency) static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); uint32_t regval; uint32_t mck; @@ -1205,7 +1205,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency) /* Enable Interrupts */ up_enable_irq(priv->attr->irq); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1292,7 +1292,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus) /* Perform one-time TWI initialization */ - flags = irqsave(); + flags = enter_critical_section(); /* Allocate a watchdog timer */ @@ -1322,7 +1322,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus) /* Perform repeatable TWI hardware initialization */ twi_hw_initialize(priv, frequency); - irqrestore(flags); + leave_critical_section(flags); return &priv->dev; errout_with_wdog: @@ -1330,7 +1330,7 @@ errout_with_wdog: priv->timeout = NULL; errout_with_irq: - irqrestore(flags); + leave_critical_section(flags); return NULL; } diff --git a/arch/arm/src/sama5/sam_udphs.c b/arch/arm/src/sama5/sam_udphs.c index fde1365e8a4..06c2cf2fed4 100644 --- a/arch/arm/src/sama5/sam_udphs.c +++ b/arch/arm/src/sama5/sam_udphs.c @@ -62,7 +62,7 @@ #include #include -#include +#include #include "up_arch.h" #include "up_internal.h" @@ -1144,9 +1144,9 @@ static void sam_req_complete(struct sam_ep_s *privep, int16_t result) /* Remove the completed request at the head of the endpoint request list */ - flags = irqsave(); + flags = enter_critical_section(); privreq = sam_req_dequeue(&privep->reqq); - irqrestore(flags); + leave_critical_section(flags); if (privreq) { @@ -3137,7 +3137,7 @@ sam_ep_reserve(struct sam_usbdev_s *priv, uint8_t epset) irqstate_t flags; int epndx = 0; - flags = irqsave(); + flags = enter_critical_section(); epset &= priv->epavail; if (epset) { @@ -3162,7 +3162,7 @@ sam_ep_reserve(struct sam_usbdev_s *priv, uint8_t epset) } } - irqrestore(flags); + leave_critical_section(flags); return privep; } @@ -3178,9 +3178,9 @@ sam_ep_reserve(struct sam_usbdev_s *priv, uint8_t epset) static inline void sam_ep_unreserve(struct sam_usbdev_s *priv, struct sam_ep_s *privep) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->epavail |= SAM_EP_BIT(USB_EPNO(privep->ep.eplog)); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3450,14 +3450,14 @@ static int sam_ep_disable(struct usbdev_ep_s *ep) /* Reset the endpoint and cancel any ongoing activity */ - flags = irqsave(); + flags = enter_critical_section(); priv = privep->dev; sam_ep_reset(priv, epno); /* Revert to the addressed-but-not-configured state */ priv->devstate = UDPHS_DEVSTATE_ADDRESSED; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3595,7 +3595,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) req->result = -EINPROGRESS; req->xfrd = 0; privreq->inflight = 0; - flags = irqsave(); + flags = enter_critical_section(); /* Handle IN (device-to-host) requests. NOTE: If the class device is * using the bi-directional EP0, then we assume that they intend the EP0 @@ -3647,7 +3647,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -3669,9 +3669,9 @@ static int sam_ep_cancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req) #endif usbtrace(TRACE_EPCANCEL, USB_EPNO(ep->eplog)); - flags = irqsave(); + flags = enter_critical_section(); sam_req_cancel(privep, -EAGAIN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3705,7 +3705,7 @@ static int sam_ep_stall(struct usbdev_ep_s *ep, bool resume) /* STALL or RESUME the endpoint */ - flags = irqsave(); + flags = enter_critical_section(); usbtrace(resume ? TRACE_EPRESUME : TRACE_EPSTALL, USB_EPNO(ep->eplog)); /* Handle the resume condition */ @@ -3803,7 +3803,7 @@ static int sam_ep_stall(struct usbdev_ep_s *ep, bool resume) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3962,7 +3962,7 @@ static int sam_wakeup(struct usbdev_s *dev) /* Resume normal operation */ - flags = irqsave(); + flags = enter_critical_section(); sam_resume(priv); /* Activate a remote wakeup. Setting this bit forces an external interrupt @@ -3974,7 +3974,7 @@ static int sam_wakeup(struct usbdev_s *dev) regval = sam_getreg(SAM_UDPHS_CTRL); regval |= UDPHS_CTRL_REWAKEUP; sam_putreg(regval, SAM_UDPHS_CTRL); - irqrestore(flags); + leave_critical_section(flags); /* This bit is automatically cleared by hardware at the end of the Upstream * Resume @@ -4475,7 +4475,7 @@ void up_usbuninitialize(void) struct sam_usbdev_s *priv = &g_udphs; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); usbtrace(TRACE_DEVUNINIT, 0); /* Disable and detach the UDPHS IRQ */ @@ -4493,7 +4493,7 @@ void up_usbuninitialize(void) sam_hw_shutdown(priv); sam_sw_shutdown(priv); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -4603,7 +4603,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) * canceled while the class driver is still bound. */ - flags = irqsave(); + flags = enter_critical_section(); /* Unbind the class driver */ @@ -4627,7 +4627,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Unhook the driver */ priv->driver = NULL; - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/sama5/sam_wdt.c b/arch/arm/src/sama5/sam_wdt.c index 7bac126f090..6868b573c60 100644 --- a/arch/arm/src/sama5/sam_wdt.c +++ b/arch/arm/src/sama5/sam_wdt.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sama5/sam_wwdg.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,6 +44,7 @@ #include #include +#include #include #include @@ -585,7 +586,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower, /* Get the old handler return value */ - flags = irqsave(); + flags = enter_critical_section(); oldhandler = priv->handler; /* Save the new handler */ @@ -607,7 +608,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower, up_disable_irq(SAM_IRQ_WDT); } - irqrestore(flags); + leave_critical_section(flags); return oldhandler; #endif } diff --git a/arch/arm/src/sama5/sam_xdmac.c b/arch/arm/src/sama5/sam_xdmac.c index 69fed83d0ca..651624d63a0 100644 --- a/arch/arm/src/sama5/sam_xdmac.c +++ b/arch/arm/src/sama5/sam_xdmac.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sama5/sam_xdmac.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -48,7 +48,6 @@ #include #include -#include #include "up_arch.h" #include "cache.h" @@ -2388,9 +2387,9 @@ void sam_dmastop(DMA_HANDLE handle) dmavdbg("xdmach: %p\n", xdmach); DEBUGASSERT(xdmach != NULL); - flags = irqsave(); + flags = enter_critical_section(); sam_dmaterminate(xdmach, -EINTR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2417,7 +2416,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs) * cause lost interrupts. */ - flags = irqsave(); + flags = enter_critical_section(); regs->gtype = sam_getdmac(xdmac, SAM_XDMAC_GTYPE_OFFSET); regs->gcfg = sam_getdmac(xdmac, SAM_XDMAC_GCFG_OFFSET); @@ -2444,7 +2443,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs) regs->csus = sam_getdmach(xdmach, SAM_XDMACH_CSUS_OFFSET); regs->cdus = sam_getdmach(xdmach, SAM_XDMACH_CDUS_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DEBUG_DMA */ diff --git a/arch/arm/src/sama5/sama5d2x_pio.c b/arch/arm/src/sama5/sama5d2x_pio.c index a96c50331ab..d6daf15a820 100644 --- a/arch/arm/src/sama5/sama5d2x_pio.c +++ b/arch/arm/src/sama5/sama5d2x_pio.c @@ -2,7 +2,7 @@ * arch/arm/src/sama5/sama5d2x_pio.c * General Purpose Input/Output (PIO) logic for the SAMA5D2x * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ #include #include +#include #include #include @@ -431,7 +432,7 @@ int sam_configpio(pio_pinset_t cfgset) /* Disable interrupts to prohibit re-entrance. */ - flags = irqsave(); + flags = enter_critical_section(); /* Enable writing to PIO registers. * @@ -515,7 +516,7 @@ int sam_configpio(pio_pinset_t cfgset) putreg32(PIO_WPMR_WPEN | PIO_WPMR_WPITEN | PIO_WPMR_WPKEY, SAM_PIO_WPMR); putreg32(PIO_WPMR_WPEN | PIO_WPMR_WPITEN | PIO_WPMR_WPKEY, SAM_SPIO_WPMR); - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -625,7 +626,7 @@ int sam_dumppio(uint32_t pinset, const char *msg) /* The following requires exclusive access to the PIO registers */ - flags = irqsave(); + flags = enter_critical_section(); if (secure) { @@ -657,7 +658,7 @@ int sam_dumppio(uint32_t pinset, const char *msg) getreg32(SAM_PIO_WPMR), getreg32(SAM_PIO_WPSR)); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/sama5/sama5d3x4x_pio.c b/arch/arm/src/sama5/sama5d3x4x_pio.c index 5192aac267d..b9379ad868c 100644 --- a/arch/arm/src/sama5/sama5d3x4x_pio.c +++ b/arch/arm/src/sama5/sama5d3x4x_pio.c @@ -2,7 +2,7 @@ * arch/arm/src/sama5/sama5d3x4x_pio.c * General Purpose Input/Output (PIO) logic for the SAMA5D3x and SAMA5D4x * - * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ #include #include +#include #include #include @@ -669,7 +670,7 @@ int sam_configpio(pio_pinset_t cfgset) /* Disable interrupts to prohibit re-entrance. */ - flags = irqsave(); + flags = enter_critical_section(); /* Enable writing to PIO registers. The following registers are protected: * @@ -722,7 +723,7 @@ int sam_configpio(pio_pinset_t cfgset) /* Disable writing to PIO registers */ putreg32(PIO_WPMR_WPEN | PIO_WPMR_WPKEY, base + SAM_PIO_WPMR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -823,7 +824,7 @@ void sam_pio_forceclk(pio_pinset_t pinset, bool enable) /* The remainder of this operation must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Are we enabling or disabling clocking */ @@ -842,7 +843,7 @@ void sam_pio_forceclk(pio_pinset_t pinset, bool enable) sam_pio_disableclk(pinset); } - irqrestore(flags); + leave_critical_section(flags); } /************************************************************************************ @@ -867,7 +868,7 @@ int sam_dumppio(uint32_t pinset, const char *msg) /* The following requires exclusive access to the PIO registers */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("PIO%c pinset: %08x base: %08x -- %s\n", g_portchar[port], pinset, base, msg); @@ -904,7 +905,7 @@ int sam_dumppio(uint32_t pinset, const char *msg) lldbg(" WPMR: %08x WPSR: %08x\n", getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET)); - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/samdl/sam_dmac.c b/arch/arm/src/samdl/sam_dmac.c index 0085b173963..0d1cb43041d 100644 --- a/arch/arm/src/samdl/sam_dmac.c +++ b/arch/arm/src/samdl/sam_dmac.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samdl/sam_dmac.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -48,7 +48,6 @@ #include #include -#include #include "up_arch.h" #include "up_internal.h" @@ -239,7 +238,7 @@ static void sam_dmaterminate(struct sam_dmach_s *dmach, int result) /* Disable the DMA channel */ - flags = irqsave(); + flags = enter_critical_section(); putreg8(dmach->dc_chan, SAM_DMAC_CHID); putreg8(0, SAM_DMAC_CHCTRLA); @@ -250,7 +249,7 @@ static void sam_dmaterminate(struct sam_dmach_s *dmach, int result) /* Disable all channel interrupts */ putreg8(1 << dmach->dc_chan, SAM_DMAC_CHINTENCLR); - irqrestore(flags); + leave_critical_section(flags); /* Free the DMA descriptor list */ @@ -871,7 +870,7 @@ DMA_HANDLE sam_dmachannel(uint32_t chflags) /* Disable the DMA channel */ - flags = irqsave(); + flags = enter_critical_section(); putreg8(chndx, SAM_DMAC_CHID); putreg8(0, SAM_DMAC_CHCTRLA); @@ -882,7 +881,7 @@ DMA_HANDLE sam_dmachannel(uint32_t chflags) /* Disable all channel interrupts */ putreg8(1 << chndx, SAM_DMAC_CHINTENCLR); - irqrestore(flags); + leave_critical_section(flags); break; } } @@ -1135,7 +1134,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg) /* Clear any pending interrupts from any previous DMAC transfer. */ - flags = irqsave(); + flags = enter_critical_section(); putreg8(dmach->dc_chan, SAM_DMAC_CHID); putreg8(0, SAM_DMAC_CHCTRLA); @@ -1219,7 +1218,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg) /* Enable DMA channel interrupts */ putreg8(DMAC_INT_TERR | DMAC_INT_TCMPL, SAM_DMAC_CHINTENSET); - irqrestore(flags); + leave_critical_section(flags); ret = OK; } @@ -1244,9 +1243,9 @@ void sam_dmastop(DMA_HANDLE handle) dmavdbg("dmach: %p\n", dmach); DEBUGASSERT(dmach != NULL); - flags = irqsave(); + flags = enter_critical_section(); sam_dmaterminate(dmach, -EINTR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1269,7 +1268,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs) /* Sample DMAC registers. */ - flags = irqsave(); + flags = enter_critical_section(); regs->ctrl = getreg16(SAM_DMAC_CTRL); /* Control Register */ regs->crcctrl = getreg16(SAM_DMAC_CRCCTRL); /* CRC Control Register */ regs->crcdatain = getreg32(SAM_DMAC_CRCDATAIN); /* CRC Data Input Register */ diff --git a/arch/arm/src/samdl/sam_idle.c b/arch/arm/src/samdl/sam_idle.c index b661733d745..97326e342d7 100644 --- a/arch/arm/src/samdl/sam_idle.c +++ b/arch/arm/src/samdl/sam_idle.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "chip.h" #include "up_internal.h" @@ -97,7 +97,7 @@ static void up_idlepm(void) if (newstate != oldstate) { - flags = irqsave(); + flags = enter_critical_section(); /* Perform board-specific, state-dependent logic here */ @@ -141,7 +141,7 @@ static void up_idlepm(void) break; } - irqrestore(flags); + leave_critical_section(flags); } } #else diff --git a/arch/arm/src/samdl/sam_irq.c b/arch/arm/src/samdl/sam_irq.c index 8ef2a6361b9..a68099a8161 100644 --- a/arch/arm/src/samdl/sam_irq.c +++ b/arch/arm/src/samdl/sam_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samdl/sam_irq.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -298,7 +298,7 @@ void sam_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" ISER: %08x ICER: %08x\n", @@ -322,7 +322,7 @@ void sam_dumpnvic(const char *msg, int irq) lldbg(" SHPR2: %08x SHPR3: %08x\n", getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3)); - irqrestore(flags); + leave_critical_section(flags); } #else diff --git a/arch/arm/src/samdl/sam_lowputc.c b/arch/arm/src/samdl/sam_lowputc.c index 3b5aff5fb15..800c3c110d3 100644 --- a/arch/arm/src/samdl/sam_lowputc.c +++ b/arch/arm/src/samdl/sam_lowputc.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samdl/sam_lowputc.c * - * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * References: @@ -52,10 +52,10 @@ #include #include +#include + #include "up_arch.h" - #include "sam_config.h" - #include "sam_gclk.h" #include "sam_pm.h" #include "sam_sercom.h" @@ -408,7 +408,7 @@ int sam_usart_initialize(const struct sam_usart_config_s * const config) /* Reset the SERCOM so that we know that it is in its initial state */ - flags = irqsave(); + flags = enter_critical_section(); sam_usart_reset(config); /* Just invoke the internal implementation, but with interrupts disabled @@ -416,7 +416,7 @@ int sam_usart_initialize(const struct sam_usart_config_s * const config) */ ret = sam_usart_internal(config); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif diff --git a/arch/arm/src/samdl/sam_port.c b/arch/arm/src/samdl/sam_port.c index b8445c7f1af..53c8664efdf 100644 --- a/arch/arm/src/samdl/sam_port.c +++ b/arch/arm/src/samdl/sam_port.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samdl/sam_port.c * - * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * References: @@ -48,6 +48,7 @@ #include #include +#include #include #include @@ -57,14 +58,6 @@ #include "chip.h" #include "sam_port.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Types - ****************************************************************************/ - /**************************************************************************** * Private Data ****************************************************************************/ @@ -447,7 +440,7 @@ int sam_configport(port_pinset_t pinset) /* Make sure that all operations on the port are atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Put the PORT in the known, reset state. */ @@ -477,7 +470,7 @@ int sam_configport(port_pinset_t pinset) break; } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -544,7 +537,7 @@ int sam_dumpport(uint32_t pinset, const char *msg) /* The following requires exclusive access to the PORT registers */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("PORT%c pin: %d pinset: %08x base: %08x -- %s\n", g_portchar[port], pin, pinset, base, msg); lldbg(" DIR: %08x OUT: %08x IN: %08x\n", @@ -560,7 +553,7 @@ int sam_dumpport(uint32_t pinset, const char *msg) base + SAM_PORT_PINCFG_OFFSET(pin), getreg8(base + SAM_PORT_PINCFG_OFFSET(pin))); - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/samdl/sam_serial.c b/arch/arm/src/samdl/sam_serial.c index a3352796b2a..aba5980aad4 100644 --- a/arch/arm/src/samdl/sam_serial.c +++ b/arch/arm/src/samdl/sam_serial.c @@ -896,7 +896,7 @@ static void sam_txint(struct uart_dev_s *dev, bool enable) struct sam_dev_s *priv = (struct sam_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX holding register register @@ -921,7 +921,7 @@ static void sam_txint(struct uart_dev_s *dev, bool enable) sam_serialout8(priv, SAM_USART_INTENCLR_OFFSET, USART_INT_DRE); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1038,7 +1038,7 @@ int up_putc(int ch) * interrupts from firing in the serial driver code. */ - flags = irqsave(); + flags = enter_critical_section(); /* Check for LF */ @@ -1050,7 +1050,7 @@ int up_putc(int ch) } sam_lowputc(ch); - irqrestore(flags); + leave_critical_section(flags); #endif return ch; } diff --git a/arch/arm/src/samdl/sam_spi.c b/arch/arm/src/samdl/sam_spi.c index c6bb0e086ba..2a7df796bac 100644 --- a/arch/arm/src/samdl/sam_spi.c +++ b/arch/arm/src/samdl/sam_spi.c @@ -53,6 +53,7 @@ #include #include +#include #include #include #include @@ -1493,7 +1494,7 @@ struct spi_dev_s *sam_spibus_initialize(int port) /* Enable clocking to the SERCOM module in PM */ - flags = irqsave(); + flags = enter_critical_section(); sercom_enable(priv->sercom); /* Configure the GCLKs for the SERCOM module */ @@ -1579,7 +1580,7 @@ struct spi_dev_s *sam_spibus_initialize(int port) #endif spi_dumpregs(priv, "After initialization"); - irqrestore(flags); + leave_critical_section(flags); return (struct spi_dev_s *)priv; } diff --git a/arch/arm/src/samdl/saml_gclk.c b/arch/arm/src/samdl/saml_gclk.c index e854bc4f5cf..afab80fbdfd 100644 --- a/arch/arm/src/samdl/saml_gclk.c +++ b/arch/arm/src/samdl/saml_gclk.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include "up_arch.h" #include "sam_gclk.h" @@ -183,7 +183,7 @@ void sam_gclk_config(FAR const struct sam_gclkconfig_s *config) regaddr = SAM_GCLK_GENCTRL(config->gclk); - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(regaddr); regval &= GCLK_GENCTRL_GENEN; genctrl |= regval; @@ -195,19 +195,19 @@ void sam_gclk_config(FAR const struct sam_gclkconfig_s *config) /* Wait for synchronization */ sam_gclck_waitsyncbusy(config->gclk); - irqrestore(flags); + leave_critical_section(flags); sam_gclck_waitsyncbusy(config->gclk); /* Enable the clock generator */ - flags = irqsave(); + flags = enter_critical_section(); genctrl |= GCLK_GENCTRL_GENEN; putreg32(genctrl, regaddr); /* Wait for synchronization */ sam_gclck_waitsyncbusy(config->gclk); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -237,7 +237,7 @@ void sam_gclk_chan_enable(uint8_t channel, uint8_t srcgen) /* Disable generic clock channel */ - flags = irqsave(); + flags = enter_critical_section(); sam_gclk_chan_disable(channel); /* Configure the peripheral channel */ @@ -253,7 +253,7 @@ void sam_gclk_chan_enable(uint8_t channel, uint8_t srcgen) /* Wait for clock synchronization */ while ((getreg32(regaddr) &GCLK_PCHCTRL_CHEN) == 0); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -282,7 +282,7 @@ void sam_gclk_chan_disable(uint8_t channel) /* Disable generic clock channel */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(regaddr); regval &= ~GCLK_PCHCTRL_CHEN; putreg32(regval, regaddr); @@ -290,7 +290,7 @@ void sam_gclk_chan_disable(uint8_t channel) /* Wait for clock synchronization */ while ((getreg32(regaddr) &GCLK_PCHCTRL_CHEN) != 0); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_ARCH_FAMILY_SAML21 */ diff --git a/arch/arm/src/samv7/sam_emac.c b/arch/arm/src/samv7/sam_emac.c index 4509c017cb4..39e14457dd4 100644 --- a/arch/arm/src/samv7/sam_emac.c +++ b/arch/arm/src/samv7/sam_emac.c @@ -2914,7 +2914,7 @@ static int sam_ifdown(struct net_driver_s *dev) /* Disable the EMAC interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(priv->attr->irq); /* Cancel the TX poll timer and TX timeout timers */ @@ -2932,7 +2932,7 @@ static int sam_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3041,12 +3041,12 @@ static int sam_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Perform the out-of-cycle poll now */ sam_txavail_process(priv); - irqrestore(flags); + leave_critical_section(flags); #endif return OK; diff --git a/arch/arm/src/samv7/sam_freerun.c b/arch/arm/src/samv7/sam_freerun.c index 5edc15c5a48..c5eec516ddf 100644 --- a/arch/arm/src/samv7/sam_freerun.c +++ b/arch/arm/src/samv7/sam_freerun.c @@ -56,7 +56,7 @@ #include #include -#include +#include #include #include "sam_freerun.h" @@ -234,7 +234,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts) * If we do not handle the overflow here then, it will be lost. */ - flags = irqsave(); + flags = enter_critical_section(); overflow = freerun->overflow; counter = sam_tc_getcounter(freerun->tch); sr = sam_tc_getpending(freerun->tch); @@ -258,7 +258,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts) freerun->overflow = overflow; } - irqrestore(flags); + leave_critical_section(flags); tcvdbg("counter=%lu (%lu) overflow=%lu, sr=%08lx\n", (unsigned long)counter, (unsigned long)verify, diff --git a/arch/arm/src/samv7/sam_gpio.c b/arch/arm/src/samv7/sam_gpio.c index dc352b2e5c0..628c1979f86 100644 --- a/arch/arm/src/samv7/sam_gpio.c +++ b/arch/arm/src/samv7/sam_gpio.c @@ -2,7 +2,7 @@ * arch/arm/src/samv7/sam_gpio.c * General Purpose Input/Output (GPIO) logic for the SAMV71 * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ #include #include +#include #include #include @@ -418,7 +419,7 @@ int sam_configgpio(gpio_pinset_t cfgset) /* Disable interrupts to prohibit re-entrance. */ - flags = irqsave(); + flags = enter_critical_section(); /* Enable writing to GPIO registers */ @@ -454,7 +455,7 @@ int sam_configgpio(gpio_pinset_t cfgset) /* Disable writing to GPIO registers */ putreg32(PIO_WPMR_WPEN | PIO_WPMR_WPKEY, base + SAM_PIO_WPMR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -530,7 +531,7 @@ int sam_dumpgpio(uint32_t pinset, const char *msg) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); lldbg("PIO%c pinset: %08x base: %08x -- %s\n", g_portchar[port], pinset, base, msg); lldbg(" PSR: %08x OSR: %08x IFSR: %08x ODSR: %08x\n", @@ -565,7 +566,7 @@ int sam_dumpgpio(uint32_t pinset, const char *msg) lldbg(" PCMR: %08x PCIMR: %08x PCISR: %08x PCRHR: %08x\n", getreg32(base + SAM_PIO_PCMR_OFFSET), getreg32(base + SAM_PIO_PCIMR_OFFSET), getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET)); - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/samv7/sam_hsmci.c b/arch/arm/src/samv7/sam_hsmci.c index ece616a00e0..3ab19c9e326 100644 --- a/arch/arm/src/samv7/sam_hsmci.c +++ b/arch/arm/src/samv7/sam_hsmci.c @@ -54,7 +54,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -743,11 +743,11 @@ static inline void sam_configwaitints(struct sam_dev_s *priv, /* Save all of the data in one, atomic operation. */ - flags = irqsave(); + flags = enter_critical_section(); priv->waitevents = waitevents; priv->wkupevent = 0; priv->waitmask = waitmask; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -774,12 +774,12 @@ static void sam_disablewaitints(struct sam_dev_s *priv, * operation. */ - flags = irqsave(); + flags = enter_critical_section(); priv->waitevents = 0; priv->wkupevent = wkupevent; priv->waitmask = 0; sam_putreg(priv, ~priv->xfrmask, SAM_HSMCI_IDR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -822,10 +822,10 @@ static inline void sam_configxfrints(struct sam_dev_s *priv, uint32_t xfrmask) static void sam_disablexfrints(struct sam_dev_s *priv) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->xfrmask = 0; sam_putreg(priv, ~priv->waitmask, SAM_HSMCI_IDR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1635,7 +1635,7 @@ static void sam_reset(FAR struct sdio_dev_s *dev) /* Reset the MCI */ - flags = irqsave(); + flags = enter_critical_section(); sam_putreg(priv, HSMCI_CR_SWRST, SAM_HSMCI_CR_OFFSET); /* Disable the MCI */ @@ -1691,7 +1691,7 @@ static void sam_reset(FAR struct sdio_dev_s *dev) /* DMA data transfer support */ priv->widebus = false; /* Required for DMA support */ - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3019,7 +3019,7 @@ static void sam_callback(void *arg) fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n", priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus); - flags = irqsave(); + flags = enter_critical_section(); if (priv->callback) { /* Yes.. Check for enabled callback events */ @@ -3085,7 +3085,7 @@ static void sam_callback(void *arg) } } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3261,7 +3261,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) * still be atomic. */ - flags = irqsave(); + flags = enter_critical_section(); cdstatus = priv->cdstatus; if (cardinslot) { @@ -3281,7 +3281,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) sam_callback(priv); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3307,7 +3307,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) /* Update card status */ - flags = irqsave(); + flags = enter_critical_section(); if (wrprotect) { priv->cdstatus |= SDIO_STATUS_WRPROTECTED; @@ -3318,7 +3318,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) } fvdbg("cdstatus: %02x\n", priv->cdstatus); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_SAMV7_HSMCI */ diff --git a/arch/arm/src/samv7/sam_irq.c b/arch/arm/src/samv7/sam_irq.c index 7db06249c58..a954c4c3bbd 100644 --- a/arch/arm/src/samv7/sam_irq.c +++ b/arch/arm/src/samv7/sam_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samv7/sam_irq.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -111,7 +111,7 @@ static void sam_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" INTCTRL: %08x VECTAB: %08x\n", getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); @@ -152,7 +152,7 @@ static void sam_dumpnvic(const char *msg, int irq) #if SAM_IRQ_NEXTINT > 79 # warning Missing logic #endif - irqrestore(flags); + leave_critical_section(flags); } #else # define sam_dumpnvic(msg, irq) diff --git a/arch/arm/src/samv7/sam_lowputc.c b/arch/arm/src/samv7/sam_lowputc.c index d09d8fcd8af..e1b3ae4d6a9 100644 --- a/arch/arm/src/samv7/sam_lowputc.c +++ b/arch/arm/src/samv7/sam_lowputc.c @@ -41,7 +41,7 @@ #include -#include +#include #include #include "up_internal.h" @@ -220,18 +220,18 @@ void up_lowputc(char ch) * atomic. */ - flags = irqsave(); + flags = enter_critical_section(); if ((getreg32(SAM_CONSOLE_BASE + SAM_UART_SR_OFFSET) & UART_INT_TXEMPTY) != 0) { /* Send the character */ putreg32((uint32_t)ch, SAM_CONSOLE_BASE + SAM_UART_THR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); return; } - irqrestore(flags); + leave_critical_section(flags); } #endif } diff --git a/arch/arm/src/samv7/sam_oneshot.c b/arch/arm/src/samv7/sam_oneshot.c index 8d2ff8789b8..34fa89843e3 100644 --- a/arch/arm/src/samv7/sam_oneshot.c +++ b/arch/arm/src/samv7/sam_oneshot.c @@ -56,7 +56,7 @@ #include #include -#include +#include #include #include "sam_oneshot.h" @@ -264,7 +264,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, /* Was the oneshot already running? */ - flags = irqsave(); + flags = enter_critical_section(); if (oneshot->running) { /* Yes.. then cancel it */ @@ -314,7 +314,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, */ oneshot->running = true; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -354,7 +354,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) /* Was the timer running? */ - flags = irqsave(); + flags = enter_critical_section(); if (!oneshot->running) { /* No.. Just return zero timer remaining and successful cancellation. @@ -364,7 +364,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) ts->tv_sec = 0; ts->tv_nsec = 0; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -392,7 +392,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) oneshot->running = false; oneshot->handler = NULL; oneshot->arg = NULL; - irqrestore(flags); + leave_critical_section(flags); /* Did the caller provide us with a location to return the time * remaining? diff --git a/arch/arm/src/samv7/sam_rswdt.c b/arch/arm/src/samv7/sam_rswdt.c index 0d92c40dfdd..61593a54c4d 100644 --- a/arch/arm/src/samv7/sam_rswdt.c +++ b/arch/arm/src/samv7/sam_rswdt.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samv7/sam_rswdg.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,6 +44,7 @@ #include #include +#include #include #include @@ -585,7 +586,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower, /* Get the old handler return value */ - flags = irqsave(); + flags = enter_critical_section(); oldhandler = priv->handler; /* Save the new handler */ @@ -607,7 +608,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower, up_disable_irq(SAM_IRQ_RSWDT); } - irqrestore(flags); + leave_critical_section(flags); return oldhandler; #endif } diff --git a/arch/arm/src/samv7/sam_serial.c b/arch/arm/src/samv7/sam_serial.c index a520350f982..8d16e2947cf 100644 --- a/arch/arm/src/samv7/sam_serial.c +++ b/arch/arm/src/samv7/sam_serial.c @@ -745,7 +745,7 @@ static void sam_disableallints(struct sam_dev_s *priv, uint32_t *imr) /* The following must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); if (imr) { /* Return the current interrupt mask */ @@ -756,7 +756,7 @@ static void sam_disableallints(struct sam_dev_s *priv, uint32_t *imr) /* Disable all interrupts */ sam_serialout(priv, SAM_UART_IDR_OFFSET, UART_INT_ALLINTS); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1428,7 +1428,7 @@ static void sam_txint(struct uart_dev_s *dev, bool enable) struct sam_dev_s *priv = (struct sam_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX holding register register @@ -1453,7 +1453,7 @@ static void sam_txint(struct uart_dev_s *dev, bool enable) sam_serialout(priv, SAM_UART_IDR_OFFSET, UART_INT_TXRDY); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/samv7/sam_spi.c b/arch/arm/src/samv7/sam_spi.c index ad96667ed44..6862577b7f1 100644 --- a/arch/arm/src/samv7/sam_spi.c +++ b/arch/arm/src/samv7/sam_spi.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samv7/sam_spi.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015=2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * Diego Sanchez * @@ -52,6 +52,7 @@ #include +#include #include #include #include @@ -1808,7 +1809,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port) { /* Enable clocking to the SPI block */ - flags = irqsave(); + flags = enter_critical_section(); #if defined(CONFIG_SAMV7_SPI0_MASTER) && defined(CONFIG_SAMV7_SPI1_MASTER) if (spino == 0) #endif @@ -1850,7 +1851,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port) spi_putreg(spi, SPI_CR_SWRST, SAM_SPI_CR_OFFSET); spi_putreg(spi, SPI_CR_SWRST, SAM_SPI_CR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); /* Configure the SPI mode register */ diff --git a/arch/arm/src/samv7/sam_spi_slave.c b/arch/arm/src/samv7/sam_spi_slave.c index 70ac3e0f9f5..a210541ce69 100644 --- a/arch/arm/src/samv7/sam_spi_slave.c +++ b/arch/arm/src/samv7/sam_spi_slave.c @@ -990,7 +990,7 @@ static int spi_enqueue(struct spi_sctrlr_s *sctrlr, uint16_t data) * Interrupts are disabled briefly. */ - flags = irqsave(); + flags = enter_critical_section(); next = priv->head + 1; if (next >= CONFIG_SAMV7_SPI_SLAVE_QSIZE) { @@ -1023,7 +1023,7 @@ static int spi_enqueue(struct spi_sctrlr_s *sctrlr, uint16_t data) } } - irqrestore(flags); + leave_critical_section(flags); spi_semgive(priv); return ret; } @@ -1061,7 +1061,7 @@ static bool spi_qfull(struct spi_sctrlr_s *sctrlr) * Interrupts are disabled briefly. */ - flags = irqsave(); + flags = enter_critical_section(); next = priv->head + 1; if (next >= CONFIG_SAMV7_SPI_SLAVE_QSIZE) { @@ -1069,7 +1069,7 @@ static bool spi_qfull(struct spi_sctrlr_s *sctrlr) } ret = (next == priv->tail); - irqrestore(flags); + leave_critical_section(flags); spi_semgive(priv); return ret; } @@ -1105,10 +1105,10 @@ static void spi_qflush(struct spi_sctrlr_s *sctrlr) /* Mark the buffer empty, momentarily disabling interrupts */ - flags = irqsave(); + flags = enter_critical_section(); priv->head = 0; priv->tail = 0; - irqrestore(flags); + leave_critical_section(flags); spi_semgive(priv); } @@ -1187,7 +1187,7 @@ struct spi_sctrlr_s *sam_spi_slave_initialize(int port) { /* Enable clocking to the SPI block */ - flags = irqsave(); + flags = enter_critical_section(); #if defined(CONFIG_SAMV7_SPI0_SLAVE) && defined(CONFIG_SAMV7_SPI1_SLAVE) if (spino == 0) #endif @@ -1243,7 +1243,7 @@ struct spi_sctrlr_s *sam_spi_slave_initialize(int port) spi_putreg(priv, SPI_CR_SWRST, SAM_SPI_CR_OFFSET); spi_putreg(priv, SPI_CR_SWRST, SAM_SPI_CR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); /* Configure the SPI mode register */ diff --git a/arch/arm/src/samv7/sam_ssc.c b/arch/arm/src/samv7/sam_ssc.c index d2ce566d044..107d120de7a 100644 --- a/arch/arm/src/samv7/sam_ssc.c +++ b/arch/arm/src/samv7/sam_ssc.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samv7/sam_ssc.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -52,6 +52,7 @@ #include +#include #include #include #include @@ -853,7 +854,7 @@ static void ssc_dump_queues(struct sam_transport_s *xpt, const char *msg) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); i2sllvdbg("%s\n", msg); i2sllvdbg(" Pending:\n"); ssc_dump_queue(&xpt->pend); @@ -861,7 +862,7 @@ static void ssc_dump_queues(struct sam_transport_s *xpt, const char *msg) ssc_dump_queue(&xpt->act); i2sllvdbg(" Done:\n"); ssc_dump_queue(&xpt->done); - irqrestore(flags); + leave_critical_section(flags); } #endif @@ -960,14 +961,14 @@ static struct sam_buffer_s *ssc_buf_allocate(struct sam_ssc_s *priv) /* Get the buffer from the head of the free list */ - flags = irqsave(); + flags = enter_critical_section(); bfcontainer = priv->freelist; ASSERT(bfcontainer); /* Unlink the buffer from the freelist */ priv->freelist = bfcontainer->flink; - irqrestore(flags); + leave_critical_section(flags); return bfcontainer; } @@ -995,10 +996,10 @@ static void ssc_buf_free(struct sam_ssc_s *priv, struct sam_buffer_s *bfcontaine /* Put the buffer container back on the free list */ - flags = irqsave(); + flags = enter_critical_section(); bfcontainer->flink = priv->freelist; priv->freelist = bfcontainer; - irqrestore(flags); + leave_critical_section(flags); /* Wake up any threads waiting for a buffer container */ @@ -1441,9 +1442,9 @@ static void ssc_rx_worker(void *arg) * disabled. */ - flags = irqsave(); + flags = enter_critical_section(); (void)ssc_rxdma_setup(priv); - irqrestore(flags); + leave_critical_section(flags); } /* Process each buffer in the rx.done queue */ @@ -1455,9 +1456,9 @@ static void ssc_rx_worker(void *arg) * also modified from the interrupt level. */ - flags = irqsave(); + flags = enter_critical_section(); bfcontainer = (struct sam_buffer_s *)sq_remfirst(&priv->rx.done); - irqrestore(flags); + leave_critical_section(flags); DEBUGASSERT(bfcontainer && bfcontainer->apb && bfcontainer->callback); apb = bfcontainer->apb; @@ -1857,9 +1858,9 @@ static void ssc_tx_worker(void *arg) * disabled. */ - flags = irqsave(); + flags = enter_critical_section(); (void)ssc_txdma_setup(priv); - irqrestore(flags); + leave_critical_section(flags); } /* Process each buffer in the tx.done queue */ @@ -1871,9 +1872,9 @@ static void ssc_tx_worker(void *arg) * also modified from the interrupt level. */ - flags = irqsave(); + flags = enter_critical_section(); bfcontainer = (struct sam_buffer_s *)sq_remfirst(&priv->tx.done); - irqrestore(flags); + leave_critical_section(flags); /* Perform the TX transfer done callback */ @@ -2248,7 +2249,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, /* Add the buffer container to the end of the RX pending queue */ - flags = irqsave(); + flags = enter_critical_section(); sq_addlast((sq_entry_t *)bfcontainer, &priv->rx.pend); ssc_dump_rxqueues(priv, "Receving"); @@ -2258,7 +2259,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, ret = ssc_rxdma_setup(priv); DEBUGASSERT(ret == OK); - irqrestore(flags); + leave_critical_section(flags); ssc_exclsem_give(priv); return OK; @@ -2465,7 +2466,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, /* Add the buffer container to the end of the TX pending queue */ - flags = irqsave(); + flags = enter_critical_section(); sq_addlast((sq_entry_t *)bfcontainer, &priv->tx.pend); ssc_dump_txqueues(priv, "Transmitting"); @@ -2475,7 +2476,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, ret = ssc_txdma_setup(priv); DEBUGASSERT(ret == OK); - irqrestore(flags); + leave_critical_section(flags); ssc_exclsem_give(priv); return OK; @@ -3432,7 +3433,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port) ssc_buf_initialize(priv); - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_SAMV7_SSC0 if (port == 0) { @@ -3482,7 +3483,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port) goto errout_with_clocking; } - irqrestore(flags); + leave_critical_section(flags); scc_dump_regs(priv, "After initialization"); /* Success exit */ diff --git a/arch/arm/src/samv7/sam_tc.c b/arch/arm/src/samv7/sam_tc.c index 07d0081d81b..4d5b555fe47 100644 --- a/arch/arm/src/samv7/sam_tc.c +++ b/arch/arm/src/samv7/sam_tc.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/SAMV7/sam_tc.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015=2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * References: @@ -58,6 +58,7 @@ #include #include +#include #include #include @@ -1176,7 +1177,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel) * because there is no semaphore protection. */ - flags = irqsave(); + flags = enter_critical_section(); if (!tc->initialized) { /* Initialize the timer counter data structure. */ @@ -1213,7 +1214,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel) /* Get exclusive access to the timer/count data structure */ sam_takesem(tc); - irqrestore(flags); + leave_critical_section(flags); /* Is the requested channel already in-use? */ @@ -1468,7 +1469,7 @@ tc_handler_t sam_tc_attach(TC_HANDLE handle, tc_handler_t handler, /* Remember the old interrupt handler and set the new handler */ - flags = irqsave(); + flags = enter_critical_section(); oldhandler = chan->handler; chan->handler = handler; @@ -1488,7 +1489,7 @@ tc_handler_t sam_tc_attach(TC_HANDLE handle, tc_handler_t handler, sam_chan_putreg(chan, SAM_TC_IDR_OFFSET, TC_INT_ALL & ~mask); sam_chan_putreg(chan, SAM_TC_IER_OFFSET, TC_INT_ALL & mask); - irqrestore(flags); + leave_critical_section(flags); return oldhandler; } diff --git a/arch/arm/src/samv7/sam_twihs.c b/arch/arm/src/samv7/sam_twihs.c index 6b54510226b..6b11043ba67 100644 --- a/arch/arm/src/samv7/sam_twihs.c +++ b/arch/arm/src/samv7/sam_twihs.c @@ -59,7 +59,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -904,7 +904,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev, * interrupt level. */ - flags = irqsave(); + flags = enter_critical_section(); twi_startmessage(priv, msgs); /* And wait for the transfers to complete. Interrupts will be re-enabled @@ -917,7 +917,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev, i2cdbg("ERROR: Transfer failed: %d\n", ret); } - irqrestore(flags); + leave_critical_section(flags); twi_givesem(&priv->exclsem); return ret; } @@ -1150,7 +1150,7 @@ static void twi_setfrequency(struct twi_dev_s *priv, uint32_t frequency) static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); uint32_t regval; uint32_t mck; @@ -1232,7 +1232,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency) /* Enable Interrupts */ up_enable_irq(priv->attr->irq); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1305,7 +1305,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus) /* Perform one-time TWIHS initialization */ - flags = irqsave(); + flags = enter_critical_section(); /* Has the device already been initialized? */ @@ -1345,7 +1345,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus) priv->initd = true; } - irqrestore(flags); + leave_critical_section(flags); return &priv->dev; errout_with_wdog: @@ -1353,7 +1353,7 @@ errout_with_wdog: priv->timeout = NULL; errout_with_irq: - irqrestore(flags); + leave_critical_section(flags); return NULL; } @@ -1374,7 +1374,7 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s *dev) /* Disable TWIHS interrupts */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(priv->attr->irq); /* Reset data structures */ @@ -1392,7 +1392,7 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s *dev) (void)irq_detach(priv->attr->irq); priv->initd = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/samv7/sam_usbdevhs.c b/arch/arm/src/samv7/sam_usbdevhs.c index 2950bae0039..e851aa5b94a 100644 --- a/arch/arm/src/samv7/sam_usbdevhs.c +++ b/arch/arm/src/samv7/sam_usbdevhs.c @@ -65,7 +65,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -1193,9 +1193,9 @@ static void sam_req_complete(struct sam_ep_s *privep, int16_t result) /* Remove the completed request at the head of the endpoint request list */ - flags = irqsave(); + flags = enter_critical_section(); privreq = sam_req_dequeue(&privep->reqq); - irqrestore(flags); + leave_critical_section(flags); if (privreq) { @@ -3387,7 +3387,7 @@ sam_ep_reserve(struct sam_usbdev_s *priv, uint8_t epset) irqstate_t flags; int epndx = 0; - flags = irqsave(); + flags = enter_critical_section(); epset &= priv->epavail; if (epset) { @@ -3412,7 +3412,7 @@ sam_ep_reserve(struct sam_usbdev_s *priv, uint8_t epset) } } - irqrestore(flags); + leave_critical_section(flags); return privep; } @@ -3428,9 +3428,9 @@ sam_ep_reserve(struct sam_usbdev_s *priv, uint8_t epset) static inline void sam_ep_unreserve(struct sam_usbdev_s *priv, struct sam_ep_s *privep) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->epavail |= SAM_EP_BIT(USB_EPNO(privep->ep.eplog)); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3757,14 +3757,14 @@ static int sam_ep_disable(struct usbdev_ep_s *ep) /* Reset the endpoint and cancel any ongoing activity */ - flags = irqsave(); + flags = enter_critical_section(); priv = privep->dev; sam_ep_reset(priv, epno); /* Revert to the addressed-but-not-configured state */ priv->devstate = USBHS_DEVSTATE_ADDRESSED; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3874,7 +3874,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) req->result = -EINPROGRESS; req->xfrd = 0; privreq->inflight = 0; - flags = irqsave(); + flags = enter_critical_section(); /* Handle IN (device-to-host) requests. NOTE: If the class device is * using the bi-directional EP0, then we assume that they intend the EP0 @@ -3926,7 +3926,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -3942,9 +3942,9 @@ static int sam_ep_cancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req) DEBUGASSERT(ep != NULL && req != NULL); usbtrace(TRACE_EPCANCEL, USB_EPNO(ep->eplog)); - flags = irqsave(); + flags = enter_critical_section(); sam_req_cancel(privep, -EAGAIN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3973,7 +3973,7 @@ static int sam_ep_stall(struct usbdev_ep_s *ep, bool resume) /* STALL or RESUME the endpoint */ - flags = irqsave(); + flags = enter_critical_section(); usbtrace(resume ? TRACE_EPRESUME : TRACE_EPSTALL, USB_EPNO(ep->eplog)); /* Handle the resume condition */ @@ -4096,7 +4096,7 @@ static int sam_ep_stall(struct usbdev_ep_s *ep, bool resume) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4232,7 +4232,7 @@ static int sam_wakeup(struct usbdev_s *dev) /* Resume normal operation */ - flags = irqsave(); + flags = enter_critical_section(); sam_resume(priv); /* Activate a remote wakeup. Setting this bit forces an external interrupt @@ -4244,7 +4244,7 @@ static int sam_wakeup(struct usbdev_s *dev) regval = sam_getreg(SAM_USBHS_DEVCTRL); regval |= USBHS_DEVCTRL_RMWKUP; sam_putreg(regval, SAM_USBHS_DEVCTRL); - irqrestore(flags); + leave_critical_section(flags); /* This bit is automatically cleared by hardware at the end of the Upstream * Resume @@ -4289,7 +4289,7 @@ static int sam_pullup(FAR struct usbdev_s *dev, bool enable) usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Un-freeze clocking. @@ -4436,7 +4436,7 @@ static int sam_pullup(FAR struct usbdev_s *dev, bool enable) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4870,7 +4870,7 @@ void up_usbuninitialize(void) * easier. */ - flags = irqsave(); + flags = enter_critical_section(); usbtrace(TRACE_DEVUNINIT, 0); /* Disable and detach the USBHS IRQ */ @@ -4888,7 +4888,7 @@ void up_usbuninitialize(void) sam_hw_shutdown(priv); sam_sw_shutdown(priv); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -4962,7 +4962,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) * canceled while the class driver is still bound. */ - flags = irqsave(); + flags = enter_critical_section(); /* Unbind the class driver */ @@ -4986,7 +4986,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Unhook the driver */ priv->driver = NULL; - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/samv7/sam_wdt.c b/arch/arm/src/samv7/sam_wdt.c index 5f377aba4d1..3f8e858ead3 100644 --- a/arch/arm/src/samv7/sam_wdt.c +++ b/arch/arm/src/samv7/sam_wdt.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samv7/sam_wdg.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,6 +44,7 @@ #include #include +#include #include #include @@ -585,7 +586,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower, /* Get the old handler return value */ - flags = irqsave(); + flags = enter_critical_section(); oldhandler = priv->handler; /* Save the new handler */ @@ -607,7 +608,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower, up_disable_irq(SAM_IRQ_WDT); } - irqrestore(flags); + leave_critical_section(flags); return oldhandler; #endif } diff --git a/arch/arm/src/samv7/sam_xdmac.c b/arch/arm/src/samv7/sam_xdmac.c index c519e15062c..5519c87c790 100644 --- a/arch/arm/src/samv7/sam_xdmac.c +++ b/arch/arm/src/samv7/sam_xdmac.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samv7/sam_xdmac.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -48,7 +48,6 @@ #include #include -#include #include #include "up_arch.h" @@ -2002,9 +2001,9 @@ void sam_dmastop(DMA_HANDLE handle) dmavdbg("xdmach: %p\n", xdmach); DEBUGASSERT(xdmach != NULL); - flags = irqsave(); + flags = enter_critical_section(); sam_dmaterminate(xdmach, -EINTR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2031,7 +2030,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs) * cause lost interrupts. */ - flags = irqsave(); + flags = enter_critical_section(); regs->gtype = sam_getdmac(xdmac, SAM_XDMAC_GTYPE_OFFSET); regs->gcfg = sam_getdmac(xdmac, SAM_XDMAC_GCFG_OFFSET); @@ -2056,7 +2055,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs) regs->csus = sam_getdmach(xdmach, SAM_XDMACH_CSUS_OFFSET); regs->cdus = sam_getdmach(xdmach, SAM_XDMACH_CDUS_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DEBUG_DMA */ diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c index 9390380c4be..a2d97cf51cd 100644 --- a/arch/arm/src/stm32/stm32_adc.c +++ b/arch/arm/src/stm32/stm32_adc.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_adc.c * - * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2013, 2015-2016 Gregory Nutt. All rights reserved. * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. * Authors: Gregory Nutt * Diego Sanchez @@ -55,6 +55,7 @@ #include #include +#include #include #include @@ -1683,7 +1684,7 @@ static void adc_reset(FAR struct adc_dev_s *dev) #endif allvdbg("intf: %d\n", priv->intf); - flags = irqsave(); + flags = enter_critical_section(); #if defined(CONFIG_STM32_STM32L15XX) && \ (STM32_CFGR_PLLSRC != 0 || STM32_SYSCLK_SW != RCC_CFGR_SW_HSI) @@ -1980,7 +1981,7 @@ static void adc_reset(FAR struct adc_dev_s *dev) } #endif - irqrestore(flags); + leave_critical_section(flags); #ifdef CONFIG_STM32_STM32F30XX avdbg("ISR: 0x%08x CR: 0x%08x CFGR: 0x%08x\n", diff --git a/arch/arm/src/stm32/stm32_aes.c b/arch/arm/src/stm32/stm32_aes.c index facf86c4524..88e3a236c8f 100644 --- a/arch/arm/src/stm32/stm32_aes.c +++ b/arch/arm/src/stm32/stm32_aes.c @@ -48,6 +48,7 @@ #include #include +#include #include #include @@ -275,7 +276,7 @@ int up_aesreset(void) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(STM32_RCC_AHBRSTR); regval |= RCC_AHBRSTR_AESRST; @@ -283,7 +284,7 @@ int up_aesreset(void) regval &= ~RCC_AHBRSTR_AESRST; putreg32(regval, STM32_RCC_AHBRSTR); - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/stm32/stm32_can.c b/arch/arm/src/stm32/stm32_can.c index 0c7023e6597..8628b2fa79b 100644 --- a/arch/arm/src/stm32/stm32_can.c +++ b/arch/arm/src/stm32/stm32_can.c @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/stm32/stm32_can.c * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -48,6 +48,7 @@ #include #include +#include #include #include @@ -556,7 +557,7 @@ static void can_reset(FAR struct can_dev_s *dev) * to prevent any concurrent access to the AHB1RSTR register. */ - flags = irqsave(); + flags = enter_critical_section(); /* Reset the CAN */ @@ -566,7 +567,7 @@ static void can_reset(FAR struct can_dev_s *dev) regval &= ~regbit; putreg32(regval, STM32_RCC_APB1RSTR); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/stm32/stm32_dac.c b/arch/arm/src/stm32/stm32_dac.c index dfbb5239ee0..fce79ce301a 100644 --- a/arch/arm/src/stm32/stm32_dac.c +++ b/arch/arm/src/stm32/stm32_dac.c @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/stm32/stm32_dac.c * - * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -49,7 +49,7 @@ #include #include -#include +#include #include #include "up_internal.h" @@ -580,11 +580,11 @@ static void dac_reset(FAR struct dac_dev_s *dev) * functional. */ - flags = irqsave(); + flags = enter_critical_section(); #warning "Missing logic" - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1016,7 +1016,7 @@ static int dac_blockinit(void) /* Put the entire DAC block in reset state */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(STM32_RCC_APB1RSTR); regval |= RCC_APB1RSTR_DACRST; putreg32(regval, STM32_RCC_APB1RSTR); @@ -1025,7 +1025,7 @@ static int dac_blockinit(void) regval &= ~RCC_APB1RSTR_DACRST; putreg32(regval, STM32_RCC_APB1RSTR); - irqrestore(flags); + leave_critical_section(flags); /* Mark the DAC block as initialized */ diff --git a/arch/arm/src/stm32/stm32_dma.c b/arch/arm/src/stm32/stm32_dma.c index b47d8c603e5..ff7135840e4 100644 --- a/arch/arm/src/stm32/stm32_dma.c +++ b/arch/arm/src/stm32/stm32_dma.c @@ -41,22 +41,6 @@ #include "chip.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_dma2d.c b/arch/arm/src/stm32/stm32_dma2d.c index 02b93ee781e..0f9c01d0054 100644 --- a/arch/arm/src/stm32/stm32_dma2d.c +++ b/arch/arm/src/stm32/stm32_dma2d.c @@ -483,7 +483,7 @@ static int stm32_dma2dirq(int irq, void *context) * Description: * Helper waits until the dma2d irq occurs. That means that an ongoing clut * loading or dma transfer was completed. - * Note! The caller must use this function within irqsave state. + * Note! The caller must use this function within a critical section. * * Return: * On success OK otherwise ERROR @@ -543,7 +543,7 @@ static int stm32_dma2d_loadclut(uintptr_t pfcreg) uint32_t regval; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); ret = stm32_dma2d_waitforirq(); if (ret == OK) @@ -563,7 +563,7 @@ static int stm32_dma2d_loadclut(uintptr_t pfcreg) regvdbg("configured regval=%08x\n", getreg32(pfcreg)); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif @@ -586,7 +586,7 @@ static int stm32_dma2d_start(void) int ret; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); ret = stm32_dma2d_waitforirq(); if (ret == OK) @@ -606,7 +606,7 @@ static int stm32_dma2d_start(void) ret = stm32_dma2d_waitforirq(); } - irqrestore(flags); + leave_critical_section(flags); return ret; } diff --git a/arch/arm/src/stm32/stm32_dumpgpio.c b/arch/arm/src/stm32/stm32_dumpgpio.c index 559e24bef27..7dfef5f85a5 100644 --- a/arch/arm/src/stm32/stm32_dumpgpio.c +++ b/arch/arm/src/stm32/stm32_dumpgpio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_gpio.c * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -42,8 +42,9 @@ #include #include -#include "up_arch.h" +#include +#include "up_arch.h" #include "chip.h" #include "stm32_gpio.h" #include "stm32_rcc.h" @@ -121,7 +122,7 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); #if defined(CONFIG_STM32_STM32F10XX) @@ -233,7 +234,7 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg) #else # error "Unsupported STM32 chip" #endif - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c index cf954775ae2..7b06b9a3680 100644 --- a/arch/arm/src/stm32/stm32_eth.c +++ b/arch/arm/src/stm32/stm32_eth.c @@ -2504,7 +2504,7 @@ static int stm32_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(STM32_IRQ_ETH); /* Cancel the TX poll timer and TX timeout timers */ @@ -2522,7 +2522,7 @@ static int stm32_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2631,12 +2631,12 @@ static int stm32_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Perform the out-of-cycle poll now */ stm32_txavail_process(priv); - irqrestore(flags); + leave_critical_section(flags); #endif return OK; diff --git a/arch/arm/src/stm32/stm32_gpio.c b/arch/arm/src/stm32/stm32_gpio.c index ef517073fb0..6426107b3b4 100644 --- a/arch/arm/src/stm32/stm32_gpio.c +++ b/arch/arm/src/stm32/stm32_gpio.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include "up_arch.h" @@ -323,7 +323,7 @@ int stm32_configgpio(uint32_t cfgset) * exclusive access to all of the GPIO configuration registers. */ - flags = irqsave(); + flags = enter_critical_section(); /* Decode the mode and configuration */ @@ -363,7 +363,7 @@ int stm32_configgpio(uint32_t cfgset) { /* Its an alternate function pin... we can return early */ - irqrestore(flags); + leave_critical_section(flags); return OK; } } @@ -390,7 +390,7 @@ int stm32_configgpio(uint32_t cfgset) { /* Neither... we can return early */ - irqrestore(flags); + leave_critical_section(flags); return OK; } } @@ -417,7 +417,7 @@ int stm32_configgpio(uint32_t cfgset) regval |= (1 << pin); putreg32(regval, regaddr); - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif @@ -485,7 +485,7 @@ int stm32_configgpio(uint32_t cfgset) * exclusive access to all of the GPIO configuration registers. */ - flags = irqsave(); + flags = enter_critical_section(); /* Now apply the configuration to the mode register */ @@ -655,7 +655,7 @@ int stm32_configgpio(uint32_t cfgset) putreg32(regval, regaddr); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/stm32/stm32_i2c.c b/arch/arm/src/stm32/stm32_i2c.c index cb521fe8bea..1bfcdb562d5 100644 --- a/arch/arm/src/stm32/stm32_i2c.c +++ b/arch/arm/src/stm32/stm32_i2c.c @@ -576,7 +576,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv) uint32_t regval; int ret; - flags = irqsave(); + flags = enter_critical_section(); /* Enable I2C interrupts */ @@ -649,7 +649,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv) regval &= ~I2C_CR2_ALLINTS; stm32_i2c_putreg(priv, STM32_I2C_CR2_OFFSET, regval); - irqrestore(flags); + leave_critical_section(flags); return ret; } #else @@ -1287,7 +1287,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv) */ #ifdef CONFIG_I2C_POLLED - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); #endif /* Receive a byte */ @@ -1302,7 +1302,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv) } #ifdef CONFIG_I2C_POLLED - irqrestore(flags); + leave_critical_section(flags); #endif } else @@ -1982,7 +1982,7 @@ FAR struct i2c_master_s *stm32_i2cbus_initialize(int port) * power-up hardware and configure GPIOs. */ - flags = irqsave(); + flags = enter_critical_section(); if ((volatile int)priv->refs++ == 0) { @@ -1990,7 +1990,7 @@ FAR struct i2c_master_s *stm32_i2cbus_initialize(int port) stm32_i2c_init(priv); } - irqrestore(flags); + leave_critical_section(flags); return (struct i2c_master_s *)priv; } @@ -2016,15 +2016,15 @@ int stm32_i2cbus_uninitialize(FAR struct i2c_master_s *dev) return ERROR; } - flags = irqsave(); + flags = enter_critical_section(); if (--priv->refs) { - irqrestore(flags); + leave_critical_section(flags); return OK; } - irqrestore(flags); + leave_critical_section(flags); /* Disable power and other HW resource (GPIO's) */ diff --git a/arch/arm/src/stm32/stm32_i2c_alt.c b/arch/arm/src/stm32/stm32_i2c_alt.c index 74f1872efc7..561b1372a43 100644 --- a/arch/arm/src/stm32/stm32_i2c_alt.c +++ b/arch/arm/src/stm32/stm32_i2c_alt.c @@ -584,7 +584,7 @@ static int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv) uint32_t regval; int ret; - flags = irqsave(); + flags = enter_critical_section(); /* Enable I2C interrupts */ @@ -657,7 +657,7 @@ static int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv) regval &= ~I2C_CR2_ALLINTS; stm32_i2c_putreg(priv, STM32_I2C_CR2_OFFSET, regval); - irqrestore(flags); + leave_critical_section(flags); return ret; } #else @@ -2427,7 +2427,7 @@ FAR struct i2c_master_s *stm32_i2cbus_initialize(int port) * power-up hardware and configure GPIOs. */ - flags = irqsave(); + flags = enter_critical_section(); if ((volatile int)priv->refs++ == 0) { @@ -2435,7 +2435,7 @@ FAR struct i2c_master_s *stm32_i2cbus_initialize(int port) stm32_i2c_init(priv); } - irqrestore(flags); + leave_critical_section(flags); return (struct i2c_master_s *)priv; } @@ -2461,15 +2461,15 @@ int stm32_i2cbus_uninitialize(FAR struct i2c_master_s *dev) return ERROR; } - flags = irqsave(); + flags = enter_critical_section(); if (--priv->refs) { - irqrestore(flags); + leave_critical_section(flags); return OK; } - irqrestore(flags); + leave_critical_section(flags); /* Disable power and other HW resource (GPIO's) */ diff --git a/arch/arm/src/stm32/stm32_idle.c b/arch/arm/src/stm32/stm32_idle.c index ce95c861ee9..54553e974dd 100644 --- a/arch/arm/src/stm32/stm32_idle.c +++ b/arch/arm/src/stm32/stm32_idle.c @@ -45,7 +45,7 @@ #include #include -#include +#include #include "chip.h" #include "stm32_pm.h" @@ -99,7 +99,7 @@ static void up_idlepm(void) if (newstate != oldstate) { - flags = irqsave(); + flags = enter_critical_section(); /* Perform board-specific, state-dependent logic here */ @@ -143,7 +143,7 @@ static void up_idlepm(void) break; } - irqrestore(flags); + leave_critical_section(flags); } } #else diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c index cf9fe37c36f..38259cca909 100644 --- a/arch/arm/src/stm32/stm32_irq.c +++ b/arch/arm/src/stm32/stm32_irq.c @@ -1,8 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_irq.c - * arch/arm/src/chip/stm32_irq.c * - * Copyright (C) 2009-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -88,10 +87,6 @@ volatile uint32_t *current_regs; extern uint32_t _vectors[]; -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -109,7 +104,7 @@ static void stm32_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" INTCTRL: %08x VECTAB: %08x\n", getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); @@ -138,7 +133,7 @@ static void stm32_dumpnvic(const char *msg, int irq) getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY)); lldbg(" %08x\n", getreg32(NVIC_IRQ64_67_PRIORITY)); - irqrestore(flags); + leave_critical_section(flags); } #else # define stm32_dumpnvic(msg, irq) diff --git a/arch/arm/src/stm32/stm32_iwdg.c b/arch/arm/src/stm32/stm32_iwdg.c index 76dc1d539eb..80d45be7292 100644 --- a/arch/arm/src/stm32/stm32_iwdg.c +++ b/arch/arm/src/stm32/stm32_iwdg.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_iwdg.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,6 +44,7 @@ #include #include +#include #include #include #include @@ -364,12 +365,13 @@ static int stm32_start(FAR struct watchdog_lowerhalf_s *lower) * bits, the watchdog is automatically enabled at power-on. */ - flags = irqsave(); + flags = enter_critical_section(); stm32_putreg(IWDG_KR_KEY_START, STM32_IWDG_KR); priv->lastreset = clock_systimer(); priv->started = true; - irqrestore(flags); + leave_critical_section(flags); } + return OK; } @@ -422,10 +424,10 @@ static int stm32_keepalive(FAR struct watchdog_lowerhalf_s *lower) /* Reload the IWDG timer */ - flags = irqsave(); + flags = enter_critical_section(); stm32_putreg(IWDG_KR_KEY_RELOAD, STM32_IWDG_KR); priv->lastreset = clock_systimer(); - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/stm32/stm32_ltdc.c b/arch/arm/src/stm32/stm32_ltdc.c index 4a710c22ce1..2da314a7928 100644 --- a/arch/arm/src/stm32/stm32_ltdc.c +++ b/arch/arm/src/stm32/stm32_ltdc.c @@ -1168,7 +1168,7 @@ static int stm32_ltdcirq(int irq, void *context) * Description: * Helper waits until the ltdc irq occurs. In the current design That means * that a register reload was been completed. - * Note! The caller must use this function within irqsave state. + * Note! The caller must use this function within a critical section. * * Return: * OK - On success otherwise ERROR @@ -1182,7 +1182,7 @@ static int stm32_ltdc_waitforirq(void) irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); /* Only waits if last enabled interrupt is currently not handled */ @@ -1204,7 +1204,7 @@ static int stm32_ltdc_waitforirq(void) } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -1238,14 +1238,14 @@ static int stm32_ltdc_reload(uint8_t value, bool waitvblank) * the application causes shadow register reload. */ - flags = irqsave(); + flags = enter_critical_section(); ASSERT(priv->handled == true); /* Reset the handled flag */ priv->handled = false; - irqrestore(flags); + leave_critical_section(flags); } /* Reloads the shadow register. @@ -1873,7 +1873,7 @@ static void stm32_ltdc_lclut(FAR struct stm32_layer_s *layer, stm32_ltdc_reload(LTDC_SRCR_IMR, false); - flags = irqsave(); + flags = enter_critical_section(); /* Update the clut registers */ @@ -1906,7 +1906,7 @@ static void stm32_ltdc_lclut(FAR struct stm32_layer_s *layer, putreg32(regval, stm32_clutwr_layer_t[layer->state.lid]); } - irqrestore(flags); + leave_critical_section(flags); /* Enable clut */ diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c index c9afcb81c48..81fb004fbce 100644 --- a/arch/arm/src/stm32/stm32_otgfsdev.c +++ b/arch/arm/src/stm32/stm32_otgfsdev.c @@ -53,7 +53,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -4031,7 +4031,7 @@ static void stm32_epout_disable(FAR struct stm32_ep_s *privep) * Global OUT NAK mode in the core. */ - flags = irqsave(); + flags = enter_critical_section(); stm32_enablegonak(privep); /* Disable the required OUT endpoint by setting the EPDIS and SNAK bits @@ -4076,7 +4076,7 @@ static void stm32_epout_disable(FAR struct stm32_ep_s *privep) stm32_req_cancel(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -4139,7 +4139,7 @@ static void stm32_epin_disable(FAR struct stm32_ep_s *privep) * the DIEPCTLx register. */ - flags = irqsave(); + flags = enter_critical_section(); regaddr = STM32_OTGFS_DIEPCTL(privep->epphy); regval = stm32_getreg(regaddr); regval &= ~OTGFS_DIEPCTL_USBAEP; @@ -4170,7 +4170,7 @@ static void stm32_epin_disable(FAR struct stm32_ep_s *privep) /* Cancel any queued write requests */ stm32_req_cancel(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -4357,7 +4357,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * /* Disable Interrupts */ - flags = irqsave(); + flags = enter_critical_section(); /* If we are stalled, then drop all requests on the floor */ @@ -4402,7 +4402,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -4429,7 +4429,7 @@ static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * usbtrace(TRACE_EPCANCEL, privep->epphy); - flags = irqsave(); + flags = enter_critical_section(); /* FIXME: if the request is the first, then we need to flush the EP * otherwise just remove it from the list @@ -4438,7 +4438,7 @@ static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * */ stm32_req_cancel(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4642,7 +4642,7 @@ static int stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) /* Set or clear the stall condition as requested */ - flags = irqsave(); + flags = enter_critical_section(); if (resume) { ret = stm32_ep_clrstall(privep); @@ -4651,7 +4651,7 @@ static int stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) { ret = stm32_ep_setstall(privep); } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -4710,7 +4710,7 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, /* Get the set of available endpoints depending on the direction */ - flags = irqsave(); + flags = enter_critical_section(); epavail = priv->epavail[in]; /* A physical address of 0 means that any endpoint will do */ @@ -4756,7 +4756,7 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, /* And return the pointer to the standard endpoint structure */ - irqrestore(flags); + leave_critical_section(flags); return in ? &priv->epin[epno].ep : &priv->epout[epno].ep; } } @@ -4765,7 +4765,7 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, } usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOEP), (uint16_t)eplog); - irqrestore(flags); + leave_critical_section(flags); return NULL; } @@ -4789,9 +4789,9 @@ static void stm32_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) { /* Mark the endpoint as available */ - flags = irqsave(); + flags = enter_critical_section(); priv->epavail[privep->isin] |= (1 << privep->epphy); - irqrestore(flags); + leave_critical_section(flags); } } @@ -4833,7 +4833,7 @@ static int stm32_wakeup(struct usbdev_s *dev) /* Is wakeup enabled? */ - flags = irqsave(); + flags = enter_critical_section(); if (priv->wakeup) { /* Yes... is the core suspended? */ @@ -4859,7 +4859,7 @@ static int stm32_wakeup(struct usbdev_s *dev) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4903,7 +4903,7 @@ static int stm32_pullup(struct usbdev_s *dev, bool enable) usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); regval = stm32_getreg(STM32_OTGFS_DCTL); if (enable) { @@ -4923,7 +4923,7 @@ static int stm32_pullup(struct usbdev_s *dev, bool enable) } stm32_putreg(regval, STM32_OTGFS_DCTL); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -5504,7 +5504,7 @@ void up_usbuninitialize(void) /* Disconnect device */ - flags = irqsave(); + flags = enter_critical_section(); stm32_pullup(&priv->usbdev, false); priv->usbdev.speed = USB_SPEED_UNKNOWN; @@ -5535,7 +5535,7 @@ void up_usbuninitialize(void) /* TODO: Turn off USB power and clocking */ priv->devstate = DEVSTATE_DEFAULT; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -5643,9 +5643,9 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) * canceled while the class driver is still bound. */ - flags = irqsave(); + flags = enter_critical_section(); stm32_usbreset(priv); - irqrestore(flags); + leave_critical_section(flags); /* Unbind the class driver */ @@ -5653,7 +5653,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Disable USB controller interrupts */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(STM32_IRQ_OTGFS); /* Disconnect device */ @@ -5663,7 +5663,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Unhook the driver */ priv->driver = NULL; - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/stm32/stm32_otgfshost.c b/arch/arm/src/stm32/stm32_otgfshost.c index f66e06d0587..81f6ded2697 100644 --- a/arch/arm/src/stm32/stm32_otgfshost.c +++ b/arch/arm/src/stm32/stm32_otgfshost.c @@ -57,7 +57,7 @@ #include #include -#include +#include #include "chip.h" /* Includes default GPIO settings */ #include /* May redefine GPIO settings */ @@ -1000,7 +1000,7 @@ static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx, static int stm32_chan_waitsetup(FAR struct stm32_usbhost_s *priv, FAR struct stm32_chan_s *chan) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); int ret = -ENODEV; /* Is the device still connected? */ @@ -1019,7 +1019,7 @@ static int stm32_chan_waitsetup(FAR struct stm32_usbhost_s *priv, ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -1042,7 +1042,7 @@ static int stm32_chan_asynchsetup(FAR struct stm32_usbhost_s *priv, FAR struct stm32_chan_s *chan, usbhost_asynch_t callback, FAR void *arg) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); int ret = -ENODEV; /* Is the device still connected? */ @@ -1059,7 +1059,7 @@ static int stm32_chan_asynchsetup(FAR struct stm32_usbhost_s *priv, ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -1087,7 +1087,7 @@ static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv, * while we wait. */ - flags = irqsave(); + flags = enter_critical_section(); /* Loop, testing for an end of transfer condition. The channel 'result' * was set to EBUSY and 'waiter' was set to true before the transfer; 'waiter' @@ -1115,7 +1115,7 @@ static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv, /* The transfer is complete re-enable interrupts and return the result */ ret = -(int)chan->result; - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -3676,7 +3676,7 @@ static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx) * (it would be sufficent just to disable the GINT interrupt). */ - flags = irqsave(); + flags = enter_critical_section(); /* Should we enable the periodic or non-peridic Tx FIFO empty interrupts */ @@ -3698,7 +3698,7 @@ static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx) /* Enable interrupts */ stm32_putreg(STM32_OTGFS_GINTMSK, regval); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3739,7 +3739,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn, /* Loop until a change in connection state is detected */ - flags = irqsave(); + flags = enter_critical_section(); for (; ; ) { /* Is there a change in the connection state of the single root hub @@ -3758,7 +3758,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn, /* And return the root hub port */ *hport = connport; - irqrestore(flags); + leave_critical_section(flags); uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO"); return OK; @@ -3775,7 +3775,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn, priv->hport = NULL; *hport = connport; - irqrestore(flags); + leave_critical_section(flags); uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO"); return OK; @@ -4641,7 +4641,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) * completion of the transfer being cancelled. */ - flags = irqsave(); + flags = enter_critical_section(); /* Halt the channel */ @@ -4689,7 +4689,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) } #endif - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4731,7 +4731,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr, /* Report the connection event */ - flags = irqsave(); + flags = enter_critical_section(); priv->hport = hport; if (priv->pscwait) { @@ -4739,7 +4739,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr, stm32_givesem(&priv->pscsem); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/stm32/stm32_otghsdev.c b/arch/arm/src/stm32/stm32_otghsdev.c index 338f6616ad7..07e9f0af1ca 100644 --- a/arch/arm/src/stm32/stm32_otghsdev.c +++ b/arch/arm/src/stm32/stm32_otghsdev.c @@ -53,7 +53,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -4031,7 +4031,7 @@ static void stm32_epout_disable(FAR struct stm32_ep_s *privep) * Global OUT NAK mode in the core. */ - flags = irqsave(); + flags = enter_critical_section(); stm32_enablegonak(privep); /* Disable the required OUT endpoint by setting the EPDIS and SNAK bits @@ -4076,7 +4076,7 @@ static void stm32_epout_disable(FAR struct stm32_ep_s *privep) stm32_req_cancel(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -4139,7 +4139,7 @@ static void stm32_epin_disable(FAR struct stm32_ep_s *privep) * the DIEPCTLx register. */ - flags = irqsave(); + flags = enter_critical_section(); regaddr = STM32_OTGHS_DIEPCTL(privep->epphy); regval = stm32_getreg(regaddr); regval &= ~OTGHS_DIEPCTL_USBAEP; @@ -4170,7 +4170,7 @@ static void stm32_epin_disable(FAR struct stm32_ep_s *privep) /* Cancel any queued write requests */ stm32_req_cancel(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -4357,7 +4357,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * /* Disable Interrupts */ - flags = irqsave(); + flags = enter_critical_section(); /* If we are stalled, then drop all requests on the floor */ @@ -4402,7 +4402,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -4429,7 +4429,7 @@ static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * usbtrace(TRACE_EPCANCEL, privep->epphy); - flags = irqsave(); + flags = enter_critical_section(); /* FIXME: if the request is the first, then we need to flush the EP * otherwise just remove it from the list @@ -4438,7 +4438,7 @@ static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * */ stm32_req_cancel(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4642,7 +4642,7 @@ static int stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) /* Set or clear the stall condition as requested */ - flags = irqsave(); + flags = enter_critical_section(); if (resume) { ret = stm32_ep_clrstall(privep); @@ -4651,7 +4651,7 @@ static int stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) { ret = stm32_ep_setstall(privep); } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -4710,7 +4710,7 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, /* Get the set of available endpoints depending on the direction */ - flags = irqsave(); + flags = enter_critical_section(); epavail = priv->epavail[in]; /* A physical address of 0 means that any endpoint will do */ @@ -4756,7 +4756,7 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, /* And return the pointer to the standard endpoint structure */ - irqrestore(flags); + leave_critical_section(flags); return in ? &priv->epin[epno].ep : &priv->epout[epno].ep; } } @@ -4765,7 +4765,7 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, } usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOEP), (uint16_t)eplog); - irqrestore(flags); + leave_critical_section(flags); return NULL; } @@ -4789,9 +4789,9 @@ static void stm32_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) { /* Mark the endpoint as available */ - flags = irqsave(); + flags = enter_critical_section(); priv->epavail[privep->isin] |= (1 << privep->epphy); - irqrestore(flags); + leave_critical_section(flags); } } @@ -4833,7 +4833,7 @@ static int stm32_wakeup(struct usbdev_s *dev) /* Is wakeup enabled? */ - flags = irqsave(); + flags = enter_critical_section(); if (priv->wakeup) { /* Yes... is the core suspended? */ @@ -4859,7 +4859,7 @@ static int stm32_wakeup(struct usbdev_s *dev) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4903,7 +4903,7 @@ static int stm32_pullup(struct usbdev_s *dev, bool enable) usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); regval = stm32_getreg(STM32_OTGHS_DCTL); if (enable) { @@ -4923,7 +4923,7 @@ static int stm32_pullup(struct usbdev_s *dev, bool enable) } stm32_putreg(regval, STM32_OTGHS_DCTL); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -5493,7 +5493,7 @@ void up_usbuninitialize(void) /* Disconnect device */ - flags = irqsave(); + flags = enter_critical_section(); stm32_pullup(&priv->usbdev, false); priv->usbdev.speed = USB_SPEED_UNKNOWN; @@ -5524,7 +5524,7 @@ void up_usbuninitialize(void) /* TODO: Turn off USB power and clocking */ priv->devstate = DEVSTATE_DEFAULT; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -5632,9 +5632,9 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) * canceled while the class driver is still bound. */ - flags = irqsave(); + flags = enter_critical_section(); stm32_usbreset(priv); - irqrestore(flags); + leave_critical_section(flags); /* Unbind the class driver */ @@ -5642,7 +5642,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Disable USB controller interrupts */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(STM32_IRQ_OTGHS); /* Disconnect device */ @@ -5652,7 +5652,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Unhook the driver */ priv->driver = NULL; - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/stm32/stm32_otghshost.c b/arch/arm/src/stm32/stm32_otghshost.c index 5e658d3a09d..4c6252a0291 100644 --- a/arch/arm/src/stm32/stm32_otghshost.c +++ b/arch/arm/src/stm32/stm32_otghshost.c @@ -57,7 +57,7 @@ #include #include -#include +#include #include "chip.h" /* Includes default GPIO settings */ #include /* May redefine GPIO settings */ @@ -1000,7 +1000,7 @@ static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx, static int stm32_chan_waitsetup(FAR struct stm32_usbhost_s *priv, FAR struct stm32_chan_s *chan) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); int ret = -ENODEV; /* Is the device still connected? */ @@ -1019,7 +1019,7 @@ static int stm32_chan_waitsetup(FAR struct stm32_usbhost_s *priv, ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -1042,7 +1042,7 @@ static int stm32_chan_asynchsetup(FAR struct stm32_usbhost_s *priv, FAR struct stm32_chan_s *chan, usbhost_asynch_t callback, FAR void *arg) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); int ret = -ENODEV; /* Is the device still connected? */ @@ -1059,7 +1059,7 @@ static int stm32_chan_asynchsetup(FAR struct stm32_usbhost_s *priv, ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -1087,7 +1087,7 @@ static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv, * while we wait. */ - flags = irqsave(); + flags = enter_critical_section(); /* Loop, testing for an end of transfer condition. The channel 'result' * was set to EBUSY and 'waiter' was set to true before the transfer; 'waiter' @@ -1115,7 +1115,7 @@ static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv, /* The transfer is complete re-enable interrupts and return the result */ ret = -(int)chan->result; - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -3676,7 +3676,7 @@ static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx) * (it would be sufficent just to disable the GINT interrupt). */ - flags = irqsave(); + flags = enter_critical_section(); /* Should we enable the periodic or non-peridic Tx FIFO empty interrupts */ @@ -3698,7 +3698,7 @@ static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx) /* Enable interrupts */ stm32_putreg(STM32_OTGHS_GINTMSK, regval); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3739,7 +3739,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn, /* Loop until a change in connection state is detected */ - flags = irqsave(); + flags = enter_critical_section(); for (; ; ) { /* Is there a change in the connection state of the single root hub @@ -3758,7 +3758,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn, /* And return the root hub port */ *hport = connport; - irqrestore(flags); + leave_critical_section(flags); uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO"); return OK; @@ -3775,7 +3775,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn, priv->hport = NULL; *hport = connport; - irqrestore(flags); + leave_critical_section(flags); uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO"); return OK; @@ -4641,7 +4641,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) * completion of the transfer being cancelled. */ - flags = irqsave(); + flags = enter_critical_section(); /* Halt the channel */ @@ -4689,7 +4689,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) } #endif - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -4731,7 +4731,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr, /* Report the connection event */ - flags = irqsave(); + flags = enter_critical_section(); priv->hport = hport; if (priv->pscwait) { @@ -4739,7 +4739,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr, stm32_givesem(&priv->pscsem); } - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c index 6885b914345..72be1bd6afe 100644 --- a/arch/arm/src/stm32/stm32_pwm.c +++ b/arch/arm/src/stm32/stm32_pwm.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_pwm.c * - * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. * Authors: Gregory Nutt * Paul Alexander Patience @@ -2109,7 +2109,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) * to prevent any concurrent access to the reset register. */ - flags = irqsave(); + flags = enter_critical_section(); /* Disable further interrupts and stop the timer */ @@ -2222,7 +2222,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) regval &= ~resetbit; putreg32(regval, regaddr); - irqrestore(flags); + leave_critical_section(flags); pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit); pwm_dumpregs(priv, "After stop"); diff --git a/arch/arm/src/stm32/stm32_qencoder.c b/arch/arm/src/stm32/stm32_qencoder.c index c390e75c701..5cec5e0874d 100644 --- a/arch/arm/src/stm32/stm32_qencoder.c +++ b/arch/arm/src/stm32/stm32_qencoder.c @@ -1053,7 +1053,7 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower) /* Disable the update/global interrupt at the NVIC */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(priv->config->irq); /* Detach the interrupt handler */ @@ -1123,7 +1123,7 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower) regval &= ~resetbit; putreg32(regval, regaddr); - irqrestore(flags); + leave_critical_section(flags); snvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit); stm32_dumpregs(priv, "After stop"); @@ -1210,10 +1210,10 @@ static int stm32_reset(FAR struct qe_lowerhalf_s *lower) * (if possible) */ - flags = irqsave(); + flags = enter_critical_section(); stm32_putreg32(priv, STM32_GTIM_CNT_OFFSET, 0); priv->position = 0; - irqrestore(flags); + leave_critical_section(flags); #else snvdbg("Resetting position to zero\n"); DEBUGASSERT(lower && priv->inuse); diff --git a/arch/arm/src/stm32/stm32_rtcounter.c b/arch/arm/src/stm32/stm32_rtcounter.c index a50e25758b2..8156de0a604 100644 --- a/arch/arm/src/stm32/stm32_rtcounter.c +++ b/arch/arm/src/stm32/stm32_rtcounter.c @@ -466,7 +466,7 @@ time_t up_rtc_time(void) * interrupts will prevent suspensions and interruptions: */ - flags = irqsave(); + flags = enter_critical_section(); /* And the following loop will handle any clock rollover events that may * happen between samples. Most of the time (like 99.9%), the following @@ -488,7 +488,7 @@ time_t up_rtc_time(void) */ while (cntl < tmp); - irqrestore(flags); + leave_critical_section(flags); /* Okay.. the samples should be as close together in time as possible and * we can be assured that no clock rollover occurred between the samples. @@ -534,7 +534,7 @@ int up_rtc_gettime(FAR struct timespec *tp) * interrupts will prevent suspensions and interruptions: */ - flags = irqsave(); + flags = enter_critical_section(); /* And the following loop will handle any clock rollover events that may * happen between samples. Most of the time (like 99.9%), the following @@ -557,7 +557,7 @@ int up_rtc_gettime(FAR struct timespec *tp) */ while (cntl < tmp); - irqrestore(flags); + leave_critical_section(flags); /* Okay.. the samples should be as close together in time as possible and * we can be assured that no clock rollover occurred between the samples. @@ -604,7 +604,7 @@ int up_rtc_settime(FAR const struct timespec *tp) /* Enable write access to the backup domain */ - flags = irqsave(); + flags = enter_critical_section(); (void)stm32_pwr_enablebkp(true); /* Then write the broken out values to the RTC counter and BKP overflow register @@ -626,7 +626,7 @@ int up_rtc_settime(FAR const struct timespec *tp) #endif (void)stm32_pwr_enablebkp(false); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -673,12 +673,12 @@ int stm32_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) /* The set the alarm */ - flags = irqsave(); + flags = enter_critical_section(); stm32_rtc_beginwr(); putreg16(regvals.cnth, STM32_RTC_ALRH); putreg16(regvals.cntl, STM32_RTC_ALRL); stm32_rtc_endwr(); - irqrestore(flags); + leave_critical_section(flags); ret = OK; } @@ -715,12 +715,12 @@ int stm32_rtc_cancelalarm(void) /* Unset the alarm */ - flags = irqsave(); + flags = enter_critical_section(); stm32_rtc_beginwr(); putreg16(0xffff, STM32_RTC_ALRH); putreg16(0xffff, STM32_RTC_ALRL); stm32_rtc_endwr(); - irqrestore(flags); + leave_critical_section(flags); ret = OK; } diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c index 99170a77848..b9bea99351f 100644 --- a/arch/arm/src/stm32/stm32_sdio.c +++ b/arch/arm/src/stm32/stm32_sdio.c @@ -54,7 +54,7 @@ #include #include -#include +#include #include #include "chip.h" @@ -629,7 +629,7 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask, /* Save all of the data and set the new interrupt mask in one, atomic * operation. */ - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE if ((waitmask & SDIOWAIT_WRCOMPLETE) != 0) @@ -662,7 +662,7 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask, priv->xfrflags = 0; #endif putreg32(priv->xfrmask | priv->waitmask, STM32_SDIO_MASK); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -683,10 +683,10 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask, static void stm32_configxfrints(struct stm32_dev_s *priv, uint32_t xfrmask) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); priv->xfrmask = xfrmask; putreg32(priv->xfrmask | priv->waitmask, STM32_SDIO_MASK); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1544,7 +1544,7 @@ static void stm32_reset(FAR struct sdio_dev_s *dev) /* Disable clocking */ - flags = irqsave(); + flags = enter_critical_section(); putreg32(0, SDIO_CLKCR_CLKEN_BB); stm32_setpwrctrl(SDIO_POWER_PWRCTRL_OFF); @@ -1580,7 +1580,7 @@ static void stm32_reset(FAR struct sdio_dev_s *dev) stm32_setclkcr(STM32_CLCKCR_INIT | SDIO_CLKCR_CLKEN); stm32_setpwrctrl(SDIO_POWER_PWRCTRL_ON); - irqrestore(flags); + leave_critical_section(flags); fvdbg("CLCKR: %08x POWER: %08x\n", getreg32(STM32_SDIO_CLKCR), getreg32(STM32_SDIO_POWER)); @@ -2356,7 +2356,7 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev, * be non-zero (and, hopefully, the semaphore count will also be non-zero. */ - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(priv->waitevents != 0 || priv->wkupevent != 0); /* Check if the timeout event is specified in the event set */ @@ -2439,7 +2439,7 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev, #endif errout: - irqrestore(flags); + leave_critical_section(flags); stm32_dumpsamples(priv); return wkupevent; } @@ -2912,7 +2912,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) /* Update card status */ - flags = irqsave(); + flags = enter_critical_section(); cdstatus = priv->cdstatus; if (cardinslot) { @@ -2923,7 +2923,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) priv->cdstatus &= ~SDIO_STATUS_PRESENT; } - irqrestore(flags); + leave_critical_section(flags); fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus); @@ -2958,7 +2958,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) /* Update card status */ - flags = irqsave(); + flags = enter_critical_section(); if (wrprotect) { priv->cdstatus |= SDIO_STATUS_WRPROTECTED; @@ -2968,6 +2968,6 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED; } fvdbg("cdstatus: %02x\n", priv->cdstatus); - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_STM32_SDIO */ diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c index d9826631f22..4510e6b1584 100644 --- a/arch/arm/src/stm32/stm32_serial.c +++ b/arch/arm/src/stm32/stm32_serial.c @@ -2057,20 +2057,20 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) #ifdef CONFIG_USART_BREAKS case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); uint32_t cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET); up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 | USART_CR2_LINEN); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); uint32_t cr1 = up_serialin(priv, STM32_USART_CR2_OFFSET); up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 & ~USART_CR2_LINEN); - irqrestore(flags); + leave_critical_section(flags); } break; #endif @@ -2144,7 +2144,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) * " " USART_SR_ORE Overrun Error Detected */ - flags = irqsave(); + flags = enter_critical_section(); ie = priv->ie; if (enable) { @@ -2168,7 +2168,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) /* Then set the new interrupt state */ up_restoreusartint(priv, ie); - irqrestore(flags); + leave_critical_section(flags); } #endif @@ -2443,7 +2443,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) * USART_CR3_CTSIE USART_SR_CTS CTS flag (not used) */ - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX data register is empty */ @@ -2478,7 +2478,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_restoreusartint(priv, priv->ie & ~USART_CR1_TXEIE); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2831,7 +2831,7 @@ void stm32_serial_dma_poll(void) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_USART1_RXDMA if (g_usart1priv.rxdma != NULL) @@ -2889,7 +2889,7 @@ void stm32_serial_dma_poll(void) } #endif - irqrestore(flags); + leave_critical_section(flags); } #endif diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index d921e77967b..eed9ea9845b 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -1,7 +1,7 @@ /************************************************************************************ * arm/arm/src/stm32/stm32_spi.c * - * Copyright (C) 2009-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -68,6 +68,7 @@ #include #include +#include #include #include @@ -1544,7 +1545,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus) { FAR struct stm32_spidev_s *priv = NULL; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); #ifdef CONFIG_STM32_SPI1 if (bus == 1) @@ -1695,7 +1696,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus) return NULL; } - irqrestore(flags); + leave_critical_section(flags); return (FAR struct spi_dev_s *)priv; } diff --git a/arch/arm/src/stm32/stm32_tim_lowerhalf.c b/arch/arm/src/stm32/stm32_tim_lowerhalf.c index 5595e946b7f..5de8549c71d 100644 --- a/arch/arm/src/stm32/stm32_tim_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_tim_lowerhalf.c @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -593,7 +594,7 @@ static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower, { FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); /* Get the old handler return value */ @@ -614,7 +615,7 @@ static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower, STM32_TIM_SETISR(priv->tim, 0, 0); } - irqrestore(flags); + leave_critical_section(flags); return oldhandler; } diff --git a/arch/arm/src/stm32/stm32_usbdev.c b/arch/arm/src/stm32/stm32_usbdev.c index ecc65328f9b..27f75be899a 100644 --- a/arch/arm/src/stm32/stm32_usbdev.c +++ b/arch/arm/src/stm32/stm32_usbdev.c @@ -57,7 +57,7 @@ #include #include -#include +#include #include "up_arch.h" #include "stm32.h" @@ -1253,9 +1253,9 @@ static void stm32_reqcomplete(struct stm32_ep_s *privep, int16_t result) /* Remove the completed request at the head of the endpoint request list */ - flags = irqsave(); + flags = enter_critical_section(); privreq = stm32_rqdequeue(privep); - irqrestore(flags); + leave_critical_section(flags); if (privreq) { @@ -2727,7 +2727,7 @@ stm32_epreserve(struct stm32_usbdev_s *priv, uint8_t epset) irqstate_t flags; int epndx = 0; - flags = irqsave(); + flags = enter_critical_section(); epset &= priv->epavail; if (epset) { @@ -2752,7 +2752,7 @@ stm32_epreserve(struct stm32_usbdev_s *priv, uint8_t epset) } } - irqrestore(flags); + leave_critical_section(flags); return privep; } @@ -2763,9 +2763,9 @@ stm32_epreserve(struct stm32_usbdev_s *priv, uint8_t epset) static inline void stm32_epunreserve(struct stm32_usbdev_s *priv, struct stm32_ep_s *privep) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->epavail |= STM32_ENDP_BIT(USB_EPNO(privep->ep.eplog)); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2788,7 +2788,7 @@ static int stm32_epallocpma(struct stm32_usbdev_s *priv) int bufno = ERROR; int bufndx; - flags = irqsave(); + flags = enter_critical_section(); for (bufndx = 2; bufndx < STM32_NBUFFERS; bufndx++) { /* Check if this buffer is available */ @@ -2807,7 +2807,7 @@ static int stm32_epallocpma(struct stm32_usbdev_s *priv) } } - irqrestore(flags); + leave_critical_section(flags); return bufno; } @@ -2818,9 +2818,9 @@ static int stm32_epallocpma(struct stm32_usbdev_s *priv) static inline void stm32_epfreepma(struct stm32_usbdev_s *priv, struct stm32_ep_s *privep) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->epavail |= STM32_ENDP_BIT(privep->bufno); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2950,7 +2950,7 @@ static int stm32_epdisable(struct usbdev_ep_s *ep) /* Cancel any ongoing activity */ - flags = irqsave(); + flags = enter_critical_section(); stm32_cancelrequests(privep); /* Disable TX; disable RX */ @@ -2959,7 +2959,7 @@ static int stm32_epdisable(struct usbdev_ep_s *ep) stm32_seteprxstatus(epno, USB_EPR_STATRX_DIS); stm32_seteptxstatus(epno, USB_EPR_STATTX_DIS); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3050,7 +3050,7 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) epno = USB_EPNO(ep->eplog); req->result = -EINPROGRESS; req->xfrd = 0; - flags = irqsave(); + flags = enter_critical_section(); /* If we are stalled, then drop all requests on the floor */ @@ -3123,7 +3123,7 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -3145,9 +3145,9 @@ static int stm32_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req) #endif usbtrace(TRACE_EPCANCEL, USB_EPNO(ep->eplog)); - flags = irqsave(); + flags = enter_critical_section(); stm32_cancelrequests(privep); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3177,7 +3177,7 @@ static int stm32_epstall(struct usbdev_ep_s *ep, bool resume) /* STALL or RESUME the endpoint */ - flags = irqsave(); + flags = enter_critical_section(); usbtrace(resume ? TRACE_EPRESUME : TRACE_EPSTALL, USB_EPNO(ep->eplog)); /* Get status of the endpoint; stall the request if the endpoint is @@ -3285,7 +3285,7 @@ static int stm32_epstall(struct usbdev_ep_s *ep, bool resume) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3447,7 +3447,7 @@ static int stm32_wakeup(struct usbdev_s *dev) * by the ESOF interrupt. */ - flags = irqsave(); + flags = enter_critical_section(); stm32_initresume(priv); priv->rsmstate = RSMSTATE_STARTED; @@ -3459,7 +3459,7 @@ static int stm32_wakeup(struct usbdev_s *dev) stm32_setimask(priv, USB_CNTR_ESOFM, USB_CNTR_WKUPM | USB_CNTR_SUSPM); stm32_putreg(~USB_ISTR_ESOF, STM32_USB_ISTR); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3791,7 +3791,7 @@ void up_usbuninitialize(void) struct stm32_usbdev_s *priv = &g_usbdev; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); usbtrace(TRACE_DEVUNINIT, 0); /* Disable and detach the USB IRQs */ @@ -3810,7 +3810,7 @@ void up_usbuninitialize(void) /* Put the hardware in an inactive state */ stm32_hwshutdown(priv); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3924,7 +3924,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) * canceled while the class driver is still bound. */ - flags = irqsave(); + flags = enter_critical_section(); stm32_reset(priv); /* Unbind the class driver */ @@ -3947,7 +3947,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Unhook the driver */ priv->driver = NULL; - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/stm32/stm32_wwdg.c b/arch/arm/src/stm32/stm32_wwdg.c index e4759ee9832..5cab6ce92b6 100644 --- a/arch/arm/src/stm32/stm32_wwdg.c +++ b/arch/arm/src/stm32/stm32_wwdg.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_wwdg.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,6 +44,7 @@ #include #include +#include #include #include @@ -647,7 +648,7 @@ static xcpt_t stm32_capture(FAR struct watchdog_lowerhalf_s *lower, /* Get the old handler return value */ - flags = irqsave(); + flags = enter_critical_section(); oldhandler = priv->handler; /* Save the new handler */ @@ -676,7 +677,7 @@ static xcpt_t stm32_capture(FAR struct watchdog_lowerhalf_s *lower, up_disable_irq(STM32_IRQ_WWDG); } - irqrestore(flags); + leave_critical_section(flags); return oldhandler; } diff --git a/arch/arm/src/stm32/stm32f10xxx_dma.c b/arch/arm/src/stm32/stm32f10xxx_dma.c index 258967d27a4..8c5bf161e6a 100644 --- a/arch/arm/src/stm32/stm32f10xxx_dma.c +++ b/arch/arm/src/stm32/stm32f10xxx_dma.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32f10xxx_dma.c * - * Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,7 +47,6 @@ #include #include -#include #include "up_arch.h" #include "up_internal.h" @@ -714,13 +713,13 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs) struct stm32_dma_s *dmach = (struct stm32_dma_s *)handle; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); regs->isr = dmabase_getreg(dmach, STM32_DMA_ISR_OFFSET); regs->ccr = dmachan_getreg(dmach, STM32_DMACHAN_CCR_OFFSET); regs->cndtr = dmachan_getreg(dmach, STM32_DMACHAN_CNDTR_OFFSET); regs->cpar = dmachan_getreg(dmach, STM32_DMACHAN_CPAR_OFFSET); regs->cmar = dmachan_getreg(dmach, STM32_DMACHAN_CMAR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } #endif diff --git a/arch/arm/src/stm32/stm32f20xxx_dma.c b/arch/arm/src/stm32/stm32f20xxx_dma.c index b712e851123..39c40f59f65 100644 --- a/arch/arm/src/stm32/stm32f20xxx_dma.c +++ b/arch/arm/src/stm32/stm32f20xxx_dma.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32f20xxx_dma.c * - * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,7 +47,6 @@ #include #include -#include #include "up_arch.h" #include "up_internal.h" @@ -980,7 +979,7 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs) struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); regs->lisr = dmabase_getreg(dmast, STM32_DMA_LISR_OFFSET); regs->hisr = dmabase_getreg(dmast, STM32_DMA_HISR_OFFSET); regs->scr = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET); @@ -989,7 +988,7 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs) regs->sm0ar = dmast_getreg(dmast, STM32_DMA_SM0AR_OFFSET); regs->sm1ar = dmast_getreg(dmast, STM32_DMA_SM1AR_OFFSET); regs->sfcr = dmast_getreg(dmast, STM32_DMA_SFCR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } #endif diff --git a/arch/arm/src/stm32/stm32f20xxx_rcc.c b/arch/arm/src/stm32/stm32f20xxx_rcc.c index ed6e0fed315..a45241ed85b 100644 --- a/arch/arm/src/stm32/stm32f20xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f20xxx_rcc.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32f20xxx_rcc.c * - * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without diff --git a/arch/arm/src/stm32/stm32f30xxx_i2c.c b/arch/arm/src/stm32/stm32f30xxx_i2c.c index aae5eafd2ca..0f59dceec7f 100644 --- a/arch/arm/src/stm32/stm32f30xxx_i2c.c +++ b/arch/arm/src/stm32/stm32f30xxx_i2c.c @@ -614,7 +614,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv) uint32_t regval; int ret; - flags = irqsave(); + flags = enter_critical_section(); /* Enable I2C interrupts */ @@ -683,7 +683,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv) stm32_i2c_modifyreg32(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ALLINTS, 0); - irqrestore(flags); + leave_critical_section(flags); return ret; } #else @@ -1346,7 +1346,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv) */ #ifdef CONFIG_I2C_POLLED - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); #endif /* Receive a byte */ @@ -1361,7 +1361,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv) } #ifdef CONFIG_I2C_POLLED - irqrestore(flags); + leave_critical_section(flags); #endif } } @@ -1983,7 +1983,7 @@ FAR struct i2c_master_s *stm32_i2cbus_initialize(int port) * power-up hardware and configure GPIOs. */ - flags = irqsave(); + flags = enter_critical_section(); if ((volatile int)priv->refs++ == 0) { @@ -1991,7 +1991,7 @@ FAR struct i2c_master_s *stm32_i2cbus_initialize(int port) stm32_i2c_init(priv); } - irqrestore(flags); + leave_critical_section(flags); return (struct i2c_master_s *)priv; } @@ -2017,15 +2017,15 @@ int stm32_i2cbus_uninitialize(FAR struct i2c_master_s * dev) return ERROR; } - flags = irqsave(); + flags = enter_critical_section(); if (--priv->refs) { - irqrestore(flags); + leave_critical_section(flags); return OK; } - irqrestore(flags); + leave_critical_section(flags); /* Disable power and other HW resource (GPIO's) */ diff --git a/arch/arm/src/stm32/stm32f40xxx_dma.c b/arch/arm/src/stm32/stm32f40xxx_dma.c index 2c4265ebf17..41d24368595 100644 --- a/arch/arm/src/stm32/stm32f40xxx_dma.c +++ b/arch/arm/src/stm32/stm32f40xxx_dma.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32f40xxx_dma.c * - * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,7 +47,6 @@ #include #include -#include #include "up_arch.h" #include "up_internal.h" @@ -1008,7 +1007,7 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs) struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); regs->lisr = dmabase_getreg(dmast, STM32_DMA_LISR_OFFSET); regs->hisr = dmabase_getreg(dmast, STM32_DMA_HISR_OFFSET); regs->scr = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET); @@ -1017,7 +1016,7 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs) regs->sm0ar = dmast_getreg(dmast, STM32_DMA_SM0AR_OFFSET); regs->sm1ar = dmast_getreg(dmast, STM32_DMA_SM1AR_OFFSET); regs->sfcr = dmast_getreg(dmast, STM32_DMA_SFCR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } #endif diff --git a/arch/arm/src/stm32f7/stm32_dma.c b/arch/arm/src/stm32f7/stm32_dma.c index 6bc53440981..ff904c1d6b0 100644 --- a/arch/arm/src/stm32f7/stm32_dma.c +++ b/arch/arm/src/stm32f7/stm32_dma.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32f7/stm32_dma.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,8 +47,6 @@ #include #include - -#include #include #include "up_arch.h" @@ -1010,7 +1008,7 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs) struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); regs->lisr = dmabase_getreg(dmast, STM32_DMA_LISR_OFFSET); regs->hisr = dmabase_getreg(dmast, STM32_DMA_HISR_OFFSET); regs->scr = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET); @@ -1019,7 +1017,7 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs) regs->sm0ar = dmast_getreg(dmast, STM32_DMA_SM0AR_OFFSET); regs->sm1ar = dmast_getreg(dmast, STM32_DMA_SM1AR_OFFSET); regs->sfcr = dmast_getreg(dmast, STM32_DMA_SFCR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); } #endif diff --git a/arch/arm/src/stm32f7/stm32_dumpgpio.c b/arch/arm/src/stm32f7/stm32_dumpgpio.c index 24cf4a1114a..e1772e89cd1 100644 --- a/arch/arm/src/stm32f7/stm32_dumpgpio.c +++ b/arch/arm/src/stm32f7/stm32_dumpgpio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32f7/stm32_gpio.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -42,6 +42,7 @@ #include #include +#include #include #include "up_arch.h" @@ -121,7 +122,7 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(port < STM32F7_NGPIO); @@ -149,7 +150,7 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg) g_portchar[port], getreg32(STM32_RCC_AHB1ENR)); } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/stm32f7/stm32_ethernet.c b/arch/arm/src/stm32f7/stm32_ethernet.c index 1e8c2e6177e..4cf496a4eb9 100644 --- a/arch/arm/src/stm32f7/stm32_ethernet.c +++ b/arch/arm/src/stm32f7/stm32_ethernet.c @@ -2620,7 +2620,7 @@ static int stm32_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(STM32_IRQ_ETH); /* Cancel the TX poll timer and TX timeout timers */ @@ -2638,7 +2638,7 @@ static int stm32_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2748,12 +2748,12 @@ static int stm32_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Perform the out-of-cycle poll now */ stm32_txavail_process(priv); - irqrestore(flags); + leave_critical_section(flags); #endif return OK; diff --git a/arch/arm/src/stm32f7/stm32_gpio.c b/arch/arm/src/stm32f7/stm32_gpio.c index bc877facfc5..ee4e0f819bb 100644 --- a/arch/arm/src/stm32f7/stm32_gpio.c +++ b/arch/arm/src/stm32f7/stm32_gpio.c @@ -45,7 +45,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -197,7 +197,7 @@ int stm32_configgpio(uint32_t cfgset) * exclusive access to all of the GPIO configuration registers. */ - flags = irqsave(); + flags = enter_critical_section(); /* Now apply the configuration to the mode register */ @@ -346,7 +346,7 @@ int stm32_configgpio(uint32_t cfgset) putreg32(regval, regaddr); } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c index 481417a68f4..32099b5d947 100644 --- a/arch/arm/src/stm32f7/stm32_irq.c +++ b/arch/arm/src/stm32f7/stm32_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32f7/stm32_irq.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -113,7 +113,7 @@ static void stm32_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" INTCTRL: %08x VECTAB: %08x\n", getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); @@ -164,7 +164,7 @@ static void stm32_dumpnvic(const char *msg, int irq) #if NR_INTERRUPTS > 111 # warning Missing logic #endif - irqrestore(flags); + leave_critical_section(flags); } #else # define stm32_dumpnvic(msg, irq) diff --git a/arch/arm/src/stm32f7/stm32_serial.c b/arch/arm/src/stm32f7/stm32_serial.c index fdc31dbc3ec..c5009919781 100644 --- a/arch/arm/src/stm32f7/stm32_serial.c +++ b/arch/arm/src/stm32f7/stm32_serial.c @@ -1964,20 +1964,20 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) #ifdef CONFIG_USART_BREAKS case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); uint32_t cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET); up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 | USART_CR2_LINEN); - irqrestore(flags); + leave_critical_section(flags); } break; case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */ { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); uint32_t cr1 = up_serialin(priv, STM32_USART_CR2_OFFSET); up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 & ~USART_CR2_LINEN); - irqrestore(flags); + leave_critical_section(flags); } break; #endif @@ -2051,7 +2051,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) * " " USART_ISR_ORE Overrun Error Detected */ - flags = irqsave(); + flags = enter_critical_section(); ie = priv->ie; if (enable) { @@ -2075,7 +2075,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) /* Then set the new interrupt state */ up_restoreusartint(priv, ie); - irqrestore(flags); + leave_critical_section(flags); } #endif @@ -2373,7 +2373,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) * USART_CR3_CTSIE USART_ISR_CTS CTS flag (not used) */ - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX data register is empty */ @@ -2408,7 +2408,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_restoreusartint(priv, priv->ie & ~USART_CR1_TXEIE); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2761,7 +2761,7 @@ void stm32_serial_dma_poll(void) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_USART1_RXDMA if (g_usart1priv.rxdma != NULL) @@ -2819,7 +2819,7 @@ void stm32_serial_dma_poll(void) } #endif - irqrestore(flags); + leave_critical_section(flags); } #endif diff --git a/arch/arm/src/str71x/str71x_irq.c b/arch/arm/src/str71x/str71x_irq.c index ac3c63de2c4..6871e84d2ca 100644 --- a/arch/arm/src/str71x/str71x_irq.c +++ b/arch/arm/src/str71x/str71x_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/st71x/st71x_irq.c * - * Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,8 +41,10 @@ #include #include + #include #include +#include #include "arm.h" #include "chip.h" @@ -50,24 +52,12 @@ #include "up_internal.h" #include "str71x.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ volatile uint32_t *current_regs; -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/arm/src/str71x/str71x_timerisr.c b/arch/arm/src/str71x/str71x_timerisr.c index a2f55ec9667..3604e6aa73c 100644 --- a/arch/arm/src/str71x/str71x_timerisr.c +++ b/arch/arm/src/str71x/str71x_timerisr.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/str71x/str71x_timerisr.c * - * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -42,6 +42,8 @@ #include #include #include + +#include #include #include @@ -170,7 +172,7 @@ void up_timer_initialize(void) /* Make sure that timer0 is disabled */ - flags = irqsave(); + flags = enter_critical_section(); putreg16(0x0000, STR71X_TIMER0_CR1); putreg16(0x0000, STR71X_TIMER0_CR2); putreg16(0x0000, STR71X_TIMER0_SR); @@ -211,5 +213,5 @@ void up_timer_initialize(void) /* And enable the timer interrupt */ up_enable_irq(STR71X_IRQ_SYSTIMER); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/arm/src/tiva/lm3s_ethernet.c b/arch/arm/src/tiva/lm3s_ethernet.c index 055b58659c6..5544e254421 100644 --- a/arch/arm/src/tiva/lm3s_ethernet.c +++ b/arch/arm/src/tiva/lm3s_ethernet.c @@ -329,7 +329,7 @@ static void tiva_ethreset(struct tiva_driver_s *priv) /* Make sure that clocking is enabled for the Ethernet (and PHY) peripherals */ - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(TIVA_SYSCON_RCGC2); regval |= (SYSCON_RCGC2_EMAC0 | SYSCON_RCGC2_EPHY0); putreg32(regval, TIVA_SYSCON_RCGC2); @@ -374,7 +374,7 @@ static void tiva_ethreset(struct tiva_driver_s *priv) regval = tiva_ethin(priv, TIVA_MAC_RIS_OFFSET); tiva_ethout(priv, TIVA_MAC_IACK_OFFSET, regval); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -480,7 +480,7 @@ static int tiva_transmit(struct tiva_driver_s *priv) /* Verify that the hardware is ready to send another packet */ - flags = irqsave(); + flags = enter_critical_section(); if ((tiva_ethin(priv, TIVA_MAC_TR_OFFSET) & MAC_TR_NEWTX) == 0) { /* Increment statistics */ @@ -550,7 +550,7 @@ static int tiva_transmit(struct tiva_driver_s *priv) ret = OK; } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -1110,7 +1110,7 @@ static int tiva_ifup(struct net_driver_s *dev) /* Enable and reset the Ethernet controller */ - flags = irqsave(); + flags = enter_critical_section(); tiva_ethreset(priv); /* Set the management clock divider register for access to the PHY @@ -1231,7 +1231,7 @@ static int tiva_ifup(struct net_driver_s *dev) (void)wd_start(priv->ld_txpoll, TIVA_WDDELAY, tiva_polltimer, 1, (uint32_t)priv); priv->ld_bifup = true; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -1264,7 +1264,7 @@ static int tiva_ifdown(struct net_driver_s *dev) /* Cancel the TX poll timer and TX timeout timers */ - flags = irqsave(); + flags = enter_critical_section(); wd_cancel(priv->ld_txpoll); wd_cancel(priv->ld_txtimeout); @@ -1314,7 +1314,7 @@ static int tiva_ifdown(struct net_driver_s *dev) /* The interface is now DOWN */ priv->ld_bifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -1350,7 +1350,7 @@ static int tiva_txavail(struct net_driver_s *dev) * will occur at that time. */ - flags = irqsave(); + flags = enter_critical_section(); if (priv->ld_bifup && (tiva_ethin(priv, TIVA_MAC_TR_OFFSET) & MAC_TR_NEWTX) == 0) { /* If the interface is up and we can use the Tx FIFO, then poll uIP @@ -1360,7 +1360,7 @@ static int tiva_txavail(struct net_driver_s *dev) (void)devif_poll(&priv->ld_dev, tiva_txpoll); } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/tiva/tiva_adclib.c b/arch/arm/src/tiva/tiva_adclib.c index 5487a51dba0..64fb93552d2 100644 --- a/arch/arm/src/tiva/tiva_adclib.c +++ b/arch/arm/src/tiva/tiva_adclib.c @@ -49,11 +49,10 @@ /**************************************************************************** * Included Files ****************************************************************************/ -#include -#include + +#include #include - #include #include #include @@ -61,6 +60,9 @@ #include #include +#include +#include +#include #include #include "up_arch.h" @@ -773,7 +775,7 @@ void tiva_adc_sse_int_enable(uint8_t adc, uint8_t sse, bool state) uintptr_t imreg = TIVA_ADC_IM(adc); int irq = tiva_adc_getirq(adc, sse); - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); tiva_adc_sse_clear_int(adc, sse); @@ -788,7 +790,7 @@ void tiva_adc_sse_int_enable(uint8_t adc, uint8_t sse, bool state) } up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/tiva/tiva_dumpgpio.c b/arch/arm/src/tiva/tiva_dumpgpio.c index 334f9ad2ebb..89ae3a462b2 100644 --- a/arch/arm/src/tiva/tiva_dumpgpio.c +++ b/arch/arm/src/tiva/tiva_dumpgpio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/tiva/tiva_dumpgpio.c * - * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2010, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "up_arch.h" @@ -50,10 +51,6 @@ #include "chip.h" #include "tiva_gpio.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Private Types ****************************************************************************/ @@ -157,7 +154,7 @@ int tiva_dumpgpio(uint32_t pinset, const char *msg) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); #ifdef TIVA_SYSCON_RCGCGPIO rcgcgpio = getreg32(TIVA_SYSCON_RCGCGPIO); enabled = ((rcgcgpio & SYSCON_RCGCGPIO(port)) != 0); @@ -193,7 +190,7 @@ int tiva_dumpgpio(uint32_t pinset, const char *msg) getreg32(base + TIVA_GPIO_SLR_OFFSET)); } - irqrestore(flags); + leave_critical_section(flags); #endif /* CONFIG_DEBUG */ return OK; diff --git a/arch/arm/src/tiva/tiva_gpio.c b/arch/arm/src/tiva/tiva_gpio.c index 4291d0b67a6..1ca011909a6 100644 --- a/arch/arm/src/tiva/tiva_gpio.c +++ b/arch/arm/src/tiva/tiva_gpio.c @@ -45,7 +45,7 @@ #include #include -#include +#include #include "up_arch.h" #include "tiva_enablepwr.h" @@ -822,7 +822,7 @@ int tiva_configgpio(uint32_t pinset) /* The following requires exclusive access to the GPIO registers */ - flags = irqsave(); + flags = enter_critical_section(); /* Enable power and clocking for this GPIO peripheral. * @@ -873,7 +873,7 @@ int tiva_configgpio(uint32_t pinset) } #endif - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/tiva/tiva_gpioirq.c b/arch/arm/src/tiva/tiva_gpioirq.c index 70b1d03b963..33b5fa0e3a6 100644 --- a/arch/arm/src/tiva/tiva_gpioirq.c +++ b/arch/arm/src/tiva/tiva_gpioirq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/tiva/tiva_gpioirq.c * - * Copyright (C) 2009-2010, 2012, 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2010, 2012, 2014-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -46,7 +46,6 @@ #include #include -#include #include #include "chip.h" @@ -321,11 +320,11 @@ static int tiva_gpioporthandler(uint8_t port, void *context) static int tiva_gpioahandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTA >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -334,11 +333,11 @@ static int tiva_gpioahandler(int irq, FAR void *context) static int tiva_gpiobhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTB >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -347,11 +346,11 @@ static int tiva_gpiobhandler(int irq, FAR void *context) static int tiva_gpiochandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTC >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -360,11 +359,11 @@ static int tiva_gpiochandler(int irq, FAR void *context) static int tiva_gpiodhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTD >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -373,11 +372,11 @@ static int tiva_gpiodhandler(int irq, FAR void *context) static int tiva_gpioehandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTE >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -386,11 +385,11 @@ static int tiva_gpioehandler(int irq, FAR void *context) static int tiva_gpiofhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTF >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -399,11 +398,11 @@ static int tiva_gpiofhandler(int irq, FAR void *context) static int tiva_gpioghandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTG >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -412,11 +411,11 @@ static int tiva_gpioghandler(int irq, FAR void *context) static int tiva_gpiohhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTH >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -425,11 +424,11 @@ static int tiva_gpiohhandler(int irq, FAR void *context) static int tiva_gpiojhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTJ >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -438,11 +437,11 @@ static int tiva_gpiojhandler(int irq, FAR void *context) static int tiva_gpiokhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTK >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -451,11 +450,11 @@ static int tiva_gpiokhandler(int irq, FAR void *context) static int tiva_gpiolhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTL >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -464,11 +463,11 @@ static int tiva_gpiolhandler(int irq, FAR void *context) static int tiva_gpiomhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTM >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -477,11 +476,11 @@ static int tiva_gpiomhandler(int irq, FAR void *context) static int tiva_gpionhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTN >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -490,11 +489,11 @@ static int tiva_gpionhandler(int irq, FAR void *context) static int tiva_gpiophandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTP >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -503,11 +502,11 @@ static int tiva_gpiophandler(int irq, FAR void *context) static int tiva_gpioqhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTQ >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -516,11 +515,11 @@ static int tiva_gpioqhandler(int irq, FAR void *context) static int tiva_gpiorhandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTR >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -529,11 +528,11 @@ static int tiva_gpiorhandler(int irq, FAR void *context) static int tiva_gpioshandler(int irq, FAR void *context) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(irq); int ret = tiva_gpioporthandler((GPIO_PORTS >> GPIO_PORT_SHIFT), context); up_enable_irq(irq); - irqrestore(flags); + leave_critical_section(flags); return ret; } #endif @@ -682,7 +681,7 @@ xcpt_t tiva_gpioirqattach(uint32_t pinset, xcpt_t isr) if (port < TIVA_NPORTS) { - flags = irqsave(); + flags = enter_critical_section(); /* store the older handler to return */ @@ -707,7 +706,7 @@ xcpt_t tiva_gpioirqattach(uint32_t pinset, xcpt_t isr) tiva_gpioirqenable(port, pin); } - irqrestore(flags); + leave_critical_section(flags); } return oldhandler; @@ -731,7 +730,7 @@ void tiva_gpioportirqattach(uint8_t port, xcpt_t isr) if (port < TIVA_NPORTS) { - flags = irqsave(); + flags = enter_critical_section(); /* If the new ISR is NULL, then the ISR is being detached. * In this case, disable the ISR and direct any interrupts @@ -751,7 +750,7 @@ void tiva_gpioportirqattach(uint8_t port, xcpt_t isr) tiva_gpioirqenable(port, 0xff); } - irqrestore(flags); + leave_critical_section(flags); } } diff --git a/arch/arm/src/tiva/tiva_i2c.c b/arch/arm/src/tiva/tiva_i2c.c index f97802fef05..28450836f84 100644 --- a/arch/arm/src/tiva/tiva_i2c.c +++ b/arch/arm/src/tiva/tiva_i2c.c @@ -744,7 +744,7 @@ static inline int tiva_i2c_sem_waitdone(struct tiva_i2c_priv_s *priv) irqstate_t flags; int ret; - flags = irqsave(); + flags = enter_critical_section(); /* Enable the master interrupt. The I2C master module generates an interrupt when * a transaction completes (either transmit or receive), when arbitration is lost, @@ -817,7 +817,7 @@ static inline int tiva_i2c_sem_waitdone(struct tiva_i2c_priv_s *priv) tiva_i2c_putreg(priv, TIVA_I2CM_IMR_OFFSET, 0); - irqrestore(flags); + leave_critical_section(flags); return ret; } #else @@ -2233,7 +2233,7 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port) * power-up hardware and configure GPIOs. */ - flags = irqsave(); + flags = enter_critical_section(); priv->refs++; if (priv->refs == 1) @@ -2248,7 +2248,7 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port) tiva_i2c_initialize(priv, 100000); } - irqrestore(flags); + leave_critical_section(flags); return (struct i2c_master_s *)priv; } @@ -2271,7 +2271,7 @@ int tiva_i2cbus_uninitialize(struct i2c_master_s *dev) /* Decrement reference count and check for underflow */ - flags = irqsave(); + flags = enter_critical_section(); /* Check if the reference count will decrement to zero */ @@ -2293,7 +2293,7 @@ int tiva_i2cbus_uninitialize(struct i2c_master_s *dev) priv->refs--; } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/arm/src/tiva/tiva_irq.c b/arch/arm/src/tiva/tiva_irq.c index 4cc712dc6a0..9a9b4c36f76 100644 --- a/arch/arm/src/tiva/tiva_irq.c +++ b/arch/arm/src/tiva/tiva_irq.c @@ -110,7 +110,7 @@ static void tiva_dumpnvic(const char *msg, int irq) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); lldbg("NVIC (%s, irq=%d):\n", msg, irq); lldbg(" INTCTRL: %08x VECTAB: %08x\n", getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); @@ -176,7 +176,7 @@ static void tiva_dumpnvic(const char *msg, int irq) #if NR_VECTORS > 127 # warning Missing output #endif - irqrestore(flags); + leave_critical_section(flags); } #else # define tiva_dumpnvic(msg, irq) diff --git a/arch/arm/src/tiva/tiva_serial.c b/arch/arm/src/tiva/tiva_serial.c index 3d8f844b6d0..70113b95ecd 100644 --- a/arch/arm/src/tiva/tiva_serial.c +++ b/arch/arm/src/tiva/tiva_serial.c @@ -1187,7 +1187,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX fifo is half emptied */ @@ -1216,7 +1216,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) priv->im &= ~UART_IM_TXIM; up_serialout(priv, TIVA_UART_IM_OFFSET, priv->im); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/tiva/tiva_ssi.c b/arch/arm/src/tiva/tiva_ssi.c index 5357ba385e8..6870b9eb374 100644 --- a/arch/arm/src/tiva/tiva_ssi.c +++ b/arch/arm/src/tiva/tiva_ssi.c @@ -49,7 +49,7 @@ #include #include -#include +#include #include #include "up_internal.h" @@ -881,7 +881,7 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer, */ #ifndef CONFIG_SSI_POLLWAIT - flags = irqsave(); + flags = enter_critical_section(); ssivdbg("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n", priv->ntxwords, priv->nrxwords, priv->nwords, ssi_getreg(priv, TIVA_SSI_SR_OFFSET)); @@ -907,7 +907,7 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer, */ ssivdbg("Waiting for transfer complete\n"); - irqrestore(flags); + leave_critical_section(flags); do { ssi_semtake(&priv->xfrsem); @@ -1511,7 +1511,7 @@ FAR struct spi_dev_s *tiva_ssibus_initialize(int port) /* Set up for the selected port */ - flags = irqsave(); + flags = enter_critical_section(); switch (port) { #ifdef CONFIG_TIVA_SSI0 @@ -1633,7 +1633,7 @@ FAR struct spi_dev_s *tiva_ssibus_initialize(int port) #endif /* CONFIG_TIVA_SSI1 */ default: - irqrestore(flags); + leave_critical_section(flags); return NULL; } @@ -1701,7 +1701,7 @@ FAR struct spi_dev_s *tiva_ssibus_initialize(int port) #endif #endif /* CONFIG_SSI_POLLWAIT */ - irqrestore(flags); + leave_critical_section(flags); return (FAR struct spi_dev_s *)priv; } diff --git a/arch/arm/src/tiva/tiva_timerlib.c b/arch/arm/src/tiva/tiva_timerlib.c index 2939071a8b6..fd6b5805db9 100644 --- a/arch/arm/src/tiva/tiva_timerlib.c +++ b/arch/arm/src/tiva/tiva_timerlib.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/tiva/tiva_timerlib.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -48,7 +48,6 @@ #include #include -#include #include #include "up_arch.h" @@ -474,12 +473,12 @@ static void tiva_modifyreg(struct tiva_gptmstate_s *priv, unsigned int offset, irqstate_t flags; uint32_t regval; - flags = irqsave(); - regval = tiva_getreg(priv, offset); + flags = enter_critical_section(); + regval = tiva_getreg(priv, offset); regval &= ~clrbits; regval |= setbits; tiva_putreg(priv, offset, regval); - irqrestore(flags); + leave_critical_section(flags); #else uintptr_t regaddr = priv->attr->base + offset; modifyreg32(regaddr, clrbits, setbits); @@ -2221,11 +2220,11 @@ uint32_t tiva_timer16_counter(TIMER_HANDLE handle, int tmndx) do { - flags = irqsave(); + flags = enter_critical_section(); checkv = getreg32(prescr); timerv = getreg32(timerr); prescv = getreg32(prescr); - irqrestore(flags); + leave_critical_section(flags); } while (checkv != prescv); @@ -2244,11 +2243,11 @@ uint32_t tiva_timer16_counter(TIMER_HANDLE handle, int tmndx) do { - flags = irqsave(); + flags = enter_critical_section(); checkv = getreg32(timerr); prescv = getreg32(prescr); timerv = getreg32(timerr); - irqrestore(flags); + leave_critical_section(flags); } while (checkv != timerv); @@ -2348,7 +2347,7 @@ void tiva_timer32_setinterval(TIMER_HANDLE handle, uint32_t interval) /* Make the following atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Set the new timeout interval */ @@ -2374,7 +2373,7 @@ void tiva_timer32_setinterval(TIMER_HANDLE handle, uint32_t interval) putreg32(priv->imr, imrr); } - irqrestore(flags); + leave_critical_section(flags); #ifdef CONFIG_TIVA_TIMER_REGDEBUG /* Generate low-level debug output outside of the critical section */ @@ -2486,7 +2485,7 @@ void tiva_timer16_setinterval(TIMER_HANDLE handle, uint16_t interval, int tmndx) /* Make the following atomic */ - flags = irqsave(); + flags = enter_critical_section(); /* Set the new timeout interval */ @@ -2521,7 +2520,7 @@ void tiva_timer16_setinterval(TIMER_HANDLE handle, uint16_t interval, int tmndx) putreg32(priv->imr, imrr); } - irqrestore(flags); + leave_critical_section(flags); #ifdef CONFIG_TIVA_TIMER_REGDEBUG /* Generate low-level debug output outside of the critical section */ @@ -2578,7 +2577,7 @@ uint32_t tiva_timer32_remaining(TIMER_HANDLE handle) * to do this is a critical section. */ - flags = irqsave(); + flags = enter_critical_section(); /* Get the time remaining until the timer expires (in clock ticks). * Since we have selected a count-up timer timer and the interval will @@ -2641,7 +2640,7 @@ uint32_t tiva_timer32_remaining(TIMER_HANDLE handle) } } - irqrestore(flags); + leave_critical_section(flags); return remaining; } #endif /* CONFIG_TIVA_TIMER32_PERIODIC */ @@ -2701,7 +2700,7 @@ void tiva_rtc_setalarm(TIMER_HANDLE handle, uint32_t delay) base = priv->attr->base; - flags = irqsave(); + flags = enter_critical_section(); /* Set the match register to the current value of the timer counter plus * the provided relative delay value. @@ -2726,7 +2725,7 @@ void tiva_rtc_setalarm(TIMER_HANDLE handle, uint32_t delay) /* Enable interrupts as necessary */ putreg32(priv->imr, base + TIVA_TIMER_IMR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); #ifdef CONFIG_TIVA_TIMER_REGDEBUG /* Generate low-level debug output outside of the critical section */ @@ -2805,7 +2804,7 @@ void tiva_timer32_relmatch(TIMER_HANDLE handle, uint32_t relmatch) */ base = priv->attr->base; - flags = irqsave(); + flags = enter_critical_section(); /* Set the match register to the current value of the timer counter plus * the provided relative match value. @@ -2830,7 +2829,7 @@ void tiva_timer32_relmatch(TIMER_HANDLE handle, uint32_t relmatch) /* Enable interrupts as necessary */ putreg32(priv->imr, base + TIVA_TIMER_IMR_OFFSET); - irqrestore(flags); + leave_critical_section(flags); #ifdef CONFIG_TIVA_TIMER_REGDEBUG /* Generate low-level debug output outside of the critical section */ @@ -2984,7 +2983,7 @@ void tiva_timer16_relmatch(TIMER_HANDLE handle, uint32_t relmatch, int tmndx) * minimum. */ - flags = irqsave(); + flags = enter_critical_section(); timerv = getreg32(timerr) & 0xffff; prescv = getreg32(prescr) & 0xff; @@ -3032,7 +3031,7 @@ void tiva_timer16_relmatch(TIMER_HANDLE handle, uint32_t relmatch, int tmndx) /* Enable interrupts as necessary */ putreg32(priv->imr, imr); - irqrestore(flags); + leave_critical_section(flags); #ifdef CONFIG_TIVA_TIMER_REGDEBUG /* Generate low-level debug output outside of the critical section */ diff --git a/arch/arm/src/tiva/tiva_timerlow32.c b/arch/arm/src/tiva/tiva_timerlow32.c index 64a9ebb1e0b..ac3ac065f53 100644 --- a/arch/arm/src/tiva/tiva_timerlow32.c +++ b/arch/arm/src/tiva/tiva_timerlow32.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/tiva/tiva_timerlow32.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -472,7 +473,7 @@ static tccb_t tiva_sethandler(struct timer_lowerhalf_s *lower, irqstate_t flags; tccb_t oldhandler; - flags = irqsave(); + flags = enter_critical_section(); DEBUGASSERT(priv); timvdbg("Entry: handler=%p\n", handler); @@ -485,7 +486,7 @@ static tccb_t tiva_sethandler(struct timer_lowerhalf_s *lower, priv->handler = handler; - irqrestore(flags); + leave_critical_section(flags); return oldhandler; } diff --git a/arch/arm/src/tiva/tm4c_ethernet.c b/arch/arm/src/tiva/tm4c_ethernet.c index a407f21573c..d8e73bec3a3 100644 --- a/arch/arm/src/tiva/tm4c_ethernet.c +++ b/arch/arm/src/tiva/tm4c_ethernet.c @@ -2545,7 +2545,7 @@ static int tiva_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(TIVA_IRQ_ETHCON); /* Cancel the TX poll timer and TX timeout timers */ @@ -2563,7 +2563,7 @@ static int tiva_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2672,12 +2672,12 @@ static int tiva_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Perform the out-of-cycle poll now */ tiva_txavail_process(priv); - irqrestore(flags); + leave_critical_section(flags); #endif return OK; @@ -4426,7 +4426,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable) * following operations are atomic. */ - flags = irqsave(); + flags = enter_critical_section(); /* Get the old interrupt handler and save the new one */ @@ -4446,7 +4446,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable) /* Return the old handler (so that it can be restored) */ - irqrestore(flags); + leave_critical_section(flags); return oldhandler; } #endif /* CONFIG_TIVA_PHY_INTERRUPTS */ diff --git a/arch/arm/src/tms570/tms570_gio.c b/arch/arm/src/tms570/tms570_gio.c index 1f2a372fef6..159ee05e4fa 100644 --- a/arch/arm/src/tms570/tms570_gio.c +++ b/arch/arm/src/tms570/tms570_gio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/tms570/tms570_gio.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,6 +44,7 @@ #include #include +#include #include #include @@ -129,7 +130,7 @@ int tms570_configgio(gio_pinset_t cfgset) /* Disable interrupts to prohibit re-entrance. */ - flags = irqsave(); + flags = enter_critical_section(); /* Force the pin to be an input for now */ @@ -227,7 +228,7 @@ int tms570_configgio(gio_pinset_t cfgset) putreg32(regval, base + TMS570_GIO_DIR_OFFSET); } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -305,7 +306,7 @@ int tms570_dumpgio(uint32_t pinset, const char *msg) /* The following requires exclusive access to the GIO registers */ - flags = irqsave(); + flags = enter_critical_section(); /* Show global GIO registers */ @@ -324,7 +325,7 @@ int tms570_dumpgio(uint32_t pinset, const char *msg) lldbg(" PULDIS: %08x PSL: %08x\n", getreg32(base + TMS570_GIO_PULDIS_OFFSET), getreg32(base + TMS570_GIO_PSL_OFFSET)); - irqrestore(flags); + leave_critical_section(flags); return OK; } #endif diff --git a/arch/arm/src/tms570/tms570_gioirq.c b/arch/arm/src/tms570/tms570_gioirq.c index c20300e0b60..6eca48e6293 100644 --- a/arch/arm/src/tms570/tms570_gioirq.c +++ b/arch/arm/src/tms570/tms570_gioirq.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -143,7 +143,7 @@ void tms570_gioirq(gio_pinset_t pinset) if ((pinset & GIO_MODE_MASK) == GIO_INPUT && port < TMS570_NIRQPORTS) { - flags = irqsave(); + flags = enter_critical_section(); switch (pinset & GIO_INT_MASK) { case GIO_INT_NONE: @@ -193,7 +193,7 @@ void tms570_gioirq(gio_pinset_t pinset) break; } - irqrestore(flags); + leave_critical_section(flags); } } diff --git a/arch/arm/src/tms570/tms570_irq.c b/arch/arm/src/tms570/tms570_irq.c index af617894ae7..cd7b1552381 100644 --- a/arch/arm/src/tms570/tms570_irq.c +++ b/arch/arm/src/tms570/tms570_irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/tms570/tms570_irq.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -56,10 +56,6 @@ #include "tms570_esm.h" #include "tms570_irq.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ diff --git a/arch/arm/src/tms570/tms570_lowputc.c b/arch/arm/src/tms570/tms570_lowputc.c index 5ba829ff147..c5d21319e60 100644 --- a/arch/arm/src/tms570/tms570_lowputc.c +++ b/arch/arm/src/tms570/tms570_lowputc.c @@ -48,7 +48,7 @@ #include #include -#include +#include #include #include "up_internal.h" @@ -176,18 +176,18 @@ void up_lowputc(char ch) * atomic. */ - flags = irqsave(); + flags = enter_critical_section(); if ((getreg32(TMS570_CONSOLE_BASE + TMS570_SCI_FLR_OFFSET) & SCI_FLR_TXRDY) != 0) { /* Send the character */ putreg32((uint32_t)ch, TMS570_CONSOLE_BASE + TMS570_SCI_TD_OFFSET); - irqrestore(flags); + leave_critical_section(flags); return; } - irqrestore(flags); + leave_critical_section(flags); } #endif } diff --git a/arch/arm/src/tms570/tms570_serial.c b/arch/arm/src/tms570/tms570_serial.c index b4850ae1e4a..3f638edc357 100644 --- a/arch/arm/src/tms570/tms570_serial.c +++ b/arch/arm/src/tms570/tms570_serial.c @@ -307,7 +307,7 @@ static void tms570_disableallints(struct tms570_dev_s *priv, uint32_t *ints) /* The following must be atomic */ - flags = irqsave(); + flags = enter_critical_section(); if (ints) { /* Return the current enable bitsopop9 */ @@ -318,7 +318,7 @@ static void tms570_disableallints(struct tms570_dev_s *priv, uint32_t *ints) /* Disable all interrupts */ tms570_serialout(priv, TMS570_SCI_CLEARINT_OFFSET, SCI_INT_ALLINTS); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -813,7 +813,7 @@ static void tms570_txint(struct uart_dev_s *dev, bool enable) struct tms570_dev_s *priv = (struct tms570_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX holding register register @@ -837,7 +837,7 @@ static void tms570_txint(struct uart_dev_s *dev, bool enable) tms570_serialout(priv, TMS570_SCI_CLEARINT_OFFSET, SCI_INT_TX); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/avr/src/at32uc3/at32uc3_gpioirq.c b/arch/avr/src/at32uc3/at32uc3_gpioirq.c index f03b8f789f5..231af1026d9 100644 --- a/arch/avr/src/at32uc3/at32uc3_gpioirq.c +++ b/arch/avr/src/at32uc3/at32uc3_gpioirq.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include "up_arch.h" #include "irq/irq.h" @@ -337,7 +337,7 @@ int gpio_irqattach(int irq, xcpt_t newisr, xcpt_t *oldisr) * to the unexpected interrupt handler. */ - flags = irqsave(); + flags = enter_critical_section(); if (newisr == NULL) { gpio_irqdisable(irq); @@ -354,7 +354,7 @@ int gpio_irqattach(int irq, xcpt_t newisr, xcpt_t *oldisr) /* Then save the new ISR in the table. */ g_gpiohandler[irq] = newisr; - irqrestore(flags); + leave_critical_section(flags); ret = OK; } return ret; diff --git a/arch/avr/src/at32uc3/at32uc3_lowconsole.c b/arch/avr/src/at32uc3/at32uc3_lowconsole.c index e3a00edde78..acf6694b113 100644 --- a/arch/avr/src/at32uc3/at32uc3_lowconsole.c +++ b/arch/avr/src/at32uc3/at32uc3_lowconsole.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -205,9 +205,9 @@ void usart_reset(uintptr_t usart_base) /* Disable all USART interrupts */ - flags = irqsave(); + flags = enter_critical_section(); usart_putreg(usart_base, AVR32_USART_IDR_OFFSET, 0xffffffff); - irqrestore(flags); + leave_critical_section(flags); /* Reset mode and other registers */ diff --git a/arch/avr/src/at32uc3/at32uc3_serial.c b/arch/avr/src/at32uc3/at32uc3_serial.c index db5ce224957..c597e1247fa 100644 --- a/arch/avr/src/at32uc3/at32uc3_serial.c +++ b/arch/avr/src/at32uc3/at32uc3_serial.c @@ -671,7 +671,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX data register is empty */ @@ -692,7 +692,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_serialout(priv, AVR32_USART_IDR_OFFSET, USART_INT_TXRDY); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/avr/src/at90usb/at90usb_serial.c b/arch/avr/src/at90usb/at90usb_serial.c index 0ead03b0f04..5eaa6a5efa5 100644 --- a/arch/avr/src/at90usb/at90usb_serial.c +++ b/arch/avr/src/at90usb/at90usb_serial.c @@ -457,7 +457,7 @@ static void usart1_txint(struct uart_dev_s *dev, bool enable) * written. */ - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX data register is empty */ @@ -480,7 +480,7 @@ static void usart1_txint(struct uart_dev_s *dev, bool enable) UCSR1B &= ~((1 << UDRIE1) | (1 << TXCIE1)); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/avr/src/at90usb/at90usb_usbdev.c b/arch/avr/src/at90usb/at90usb_usbdev.c index 278d8cf91eb..7bfe6639b4c 100644 --- a/arch/avr/src/at90usb/at90usb_usbdev.c +++ b/arch/avr/src/at90usb/at90usb_usbdev.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/at90usb/at90usb_usbdev.c * - * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include #include @@ -2255,14 +2256,14 @@ static int avr_epdisable(FAR struct usbdev_ep_s *ep) #endif usbtrace(TRACE_EPDISABLE, privep->ep.eplog); - flags = irqsave(); + flags = enter_critical_section(); /* Disable the endpoint */ avr_epreset(privep, -ESHUTDOWN); g_usbdev.stalled = true; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2406,7 +2407,7 @@ static int avr_epsubmit(FAR struct usbdev_ep_s *ep, /* Disable Interrupts */ - flags = irqsave(); + flags = enter_critical_section(); /* If we are stalled, then drop all requests on the floor */ @@ -2465,7 +2466,7 @@ static int avr_epsubmit(FAR struct usbdev_ep_s *ep, } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -2497,9 +2498,9 @@ static int avr_epcancel(FAR struct usbdev_ep_s *ep, * just remove it from the list but ... all other implementations cancel all * requests ... */ - flags = irqsave(); + flags = enter_critical_section(); avr_cancelrequests(privep, -ESHUTDOWN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2517,7 +2518,7 @@ static int avr_epstall(FAR struct usbdev_ep_s *ep, bool resume) /* STALL or RESUME the endpoint */ - flags = irqsave(); + flags = enter_critical_section(); if (resume) { /* Clear stall and reset the data toggle */ @@ -2533,7 +2534,7 @@ static int avr_epstall(FAR struct usbdev_ep_s *ep, bool resume) UECONX |= (1 << STALLRQ); g_usbdev.stalled = true; } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2602,7 +2603,7 @@ static FAR struct usbdev_ep_s *avr_allocep(FAR struct usbdev_s *dev, { /* Yes.. now see if any of the request endpoints are available */ - flags = irqsave(); + flags = enter_critical_section(); /* Select the lowest bit in the set of matching, available endpoints */ @@ -2636,14 +2637,14 @@ static FAR struct usbdev_ep_s *avr_allocep(FAR struct usbdev_s *dev, /* And return the pointer to the standard endpoint structure */ - irqrestore(flags); + leave_critical_section(flags); return &privep->ep; } } /* Shouldn't get here */ - irqrestore(flags); + leave_critical_section(flags); } usbtrace(TRACE_DEVERROR(AVR_TRACEERR_NOEP), (uint16_t) epno); @@ -2668,12 +2669,12 @@ static void avr_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) /* Mark the endpoint as available */ - flags = irqsave(); + flags = enter_critical_section(); epmask = (1 << privep->ep.eplog); g_usbdev.epavail |= epmask; g_usbdev.epinset &= ~epmask; g_usbdev.epoutset &= ~epmask; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2706,9 +2707,9 @@ static int avr_wakeup(struct usbdev_s *dev) usbtrace(TRACE_DEVWAKEUP, 0); - flags = irqsave(); + flags = enter_critical_section(); avr_genwakeup(); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2841,7 +2842,7 @@ void up_usbuninitialize(void) /* Disconnect device */ - flags = irqsave(); + flags = enter_critical_section(); avr_pullup(&g_usbdev.usbdev, false); g_usbdev.usbdev.speed = USB_SPEED_UNKNOWN; @@ -2853,7 +2854,7 @@ void up_usbuninitialize(void) /* Shutdown the USB controller hardware */ avr_usbshutdown(); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -2962,8 +2963,8 @@ void avr_pollvbus(void) { irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); avr_genvbus(); - irqrestore(flags); + leave_critical_section(flags); } #endif \ No newline at end of file diff --git a/arch/avr/src/atmega/atmega_serial.c b/arch/avr/src/atmega/atmega_serial.c index a9ccf5e176f..2691467b975 100644 --- a/arch/avr/src/atmega/atmega_serial.c +++ b/arch/avr/src/atmega/atmega_serial.c @@ -770,7 +770,7 @@ static void usart0_txint(struct uart_dev_s *dev, bool enable) * written. */ - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX data register is empty */ @@ -793,7 +793,7 @@ static void usart0_txint(struct uart_dev_s *dev, bool enable) UCSR0B &= ~((1 << UDRIE0) | (1 << TXCIE0)); } - irqrestore(flags); + leave_critical_section(flags); } #endif @@ -812,7 +812,7 @@ static void usart1_txint(struct uart_dev_s *dev, bool enable) * written. */ - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX data register is empty */ @@ -835,7 +835,7 @@ static void usart1_txint(struct uart_dev_s *dev, bool enable) UCSR1B &= ~((1 << UDRIE1) | (1 << TXCIE1)); } - irqrestore(flags); + leave_critical_section(flags); } #endif diff --git a/arch/avr/src/avr/up_irq.c b/arch/avr/src/avr/up_irq.c index 3830bc01b40..abe6f360c42 100644 --- a/arch/avr/src/avr/up_irq.c +++ b/arch/avr/src/avr/up_irq.c @@ -51,28 +51,12 @@ #include "up_arch.h" #include "up_internal.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ volatile uint8_t *current_regs; -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/avr/src/avr/up_schedulesigaction.c b/arch/avr/src/avr/up_schedulesigaction.c index 14ee734d3b5..bdc576c989b 100644 --- a/arch/avr/src/avr/up_schedulesigaction.c +++ b/arch/avr/src/avr/up_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/avr/src/avr/up_schedulesigaction.c * - * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include @@ -52,18 +53,6 @@ #ifndef CONFIG_DISABLE_SIGNALS -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -109,7 +98,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -220,7 +209,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/avr/src/avr/up_spi.c b/arch/avr/src/avr/up_spi.c index bcb7d835b69..94de828c158 100644 --- a/arch/avr/src/avr/up_spi.c +++ b/arch/avr/src/avr/up_spi.c @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -139,10 +140,6 @@ static struct avr_spidev_s g_spidev = .spidev = { &g_spiops }, }; -/**************************************************************************** - * Public Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -475,7 +472,7 @@ FAR struct spi_dev_s *avr_spibus_initialize(int port) /* Make sure that clocks are provided to the SPI module */ - flags = irqsave(); + flags = enter_critical_section(); power_spi_enable(); /* Set MOSI and SCK as outputs, all others are inputs (default on reset): @@ -519,7 +516,7 @@ FAR struct spi_dev_s *avr_spibus_initialize(int port) sem_init(&priv->exclsem, 0, 1); - irqrestore(flags); + leave_critical_section(flags); return &priv->spidev; } #endif /* CONFIG_AVR_SPI */ diff --git a/arch/avr/src/avr32/up_schedulesigaction.c b/arch/avr/src/avr32/up_schedulesigaction.c index e87b80699a6..5c1fd5161ee 100644 --- a/arch/avr/src/avr32/up_schedulesigaction.c +++ b/arch/avr/src/avr32/up_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/avr/src/avr32/up_schedulesigaction.c * - * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include @@ -52,18 +53,6 @@ #ifndef CONFIG_DISABLE_SIGNALS -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -109,7 +98,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -198,7 +187,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/avr/src/common/up_modifyreg16.c b/arch/avr/src/common/up_modifyreg16.c index 1bca1410e4d..4e97cc95fcc 100644 --- a/arch/avr/src/common/up_modifyreg16.c +++ b/arch/avr/src/common/up_modifyreg16.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,11 +76,11 @@ void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits) irqstate_t flags; uint16_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg16(addr); regval &= ~clearbits; regval |= setbits; putreg16(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/avr/src/common/up_modifyreg32.c b/arch/avr/src/common/up_modifyreg32.c index 40aaaad09f7..b6fc00fbb61 100644 --- a/arch/avr/src/common/up_modifyreg32.c +++ b/arch/avr/src/common/up_modifyreg32.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,11 +76,11 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(addr); regval &= ~clearbits; regval |= setbits; putreg32(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/avr/src/common/up_modifyreg8.c b/arch/avr/src/common/up_modifyreg8.c index 227bd7904a2..d954b2ca65d 100644 --- a/arch/avr/src/common/up_modifyreg8.c +++ b/arch/avr/src/common/up_modifyreg8.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,11 +76,11 @@ void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits) irqstate_t flags; uint8_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg8(addr); regval &= ~clearbits; regval |= setbits; putreg8(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/hc/src/common/up_modifyreg16.c b/arch/hc/src/common/up_modifyreg16.c index 395336a5d57..443eedf5595 100644 --- a/arch/hc/src/common/up_modifyreg16.c +++ b/arch/hc/src/common/up_modifyreg16.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits) irqstate_t flags; uint16_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg16(addr); regval &= ~clearbits; regval |= setbits; putreg16(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/hc/src/common/up_modifyreg32.c b/arch/hc/src/common/up_modifyreg32.c index bbced2a5bf4..0768e78c740 100644 --- a/arch/hc/src/common/up_modifyreg32.c +++ b/arch/hc/src/common/up_modifyreg32.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(addr); regval &= ~clearbits; regval |= setbits; putreg32(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/hc/src/common/up_modifyreg8.c b/arch/hc/src/common/up_modifyreg8.c index 79c2256e3ea..6d37541a7c0 100644 --- a/arch/hc/src/common/up_modifyreg8.c +++ b/arch/hc/src/common/up_modifyreg8.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits) irqstate_t flags; uint8_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg8(addr); regval &= ~clearbits; regval |= setbits; putreg8(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/hc/src/m9s12/m9s12_dumpgpio.c b/arch/hc/src/m9s12/m9s12_dumpgpio.c index c4fc20ba9e3..db4261256ba 100644 --- a/arch/hc/src/m9s12/m9s12_dumpgpio.c +++ b/arch/hc/src/m9s12/m9s12_dumpgpio.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include "up_arch.h" #include "m9s12.h" @@ -266,7 +266,7 @@ static inline void hcs12_mebidump(uint8_t portndx) int hcs12_dumpgpio(uint16_t pinset, const char *msg) { uint8_t portndx = HCS12_PORTNDX(pinset); - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); lldbg("pinset: %08x -- %s\n", pinset, msg); @@ -279,7 +279,7 @@ int hcs12_dumpgpio(uint16_t pinset, const char *msg) hcs12_mebidump(portndx); } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/hc/src/m9s12/m9s12_ethernet.c b/arch/hc/src/m9s12/m9s12_ethernet.c index 92d7ae1295b..0f02c88aedd 100644 --- a/arch/hc/src/m9s12/m9s12_ethernet.c +++ b/arch/hc/src/m9s12/m9s12_ethernet.c @@ -588,7 +588,7 @@ static int emac_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(CONFIG_HCS12_IRQ); /* Cancel the TX poll timer and TX timeout timers */ @@ -604,7 +604,7 @@ static int emac_ifdown(struct net_driver_s *dev) /* Mark the device "down" */ priv->d_bifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -636,7 +636,7 @@ static int emac_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Ignore the notification if the interface is not yet up */ @@ -649,7 +649,7 @@ static int emac_txavail(struct net_driver_s *dev) (void)devif_poll(&priv->d_dev, emac_txpoll); } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/hc/src/m9s12/m9s12_gpio.c b/arch/hc/src/m9s12/m9s12_gpio.c index f4de391d503..7d43f0a3d8a 100644 --- a/arch/hc/src/m9s12/m9s12_gpio.c +++ b/arch/hc/src/m9s12/m9s12_gpio.c @@ -1,8 +1,7 @@ /**************************************************************************** * arch/arm/src/m9s12/m9s12_gpio.c - * arch/arm/src/chip/m9s12_gpio.c * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +44,7 @@ #include #include +#include #include #include "up_arch.h" @@ -445,7 +445,7 @@ void hcs12_gpiowrite(uint16_t pinset, bool value) { uint8_t portndx = HCS12_PORTNDX(pinset); uint8_t pin = HCS12_PIN(pinset); - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); DEBUGASSERT((pinset & GPIO_DIRECTION) == GPIO_OUTPUT); if (HCS12_PIMPORT(pinset)) @@ -456,7 +456,8 @@ void hcs12_gpiowrite(uint16_t pinset, bool value) { mebi_gpiowrite(portndx, pin, value); } - irqrestore(flags); + + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/hc/src/m9s12/m9s12_gpioirq.c b/arch/hc/src/m9s12/m9s12_gpioirq.c index cf50615682b..4dae0551244 100644 --- a/arch/hc/src/m9s12/m9s12_gpioirq.c +++ b/arch/hc/src/m9s12/m9s12_gpioirq.c @@ -45,7 +45,6 @@ #include #include -#include #include "up_arch.h" #include "m9s12.h" @@ -259,11 +258,11 @@ void hcs12_gpioirqenable(int irq) if (hcs12_mapirq(irq, ®addr, &pin) == OK) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); uint8_t regval = getreg8(regaddr); regval |= (1 << pin); putreg8(regval, regaddr); - irqrestore(flags); + leave_critical_section(flags); } } #endif /* CONFIG_GPIO_IRQ */ @@ -284,11 +283,11 @@ void hcs12_gpioirqdisable(int irq) if (hcs12_mapirq(irq, ®addr, &pin) == OK) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); uint8_t regval = getreg8(regaddr); regval &= ~(1 << pin); putreg8(regval, regaddr); - irqrestore(flags); + leave_critical_section(flags); } } #endif /* CONFIG_GPIO_IRQ */ diff --git a/arch/hc/src/m9s12/m9s12_irq.c b/arch/hc/src/m9s12/m9s12_irq.c index 13495038655..b1c99697974 100644 --- a/arch/hc/src/m9s12/m9s12_irq.c +++ b/arch/hc/src/m9s12/m9s12_irq.c @@ -51,24 +51,12 @@ #include "up_internal.h" #include "m9s12.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ volatile uint8_t *current_regs; -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/hc/src/m9s12/m9s12_serial.c b/arch/hc/src/m9s12/m9s12_serial.c index 7dbfa6a0c66..325a8e290ba 100644 --- a/arch/hc/src/m9s12/m9s12_serial.c +++ b/arch/hc/src/m9s12/m9s12_serial.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/hc/src/m9s12/m9s12_serial.c * - * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011-2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,6 +38,7 @@ ****************************************************************************/ #include +#include #include "up_internal.h" #include "m9s12_serial.h" @@ -672,7 +673,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) struct up_dev_s *priv = (struct up_dev_s*)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (enable) { /* Set to receive an interrupt when the TX data register is empty */ @@ -693,7 +694,8 @@ static void up_txint(struct uart_dev_s *dev, bool enable) priv->im &= ~SCI_CR2_TIE; up_setsciint(priv); } - irqrestore(flags); + + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/mips/src/common/up_idle.c b/arch/mips/src/common/up_idle.c index 0962c5b107b..bee134392f8 100644 --- a/arch/mips/src/common/up_idle.c +++ b/arch/mips/src/common/up_idle.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/mips/src/common/up_idle.c * - * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,22 +38,11 @@ ****************************************************************************/ #include - +#include #include + #include "up_internal.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -99,8 +88,8 @@ void up_idle(void) */ #ifdef CONFIG_SCHED_WORKQUEUE - irqstate_t flags = irqsave(); - irqrestore(flags); + irqstate_t flags = enter_critical_section(); + leave_critical_section(flags); #endif #endif } diff --git a/arch/mips/src/common/up_modifyreg16.c b/arch/mips/src/common/up_modifyreg16.c index 2d657994703..6dfe1c2a49f 100644 --- a/arch/mips/src/common/up_modifyreg16.c +++ b/arch/mips/src/common/up_modifyreg16.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits) irqstate_t flags; uint16_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg16(addr); regval &= ~clearbits; regval |= setbits; putreg16(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/mips/src/common/up_modifyreg32.c b/arch/mips/src/common/up_modifyreg32.c index e5de12e5e9d..af680343dfd 100644 --- a/arch/mips/src/common/up_modifyreg32.c +++ b/arch/mips/src/common/up_modifyreg32.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32(addr); regval &= ~clearbits; regval |= setbits; putreg32(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/mips/src/common/up_modifyreg8.c b/arch/mips/src/common/up_modifyreg8.c index 53ed99f9c7b..7f63a580b80 100644 --- a/arch/mips/src/common/up_modifyreg8.c +++ b/arch/mips/src/common/up_modifyreg8.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits) irqstate_t flags; uint8_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg8(addr); regval &= ~clearbits; regval |= setbits; putreg8(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/mips/src/mips32/up_irq.c b/arch/mips/src/mips32/up_irq.c index b13ae6294e1..e06d1f0a942 100644 --- a/arch/mips/src/mips32/up_irq.c +++ b/arch/mips/src/mips32/up_irq.c @@ -43,18 +43,6 @@ #include #include -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/mips/src/mips32/up_schedulesigaction.c b/arch/mips/src/mips32/up_schedulesigaction.c index 78f2d9ff7d1..1a3049ff3f8 100644 --- a/arch/mips/src/mips32/up_schedulesigaction.c +++ b/arch/mips/src/mips32/up_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/mips/src/mips32/up_schedulesigaction.c * - * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include @@ -52,18 +53,6 @@ #ifndef CONFIG_DISABLE_SIGNALS -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -110,7 +99,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -213,7 +202,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/mips/src/pic32mx/pic32mx-ethernet.c b/arch/mips/src/pic32mx/pic32mx-ethernet.c index dca417a230d..4c9fe79cfa5 100644 --- a/arch/mips/src/pic32mx/pic32mx-ethernet.c +++ b/arch/mips/src/pic32mx/pic32mx-ethernet.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/pic32mx/pic32mx_ethernet.c * - * Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2014-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * This driver derives from the PIC32MX Ethernet Driver @@ -52,8 +52,8 @@ #include -#include #include +#include #include #include #include @@ -2223,7 +2223,7 @@ static int pic32mx_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupt */ - flags = irqsave(); + flags = enter_critical_section(); #if CONFIG_PIC32MX_NINTERFACES > 1 up_disable_irq(priv->pd_irqsrc); #else @@ -2239,7 +2239,7 @@ static int pic32mx_ifdown(struct net_driver_s *dev) pic32mx_ethreset(priv); priv->pd_ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2271,7 +2271,7 @@ static int pic32mx_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Ignore the notification if the interface is not yet up */ @@ -2289,7 +2289,7 @@ static int pic32mx_txavail(struct net_driver_s *dev) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3051,7 +3051,7 @@ static void pic32mx_ethreset(struct pic32mx_driver_s *priv) /* Reset the MAC */ - flags = irqsave(); + flags = enter_critical_section(); /* Ethernet Controller Initialization *************************************/ /* Disable Ethernet interrupts in the EVIC */ @@ -3111,7 +3111,7 @@ static void pic32mx_ethreset(struct pic32mx_driver_s *priv) up_udelay(50); pic32mx_putreg(0, PIC32MX_EMAC1_CFG1); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/mips/src/pic32mx/pic32mx-gpioirq.c b/arch/mips/src/pic32mx/pic32mx-gpioirq.c index f05f251d07d..ce96403da8c 100644 --- a/arch/mips/src/pic32mx/pic32mx-gpioirq.c +++ b/arch/mips/src/pic32mx/pic32mx-gpioirq.c @@ -214,7 +214,7 @@ xcpt_t pic32mx_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler) { /* Get the previously attached handler as the return value */ - flags = irqsave(); + flags = enter_critical_section(); oldhandler = g_cnisrs[cn]; /* Are we attaching or detaching? */ @@ -251,7 +251,7 @@ xcpt_t pic32mx_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler) /* Set the new handler (perhaps NULLifying the current handler) */ g_cnisrs[cn] = handler; - irqrestore(flags); + leave_critical_section(flags); } return oldhandler; diff --git a/arch/mips/src/pic32mx/pic32mx-serial.c b/arch/mips/src/pic32mx/pic32mx-serial.c index bb281e78dcf..52ec9c91de2 100644 --- a/arch/mips/src/pic32mx/pic32mx-serial.c +++ b/arch/mips/src/pic32mx/pic32mx-serial.c @@ -317,10 +317,10 @@ static void up_restoreuartint(struct uart_dev_s *dev, uint8_t im) /* Re-enable/re-disable interrupts corresponding to the state of bits in im */ - flags = irqsave(); + flags = enter_critical_section(); up_rxint(dev, RX_ENABLED(im)); up_txint(dev, TX_ENABLED(im)); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -332,13 +332,13 @@ static void up_disableuartint(struct uart_dev_s *dev, uint8_t *im) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (im) { *im = priv->im; } up_restoreuartint(dev, 0); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -691,7 +691,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) irqstate_t flags; uint8_t im; - flags = irqsave(); + flags = enter_critical_section(); im = priv->im; if (enable) { @@ -716,7 +716,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) DISABLE_RX(im); } priv->im = im; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -764,7 +764,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) irqstate_t flags; uint8_t im; - flags = irqsave(); + flags = enter_critical_section(); im = priv->im; if (enable) { @@ -790,7 +790,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) } priv->im = im; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/mips/src/pic32mx/pic32mx-spi.c b/arch/mips/src/pic32mx/pic32mx-spi.c index 8829cecb2df..44e79d6b484 100644 --- a/arch/mips/src/pic32mx/pic32mx-spi.c +++ b/arch/mips/src/pic32mx/pic32mx-spi.c @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -902,7 +903,7 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port) /* Disable SPI interrupts */ - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_PIC32MX_SPI_INTERRUPTS up_disable_irq(priv->eirq); up_disable_irq(priv->txirq); @@ -983,12 +984,12 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port) /* Enable interrupts at the interrupt controller */ - irqrestore(flags); + leave_critical_section(flags); return &priv->spidev; #ifdef CONFIG_PIC32MX_SPI_INTERRUPTS errout: - irqrestore(flags); + leave_critical_section(flags); return NULL; #endif } diff --git a/arch/mips/src/pic32mx/pic32mx-usbdev.c b/arch/mips/src/pic32mx/pic32mx-usbdev.c index 9117f70b264..00d9f240930 100644 --- a/arch/mips/src/pic32mx/pic32mx-usbdev.c +++ b/arch/mips/src/pic32mx/pic32mx-usbdev.c @@ -62,7 +62,7 @@ #include #include -#include +#include #include "up_arch.h" #include "pic32mx.h" @@ -826,9 +826,9 @@ static void pic32mx_reqcomplete(struct pic32mx_ep_s *privep, int16_t result) * request list. */ - flags = irqsave(); + flags = enter_critical_section(); privreq = pic32mx_remfirst(&privep->active); - irqrestore(flags); + leave_critical_section(flags); if (privreq) { @@ -2962,7 +2962,7 @@ static void pic32mx_resume(struct pic32mx_usbdev_s *priv) irqstate_t flags; uint16_t regval; - flags = irqsave(); + flags = enter_critical_section(); /* Start RESUME signaling */ @@ -3010,7 +3010,7 @@ static void pic32mx_resume(struct pic32mx_usbdev_s *priv) CLASS_RESUME(priv->driver, &priv->usbdev); } - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3027,7 +3027,7 @@ pic32mx_epreserve(struct pic32mx_usbdev_s *priv, uint8_t epset) irqstate_t flags; int epndx = 0; - flags = irqsave(); + flags = enter_critical_section(); epset &= priv->epavail; if (epset) { @@ -3052,7 +3052,7 @@ pic32mx_epreserve(struct pic32mx_usbdev_s *priv, uint8_t epset) } } - irqrestore(flags); + leave_critical_section(flags); return privep; } @@ -3063,9 +3063,9 @@ pic32mx_epreserve(struct pic32mx_usbdev_s *priv, uint8_t epset) static inline void pic32mx_epunreserve(struct pic32mx_usbdev_s *priv, struct pic32mx_ep_s *privep) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv->epavail |= PIC32MX_ENDP_BIT(USB_EPNO(privep->ep.eplog)); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -3290,7 +3290,7 @@ static int pic32mx_epdisable(struct usbdev_ep_s *ep) /* Cancel any ongoing activity */ - flags = irqsave(); + flags = enter_critical_section(); pic32mx_cancelrequests(privep, -ESHUTDOWN); /* Disable the endpoint */ @@ -3307,7 +3307,7 @@ static int pic32mx_epdisable(struct usbdev_ep_s *ep) *ptr++ = 0; } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3402,7 +3402,7 @@ static int pic32mx_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) #ifndef CONFIG_USBDEV_NOWRITEAHEAD privreq->inflight[1] = 0; #endif - flags = irqsave(); + flags = enter_critical_section(); /* Add the new request to the request queue for the OUT endpoint */ @@ -3446,7 +3446,7 @@ static int pic32mx_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) } } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -3469,9 +3469,9 @@ static int pic32mx_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req) usbtrace(TRACE_EPCANCEL, USB_EPNO(ep->eplog)); - flags = irqsave(); + flags = enter_critical_section(); pic32mx_cancelrequests(privep, -EAGAIN); - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3660,7 +3660,7 @@ static int pic32mx_epstall(struct usbdev_ep_s *ep, bool resume) /* STALL or RESUME the endpoint */ - flags = irqsave(); + flags = enter_critical_section(); /* Special case EP0. When we stall EP0 we have to stall both the IN and * OUT BDTs. @@ -3688,7 +3688,7 @@ static int pic32mx_epstall(struct usbdev_ep_s *ep, bool resume) ret = pic32mx_epbdtstall(ep, resume, USB_ISEPIN(ep->eplog)); } - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -4332,7 +4332,7 @@ void up_usbuninitialize(void) struct pic32mx_usbdev_s *priv = &g_usbdev; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); usbtrace(TRACE_DEVUNINIT, 0); /* Disable and detach the USB IRQs */ @@ -4349,7 +4349,7 @@ void up_usbuninitialize(void) /* Put the hardware in an inactive state */ pic32mx_hwshutdown(priv); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -4452,7 +4452,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) * the hardware back into its initial, unconnected state. */ - flags = irqsave(); + flags = enter_critical_section(); pic32mx_swreset(priv); pic32mx_hwreset(priv); @@ -4475,7 +4475,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Unhook the driver */ priv->driver = NULL; - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/mips/src/pic32mz/pic32mz-ethernet.c b/arch/mips/src/pic32mz/pic32mz-ethernet.c index 42b4bb66159..b2ed4daf9eb 100644 --- a/arch/mips/src/pic32mz/pic32mz-ethernet.c +++ b/arch/mips/src/pic32mz/pic32mz-ethernet.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/pic32mz/pic32mz_ethernet.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * This driver derives from the PIC32MZ Ethernet Driver @@ -52,8 +52,8 @@ #include -#include #include +#include #include #include #include @@ -2246,7 +2246,7 @@ static int pic32mz_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupt */ - flags = irqsave(); + flags = enter_critical_section(); #if CONFIG_PIC32MZ_NINTERFACES > 1 up_disable_irq(priv->pd_irqsrc); #else @@ -2262,7 +2262,7 @@ static int pic32mz_ifdown(struct net_driver_s *dev) pic32mz_ethreset(priv); priv->pd_ifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -2294,7 +2294,7 @@ static int pic32mz_txavail(struct net_driver_s *dev) * level processing. */ - flags = irqsave(); + flags = enter_critical_section(); /* Ignore the notification if the interface is not yet up */ @@ -2312,7 +2312,7 @@ static int pic32mz_txavail(struct net_driver_s *dev) } } - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -3074,7 +3074,7 @@ static void pic32mz_ethreset(struct pic32mz_driver_s *priv) /* Reset the MAC */ - flags = irqsave(); + flags = enter_critical_section(); /* Ethernet Controller Initialization *************************************/ /* Disable Ethernet interrupts in the EVIC */ @@ -3135,7 +3135,7 @@ static void pic32mz_ethreset(struct pic32mz_driver_s *priv) up_udelay(50); pic32mz_putreg(0, PIC32MZ_EMAC1_CFG1); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/mips/src/pic32mz/pic32mz-gpioirq.c b/arch/mips/src/pic32mz/pic32mz-gpioirq.c index 8d2411455d5..9b7f8c68083 100644 --- a/arch/mips/src/pic32mz/pic32mz-gpioirq.c +++ b/arch/mips/src/pic32mz/pic32mz-gpioirq.c @@ -414,7 +414,7 @@ xcpt_t pic32mz_gpioattach(pinset_t pinset, xcpt_t handler) { /* Get the previously attached handler as the return value */ - flags = irqsave(); + flags = enter_critical_section(); oldhandler = handlers->handler[pin]; /* Are we attaching or detaching? */ @@ -468,7 +468,7 @@ xcpt_t pic32mz_gpioattach(pinset_t pinset, xcpt_t handler) /* Set the new handler (perhaps NULLifying the current handler) */ handlers->handler[pin] = handler; - irqrestore(flags); + leave_critical_section(flags); } } diff --git a/arch/mips/src/pic32mz/pic32mz-serial.c b/arch/mips/src/pic32mz/pic32mz-serial.c index ef52ecbda9d..735b12eee82 100644 --- a/arch/mips/src/pic32mz/pic32mz-serial.c +++ b/arch/mips/src/pic32mz/pic32mz-serial.c @@ -586,10 +586,10 @@ static void up_restoreuartint(struct uart_dev_s *dev, uint8_t im) /* Re-enable/re-disable interrupts corresponding to the state of bits in im */ - flags = irqsave(); + flags = enter_critical_section(); up_rxint(dev, RX_ENABLED(im)); up_txint(dev, TX_ENABLED(im)); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -601,13 +601,13 @@ static void up_disableuartint(struct uart_dev_s *dev, uint8_t *im) struct up_dev_s *priv = (struct up_dev_s *)dev->priv; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); if (im) { *im = priv->im; } up_restoreuartint(dev, 0); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -999,7 +999,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) irqstate_t flags; uint8_t im; - flags = irqsave(); + flags = enter_critical_section(); im = priv->im; if (enable) { @@ -1024,7 +1024,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) DISABLE_RX(im); } priv->im = im; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -1072,7 +1072,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) irqstate_t flags; uint8_t im; - flags = irqsave(); + flags = enter_critical_section(); im = priv->im; if (enable) { @@ -1098,7 +1098,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) } priv->im = im; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/mips/src/pic32mz/pic32mz-spi.c b/arch/mips/src/pic32mz/pic32mz-spi.c index 2e874f07997..d2f83fb2927 100644 --- a/arch/mips/src/pic32mz/pic32mz-spi.c +++ b/arch/mips/src/pic32mz/pic32mz-spi.c @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -1280,7 +1281,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port) /* Disable SPI interrupts */ - flags = irqsave(); + flags = enter_critical_section(); #ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS up_disable_irq(priv->config->firq); up_disable_irq(priv->config->rxirq); @@ -1374,7 +1375,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port) /* Enable interrupts at the interrupt controller */ - irqrestore(flags); + leave_critical_section(flags); return &priv->spidev; #ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS @@ -1383,7 +1384,7 @@ errout_with_txirq: errout_with_rxirq: irq_detatch(priv->config->rxirq); errout: - irqrestore(flags); + leave_critical_section(flags); return NULL; #endif } diff --git a/arch/rgmp/src/x86/com.c b/arch/rgmp/src/x86/com.c index 7094320c479..279cb35154b 100644 --- a/arch/rgmp/src/x86/com.c +++ b/arch/rgmp/src/x86/com.c @@ -2,7 +2,7 @@ * arch/rgmp/src/x86/com.c * * Copyright (C) 2011 Yu Qiang. All rights reserved. - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Authors: Yu Qiang * Gregory Nutt * @@ -50,6 +50,7 @@ #include #include +#include #include #include #include @@ -494,7 +495,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) irqstate_t flags; uint8_t ier; - flags = irqsave(); + flags = enter_critical_section(); ier = inb(base+COM_IER); if (enable) { ier |= COM_IER_TEI; @@ -510,7 +511,8 @@ static void up_txint(struct uart_dev_s *dev, bool enable) ier &= ~COM_IER_TEI; outb(base+COM_IER, ier); } - irqrestore(flags); + + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/sh/src/m16c/m16c_irq.c b/arch/sh/src/m16c/m16c_irq.c index 0f2821520ca..04b971200f3 100644 --- a/arch/sh/src/m16c/m16c_irq.c +++ b/arch/sh/src/m16c/m16c_irq.c @@ -45,10 +45,6 @@ #include "up_internal.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ @@ -59,18 +55,6 @@ volatile uint32_t *current_regs; /* Actually a pointer to the beginning of a uint8_t array */ -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - /**************************************************************************** * Name: up_irqinitialize ****************************************************************************/ diff --git a/arch/sh/src/m16c/m16c_schedulesigaction.c b/arch/sh/src/m16c/m16c_schedulesigaction.c index f4d86f1170c..2c89680cd2d 100644 --- a/arch/sh/src/m16c/m16c_schedulesigaction.c +++ b/arch/sh/src/m16c/m16c_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/sh/src/m16c/m16c_schedulesigaction.c * - * Copyright (C) 2009-2010, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2010, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "sched/sched.h" @@ -51,18 +52,6 @@ #ifndef CONFIG_DISABLE_SIGNALS -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Funictions ****************************************************************************/ @@ -108,7 +97,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -195,7 +184,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/sh/src/m16c/m16c_serial.c b/arch/sh/src/m16c/m16c_serial.c index 9fb7cc56d30..85d160445e8 100644 --- a/arch/sh/src/m16c/m16c_serial.c +++ b/arch/sh/src/m16c/m16c_serial.c @@ -843,7 +843,7 @@ static void m16c_rxint(struct up_dev_s *dev, bool enable) /* Disable interrupts to prevent asynchronous accesses */ - flags = irqsave(); + flags = enter_critical_section(); /* Pick the SxTIC register and enable interrupt priority */ @@ -892,7 +892,7 @@ static void m16c_rxint(struct up_dev_s *dev, bool enable) } asm ("\tnop\n\tnop\n\tnop"); /* Three NOPs -- probably not necessary here */ - irqrestore(flags); + leave_critical_section(flags); } static void up_rxint(struct uart_dev_s *dev, bool enable) @@ -998,7 +998,7 @@ static void m16c_txint(struct up_dev_s *dev, bool enable) /* Disable interrupts to prevent asynchronous accesses */ - flags = irqsave(); + flags = enter_critical_section(); /* Pick the SxTIC register and enable interrupt priority */ @@ -1047,7 +1047,7 @@ static void m16c_txint(struct up_dev_s *dev, bool enable) } asm ("\tnop\n\tnop\n\tnop"); /* Three NOPs -- probably not necessary here */ - irqrestore(flags); + leave_critical_section(flags); } static void up_txint(struct uart_dev_s *dev, bool enable) diff --git a/arch/sh/src/sh1/sh1_irq.c b/arch/sh/src/sh1/sh1_irq.c index ddbc69701aa..28c302edf4c 100644 --- a/arch/sh/src/sh1/sh1_irq.c +++ b/arch/sh/src/sh1/sh1_irq.c @@ -49,24 +49,12 @@ #include "up_internal.h" #include "chip.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ volatile uint32_t *current_regs; -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Funtions ****************************************************************************/ diff --git a/arch/sh/src/sh1/sh1_schedulesigaction.c b/arch/sh/src/sh1/sh1_schedulesigaction.c index cd523b612b3..b78b4e8007c 100644 --- a/arch/sh/src/sh1/sh1_schedulesigaction.c +++ b/arch/sh/src/sh1/sh1_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/sh/src/sh1/sh1_schedulesigaction.c * - * Copyright (C) 2008-2010, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2010, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "sched/sched.h" @@ -51,18 +52,6 @@ #ifndef CONFIG_DISABLE_SIGNALS -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Funictions ****************************************************************************/ @@ -108,7 +97,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -191,7 +180,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/sh/src/sh1/sh1_serial.c b/arch/sh/src/sh1/sh1_serial.c index dba82fe6141..e1f34fa29e6 100644 --- a/arch/sh/src/sh1/sh1_serial.c +++ b/arch/sh/src/sh1/sh1_serial.c @@ -699,7 +699,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) /* Disable interrupts to prevent asynchronous accesses */ - flags = irqsave(); + flags = enter_critical_section(); /* Are we enabling or disabling? */ @@ -721,7 +721,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) /* Write the modified SCR value to hardware */ up_serialout(priv, SH1_SCI_SCR_OFFSET, priv->scr); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -779,7 +779,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) /* Disable interrupts to prevent asynchronous accesses */ - flags = irqsave(); + flags = enter_critical_section(); /* Are we enabling or disabling? */ @@ -816,7 +816,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) /* Write the modified SCR value to hardware */ up_serialout(priv, SH1_SCI_SCR_OFFSET, priv->scr); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/sim/src/up_spiflash.c b/arch/sim/src/up_spiflash.c index e4ef701fdcb..9c516972f0b 100644 --- a/arch/sim/src/up_spiflash.c +++ b/arch/sim/src/up_spiflash.c @@ -47,6 +47,7 @@ #include #include +#include #include #include @@ -857,7 +858,7 @@ FAR struct spi_dev_s *up_spiflashinitialize() { FAR struct sim_spiflashdev_s *priv = NULL; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); priv = &g_spidev; priv->selected = 0; @@ -868,7 +869,7 @@ FAR struct spi_dev_s *up_spiflashinitialize() priv->last_cmd = 0xFF; memset(&priv->data[0], 0xFF, sizeof(priv->data)); - irqrestore(flags); + leave_critical_section(flags); return (FAR struct spi_dev_s *)priv; } diff --git a/arch/sim/src/up_touchscreen.c b/arch/sim/src/up_touchscreen.c index 182f8fc161c..4b4e598f45f 100644 --- a/arch/sim/src/up_touchscreen.c +++ b/arch/sim/src/up_touchscreen.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/sim/src/up_touchscreen.c * - * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -52,6 +52,7 @@ #include #include +#include #include #include #include @@ -290,7 +291,7 @@ static int up_waitsample(FAR struct up_dev_s *priv, */ sched_lock(); - flags = irqsave(); + flags = enter_critical_section(); /* Now release the semaphore that manages mutually exclusive access to * the device structure. This may cause other tasks to become ready to @@ -338,7 +339,7 @@ errout: * have pre-emption disabled. */ - irqrestore(flags); + leave_critical_section(flags); /* Restore pre-emption. We might get suspended here but that is okay * because we already have our sample. Note: this means that if there diff --git a/arch/x86/src/common/up_modifyreg16.c b/arch/x86/src/common/up_modifyreg16.c index 144cd4797cf..e5239d3a908 100644 --- a/arch/x86/src/common/up_modifyreg16.c +++ b/arch/x86/src/common/up_modifyreg16.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits) irqstate_t flags; uint16_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg16((uint16_t)addr); regval &= ~clearbits; regval |= setbits; putreg16(regval, (uint16_t)addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/x86/src/common/up_modifyreg32.c b/arch/x86/src/common/up_modifyreg32.c index 9953f52ad64..79a3fe2f150 100644 --- a/arch/x86/src/common/up_modifyreg32.c +++ b/arch/x86/src/common/up_modifyreg32.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits) irqstate_t flags; uint32_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg32((uint16_t)addr); regval &= ~clearbits; regval |= setbits; putreg32(regval, (uint16_t)addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/x86/src/common/up_modifyreg8.c b/arch/x86/src/common/up_modifyreg8.c index d75b7deba58..74ad76d4a7e 100644 --- a/arch/x86/src/common/up_modifyreg8.c +++ b/arch/x86/src/common/up_modifyreg8.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "up_arch.h" @@ -76,10 +76,10 @@ void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits) irqstate_t flags; uint8_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = getreg8((uint16_t)addr); regval &= ~clearbits; regval |= setbits; putreg8(regval, (uint16_t)addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/x86/src/i486/up_irq.c b/arch/x86/src/i486/up_irq.c index c32fc86b491..d144b2b9e58 100644 --- a/arch/x86/src/i486/up_irq.c +++ b/arch/x86/src/i486/up_irq.c @@ -54,10 +54,6 @@ #include "up_internal.h" #include "qemu.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Private Function Prototypes ****************************************************************************/ diff --git a/arch/x86/src/i486/up_schedulesigaction.c b/arch/x86/src/i486/up_schedulesigaction.c index f4732a4daf2..4fcd7bbfbc2 100644 --- a/arch/x86/src/i486/up_schedulesigaction.c +++ b/arch/x86/src/i486/up_schedulesigaction.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/x86/src/i486/up_schedulesigaction.c * - * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,6 +43,7 @@ #include #include +#include #include #include "sched/sched.h" @@ -104,7 +105,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -192,7 +193,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/arch/z16/src/common/up_schedulesigaction.c b/arch/z16/src/common/up_schedulesigaction.c index 63af438d733..cebd67eef3c 100644 --- a/arch/z16/src/common/up_schedulesigaction.c +++ b/arch/z16/src/common/up_schedulesigaction.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "sched/sched.h" #include "up_internal.h" @@ -96,7 +96,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -182,7 +182,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DISABLE_SIGNALS */ diff --git a/arch/z16/src/z16f/z16f_espi.c b/arch/z16/src/z16f/z16f_espi.c index 60a42e36c07..869cbb79cbb 100644 --- a/arch/z16/src/z16f/z16f_espi.c +++ b/arch/z16/src/z16f/z16f_espi.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/z16/src/z16f/z16f_espi.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,7 @@ #include #include +#include #include #include "up_arch.h" @@ -832,7 +833,7 @@ FAR struct spi_dev_s *z16_spibus_initialize(int port) { /* Initialize the ESPI state structure */ - flags = irqsave(); + flags = enter_critical_section(); priv->spi.ops = &g_epsiops; sem_init(&priv->exclsem, 0, 1); @@ -874,7 +875,7 @@ FAR struct spi_dev_s *z16_spibus_initialize(int port) /* Now we are initialized */ priv->initialized = true; - irqrestore(flags); + leave_critical_section(flags); } spi_dumpregs(priv, "After initialization"); diff --git a/arch/z16/src/z16f/z16f_irq.c b/arch/z16/src/z16f/z16f_irq.c index 5eefe3cda62..6e06eae06ff 100644 --- a/arch/z16/src/z16f/z16f_irq.c +++ b/arch/z16/src/z16f/z16f_irq.c @@ -47,22 +47,6 @@ #include "chip/chip.h" #include "up_internal.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/z16/src/z16f/z16f_serial.c b/arch/z16/src/z16f/z16f_serial.c index 4440213038e..9a371dba22b 100644 --- a/arch/z16/src/z16f/z16f_serial.c +++ b/arch/z16/src/z16f/z16f_serial.c @@ -287,14 +287,14 @@ static uart_dev_t g_uart1port = static uint8_t z16f_disableuartirq(struct uart_dev_s *dev) { struct z16f_uart_s *priv = (struct z16f_uart_s*)dev->priv; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); uint8_t state = priv->rxenabled ? STATE_RXENABLED : STATE_DISABLED | \ priv->txenabled ? STATE_TXENABLED : STATE_DISABLED; z16f_txint(dev, false); z16f_rxint(dev, false); - irqrestore(flags); + leave_critical_section(flags); return state; } @@ -304,12 +304,12 @@ static uint8_t z16f_disableuartirq(struct uart_dev_s *dev) static void z16f_restoreuartirq(struct uart_dev_s *dev, uint8_t state) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); z16f_txint(dev, (state & STATE_TXENABLED) ? true : false); z16f_rxint(dev, (state & STATE_RXENABLED) ? true : false); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -613,7 +613,7 @@ static int z16f_receive(struct uart_dev_s *dev, uint32_t *status) static void z16f_rxint(struct uart_dev_s *dev, bool enable) { struct z16f_uart_s *priv = (struct z16f_uart_s*)dev->priv; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); if (enable) { @@ -627,7 +627,7 @@ static void z16f_rxint(struct uart_dev_s *dev, bool enable) } priv->rxenabled = enable; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -669,7 +669,7 @@ static void z16f_send(struct uart_dev_s *dev, int ch) static void z16f_txint(struct uart_dev_s *dev, bool enable) { struct z16f_uart_s *priv = (struct z16f_uart_s*)dev->priv; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); if (enable) { @@ -689,7 +689,7 @@ static void z16f_txint(struct uart_dev_s *dev, bool enable) } priv->txenabled = enable; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/z80/src/ez80/ez80_emac.c b/arch/z80/src/ez80/ez80_emac.c index d338e569bab..2b1b5834fec 100644 --- a/arch/z80/src/ez80/ez80_emac.c +++ b/arch/z80/src/ez80/ez80_emac.c @@ -966,7 +966,7 @@ static int ez80emac_transmit(struct ez80emac_driver_s *priv) /* Increment statistics */ - flags = irqsave(); + flags = enter_critical_section(); EMAC_STAT(priv, tx_packets); /* The current packet to be sent is txnext; Calculate the new txnext and @@ -1037,7 +1037,7 @@ static int ez80emac_transmit(struct ez80emac_driver_s *priv) */ outp(EZ80_EMAC_PTMR, EMAC_PTMR); - irqrestore(flags); + leave_critical_section(flags); nllvdbg("txdesc=%p {%06x, %u, %04x}\n", txdesc, txdesc->np, txdesc->pktsize, txdesc->stat); @@ -1664,10 +1664,10 @@ static void ez80emac_txtimeout(int argc, uint32_t arg, ...) /* Then reset the hardware */ - flags = irqsave(); + flags = enter_critical_section(); ez80emac_ifdown(&priv->dev); ez80emac_ifup(&priv->dev); - irqrestore(flags); + leave_critical_section(flags); /* Then poll uIP for new XMIT data */ @@ -1824,7 +1824,7 @@ static int ez80emac_ifdown(struct net_driver_s *dev) /* Disable the Ethernet interrupt */ - flags = irqsave(); + flags = enter_critical_section(); up_disable_irq(EZ80_EMACRX_IRQ); up_disable_irq(EZ80_EMACTX_IRQ); up_disable_irq(EZ80_EMACSYS_IRQ); @@ -1845,7 +1845,7 @@ static int ez80emac_ifdown(struct net_driver_s *dev) outp(EZ80_EMAC_PTMR, 0); priv->bifup = false; - irqrestore(flags); + leave_critical_section(flags); return OK; } @@ -1873,7 +1873,7 @@ static int ez80emac_txavail(struct net_driver_s *dev) struct ez80emac_driver_s *priv = (struct ez80emac_driver_s *)dev->d_private; irqstate_t flags; - flags = irqsave(); + flags = enter_critical_section(); /* Ignore the notification if the interface is not yet up */ @@ -1887,7 +1887,7 @@ static int ez80emac_txavail(struct net_driver_s *dev) (void)devif_poll(&priv->dev, ez80emac_txpoll); } - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/z80/src/ez80/ez80_irq.c b/arch/z80/src/ez80/ez80_irq.c index e26ecf914b6..774fe02e028 100644 --- a/arch/z80/src/ez80/ez80_irq.c +++ b/arch/z80/src/ez80/ez80_irq.c @@ -45,10 +45,6 @@ #include "chip/switch.h" #include "up_internal.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ @@ -59,14 +55,6 @@ volatile chipreg_t *current_regs; -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/z80/src/ez80/ez80_schedulesigaction.c b/arch/z80/src/ez80/ez80_schedulesigaction.c index 05e634558b7..33d6c11b5f2 100644 --- a/arch/z80/src/ez80/ez80_schedulesigaction.c +++ b/arch/z80/src/ez80/ez80_schedulesigaction.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "chip/switch.h" #include "sched/sched.h" @@ -129,7 +129,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -185,7 +185,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DISABLE_SIGNALS */ diff --git a/arch/z80/src/z180/z180_irq.c b/arch/z80/src/z180/z180_irq.c index d55bd34fc86..c9cadb34208 100644 --- a/arch/z80/src/z180/z180_irq.c +++ b/arch/z80/src/z180/z180_irq.c @@ -50,10 +50,6 @@ #include "z180_iomap.h" #include "up_internal.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ @@ -78,10 +74,6 @@ uint8_t current_cbr; extern uintptr_t up_vectors[16]; -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ diff --git a/arch/z80/src/z180/z180_mmu.c b/arch/z80/src/z180/z180_mmu.c index 730f8472be2..e3612dc9f02 100644 --- a/arch/z80/src/z180/z180_mmu.c +++ b/arch/z80/src/z180/z180_mmu.c @@ -46,7 +46,7 @@ #include -#include +#include #include #include "up_internal.h" @@ -269,7 +269,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize, * address of environment might be longer than the life of the task. */ - flags = irqsave(); + flags = enter_critical_section(); cbr = z180_mmu_alloccbr(); if (!cbr) { @@ -302,14 +302,14 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize, cbr->pages = (uint8_t)npages; *addrenv = (group_addrenv_t)cbr; - irqrestore(flags); + leave_critical_section(flags); return OK; errout_with_cbr: z180_mmu_freecbr(cbr); errout_with_irq: - irqrestore(flags); + leave_critical_section(flags); return ret; } @@ -463,13 +463,13 @@ int up_addrenv_select(FAR const group_addrenv_t *addrenv, /* Return the current CBR value from the CBR register */ - flags = irqsave(); + flags = enter_critical_section(); *oldenv = (save_addrenv_t)inp(Z180_MMU_CBR); /* Write the new CBR value into CBR register */ outp(Z180_MMU_CBR, cbr->cbr); - irqrestore(flags); + leave_critical_section(flags); return OK; } diff --git a/arch/z80/src/z180/z180_modifiyreg8.c b/arch/z80/src/z180/z180_modifiyreg8.c index f5494a6b444..bfeec463eeb 100644 --- a/arch/z80/src/z180/z180_modifiyreg8.c +++ b/arch/z80/src/z180/z180_modifiyreg8.c @@ -41,7 +41,7 @@ #include -#include +#include #include /**************************************************************************** @@ -73,10 +73,10 @@ void modifyreg8(uint16_t addr, uint8_t clearbits, uint8_t setbits) irqstate_t flags; uint8_t regval; - flags = irqsave(); + flags = enter_critical_section(); regval = inp(addr); regval &= ~clearbits; regval |= setbits; outp(regval, addr); - irqrestore(flags); + leave_critical_section(flags); } diff --git a/arch/z80/src/z180/z180_schedulesigaction.c b/arch/z80/src/z180/z180_schedulesigaction.c index 1ae1af9627f..a29a4b9d8a3 100644 --- a/arch/z80/src/z180/z180_schedulesigaction.c +++ b/arch/z80/src/z180/z180_schedulesigaction.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "chip/switch.h" #include "sched/sched.h" @@ -129,7 +129,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -185,7 +185,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DISABLE_SIGNALS */ diff --git a/arch/z80/src/z8/z8_irq.c b/arch/z80/src/z8/z8_irq.c index a26c3f540be..0fb80f7e345 100644 --- a/arch/z80/src/z8/z8_irq.c +++ b/arch/z80/src/z8/z8_irq.c @@ -47,10 +47,6 @@ #include "chip/switch.h" #include "up_internal.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ @@ -59,14 +55,6 @@ struct z8_irqstate_s g_z8irqstate; -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/z80/src/z8/z8_schedulesigaction.c b/arch/z80/src/z8/z8_schedulesigaction.c index 633bdc8bb6e..2e6de089ec5 100644 --- a/arch/z80/src/z8/z8_schedulesigaction.c +++ b/arch/z80/src/z8/z8_schedulesigaction.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "chip/switch.h" #include "sched/sched.h" @@ -129,7 +129,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -185,7 +185,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DISABLE_SIGNALS */ diff --git a/arch/z80/src/z8/z8_serial.c b/arch/z80/src/z8/z8_serial.c index 1faacb808db..97e0839fa47 100644 --- a/arch/z80/src/z8/z8_serial.c +++ b/arch/z80/src/z8/z8_serial.c @@ -269,14 +269,14 @@ static inline uint8_t z8_getuart(FAR struct z8_uart_s *priv, uint8_t offset) static uint8_t z8_disableuartirq(FAR struct uart_dev_s *dev) { struct z8_uart_s *priv = (struct z8_uart_s*)dev->priv; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); uint8_t state = priv->rxenabled ? STATE_RXENABLED : STATE_DISABLED | \ priv->txenabled ? STATE_TXENABLED : STATE_DISABLED; z8_txint(dev, false); z8_rxint(dev, false); - irqrestore(flags); + leave_critical_section(flags); return state; } @@ -286,12 +286,12 @@ static uint8_t z8_disableuartirq(FAR struct uart_dev_s *dev) static void z8_restoreuartirq(FAR struct uart_dev_s *dev, uint8_t state) { - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); z8_txint(dev, (state & STATE_TXENABLED) ? true : false); z8_rxint(dev, (state & STATE_RXENABLED) ? true : false); - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -616,7 +616,7 @@ static int z8_receive(FAR struct uart_dev_s *dev, FAR uint32_t *status) static void z8_rxint(FAR struct uart_dev_s *dev, bool enable) { struct z8_uart_s *priv = (struct z8_uart_s*)dev->priv; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); if (enable) { @@ -630,7 +630,7 @@ static void z8_rxint(FAR struct uart_dev_s *dev, bool enable) } priv->rxenabled = enable; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** @@ -672,7 +672,7 @@ static void z8_send(FAR struct uart_dev_s *dev, int ch) static void z8_txint(FAR struct uart_dev_s *dev, bool enable) { struct z8_uart_s *priv = (struct z8_uart_s*)dev->priv; - irqstate_t flags = irqsave(); + irqstate_t flags = enter_critical_section(); if (enable) { @@ -686,7 +686,7 @@ static void z8_txint(FAR struct uart_dev_s *dev, bool enable) } priv->txenabled = enable; - irqrestore(flags); + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/z80/src/z80/z80_irq.c b/arch/z80/src/z80/z80_irq.c index adbea562d10..4af2752ca9c 100644 --- a/arch/z80/src/z80/z80_irq.c +++ b/arch/z80/src/z80/z80_irq.c @@ -44,10 +44,6 @@ #include "chip/switch.h" #include "up_internal.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ @@ -58,14 +54,6 @@ volatile chipreg_t *current_regs; -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/z80/src/z80/z80_schedulesigaction.c b/arch/z80/src/z80/z80_schedulesigaction.c index 2f11c7e1143..eb0c9c5554d 100644 --- a/arch/z80/src/z80/z80_schedulesigaction.c +++ b/arch/z80/src/z80/z80_schedulesigaction.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "chip/switch.h" #include "sched/sched.h" @@ -129,7 +129,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) /* Make sure that interrupts are disabled */ - flags = irqsave(); + flags = enter_critical_section(); /* Refuse to handle nested signal actions */ @@ -185,7 +185,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) } } - irqrestore(flags); + leave_critical_section(flags); } #endif /* CONFIG_DISABLE_SIGNALS */