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arch/risc-v: Decouple ARCH_RV_CPUID_MAP and up_cpu_index()

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Summary:
- Separated CPU index functionality from CPU ID mapping configuration
- Moved CPU ID mapping functions to new riscv_cpuidmap.c file
- Made up_cpu_index() implementation dependent on ARCH_USE_S_MODE
- Updated build system to handle new file organization

Impact:
- Improves code organization by separating concerns between basic CPU index
functionality and advanced CPU ID mapping features
- Makes CPU index functionality available independently of CPU ID mapping
- Reduces conditional compilation complexity in header files
- Better aligns with RISC-V architecture modes (M-mode vs S-mode)

Testing:
GitHub CI and local testing

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi
2025-01-14 17:52:58 +08:00
committed by Xiang Xiao
parent 00010089b8
commit 6e82ca3013
5 changed files with 110 additions and 58 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/risc-v/include/irq.h
+10 -6
View File
@@ -691,7 +691,6 @@ EXTERN volatile bool g_interrupt_context[CONFIG_SMP_NCPUS];
irqstate_t up_irq_enable(void);
#ifdef CONFIG_ARCH_RV_CPUID_MAP
/****************************************************************************
* Name: up_cpu_index
*
@@ -700,7 +699,16 @@ irqstate_t up_irq_enable(void);
*
****************************************************************************/
#ifdef CONFIG_ARCH_HAVE_MULTICPU
#ifdef CONFIG_ARCH_USE_S_MODE
int up_cpu_index(void) noinstrument_function;
#else
noinstrument_function static inline int up_cpu_index(void)
{
return READ_CSR(CSR_MHARTID);
}
#endif /* CONFIG_ARCH_USE_S_MODE */
#endif /* CONFIG_ARCH_HAVE_MULTICPU */
/****************************************************************************
* Name: up_this_cpu
@@ -711,13 +719,9 @@ int up_cpu_index(void) noinstrument_function;
*
****************************************************************************/
#ifdef CONFIG_ARCH_RV_CPUID_MAP
int up_this_cpu(void);
#else
noinstrument_function static inline int up_cpu_index(void)
{
return READ_CSR(CSR_MHARTID);
}
#define up_this_cpu() up_cpu_index()
#endif /* CONFIG_ARCH_RV_CPUID_MAP */
arch/risc-v/src/common/CMakeLists.txt
+7 -1
View File
@@ -49,8 +49,14 @@ if(CONFIG_SMP)
list(APPEND SRCS riscv_smpcall.c riscv_cpustart.c)
endif()
if(CONFIG_ARCH_HAVE_MULTICPU)
if(CONFIG_ARCH_USE_S_MODE)
list(APPEND SRCS riscv_cpuindex.c)
endif()
endif()
if(CONFIG_ARCH_RV_CPUID_MAP)
list(APPEND SRCS riscv_cpuindex.c)
list(APPEND SRCS riscv_cpuidmap.c)
endif()
if(CONFIG_RISCV_MISALIGNED_HANDLER)
arch/risc-v/src/common/Make.defs
+7 -1
View File
@@ -52,9 +52,15 @@ ifeq ($(CONFIG_SMP),y)
CMN_CSRCS += riscv_smpcall.c riscv_cpustart.c
endif
ifeq ($(CONFIG_ARCH_RV_CPUID_MAP),y)
ifeq ($(CONFIG_ARCH_HAVE_MULTICPU),y)
ifeq ($(CONFIG_ARCH_USE_S_MODE),y)
CMN_CSRCS += riscv_cpuindex.c
endif
endif
ifeq ($(CONFIG_ARCH_RV_CPUID_MAP),y)
CMN_CSRCS += riscv_cpuidmap.c
endif
ifeq ($(CONFIG_RISCV_MISALIGNED_HANDLER),y)
CMN_CSRCS += riscv_misaligned.c
arch/risc-v/src/common/riscv_cpuidmap.c
+86
View File
@@ -0,0 +1,86 @@
/****************************************************************************
* arch/risc-v/src/common/riscv_cpuidmap.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include "riscv_internal.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_this_cpu
*
* Description:
* Return the logical core number. Default implementation is 1:1 mapping,
* i.e. physical=logical.
*
****************************************************************************/
int up_this_cpu(void)
{
return riscv_hartid_to_cpuid((int)riscv_mhartid());
}
/****************************************************************************
* Name: riscv_hartid_to_cpuid
*
* Description:
* Convert physical core number to logical core number. Default
* implementation is 1:1 mapping, i.e. physical=logical.
*
****************************************************************************/
int weak_function riscv_hartid_to_cpuid(int hart)
{
#ifdef CONFIG_SMP
return hart - CONFIG_ARCH_RV_HARTID_BASE;
#else
return 0;
#endif
}
/****************************************************************************
* Name: riscv_cpuid_to_hartid
*
* Description:
* Convert logical core number to physical core number. Default
* implementation is 1:1 mapping, i.e. physical=logical.
*
****************************************************************************/
int weak_function riscv_cpuid_to_hartid(int cpu)
{
#ifdef CONFIG_SMP
return cpu + CONFIG_ARCH_RV_HARTID_BASE;
#else
return (int)riscv_mhartid();
#endif
}
arch/risc-v/src/common/riscv_cpuindex.c
-50
View File
@@ -47,53 +47,3 @@ int up_cpu_index(void)
{
return (int)riscv_mhartid();
}
/****************************************************************************
* Name: up_this_cpu
*
* Description:
* Return the logical core number. Default implementation is 1:1 mapping,
* i.e. physical=logical.
*
****************************************************************************/
int up_this_cpu(void)
{
return riscv_hartid_to_cpuid((int)riscv_mhartid());
}
/****************************************************************************
* Name: riscv_hartid_to_cpuid
*
* Description:
* Convert physical core number to logical core number. Default
* implementation is 1:1 mapping, i.e. physical=logical.
*
****************************************************************************/
int weak_function riscv_hartid_to_cpuid(int hart)
{
#ifdef CONFIG_SMP
return hart - CONFIG_ARCH_RV_HARTID_BASE;
#else
return 0;
#endif
}
/****************************************************************************
* Name: riscv_cpuid_to_hartid
*
* Description:
* Convert logical core number to physical core number. Default
* implementation is 1:1 mapping, i.e. physical=logical.
*
****************************************************************************/
int weak_function riscv_cpuid_to_hartid(int cpu)
{
#ifdef CONFIG_SMP
return cpu + CONFIG_ARCH_RV_HARTID_BASE;
#else
return (int)riscv_mhartid();
#endif
}