Mirrors_Framework/nuttx
1
0
Fork 0
mirror of https://github.com/apache/nuttx.git synced 2026-05-20 12:33:27 +08:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

Merged nuttx/nuttx/master into master

Browse Source
This commit is contained in:
Masayuki Ishikawa
2017-03-02 08:17:34 +09:00
parent b118fb4387 35b2448203
commit 6d2bd682f6
35 changed files with 92 additions and 805 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/stm32/stm32_capture.c
+3 -3
View File
@@ -702,7 +702,7 @@ static int stm32_cap_setclock(FAR struct stm32_cap_dev_s *dev, stm32_cap_clk_t c
return prescaler;
}
static int stm32_cap_setisr(FAR struct stm32_cap_dev_s *dev, xcpt_t handler)
static int stm32_cap_setisr(FAR struct stm32_cap_dev_s *dev, xcpt_t handler, void *arg)
{
const struct stm32_cap_priv_s *priv = (const struct stm32_cap_priv_s *)dev;
int irq;
@@ -736,13 +736,13 @@ static int stm32_cap_setisr(FAR struct stm32_cap_dev_s *dev, xcpt_t handler)
/* Otherwise set callback and enable interrupt */
irq_attach(irq, handler, NULL);
irq_attach(irq, handler, arg);
up_enable_irq(irq);
#ifdef USE_ADVENCED_TIM
if (priv->irq_of)
{
irq_attach(priv->irq_of, handler, NULL);
irq_attach(priv->irq_of, handler, arg);
up_enable_irq(priv->irq_of);
}
#endif
arch/arm/src/stm32/stm32_capture.h
+2 -2
View File
@@ -54,7 +54,7 @@
#define STM32_CAP_SETCLOCK(d,clk_src,psc,max) ((d)->ops->setclock(d,clk_src,psc,max))
#define STM32_CAP_SETCHANNEL(d,ch,cfg) ((d)->ops->setchannel(d,ch,cfg))
#define STM32_CAP_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch))
#define STM32_CAP_SETISR(d,hnd) ((d)->ops->setisr(d,hnd))
#define STM32_CAP_SETISR(d,hnd,arg) ((d)->ops->setisr(d,hnd,arg))
#define STM32_CAP_ENABLEINT(d,s,on) ((d)->ops->enableint(d,s,on))
#define STM32_CAP_ACKFLAGS(d,f) ((d)->ops->ackflags(d,f))
#define STM32_CAP_GETFLAGS(d) ((d)->ops->getflags(d))
@@ -178,7 +178,7 @@ struct stm32_cap_ops_s
int (*setclock)( FAR struct stm32_cap_dev_s *dev, stm32_cap_clk_t clk, uint32_t prescaler, uint32_t max);
int (*setchannel)(FAR struct stm32_cap_dev_s *dev, uint8_t channel, stm32_cap_ch_cfg_t cfg);
uint32_t (*getcapture)(FAR struct stm32_cap_dev_s *dev, uint8_t channel);
int (*setisr)( FAR struct stm32_cap_dev_s *dev, xcpt_t handler);
int (*setisr)(FAR struct stm32_cap_dev_s *dev, xcpt_t handler, void *arg);
void (*enableint)( FAR struct stm32_cap_dev_s *dev, stm32_cap_flags_t src, bool on );
void (*ackflags)( FAR struct stm32_cap_dev_s *dev, int flags);
stm32_cap_flags_t (*getflags)(FAR struct stm32_cap_dev_s *dev);
arch/arm/src/stm32/stm32_freerun.c
+4 -12
View File
@@ -52,12 +52,6 @@
#ifdef CONFIG_STM32_FREERUN
/****************************************************************************
* Private Data
****************************************************************************/
static struct stm32_freerun_s *g_freerun;
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -81,9 +75,9 @@ static struct stm32_freerun_s *g_freerun;
****************************************************************************/
#ifndef CONFIG_CLOCK_TIMEKEEPING
static int stm32_freerun_handler(int irq, void *context)
static int stm32_freerun_handler(int irq, void *context, void *arg)
{
struct stm32_freerun_s *freerun = g_freerun;
struct stm32_freerun_s *freerun = (struct stm32_freerun_s *) arg;
DEBUGASSERT(freerun != NULL && freerun->overflow < UINT32_MAX);
freerun->overflow++;
@@ -151,11 +145,10 @@ int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan,
#ifndef CONFIG_CLOCK_TIMEKEEPING
freerun->overflow = 0;
g_freerun = freerun;
/* Set up to receive the callback when the counter overflow occurs */
STM32_TIM_SETISR(freerun->tch, stm32_freerun_handler, 0);
STM32_TIM_SETISR(freerun->tch, stm32_freerun_handler, freerun, 0);
#endif
/* Set timer period */
@@ -305,14 +298,13 @@ int stm32_freerun_uninitialize(struct stm32_freerun_s *freerun)
STM32_TIM_DISABLEINT(freerun->tch, 0);
STM32_TIM_SETMODE(freerun->tch, STM32_TIM_MODE_DISABLED);
STM32_TIM_SETISR(freerun->tch, NULL, 0);
STM32_TIM_SETISR(freerun->tch, NULL, NULL, 0);
/* Free the timer */
stm32_tim_deinit(freerun->tch);
freerun->tch = NULL;
g_freerun = NULL;
return OK;
}
arch/arm/src/stm32/stm32_oneshot.c
+6 -137
View File
@@ -58,29 +58,7 @@
* Private Function Prototypes
****************************************************************************/
static int stm32_oneshot_handler(struct stm32_oneshot_s *oneshot);
static int stm32_oneshot1_handler(int irq, void *context);
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 1
static int stm32_oneshot2_handler(int irq, void *context);
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 2
static int stm32_oneshot3_handler(int irq, void *context);
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 3
static int stm32_oneshot4_handler(int irq, void *context);
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 4
static int stm32_oneshot5_handler(int irq, void *context);
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 5
static int stm32_oneshot6_handler(int irq, void *context);
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 6
static int stm32_oneshot7_handler(int irq, void *context);
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 7
static int stm32_oneshot8_handler(int irq, void *context);
#endif
static int stm32_oneshot_handler(int irg_num, void * context, void *arg);
/****************************************************************************
* Private Data
@@ -88,34 +66,6 @@ static int stm32_oneshot8_handler(int irq, void *context);
static struct stm32_oneshot_s *g_oneshot[CONFIG_STM32_ONESHOT_MAXTIMERS];
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 1
static const xcpt_t g_callbacks[CONFIG_STM32_ONESHOT_MAXTIMERS] =
{
stm32_oneshot1_handler,
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 1
stm32_oneshot2_handler,
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 2
stm32_oneshot3_handler,
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 3
stm32_oneshot4_handler,
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 4
stm32_oneshot5_handler,
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 5
stm32_oneshot6_handler,
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 6
stm32_oneshot7_handler,
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 7
stm32_oneshot8_handler,
#endif
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -136,8 +86,9 @@ static const xcpt_t g_callbacks[CONFIG_STM32_ONESHOT_MAXTIMERS] =
*
****************************************************************************/
static int stm32_oneshot_handler(struct stm32_oneshot_s *oneshot)
static int stm32_oneshot_handler(int irg_num, void * context, void *arg)
{
struct stm32_oneshot_s * oneshot = (struct stm32_oneshot_s *) arg;
oneshot_handler_t oneshot_handler;
void *oneshot_arg;
@@ -148,7 +99,7 @@ static int stm32_oneshot_handler(struct stm32_oneshot_s *oneshot)
* Disable the TC now and disable any further interrupts.
*/
STM32_TIM_SETISR(oneshot->tch, NULL, 0);
STM32_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
STM32_TIM_DISABLEINT(oneshot->tch, 0);
STM32_TIM_SETMODE(oneshot->tch, STM32_TIM_MODE_DISABLED);
STM32_TIM_ACKINT(oneshot->tch, 0);
@@ -168,84 +119,6 @@ static int stm32_oneshot_handler(struct stm32_oneshot_s *oneshot)
return OK;
}
/****************************************************************************
* Name: stm32_oneshot[N]_handler
*
* Description:
* Timer interrupt callbacks. When a oneshot timer interrupt expires,
* one of these functions will be called. These functions will forward
* the call to the nextlevel up.
*
* Input Parameters:
* Standard interrupt handler arguments.
*
* Returned Value:
* Always returns OK
*
****************************************************************************/
static int stm32_oneshot1_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[0] != NULL);
return stm32_oneshot_handler(g_oneshot[0]);
}
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 1
static int stm32_oneshot2_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[1] != NULL);
return stm32_oneshot_handler(g_oneshot[1]);
}
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 2
static int stm32_oneshot3_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[2] != NULL);
return stm32_oneshot_handler(g_oneshot[2]);
}
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 3
static int stm32_oneshot4_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[3] != NULL);
return stm32_oneshot_handler(g_oneshot[3]);
}
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 4
static int stm32_oneshot5_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[4] != NULL);
return stm32_oneshot_handler(g_oneshot[4]);
}
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 5
static int stm32_oneshot6_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[6] != NULL);
return stm32_oneshot_handler(g_oneshot[5]);
}
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 6
static int stm32_oneshot7_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[7] != NULL);
return stm32_oneshot_handler(g_oneshot[6]);
}
#endif
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 7
static int stm32_oneshot8_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[0] != NULL);
return stm32_oneshot_handler(g_oneshot[7]);
}
#endif
/****************************************************************************
* Name: stm32_allocate_handler
*
@@ -442,11 +315,7 @@ int stm32_oneshot_start(struct stm32_oneshot_s *oneshot,
/* Set up to receive the callback when the interrupt occurs */
#if CONFIG_STM32_ONESHOT_MAXTIMERS > 1
STM32_TIM_SETISR(oneshot->tch, g_callbacks[oneshot->cbndx], 0);
#else
STM32_TIM_SETISR(oneshot->tch, stm32_oneshot1_handler, 0);
#endif
STM32_TIM_SETISR(oneshot->tch, stm32_oneshot_handler, oneshot, 0);
/* Set timer period */
@@ -539,7 +408,7 @@ int stm32_oneshot_cancel(struct stm32_oneshot_s *oneshot,
/* Now we can disable the interrupt and stop the timer. */
STM32_TIM_DISABLEINT(oneshot->tch, 0);
STM32_TIM_SETISR(oneshot->tch, NULL, 0);
STM32_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
STM32_TIM_SETMODE(oneshot->tch, STM32_TIM_MODE_DISABLED);
oneshot->running = false;
arch/arm/src/stm32/stm32_tim.c
+3 -3
View File
@@ -345,7 +345,7 @@ static int stm32_tim_setcompare(FAR struct stm32_tim_dev_s *dev, uint8_t channel
uint32_t compare);
static int stm32_tim_getcapture(FAR struct stm32_tim_dev_s *dev, uint8_t channel);
static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev, xcpt_t handler,
int source);
void *arg, int source);
static void stm32_tim_enableint(FAR struct stm32_tim_dev_s *dev, int source);
static void stm32_tim_disableint(FAR struct stm32_tim_dev_s *dev, int source);
static void stm32_tim_ackint(FAR struct stm32_tim_dev_s *dev, int source);
@@ -1484,7 +1484,7 @@ static int stm32_tim_getcapture(FAR struct stm32_tim_dev_s *dev, uint8_t channel
************************************************************************************/
static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev, xcpt_t handler,
int source)
void * arg, int source)
{
int vectorno;
@@ -1594,7 +1594,7 @@ static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev, xcpt_t handler,
/* Otherwise set callback and enable interrupt */
irq_attach(vectorno, handler, NULL);
irq_attach(vectorno, handler ,arg);
up_enable_irq(vectorno);
#ifdef CONFIG_ARCH_IRQPRIO
arch/arm/src/stm32/stm32_tim.h
+2 -2
View File
@@ -64,7 +64,7 @@
#define STM32_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode))
#define STM32_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
#define STM32_TIM_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch))
#define STM32_TIM_SETISR(d,hnd,s) ((d)->ops->setisr(d,hnd,s))
#define STM32_TIM_SETISR(d,hnd,arg,s) ((d)->ops->setisr(d,hnd,arg,s))
#define STM32_TIM_ENABLEINT(d,s) ((d)->ops->enableint(d,s))
#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
@@ -174,7 +174,7 @@ struct stm32_tim_ops_s
/* Timer interrupts */
int (*setisr)(FAR struct stm32_tim_dev_s *dev, xcpt_t handler, int source);
int (*setisr)(FAR struct stm32_tim_dev_s *dev, xcpt_t handler, void * arg, int source);
void (*enableint)(FAR struct stm32_tim_dev_s *dev, int source);
void (*disableint)(FAR struct stm32_tim_dev_s *dev, int source);
void (*ackint)(FAR struct stm32_tim_dev_s *dev, int source);
arch/arm/src/stm32/stm32_tim_lowerhalf.c
+7 -173
View File
@@ -109,7 +109,6 @@ struct stm32_lowerhalf_s
FAR struct stm32_tim_dev_s *tim; /* stm32 timer driver */
tccb_t callback; /* Current user interrupt callback */
FAR void *arg; /* Argument passed to upper half callback */
const xcpt_t timhandler; /* Current timer interrupt handler */
bool started; /* True: Timer has been started */
const uint8_t resolution; /* Number of bits in the timer (16 or 32 bits) */
};
@@ -117,53 +116,7 @@ struct stm32_lowerhalf_s
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* Interrupt handling *******************************************************/
#ifdef CONFIG_STM32_TIM1
static int stm32_tim1_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM2
static int stm32_tim2_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM3
static int stm32_tim3_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM4
static int stm32_tim4_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM5
static int stm32_tim5_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM6
static int stm32_tim6_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM7
static int stm32_tim7_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM8
static int stm32_tim8_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM9
static int stm32_tim9_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM10
static int stm32_tim10_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM11
static int stm32_tim11_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM12
static int stm32_tim12_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM13
static int stm32_tim13_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32_TIM14
static int stm32_tim14_interrupt(int irq, FAR void *context);
#endif
static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower);
static int stm32_timer_handler(int irq, void * context, void * arg);
/* "Lower half" driver methods **********************************************/
@@ -193,7 +146,6 @@ static const struct timer_ops_s g_timer_ops =
static struct stm32_lowerhalf_s g_tim1_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim1_interrupt,
.resolution = STM32_TIM1_RES,
};
#endif
@@ -202,7 +154,6 @@ static struct stm32_lowerhalf_s g_tim1_lowerhalf =
static struct stm32_lowerhalf_s g_tim2_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim2_interrupt,
.resolution = STM32_TIM2_RES,
};
#endif
@@ -211,7 +162,6 @@ static struct stm32_lowerhalf_s g_tim2_lowerhalf =
static struct stm32_lowerhalf_s g_tim3_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim3_interrupt,
.resolution = STM32_TIM3_RES,
};
#endif
@@ -220,7 +170,6 @@ static struct stm32_lowerhalf_s g_tim3_lowerhalf =
static struct stm32_lowerhalf_s g_tim4_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim4_interrupt,
.resolution = STM32_TIM4_RES,
};
#endif
@@ -229,7 +178,6 @@ static struct stm32_lowerhalf_s g_tim4_lowerhalf =
static struct stm32_lowerhalf_s g_tim5_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim5_interrupt,
.resolution = STM32_TIM5_RES,
};
#endif
@@ -238,7 +186,6 @@ static struct stm32_lowerhalf_s g_tim5_lowerhalf =
static struct stm32_lowerhalf_s g_tim6_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim6_interrupt,
.resolution = STM32_TIM6_RES,
};
#endif
@@ -247,7 +194,6 @@ static struct stm32_lowerhalf_s g_tim6_lowerhalf =
static struct stm32_lowerhalf_s g_tim7_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim7_interrupt,
.resolution = STM32_TIM7_RES,
};
#endif
@@ -256,7 +202,6 @@ static struct stm32_lowerhalf_s g_tim7_lowerhalf =
static struct stm32_lowerhalf_s g_tim8_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim8_interrupt,
.resolution = STM32_TIM8_RES,
};
#endif
@@ -265,7 +210,6 @@ static struct stm32_lowerhalf_s g_tim8_lowerhalf =
static struct stm32_lowerhalf_s g_tim9_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim9_interrupt,
.resolution = STM32_TIM9_RES,
};
#endif
@@ -274,7 +218,6 @@ static struct stm32_lowerhalf_s g_tim9_lowerhalf =
static struct stm32_lowerhalf_s g_tim10_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim10_interrupt,
.resolution = STM32_TIM10_RES,
};
#endif
@@ -283,7 +226,6 @@ static struct stm32_lowerhalf_s g_tim10_lowerhalf =
static struct stm32_lowerhalf_s g_tim11_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim11_interrupt,
.resolution = STM32_TIM11_RES,
};
#endif
@@ -292,7 +234,6 @@ static struct stm32_lowerhalf_s g_tim11_lowerhalf =
static struct stm32_lowerhalf_s g_tim12_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim12_interrupt,
.resolution = STM32_TIM12_RES,
};
#endif
@@ -301,7 +242,6 @@ static struct stm32_lowerhalf_s g_tim12_lowerhalf =
static struct stm32_lowerhalf_s g_tim13_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim13_interrupt,
.resolution = STM32_TIM13_RES,
};
#endif
@@ -310,7 +250,6 @@ static struct stm32_lowerhalf_s g_tim13_lowerhalf =
static struct stm32_lowerhalf_s g_tim14_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim14_interrupt,
.resolution = STM32_TIM14_RES,
};
#endif
@@ -319,112 +258,6 @@ static struct stm32_lowerhalf_s g_tim14_lowerhalf =
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_timN_interrupt, N=1..14
*
* Description:
* Individual interrupt handlers for each timer
*
****************************************************************************/
#ifdef CONFIG_STM32_TIM1
static int stm32_tim1_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim1_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM2
static int stm32_tim2_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim2_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM3
static int stm32_tim3_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim3_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM4
static int stm32_tim4_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim4_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM5
static int stm32_tim5_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim5_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM6
static int stm32_tim6_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim6_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM7
static int stm32_tim7_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim7_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM8
static int stm32_tim8_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim8_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM9
static int stm32_tim9_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim9_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM10
static int stm32_tim10_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim10_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM11
static int stm32_tim11_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim11_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM12
static int stm32_tim12_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim12_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM13
static int stm32_tim13_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim13_lowerhalf);
}
#endif
#ifdef CONFIG_STM32_TIM14
static int stm32_tim14_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim14_lowerhalf);
}
#endif
/****************************************************************************
* Name: stm32_timer_handler
*
@@ -437,8 +270,9 @@ static int stm32_tim14_interrupt(int irq, FAR void *context)
*
****************************************************************************/
static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower)
static int stm32_timer_handler(int irq, void * context, void * arg)
{
FAR struct stm32_lowerhalf_s *lower = (struct stm32_lowerhalf_s *) arg;
uint32_t next_interval_us = 0;
STM32_TIM_ACKINT(lower->tim, 0);
@@ -483,7 +317,7 @@ static int stm32_start(FAR struct timer_lowerhalf_s *lower)
if (priv->callback != NULL)
{
STM32_TIM_SETISR(priv->tim, priv->timhandler, 0);
STM32_TIM_SETISR(priv->tim, stm32_timer_handler, priv, 0);
STM32_TIM_ENABLEINT(priv->tim, 0);
}
@@ -519,7 +353,7 @@ static int stm32_stop(struct timer_lowerhalf_s *lower)
{
STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_DISABLED);
STM32_TIM_DISABLEINT(priv->tim, 0);
STM32_TIM_SETISR(priv->tim, 0, 0);
STM32_TIM_SETISR(priv->tim, NULL, NULL, 0);
priv->started = false;
return OK;
}
@@ -605,13 +439,13 @@ static void stm32_setcallback(FAR struct timer_lowerhalf_s *lower,
if (callback != NULL && priv->started)
{
STM32_TIM_SETISR(priv->tim, priv->timhandler, 0);
STM32_TIM_SETISR(priv->tim, stm32_timer_handler, priv, 0);
STM32_TIM_ENABLEINT(priv->tim, 0);
}
else
{
STM32_TIM_DISABLEINT(priv->tim, 0);
STM32_TIM_SETISR(priv->tim, 0, 0);
STM32_TIM_SETISR(priv->tim, NULL, NULL, 0);
}
leave_critical_section(flags);
arch/arm/src/stm32/stm32f40xxx_rtcc.c
+6 -6
View File
@@ -591,11 +591,11 @@ static void rtc_resume(void)
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
static int stm32_rtc_alarm_handler(int irq, void *context)
static int stm32_rtc_alarm_handler(int irq, void *context, void *arg)
{
FAR struct alm_cbinfo_s *cbinfo;
alm_callback_t cb;
FAR void *arg;
FAR void *cb_arg;
uint32_t isr;
uint32_t cr;
int ret = OK;
@@ -615,12 +615,12 @@ static int stm32_rtc_alarm_handler(int irq, void *context)
/* Alarm A callback */
cb = cbinfo->ac_cb;
arg = (FAR void *)cbinfo->ac_arg;
cb_arg = (FAR void *)cbinfo->ac_arg;
cbinfo->ac_cb = NULL;
cbinfo->ac_arg = NULL;
cb(arg, RTC_ALARMA);
cb(cb_arg, RTC_ALARMA);
}
isr = getreg32(STM32_RTC_ISR) & ~RTC_ISR_ALRAF;
@@ -640,12 +640,12 @@ static int stm32_rtc_alarm_handler(int irq, void *context)
/* Alarm B callback */
cb = cbinfo->ac_cb;
arg = (FAR void *)cbinfo->ac_arg;
cb_arg = (FAR void *)cbinfo->ac_arg;
cbinfo->ac_cb = NULL;
cbinfo->ac_arg = NULL;
cb(arg, RTC_ALARMB);
cb(cb_arg, RTC_ALARMB);
}
isr = getreg32(STM32_RTC_ISR) & ~RTC_ISR_ALRBF;
arch/arm/src/stm32f7/stm32_tim.c
+2 -2
View File
@@ -488,7 +488,7 @@ static void stm32_tim_setperiod(FAR struct stm32_tim_dev_s *dev,
}
static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev,
xcpt_t handler, int source)
xcpt_t handler, void *arg, int source)
{
int vectorno;
@@ -583,7 +583,7 @@ static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev,
/* Otherwise set callback and enable interrupt */
irq_attach(vectorno, handler, NULL);
irq_attach(vectorno, handler, arg);
up_enable_irq(vectorno);
#ifdef CONFIG_ARCH_IRQPRIO
arch/arm/src/stm32f7/stm32_tim.h
+2 -2
View File
@@ -61,7 +61,7 @@
#define STM32_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode))
#define STM32_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
#define STM32_TIM_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch))
#define STM32_TIM_SETISR(d,hnd,s) ((d)->ops->setisr(d,hnd,s))
#define STM32_TIM_SETISR(d,hnd,arg,s) ((d)->ops->setisr(d,hnd,arg,s))
#define STM32_TIM_ENABLEINT(d,s) ((d)->ops->enableint(d,s))
#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
@@ -167,7 +167,7 @@ struct stm32_tim_ops_s
/* Timer interrupts */
int (*setisr)(FAR struct stm32_tim_dev_s *dev, xcpt_t handler, int source);
int (*setisr)(FAR struct stm32_tim_dev_s *dev, xcpt_t handler, void *arg, int source);
void (*enableint)(FAR struct stm32_tim_dev_s *dev, int source);
void (*disableint)(FAR struct stm32_tim_dev_s *dev, int source);
void (*ackint)(FAR struct stm32_tim_dev_s *dev, int source);
arch/arm/src/stm32l4/stm32l4_freerun.c
+4 -13
View File
@@ -53,12 +53,6 @@
#ifdef CONFIG_STM32L4_FREERUN
/****************************************************************************
* Private Functions
****************************************************************************/
FAR static struct stm32l4_freerun_s *g_freerun;
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -81,9 +75,9 @@ FAR static struct stm32l4_freerun_s *g_freerun;
*
****************************************************************************/
static int stm32l4_freerun_handler(int irq, FAR void *context)
static int stm32l4_freerun_handler(int irq, FAR void *context, void *arg)
{
FAR struct stm32l4_freerun_s *freerun = g_freerun;
FAR struct stm32l4_freerun_s *freerun = (FAR struct stm32l4_freerun_s *) arg;
DEBUGASSERT(freerun != NULL && freerun->overflow < UINT32_MAX);
freerun->overflow++;
@@ -145,11 +139,9 @@ int stm32l4_freerun_initialize(FAR struct stm32l4_freerun_s *freerun, int chan,
freerun->running = false;
freerun->overflow = 0;
g_freerun = freerun;
/* Set up to receive the callback when the counter overflow occurs */
STM32L4_TIM_SETISR(freerun->tch, stm32l4_freerun_handler, 0);
STM32L4_TIM_SETISR(freerun->tch, stm32l4_freerun_handler, freerun, 0);
/* Set timer period */
@@ -283,14 +275,13 @@ int stm32l4_freerun_uninitialize(FAR struct stm32l4_freerun_s *freerun)
STM32L4_TIM_DISABLEINT(freerun->tch, 0);
STM32L4_TIM_SETMODE(freerun->tch, STM32L4_TIM_MODE_DISABLED);
STM32L4_TIM_SETISR(freerun->tch, NULL, 0);
STM32L4_TIM_SETISR(freerun->tch, NULL, NULL, 0);
/* Free the timer */
stm32l4_tim_deinit(freerun->tch);
freerun->tch = NULL;
g_freerun = NULL;
return OK;
}
arch/arm/src/stm32l4/stm32l4_oneshot.c
+6 -137
View File
@@ -59,29 +59,7 @@
* Private Function Prototypes
****************************************************************************/
static int stm32l4_oneshot_handler(struct stm32l4_oneshot_s *oneshot);
static int stm32l4_oneshot1_handler(int irq, void *context);
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 1
static int stm32l4_oneshot2_handler(int irq, void *context);
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 2
static int stm32l4_oneshot3_handler(int irq, void *context);
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 3
static int stm32l4_oneshot4_handler(int irq, void *context);
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 4
static int stm32l4_oneshot5_handler(int irq, void *context);
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 5
static int stm32l4_oneshot6_handler(int irq, void *context);
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 6
static int stm32l4_oneshot7_handler(int irq, void *context);
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 7
static int stm32l4_oneshot8_handler(int irq, void *context);
#endif
static int stm32l4_oneshot_handler(int irq, void *context, void *arg);
/****************************************************************************
* Private Data
@@ -89,34 +67,6 @@ static int stm32l4_oneshot8_handler(int irq, void *context);
static struct stm32l4_oneshot_s *g_oneshot[CONFIG_STM32L4_ONESHOT_MAXTIMERS];
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 1
static const xcpt_t g_callbacks[CONFIG_STM32L4_ONESHOT_MAXTIMERS] =
{
stm32l4_oneshot1_handler,
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 1
stm32l4_oneshot2_handler,
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 2
stm32l4_oneshot3_handler,
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 3
stm32l4_oneshot4_handler,
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 4
stm32l4_oneshot5_handler,
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 5
stm32l4_oneshot6_handler,
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 6
stm32l4_oneshot7_handler,
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 7
stm32l4_oneshot8_handler,
#endif
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -137,8 +87,9 @@ static const xcpt_t g_callbacks[CONFIG_STM32L4_ONESHOT_MAXTIMERS] =
*
****************************************************************************/
static int stm32l4_oneshot_handler(struct stm32l4_oneshot_s *oneshot)
static int stm32l4_oneshot_handler(int irq, void *context, void *arg)
{
struct stm32l4_oneshot_s *oneshot = (struct stm32l4_oneshot_s *) arg;
oneshot_handler_t oneshot_handler;
FAR void *oneshot_arg;
@@ -149,7 +100,7 @@ static int stm32l4_oneshot_handler(struct stm32l4_oneshot_s *oneshot)
* Disable the TC now and disable any further interrupts.
*/
STM32L4_TIM_SETISR(oneshot->tch, NULL, 0);
STM32L4_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
STM32L4_TIM_DISABLEINT(oneshot->tch, 0);
STM32L4_TIM_SETMODE(oneshot->tch, STM32L4_TIM_MODE_DISABLED);
STM32L4_TIM_ACKINT(oneshot->tch, 0);
@@ -169,84 +120,6 @@ static int stm32l4_oneshot_handler(struct stm32l4_oneshot_s *oneshot)
return OK;
}
/****************************************************************************
* Name: stm32l4_oneshot[N]_handler
*
* Description:
* Timer interrupt callbacks. When a oneshot timer interrupt expires,
* one of these functions will be called. These functions will forward
* the call to the nextlevel up.
*
* Input Parameters:
* Standard interrupt handler arguments.
*
* Returned Value:
* Always returns OK
*
****************************************************************************/
static int stm32l4_oneshot1_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[0] != NULL);
return stm32l4_oneshot_handler(g_oneshot[0]);
}
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 1
static int stm32l4_oneshot2_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[1] != NULL);
return stm32l4_oneshot_handler(g_oneshot[1]);
}
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 2
static int stm32l4_oneshot3_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[2] != NULL);
return stm32l4_oneshot_handler(g_oneshot[2]);
}
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 3
static int stm32l4_oneshot4_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[3] != NULL);
return stm32l4_oneshot_handler(g_oneshot[3]);
}
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 4
static int stm32l4_oneshot5_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[4] != NULL);
return stm32l4_oneshot_handler(g_oneshot[4]);
}
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 5
static int stm32l4_oneshot6_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[6] != NULL);
return stm32l4_oneshot_handler(g_oneshot[5]);
}
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 6
static int stm32l4_oneshot7_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[7] != NULL);
return stm32l4_oneshot_handler(g_oneshot[6]);
}
#endif
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 7
static int stm32l4_oneshot8_handler(int irq, void *context)
{
DEBUGASSERT(g_oneshot[0] != NULL);
return stm32l4_oneshot_handler(g_oneshot[7]);
}
#endif
/****************************************************************************
* Name: stm32l4_allocate_handler
*
@@ -444,11 +317,7 @@ int stm32l4_oneshot_start(FAR struct stm32l4_oneshot_s *oneshot,
/* Set up to receive the callback when the interrupt occurs */
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 1
STM32L4_TIM_SETISR(oneshot->tch, g_callbacks[oneshot->cbndx], 0);
#else
STM32L4_TIM_SETISR(oneshot->tch, stm32l4_oneshot1_handler, 0);
#endif
STM32L4_TIM_SETISR(oneshot->tch, stm32l4_oneshot_handler, oneshot, 0);
/* Set timer period */
@@ -541,7 +410,7 @@ int stm32l4_oneshot_cancel(FAR struct stm32l4_oneshot_s *oneshot,
/* Now we can disable the interrupt and stop the timer. */
STM32L4_TIM_DISABLEINT(oneshot->tch, 0);
STM32L4_TIM_SETISR(oneshot->tch, NULL, 0);
STM32L4_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
STM32L4_TIM_SETMODE(oneshot->tch, STM32L4_TIM_MODE_DISABLED);
oneshot->running = false;
arch/arm/src/stm32l4/stm32l4_tim.c
+3 -5
View File
@@ -268,8 +268,7 @@ static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev,
static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev,
uint8_t channel);
static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev,
int (*handler)(int irq, FAR void *context),
int source);
xcpt_t handler, void *arg, int source);
static void stm32l4_tim_enableint(FAR struct stm32l4_tim_dev_s *dev,
int source);
static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev,
@@ -1158,8 +1157,7 @@ static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev,
************************************************************************************/
static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev,
int (*handler)(int irq, FAR void *context),
int source)
xcpt_t handler, void *arg, int source)
{
int vectorno;
@@ -1239,7 +1237,7 @@ static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev,
/* Otherwise set callback and enable interrupt */
irq_attach(vectorno, handler, NULL);
irq_attach(vectorno, handler, arg);
up_enable_irq(vectorno);
#ifdef CONFIG_ARCH_IRQPRIO
arch/arm/src/stm32l4/stm32l4_tim.h
+2 -2
View File
@@ -63,7 +63,7 @@
#define STM32L4_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode))
#define STM32L4_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
#define STM32L4_TIM_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch))
#define STM32L4_TIM_SETISR(d,hnd,s) ((d)->ops->setisr(d,hnd,s))
#define STM32L4_TIM_SETISR(d,hnd,arg,s) ((d)->ops->setisr(d,hnd,arg,s))
#define STM32L4_TIM_ENABLEINT(d,s) ((d)->ops->enableint(d,s))
#define STM32L4_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define STM32L4_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
@@ -174,7 +174,7 @@ struct stm32l4_tim_ops_s
/* Timer interrupts */
int (*setisr)(FAR struct stm32l4_tim_dev_s *dev,
int (*handler)(int irq, void *context), int source);
xcpt_t handler, void *arg, int source);
void (*enableint)(FAR struct stm32l4_tim_dev_s *dev, int source);
void (*disableint)(FAR struct stm32l4_tim_dev_s *dev, int source);
void (*ackint)(FAR struct stm32l4_tim_dev_s *dev, int source);
arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c
+7 -137
View File
@@ -95,7 +95,6 @@ struct stm32l4_lowerhalf_s
FAR struct stm32l4_tim_dev_s *tim; /* stm32 timer driver */
tccb_t callback; /* Current upper half interrupt callback */
FAR void *arg; /* Argument passed to upper half callback */
const xcpt_t timhandler; /* Current timer interrupt handler */
bool started; /* True: Timer has been started */
const uint8_t resolution; /* Number of bits in the timer (16 or 32 bits) */
};
@@ -106,41 +105,7 @@ struct stm32l4_lowerhalf_s
/* Interrupt handling *******************************************************/
#ifdef CONFIG_STM32L4_TIM1
static int stm32l4_tim1_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM2
static int stm32l4_tim2_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM3
static int stm32l4_tim3_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM4
static int stm32l4_tim4_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM5
static int stm32l4_tim5_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM6
static int stm32l4_tim6_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM7
static int stm32l4_tim7_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM8
static int stm32l4_tim8_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM15
static int stm32l4_tim15_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM16
static int stm32l4_tim16_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM17
static int stm32l4_tim17_interrupt(int irq, FAR void *context);
#endif
static int stm32l4_timer_handler(FAR struct stm32l4_lowerhalf_s *lower);
static int stm32l4_timer_handler(int irq, void *context, void *arg);
/* "Lower half" driver methods **********************************************/
@@ -170,7 +135,6 @@ static const struct timer_ops_s g_timer_ops =
static struct stm32l4_lowerhalf_s g_tim1_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim1_interrupt,
.resolution = STM32L4_TIM1_RES,
};
#endif
@@ -179,7 +143,6 @@ static struct stm32l4_lowerhalf_s g_tim1_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim2_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim2_interrupt,
.resolution = STM32L4_TIM2_RES,
};
#endif
@@ -188,7 +151,6 @@ static struct stm32l4_lowerhalf_s g_tim2_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim3_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim3_interrupt,
.resolution = STM32L4_TIM3_RES,
};
#endif
@@ -197,7 +159,6 @@ static struct stm32l4_lowerhalf_s g_tim3_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim4_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim4_interrupt,
.resolution = STM32L4_TIM4_RES,
};
#endif
@@ -206,7 +167,6 @@ static struct stm32l4_lowerhalf_s g_tim4_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim5_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim5_interrupt,
.resolution = STM32L4_TIM5_RES,
};
#endif
@@ -215,7 +175,6 @@ static struct stm32l4_lowerhalf_s g_tim5_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim6_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim6_interrupt,
.resolution = STM32L4_TIM6_RES,
};
#endif
@@ -224,7 +183,6 @@ static struct stm32l4_lowerhalf_s g_tim6_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim7_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim7_interrupt,
.resolution = STM32L4_TIM7_RES,
};
#endif
@@ -233,7 +191,6 @@ static struct stm32l4_lowerhalf_s g_tim7_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim8_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim8_interrupt,
.resolution = STM32L4_TIM8_RES,
};
#endif
@@ -242,7 +199,6 @@ static struct stm32l4_lowerhalf_s g_tim8_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim15_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim15_interrupt,
.resolution = STM32L4_TIM15_RES,
};
#endif
@@ -251,7 +207,6 @@ static struct stm32l4_lowerhalf_s g_tim15_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim16_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim16_interrupt,
.resolution = STM32L4_TIM16_RES,
};
#endif
@@ -260,7 +215,6 @@ static struct stm32l4_lowerhalf_s g_tim16_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim17_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32l4_tim17_interrupt,
.resolution = STM32L4_TIM17_RES,
};
#endif
@@ -269,91 +223,6 @@ static struct stm32l4_lowerhalf_s g_tim17_lowerhalf =
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32l4_timN_interrupt, N=1..14
*
* Description:
* Individual interrupt handlers for each timer
*
****************************************************************************/
#ifdef CONFIG_STM32L4_TIM1
static int stm32l4_tim1_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim1_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM2
static int stm32l4_tim2_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim2_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM3
static int stm32l4_tim3_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim3_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM4
static int stm32l4_tim4_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim4_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM5
static int stm32l4_tim5_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim5_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM6
static int stm32l4_tim6_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim6_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM7
static int stm32l4_tim7_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim7_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM8
static int stm32l4_tim8_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim8_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM15
static int stm32l4_tim15_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim15_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM16
static int stm32l4_tim16_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim16_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM17
static int stm32l4_tim17_interrupt(int irq, FAR void *context)
{
return stm32l4_timer_handler(&g_tim17_lowerhalf);
}
#endif
/****************************************************************************
* Name: stm32l4_timer_handler
*
@@ -366,8 +235,9 @@ static int stm32l4_tim17_interrupt(int irq, FAR void *context)
*
****************************************************************************/
static int stm32l4_timer_handler(FAR struct stm32l4_lowerhalf_s *lower)
static int stm32l4_timer_handler(int irq, void *context, void *arg)
{
FAR struct stm32l4_lowerhalf_s *lower = (FAR struct stm32l4_lowerhalf_s *) arg;
uint32_t next_interval_us = 0;
STM32L4_TIM_ACKINT(lower->tim, 0);
@@ -412,7 +282,7 @@ static int stm32l4_start(FAR struct timer_lowerhalf_s *lower)
if (priv->callback != NULL)
{
STM32L4_TIM_SETISR(priv->tim, priv->timhandler, 0);
STM32L4_TIM_SETISR(priv->tim, stm32l4_timer_handler, priv, 0);
STM32L4_TIM_ENABLEINT(priv->tim, 0);
}
@@ -448,7 +318,7 @@ static int stm32l4_stop(FAR struct timer_lowerhalf_s *lower)
{
STM32L4_TIM_SETMODE(priv->tim, STM32L4_TIM_MODE_DISABLED);
STM32L4_TIM_DISABLEINT(priv->tim, 0);
STM32L4_TIM_SETISR(priv->tim, 0, 0);
STM32L4_TIM_SETISR(priv->tim, NULL, NULL, 0);
priv->started = false;
return OK;
}
@@ -534,13 +404,13 @@ static void stm32l4_setcallback(FAR struct timer_lowerhalf_s *lower,
if (callback != NULL && priv->started)
{
STM32L4_TIM_SETISR(priv->tim, priv->timhandler, 0);
STM32L4_TIM_SETISR(priv->tim, stm32l4_timer_handler, priv, 0);
STM32L4_TIM_ENABLEINT(priv->tim, 0);
}
else
{
STM32L4_TIM_DISABLEINT(priv->tim, 0);
STM32L4_TIM_SETISR(priv->tim, 0, 0);
STM32L4_TIM_SETISR(priv->tim, NULL, NULL, 0);
}
leave_critical_section(flags);
arch/risc-v/src/nr5m100/nr5_timer.c
+2 -3
View File
@@ -202,8 +202,7 @@ static void nr5_timer_setperiod(FAR struct nr5_timer_dev_s *dev,
}
static int nr5_timer_setisr(FAR struct nr5_timer_dev_s *dev,
int (*handler)(int irq, void *context),
int source)
xcpt_t handler, void * arg, int source)
{
int vectorno;
@@ -275,7 +274,7 @@ static int nr5_timer_setisr(FAR struct nr5_timer_dev_s *dev,
/* Otherwise set callback and enable interrupt */
irq_attach(vectorno, handler, NULL);
irq_attach(vectorno, handler, arg);
up_enable_irq(vectorno);
#ifdef CONFIG_ARCH_IRQPRIO
arch/risc-v/src/nr5m100/nr5_timer.h
+2 -2
View File
@@ -56,7 +56,7 @@
#define NR5_TIMER_SETCLOCK(d,freq) ((d)->ops->setclock(d,freq))
#define NR5_TIMER_SETPERIOD(d,period) ((d)->ops->setperiod(d,period))
#define NR5_TIMER_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
#define NR5_TIMER_SETISR(d,hnd,s) ((d)->ops->setisr(d,hnd,s))
#define NR5_TIMER_SETISR(d,hnd,arg,s) ((d)->ops->setisr(d,hnd,arg,s))
#define NR5_TIMER_ENABLEINT(d,s) ((d)->ops->enableint(d,s))
#define NR5_TIMER_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define NR5_TIMER_ACKINT(d,s) ((d)->ops->ackint(d,s))
@@ -112,7 +112,7 @@ struct nr5_timer_ops_s
/* Timer Interrupt Operations */
int (*setisr)(FAR struct nr5_timer_dev_s *dev, int (*handler)(int irq, void *context), int source);
int (*setisr)(FAR struct nr5_timer_dev_s *dev, xcpt_t handler, void *arg, int source);
void (*enableint)(FAR struct nr5_timer_dev_s *dev, int source);
void (*disableint)(FAR struct nr5_timer_dev_s *dev, int source);
void (*ackint)(FAR struct nr5_timer_dev_s *dev, int source);
configs/maple/src/stm32_lcd.c
+5 -5
View File
@@ -80,7 +80,7 @@ static xcpt_t g_isr;
* Private Functions
****************************************************************************/
static int up_lcdextcominisr(int irq, void *context)
static int up_lcdextcominisr(int irq, void *context, void *arg)
{
STM32_TIM_ACKINT(tim, 0);
if (g_isr == NULL)
@@ -90,21 +90,21 @@ static int up_lcdextcominisr(int irq, void *context)
return OK;
}
return g_isr(irq, context, NULL);
return g_isr(irq, context, arg);
}
static int up_lcdirqattach(xcpt_t isr)
static int up_lcdirqattach(xcpt_t isr, void * arg)
{
lcdinfo("%s IRQ\n", isr == NULL ? "Detach" : "Attach");
if (isr != NULL)
{
STM32_TIM_SETISR(tim, up_lcdextcominisr, 0);
STM32_TIM_SETISR(tim, up_lcdextcominisr, arg, 0);
g_isr = isr;
}
else
{
STM32_TIM_SETISR(tim, NULL, 0);
STM32_TIM_SETISR(tim, NULL, NULL, 0);
g_isr = NULL;
}
configs/olimexino-stm32/src/stm32_boot.c
+1 -1
View File
@@ -58,7 +58,7 @@
************************************************************************************/
#if defined(CONFIG_USBDEV)
static int vbus_handler(int irq, FAR void *context)
static int vbus_handler(int irq, FAR void *context, FAR void *arg)
{
return OK;
}
configs/pic32mx-starterkit/README.txt
+1 -1
View File
@@ -982,7 +982,7 @@ PIC32MX Configuration Options
PIC32MX specific PHY/Ethernet device driver settings
CONFIG_ETH0_PHY_KS8721 - Selects the Micrel KS8721 PHY
CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconduction DP83848C PHY
CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconductor DP83848C PHY
CONFIG_ETH0_PHY_LAN8720 - Selects the SMSC LAN8720 PHY
CONFIG_PHY_AUTONEG - Enable auto-negotion
CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed.
configs/pic32mx7mmb/README.txt
+1 -1
View File
@@ -560,7 +560,7 @@ PIC32MX Configuration Options
PIC32MX specific PHY/Ethernet device driver settings
CONFIG_ETH0_PHY_KS8721 - Selects the Micrel KS8721 PHY
CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconduction DP83848C PHY
CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconductor DP83848C PHY
CONFIG_ETH0_PHY_LAN8720 - Selects the SMSC LAN8720 PHY
CONFIG_PHY_AUTONEG - Enable auto-negotion
CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed.
configs/shenzhou/src/stm32_boot.c
+1 -1
View File
@@ -64,7 +64,7 @@
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
configs/shenzhou/src/stm32_usb.c
+1 -1
View File
@@ -54,7 +54,7 @@
#include "up_arch.h"
#include "stm32.h"
#include "stm32_otgfs.h"
#include "shenshou.h"
#include "shenzhou.h"
#ifdef CONFIG_STM32_OTGFS
configs/stm3210e-eval/src/stm32_idle.c
+1 -1
View File
@@ -159,7 +159,7 @@ static void stm32_alarmcb(void)
****************************************************************************/
#if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM)
static int stm32_alarm_exti(int irq, FAR void *context)
static int stm32_alarm_exti(int irq, FAR void *context, FAR void *arg)
{
stm32_alarmcb();
return OK;
configs/stm3210e-eval/src/stm32_pmbuttons.c
+4 -133
View File
@@ -136,75 +136,11 @@
* Private Function Prototypes
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
static void button_handler(int id, int irq);
#if MIN_BUTTON < 1
static int button0_handler(int irq, FAR void *context);
#endif
#if MIN_BUTTON < 2 && MAX_BUTTON > 0
static int button1_handler(int irq, FAR void *context);
#endif
#if MIN_BUTTON < 3 && MAX_BUTTON > 1
static int button2_handler(int irq, FAR void *context);
#endif
#if MIN_BUTTON < 4 && MAX_BUTTON > 2
static int button3_handler(int irq, FAR void *context);
#endif
#if MIN_BUTTON < 5 && MAX_BUTTON > 3
static int button4_handler(int irq, FAR void *context);
#endif
#if MIN_BUTTON < 6 && MAX_BUTTON > 4
static int button5_handler(int irq, FAR void *context);
#endif
#if MIN_BUTTON < 7 && MAX_BUTTON > 5
static int button6_handler(int irq, FAR void *context);
#endif
#if MAX_BUTTON > 6
static int button7_handler(int irq, FAR void *context);
#endif
#endif /* CONFIG_ARCH_IRQBUTTONS */
/****************************************************************************
* Private Data
****************************************************************************/
/* Button interrupt handlers */
#ifdef CONFIG_ARCH_IRQBUTTONS
static const xcpt_t g_buttonhandlers[NUM_PMBUTTONS] =
{
#if MIN_BUTTON < 1
button0_handler,
#endif
#if MIN_BUTTON < 2 && MAX_BUTTON > 0
button1_handler,
#endif
#if MIN_BUTTON < 3 && MAX_BUTTON > 1
button2_handler,
#endif
#if MIN_BUTTON < 4 && MAX_BUTTON > 2
button3_handler,
#endif
#if MIN_BUTTON < 5 && MAX_BUTTON > 3
button4_handler,
#endif
#if MIN_BUTTON < 6 && MAX_BUTTON > 4
button5_handler,
#endif
#if MIN_BUTTON < 7 && MAX_BUTTON > 5
button6_handler,
#endif
#if MAX_BUTTON > 6
button7_handler,
#endif
};
#endif /* CONFIG_ARCH_IRQBUTTONS */
/****************************************************************************
* Private Functions
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
/****************************************************************************
* Name: button_handler
*
@@ -212,9 +148,7 @@ static const xcpt_t g_buttonhandlers[NUM_PMBUTTONS] =
* Handle a button wake-up interrupt
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
static void button_handler(int id, int irq)
static int button_handler(int irq, FAR void *context, FAR void *arg)
{
/* At this point the MCU should have already awakened. The state
* change will be handled in the IDLE loop when the system is re-awakened
@@ -224,71 +158,8 @@ static void button_handler(int id, int irq)
*/
pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_BUTTON_ACTIVITY);
return 0;
}
#if MIN_BUTTON < 1
static int button0_handler(int irq, FAR void *context)
{
button_handler(0, irq);
return OK;
}
#endif
#if MIN_BUTTON < 2 && MAX_BUTTON > 0
static int button1_handler(int irq, FAR void *context)
{
button_handler(1, irq);
return OK;
}
#endif
#if MIN_BUTTON < 3 && MAX_BUTTON > 1
static int button2_handler(int irq, FAR void *context)
{
button_handler(2, irq);
return OK;
}
#endif
#if MIN_BUTTON < 4 && MAX_BUTTON > 2
static int button3_handler(int irq, FAR void *context)
{
button_handler(3, irq);
return OK;
}
#endif
#if MIN_BUTTON < 5 && MAX_BUTTON > 3
static int button4_handler(int irq, FAR void *context)
{
button_handler(4, irq);
return OK;
}
#endif
#if MIN_BUTTON < 6 && MAX_BUTTON > 4
static int button5_handler(int irq, FAR void *context)
{
button_handler(5, irq);
return OK;
}
#endif
#if MIN_BUTTON < 7 && MAX_BUTTON > 5
static int button6_handler(int irq, FAR void *context)
{
button_handler(6, irq);
return OK;
}
#endif
#if MAX_BUTTON > 6
static int button7_handler(int irq, FAR void *context)
{
button_handler(7, irq);
return OK;
}
#endif
#endif /* CONFIG_ARCH_IRQBUTTONS */
/****************************************************************************
@@ -315,7 +186,7 @@ void stm32_pmbuttons(void)
for (i = CONFIG_PM_IRQBUTTONS_MIN; i <= CONFIG_PM_IRQBUTTONS_MAX; i++)
{
xcpt_t oldhandler =
board_button_irq(i, g_buttonhandlers[BUTTON_INDEX(i)], NULL);
board_button_irq(i, button_handler, (void*) i);
if (oldhandler != NULL)
{
configs/stm32f4discovery/src/stm32_sdio.c
+1 -1
View File
@@ -86,7 +86,7 @@ static bool g_sd_inserted = 0xff; /* Impossible value */
****************************************************************************/
#ifdef HAVE_NCD
static int stm32_ncd_interrupt(int irq, FAR void *context)
static int stm32_ncd_interrupt(int irq, FAR void *context, FAR void *arg)
{
bool present;
drivers/lcd/memlcd.c
+2 -2
View File
@@ -376,7 +376,7 @@ static inline void memlcd_clear(FAR struct memlcd_dev_s *mlcd)
*
****************************************************************************/
static int memlcd_extcominisr(int irq, FAR void *context)
static int memlcd_extcominisr(int irq, FAR void *context, void *arg)
{
static bool pol = 0;
struct memlcd_dev_s *mlcd = &g_memlcddev;
@@ -723,7 +723,7 @@ FAR struct lcd_dev_s *memlcd_initialize(FAR struct spi_dev_s *spi,
mlcd->priv = priv;
mlcd->spi = spi;
mlcd->priv->attachirq(memlcd_extcominisr);
mlcd->priv->attachirq(memlcd_extcominisr, mlcd);
lcdinfo("done\n");
return &mlcd->dev;
drivers/net/Kconfig
+2 -2
View File
@@ -503,7 +503,7 @@ config ETH0_PHY_KSZ90x1
bool "Micrel KSZ9021/31 PHY"
config ETH0_PHY_DP83848C
bool "National Semiconduction DP83848C PHY"
bool "National Semiconductor DP83848C PHY"
config ETH0_PHY_LAN8720
bool "SMSC LAN8720 PHY"
@@ -552,7 +552,7 @@ config ETH1_PHY_KSZ90x1
bool "Micrel KSZ9021/31 PHY"
config ETH1_PHY_DP83848C
bool "National Semiconduction DP83848C PHY"
bool "National Semiconductor DP83848C PHY"
config ETH1_PHY_LAN8720
bool "SMSC LAN8720 PHY"
drivers/spi/spi_transfer.c
+3 -3
View File
@@ -90,7 +90,7 @@ int spi_transfer(FAR struct spi_dev_s *spi, FAR struct spi_sequence_s *seq)
ret = SPI_SETDELAY(spi, seq->a, seq->b, seq->c);
if (ret < 0)
{
spierr("ERROR: SPI_SETDELAY failed: %d\n", ret)
spierr("ERROR: SPI_SETDELAY failed: %d\n", ret);
SPI_LOCK(spi, false);
return ret;
}
@@ -115,7 +115,7 @@ int spi_transfer(FAR struct spi_dev_s *spi, FAR struct spi_sequence_s *seq)
ret = SPI_HWFEATURES(spi, trans->hwfeat);
if (ret < 0)
{
spierr("ERROR: SPI_HWFEATURES failed: %d\n", ret)
spierr("ERROR: SPI_HWFEATURES failed: %d\n", ret);
break;
}
#endif
@@ -124,7 +124,7 @@ int spi_transfer(FAR struct spi_dev_s *spi, FAR struct spi_sequence_s *seq)
ret = SPI_CMDDATA(spi, seq->dev, trans->cmd);
if (ret < 0)
{
spierr("ERROR: SPI_CMDDATA failed: %d\n", ret)
spierr("ERROR: SPI_CMDDATA failed: %d\n", ret);
break;
}
#endif
fs/driver/Make.defs
-3
View File
@@ -44,11 +44,8 @@ CSRCS += fs_registerdriver.c fs_unregisterdriver.c
ifneq ($(CONFIG_DISABLE_MOUNTPOINT),y)
CSRCS += fs_registerblockdriver.c fs_unregisterblockdriver.c
CSRCS += fs_findblockdriver.c fs_openblockdriver.c fs_closeblockdriver.c
ifneq ($(CONFIG_DISABLE_PSEUDOFS_OPERATIONS),y)
CSRCS += fs_blockproxy.c
endif
endif
# Include driver build support
fs/driver/driver.h
+1 -2
View File
@@ -118,8 +118,7 @@ int find_blockdriver(FAR const char *pathname, int mountflags,
*
****************************************************************************/
#if !defined(CONFIG_DISABLE_PSEUDOFS_OPERATIONS) && \
!defined(CONFIG_DISABLE_MOUNTPOINT)
#if !defined(CONFIG_DISABLE_MOUNTPOINT)
int block_proxy(FAR const char *blkdev, int oflags);
#endif
fs/driver/fs_blockproxy.c
+2 -3
View File
@@ -55,8 +55,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/drivers/drivers.h>
#if !defined(CONFIG_DISABLE_PSEUDOFS_OPERATIONS) && \
!defined(CONFIG_DISABLE_MOUNTPOINT)
#if !defined(CONFIG_DISABLE_MOUNTPOINT)
/****************************************************************************
* Private Data
@@ -231,4 +230,4 @@ errout_with_chardev:
return ret;
}
#endif /* !CONFIG_DISABLE_PSEUDOFS_OPERATIONS && !CONFIG_DISABLE_MOUNTPOINT */
#endif /* !CONFIG_DISABLE_MOUNTPOINT */
fs/vfs/fs_open.c
+1 -2
View File
@@ -140,8 +140,7 @@ int open(const char *path, int oflags, ...)
inode = desc.node;
DEBUGASSERT(inode != NULL);
#if !defined(CONFIG_DISABLE_PSEUDOFS_OPERATIONS) && \
!defined(CONFIG_DISABLE_MOUNTPOINT)
#if !defined(CONFIG_DISABLE_MOUNTPOINT)
/* If the inode is block driver, then we may return a character driver
* proxy for the block driver. block_proxy() will instantiate a BCH
* character driver wrapper around the block driver, open(), then
include/nuttx/lcd/memlcd.h
+1 -1
View File
@@ -81,7 +81,7 @@ struct memlcd_priv_s
* setvcomfreq - Set timer frequency for EXTCOMIN.
*/
int (*attachirq) (xcpt_t isr);
int (*attachirq) (xcpt_t isr, void *arg);
void (*dispcontrol) (bool on);
#ifndef CONFIG_MEMLCD_EXTCOMIN_MODE_HW
void (*setpolarity) (bool pol);
net/iob/iob_clone.c
+1 -1
View File
@@ -146,7 +146,7 @@ int iob_clone(FAR struct iob_s *iob1, FAR struct iob_s *iob2, bool throttled)
iob1 = iob1->io_flink;
}
while (iob1->io_len <= 0);
while (iob1 && iob1->io_len <= 0);
/* Reset the offset to the beginning of the I/O buffer */