arch/risc-v/espressif: Add LPSPI and SPI3 support

Add LPSPI and SPI3 support for esp32[-p4]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>

arch/risc-v/src/common/espressif/Kconfig

@@ -1793,6 +1793,22 @@ config ESPRESSIF_SPI2
 	select SPI
 	select ESPRESSIF_SPI_PERIPH
 
+config ESPRESSIF_SPI3
+	bool "SPI 3"
+	depends on ARCH_CHIP_ESP32P4
+	default n
+	select ESPRESSIF_SPI
+	select SPI
+	select ESPRESSIF_SPI_PERIPH
+
+config ESPRESSIF_LPSPI0
+	bool "LP SPI"
+	depends on ARCH_CHIP_ESP32P4
+	default n
+	select ESPRESSIF_SPI
+	select SPI
+	select ESPRESSIF_SPI_PERIPH
+
 config ESPRESSIF_SPI_BITBANG
 	bool "SPI Bitbang"
 	default n
@@ -3388,6 +3404,104 @@ config ESPRESSIF_SPI2_MISOPIN
 
 endif # ESPRESSIF_SPI2
 
+if ESPRESSIF_SPI3
+
+config ESPRESSIF_SPI3_DMA
+	bool "SPI3 use GDMA"
+	default n
+	depends on ESPRESSIF_DMA
+	---help---
+		Enable support for transfers using the GDMA engine.
+
+config ESPRESSIF_SPI3_DMADESC_NUM
+	int "SPI3 Master GDMA maximum number of descriptors"
+	default 2
+	depends on ESPRESSIF_SPI3_DMA
+	---help---
+		Configure the maximum number of out-link/in-link descriptors to
+		be chained for a GDMA transfer.
+
+config ESPRESSIF_SPI3_DMATHRESHOLD
+	int "SPI3 GDMA threshold"
+	default 64
+	depends on ESPRESSIF_SPI3_DMA
+	---help---
+		When SPI GDMA is enabled, GDMA transfers whose size are below the
+		defined threshold will be performed by polling logic.
+
+choice ESPRESSIF_SPI3_MODE
+	prompt "SPI3 mode"
+	default ESPRESSIF_SPI3_MODE_MASTER
+
+config ESPRESSIF_SPI3_MODE_MASTER
+	bool "SPI3 Master mode"
+	depends on SPI_DRIVER
+	---help---
+		Configure SPI3 to operate in Master mode.
+
+config ESPRESSIF_SPI3_SLAVE
+	bool "SPI3 Slave mode"
+	depends on SPI_SLAVE
+	select ESPRESSIF_GPIO_IRQ
+	select ESPRESSIF_SPI_SLAVE
+	---help---
+		Configure SPI3 to operate in Slave mode.
+
+endchoice # ESPRESSIF_SPI3_MODE
+
+config ESPRESSIF_SPI3_SLAVE_BUFSIZE
+	int "SPI3 Slave buffer size"
+	default 2048
+	depends on ESPRESSIF_SPI3_SLAVE
+	---help---
+		Configure the size of SPI3 Slave controller's internal buffers.
+
+config ESPRESSIF_SPI3_CSPIN
+	int "SPI3 CS Pin"
+	default 20 if ARCH_CHIP_ESP32P4
+	range 0 54 if ARCH_CHIP_ESP32P4
+
+config ESPRESSIF_SPI3_CLKPIN
+	int "SPI3 CLK Pin"
+	default 22 if ARCH_CHIP_ESP32P4
+	range 0 54 if ARCH_CHIP_ESP32P4
+
+config ESPRESSIF_SPI3_MOSIPIN
+	int "SPI3 MOSI Pin"
+	default 21 if ARCH_CHIP_ESP32P4
+	range 0 54 if ARCH_CHIP_ESP32P4
+
+config ESPRESSIF_SPI3_MISOPIN
+	int "SPI3 MISO Pin"
+	default 27 if ARCH_CHIP_ESP32P4
+	range 0 54 if ARCH_CHIP_ESP32P4
+
+endif # ESPRESSIF_SPI3
+
+if ESPRESSIF_LPSPI0
+
+config ESPRESSIF_LPSPI0_CSPIN
+	int "LP SPI CS Pin"
+	default 4 if ARCH_CHIP_ESP32P4
+	range 0 15 if ARCH_CHIP_ESP32P4
+
+config ESPRESSIF_LPSPI0_CLKPIN
+	int "LP SPI CLK Pin"
+	default 8 if ARCH_CHIP_ESP32P4
+	range 0 15 if ARCH_CHIP_ESP32P4
+
+config ESPRESSIF_LPSPI0_MOSIPIN
+	int "LP SPI MOSI Pin"
+	default 7 if ARCH_CHIP_ESP32P4
+	range 0 15 if ARCH_CHIP_ESP32P4
+
+config ESPRESSIF_LPSPI0_MISOPIN
+	int "LP SPI MISO Pin"
+	default 6 if ARCH_CHIP_ESP32P4
+	range 0 15 if ARCH_CHIP_ESP32P4
+
+endif # ESPRESSIF_LPSPI0
+
 if ESPRESSIF_SPI_BITBANG
 
 choice ESPRESSIF_SPI_BITBANG_OPERATION_MODE

arch/risc-v/src/common/espressif/esp_spi.h

@@ -49,6 +49,8 @@ extern "C"
 #include <nuttx/spi/spi.h>
 
 #define ESPRESSIF_SPI2 2
+#define ESPRESSIF_SPI3 3
+#define ESPRESSIF_LPSPI0 0
 
 /****************************************************************************
  * Public Function Prototypes
@@ -71,25 +73,25 @@ extern "C"
 struct spi_dev_s *esp_spibus_initialize(int port);
 
 /****************************************************************************
- * Name:  esp_spi[2]_select and esp_spi[2]_status
+ * Name:  esp_spi[2|3]_select and esp_spi[2|3]_status
  *
  * Description:
- *   The external functions, esp_spi[2]_select,
- *   esp_spi[2]_status, and esp_spi[2]_cmddata must be provided
+ *   The external functions, esp_spi[2|3]_select,
+ *   esp_spi[2|3]_status, and esp_spi[2|3]_cmddata must be provided
  *   by board-specific logic.
  *   These are implementations of the select, status, and cmddata methods of
  *   the SPI interface defined by struct spi_ops_s (include/nuttx/spi/spi.h).
  *   All other methods (including esp_spibus_initialize()) are provided
- *   by common ESP32-S3 logic. To use this common SPI logic on your board:
+ *   by common ESP logic. To use this common SPI logic on your board:
  *
  *   1. Provide logic in esp_board_initialize() to configure SPI chip
  *      select pins.
- *   2. Provide esp_spi[2]_select() and esp_spi[2]_status()
+ *   2. Provide esp_spi[2|3]_select() and esp_spi[2|3]_status()
  *      functions in your board-specific logic. These functions will perform
  *      chip selection and status operations using GPIOs in the way your
  *      board is configured.
  *   3. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration file,
- *      then provide esp_spi[2]_cmddata() functions in your
+ *      then provide esp_spi[2|3]_cmddata() functions in your
  *      board-specific logic. These functions will perform cmd/data selection
  *      operations using GPIOs in the way your board is configured.
  *   4. Add a call to esp_spibus_initialize() in your low level
@@ -110,6 +112,15 @@ int esp_spi2_cmddata(struct spi_dev_s *dev,
                          bool cmd);
 #endif
 
+#ifdef CONFIG_ESPRESSIF_SPI3
+void esp_spi3_select(struct spi_dev_s *dev, uint32_t devid,
+                     bool selected);
+uint8_t esp_spi3_status(struct spi_dev_s *dev, uint32_t devid);
+int esp_spi3_cmddata(struct spi_dev_s *dev,
+                     uint32_t devid,
+                     bool cmd);
+#endif
+
 /****************************************************************************
  * Name: esp_spibus_uninitialize
  *

arch/risc-v/src/common/espressif/esp_spi_slave.c

@@ -73,9 +73,17 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define SPI_SLAVE_BUFSIZE (CONFIG_ESPRESSIF_SPI2_SLAVE_BUFSIZE)
+#if defined(CONFIG_ESPRESSIF_SPI2_DMA) || defined(CONFIG_ESPRESSIF_SPI3_DMA)
+#  define USE_DMA 1
+#endif
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef CONFIG_ESPRESSIF_SPI2_SLAVE
+#  define SPI_SLAVE_BUFSIZE CONFIG_ESPRESSIF_SPI2_SLAVE_BUFSIZE
+#else
+#  define SPI_SLAVE_BUFSIZE CONFIG_ESPRESSIF_SPI3_SLAVE_BUFSIZE
+#endif
+
+#ifdef USE_DMA
 /* SPI DMA RX/TX number of descriptors */
 
 #if (SPI_SLAVE_BUFSIZE % DMA_DESCRIPTOR_BUFFER_MAX_SIZE_4B_ALIGNED) > 0
@@ -84,7 +92,7 @@
 #  define SPI_DMA_DESC_NUM (SPI_SLAVE_BUFSIZE / DMA_DESCRIPTOR_BUFFER_MAX_SIZE_4B_ALIGNED)
 #endif
 
-#endif /* CONFIG_ESPRESSIF_SPI2_DMA */
+#endif /* USE_DMA */
 
 /* Verify whether SPI has been assigned IOMUX pins.
  * Otherwise, SPI signals will be routed via GPIO Matrix.
@@ -193,9 +201,11 @@ struct spislave_priv_s
   int refs;                     /* Reference count */
   int cpuint;                   /* SPI interrupt ID */
   enum spi_slave_mode_e mode;   /* Current SPI Slave hardware mode */
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
-  gdma_channel_handle_t dma_channel_tx; /* I2S DMA TX channel being used */
-  gdma_channel_handle_t dma_channel_rx; /* I2S DMA RX channel being used */
+#ifdef USE_DMA
+  gdma_channel_handle_t dma_channel_tx; /* SPI DMA TX channel being used */
+  gdma_channel_handle_t dma_channel_rx; /* SPI DMA RX channel being used */
+  spi_dma_desc_t *dma_rxdesc;           /* DMA RX description */
+  spi_dma_desc_t *dma_txdesc;           /* DMA TX description */
 #endif
   uint8_t nbits;                /* Current configured bit width */
   uint32_t tx_length;           /* Location of next TX value */
@@ -208,8 +218,9 @@ struct spislave_priv_s
   /* SPI Slave RX queue buffer */
 
   uint8_t rx_buffer[SPI_SLAVE_BUFSIZE];
+  uint32_t buf_size;           /* SPI DMA Buffer size in bytes */
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
   /* SPI Slave DMA RX buffer - separate from user-accessible buffer */
 
   uint8_t *dma_rx_buffer;
@@ -235,14 +246,14 @@ struct spislave_priv_s
 
 /* SPI Slave controller buffer operations */
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
 static uint32_t spi_slave_common_dma_setup(int chan, bool tx,
                                            spi_dma_desc_t *dmadesc,
                                            uint32_t num, uint8_t *pbuf,
                                            uint32_t len);
 #endif
 
-#ifndef CONFIG_ESPRESSIF_SPI2_DMA
+#ifndef USE_DMA
 static inline void spislave_cpu_tx_fifo_reset(spi_dev_t *hw);
 #else
 static inline void spislave_dma_tx_fifo_reset(spi_dev_t *hw);
@@ -259,7 +270,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg);
 static void spislave_evict_sent_data(struct spislave_priv_s *priv,
                                      uint32_t sent_bytes);
 static inline void spislave_hal_store_result(spi_slave_hal_context_t *hal);
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
 static void spislave_setup_rx_dma(struct spislave_priv_s *priv);
 static void spislave_setup_tx_dma(struct spislave_priv_s *priv);
 static void spislave_prepare_next_tx(struct spislave_priv_s *priv);
@@ -286,6 +297,16 @@ static size_t spislave_qpoll(struct spi_slave_ctrlr_s *ctrlr);
  ****************************************************************************/
 
 #ifdef CONFIG_ESPRESSIF_SPI2
+
+#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+
+/* SPI DMA RX/TX description */
+
+static spi_dma_desc_t dma_rxdesc[SPI_DMA_DESC_NUM];
+static spi_dma_desc_t dma_txdesc[SPI_DMA_DESC_NUM];
+
+#endif
+
 static const struct spislave_config_s esp_spi2slave_config =
 {
   .width        = SPI_SLAVE_DEFAULT_WIDTH,
@@ -326,6 +347,8 @@ static struct spislave_priv_s esp_spi2slave_priv =
                     0
                   },
 #ifdef CONFIG_ESPRESSIF_SPI2_DMA
+  .dma_rxdesc    = dma_rxdesc,
+  .dma_txdesc    = dma_txdesc,
   .dma_rx_buffer = NULL,
 #endif
   .is_processing = false,
@@ -341,15 +364,74 @@ static struct spislave_priv_s esp_spi2slave_priv =
 };
 #endif /* CONFIG_ESPRESSIF_SPI2 */
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef CONFIG_ESPRESSIF_SPI3
+
+#ifdef CONFIG_ESPRESSIF_SPI3_DMA
 
 /* SPI DMA RX/TX description */
 
-static spi_dma_desc_t dma_rxdesc[SPI_DMA_DESC_NUM];
-static spi_dma_desc_t dma_txdesc[SPI_DMA_DESC_NUM];
+static spi_dma_desc_t spi3_dma_rxdesc[SPI_DMA_DESC_NUM];
+static spi_dma_desc_t spi3_dma_txdesc[SPI_DMA_DESC_NUM];
 
 #endif
 
+static const struct spislave_config_s esp_spi3slave_config =
+{
+  .width        = SPI_SLAVE_DEFAULT_WIDTH,
+  .mode         = SPI_SLAVE_DEFAULT_MODE,
+  .cs_pin       = CONFIG_ESPRESSIF_SPI3_CSPIN,
+  .mosi_pin     = CONFIG_ESPRESSIF_SPI3_MOSIPIN,
+  .miso_pin     = CONFIG_ESPRESSIF_SPI3_MISOPIN,
+  .clk_pin      = CONFIG_ESPRESSIF_SPI3_CLKPIN,
+};
+
+static const struct spi_slave_ctrlrops_s esp_spi3slave_ops =
+{
+  .bind     = spislave_bind,
+  .unbind   = spislave_unbind,
+  .enqueue  = spislave_enqueue,
+  .qfull    = spislave_qfull,
+  .qflush   = spislave_qflush,
+  .qpoll    = spislave_qpoll
+};
+
+static struct spislave_priv_s esp_spi3slave_priv =
+{
+  .ctrlr         =
+                  {
+                    .ops = &esp_spi3slave_ops
+                  },
+  .dev           = NULL,
+  .config        = &esp_spi3slave_config,
+  .refs          = 0,
+  .cpuint        = -ENOMEM,
+  .mode          = SPISLAVE_MODE0,
+  .nbits         = 0,
+  .tx_length     = 0,
+  .tx_buffer     = NULL,
+  .rx_length     = 0,
+  .rx_buffer     =
+                  {
+                    0
+                  },
+#ifdef CONFIG_ESPRESSIF_SPI3_DMA
+  .dma_rxdesc    = spi3_dma_rxdesc,
+  .dma_txdesc    = spi3_dma_txdesc,
+  .dma_rx_buffer = NULL,
+#endif
+  .is_processing = false,
+  .is_tx_enabled = false,
+  .ctx =
+          {
+            0
+          },
+  .cfg =
+          {
+            .host_id = SPI3_HOST,
+          }
+};
+#endif /* CONFIG_ESPRESSIF_SPI3 */
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -373,7 +455,7 @@ static spi_dma_desc_t dma_txdesc[SPI_DMA_DESC_NUM];
  *
  ****************************************************************************/
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
 static uint32_t spi_slave_common_dma_setup(int chan, bool tx,
                                            spi_dma_desc_t *dmadesc,
                                            uint32_t num, uint8_t *pbuf,
@@ -489,7 +571,7 @@ static inline void spislave_hal_store_result(spi_slave_hal_context_t *hal)
  *
  ****************************************************************************/
 
-#ifndef CONFIG_ESPRESSIF_SPI2_DMA
+#ifndef USE_DMA
 static inline void spislave_cpu_tx_fifo_reset(spi_dev_t *hw)
 {
   spi_ll_cpu_tx_fifo_reset(hw);
@@ -511,7 +593,7 @@ static inline void spislave_cpu_tx_fifo_reset(spi_dev_t *hw)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
 static inline void spislave_dma_tx_fifo_reset(spi_dev_t *hw)
 {
   spi_ll_dma_tx_fifo_reset(hw);
@@ -533,7 +615,7 @@ static inline void spislave_dma_tx_fifo_reset(spi_dev_t *hw)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
 static inline void spislave_dma_rx_fifo_reset(spi_dev_t *hw)
 {
   spi_ll_dma_rx_fifo_reset(hw);
@@ -622,7 +704,7 @@ static void spislave_evict_sent_data(struct spislave_priv_s *priv,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
 static void spislave_setup_rx_dma(struct spislave_priv_s *priv)
 {
   uint32_t length = SPI_SLAVE_BUFSIZE;
@@ -630,7 +712,7 @@ static void spislave_setup_rx_dma(struct spislave_priv_s *priv)
 
   gdma_get_group_channel_id(priv->dma_channel_rx, NULL, &rx_dma_channel_id);
 
-  spi_slave_common_dma_setup(rx_dma_channel_id, false, dma_rxdesc,
+  spi_slave_common_dma_setup(rx_dma_channel_id, false, priv->dma_rxdesc,
                              SPI_DMA_DESC_NUM,
                              priv->dma_rx_buffer, length);
 
@@ -648,7 +730,7 @@ static void spislave_setup_rx_dma(struct spislave_priv_s *priv)
 
   spi_ll_dma_rx_enable(priv->ctx.hw, true);
 
-  spi_dma_start(priv->dma_channel_rx, dma_rxdesc);
+  spi_dma_start(priv->dma_channel_rx, priv->dma_rxdesc);
 }
 #endif
 
@@ -667,7 +749,7 @@ static void spislave_setup_rx_dma(struct spislave_priv_s *priv)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
 static void spislave_setup_tx_dma(struct spislave_priv_s *priv)
 {
   int tx_dma_channel_id;
@@ -684,7 +766,7 @@ static void spislave_setup_tx_dma(struct spislave_priv_s *priv)
       gdma_get_group_channel_id(priv->dma_channel_tx, NULL,
                                 &tx_dma_channel_id);
 
-      spi_slave_common_dma_setup(tx_dma_channel_id, true, dma_txdesc,
+      spi_slave_common_dma_setup(tx_dma_channel_id, true, priv->dma_txdesc,
                                  SPI_DMA_DESC_NUM,
                                  priv->tx_buffer, SPI_SLAVE_BUFSIZE);
 
@@ -702,7 +784,7 @@ static void spislave_setup_tx_dma(struct spislave_priv_s *priv)
 
       spi_ll_dma_tx_enable(priv->ctx.hw, true);
 
-      spi_dma_start(priv->dma_channel_tx, dma_txdesc);
+      spi_dma_start(priv->dma_channel_tx, priv->dma_txdesc);
     }
 }
 #endif
@@ -724,7 +806,7 @@ static void spislave_setup_tx_dma(struct spislave_priv_s *priv)
  *
  ****************************************************************************/
 
-#ifndef CONFIG_ESPRESSIF_SPI2_DMA
+#ifndef USE_DMA
 static inline void spi_slave_prepare_data(struct spislave_priv_s *priv,
                       ssize_t nbits_to_send)
 {
@@ -755,7 +837,7 @@ static void spislave_prepare_next_tx(struct spislave_priv_s *priv)
 
   if (priv->tx_length != 0 && priv->tx_buffer != NULL)
     {
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
       spislave_setup_tx_dma(priv);
 #else
       nbits_to_send = priv->nbits * priv->tx_length;
@@ -767,7 +849,7 @@ static void spislave_prepare_next_tx(struct spislave_priv_s *priv)
     {
       spiwarn("TX buffer empty! Disabling TX for next transaction\n");
 
-#ifndef CONFIG_ESPRESSIF_SPI2_DMA
+#ifndef USE_DMA
       if (priv->tx_buffer != NULL)
         {
           memset(priv->tx_buffer, 0, SPI_SLAVE_BUFSIZE);
@@ -803,7 +885,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
 {
   struct spislave_priv_s *priv = (struct spislave_priv_s *)arg;
   esp_err_t ret;
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
   uint32_t received_bytes;
 #endif
 
@@ -817,7 +899,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
 
   spislave_hal_store_result(&priv->ctx);
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
 
   /* Copy received data from DMA buffer to user-accessible buffer */
 
@@ -843,7 +925,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
 
   SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_RX_COMPLETE);
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
   if (priv->rx_length < SPI_SLAVE_BUFSIZE)
     {
       spislave_setup_rx_dma(priv);
@@ -894,7 +976,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
 static void spislave_dma_init(struct spislave_priv_s *priv)
 {
   /* Initialize GDMA controller */
@@ -909,15 +991,31 @@ static void spislave_dma_init(struct spislave_priv_s *priv)
       0
     };
 
+  gdma_trigger_t periph_trigger;
+
   /* Request a GDMA channel for SPI peripheral */
 
+  if (priv->cfg.host_id == SPI2_HOST)
+    {
+      periph_trigger = GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 2);
+    }
+#if defined(SOC_GDMA_TRIG_PERIPH_SPI3)
+  else if (priv->id == SPI3_HOST)
+    {
+      periph_trigger = GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 3);
+    }
+#endif
+  else
+    {
+      DEBUGASSERT(0);
+      return;
+    }
+
   SPI_GDMA_NEW_CHANNEL(&tx_handle, &priv->dma_channel_tx, NULL);
-  gdma_connect(priv->dma_channel_tx,
-               GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 2));
+  gdma_connect(priv->dma_channel_tx, periph_trigger);
 
   SPI_GDMA_NEW_CHANNEL(&rx_handle, NULL, &priv->dma_channel_rx);
-  gdma_connect(priv->dma_channel_rx,
-               GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 2));
+  gdma_connect(priv->dma_channel_rx, periph_trigger);
 }
 #endif
 
@@ -974,7 +1072,7 @@ static void spislave_initialize(struct spi_slave_ctrlr_s *ctrlr)
       spi_ll_reset_register(priv->cfg.host_id);
     }
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
   spislave_dma_init(priv);
 #endif
 
@@ -983,12 +1081,12 @@ static void spislave_initialize(struct spi_slave_ctrlr_s *ctrlr)
   priv->ctx.rx_lsbfirst = 0;
   priv->ctx.tx_lsbfirst = 0;
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
   priv->ctx.dmadesc_n = SPI_DMA_DESC_NUM;
   priv->ctx.use_dma = 1;
 
-  priv->ctx.dmadesc_rx = dma_rxdesc;
-  priv->ctx.dmadesc_tx = dma_txdesc;
+  priv->ctx.dmadesc_rx = priv->dma_rxdesc;
+  priv->ctx.dmadesc_tx = priv->dma_txdesc;
 #else
   priv->ctx.dmadesc_n = 0;
   priv->ctx.use_dma = 0;
@@ -1039,7 +1137,7 @@ static void spislave_bind(struct spi_slave_ctrlr_s *ctrlr,
   const void *data = NULL;
   irqstate_t flags;
   size_t num_words;
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
   size_t alignment;
   size_t buffer_size;
 #endif
@@ -1069,7 +1167,7 @@ static void spislave_bind(struct spi_slave_ctrlr_s *ctrlr,
   priv->ctx.mode = mode;
   priv->ctx.rcv_bitlen = 0;
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
   /* Allocate DMA RX buffer with proper alignment */
 
 #if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
@@ -1163,7 +1261,7 @@ static void spislave_unbind(struct spi_slave_ctrlr_s *ctrlr)
 
   esp_gpioirqdisable(ESP_PIN2IRQ(priv->config->cs_pin));
 
-#ifdef CONFIG_ESPRESSIF_SPI2_DMA
+#ifdef USE_DMA
   /* Free DMA RX buffer */
 
   if (priv->dma_rx_buffer != NULL)
@@ -1405,6 +1503,12 @@ struct spi_slave_ctrlr_s *esp_spislave_ctrlr_initialize(int port)
         priv = &esp_spi2slave_priv;
         break;
 #endif
+#ifdef CONFIG_ESPRESSIF_SPI3
+      case ESPRESSIF_SPI3:
+        priv = &esp_spi3slave_priv;
+        break;
+#endif
+
       default:
         return NULL;
     }

arch/risc-v/src/esp32p4/hal_esp32p4.cmake

@@ -417,6 +417,7 @@ list(
   ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_app.c
   ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_noos.c
   ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/lp_core_i2c.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/lp_core_spi.c
   ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/lp_core.c
   ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/ulp_lp_core_memory_shared.c
   ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/ulp_lp_core_lp_timer_shared.c

arch/risc-v/src/esp32p4/hal_esp32p4.mk

@@ -393,6 +393,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_app.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_noos.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)lp_core_i2c.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)lp_core_spi.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)lp_core.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)ulp_lp_core_memory_shared.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)ulp_lp_core_lp_timer_shared.c