drivers/wireless: Fixes to spacing and alignement

This commit is contained in:
Gregory Nutt
2015-10-10 11:51:32 -06:00
parent cf14f8d1b5
commit 5f9c47a83f
15 changed files with 594 additions and 512 deletions

View File

@@ -84,40 +84,40 @@
const struct c1101_rfsettings_s cc1101_rfsettings_ISM1_868MHzGFSK100kbps =
{
.FSCTRL1 = 0x08, /* FSCTRL1 Frequency Synthesizer Control */
.FSCTRL0 = 0x00, /* FSCTRL0 Frequency Synthesizer Control */
.FSCTRL1 = 0x08, /* FSCTRL1 Frequency Synthesizer Control */
.FSCTRL0 = 0x00, /* FSCTRL0 Frequency Synthesizer Control */
.FREQ2 = 0x20, /* FREQ2 Frequency Control Word, High Byte */
.FREQ1 = 0x25, /* FREQ1 Frequency Control Word, Middle Byte */
.FREQ0 = 0xED, /* FREQ0 Frequency Control Word, Low Byte */
.FREQ2 = 0x20, /* FREQ2 Frequency Control Word, High Byte */
.FREQ1 = 0x25, /* FREQ1 Frequency Control Word, Middle Byte */
.FREQ0 = 0xED, /* FREQ0 Frequency Control Word, Low Byte */
.MDMCFG4 = 0x8B, /* MDMCFG4 Modem Configuration */
.MDMCFG3 = 0xE5, /* MDMCFG3 Modem Configuration */
.MDMCFG2 = 0x13, /* MDMCFG2 Modem Configuration */
.MDMCFG1 = 0x22, /* MDMCFG1 Modem Configuration */
.MDMCFG0 = 0xE5, /* MDMCFG0 Modem Configuration */
.MDMCFG4 = 0x8B, /* MDMCFG4 Modem Configuration */
.MDMCFG3 = 0xE5, /* MDMCFG3 Modem Configuration */
.MDMCFG2 = 0x13, /* MDMCFG2 Modem Configuration */
.MDMCFG1 = 0x22, /* MDMCFG1 Modem Configuration */
.MDMCFG0 = 0xE5, /* MDMCFG0 Modem Configuration */
.DEVIATN = 0x46, /* DEVIATN Modem Deviation Setting */
.DEVIATN = 0x46, /* DEVIATN Modem Deviation Setting */
.FOCCFG = 0x1D, /* FOCCFG Frequency Offset Compensation Configuration */
.FOCCFG = 0x1D, /* FOCCFG Frequency Offset Compensation Configuration */
.BSCFG = 0x1C, /* BSCFG Bit Synchronization Configuration */
.BSCFG = 0x1C, /* BSCFG Bit Synchronization Configuration */
.AGCCTRL2= 0xC7, /* AGCCTRL2 AGC Control */
.AGCCTRL1= 0x00, /* AGCCTRL1 AGC Control */
.AGCCTRL0= 0xB2, /* AGCCTRL0 AGC Control */
.AGCCTRL2 = 0xC7, /* AGCCTRL2 AGC Control */
.AGCCTRL1 = 0x00, /* AGCCTRL1 AGC Control */
.AGCCTRL0 = 0xB2, /* AGCCTRL0 AGC Control */
.FREND1 = 0xB6, /* FREND1 Front End RX Configuration */
.FREND0 = 0x10, /* FREND0 Front End TX Configuration */
.FREND1 = 0xB6, /* FREND1 Front End RX Configuration */
.FREND0 = 0x10, /* FREND0 Front End TX Configuration */
.FSCAL3 = 0xEA, /* FSCAL3 Frequency Synthesizer Calibration */
.FSCAL2 = 0x2A, /* FSCAL2 Frequency Synthesizer Calibration */
.FSCAL1 = 0x00, /* FSCAL1 Frequency Synthesizer Calibration */
.FSCAL0 = 0x1F, /* FSCAL0 Frequency Synthesizer Calibration */
.FSCAL3 = 0xEA, /* FSCAL3 Frequency Synthesizer Calibration */
.FSCAL2 = 0x2A, /* FSCAL2 Frequency Synthesizer Calibration */
.FSCAL1 = 0x00, /* FSCAL1 Frequency Synthesizer Calibration */
.FSCAL0 = 0x1F, /* FSCAL0 Frequency Synthesizer Calibration */
.CHMIN = 0, /* Fix at 9th channel: 869.80 MHz +- 100 kHz RF Bandwidth */
.CHMAX = 9, /* single channel */
.CHMIN = 0, /* Fix at 9th channel: 869.80 MHz +- 100 kHz RF Bandwidth */
.CHMAX = 9, /* single channel */
.PAMAX = 8, /* 0 means power OFF, 8 represents PA[7] */
.PA = {0x03, 0x0F, 0x1E, 0x27, 0x67, 0x50, 0x81, 0xC2}
.PAMAX = 8, /* 0 means power OFF, 8 represents PA[7] */
.PA = {0x03, 0x0F, 0x1E, 0x27, 0x67, 0x50, 0x81, 0xC2}
};

View File

@@ -82,40 +82,40 @@
const struct c1101_rfsettings_s cc1101_rfsettings_ISM2_905MHzGFSK250kbps =
{
.FSCTRL1 = 0x0C, /* FSCTRL1 Frequency Synthesizer Control */
.FSCTRL0 = 0x00, /* FSCTRL0 Frequency Synthesizer Control */
.FSCTRL1 = 0x0C, /* FSCTRL1 Frequency Synthesizer Control */
.FSCTRL0 = 0x00, /* FSCTRL0 Frequency Synthesizer Control */
.FREQ2 = 0x22, /* FREQ2 Frequency Control Word, High Byte */
.FREQ1 = 0xB1, /* FREQ1 Frequency Control Word, Middle Byte */
.FREQ0 = 0x3B, /* FREQ0 Frequency Control Word, Low Byte */
.FREQ2 = 0x22, /* FREQ2 Frequency Control Word, High Byte */
.FREQ1 = 0xB1, /* FREQ1 Frequency Control Word, Middle Byte */
.FREQ0 = 0x3B, /* FREQ0 Frequency Control Word, Low Byte */
.MDMCFG4 = 0x2D, /* MDMCFG4 Modem Configuration */
.MDMCFG3 = 0x3B, /* MDMCFG3 Modem Configuration */
.MDMCFG2 = 0x13, /* MDMCFG2 Modem Configuration */
.MDMCFG1 = 0x22, /* MDMCFG1 Modem Configuration */
.MDMCFG0 = 0xF8, /* MDMCFG0 Modem Configuration */
.MDMCFG4 = 0x2D, /* MDMCFG4 Modem Configuration */
.MDMCFG3 = 0x3B, /* MDMCFG3 Modem Configuration */
.MDMCFG2 = 0x13, /* MDMCFG2 Modem Configuration */
.MDMCFG1 = 0x22, /* MDMCFG1 Modem Configuration */
.MDMCFG0 = 0xF8, /* MDMCFG0 Modem Configuration */
.DEVIATN = 0x62, /* DEVIATN Modem Deviation Setting */
.DEVIATN = 0x62, /* DEVIATN Modem Deviation Setting */
.FOCCFG = 0x1D, /* FOCCFG Frequency Offset Compensation Configuration */
.FOCCFG = 0x1D, /* FOCCFG Frequency Offset Compensation Configuration */
.BSCFG = 0x1C, /* BSCFG Bit Synchronization Configuration */
.BSCFG = 0x1C, /* BSCFG Bit Synchronization Configuration */
.AGCCTRL2= 0xC7, /* AGCCTRL2 AGC Control */
.AGCCTRL1= 0x00, /* AGCCTRL1 AGC Control */
.AGCCTRL0= 0xB0, /* AGCCTRL0 AGC Control */
.AGCCTRL2 = 0xC7, /* AGCCTRL2 AGC Control */
.AGCCTRL1 = 0x00, /* AGCCTRL1 AGC Control */
.AGCCTRL0 = 0xB0, /* AGCCTRL0 AGC Control */
.FREND1 = 0xB6, /* FREND1 Front End RX Configuration */
.FREND0 = 0x10, /* FREND0 Front End TX Configuration */
.FREND1 = 0xB6, /* FREND1 Front End RX Configuration */
.FREND0 = 0x10, /* FREND0 Front End TX Configuration */
.FSCAL3 = 0xEA, /* FSCAL3 Frequency Synthesizer Calibration */
.FSCAL2 = 0x2A, /* FSCAL2 Frequency Synthesizer Calibration */
.FSCAL1 = 0x00, /* FSCAL1 Frequency Synthesizer Calibration */
.FSCAL0 = 0x1F, /* FSCAL0 Frequency Synthesizer Calibration */
.FSCAL3 = 0xEA, /* FSCAL3 Frequency Synthesizer Calibration */
.FSCAL2 = 0x2A, /* FSCAL2 Frequency Synthesizer Calibration */
.FSCAL1 = 0x00, /* FSCAL1 Frequency Synthesizer Calibration */
.FSCAL0 = 0x1F, /* FSCAL0 Frequency Synthesizer Calibration */
.CHMIN = 0, /* VERIFY REGULATIONS! */
.CHMAX = 0xFF,
.CHMIN = 0, /* VERIFY REGULATIONS! */
.CHMAX = 0xFF,
.PAMAX = 8, /* 0 means power OFF, 8 represents PA[7] */
.PA = {0x03, 0x0E, 0x1E, 0x27, 0x39, 0x8E, 0xCD, 0xC0}
.PAMAX = 8, /* 0 means power OFF, 8 represents PA[7] */
.PA = {0x03, 0x0E, 0x1E, 0x27, 0x39, 0x8E, 0xCD, 0xC0}
};

View File

@@ -220,8 +220,7 @@
#define CC1101_MCSM0_XOSC_FORCE_ON 0x01
/*
* Chip Status Byte
/* Chip Status Byte
*/
/* Bit fields in the chip status byte */
@@ -273,9 +272,7 @@
#define CC1101_PARTNUM_VALUE 0x00
#define CC1101_VERSION_VALUE 0x04
/*
* Others ...
*/
/* Others ... */
#define CC1101_LQI_CRC_OK_BM 0x80
#define CC1101_LQI_EST_BM 0x7F
@@ -357,7 +354,7 @@ int cc1101_access(FAR struct cc1101_dev_s * dev, uint8_t addr,
cc1101_access_begin(dev);
if (length>1 || length < -1)
if (length > 1 || length < -1)
{
SPI_SETFREQUENCY(dev->spi, CC1101_SPIFREQ_BURST);
}
@@ -453,7 +450,11 @@ void cc1101_dumpregs(struct cc1101_dev_s * dev, uint8_t addr, uint8_t length)
cc1101_access(dev, addr, (FAR uint8_t *)buf, length);
printf("CC1101[%2x]: ", addr);
for (i=0; i<length; i++) printf(" %2x,", buf[i]);
for (i = 0; i < length; i++)
{
printf(" %2x,", buf[i]);
}
printf("\n");
}
@@ -485,14 +486,13 @@ void cc1101_setpacketctrl(struct cc1101_dev_s * dev)
values[1] = 0x00; /* Clear channel if RSSI < thr && !receiving;
* TX -> RX, RX -> RX: 0x3F */
values[2] = CC1101_MCSM0_VALUE; /* Calibrate on IDLE -> RX/TX, OSC Timeout = ~500 us
TODO: has XOSC_FORCE_ON */
* TODO: has XOSC_FORCE_ON */
cc1101_access(dev, CC1101_MCSM2, values, -3);
/* Wake-On Radio Control */
/* Not used yet. */
// Not used yet.
// WOREVT1:WOREVT0 - 16-bit timeout register
/* WOREVT1:WOREVT0 - 16-bit timeout register */
}
/****************************************************************************
@@ -777,9 +777,9 @@ int cc1101_read(struct cc1101_dev_s * dev, uint8_t * buf, size_t size)
{
ASSERT(dev);
if (buf==NULL)
if (buf == NULL)
{
if (size==0)
if (size == 0)
{
return 64;
}

View File

@@ -350,7 +350,7 @@ static void cc3000_deselect_and_unlock(FAR struct spi_dev_s *spi)
*
****************************************************************************/
static int cc3000_wait(FAR struct cc3000_dev_s *priv, sem_t* psem)
static int cc3000_wait(FAR struct cc3000_dev_s *priv, sem_t *psem)
{
int ret;
@@ -404,7 +404,7 @@ static int cc3000_wait(FAR struct cc3000_dev_s *priv, sem_t* psem)
static inline int cc3000_wait_irq(FAR struct cc3000_dev_s *priv)
{
return cc3000_wait(priv,&priv->irqsem);
return cc3000_wait(priv, &priv->irqsem);
}
/****************************************************************************
@@ -426,7 +426,7 @@ static inline int cc3000_wait_irq(FAR struct cc3000_dev_s *priv)
static inline int cc3000_wait_ready(FAR struct cc3000_dev_s *priv)
{
return cc3000_wait(priv,&priv->readysem);
return cc3000_wait(priv, &priv->readysem);
}
/****************************************************************************
@@ -531,7 +531,7 @@ static void * select_thread_func(FAR void *arg)
{
/* Release the waiting threads */
waitlldbg("Closed Signaled %d\n",count);
waitlldbg("Closed Signaled %d\n", count);
sem_post(&priv->sockets[s].semwait);
}
}
@@ -631,12 +631,12 @@ static void * cc3000_worker(FAR void *arg)
ASSERT(priv != NULL && priv->config != NULL);
/* We have started release our creator*/
/* We have started, release our creator */
sem_post(&priv->readysem);
while (1)
{
PROBE(0,1);
PROBE(0, 1);
CHECK_GUARD(priv);
cc3000_devtake(priv);
@@ -644,8 +644,8 @@ static void * cc3000_worker(FAR void *arg)
if ((cc3000_wait_irq(priv) != -EINTR) && (priv->workertid != -1))
{
PROBE(0,0);
nllvdbg("State%d\n",priv->state);
PROBE(0, 0);
nllvdbg("State%d\n", priv->state);
switch (priv->state)
{
case eSPI_STATE_POWERUP:
@@ -672,7 +672,7 @@ static void * cc3000_worker(FAR void *arg)
cc3000_lock_and_select(priv->spi); /* Assert CS */
priv->state = eSPI_STATE_READ_PROCEED;
SPI_EXCHANGE(priv->spi,spi_readCommand, priv->rx_buffer.pbuffer,
SPI_EXCHANGE(priv->spi, spi_readCommand, priv->rx_buffer.pbuffer,
ARRAY_SIZE(spi_readCommand));
/* Extract Length bytes from Rx Buffer. Here we need to convert
@@ -738,7 +738,7 @@ static void * cc3000_worker(FAR void *arg)
priv->state, priv->config->irq_read(priv->config));
sem_getvalue(&priv->irqsem, &count);
if (priv->config->irq_read(priv->config) && count==0)
if (priv->config->irq_read(priv->config) && count == 0)
{
sem_post(&priv->irqsem);
}
@@ -754,7 +754,7 @@ static void * cc3000_worker(FAR void *arg)
break;
default:
nllvdbg("default: State%d\n",priv->state);
nllvdbg("default: State%d\n", priv->state);
break;
}
}
@@ -787,9 +787,9 @@ static int cc3000_interrupt(int irq, FAR void *context)
/* Run the worker thread */
PROBE(1,0);
PROBE(1, 0);
sem_post(&priv->irqsem);
PROBE(1,1);
PROBE(1, 1);
/* Clear any pending interrupts and return success */
@@ -867,7 +867,7 @@ static int cc3000_open(FAR struct file *filep)
}
#endif
/* Ensure the power is off so we get the falling edge of IRQ*/
/* Ensure the power is off so we get the falling edge of IRQ */
priv->config->power_enable(priv->config, false);
@@ -887,7 +887,7 @@ static int cc3000_open(FAR struct file *filep)
*/
snprintf(queuename, QUEUE_NAMELEN, QUEUE_FORMAT, priv->minor);
priv->queue = mq_open(queuename, O_WRONLY|O_CREAT, 0666, &attr);
priv->queue = mq_open(queuename, O_WRONLY | O_CREAT, 0666, &attr);
if (priv->queue < 0)
{
ret = -errno;
@@ -1195,7 +1195,7 @@ static ssize_t cc3000_read(FAR struct file *filep, FAR char *buffer, size_t len)
if (nread > 0)
{
memcpy(buffer,priv->rx_buffer.pbuffer,priv->rx_buffer.len);
memcpy(buffer, priv->rx_buffer.pbuffer, priv->rx_buffer.len);
priv->rx_buffer.len = 0;
}
@@ -1235,7 +1235,7 @@ static ssize_t cc3000_write(FAR struct file *filep, FAR const char *usrbuffer, s
size_t tx_len = (len & 1) ? len : len +1;
nllvdbg("buffer:%p len:%d tx_len:%d\n", buffer, len, tx_len );
nllvdbg("buffer:%p len:%d tx_len:%d\n", buffer, len, tx_len);
DEBUGASSERT(filep);
inode = filep->f_inode;
@@ -1431,7 +1431,7 @@ static int cc3000_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
rv = priv->rx_buffer_max_len;
flags = irqsave();
priv->rx_buffer_max_len = *psize;
priv->rx_buffer.pbuffer = kmm_realloc(priv->rx_buffer.pbuffer,*psize);
priv->rx_buffer.pbuffer = kmm_realloc(priv->rx_buffer.pbuffer, *psize);
irqrestore(flags);
DEBUGASSERT(priv->rx_buffer.pbuffer);
*psize = rv;
@@ -1606,7 +1606,7 @@ int cc3000_register(FAR struct spi_dev_s *spi,
sem_init(&priv->devsem, 0, 1); /* Initialize device structure semaphore */
(void)snprintf(semname, SEM_NAMELEN, SEM_FORMAT, minor);
priv->wrkwaitsem = sem_open(semname,O_CREAT,0,0); /* Initialize Worker Wait semaphore */
priv->wrkwaitsem = sem_open(semname, O_CREAT, 0, 0); /* Initialize Worker Wait semaphore */
#ifdef CONFIG_CC3000_MT
pthread_mutex_init(&g_cc3000_mut, NULL);

View File

@@ -117,7 +117,7 @@ uint8_t *UINT16_TO_STREAM_f(uint8_t *p, uint16_t u16)
*
****************************************************************************/
uint16_t STREAM_TO_UINT16_f(char* p, uint16_t offset)
uint16_t STREAM_TO_UINT16_f(FAR char *p, uint16_t offset)
{
return (uint16_t)((uint16_t)((uint16_t)
(*(p + offset + 1)) << 8) + (uint16_t)(*(p + offset)));
@@ -139,7 +139,7 @@ uint16_t STREAM_TO_UINT16_f(char* p, uint16_t offset)
*
****************************************************************************/
unsigned long STREAM_TO_UINT32_f(char* p, uint16_t offset)
unsigned long STREAM_TO_UINT32_f(FAR char *p, uint16_t offset)
{
return (unsigned long)((unsigned long)((unsigned long)
(*(p + offset + 3)) << 24) + (unsigned long)((unsigned long)

View File

@@ -138,7 +138,7 @@ void cc3000_resume(void)
long cc3000_write(uint8_t *pUserBuffer, uint16_t usLength)
{
DEBUGASSERT(spiconf.cc3000fd >= 0);
return write(spiconf.cc3000fd,pUserBuffer,usLength) == usLength ? 0 : -errno;
return write(spiconf.cc3000fd, pUserBuffer, usLength) == usLength ? 0 : -errno;
}
/****************************************************************************
@@ -159,7 +159,7 @@ long cc3000_write(uint8_t *pUserBuffer, uint16_t usLength)
long cc3000_read(uint8_t *pUserBuffer, uint16_t usLength)
{
DEBUGASSERT(spiconf.cc3000fd >= 0);
return read(spiconf.cc3000fd,pUserBuffer,usLength);
return read(spiconf.cc3000fd, pUserBuffer, usLength);
}
/****************************************************************************
@@ -211,19 +211,19 @@ static void *unsoliced_thread_func(void *parameter)
DEBUGASSERT(spiconf.queue != (mqd_t) -1);
DEBUGASSERT(SEM_NAMELEN == QUEUE_NAMELEN);
snprintf(buff, SEM_NAMELEN, SEM_FORMAT, minor);
spiconf.done = sem_open(buff,O_RDONLY);
spiconf.done = sem_open(buff, O_RDONLY);
DEBUGASSERT(spiconf.done != (sem_t *)-1);
sem_post(&spiconf.unsoliced_thread_wakesem);
while (spiconf.run)
{
memset(&spiconf.rx_buffer,0,sizeof(spiconf.rx_buffer));
memset(&spiconf.rx_buffer, 0, sizeof(spiconf.rx_buffer));
nbytes = mq_receive(spiconf.queue, (FAR char *)&spiconf.rx_buffer,
sizeof(spiconf.rx_buffer), 0);
if (nbytes > 0)
{
nlldbg("%d Processed\n",nbytes);
nlldbg("%d Processed\n", nbytes);
spiconf.pfRxHandler(spiconf.rx_buffer.pbuffer);
}
}
@@ -255,7 +255,7 @@ void cc3000_open(gcSpiHandleRx pfRxHandler)
DEBUGASSERT(spiconf.cc3000fd == -1);
fd = open("/dev/wireless0",O_RDWR|O_BINARY);
fd = open("/dev/wireless0", O_RDWR | O_BINARY);
if (fd >= 0)
{
spiconf.pfRxHandler = pfRxHandler;
@@ -308,7 +308,7 @@ void cc3000_close(void)
spiconf.run = false;
pthread_cancel(spiconf.unsoliced_thread);
pthread_join(spiconf.unsoliced_thread, (pthread_addr_t*)&status);
pthread_join(spiconf.unsoliced_thread, (FAR pthread_addr_t *)&status);
close(spiconf.cc3000fd);

View File

@@ -237,7 +237,8 @@ uint8_t *hci_event_handler(void *pRetParams, uint8_t *from, uint8_t *fromlen)
while (1)
{
if (tSLInformation.usEventOrDataReceived != 0) {
if (tSLInformation.usEventOrDataReceived != 0)
{
pucReceivedData = (tSLInformation.pucReceivedData);
if (*pucReceivedData == HCI_TYPE_EVNT)
@@ -258,7 +259,7 @@ uint8_t *hci_event_handler(void *pRetParams, uint8_t *from, uint8_t *fromlen)
{
STREAM_TO_UINT8(pucReceivedData, HCI_DATA_LENGTH_OFFSET, usLength);
switch(usReceivedEventOpcode)
switch (usReceivedEventOpcode)
{
case HCI_CMND_READ_BUFFER_SIZE:
{
@@ -449,37 +450,37 @@ uint8_t *hci_event_handler(void *pRetParams, uint8_t *from, uint8_t *fromlen)
/* Read IP address */
STREAM_TO_STREAM(RecvParams,RetParams,NETAPP_IPCONFIG_IP_LENGTH);
STREAM_TO_STREAM(RecvParams, RetParams, NETAPP_IPCONFIG_IP_LENGTH);
RecvParams += 4;
/* Read subnet */
STREAM_TO_STREAM(RecvParams,RetParams,NETAPP_IPCONFIG_IP_LENGTH);
STREAM_TO_STREAM(RecvParams, RetParams, NETAPP_IPCONFIG_IP_LENGTH);
RecvParams += 4;
/* Read default GW */
STREAM_TO_STREAM(RecvParams,RetParams,NETAPP_IPCONFIG_IP_LENGTH);
STREAM_TO_STREAM(RecvParams, RetParams, NETAPP_IPCONFIG_IP_LENGTH);
RecvParams += 4;
/* Read DHCP server */
STREAM_TO_STREAM(RecvParams,RetParams,NETAPP_IPCONFIG_IP_LENGTH);
STREAM_TO_STREAM(RecvParams, RetParams, NETAPP_IPCONFIG_IP_LENGTH);
RecvParams += 4;
/* Read DNS server */
STREAM_TO_STREAM(RecvParams,RetParams,NETAPP_IPCONFIG_IP_LENGTH);
STREAM_TO_STREAM(RecvParams, RetParams, NETAPP_IPCONFIG_IP_LENGTH);
RecvParams += 4;
/* Read Mac address */
STREAM_TO_STREAM(RecvParams,RetParams,NETAPP_IPCONFIG_MAC_LENGTH);
STREAM_TO_STREAM(RecvParams, RetParams, NETAPP_IPCONFIG_MAC_LENGTH);
RecvParams += 6;
/* Read SSID */
STREAM_TO_STREAM(RecvParams,RetParams,NETAPP_IPCONFIG_SSID_LENGTH);
STREAM_TO_STREAM(RecvParams, RetParams, NETAPP_IPCONFIG_SSID_LENGTH);
break;
default:
@@ -574,7 +575,7 @@ long hci_unsol_event_handler(char *event_hdr)
unsigned long NumberOfReleasedPackets;
unsigned long NumberOfSentPackets;
STREAM_TO_UINT16(event_hdr, HCI_EVENT_OPCODE_OFFSET,event_type);
STREAM_TO_UINT16(event_hdr, HCI_EVENT_OPCODE_OFFSET, event_type);
if (event_type == HCI_EVNT_PATCHES_REQ)
{
@@ -583,7 +584,7 @@ long hci_unsol_event_handler(char *event_hdr)
if (event_type & HCI_EVNT_UNSOL_BASE)
{
switch(event_type)
switch (event_type)
{
case HCI_EVNT_DATA_UNSOL_FREE_BUFF:
{
@@ -607,7 +608,7 @@ long hci_unsol_event_handler(char *event_hdr)
if (event_type & HCI_EVNT_WLAN_UNSOL_BASE)
{
switch(event_type)
switch (event_type)
{
case HCI_EVNT_WLAN_KEEPALIVE:
case HCI_EVNT_WLAN_UNSOL_CONNECT:
@@ -623,34 +624,34 @@ long hci_unsol_event_handler(char *event_hdr)
case HCI_EVNT_WLAN_UNSOL_DHCP:
{
uint8_t params[NETAPP_IPCONFIG_MAC_OFFSET + 1]; // extra byte is for the status
uint8_t params[NETAPP_IPCONFIG_MAC_OFFSET + 1]; /* Extra byte is for the status */
uint8_t *recParams = params;
data = (char*)(event_hdr) + HCI_EVENT_HEADER_SIZE;
data = (FAR char *)(event_hdr) + HCI_EVENT_HEADER_SIZE;
/* Read IP address */
STREAM_TO_STREAM(data,recParams,NETAPP_IPCONFIG_IP_LENGTH);
STREAM_TO_STREAM(data, recParams, NETAPP_IPCONFIG_IP_LENGTH);
data += 4;
/* Read subnet */
STREAM_TO_STREAM(data,recParams,NETAPP_IPCONFIG_IP_LENGTH);
STREAM_TO_STREAM(data, recParams, NETAPP_IPCONFIG_IP_LENGTH);
data += 4;
/* Read default GW */
STREAM_TO_STREAM(data,recParams,NETAPP_IPCONFIG_IP_LENGTH);
STREAM_TO_STREAM(data, recParams, NETAPP_IPCONFIG_IP_LENGTH);
data += 4;
/* Read DHCP server */
STREAM_TO_STREAM(data,recParams,NETAPP_IPCONFIG_IP_LENGTH);
STREAM_TO_STREAM(data, recParams, NETAPP_IPCONFIG_IP_LENGTH);
data += 4;
/* Read DNS server */
STREAM_TO_STREAM(data,recParams,NETAPP_IPCONFIG_IP_LENGTH);
STREAM_TO_STREAM(data, recParams, NETAPP_IPCONFIG_IP_LENGTH);
/* Read the status */
@@ -666,7 +667,7 @@ long hci_unsol_event_handler(char *event_hdr)
case HCI_EVNT_WLAN_ASYNC_PING_REPORT:
{
netapp_pingreport_args_t params;
data = (char*)(event_hdr) + HCI_EVENT_HEADER_SIZE;
data = (FAR char *)(event_hdr) + HCI_EVENT_HEADER_SIZE;
STREAM_TO_UINT32(data, NETAPP_PING_PACKETS_SENT_OFFSET, params.packets_sent);
STREAM_TO_UINT32(data, NETAPP_PING_PACKETS_RCVD_OFFSET, params.packets_received);
STREAM_TO_UINT32(data, NETAPP_PING_MIN_RTT_OFFSET, params.min_round_time);
@@ -684,7 +685,7 @@ long hci_unsol_event_handler(char *event_hdr)
{
int sockfd;
data = (char*)(event_hdr) + HCI_EVENT_HEADER_SIZE;
data = (FAR char *)(event_hdr) + HCI_EVENT_HEADER_SIZE;
STREAM_TO_UINT32(data, NETAPP_PING_PACKETS_SENT_OFFSET, sockfd);
data += 4;
@@ -713,7 +714,7 @@ long hci_unsol_event_handler(char *event_hdr)
long status;
pArg = M_BSD_RESP_PARAMS_OFFSET(event_hdr);
STREAM_TO_UINT32(pArg, BSD_RSP_PARAMS_STATUS_OFFSET,status);
STREAM_TO_UINT32(pArg, BSD_RSP_PARAMS_STATUS_OFFSET, status);
if (ERROR_SOCKET_INACTIVE == status)
{
@@ -827,10 +828,10 @@ long hci_event_unsol_flowcontrol_handler(char *pEvent)
{
long temp, value;
uint16_t i;
uint16_t pusNumberOfHandles=0;
uint16_t pusNumberOfHandles = 0;
char *pReadPayload;
STREAM_TO_UINT16((char *)pEvent,HCI_EVENT_HEADER_SIZE,pusNumberOfHandles);
STREAM_TO_UINT16((char *)pEvent, HCI_EVENT_HEADER_SIZE, pusNumberOfHandles);
pReadPayload = ((char *)pEvent +
HCI_EVENT_HEADER_SIZE + sizeof(pusNumberOfHandles));
temp = 0;
@@ -891,8 +892,8 @@ void update_socket_active_status(char *resp_params)
{
long status, sd;
STREAM_TO_UINT32(resp_params, BSD_RSP_PARAMS_SOCKET_OFFSET,sd);
STREAM_TO_UINT32(resp_params, BSD_RSP_PARAMS_STATUS_OFFSET,status);
STREAM_TO_UINT32(resp_params, BSD_RSP_PARAMS_SOCKET_OFFSET, sd);
STREAM_TO_UINT32(resp_params, BSD_RSP_PARAMS_STATUS_OFFSET, status);
if (ERROR_SOCKET_INACTIVE == status)
{
@@ -923,7 +924,7 @@ void SimpleLinkWaitEvent(uint16_t opcode, void *pRetParams)
*/
tSLInformation.usRxEventOpcode = opcode;
nllvdbg("Looking for opcode 0x%x\n",opcode);
nllvdbg("Looking for opcode 0x%x\n", opcode);
uint16_t event_type;
do
@@ -931,29 +932,30 @@ void SimpleLinkWaitEvent(uint16_t opcode, void *pRetParams)
nllvdbg("cc3000_wait\n");
tSLInformation.pucReceivedData = cc3000_wait();
tSLInformation.usEventOrDataReceived = 1;
STREAM_TO_UINT16((char *)tSLInformation.pucReceivedData, HCI_EVENT_OPCODE_OFFSET,event_type);
STREAM_TO_UINT16((FAR char *)tSLInformation.pucReceivedData,
HCI_EVENT_OPCODE_OFFSET, event_type);
if (*tSLInformation.pucReceivedData == HCI_TYPE_EVNT)
{
nllvdbg("Evtn:0x%x\n",event_type);
nllvdbg("Evtn:0x%x\n", event_type);
}
if (event_type != opcode)
{
if (hci_unsolicited_event_handler() == 1)
{
nllvdbg("Processed Event 0x%x want 0x%x\n",event_type, opcode);
nllvdbg("Processed Event 0x%x want 0x%x\n", event_type, opcode);
}
}
else
{
nllvdbg("Processing opcode 0x%x\n",opcode);
nllvdbg("Processing opcode 0x%x\n", opcode);
hci_event_handler(pRetParams, 0, 0);
}
}
while (tSLInformation.usRxEventOpcode != 0);
nllvdbg("Done for opcode 0x%x\n",opcode);
nllvdbg("Done for opcode 0x%x\n", opcode);
}
/****************************************************************************
@@ -1005,7 +1007,7 @@ void SimpleLinkWaitData(uint8_t *pBuf, uint8_t *from, uint8_t *fromlen)
}
else
{
nllvdbg("!!!!!opcode 0x%x\n",opcode);
nllvdbg("!!!!!opcode 0x%x\n", opcode);
}
UNUSED(event_type);

View File

@@ -79,7 +79,7 @@ uint16_t hci_command_send(uint16_t usOpcode, uint8_t *pucBuff,
stream = (pucBuff + SPI_HEADER_SIZE);
nllvdbg("Send 0x%x\n",usOpcode);
nllvdbg("Send 0x%x\n", usOpcode);
UINT8_TO_STREAM(stream, HCI_TYPE_CMND);
stream = UINT16_TO_STREAM(stream, usOpcode);
UINT8_TO_STREAM(stream, ucArgsLength);
@@ -87,7 +87,7 @@ uint16_t hci_command_send(uint16_t usOpcode, uint8_t *pucBuff,
/* Update the opcode of the event we will be waiting for */
cc3000_write(pucBuff, ucArgsLength + SIMPLE_LINK_HCI_CMND_HEADER_SIZE);
nllvdbg("Send of 0x%x Completed\n",usOpcode);
nllvdbg("Send of 0x%x Completed\n", usOpcode);
return 0;
}
@@ -150,7 +150,7 @@ long hci_data_send(uint8_t ucOpcode, uint8_t *ucArgs, uint16_t usArgsLength,
****************************************************************************/
void hci_data_command_send(uint16_t usOpcode, uint8_t *pucBuff,
uint8_t ucArgsLength,uint16_t ucDataLength)
uint8_t ucArgsLength, uint16_t ucDataLength)
{
uint8_t *stream = (pucBuff + SPI_HEADER_SIZE);

View File

@@ -129,11 +129,11 @@ long netapp_dhcp(unsigned long *aucIP, unsigned long *aucSubnetMask,
/* Fill in temporary command buffer */
ARRAY_TO_STREAM(args,aucIP,4);
ARRAY_TO_STREAM(args,aucSubnetMask,4);
ARRAY_TO_STREAM(args,aucDefaultGateway,4);
ARRAY_TO_STREAM(args, aucIP, 4);
ARRAY_TO_STREAM(args, aucSubnetMask, 4);
ARRAY_TO_STREAM(args, aucDefaultGateway, 4);
args = UINT32_TO_STREAM(args, 0);
ARRAY_TO_STREAM(args,aucDNSServer,4);
ARRAY_TO_STREAM(args, aucDNSServer, 4);
/* Initiate a HCI command */

View File

@@ -165,7 +165,7 @@ signed long nvmem_write(unsigned long ulFileId, unsigned long ulLength,
args = UINT32_TO_STREAM(args, ulEntryOffset);
memcpy((ptr + SPI_HEADER_SIZE + HCI_DATA_CMD_HEADER_SIZE +
NVMEM_WRITE_PARAMS_LEN),buff,ulLength);
NVMEM_WRITE_PARAMS_LEN), buff, ulLength);
/* Initiate a HCI command but it will come on data channel */
@@ -241,9 +241,9 @@ uint8_t nvmem_get_mac_address(uint8_t *mac)
uint8_t nvmem_write_patch(unsigned long ulFileId, unsigned long spLength,
const uint8_t *spData)
{
uint8_t status = 0;
uint16_t offset = 0;
uint8_t *spDataPtr = (uint8_t*)spData;
FAR uint8_t *spDataPtr = (FAR uint8_t *)spData;
uint8_t status = 0;
uint16_t offset = 0;
while ((status == 0) && (spLength >= SP_PORTION_SIZE))
{
@@ -253,7 +253,7 @@ uint8_t nvmem_write_patch(unsigned long ulFileId, unsigned long spLength,
spDataPtr += SP_PORTION_SIZE;
}
if (status !=0)
if (status != 0)
{
/* NVMEM error occurred */
@@ -349,14 +349,14 @@ signed long nvmem_create_entry(unsigned long ulFileId, unsigned long ulNewLen)
ptr = tSLInformation.pucTxCommandBuffer;
args = (ptr + HEADERS_SIZE_CMD);
/*( Fill in HCI packet structure */
/* Fill in HCI packet structure */
args = UINT32_TO_STREAM(args, ulFileId);
args = UINT32_TO_STREAM(args, ulNewLen);
/* Initiate a HCI command */
hci_command_send(HCI_CMND_NVMEM_CREATE_ENTRY,ptr, NVMEM_CREATE_PARAMS_LEN);
hci_command_send(HCI_CMND_NVMEM_CREATE_ENTRY, ptr, NVMEM_CREATE_PARAMS_LEN);
SimpleLinkWaitEvent(HCI_CMND_NVMEM_CREATE_ENTRY, &retval);

File diff suppressed because it is too large Load Diff

View File

@@ -167,7 +167,7 @@ int cc3000_socket(int domain, int type, int protocol)
cc3000_lib_lock();
type = bsd2ti_types[type];
sd = cc3000_socket_impl(domain,type,protocol);
sd = cc3000_socket_impl(domain, type, protocol);
#ifdef CONFIG_CC3000_MT
cc3000_add_socket(sd);
#endif
@@ -271,12 +271,12 @@ int cc3000_accept(int sockfd, struct sockaddr *addr, socklen_t *addrlen)
return -errno;
}
memset(addr,0,*addrlen);
return cc3000_accept_socket(sockfd,addr,addrlen);
memset(addr, 0, *addrlen);
return cc3000_accept_socket(sockfd, addr, addrlen);
}
#else
{
cc3000_accept_socket(sockfd,0);
cc3000_accept_socket(sockfd, 0);
short nonBlocking = CC3000_SOCK_OFF;
if (setsockopt(sockfd, CC3000_SOL_SOCKET, CC3000_SOCKOPT_ACCEPT_NONBLOCK,
@@ -286,7 +286,7 @@ int cc3000_accept(int sockfd, struct sockaddr *addr, socklen_t *addrlen)
return -errno;
}
return cc3000_do_accept(int sockfd, addr, addrlen);;
return cc3000_do_accept(sockfd, addr, addrlen);
}
#endif
@@ -352,7 +352,7 @@ int cc3000_listen(int sockfd, int backlog)
int ret;
cc3000_lib_lock();
ret = cc3000_listen_impl(sockfd,backlog);
ret = cc3000_listen_impl(sockfd, backlog);
cc3000_lib_unlock();
return ret;
}
@@ -436,8 +436,8 @@ int cc3000_connect(int sockfd, FAR const struct sockaddr *addr, socklen_t addrle
*
****************************************************************************/
int cc3000_select(int nfds, fd_set *readfds, fd_set *writefds,fd_set *exceptfds,
struct timeval *timeout)
int cc3000_select(int nfds, fd_set *readfds, fd_set *writefds,
fd_set *exceptfds, struct timeval *timeout)
{
int ret;
@@ -765,8 +765,10 @@ ssize_t cc3000_sendto(int sockfd, FAR const void *buf, size_t len, int flags,
****************************************************************************/
#ifndef CC3000_TINY_DRIVER
// TODO: Standard is struct hostent *gethostbyname(const char *name);
int cc3000_gethostbyname(char * hostname, uint16_t usNameLen, unsigned long* out_ip_addr)
/* REVISIT: Standard is struct hostent *gethostbyname(const char *name); */
int cc3000_gethostbyname(char *hostname, uint16_t usNameLen,
unsigned long *out_ip_addr)
{
int ret;

View File

@@ -514,7 +514,8 @@ long cc3000_listen_impl(long sd, long backlog)
****************************************************************************/
#ifndef CC3000_TINY_DRIVER
int cc3000_gethostbyname_impl(char * hostname, uint16_t usNameLen, unsigned long* out_ip_addr)
int cc3000_gethostbyname_impl(char *hostname, uint16_t usNameLen,
unsigned long *out_ip_addr)
{
tBsdGethostbynameParams ret;
uint8_t *ptr, *args;
@@ -546,7 +547,7 @@ int cc3000_gethostbyname_impl(char * hostname, uint16_t usNameLen, unsigned long
set_errno(ret.retVal);
(*((long*)out_ip_addr)) = ret.outputAddress;
(*((FAR long *)out_ip_addr)) = ret.outputAddress;
return ret.retVal;
}
@@ -680,9 +681,9 @@ int cc3000_select_impl(long nfds, TICC3000fd_set *readsds, TICC3000fd_set *write
args = UINT32_TO_STREAM(args, 0x00000014);
args = UINT32_TO_STREAM(args, 0x00000014);
args = UINT32_TO_STREAM(args, is_blocking);
args = UINT32_TO_STREAM(args, ((readsds) ? *(unsigned long*)readsds : 0));
args = UINT32_TO_STREAM(args, ((writesds) ? *(unsigned long*)writesds : 0));
args = UINT32_TO_STREAM(args, ((exceptsds) ? *(unsigned long*)exceptsds : 0));
args = UINT32_TO_STREAM(args, ((readsds) ? *(FAR unsigned long *)readsds : 0));
args = UINT32_TO_STREAM(args, ((writesds) ? *(FAR unsigned long *)writesds : 0));
args = UINT32_TO_STREAM(args, ((exceptsds) ? *(FAR unsigned long *)exceptsds : 0));
if (timeout)
{
@@ -1078,7 +1079,7 @@ int simple_link_send(long sd, const void *buf, long len, long flags,
/* Update the offset of data and parameters according to the command */
switch(opcode)
switch (opcode)
{
case HCI_CMND_SENDTO:
{
@@ -1119,18 +1120,18 @@ int simple_link_send(long sd, const void *buf, long len, long flags,
/* Copy the data received from user into the TX Buffer */
ARRAY_TO_STREAM(pDataPtr, ((uint8_t *)buf), len);
ARRAY_TO_STREAM(pDataPtr, ((FAR uint8_t *)buf), len);
/* In case we are using SendTo, copy the to parameters */
if (opcode == HCI_CMND_SENDTO)
{
ARRAY_TO_STREAM(pDataPtr, ((uint8_t *)to), tolen);
ARRAY_TO_STREAM(pDataPtr, ((FAR uint8_t *)to), tolen);
}
/* Initiate a HCI command */
hci_data_send(opcode, ptr, uArgSize, len,(uint8_t*)to, tolen);
hci_data_send(opcode, ptr, uArgSize, len, (FAR uint8_t *)to, tolen);
if (opcode == HCI_CMND_SENDTO)
{

View File

@@ -222,7 +222,7 @@ void wlan_init(size_t max_tx_len,
/* Init I/O callback */
/* Init asynchronous events callback */
tSLInformation.sWlanCB= sWlanCB;
tSLInformation.sWlanCB = sWlanCB;
/* By default TX Complete events are routed to host too */
@@ -624,7 +624,7 @@ long wlan_add_profile(unsigned long ulSecType, uint8_t *ucSsid,
unsigned long ulPriority,
unsigned long ulPairwiseCipher_Or_TxKeyLen,
unsigned long ulGroupCipher_TxKeyIndex,
unsigned long ulKeyMgmt, uint8_t* ucPf_OrKey,
unsigned long ulKeyMgmt, uint8_t *ucPf_OrKey,
unsigned long ulPassPhraseLen)
{
uint16_t arg_len = 0;
@@ -702,7 +702,7 @@ long wlan_add_profile(unsigned long ulSecType, uint8_t *ucSsid,
}
break;
/*WPA, WPA2 */
/* WPA, WPA2 */
case WLAN_SEC_WPA:
case WLAN_SEC_WPA2:
@@ -907,7 +907,8 @@ long wlan_ioctl_set_scan_params(unsigned long uiEnable,
unsigned long uiMinDwellTime,
unsigned long uiMaxDwellTime,
unsigned long uiNumOfProbeRequests,
unsigned long uiChannelMask,long iRSSIThreshold,
unsigned long uiChannelMask,
long iRSSIThreshold,
unsigned long uiSNRThreshold,
unsigned long uiDefaultTxPower,
unsigned long *aiIntervalList)
@@ -1163,7 +1164,7 @@ long wlan_smart_config_stop(void)
*
****************************************************************************/
long wlan_smart_config_set_prefix(char* cNewPrefix)
long wlan_smart_config_set_prefix(FAR char *cNewPrefix)
{
long ret;
uint8_t *ptr;

View File

@@ -325,7 +325,7 @@ static inline void nrf24l01_configspi(FAR struct spi_dev_s *spi)
* As we own the SPI bus this method is called just once.
*/
SPI_SELECT(spi, SPIDEV_WIRELESS, true); // Useful ?
SPI_SELECT(spi, SPIDEV_WIRELESS, true); /* Useful ? */
SPI_SETMODE(spi, SPIDEV_MODE0);
SPI_SETBITS(spi, 8);
SPI_SETFREQUENCY(spi, NRF24L01_SPIFREQ);
@@ -663,7 +663,7 @@ static void nrf24l01_tostate(struct nrf24l01_dev_s *dev, nrf24l01_state_t state)
/* Entering new state */
switch(state)
switch (state)
{
case ST_UNKNOWN:
/* Power down the module here... */
@@ -980,7 +980,7 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
break;
case NRF24L01IOC_GETRETRCFG: /* Get retransmit params. arg: Pointer to nrf24l01_retrcfg_t */
result = -ENOSYS; /* TODO !*/
result = -ENOSYS; /* TODO */
break;
case NRF24L01IOC_SETPIPESCFG:
@@ -1053,7 +1053,7 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
}
case NRF24L01IOC_GETDATARATE:
result = -ENOSYS; /* TODO !*/
result = -ENOSYS; /* TODO */
break;
case NRF24L01IOC_SETADDRWIDTH:
@@ -1351,7 +1351,8 @@ int nrf24l01_init(FAR struct nrf24l01_dev_s *dev)
/* Clear interrupt sources (useful ?) */
nrf24l01_writeregbyte(dev, NRF24L01_STATUS, NRF24L01_RX_DR|NRF24L01_TX_DS|NRF24L01_MAX_RT);
nrf24l01_writeregbyte(dev, NRF24L01_STATUS,
NRF24L01_RX_DR | NRF24L01_TX_DS | NRF24L01_MAX_RT);
out:
nrf24l01_unlock(dev->spi);
@@ -1523,7 +1524,7 @@ int nrf24l01_settxpower(FAR struct nrf24l01_dev_s *dev, int outpower)
* '11' 0dBm
*/
switch(outpower)
switch (outpower)
{
case 0:
hwpow = 3 << NRF24L01_RF_PWR_SHIFT;