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drivers/: Fixes to spacing and alignement

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This commit is contained in:
Gregory Nutt
2015-10-10 10:41:00 -06:00
parent e675ddb813
commit cf14f8d1b5
108 changed files with 1131 additions and 1097 deletions
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drivers/analog/ad5410.c
+9 -9
View File
@@ -141,9 +141,9 @@ static int dac_setup(FAR struct dac_dev_s *dev)
FAR struct spi_dev_s *spi = priv->spi;
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,AD5410_REG_CMD);
SPI_SEND(spi,(AD5410_CMD_OUTEN|AD5410_CMD_420MA)>>8);
SPI_SEND(spi,AD5410_CMD_OUTEN|AD5410_CMD_420MA);
SPI_SEND(spi, AD5410_REG_CMD);
SPI_SEND(spi, (AD5410_CMD_OUTEN | AD5410_CMD_420MA) >> 8);
SPI_SEND(spi, AD5410_CMD_OUTEN | AD5410_CMD_420MA);
SPI_SELECT(spi, priv->devno, false);
return OK;
}
@@ -167,10 +167,10 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
FAR struct spi_dev_s *spi = priv->spi;
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,AD5410_REG_WR);
SPI_SEND(spi,(uint8_t)(msg->am_data>>24));
SPI_SEND(spi,(uint8_t)(msg->am_data>>16));
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi, AD5410_REG_WR);
SPI_SEND(spi, (uint8_t)(msg->am_data >> 24));
SPI_SEND(spi, (uint8_t)(msg->am_data >> 16));
SPI_SELECT(spi, priv->devno, false);
dac_txdone(&g_dacdev);
return 0;
@@ -207,8 +207,8 @@ FAR struct dac_dev_s *up_ad5410initialize(FAR struct spi_dev_s *spi,
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_dacdev.ad_priv;
priv->spi=spi;
priv->devno=devno;
priv->spi = spi;
priv->devno = devno;
return &g_dacdev;
}
#endif
drivers/analog/adc.c
+3 -2
View File
@@ -67,8 +67,9 @@
static int adc_open(FAR struct file *filep);
static int adc_close(FAR struct file *filep);
static ssize_t adc_read(FAR struct file *, FAR char *, size_t);
static int adc_ioctl(FAR struct file *filep,int cmd,unsigned long arg);
static ssize_t adc_read(FAR struct file *fielp, FAR char *buffer,
size_t buflen);
static int adc_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
/****************************************************************************
* Private Data
drivers/analog/ads1255.c
+31 -31
View File
@@ -147,17 +147,17 @@ static struct up_dev_s g_adcpriv =
{
.mux = (const uint8_t [])
{
CONFIG_ADS1255_MUX,0
CONFIG_ADS1255_MUX, 0
},
.sps = CONFIG_ADS1255_SPS,
.sps = CONFIG_ADS1255_SPS,
.channel = 0,
.irq = CONFIG_ADS1255_IRQ,
.irq = CONFIG_ADS1255_IRQ,
};
static struct adc_dev_s g_adcdev =
{
.ad_ops = &g_adcops,
.ad_priv= &g_adcpriv,
.ad_ops = &g_adcops,
.ad_priv = &g_adcpriv,
};
/****************************************************************************
@@ -166,12 +166,12 @@ static struct adc_dev_s g_adcdev =
static uint8_t getspsreg(uint16_t sps)
{
static const unsigned short sps_tab[]=
static const unsigned short sps_tab[] =
{
3, 7, 12, 20, 27, 40, 55, 80,
300, 750, 1500, 3000, 5000, 10000, 20000, 65535,
};
static const unsigned char sps_reg[]=
static const unsigned char sps_reg[] =
{
0x03, 0x13, 0x23, 0x33, 0x43, 0x53, 0x63, 0x72,
0x82, 0x92, 0xa1, 0xb0, 0xc0, 0xd0, 0xe0, 0xf0,
@@ -206,9 +206,9 @@ static void adc_reset(FAR struct adc_dev_s *dev)
SPI_SETFREQUENCY(spi, CONFIG_ADS1255_FREQUENCY);
usleep(1000);
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,ADS125X_WREG+0x03); /* WRITE SPS REG */
SPI_SEND(spi,0x00); /* count=1 */
SPI_SEND(spi,0x63);
SPI_SEND(spi, ADS125X_WREG + 0x03); /* WRITE SPS REG */
SPI_SEND(spi, 0x00); /* count=1 */
SPI_SEND(spi, 0x63);
SPI_SELECT(spi, priv->devno, false);
}
@@ -227,22 +227,22 @@ static int adc_setup(FAR struct adc_dev_s *dev)
if (ret == OK)
{
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,ADS125X_WREG); /* WRITE REG from 0 */
SPI_SEND(spi,0x03); /* count=4+1 */
SPI_SEND(spi, ADS125X_WREG); /* WRITE REG from 0 */
SPI_SEND(spi, 0x03); /* count=4+1 */
if (priv->buf)
{
SPI_SEND(spi,ADS125X_BUFON); /* REG0 STATUS BUFFER ON */
SPI_SEND(spi, ADS125X_BUFON); /* REG0 STATUS BUFFER ON */
}
else
{
SPI_SEND(spi,ADS125X_BUFOFF);
SPI_SEND(spi, ADS125X_BUFOFF);
}
SPI_SEND(spi,priv->mux[0]);
SPI_SEND(spi,priv->pga); /* REG2 ADCON PGA=2 */
SPI_SEND(spi,getspsreg(priv->sps));
SPI_SEND(spi, priv->mux[0]);
SPI_SEND(spi, priv->pga); /* REG2 ADCON PGA=2 */
SPI_SEND(spi, getspsreg(priv->sps));
usleep(1000);
SPI_SEND(spi,ADS125X_SELFCAL);
SPI_SEND(spi, ADS125X_SELFCAL);
SPI_SELECT(spi, priv->devno, false);
up_enable_irq(priv->irq);
}
@@ -292,30 +292,30 @@ static int adc_interrupt(int irq, void *context)
unsigned char ch;
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,ADS125X_RDATA);
SPI_SEND(spi, ADS125X_RDATA);
up_udelay(10);
buf[3]=SPI_SEND(spi,0xff);
buf[2]=SPI_SEND(spi,0xff);
buf[1]=SPI_SEND(spi,0xff);
buf[0]=0;
buf[3] = SPI_SEND(spi, 0xff);
buf[2] = SPI_SEND(spi, 0xff);
buf[1] = SPI_SEND(spi, 0xff);
buf[0] = 0;
priv->channel++;
ch = priv->mux[priv->channel];
if ( ch == 0 )
if (ch == 0)
{
priv->channel=0;
priv->channel = 0;
ch = priv->mux[0];
}
SPI_SEND(spi,ADS125X_WREG+0x01);
SPI_SEND(spi,0x00);
SPI_SEND(spi,ch);
SPI_SEND(spi,ADS125X_SYNC);
SPI_SEND(spi, ADS125X_WREG + 0x01);
SPI_SEND(spi, 0x00);
SPI_SEND(spi, ch);
SPI_SEND(spi, ADS125X_SYNC);
up_udelay(2);
SPI_SEND(spi,ADS125X_WAKEUP);
SPI_SEND(spi, ADS125X_WAKEUP);
SPI_SELECT(spi, priv->devno, false);
adc_receive(&g_adcdev,priv->channel,*(int32_t *)buf);
adc_receive(&g_adcdev, priv->channel, *(int32_t *)buf);
return OK;
}
drivers/analog/dac.c
+19 -17
View File
@@ -74,9 +74,11 @@
static int dac_open(FAR struct file *filep);
static int dac_close(FAR struct file *filep);
static ssize_t dac_read(FAR struct file *, FAR char *, size_t);
static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
static int dac_ioctl(FAR struct file *filep,int cmd,unsigned long arg);
static ssize_t dac_read(FAR struct file *filep, FAR char *buffer,
size_t buflen);
static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer,
size_t buflen);
static int dac_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
/****************************************************************************
* Private Data
@@ -299,7 +301,7 @@ static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t
* shorter than the minimum.
*/
if (buflen % 5 == 0 )
if (buflen % 5 == 0)
{
msglen = 5;
}
@@ -324,7 +326,7 @@ static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t
msglen = 5;
}
while ((buflen - nsent) >= msglen )
while ((buflen - nsent) >= msglen)
{
/* Check if adding this new message would over-run the drivers ability to enqueue
* xmit data.
@@ -394,27 +396,27 @@ static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t
}
else if (msglen == 4)
{
fifo->af_buffer[fifo->af_tail].am_channel=buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data=*(uint32_t *)&buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data&=0xffffff00;
fifo->af_buffer[fifo->af_tail].am_channel = buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data = *(uint32_t *)&buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data &= 0xffffff00;
}
else if (msglen == 3)
{
fifo->af_buffer[fifo->af_tail].am_channel=buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data=(*(uint16_t *)&buffer[nsent+1]);
fifo->af_buffer[fifo->af_tail].am_data<<=16;
fifo->af_buffer[fifo->af_tail].am_channel = buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data = (*(uint16_t *)&buffer[nsent+1]);
fifo->af_buffer[fifo->af_tail].am_data <<= 16;
}
else if (msglen == 2)
{
fifo->af_buffer[fifo->af_tail].am_channel=0;
fifo->af_buffer[fifo->af_tail].am_data=(*(uint16_t *)&buffer[nsent]);
fifo->af_buffer[fifo->af_tail].am_data<<=16;
fifo->af_buffer[fifo->af_tail].am_channel = 0;
fifo->af_buffer[fifo->af_tail].am_data = (*(uint16_t *)&buffer[nsent]);
fifo->af_buffer[fifo->af_tail].am_data <<= 16;
}
else if (msglen == 1)
{
fifo->af_buffer[fifo->af_tail].am_channel=0;
fifo->af_buffer[fifo->af_tail].am_data=buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data<<=24;
fifo->af_buffer[fifo->af_tail].am_channel = 0;
fifo->af_buffer[fifo->af_tail].am_data = buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data <<= 24;
}
/* Increment the tail of the circular buffer */
drivers/audio/audio_null.c
+7 -7
View File
@@ -101,7 +101,7 @@ static int null_start(FAR struct audio_lowerhalf_s *dev);
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int null_stop(FAR struct audio_lowerhalf_s *dev,
FAR void* session);
FAR void *session);
#else
static int null_stop(FAR struct audio_lowerhalf_s *dev);
#endif
@@ -109,9 +109,9 @@ static int null_stop(FAR struct audio_lowerhalf_s *dev);
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int null_pause(FAR struct audio_lowerhalf_s *dev,
FAR void* session);
FAR void *session);
static int null_resume(FAR struct audio_lowerhalf_s *dev,
FAR void* session);
FAR void *session);
#else
static int null_pause(FAR struct audio_lowerhalf_s *dev);
static int null_resume(FAR struct audio_lowerhalf_s *dev);
@@ -432,7 +432,7 @@ static void *null_workerthread(pthread_addr_t pvarg)
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
while (!priv->terminate)
#else
for (;;)
for (; ; )
#endif
{
/* Wait for messages from our message queue */
@@ -573,7 +573,7 @@ static int null_start(FAR struct audio_lowerhalf_s *dev)
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int null_stop(FAR struct audio_lowerhalf_s *dev, FAR void* session)
static int null_stop(FAR struct audio_lowerhalf_s *dev, FAR void *session)
#else
static int null_stop(FAR struct audio_lowerhalf_s *dev)
#endif
@@ -611,7 +611,7 @@ static int null_stop(FAR struct audio_lowerhalf_s *dev)
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int null_pause(FAR struct audio_lowerhalf_s *dev, FAR void* session)
static int null_pause(FAR struct audio_lowerhalf_s *dev, FAR void *session)
#else
static int null_pause(FAR struct audio_lowerhalf_s *dev)
#endif
@@ -630,7 +630,7 @@ static int null_pause(FAR struct audio_lowerhalf_s *dev)
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int null_resume(FAR struct audio_lowerhalf_s *dev, FAR void* session)
static int null_resume(FAR struct audio_lowerhalf_s *dev, FAR void *session)
#else
static int null_resume(FAR struct audio_lowerhalf_s *dev)
#endif
drivers/audio/vs1053.c
+30 -27
View File
@@ -111,35 +111,35 @@ struct vs1053_struct_s
/* Our specific driver data goes here */
const FAR struct vs1053_lower_s *hw_lower;/* Pointer to the hardware lower functions */
FAR struct spi_dev_s *spi; /* Pointer to the SPI bus */
FAR struct ap_buffer_s *apb; /* Pointer to the buffer we are processing */
struct dq_queue_s apbq; /* Our queue for enqueued buffers */
unsigned long spi_freq; /* Frequency to run the SPI bus at. */
unsigned long chip_freq; /* Current chip frequency */
mqd_t mq; /* Message queue for receiving messages */
char mqname[16]; /* Our message queue name */
pthread_t threadid; /* ID of our thread */
sem_t apbq_sem; /* Audio Pipeline Buffer Queue sem access */
const FAR struct vs1053_lower_s *hw_lower; /* Pointer to the hardware lower functions */
FAR struct spi_dev_s *spi; /* Pointer to the SPI bus */
FAR struct ap_buffer_s *apb; /* Pointer to the buffer we are processing */
struct dq_queue_s apbq; /* Our queue for enqueued buffers */
unsigned long spi_freq; /* Frequency to run the SPI bus at. */
unsigned long chip_freq; /* Current chip frequency */
mqd_t mq; /* Message queue for receiving messages */
char mqname[16]; /* Our message queue name */
pthread_t threadid; /* ID of our thread */
sem_t apbq_sem; /* Audio Pipeline Buffer Queue sem access */
#ifndef CONFIG_AUDIO_EXCLUDE_VOLUME
int16_t volume; /* Current volume level */
int16_t volume; /* Current volume level */
#ifndef CONFIG_AUDIO_EXCLUDE_BALANCE
int16_t balance; /* Current balance level */
int16_t balance; /* Current balance level */
#endif /* CONFIG_AUDIO_EXCLUDE_BALANCE */
#endif /* CONFIG_AUDIO_EXCLUDE_VOLUME */
#ifndef CONFIG_AUDIO_EXCLUDE_TONE
uint8_t bass; /* Bass level */
uint8_t treble; /* Bass level */
uint8_t bass; /* Bass level */
uint8_t treble; /* Bass level */
#endif
uint16_t endfillbytes;
uint8_t endfillchar; /* Fill char to send when no more data */
uint8_t endfillchar; /* Fill char to send when no more data */
bool running;
bool paused;
bool endmode;
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
bool cancelmode;
#endif
bool busy; /* Set true when device reserved */
bool busy; /* Set true when device reserved */
};
/****************************************************************************
@@ -167,7 +167,7 @@ static int vs1053_resume(FAR struct audio_lowerhalf_s *lower,
static int vs1053_reserve(FAR struct audio_lowerhalf_s *lower,
FAR void** ppContext);
static int vs1053_release(FAR struct audio_lowerhalf_s *lower,
FAR void* pContext);
FAR void *pContext);
#else
static int vs1053_configure(FAR struct audio_lowerhalf_s *lower,
FAR const struct audio_caps_s *pCaps);
@@ -219,7 +219,10 @@ static const struct audio_ops_s g_audioops =
/* ISR context pointers */
static struct vs1053_struct_s* g_isrdata[CONFIG_VS1053_DEVICE_COUNT] = { NULL, };
static struct vs1053_struct_s *g_isrdata[CONFIG_VS1053_DEVICE_COUNT] =
{
NULL,
};
/* Volume control log table. This table is in increments of 2% of
* requested volume level and is the register value that should be
@@ -1518,14 +1521,14 @@ static int vs1053_start(FAR struct audio_lowerhalf_s *lower)
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int vs1053_stop(FAR struct audio_lowerhalf_s *lower, FAR void* session)
static int vs1053_stop(FAR struct audio_lowerhalf_s *lower, FAR void *session)
#else
static int vs1053_stop(FAR struct audio_lowerhalf_s *lower)
#endif
{
FAR struct vs1053_struct_s *dev = (struct vs1053_struct_s *) lower;
struct audio_msg_s term_msg;
FAR void* value;
struct audio_msg_s term_msg;
FAR void *value;
/* Send a message to stop all audio streaming */
@@ -1562,7 +1565,7 @@ static int vs1053_stop(FAR struct audio_lowerhalf_s *lower)
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int vs1053_pause(FAR struct audio_lowerhalf_s *lower, FAR void* session)
static int vs1053_pause(FAR struct audio_lowerhalf_s *lower, FAR void *session)
#else
static int vs1053_pause(FAR struct audio_lowerhalf_s *lower)
#endif
@@ -1591,7 +1594,7 @@ static int vs1053_pause(FAR struct audio_lowerhalf_s *lower)
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int vs1053_resume(FAR struct audio_lowerhalf_s *lower, FAR void* session)
static int vs1053_resume(FAR struct audio_lowerhalf_s *lower, FAR void *session)
#else
static int vs1053_resume(FAR struct audio_lowerhalf_s *lower)
#endif
@@ -1620,9 +1623,9 @@ static int vs1053_resume(FAR struct audio_lowerhalf_s *lower)
****************************************************************************/
static int vs1053_enqueuebuffer(FAR struct audio_lowerhalf_s *lower,
FAR struct ap_buffer_s *apb )
FAR struct ap_buffer_s *apb)
{
FAR struct vs1053_struct_s *dev = (struct vs1053_struct_s *) lower;
FAR struct vs1053_struct_s *dev = (struct vs1053_struct_s *)lower;
struct audio_msg_s term_msg;
int ret;
@@ -1661,7 +1664,7 @@ static int vs1053_enqueuebuffer(FAR struct audio_lowerhalf_s *lower,
****************************************************************************/
static int vs1053_cancelbuffer(FAR struct audio_lowerhalf_s *lower,
FAR struct ap_buffer_s *apb )
FAR struct ap_buffer_s *apb)
{
return OK;
}
@@ -1871,7 +1874,7 @@ struct audio_lowerhalf_s *vs1053_initialize(FAR struct spi_dev_s *spi,
* for the DREQ to be active indicating the device is ready
*/
retry = 200;;
retry = 200;
while (!lower->read_dreq(lower) && retry)
{
up_udelay(10);
drivers/audio/wm8904.c
+11 -8
View File
@@ -133,7 +133,7 @@ static int wm8904_start(FAR struct audio_lowerhalf_s *dev);
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int wm8904_stop(FAR struct audio_lowerhalf_s *dev,
FAR void* session);
FAR void *session);
#else
static int wm8904_stop(FAR struct audio_lowerhalf_s *dev);
#endif
@@ -141,9 +141,9 @@ static int wm8904_stop(FAR struct audio_lowerhalf_s *dev);
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int wm8904_pause(FAR struct audio_lowerhalf_s *dev,
FAR void* session);
FAR void *session);
static int wm8904_resume(FAR struct audio_lowerhalf_s *dev,
FAR void* session);
FAR void *session);
#else
static int wm8904_pause(FAR struct audio_lowerhalf_s *dev);
static int wm8904_resume(FAR struct audio_lowerhalf_s *dev);
@@ -232,7 +232,10 @@ const uint8_t g_sysclk_scaleb1[WM8904_BCLK_MAXDIV+1] =
#ifndef CONFIG_WM8904_CLKDEBUG
static
#endif
const uint8_t g_fllratio[WM8904_NFLLRATIO] = {1, 2, 4, 8, 16};
const uint8_t g_fllratio[WM8904_NFLLRATIO] =
{
1, 2, 4, 8, 16
};
/****************************************************************************
* Private Functions
@@ -726,7 +729,7 @@ static void wm8904_setbitrate(FAR struct wm8904_dev_s *priv)
minfout = WM8904_FVCO_MAX / WM8904_MAXOUTDIV;
divndx = 0;
for (;;)
for (; ; )
{
/* Calculate the new value of Fout that we would need to provide
* with this SYSCLK divider in place.
@@ -1585,7 +1588,7 @@ static int wm8904_start(FAR struct audio_lowerhalf_s *dev)
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int wm8904_stop(FAR struct audio_lowerhalf_s *dev, FAR void* session)
static int wm8904_stop(FAR struct audio_lowerhalf_s *dev, FAR void *session)
#else
static int wm8904_stop(FAR struct audio_lowerhalf_s *dev)
#endif
@@ -1622,7 +1625,7 @@ static int wm8904_stop(FAR struct audio_lowerhalf_s *dev)
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int wm8904_pause(FAR struct audio_lowerhalf_s *dev, FAR void* session)
static int wm8904_pause(FAR struct audio_lowerhalf_s *dev, FAR void *session)
#else
static int wm8904_pause(FAR struct audio_lowerhalf_s *dev)
#endif
@@ -1651,7 +1654,7 @@ static int wm8904_pause(FAR struct audio_lowerhalf_s *dev)
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
#ifdef CONFIG_AUDIO_MULTI_SESSION
static int wm8904_resume(FAR struct audio_lowerhalf_s *dev, FAR void* session)
static int wm8904_resume(FAR struct audio_lowerhalf_s *dev, FAR void *session)
#else
static int wm8904_resume(FAR struct audio_lowerhalf_s *dev)
#endif
drivers/audio/wm8904_debug.c
+1 -1
View File
@@ -394,7 +394,7 @@ void wm8904_clock_analysis(FAR struct audio_lowerhalf_s *dev,
else
{
syslog(LOG_INFO, " MCLK_DIV: 2\n");
sysclk >>=1;
sysclk >>= 1;
}
syslog(LOG_INFO, " SYSCLK: %lu (after divider)\n", (unsigned long)sysclk);
drivers/bch/bchdev_driver.c
+1 -1
View File
@@ -322,7 +322,7 @@ static int bch_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
#if defined(CONFIG_BCH_ENCRYPTION)
else if (cmd == DIOC_SETKEY)
{
memcpy(bch->key, (void*)arg, CONFIG_BCH_ENCRYPTION_KEY_SIZE);
memcpy(bch->key, (FAR void *)arg, CONFIG_BCH_ENCRYPTION_KEY_SIZE);
ret = OK;
}
#endif
drivers/bch/bchlib_cache.c
+5 -2
View File
@@ -91,13 +91,16 @@ static void bch_xor(uint32_t *R, uint32_t *A, uint32_t *B)
static int bch_cypher(FAR struct bchlib_s *bch, int encrypt)
{
int blocks = bch->sectsize / 16;
uint32_t *buffer = (uint32_t*)bch->buffer;
FAR uint32_t *buffer = (FAR uint32_t *)bch->buffer;
int i;
for (i = 0; i < blocks; i++, buffer += 16 / sizeof(uint32_t) )
{
uint32_t T[4];
uint32_t X[4] = {bch->sector, 0, 0, i};
uint32_t X[4] =
{
bch->sector, 0, 0, i
};
aes_cypher(X, X, 16, NULL, bch->key, CONFIG_BCH_ENCRYPTION_KEY_SIZE,
AES_MODE_ECB, CYPHER_ENCRYPT);
drivers/bch/bchlib_read.c
+1 -1
View File
@@ -148,7 +148,7 @@ ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset, size_t le
* into the user buffer.
*/
if (len >= bch->sectsize )
if (len >= bch->sectsize)
{
nsectors = len / bch->sectsize;
if (sector + nsectors > bch->nsectors)
drivers/bch/bchlib_setup.c
+1 -1
View File
@@ -93,7 +93,7 @@ int bchlib_setup(const char *blkdev, bool readonly, FAR void **handle)
/* Allocate the BCH state structure */
bch = (FAR struct bchlib_s*)kmm_zalloc(sizeof(struct bchlib_s));
bch = (FAR struct bchlib_s *)kmm_zalloc(sizeof(struct bchlib_s));
if (!bch)
{
fdbg("Failed to allocate BCH structure\n");
drivers/bch/bchlib_write.c
+1 -1
View File
@@ -148,7 +148,7 @@ ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, si
* directly from the user buffer.
*/
if (len >= bch->sectsize )
if (len >= bch->sectsize)
{
nsectors = len / bch->sectsize;
if (sector + nsectors > bch->nsectors)
drivers/can.c
+1 -1
View File
@@ -795,7 +795,7 @@ static int can_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
*/
case CANIOC_RTR:
ret = can_rtrread(dev, (struct canioc_rtr_s*)((uintptr_t)arg));
ret = can_rtrread(dev, (FAR struct canioc_rtr_s *)((uintptr_t)arg));
break;
/* Not a "built-in" ioctl command.. perhaps it is unique to this
drivers/dev_null.c
+6 -4
View File
@@ -50,11 +50,13 @@
* Private Function Prototypes
****************************************************************************/
static ssize_t devnull_read(FAR struct file *, FAR char *, size_t);
static ssize_t devnull_write(FAR struct file *, FAR const char *, size_t);
static ssize_t devnull_read(FAR struct file *filep, FAR char *buffer,
size_t buflen);
static ssize_t devnull_write(FAR struct file *filep, FAR const char *buffer,
size_t buflen);
#ifndef CONFIG_DISABLE_POLL
static int devnull_poll(FAR struct file *filep, FAR struct pollfd *fds,
bool setup);
bool setup);
#endif
/****************************************************************************
@@ -106,7 +108,7 @@ static int devnull_poll(FAR struct file *filep, FAR struct pollfd *fds,
{
if (setup)
{
fds->revents |= (fds->events & (POLLIN|POLLOUT));
fds->revents |= (fds->events & (POLLIN | POLLOUT));
if (fds->revents != 0)
{
sem_post(fds->sem);
drivers/dev_zero.c
+6 -4
View File
@@ -50,11 +50,13 @@
* Private Function Prototypes
****************************************************************************/
static ssize_t devzero_read(FAR struct file *, FAR char *, size_t);
static ssize_t devzero_write(FAR struct file *, FAR const char *, size_t);
static ssize_t devzero_read(FAR struct file *filep, FAR char *buffer,
size_t buflen);
static ssize_t devzero_write(FAR struct file *filep, FAR const char *buffer,
size_t buflen);
#ifndef CONFIG_DISABLE_POLL
static int devzero_poll(FAR struct file *filep, FAR struct pollfd *fds,
bool setup);
bool setup);
#endif
/****************************************************************************
@@ -109,7 +111,7 @@ static int devzero_poll(FAR struct file *filep, FAR struct pollfd *fds,
{
if (setup)
{
fds->revents |= (fds->events & (POLLIN|POLLOUT));
fds->revents |= (fds->events & (POLLIN | POLLOUT));
if (fds->revents != 0)
{
sem_post(fds->sem);
drivers/eeprom/spi_xx25xx.c
+25 -25
View File
@@ -173,10 +173,10 @@
struct ee25xx_geom_s
{
uint8_t bytes : 4; /*power of two of 128 bytes (0:128 1:256 2:512 etc) */
uint8_t pagesize : 4; /*power of two of 8 bytes (0:8 1:16 2:32 3:64 etc)*/
uint8_t addrlen : 4; /*number of bytes in command address field */
uint8_t flags : 4; /*special address management for 25xx040, 1=A8 in inst*/
uint8_t bytes : 4; /* Power of two of 128 bytes (0:128 1:256 2:512 etc) */
uint8_t pagesize : 4; /* Power of two of 8 bytes (0:8 1:16 2:32 3:64 etc) */
uint8_t addrlen : 4; /* Number of bytes in command address field */
uint8_t flags : 4; /* Special address management for 25xx040, 1=A8 in inst */
};
/* Private data attached to the inode */
@@ -219,29 +219,29 @@ static const struct ee25xx_geom_s g_ee25xx_devices[] =
{
/* Microchip devices */
{ 0, 1, 1, 0}, /* 25xx010A 128 16 1*/
{ 1, 1, 1, 0}, /* 25xx020A 256 16 1*/
{ 2, 1, 1, 1}, /* 25xx040 512 16 1+bit*/
{ 3, 1, 1, 0}, /* 25xx080 1024 16 1*/
{ 3, 2, 2, 0}, /* 25xx080B 1024 32 2*/
{ 4, 1, 2, 0}, /* 25xx160 2048 16 2*/
{ 4, 2, 2, 0}, /* 25xx160B/D 2048 32 2*/
{ 5, 2, 2, 0}, /* 25xx320 4096 32 2*/
{ 6, 2, 2, 0}, /* 25xx640 8192 32 2*/
{ 7, 3, 2, 0}, /* 25xx128 16384 64 2*/
{ 8, 3, 2, 0}, /* 25xx256 32768 64 2*/
{ 9, 4, 2, 0}, /* 25xx512 65536 128 2*/
{10, 5, 3, 0}, /* 25xx1024 131072 256 3*/
{ 0, 1, 1, 0}, /* 25xx010A 128 16 1 */
{ 1, 1, 1, 0}, /* 25xx020A 256 16 1 */
{ 2, 1, 1, 1}, /* 25xx040 512 16 1+bit */
{ 3, 1, 1, 0}, /* 25xx080 1024 16 1 */
{ 3, 2, 2, 0}, /* 25xx080B 1024 32 2 */
{ 4, 1, 2, 0}, /* 25xx160 2048 16 2 */
{ 4, 2, 2, 0}, /* 25xx160B/D 2048 32 2 */
{ 5, 2, 2, 0}, /* 25xx320 4096 32 2 */
{ 6, 2, 2, 0}, /* 25xx640 8192 32 2 */
{ 7, 3, 2, 0}, /* 25xx128 16384 64 2 */
{ 8, 3, 2, 0}, /* 25xx256 32768 64 2 */
{ 9, 4, 2, 0}, /* 25xx512 65536 128 2 */
{10, 5, 3, 0}, /* 25xx1024 131072 256 3 */
/* Atmel devices */
{ 0, 0, 1, 0}, /* AT25010B 128 8 1*/
{ 1, 0, 1, 0}, /* AT25020B 256 8 1*/
{ 2, 0, 1, 1}, /* AT25040B 512 8 1+bit*/
{ 0, 0, 1, 0}, /* AT25010B 128 8 1 */
{ 1, 0, 1, 0}, /* AT25020B 256 8 1 */
{ 2, 0, 1, 1}, /* AT25040B 512 8 1+bit */
/* STM devices */
{11, 5, 3, 0}, /* M95M02 262144 256 3*/
{11, 5, 3, 0}, /* M95M02 262144 256 3 */
};
/* Driver operations */
@@ -337,7 +337,7 @@ static void ee25xx_sendcmd(FAR struct spi_dev_s *spi, uint8_t cmd,
buf[cmdlen++] = addr & 0xff;
SPI_SNDBLOCK(spi,buf,cmdlen);
SPI_SNDBLOCK(spi, buf, cmdlen);
}
/****************************************************************************
@@ -488,7 +488,7 @@ static int ee25xx_open(FAR struct file *filep)
/* Increment the reference count */
if ( (eedev->refs + 1) == 0)
if ((eedev->refs + 1) == 0)
{
ret = -EMFILE;
}
@@ -678,7 +678,7 @@ static ssize_t ee25xx_write(FAR struct file *filep, FAR const char *buffer,
/* Clamp len to avoid crossing the end of the memory */
if ( (len + filep->f_pos) > eedev->size)
if ((len + filep->f_pos) > eedev->size)
{
len = eedev->size - filep->f_pos;
}
@@ -807,7 +807,7 @@ int ee25xx_initialize(FAR struct spi_dev_s *dev, FAR char *devname,
eedev->size = 128 << g_ee25xx_devices[devtype].bytes;
eedev->pgsize = 8 << g_ee25xx_devices[devtype].pagesize;
eedev->addrlen = g_ee25xx_devices[devtype].addrlen << 3;
if ( (g_ee25xx_devices[devtype].flags & 1))
if ((g_ee25xx_devices[devtype].flags & 1))
{
eedev->addrlen = 9;
}
drivers/input/ads7843e.c
+6 -6
View File
@@ -395,7 +395,7 @@ static int ads7843e_sample(FAR struct ads7843e_dev_s *priv,
* sampled data.
*/
memcpy(sample, &priv->sample, sizeof(struct ads7843e_sample_s ));
memcpy(sample, &priv->sample, sizeof(struct ads7843e_sample_s));
/* Now manage state transitions */
@@ -480,7 +480,7 @@ static int ads7843e_waitsample(FAR struct ads7843e_dev_s *priv,
ivdbg("Sampled\n");
/* Re-acquire the semaphore that manages mutually exclusive access to
/* Re-acquire the semaphore that manages mutually exclusive access to
* the device structure. We may have to wait here. But we have our sample.
* Interrupts and pre-emption will be re-enabled while we wait.
*/
@@ -974,10 +974,10 @@ static ssize_t ads7843e_read(FAR struct file *filep, FAR char *buffer, size_t le
if (sample.contact == CONTACT_UP)
{
/* Pen is now up. Is the positional data valid? This is important to
* know because the release will be sent to the window based on its
* last positional data.
*/
/* Pen is now up. Is the positional data valid? This is important to
* know because the release will be sent to the window based on its
* last positional data.
*/
if (sample.valid)
{
drivers/input/ajoystick.c
+2 -1
View File
@@ -143,7 +143,8 @@ static void ajoy_sample(FAR struct ajoy_upperhalf_s *priv);
static int ajoy_open(FAR struct file *filep);
static int ajoy_close(FAR struct file *filep);
static ssize_t ajoy_read(FAR struct file *, FAR char *, size_t);
static ssize_t ajoy_read(FAR struct file *filep, FAR char *buffer,
size_t buflen);
static int ajoy_ioctl(FAR struct file *filep, int cmd,
unsigned long arg);
#ifndef CONFIG_DISABLE_POLL
drivers/input/djoystick.c
+3 -2
View File
@@ -143,7 +143,8 @@ static void djoy_sample(FAR struct djoy_upperhalf_s *priv);
static int djoy_open(FAR struct file *filep);
static int djoy_close(FAR struct file *filep);
static ssize_t djoy_read(FAR struct file *, FAR char *, size_t);
static ssize_t djoy_read(FAR struct file *filep, FAR char *buffer,
size_t buflen);
static int djoy_ioctl(FAR struct file *filep, int cmd,
unsigned long arg);
#ifndef CONFIG_DISABLE_POLL
@@ -585,7 +586,7 @@ static ssize_t djoy_read(FAR struct file *filep, FAR char *buffer,
lower = priv->du_lower;
DEBUGASSERT(lower && lower->dl_sample);
priv->du_sample = lower->dl_sample(lower);
*(djoy_buttonset_t*)buffer = priv->du_sample;
*(FAR djoy_buttonset_t *)buffer = priv->du_sample;
ret = sizeof(djoy_buttonset_t);
djoy_givesem(&priv->du_exclsem);
drivers/input/max11802.c
+6 -6
View File
@@ -285,7 +285,7 @@ static uint16_t max11802_sendcmd(FAR struct max11802_dev_s *priv,
result = ((uint16_t)buffer[0] << 8) | (uint16_t)buffer[1];
*tags = result & 0xF;
result >>= 4; // Get rid of tags
result >>= 4; /* Get rid of tags */
ivdbg("cmd:%02x response:%04x\n", cmd, result);
return result;
@@ -359,7 +359,7 @@ static int max11802_sample(FAR struct max11802_dev_s *priv,
* sampled data.
*/
memcpy(sample, &priv->sample, sizeof(struct max11802_sample_s ));
memcpy(sample, &priv->sample, sizeof(struct max11802_sample_s));
/* Now manage state transitions */
@@ -980,10 +980,10 @@ static ssize_t max11802_read(FAR struct file *filep, FAR char *buffer,
if (sample.contact == CONTACT_UP)
{
/* Pen is now up. Is the positional data valid? This is important to
* know because the release will be sent to the window based on its
* last positional data.
*/
/* Pen is now up. Is the positional data valid? This is important to
* know because the release will be sent to the window based on its
* last positional data.
*/
if (sample.valid)
{
drivers/input/mxt.c
+3 -3
View File
@@ -92,8 +92,8 @@
*/
#define MXT_GETUINT16(p) \
(((uint16_t)(((FAR uint8_t*)(p))[1]) << 8) | \
(uint16_t)(((FAR uint8_t*)(p))[0]))
(((uint16_t)(((FAR uint8_t *)(p))[1]) << 8) | \
(uint16_t)(((FAR uint8_t *)(p))[0]))
/****************************************************************************
* Private Types
@@ -1368,7 +1368,7 @@ static ssize_t mxt_read(FAR struct file *filep, FAR char *buffer, size_t len)
memset(report, 0, SIZEOF_TOUCH_SAMPLE_S(ncontacts));
report->npoints = ncontacts;
for (i = 0, j= 0; i < priv->nslots && j < ncontacts; i++)
for (i = 0, j = 0; i < priv->nslots && j < ncontacts; i++)
{
FAR struct mxt_sample_s *sample = &priv->sample[i];
drivers/input/stmpe811_base.c
+4 -3
View File
@@ -101,7 +101,7 @@ static void stmpe811_worker(FAR void *arg)
/* Check for a touchscreen interrupt */
#ifndef CONFIG_STMPE811_TSC_DISABLE
if ((regval & (INT_TOUCH_DET|INT_FIFO_TH|INT_FIFO_OFLOW)) != 0)
if ((regval & (INT_TOUCH_DET | INT_FIFO_TH | INT_FIFO_OFLOW)) != 0)
{
/* Dispatch the touchscreen interrupt if it was brought into the link */
@@ -112,8 +112,9 @@ static void stmpe811_worker(FAR void *arg)
stmpe811_tscworker(priv, regval);
}
stmpe811_putreg8(priv, STMPE811_INT_STA, (INT_TOUCH_DET|INT_FIFO_TH|INT_FIFO_OFLOW));
regval &= ~(INT_TOUCH_DET|INT_FIFO_TH|INT_FIFO_OFLOW);
stmpe811_putreg8(priv, STMPE811_INT_STA,
(INT_TOUCH_DET | INT_FIFO_TH | INT_FIFO_OFLOW));
regval &= ~(INT_TOUCH_DET | INT_FIFO_TH | INT_FIFO_OFLOW);
}
#endif
drivers/input/stmpe811_temp.c
+4 -2
View File
@@ -101,7 +101,8 @@ int stmpe811_tempinitialize(STMPE811_HANDLE handle)
/* Aquire data enable */
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL, (TEMP_CTRL_ACQ|TEMP_CTRL_ENABLE));
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL,
(TEMP_CTRL_ACQ | TEMP_CTRL_ENABLE));
return OK;
}
@@ -130,7 +131,8 @@ uint16_t stmpe811_tempread(STMPE811_HANDLE handle)
/* Acquire data enable */
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL, (TEMP_CTRL_ACQ|TEMP_CTRL_ENABLE));
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL,
(TEMP_CTRL_ACQ | TEMP_CTRL_ENABLE));
/* Read the temperature */
drivers/input/stmpe811_tsc.c
+5 -5
View File
@@ -307,7 +307,7 @@ static inline int stmpe811_waitsample(FAR struct stmpe811_dev_s *priv,
if (ret < 0)
{
#ifdef CONFIG_DEBUG
// Sample the errno (debug output could change it)
/* Sample the errno (debug output could change it) */
int errval = errno;
@@ -577,11 +577,11 @@ errout:
/****************************************************************************
* Name: stmpe811_ioctl
*
*
* Description:
* Standard character driver ioctl method.
*
****************************************************************************/
****************************************************************************/
static int stmpe811_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
@@ -860,7 +860,7 @@ static inline void stmpe811_tscinitialize(FAR struct stmpe811_dev_s *priv)
stmpe811_putreg8(priv, STMPE811_TSC_IDRIVE, TSC_IDRIVE_50MA);
/* Enable the TSC. Use no tracking index, touch-screen controller
* operation mode (XYZ).
* operation mode (XYZ).
*/
stmpe811_putreg8(priv, STMPE811_TSC_CTRL, TSC_CTRL_EN);
@@ -1019,7 +1019,7 @@ void stmpe811_tscworker(FAR struct stmpe811_dev_s *priv, uint8_t intsta)
/* The pen is down... check for data in the FIFO */
else if ((intsta & (INT_FIFO_TH|INT_FIFO_OFLOW)) != 0)
else if ((intsta & (INT_FIFO_TH | INT_FIFO_OFLOW)) != 0)
{
/* Read the next x and y positions from the FIFO. */
drivers/input/tsc2007.c
+7 -7
View File
@@ -309,7 +309,7 @@ static int tsc2007_sample(FAR struct tsc2007_dev_s *priv,
* sampled data.
*/
memcpy(sample, &priv->sample, sizeof(struct tsc2007_sample_s ));
memcpy(sample, &priv->sample, sizeof(struct tsc2007_sample_s));
/* Now manage state transitions */
@@ -539,10 +539,10 @@ static int tsc2007_transfer(FAR struct tsc2007_dev_s *priv, uint8_t cmd)
return ret;
}
/* Get the MS 8 bits from the first byte and the remaining LS 4 bits from
* the second byte. The valid range of data is then from 0 to 4095 with
* the LSB unit corresponding to Vref/4096.
*/
/* Get the MS 8 bits from the first byte and the remaining LS 4 bits from
* the second byte. The valid range of data is then from 0 to 4095 with
* the LSB unit corresponding to Vref/4096.
*/
ret = (unsigned int)data12[0] << 4 | (unsigned int)data12[1] >> 4;
ivdbg("data: 0x%04x\n", ret);
@@ -971,8 +971,8 @@ static ssize_t tsc2007_read(FAR struct file *filep, FAR char *buffer, size_t len
if (sample.contact == CONTACT_UP)
{
/* Pen is now up. Is the positional data valid? This is important to
* know because the release will be sent to the window based on its
/* Pen is now up. Is the positional data valid? This is important to
* know because the release will be sent to the window based on its
* last positional data.
*/
drivers/ioexpander/pca9555.c
+9 -9
View File
@@ -215,7 +215,7 @@ static int pca9555_getbit(FAR struct i2c_dev_s *i2c, uint8_t addr,
static int pca9555_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
int direction)
{
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
return pca9555_setbit(pca->i2c, PCA9555_REG_CONFIG, pin,
(direction == IOEXPANDER_DIRECTION_IN));
}
@@ -231,7 +231,7 @@ static int pca9555_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
static int pca9555_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
int opt, void *val)
{
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
int ival = (int)val;
if (opt == IOEXPANDER_OPTION_INVERT)
@@ -253,7 +253,7 @@ static int pca9555_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
static int pca9555_write(FAR struct ioexpander_dev_s *dev, uint8_t pin,
bool value)
{
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
return pca9555_setbit(pca->i2c, PCA9555_REG_OUTPUT, pin, value);
}
@@ -268,7 +268,7 @@ static int pca9555_write(FAR struct ioexpander_dev_s *dev, uint8_t pin,
static int pca9555_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
FAR bool *value)
{
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
return pca9555_getbit(pca->i2c, PCA9555_REG_INPUT, pin, value);
}
@@ -283,7 +283,7 @@ static int pca9555_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
static int pca9555_readbuf(FAR struct ioexpander_dev_s *dev, uint8_t pin,
FAR bool *value)
{
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
return pca9555_getbit(pca->i2c, PCA9555_REG_OUTPUT, pin, value);
}
@@ -348,7 +348,7 @@ static int pca9555_multiwrite(FAR struct ioexpander_dev_s *dev,
FAR uint8_t *pins, FAR bool *values,
int count)
{
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
uint8_t addr = PCA9555_REG_OUTPUT;
uint8_t buf[3];
int ret;
@@ -410,7 +410,7 @@ static int pca9555_multireadpin(FAR struct ioexpander_dev_s *dev,
FAR uint8_t *pins, FAR bool *values,
int count)
{
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
return pca9555_getmultibits(pca->i2c, PCA9555_REG_INPUT,
pins, values, count);
}
@@ -427,7 +427,7 @@ static int pca9555_multireadbuf(FAR struct ioexpander_dev_s *dev,
FAR uint8_t *pins, FAR bool *values,
int count)
{
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
return pca9555_getmultibits(pca->i2c, PCA9555_REG_OUTPUT,
pins, values, count);
}
@@ -447,7 +447,7 @@ static int pca9555_multireadbuf(FAR struct ioexpander_dev_s *dev,
static int pca9555_attach(FAR struct ioexpander_dev_s *dev, uint8_t pin,
ioexpander_handler_t handler)
{
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
return 0;
}
drivers/lcd/ili9341.c
+13 -20
View File
@@ -62,8 +62,7 @@
* Pre-processor Definitions
****************************************************************************/
/*
* This is the generic lcd driver interface for the ili9341 Single Chip LCD
/* This is the generic lcd driver interface for the ili9341 Single Chip LCD
* driver. The driver supports multiple displays, each connected with an own
* ili9341 Single Chip LCD driver. The communication with the LCD single chip
* driver must be provide by a subdriver accessable trough the ili9341_dev_s
@@ -157,8 +156,7 @@
/* Memory access control (MADCTL) */
/*
* Landscape: 00100000 / 00101000 / h28
/* Landscape: 00100000 / 00101000 / h28
*
* MY: 0
* MX: 0
@@ -186,8 +184,7 @@
ILI9341_MADCTL_LANDSCAPE_BGR | \
ILI9341_MADCTL_LANDSCAPE_MH)
/*
* Portrait: 00000000 / 00001000 / h08
/* Portrait: 00000000 / 00001000 / h08
*
* MY: 0
* MX: 0
@@ -214,8 +211,7 @@
ILI9341_MADCTL_PORTRAIT_ML | \
ILI9341_MADCTL_PORTRAIT_BGR | \
ILI9341_MADCTL_PORTRAIT_MH)
/*
* RLandscape: 01100000 / 01101000 / h68
/* RLandscape: 01100000 / 01101000 / h68
*
* MY: 0
* MX: 1
@@ -244,8 +240,7 @@
ILI9341_MADCTL_RLANDSCAPE_BGR | \
ILI9341_MADCTL_RLANDSCAPE_MH)
/*
* RPortrait: 11000000 / 11001000 / hc8
/* RPortrait: 11000000 / 11001000 / hc8
*
* MY: 1
* MX: 1
@@ -292,8 +287,7 @@
#define ILI9341_PIXSET_16BITMCU_PARAM1 (ILI9341_PIXSET_16BITDPI | \
ILI9341_PIXSET_16BITDBI)
/*
* 18-bit MCU: 01100110 / h66 (not supported by nuttx until now)
/* 18-bit MCU: 01100110 / h66 (not supported by nuttx until now)
*
* DPI: 6 (RGB18-666 RGB interface)
* DBI: 6 (RGB18-666 MCU interface)
@@ -387,8 +381,7 @@
* Private Type Definition
****************************************************************************/
/*
* Each single connected ili9341 LCD driver needs an own driver instance
/* Each single connected ili9341 LCD driver needs an own driver instance
* to provide a unique getrun and putrun method. Also store fundamental
* parameter in driver internal structure. This minimal overhead should be
* acceptable.
@@ -453,14 +446,14 @@ static int ili9341_putrun(int devno, fb_coord_t row, fb_coord_t col,
static int ili9341_getrun(int devno, fb_coord_t row, fb_coord_t col,
FAR uint8_t * buffer, size_t npixels);
#endif
/*
* Definition of the public visible getrun / putrun methods
/* Definition of the public visible getrun / putrun methods
* each for a single LCD driver
*/
#ifdef CONFIG_LCD_ILI9341_IFACE0
static int ili9341_putrun0(fb_coord_t row, fb_coord_t col,
FAR const uint8_t * buffer, size_t npixsels);
FAR const uint8_t *buffer, size_t npixsels);
#endif
#ifdef CONFIG_LCD_ILI9341_IFACE1
static int ili9341_putrun1(fb_coord_t row, fb_coord_t col,
@@ -659,7 +652,7 @@ static int ili9341_putrun(int devno, fb_coord_t row, fb_coord_t col,
{
FAR struct ili9341_dev_s *dev = &g_lcddev[devno];
FAR struct ili9341_lcd_s *lcd = dev->lcd;
FAR const uint16_t *src = (const uint16_t*)buffer;
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
@@ -720,7 +713,7 @@ static int ili9341_getrun(int devno, fb_coord_t row, fb_coord_t col,
{
FAR struct ili9341_dev_s *dev = &g_lcddev[devno];
FAR struct ili9341_lcd_s *lcd = dev->lcd;
FAR uint16_t *dest = (uint16_t*)buffer;
FAR uint16_t *dest = (FAR uint16_t *)buffer;
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
@@ -994,7 +987,7 @@ static int ili9341_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
pinfo->getrun = priv->getrun;
#endif
pinfo->bpp = priv->bpp;
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
lcdvdbg("planeno: %d bpp: %d\n", planeno, pinfo->bpp);
drivers/lcd/memlcd.c
+4 -7
View File
@@ -333,15 +333,13 @@ static inline void memlcd_select(FAR struct spi_dev_s *spi)
#else
static void memlcd_select(FAR struct spi_dev_s *spi)
{
/*
* Select memlcd (locking the SPI bus in case there are multiple
/* Select memlcd (locking the SPI bus in case there are multiple
* devices competing for the SPI bus
*/
SPI_LOCK(spi, true);
SPI_SELECT(spi, SPIDEV_DISPLAY, true);
/*
* Now make sure that the SPI bus is configured for the memlcd (it
/* Now make sure that the SPI bus is configured for the memlcd (it
* might have gotten configured for a different device while unlocked)
*/
SPI_SETMODE(spi, MEMLCD_SPI_MODE);
@@ -435,9 +433,8 @@ static int memlcd_extcominisr(int irq, FAR void *context)
struct memlcd_dev_s *mlcd = &g_memlcddev;
#ifdef CONFIG_MEMLCD_EXTCOMIN_MODE_HW
# error "CONFIG_MEMLCD_EXTCOMIN_MODE_HW unsupported yet!"
/*
* start a worker thread, do it in bottom half?
*/
/* Start a worker thread, do it in bottom half? */
#else
pol = !pol;
mlcd->priv->setpolarity(pol);
drivers/lcd/mio283qt2.c
+6 -6
View File
@@ -529,7 +529,7 @@ static int mio283qt2_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *b
{
FAR struct mio283qt2_dev_s *priv = &g_lcddev;
FAR struct mio283qt2_lcd_s *lcd = priv->lcd;
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
@@ -578,7 +578,7 @@ static int mio283qt2_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
#ifndef CONFIG_LCD_NOGETRUN
FAR struct mio283qt2_dev_s *priv = &g_lcddev;
FAR struct mio283qt2_lcd_s *lcd = priv->lcd;
FAR uint16_t *dest = (FAR uint16_t*)buffer;
FAR uint16_t *dest = (FAR uint16_t *)buffer;
uint16_t accum;
int i;
@@ -658,10 +658,10 @@ static int mio283qt2_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planen
DEBUGASSERT(dev && pinfo && planeno == 0);
lcdvdbg("planeno: %d bpp: %d\n", planeno, MIO283QT2_BPP);
pinfo->putrun = mio283qt2_putrun; /* Put a run into LCD memory */
pinfo->getrun = mio283qt2_getrun; /* Get a run from LCD memory */
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = MIO283QT2_BPP; /* Bits-per-pixel */
pinfo->putrun = mio283qt2_putrun; /* Put a run into LCD memory */
pinfo->getrun = mio283qt2_getrun; /* Get a run from LCD memory */
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = MIO283QT2_BPP; /* Bits-per-pixel */
return OK;
}
drivers/lcd/mio283qt9a.c
+15 -18
View File
@@ -382,16 +382,15 @@ static inline uint16_t mio283qt9a_gramread(FAR struct mio283qt9a_lcd_s *lcd,
static void mio283qt9a_setarea(FAR struct mio283qt9a_lcd_s *lcd,
uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1)
{
//lcddbg("setarea x0=%d, y0=%d, x1=%d, y1=%d\n", x0, y0, x1, y1);
mio283qt9a_putreg(lcd, 0x2a, (x0 >> 8)); /* Set column address x0 */
lcd->write(lcd, (x0 & 0xff)); /* Set x0 */
lcd->write(lcd, (x1 >> 8)); /* Set x1 */
lcd->write(lcd, (x1 & 0xff)); /* Set x1 */
mio283qt9a_putreg(lcd, 0x2a, (x0 >> 8)); /* set column address x0 */
lcd->write(lcd, (x0 & 0xff)); /* set x0 */
lcd->write(lcd, (x1 >> 8)); /* set x1 */
lcd->write(lcd, (x1 & 0xff)); /* set x1 */
mio283qt9a_putreg(lcd, 0x2b, (y0 >> 8)); /* set page address y0 */
lcd->write(lcd, (y0 & 0xff)); /* set y0 */
lcd->write(lcd, (y1 >> 8)); /* set y1 */
lcd->write(lcd, (y1 & 0xff)); /* set y1 */
mio283qt9a_putreg(lcd, 0x2b, (y0 >> 8)); /* Set page address y0 */
lcd->write(lcd, (y0 & 0xff)); /* Set y0 */
lcd->write(lcd, (y1 >> 8)); /* Set y1 */
lcd->write(lcd, (y1 & 0xff)); /* Set y1 */
}
/**************************************************************************************
@@ -445,12 +444,11 @@ static int mio283qt9a_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *
{
FAR struct mio283qt9a_dev_s *priv = &g_lcddev;
FAR struct mio283qt9a_lcd_s *lcd = priv->lcd;
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
//lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
/* Select the LCD */
@@ -494,7 +492,7 @@ static int mio283qt9a_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer
#ifndef CONFIG_LCD_NOGETRUN
FAR struct mio283qt9a_dev_s *priv = &g_lcddev;
FAR struct mio283qt9a_lcd_s *lcd = priv->lcd;
FAR uint16_t *dest = (FAR uint16_t*)buffer;
FAR uint16_t *dest = (FAR uint16_t *)buffer;
uint16_t accum, test;
int i;
@@ -520,8 +518,7 @@ static int mio283qt9a_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer
for (i = 0; i < npixels; i++)
{
test= mio283qt9a_gramread(lcd, &accum);
// lcddbg("read 0x%04x\n", test);
test = mio283qt9a_gramread(lcd, &accum);
*dest++ = test;
}
@@ -572,10 +569,10 @@ static int mio283qt9a_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int plane
DEBUGASSERT(dev && pinfo && planeno == 0);
lcdvdbg("planeno: %d bpp: %d\n", planeno, MIO283QT9A_BPP);
pinfo->putrun = mio283qt9a_putrun; /* Put a run into LCD memory */
pinfo->getrun = mio283qt9a_getrun; /* Get a run from LCD memory */
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = MIO283QT9A_BPP; /* Bits-per-pixel */
pinfo->putrun = mio283qt9a_putrun; /* Put a run into LCD memory */
pinfo->getrun = mio283qt9a_getrun; /* Get a run from LCD memory */
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = MIO283QT9A_BPP; /* Bits-per-pixel */
return OK;
}
drivers/lcd/nokia6100.c
+32 -32
View File
@@ -435,10 +435,10 @@ static const struct fb_videoinfo_s g_videoinfo =
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = nokia_putrun, /* Put a run into LCD memory */
.getrun = nokia_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
.bpp = NOKIA_BPP, /* Bits-per-pixel */
.putrun = nokia_putrun, /* Put a run into LCD memory */
.getrun = nokia_getrun, /* Get a run from LCD memory */
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = NOKIA_BPP, /* Bits-per-pixel */
};
/* This is the standard, NuttX LCD driver object */
@@ -477,21 +477,21 @@ static struct nokia_dev_s g_lcddev =
#if 1 // CONFIG_NOKIA6100_BPP == 12
static const uint8_t g_disctl[] =
{
S1D15G10_DISCTL, /* Display control */
DISCTL_CLDIV_2|DISCTL_PERIOD_8, /* P1: Divide clock by 2; switching period = 8 */
//DISCTL_CLDIV_NONE|DISCTL_PERIOD_8, /* P1: No clock division; switching period = 8 */
32, /* P2: nlines/4 - 1 = 132/4 - 1 = 32 */
0, /* P3: No inversely highlighted lines */
0 /* P4: No disperion */
S1D15G10_DISCTL, /* Display control */
DISCTL_CLDIV_2 | DISCTL_PERIOD_8, /* P1: Divide clock by 2; switching period = 8 */
//DISCTL_CLDIV_NONE | DISCTL_PERIOD_8, /* P1: No clock division; switching period = 8 */
32, /* P2: nlines/4 - 1 = 132/4 - 1 = 32 */
0, /* P3: No inversely highlighted lines */
0 /* P4: No disperion */
};
#else /* CONFIG_NOKIA6100_BPP == 8 */
static const uint8_t g_disctl[] =
{
S1D15G10_DISCTL, /* Display control */
DISCTL_CLDIV_2|DISCTL_PERIOD_FLD, /* P1: Divide clock by 2; switching period = field */
32, /* P2: nlines/4 - 1 = 132/4 - 1 = 32 */
0, /* P3: No inversely highlighted lines */
0 /* P4: No disperion */
S1D15G10_DISCTL, /* Display control */
DISCTL_CLDIV_2 | DISCTL_PERIOD_FLD, /* P1: Divide clock by 2; switching period = field */
32, /* P2: nlines/4 - 1 = 132/4 - 1 = 32 */
0, /* P3: No inversely highlighted lines */
0 /* P4: No disperion */
};
#endif
@@ -501,8 +501,8 @@ static const uint8_t g_disctl[] =
static const uint8_t g_comscn[] =
{
S1D15G10_COMSCN, /* Common scan direction */
1 /* 0x01 = Scan 1->68, 132<-69 */
S1D15G10_COMSCN, /* Common scan direction */
1 /* 0x01 = Scan 1->68, 132<-69 */
};
/* Power control:
@@ -513,7 +513,7 @@ static const uint8_t g_comscn[] =
static const uint8_t g_pwrctr[] =
{
S1D15G10_PWRCTR, /* Power control */
PWCTR_REFVOLTAGE|PWCTR_REGULATOR|PWCTR_BOOSTER2|PWCTR_BOOSTER1
PWCTR_REFVOLTAGE | PWCTR_REGULATOR | PWCTR_BOOSTER2 | PWCTR_BOOSTER1
};
/* Data control:
@@ -528,13 +528,13 @@ static const uint8_t g_datctl[] =
S1D15G10_DATCTL, /* Data control */
0
#if CONFIG_NOKIA6100_MY != 0 /* Display row direction */
|DATCTL_PGADDR_INV /* Page address inverted */
| DATCTL_PGADDR_INV /* Page address inverted */
#endif
#if CONFIG_NOKIA6100_MX != 0 /* Display column direction */
|DATCTL_COLADDR_REV /* Column address reversed */
| DATCTL_COLADDR_REV /* Column address reversed */
#endif
#if CONFIG_NOKIA6100_V != 0 /* Display address direction */
|DATCTL_ADDR_PGDIR /* Address scan in page direction */
| DATCTL_ADDR_PGDIR /* Address scan in page direction */
#endif
,
#if CONFIG_NOKIA6100_RGBORD != 0
@@ -617,22 +617,22 @@ static const uint8_t g_colmod[] =
static const uint8_t g_madctl[] =
{
PCF8833_MADCTL, /* Memory data access control*/
PCF8833_MADCTL, /* Memory data access control */
0
#ifdef CONFIG_NOKIA6100_RGBORD != 0
|MADCTL_RGB /* RGB->BGR */
| MADCTL_RGB /* RGB->BGR */
#endif
#ifdef CONFIG_NOKIA6100_MY != 0 /* Display row direction */
|MADCTL_MY /* Mirror Y */
#ifdef CONFIG_NOKIA6100_MY != 0 /* Display row direction */
| MADCTL_MY /* Mirror Y */
#endif
#ifdef CONFIG_NOKIA6100_MX != 0 /* Display column direction */
|MADCTL_MX /* Mirror X */
#ifdef CONFIG_NOKIA6100_MX != 0 /* Display column direction */
| MADCTL_MX /* Mirror X */
#endif
#ifdef CONFIG_NOKIA6100_V != 0 /* Display address direction */
|MADCTL_V /* ertical RAM write; in Y direction */
#ifdef CONFIG_NOKIA6100_V != 0 /* Display address direction */
| MADCTL_V /* ertical RAM write; in Y direction */
#endif
#ifdef CONFIG_NOKIA6100_ML != 0 /* Display scan direction */
|MADCTL_LAO /* Line address order bottom to top */
#ifdef CONFIG_NOKIA6100_ML != 0 /* Display scan direction */
| MADCTL_LAO /* Line address order bottom to top */
#endif
};
@@ -931,7 +931,7 @@ static int nokia_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffe
#if NOKIA_YBIAS > 0
row += NOKIA_YBIAS;
#endif
DEBUGASSERT(buffer && col >=0 && (col + npixels) <= NOKIA_XRES && row >= 0 && row < NOKIA_YRES);
DEBUGASSERT(buffer && col >= 0 && (col + npixels) <= NOKIA_XRES && row >= 0 && row < NOKIA_YRES);
/* Set up to write the run. */
drivers/lcd/p14201.c
+27 -27
View File
@@ -283,20 +283,20 @@ static uint8_t g_framebuffer[RIT_YRES * RIT_XRES / 2];
static const struct fb_videoinfo_s g_videoinfo =
{
.fmt = RIT_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
.xres = RIT_XRES, /* Horizontal resolution in pixel columns */
.yres = RIT_YRES, /* Vertical resolution in pixel rows */
.nplanes = 1, /* Number of color planes supported */
.fmt = RIT_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
.xres = RIT_XRES, /* Horizontal resolution in pixel columns */
.yres = RIT_YRES, /* Vertical resolution in pixel rows */
.nplanes = 1, /* Number of color planes supported */
};
/* This is the standard, NuttX Plane information object */
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = rit_putrun, /* Put a run into LCD memory */
.getrun = rit_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
.bpp = RIT_BPP, /* Bits-per-pixel */
.putrun = rit_putrun, /* Put a run into LCD memory */
.getrun = rit_getrun, /* Get a run from LCD memory */
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = RIT_BPP, /* Bits-per-pixel */
};
/* This is the OLED driver instance (only a single device is supported for now) */
@@ -347,8 +347,8 @@ static const uint8_t g_initcmds[] =
(31 << 1) | SSD1329_PRECHRG2_DBL, /* Pre-charge speed == 32, doubled */
SSD1329_NOOP,
3, SSD1329_GDDRAM_REMAP, /* Set GDDRAM re-map */
(SSD1329_COM_SPLIT| /* Enable COM slip even/odd */
SSD1329_COM_REMAP| /* Enable COM re-map */
(SSD1329_COM_SPLIT | /* Enable COM slip even/odd */
SSD1329_COM_REMAP | /* Enable COM re-map */
SSD1329_NIBBLE_REMAP), /* Enable nibble re-map */
SSD1329_NOOP,
3, SSD1329_VERT_START, /* Set Display Start Line */
@@ -405,7 +405,7 @@ static const uint8_t g_sleepon[] =
static const uint8_t g_horzinc[] =
{
SSD1329_GDDRAM_REMAP,
(SSD1329_COM_SPLIT|SSD1329_COM_REMAP|SSD1329_NIBBLE_REMAP),
(SSD1329_COM_SPLIT | SSD1329_COM_REMAP | SSD1329_NIBBLE_REMAP),
};
/* The following set a window that covers the entire display */
@@ -570,7 +570,7 @@ static void rit_sndbytes(FAR struct rit_dev_s *priv, FAR const uint8_t *buffer,
uint8_t tmp;
ritdbg("buflen: %d cmd: %s [%02x %02x %02x]\n",
buflen, cmd ? "YES" : "NO", buffer[0], buffer[1], buffer[2] );
buflen, cmd ? "YES" : "NO", buffer[0], buffer[1], buffer[2]);
DEBUGASSERT(spi);
/* Clear/set the D/Cn bit to enable command or data mode */
@@ -769,19 +769,19 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
memcpy(&run[start], buffer, aend - start);
}
/* An even number of byte-aligned pixel pairs have been written (where
* zero counts as an even number). If npixels was was odd (including
* npixels == 1), then handle the final, byte aligned pixel.
*/
/* An even number of byte-aligned pixel pairs have been written (where
* zero counts as an even number). If npixels was was odd (including
* npixels == 1), then handle the final, byte aligned pixel.
*/
if (aend != end)
{
/* The leftmost column is contained in source bits 7:4 and in
* destination bits 7:4
*/
if (aend != end)
{
/* The leftmost column is contained in source bits 7:4 and in
* destination bits 7:4
*/
run[aend] = (run[aend] & 0x0f) | (buffer[aend - start] & 0xf0);
}
run[aend] = (run[aend] & 0x0f) | (buffer[aend - start] & 0xf0);
}
}
/* CASE 2: First pixel X position is byte aligned
@@ -825,10 +825,10 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
run[i] = (last << 4) | (curr >> 4);
}
/* An odd number of unaligned pixel have been written (where npixels
* may have been as small as one). If npixels was was even, then handle
* the final, unaligned pixel.
*/
/* An odd number of unaligned pixel have been written (where npixels
* may have been as small as one). If npixels was was even, then handle
* the final, unaligned pixel.
*/
if (aend != end)
{
drivers/lcd/ra8875.c
+12 -11
View File
@@ -391,9 +391,10 @@ static void ra8875_waitreg(FAR struct ra8875_lcd_s *lcd, uint8_t regaddr, uint8_
{
int i = 20000/100;
while (i-- && ra8875_readreg(lcd, regaddr) & mask) {
up_udelay(100);
}
while (i-- && ra8875_readreg(lcd, regaddr) & mask)
{
up_udelay(100);
}
}
#endif
@@ -624,9 +625,9 @@ static int ra8875_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buff
#if RA8875_BPP == 16
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
#else
FAR const uint8_t *src = (FAR const uint8_t*)buffer;
FAR const uint8_t *src = (FAR const uint8_t *)buffer;
#endif
int i;
@@ -733,7 +734,7 @@ static int ra8875_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
#ifndef CONFIG_LCD_NOGETRUN
FAR struct ra8875_dev_s *priv = &g_lcddev;
FAR struct ra8875_lcd_s *lcd = priv->lcd;
FAR uint16_t *dest = (FAR uint16_t*)buffer;
FAR uint16_t *dest = (FAR uint16_t *)buffer;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
@@ -854,10 +855,10 @@ static int ra8875_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
DEBUGASSERT(dev && pinfo && planeno == 0);
lcdvdbg("planeno: %d bpp: %d\n", planeno, RA8875_BPP);
pinfo->putrun = ra8875_putrun; /* Put a run into LCD memory */
pinfo->getrun = ra8875_getrun; /* Get a run from LCD memory */
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = RA8875_BPP; /* Bits-per-pixel */
pinfo->putrun = ra8875_putrun; /* Put a run into LCD memory */
pinfo->getrun = ra8875_getrun; /* Get a run from LCD memory */
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = RA8875_BPP; /* Bits-per-pixel */
return OK;
}
@@ -990,7 +991,7 @@ static inline int ra8875_hwinitialize(FAR struct ra8875_dev_s *priv)
uint8_t rv;
FAR struct ra8875_lcd_s *lcd = priv->lcd;
/*@@TODO: Maybe some of these values needs to be configurable?? */
/* REVISIT: Maybe some of these values needs to be configurable?? */
lcdvdbg("hwinitialize\n");
drivers/lcd/skeleton.c
+4 -4
View File
@@ -178,10 +178,10 @@ static const struct fb_videoinfo_s g_videoinfo =
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = skel_putrun, /* Put a run into LCD memory */
.getrun = skel_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
.bpp = SKEL_BPP, /* Bits-per-pixel */
.putrun = skel_putrun, /* Put a run into LCD memory */
.getrun = skel_getrun, /* Get a run from LCD memory */
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = SKEL_BPP, /* Bits-per-pixel */
};
/* This is the standard, NuttX LCD driver object */
drivers/lcd/ssd1289.c
+6 -6
View File
@@ -588,7 +588,7 @@ static int ssd1289_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buf
{
FAR struct ssd1289_dev_s *priv = &g_lcddev;
FAR struct ssd1289_lcd_s *lcd = priv->lcd;
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
@@ -718,7 +718,7 @@ static int ssd1289_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
#ifndef CONFIG_LCD_NOGETRUN
FAR struct ssd1289_dev_s *priv = &g_lcddev;
FAR struct ssd1289_lcd_s *lcd = priv->lcd;
FAR uint16_t *dest = (FAR uint16_t*)buffer;
FAR uint16_t *dest = (FAR uint16_t *)buffer;
uint16_t accum;
int i;
@@ -872,10 +872,10 @@ static int ssd1289_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
DEBUGASSERT(dev && pinfo && planeno == 0);
lcdvdbg("planeno: %d bpp: %d\n", planeno, SSD1289_BPP);
pinfo->putrun = ssd1289_putrun; /* Put a run into LCD memory */
pinfo->getrun = ssd1289_getrun; /* Get a run from LCD memory */
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = SSD1289_BPP; /* Bits-per-pixel */
pinfo->putrun = ssd1289_putrun; /* Put a run into LCD memory */
pinfo->getrun = ssd1289_getrun; /* Get a run from LCD memory */
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = SSD1289_BPP; /* Bits-per-pixel */
return OK;
}
drivers/lcd/ssd1306_base.c
+28 -28
View File
@@ -208,10 +208,10 @@ static const struct fb_videoinfo_s g_videoinfo =
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = ssd1306_putrun, /* Put a run into LCD memory */
.getrun = ssd1306_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
.bpp = SSD1306_DEV_BPP, /* Bits-per-pixel */
.putrun = ssd1306_putrun, /* Put a run into LCD memory */
.getrun = ssd1306_getrun, /* Get a run from LCD memory */
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = SSD1306_DEV_BPP, /* Bits-per-pixel */
};
/* This is the OLED driver instance (only a single device is supported for now) */
@@ -864,40 +864,40 @@ FAR struct lcd_dev_s *ssd1306_initialize(FAR struct i2c_dev_s *dev, unsigned int
/* Configure the device */
ssd1306_sendbyte(priv, SSD1306_DISPOFF); /* Display off 0xae */
ssd1306_sendbyte(priv, SSD1306_SETCOLL(0)); /* Set lower column address 0x00 */
ssd1306_sendbyte(priv, SSD1306_SETCOLH(0)); /* Set higher column address 0x10 */
ssd1306_sendbyte(priv, SSD1306_STARTLINE(0)); /* Set display start line 0x40 */
/* ssd1306_sendbyte(priv, SSD1306_PAGEADDR(0));*//* Set page address (Can ignore)*/
ssd1306_sendbyte(priv, SSD1306_CONTRAST_MODE); /* Contrast control 0x81 */
ssd1306_sendbyte(priv,SSD1306_CONTRAST(SSD1306_DEV_CONTRAST)); /* Default contrast 0xCF */
ssd1306_sendbyte(priv, SSD1306_REMAPPLEFT); /* Set segment remap left 95 to 0 | 0xa1 */
/* ssd1306_sendbyte(priv, SSD1306_EDISPOFF); */ /* Normal display off 0xa4 (Can ignore)*/
ssd1306_sendbyte(priv, SSD1306_NORMAL); /* Normal (un-reversed) display mode 0xa6 */
ssd1306_sendbyte(priv, SSD1306_MRATIO_MODE); /* Multiplex ratio 0xa8 */
ssd1306_sendbyte(priv, SSD1306_DISPOFF); /* Display off 0xae */
ssd1306_sendbyte(priv, SSD1306_SETCOLL(0)); /* Set lower column address 0x00 */
ssd1306_sendbyte(priv, SSD1306_SETCOLH(0)); /* Set higher column address 0x10 */
ssd1306_sendbyte(priv, SSD1306_STARTLINE(0)); /* Set display start line 0x40 */
//ssd1306_sendbyte(priv, SSD1306_PAGEADDR(0)); /* Set page address (Can ignore) */
ssd1306_sendbyte(priv, SSD1306_CONTRAST_MODE); /* Contrast control 0x81 */
ssd1306_sendbyte(priv, SSD1306_CONTRAST(SSD1306_DEV_CONTRAST)); /* Default contrast 0xCF */
ssd1306_sendbyte(priv, SSD1306_REMAPPLEFT); /* Set segment remap left 95 to 0 | 0xa1 */
//ssd1306_sendbyte(priv, SSD1306_EDISPOFF); /* Normal display off 0xa4 (Can ignore) */
ssd1306_sendbyte(priv, SSD1306_NORMAL); /* Normal (un-reversed) display mode 0xa6 */
ssd1306_sendbyte(priv, SSD1306_MRATIO_MODE); /* Multiplex ratio 0xa8 */
ssd1306_sendbyte(priv, SSD1306_MRATIO(SSD1306_DEV_DUTY)); /* Duty = 1/64 or 1/32 */
/* ssd1306_sendbyte(priv, SSD1306_SCANTOCOM0);*/ /* Com scan direction: Scan from COM[n-1] to COM[0] (Can ignore)*/
ssd1306_sendbyte(priv, SSD1306_DISPOFFS_MODE); /* Set display offset 0xd3 */
//ssd1306_sendbyte(priv, SSD1306_SCANTOCOM0); /* Com scan direction: Scan from COM[n-1] to COM[0] (Can ignore) */
ssd1306_sendbyte(priv, SSD1306_DISPOFFS_MODE); /* Set display offset 0xd3 */
ssd1306_sendbyte(priv, SSD1306_DISPOFFS(0));
ssd1306_sendbyte(priv, SSD1306_CLKDIV_SET); /* Set clock divider 0xd5*/
ssd1306_sendbyte(priv, SSD1306_CLKDIV(8,0)); /* 0x80*/
ssd1306_sendbyte(priv, SSD1306_CLKDIV_SET); /* Set clock divider 0xd5 */
ssd1306_sendbyte(priv, SSD1306_CLKDIV(8, 0)); /* 0x80 */
ssd1306_sendbyte(priv, SSD1306_CHRGPER_SET); /* Set pre-charge period 0xd9 */
ssd1306_sendbyte(priv, SSD1306_CHRGPER(0x0f,1)); /* 0xf1 or 0x22 Enhanced mode */
ssd1306_sendbyte(priv, SSD1306_CHRGPER_SET); /* Set pre-charge period 0xd9 */
ssd1306_sendbyte(priv, SSD1306_CHRGPER(0x0f, 1)); /* 0xf1 or 0x22 Enhanced mode */
ssd1306_sendbyte(priv, SSD1306_CMNPAD_CONFIG); /* Set common pads / set com pins hardware configuration 0xda */
ssd1306_sendbyte(priv, SSD1306_CMNPAD_CONFIG); /* Set common pads / set com pins hardware configuration 0xda */
ssd1306_sendbyte(priv, SSD1306_CMNPAD(SSD1306_DEV_CMNPAD)); /* 0x12 or 0x02 */
ssd1306_sendbyte(priv, SSD1306_VCOM_SET); /* set vcomh 0xdb*/
ssd1306_sendbyte(priv, SSD1306_VCOM_SET); /* set vcomh 0xdb */
ssd1306_sendbyte(priv, SSD1306_VCOM(0x40));
ssd1306_sendbyte(priv, SSD1306_CHRPUMP_SET); /* Set Charge Pump enable/disable 0x8d ssd1306 */
ssd1306_sendbyte(priv, SSD1306_CHRPUMP_ON); /* 0x14 close 0x10 */
ssd1306_sendbyte(priv, SSD1306_CHRPUMP_SET); /* Set Charge Pump enable/disable 0x8d ssd1306 */
ssd1306_sendbyte(priv, SSD1306_CHRPUMP_ON); /* 0x14 close 0x10 */
/* ssd1306_sendbyte(priv, SSD1306_DCDC_MODE); */ /* DC/DC control mode: on (SSD1306 Not supported) */
/* ssd1306_sendbyte(priv, SSD1306_DCDC_ON); */
//ssd1306_sendbyte(priv, SSD1306_DCDC_MODE); /* DC/DC control mode: on (SSD1306 Not supported) */
//ssd1306_sendbyte(priv, SSD1306_DCDC_ON);
ssd1306_sendbyte(priv, SSD1306_DISPON); /* Display ON 0xaf */
ssd1306_sendbyte(priv, SSD1306_DISPON); /* Display ON 0xaf */
/* De-select and unlock the device */
drivers/lcd/st7565.c
+5 -3
View File
@@ -990,14 +990,16 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
st7565_reset(priv, true);
/* it seems too long but written in NHD‐C12864KGZ DISPLAY
* INITIALIZATION... */
* INITIALIZATION...
*/
up_mdelay(150);
st7565_reset(priv, false);
/* it seems too long but written in NHD‐C12864KGZ DISPLAY
* INITIALIZATION... */
* INITIALIZATION...
*/
up_mdelay(150);
@@ -1009,7 +1011,7 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
st7565_cmddata(priv, true);
/* reset by command in case of st7565_reset not implemeted */
/* Reset by command in case of st7565_reset not implemeted */
(void)st7565_send_one_data(priv, ST7565_EXIT_SOFTRST);
drivers/lcd/st7567.c
+5 -5
View File
@@ -315,17 +315,17 @@ static const struct fb_videoinfo_s g_videoinfo =
.fmt = ST7567_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
.xres = ST7567_XRES, /* Horizontal resolution in pixel columns */
.yres = ST7567_YRES, /* Vertical resolution in pixel rows */
.nplanes = 1, /* Number of color planes supported */
.nplanes = 1, /* Number of color planes supported */
};
/* This is the standard, NuttX Plane information object */
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = st7567_putrun, /* Put a run into LCD memory */
.getrun = st7567_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
.bpp = ST7567_BPP, /* Bits-per-pixel */
.putrun = st7567_putrun, /* Put a run into LCD memory */
.getrun = st7567_getrun, /* Get a run from LCD memory */
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = ST7567_BPP, /* Bits-per-pixel */
};
/* This is the standard, NuttX LCD driver object */
drivers/lcd/ug-2864ambag01.c
+6 -6
View File
@@ -375,10 +375,10 @@ static const struct fb_videoinfo_s g_videoinfo =
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = ug2864ambag01_putrun, /* Put a run into LCD memory */
.getrun = ug2864ambag01_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
.bpp = UG2864AMBAG01_BPP, /* Bits-per-pixel */
.putrun = ug2864ambag01_putrun, /* Put a run into LCD memory */
.getrun = ug2864ambag01_getrun, /* Get a run from LCD memory */
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = UG2864AMBAG01_BPP, /* Bits-per-pixel */
};
/* This is the OLED driver instance (only a single device is supported for now) */
@@ -1099,7 +1099,7 @@ FAR struct lcd_dev_s *ug2864ambag01_initialize(FAR struct spi_dev_s *spi, unsign
SPI_SEND(spi, SH1101A_STARTLINE(0)); /* Set display start line */
SPI_SEND(spi, SH1101A_PAGEADDR(0)); /* Set page address */
SPI_SEND(spi, SH1101A_CONTRAST_MODE); /* Contrast control */
SPI_SEND(spi ,UG2864AMBAG01_CONTRAST); /* Default contrast */
SPI_SEND(spi, UG2864AMBAG01_CONTRAST); /* Default contrast */
SPI_SEND(spi, SH1101A_REMAPPLEFT); /* Set segment remap left */
SPI_SEND(spi, SH1101A_EDISPOFF); /* Normal display */
SPI_SEND(spi, SH1101A_NORMAL); /* Normal (un-reversed) display mode */
@@ -1109,7 +1109,7 @@ FAR struct lcd_dev_s *ug2864ambag01_initialize(FAR struct spi_dev_s *spi, unsign
SPI_SEND(spi, SH1101A_DISPOFFS_MODE); /* Set display offset */
SPI_SEND(spi, SH1101A_DISPOFFS(0));
SPI_SEND(spi, SH1101A_CLKDIV_SET); /* Set clock divider */
SPI_SEND(spi, SH1101A_CLKDIV(0,0));
SPI_SEND(spi, SH1101A_CLKDIV(0, 0));
SPI_SEND(spi, SH1101A_CMNPAD_CONFIG); /* Set common pads */
SPI_SEND(spi, SH1101A_CMNPAD(0x10));
SPI_SEND(spi, SH1101A_VCOM_SET);
drivers/lcd/ug-9664hswag01.c
+5 -5
View File
@@ -337,10 +337,10 @@ static const struct fb_videoinfo_s g_videoinfo =
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = ug_putrun, /* Put a run into LCD memory */
.getrun = ug_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
.bpp = UG_BPP, /* Bits-per-pixel */
.putrun = ug_putrun, /* Put a run into LCD memory */
.getrun = ug_getrun, /* Get a run from LCD memory */
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = UG_BPP, /* Bits-per-pixel */
};
/* This is the standard, NuttX LCD driver object */
@@ -1109,7 +1109,7 @@ FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi, unsigned int devn
(void)SPI_SEND(spi, 0x80); /* Data 1: Set 1 of 256 contrast steps */
(void)SPI_SEND(spi, SSD1305_MAPCOL131); /* Set segment re-map */
(void)SPI_SEND(spi, SSD1305_DISPNORMAL); /* Set normal display */
/*(void)SPI_SEND(spi, SSD1305_DISPINVERTED); Set inverse display */
//(void)SPI_SEND(spi, SSD1305_DISPINVERTED); /* Set inverse display */
(void)SPI_SEND(spi, SSD1305_SETMUX); /* Set multiplex ratio */
(void)SPI_SEND(spi, 0x3f); /* Data 1: MUX ratio -1: 15-63 */
(void)SPI_SEND(spi, SSD1305_SETOFFSET); /* Set display offset */
drivers/mmcsd/mmcsd_sdio.c
+33 -21
View File
@@ -498,9 +498,11 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
/* Setup up to receive data with interrupt mode */
SDIO_BLOCKSETUP(priv->dev, 8, 1);
SDIO_RECVSETUP(priv->dev, (FAR uint8_t*)scr, 8);
SDIO_RECVSETUP(priv->dev, (FAR uint8_t *)scr, 8);
(void)SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR);
(void)SDIO_WAITENABLE(priv->dev,
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT |
SDIOWAIT_ERROR);
/* Send CMD55 APP_CMD with argument as card's RCA */
@@ -525,7 +527,8 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
/* Wait for data to be transferred */
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, MMCSD_SCR_DATADELAY);
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
MMCSD_SCR_DATADELAY);
if (ret != OK)
{
fdbg("ERROR: mmcsd_eventwait for READ DATA failed: %d\n", ret);
@@ -954,7 +957,7 @@ struct mmcsd_scr_s decoded;
fvdbg("SCR:\n");
fvdbg(" SCR_STRUCTURE: %d SD_VERSION: %d\n",
decoded.scrversion,decoded.sdversion);
decoded.scrversion, decoded.sdversion);
fvdbg(" DATA_STATE_AFTER_ERASE: %d SD_SECURITY: %d SD_BUS_WIDTHS: %x\n",
decoded.erasestate, decoded.security, decoded.buswidth);
fvdbg(" Manufacturing data: %08x\n",
@@ -1151,7 +1154,7 @@ static int mmcsd_transferready(FAR struct mmcsd_state_s *priv)
*/
#if defined(CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE)
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR,
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
MMCSD_BLOCK_WDATADELAY);
if (ret != OK)
{
@@ -1353,7 +1356,8 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
/* Configure SDIO controller hardware for the read transfer */
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, 1);
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR);
SDIO_WAITENABLE(priv->dev,
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
#ifdef CONFIG_SDIO_DMA
if (priv->dma)
@@ -1388,7 +1392,8 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
/* Then wait for the data transfer to complete */
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, MMCSD_BLOCK_RDATADELAY);
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
MMCSD_BLOCK_RDATADELAY);
if (ret != OK)
{
fdbg("ERROR: CMD17 transfer failed: %d\n", ret);
@@ -1485,7 +1490,8 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
/* Configure SDIO controller hardware for the read transfer */
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, nblocks);
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR);
SDIO_WAITENABLE(priv->dev,
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
#ifdef CONFIG_SDIO_DMA
if (priv->dma)
@@ -1518,7 +1524,8 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
/* Wait for the transfer to complete */
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, nblocks * MMCSD_BLOCK_RDATADELAY);
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
nblocks * MMCSD_BLOCK_RDATADELAY);
if (ret != OK)
{
fdbg("ERROR: CMD18 transfer failed: %d\n", ret);
@@ -1698,7 +1705,8 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
/* Configure SDIO controller hardware for the write transfer */
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, 1);
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR);
SDIO_WAITENABLE(priv->dev,
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
#ifdef CONFIG_SDIO_DMA
if (priv->dma)
{
@@ -1723,7 +1731,8 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
/* Wait for the transfer to complete */
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, MMCSD_BLOCK_WDATADELAY);
ret = mmcsd_eventwait(priv,
SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR, MMCSD_BLOCK_WDATADELAY);
if (ret != OK)
{
fdbg("ERROR: CMD24 transfer failed: %d\n", ret);
@@ -1733,7 +1742,7 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
#if defined(CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE)
/* Arm the write complete detection with timeout */
SDIO_WAITENABLE(priv->dev, SDIOWAIT_WRCOMPLETE|SDIOWAIT_TIMEOUT);
SDIO_WAITENABLE(priv->dev, SDIOWAIT_WRCOMPLETE | SDIOWAIT_TIMEOUT);
#endif
/* On success, return the number of blocks written */
@@ -1859,7 +1868,8 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
/* Configure SDIO controller hardware for the write transfer */
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, nblocks);
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR);
SDIO_WAITENABLE(priv->dev,
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
#ifdef CONFIG_SDIO_DMA
if (priv->dma)
{
@@ -1896,7 +1906,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
/* Wait for the transfer to complete */
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, nblocks * MMCSD_BLOCK_WDATADELAY);
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR, nblocks * MMCSD_BLOCK_WDATADELAY);
if (ret != OK)
{
fdbg("ERROR: CMD18 transfer failed: %d\n", ret);
@@ -2749,7 +2759,8 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
* CMD8 Response: R7
*/
ret = mmcsd_sendcmdpoll(priv, SD_CMD8, MMCSD_CMD8CHECKPATTERN|MMCSD_CMD8VOLTAGE_27);
ret = mmcsd_sendcmdpoll(priv, SD_CMD8,
MMCSD_CMD8CHECKPATTERN | MMCSD_CMD8VOLTAGE_27);
if (ret == OK)
{
/* CMD8 was sent successfully... Get the R7 response */
@@ -2815,7 +2826,8 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
{
/* Send ACMD41 */
mmcsd_sendcmdpoll(priv, SD_ACMD41, MMCSD_ACMD41_VOLTAGEWINDOW_33_32|sdcapacity);
mmcsd_sendcmdpoll(priv, SD_ACMD41,
MMCSD_ACMD41_VOLTAGEWINDOW_33_32 | sdcapacity);
ret = SDIO_RECVR3(priv->dev, SD_ACMD41, &response);
if (ret != OK)
{
@@ -3009,18 +3021,18 @@ static int mmcsd_probe(FAR struct mmcsd_state_s *priv)
switch (priv->type)
{
case MMCSD_CARDTYPE_SDV1: /* Bit 1: SD version 1.x */
case MMCSD_CARDTYPE_SDV2: /* SD version 2.x with byte addressing */
case MMCSD_CARDTYPE_SDV2|MMCSD_CARDTYPE_BLOCK: /* SD version 2.x with block addressing */
case MMCSD_CARDTYPE_SDV1: /* Bit 1: SD version 1.x */
case MMCSD_CARDTYPE_SDV2: /* SD version 2.x with byte addressing */
case MMCSD_CARDTYPE_SDV2 | MMCSD_CARDTYPE_BLOCK: /* SD version 2.x with block addressing */
ret = mmcsd_sdinitialize(priv);
break;
case MMCSD_CARDTYPE_MMC: /* MMC card */
case MMCSD_CARDTYPE_MMC: /* MMC card */
#ifdef CONFIG_MMCSD_MMCSUPPORT
ret = mmcsd_mmcinitialize(priv);
break;
#endif
case MMCSD_CARDTYPE_UNKNOWN: /* Unknown card type */
case MMCSD_CARDTYPE_UNKNOWN: /* Unknown card type */
default:
fdbg("ERROR: Internal confusion: %d\n", priv->type);
ret = -EPERM;
drivers/mmcsd/mmcsd_spi.c
+9 -9
View File
@@ -274,7 +274,7 @@ static const uint32_t g_transpeedru[8] =
10000, /* 0: 10 Kbit/sec / 10 */
100000, /* 1: 1 Mbit/sec / 10 */
1000000, /* 2: 10 Mbit/sec / 10 */
10000000, /* 3: 100 Mbit/sec / 10*/
10000000, /* 3: 100 Mbit/sec / 10 */
0, 0, 0, 0 /* 4-7: Reserved values */
};
@@ -316,7 +316,7 @@ static const uint16_t g_taactu[8] =
1, /* 3: 1 us 1,000 ns */
10, /* 4: 10 us 10,000 ns */
100, /* 5: 100 us 100,000 ns */
1000, /* 6: 1 ms 1,000,000 ns*/
1000, /* 6: 1 ms 1,000,000 ns */
10000, /* 7: 10 ms 10,000,000 ns */
};
@@ -677,7 +677,7 @@ static uint32_t mmcsd_taac(FAR struct mmcsd_slot_s *slot, uint8_t *csd)
{
int tundx;
/*The TAAC consists of a 3-bit time unit (TU) and a 4-bit time value (TV).
/* The TAAC consists of a 3-bit time unit (TU) and a 4-bit time value (TV).
* TAAC is in units of time; NSAC is in units of SPI clocks.
* The access time we need is then given by:
*
@@ -1532,7 +1532,7 @@ static int mmcsd_geometry(FAR struct inode *inode, struct geometry *geometry)
/* Then return the card geometry */
geometry->geo_available =
((slot->state & (MMCSD_SLOTSTATUS_NOTREADY|MMCSD_SLOTSTATUS_NODISK)) == 0);
((slot->state & (MMCSD_SLOTSTATUS_NOTREADY | MMCSD_SLOTSTATUS_NODISK)) == 0);
geometry->geo_mediachanged =
((slot->state & MMCSD_SLOTSTATUS_MEDIACHGD) != 0);
#if defined(CONFIG_FS_WRITABLE) && !defined(CONFIG_MMCSD_READONLY)
@@ -1713,7 +1713,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
if ((slot->ocr & MMCSD_OCR_CCS) != 0)
{
fdbg("Identified SD ver2 card/with block access\n");
slot->type = MMCSD_CARDTYPE_SDV2|MMCSD_CARDTYPE_BLOCK;
slot->type = MMCSD_CARDTYPE_SDV2 | MMCSD_CARDTYPE_BLOCK;
}
else
{
@@ -1862,7 +1862,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
static void mmcsd_mediachanged(void *arg)
{
struct mmcsd_slot_s *slot = (struct mmcsd_slot_s*)arg;
FAR struct mmcsd_slot_s *slot = (FAR struct mmcsd_slot_s *)arg;
FAR struct spi_dev_s *spi;
uint8_t oldstate;
int ret;
@@ -1892,7 +1892,7 @@ static void mmcsd_mediachanged(void *arg)
/* Media is not present */
fdbg("No card present\n");
slot->state |= (MMCSD_SLOTSTATUS_NODISK|MMCSD_SLOTSTATUS_NOTREADY);
slot->state |= (MMCSD_SLOTSTATUS_NODISK | MMCSD_SLOTSTATUS_NOTREADY);
/* Was media removed? */
@@ -1906,7 +1906,7 @@ static void mmcsd_mediachanged(void *arg)
* ready, then try re-initializing it
*/
else if ((oldstate & (MMCSD_SLOTSTATUS_NODISK|MMCSD_SLOTSTATUS_NOTREADY)) != 0)
else if ((oldstate & (MMCSD_SLOTSTATUS_NODISK | MMCSD_SLOTSTATUS_NOTREADY)) != 0)
{
/* (Re-)initialize for the media in the slot */
@@ -2014,7 +2014,7 @@ int mmcsd_spislotinitialize(int minor, int slotno, FAR struct spi_dev_s *spi)
* removal of cards.
*/
(void)SPI_REGISTERCALLBACK(spi, mmcsd_mediachanged, (void*)slot);
(void)SPI_REGISTERCALLBACK(spi, mmcsd_mediachanged, (FAR void *)slot);
return OK;
}
drivers/mtd/at45db.c
+9 -3
View File
@@ -251,12 +251,18 @@ static int at45db_ioctl(FAR struct mtd_dev_s *mtd, int cmd, unsigned long arg);
/* Chip erase sequence */
#define CHIP_ERASE_SIZE 4
static const uint8_t g_chiperase[CHIP_ERASE_SIZE] = {0xc7, 0x94, 0x80, 0x9a};
static const uint8_t g_chiperase[CHIP_ERASE_SIZE] =
{
0xc7, 0x94, 0x80, 0x9a
};
/* Sequence to program the device to binary page sizes{256, 512, 1024} */
#define BINPGSIZE_SIZE 4
static const uint8_t g_binpgsize[BINPGSIZE_SIZE] = {0x3d, 0x2a, 0x80, 0xa6};
static const uint8_t g_binpgsize[BINPGSIZE_SIZE] =
{
0x3d, 0x2a, 0x80, 0xa6
};
/************************************************************************************
* Private Functions
@@ -270,7 +276,7 @@ static void at45db_lock(FAR struct at45db_dev_s *priv)
{
/* On SPI buses where there are multiple devices, it will be necessary to lock SPI
* to have exclusive access to the buses for a sequence of transfers. The bus
& should be locked before the chip is selected.
* should be locked before the chip is selected.
*
* This is a blocking call and will not return until we have exclusive access to
* the SPI bus. We will retain that exclusive access until the bus is unlocked.
drivers/mtd/flash_eraseall.c
+1 -1
View File
@@ -87,7 +87,7 @@ int flash_eraseall(FAR const char *driver)
/* Open the block driver */
ret = open_blockdriver(driver ,0, &inode);
ret = open_blockdriver(driver, 0, &inode);
if (ret < 0)
{
fdbg("ERROR: Failed to open '%s': %d\n", driver, ret);
drivers/mtd/mtd_config.c
+8 -11
View File
@@ -115,11 +115,13 @@ struct mtdconfig_header_s
static int mtdconfig_open(FAR struct file *filep);
static int mtdconfig_close(FAR struct file *filep);
static ssize_t mtdconfig_read(FAR struct file *, FAR char *, size_t);
static ssize_t mtdconfig_ioctl(FAR struct file *, int, unsigned long);
static ssize_t mtdconfig_read(FAR struct file *filep, FAR char *buffer,
size_t buflen);
static ssize_t mtdconfig_ioctl(FAR struct file *filep, int cmd,
unsigned long arg);
#ifndef CONFIG_DISABLE_POLL
static int mtdconfig_poll(FAR struct file *filep, FAR struct pollfd *fds,
bool setup);
bool setup);
#endif
/****************************************************************************
@@ -645,8 +647,6 @@ static off_t mtdconfig_ramconsolidate(FAR struct mtdconfig_struct_s *dev)
/* Now Write the item to the current dst_offset location */
//printf("REL HDR: ID=%04X,%02X Len=%4d Off=%5d Src off=%4d\n",
// phdr->id, phdr->instance, phdr->len, dst_offset, src_offset);
ret = mtdconfig_writebytes(dev, dst_offset, (uint8_t *) phdr,
sizeof(hdr));
if (ret < 0)
@@ -815,8 +815,6 @@ retry_relocate:
/* Copy this entry to the destination */
//printf("REL HDR: ID=%04X,%02X Len=%4d Off=%5d Src off=%4d\n",
// hdr.id, hdr.instance, hdr.len, dst_offset, src_offset);
mtdconfig_writebytes(dev, dst_offset, (uint8_t *) &hdr, sizeof(hdr));
src_offset += sizeof(hdr);
dst_offset += sizeof(hdr);
@@ -850,7 +848,7 @@ retry_relocate:
src_offset += sizeof(hdr) + hdr.len;
if (src_offset + sizeof(hdr) >= (src_block + 1) * dev->erasesize ||
src_offset == (src_block +1 ) * dev->erasesize)
src_offset == (src_block + 1) * dev->erasesize)
{
/* No room left at end of source block */
@@ -1181,8 +1179,7 @@ retry_find:
hdr.instance = pdata->instance;
hdr.len = pdata->len;
hdr.flags = MTD_ERASED_FLAGS;
//printf("SAV HDR: ID=%04X,%02X Len=%4d Off=%5d\n",
// hdr.id, hdr.instance, hdr.len, offset);
mtdconfig_writebytes(dev, offset, (uint8_t *)&hdr, sizeof(hdr));
bytes = mtdconfig_writebytes(dev, offset + sizeof(hdr), pdata->configdata,
pdata->len);
@@ -1311,7 +1308,7 @@ static int mtdconfig_poll(FAR struct file *filep, FAR struct pollfd *fds,
{
if (setup)
{
fds->revents |= (fds->events & (POLLIN|POLLOUT));
fds->revents |= (fds->events & (POLLIN | POLLOUT));
if (fds->revents != 0)
{
sem_post(fds->sem);
drivers/mtd/mtd_nand.c
+3 -3
View File
@@ -250,8 +250,8 @@ static int nand_checkblock(FAR struct nand_dev_s *nand, off_t block)
*
****************************************************************************/
//#ifdef CONFIG_MTD_NAND_BLOCKCHECK
#if defined(CONFIG_MTD_NAND_BLOCKCHECK) && defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
#if defined(CONFIG_MTD_NAND_BLOCKCHECK) && defined(CONFIG_DEBUG_VERBOSE) && \
defined(CONFIG_DEBUG_FS)
static int nand_devscan(FAR struct nand_dev_s *nand)
{
FAR struct nand_raw_s *raw;
@@ -329,7 +329,7 @@ static int nand_devscan(FAR struct nand_dev_s *nand)
return OK;
}
#endif /* CONFIG_MTD_NAND_BLOCKCHECK */
#endif /* CONFIG_MTD_NAND_BLOCKCHECK && CONFIG_DEBUG_VERBOSE && CONFIG_DEBUG_FS */
/****************************************************************************
* Name: nand_chipid
drivers/mtd/mtd_nandscheme.c
+5 -5
View File
@@ -327,12 +327,12 @@ void nandscheme_writeextra(FAR const struct nand_scheme_s *scheme,
FAR uint8_t *spare, FAR const void *extra,
unsigned int size, unsigned int offset)
{
DEBUGASSERT((size + offset) < scheme->nxbytes);
DEBUGASSERT((size + offset) < scheme->nxbytes);
uint32_t i;
for (i = 0; i < size; i++) {
spare[scheme->xbytepos[i+offset]] = ((uint8_t *) extra)[i];
uint32_t i;
for (i = 0; i < size; i++)
{
spare[scheme->xbytepos[i+offset]] = ((uint8_t *) extra)[i];
}
}
drivers/mtd/mtd_onfi.c
+10 -10
View File
@@ -328,39 +328,39 @@ int onfi_read(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr,
/* JEDEC manufacturer ID */
onfi->manufacturer = *(uint8_t *)(parmtab + 64);
onfi->manufacturer = *(FAR uint8_t *)(parmtab + 64);
/* Bus width */
onfi->buswidth = (*(uint8_t *)(parmtab + 6)) & 0x01;
onfi->buswidth = (*(FAR uint8_t *)(parmtab + 6)) & 0x01;
/* Get number of data bytes per page (bytes 80-83 in the param table) */
onfi->pagesize = *(uint32_t *)(void*)(parmtab + 80);
onfi->pagesize = *(FAR uint32_t *)(FAR void *)(parmtab + 80);
/* Get number of spare bytes per page (bytes 84-85 in the param table) */
onfi->sparesize = *(uint16_t *)(void*)(parmtab + 84);
onfi->sparesize = *(FAR uint16_t *)(FAR voidFAR *)(parmtab + 84);
/* Number of pages per block. */
onfi->pagesperblock = *(uint32_t *)(void*)(parmtab + 92);
onfi->pagesperblock = *(FAR uint32_t *)(FAR void *)(parmtab + 92);
/* Number of blocks per logical unit (LUN). */
onfi->blocksperlun = *(uint32_t *)(void*)(parmtab + 96);
onfi->blocksperlun = *(FAR uint32_t *)(FAR void *)(parmtab + 96);
/* Number of logical units. */
onfi->luns = *(uint8_t *)(parmtab + 100);
onfi->luns = *(FAR uint8_t *)(parmtab + 100);
/* Number of bits of ECC correction */
onfi->eccsize = *(uint8_t *)(parmtab + 112);
onfi->eccsize = *(FAR uint8_t *)(parmtab + 112);
/* Device model */
onfi->model= *(uint8_t *)(parmtab + 49);
onfi->model = *(FAR uint8_t *)(parmtab + 49);
fvdbg("Returning:\n");
fvdbg(" manufacturer: 0x%02x\n", onfi->manufacturer);
@@ -483,7 +483,7 @@ bool onfi_ebidetect(uintptr_t cmdaddr, uintptr_t addraddr,
ids[2] = READ_NAND(dataaddr);
ids[3] = READ_NAND(dataaddr);
for (i = 0; i< NAND_NMODELS ; i++)
for (i = 0; i < NAND_NMODELS ; i++)
{
if (g_nandmodels[i].devid == ids[1])
{
drivers/mtd/mtd_partition.c
+1 -1
View File
@@ -739,7 +739,7 @@ static int part_procfs_stat(const char *relpath, struct stat *buf)
{
/* File/directory size, access block size */
buf->st_mode = S_IFREG|S_IROTH|S_IRGRP|S_IRUSR;
buf->st_mode = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
buf->st_size = 0;
buf->st_blksize = 0;
buf->st_blocks = 0;

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