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arch/ceva:use UP_DSB, UP_DMB, UP_ISB as barrier standard API
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
This commit is contained in:
lipengfei28
Xiang Xiao
@@ -0,0 +1,42 @@
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/****************************************************************************
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* arch/ceva/include/barriers.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_CEVA_INCLUDE_BARRIERS_H
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#define __ARCH_CEVA_INCLUDE_BARRIERS_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#if defined(CONFIG_ARCH_XC5)
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# include <arch/xc5/barriers.h.h>
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#elif defined(CONFIG_ARCH_XM6)
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# include <arch/xm6/barriers.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define UP_DSB() up_dsb()
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#define UP_DMB() up_dmb()
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#endif /* __ARCH_CEVA_INCLUDE_BARRIERS_H */
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@@ -63,9 +63,6 @@
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*
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*/
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#define UP_DSB() up_dsb()
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#define UP_DMB() up_dmb()
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/****************************************************************************
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* Public Types
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****************************************************************************/
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@@ -0,0 +1,42 @@
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/****************************************************************************
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* arch/ceva/include/xc5/barriers.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_CEVA_INCLUDE_XC5_BARRIERS_H
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#define __ARCH_CEVA_INCLUDE_XC5_BARRIERS_H
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Memory barrier doesn't need on tl4 */
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static inline void up_dsb(void)
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{
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}
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static inline void up_dmb(void)
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{
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_CEVA_INCLUDE_XC5_BARRIERS_H */
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@@ -27,18 +27,4 @@
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Memory barrier doesn't need on tl4 */
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static inline void up_dsb(void)
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{
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}
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static inline void up_dmb(void)
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{
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_CEVA_INCLUDE_XC5_SPINLOCK_H */
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@@ -0,0 +1,68 @@
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/****************************************************************************
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* arch/ceva/include/xm6/barriers.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_CEVA_INCLUDE_XM6_BARRIERS_H
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#define __ARCH_CEVA_INCLUDE_XM6_BARRIERS_H
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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static inline void up_dsb(void)
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{
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/* MSS_BARRIER(0x638):
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* Bit [7] Internal Barrier Activation
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*/
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#define MSS_BARRIER 0x638
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uint32_t barrier = 0x80;
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__asm__ __volatile__
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(
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"out {cpm} %0.ui, (%1.ui).ui"
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: : "r"(barrier), "r"(MSS_BARRIER)
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);
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do
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{
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__asm__ __volatile__
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(
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"in {cpm} (%1.ui).ui, %0.ui\n"
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"nop #0x04\nnop #0x02"
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: "=r"(barrier)
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: "r"(MSS_BARRIER)
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);
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/* Wait unitl the barrier operation complete */
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}
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while ((barrier & 0x80) != 0);
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#undef MSS_BARRIER
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}
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static inline void up_dmb(void)
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{
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up_dsb(); /* use dsb instead since dmb doesn't exist on xm6 */
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_CEVA_INCLUDE_M65_BARRIERS_H */
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@@ -28,6 +28,7 @@
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****************************************************************************/
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#include <arch/xm6/irq.h>
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#include <arch/xm6/barriers.h>
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/****************************************************************************
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* Pre-processor Definitions
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@@ -41,42 +42,6 @@
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#ifndef __ASSEMBLY__
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static inline void up_dsb(void)
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{
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/* MSS_BARRIER(0x638):
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* Bit [7] Internal Barrier Activation
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*/
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#define MSS_BARRIER 0x638
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uint32_t barrier = 0x80;
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__asm__ __volatile__
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(
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"out {cpm} %0.ui, (%1.ui).ui"
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: : "r"(barrier), "r"(MSS_BARRIER)
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);
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do
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{
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__asm__ __volatile__
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(
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"in {cpm} (%1.ui).ui, %0.ui\n"
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"nop #0x04\nnop #0x02"
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: "=r"(barrier)
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: "r"(MSS_BARRIER)
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);
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/* Wait unitl the barrier operation complete */
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}
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while ((barrier & 0x80) != 0);
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#undef MSS_BARRIER
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}
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static inline void up_dmb(void)
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{
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up_dsb(); /* use dsb instead since dmb doesn't exist on xm6 */
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}
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/****************************************************************************
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* Name: up_testset
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*
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