diff --git a/arch/ceva/include/barriers.h b/arch/ceva/include/barriers.h new file mode 100644 index 00000000000..f1409dcb0fd --- /dev/null +++ b/arch/ceva/include/barriers.h @@ -0,0 +1,42 @@ +/**************************************************************************** + * arch/ceva/include/barriers.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_CEVA_INCLUDE_BARRIERS_H +#define __ARCH_CEVA_INCLUDE_BARRIERS_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#if defined(CONFIG_ARCH_XC5) +# include +#elif defined(CONFIG_ARCH_XM6) +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define UP_DSB() up_dsb() +#define UP_DMB() up_dmb() + +#endif /* __ARCH_CEVA_INCLUDE_BARRIERS_H */ + diff --git a/arch/ceva/include/spinlock.h b/arch/ceva/include/spinlock.h index 3be3bc7fe0d..b0d59172a4a 100644 --- a/arch/ceva/include/spinlock.h +++ b/arch/ceva/include/spinlock.h @@ -63,9 +63,6 @@ * */ -#define UP_DSB() up_dsb() -#define UP_DMB() up_dmb() - /**************************************************************************** * Public Types ****************************************************************************/ diff --git a/arch/ceva/include/xc5/barriers.h b/arch/ceva/include/xc5/barriers.h new file mode 100644 index 00000000000..cb84a220d59 --- /dev/null +++ b/arch/ceva/include/xc5/barriers.h @@ -0,0 +1,42 @@ +/**************************************************************************** + * arch/ceva/include/xc5/barriers.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_CEVA_INCLUDE_XC5_BARRIERS_H +#define __ARCH_CEVA_INCLUDE_XC5_BARRIERS_H + +/**************************************************************************** + * Inline functions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* Memory barrier doesn't need on tl4 */ + +static inline void up_dsb(void) +{ +} + +static inline void up_dmb(void) +{ +} + +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_CEVA_INCLUDE_XC5_BARRIERS_H */ diff --git a/arch/ceva/include/xc5/spinlock.h b/arch/ceva/include/xc5/spinlock.h index 3c3a1807864..c60a2882170 100644 --- a/arch/ceva/include/xc5/spinlock.h +++ b/arch/ceva/include/xc5/spinlock.h @@ -27,18 +27,4 @@ * Inline functions ****************************************************************************/ -#ifndef __ASSEMBLY__ - -/* Memory barrier doesn't need on tl4 */ - -static inline void up_dsb(void) -{ -} - -static inline void up_dmb(void) -{ -} - -#endif /* __ASSEMBLY__ */ - #endif /* __ARCH_CEVA_INCLUDE_XC5_SPINLOCK_H */ diff --git a/arch/ceva/include/xm6/barriers.h b/arch/ceva/include/xm6/barriers.h new file mode 100644 index 00000000000..f3bcb85c626 --- /dev/null +++ b/arch/ceva/include/xm6/barriers.h @@ -0,0 +1,68 @@ +/**************************************************************************** + * arch/ceva/include/xm6/barriers.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_CEVA_INCLUDE_XM6_BARRIERS_H +#define __ARCH_CEVA_INCLUDE_XM6_BARRIERS_H + +/**************************************************************************** + * Inline functions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +static inline void up_dsb(void) +{ + /* MSS_BARRIER(0x638): + * Bit [7] Internal Barrier Activation + */ +#define MSS_BARRIER 0x638 + + uint32_t barrier = 0x80; + + __asm__ __volatile__ + ( + "out {cpm} %0.ui, (%1.ui).ui" + : : "r"(barrier), "r"(MSS_BARRIER) + ); + + do + { + __asm__ __volatile__ + ( + "in {cpm} (%1.ui).ui, %0.ui\n" + "nop #0x04\nnop #0x02" + : "=r"(barrier) + : "r"(MSS_BARRIER) + ); + + /* Wait unitl the barrier operation complete */ + } + while ((barrier & 0x80) != 0); +#undef MSS_BARRIER +} + +static inline void up_dmb(void) +{ + up_dsb(); /* use dsb instead since dmb doesn't exist on xm6 */ +} + +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_CEVA_INCLUDE_M65_BARRIERS_H */ diff --git a/arch/ceva/include/xm6/spinlock.h b/arch/ceva/include/xm6/spinlock.h index 65e2331fc0f..7b3eb96decc 100644 --- a/arch/ceva/include/xm6/spinlock.h +++ b/arch/ceva/include/xm6/spinlock.h @@ -28,6 +28,7 @@ ****************************************************************************/ #include +#include /**************************************************************************** * Pre-processor Definitions @@ -41,42 +42,6 @@ #ifndef __ASSEMBLY__ -static inline void up_dsb(void) -{ - /* MSS_BARRIER(0x638): - * Bit [7] Internal Barrier Activation - */ -#define MSS_BARRIER 0x638 - - uint32_t barrier = 0x80; - - __asm__ __volatile__ - ( - "out {cpm} %0.ui, (%1.ui).ui" - : : "r"(barrier), "r"(MSS_BARRIER) - ); - - do - { - __asm__ __volatile__ - ( - "in {cpm} (%1.ui).ui, %0.ui\n" - "nop #0x04\nnop #0x02" - : "=r"(barrier) - : "r"(MSS_BARRIER) - ); - - /* Wait unitl the barrier operation complete */ - } - while ((barrier & 0x80) != 0); -#undef MSS_BARRIER -} - -static inline void up_dmb(void) -{ - up_dsb(); /* use dsb instead since dmb doesn't exist on xm6 */ -} - /**************************************************************************** * Name: up_testset *