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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs

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This commit is contained in:
Gregory Nutt
2016-03-09 13:41:48 -06:00
parent 7b0a696498
commit 4d4f54a789
184 changed files with 817 additions and 789 deletions
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arch/arm/src/a1x/a1x_irq.c
+2 -2
View File
@@ -57,7 +57,7 @@
* Public Data
****************************************************************************/
volatile uint32_t *current_regs;
volatile uint32_t *g_current_regs[1];
/****************************************************************************
* Private Functions
@@ -169,7 +169,7 @@ void up_irqinitialize(void)
/* currents_regs is non-NULL only while processing an interrupt */
current_regs = NULL;
CURRENT_REGS = NULL;
#ifndef CONFIG_SUPPRESS_INTERRUPTS
#ifdef CONFIG_A1X_PIO_IRQ
arch/arm/src/arm/up_assert.c
+4 -4
View File
@@ -145,7 +145,7 @@ static inline void up_registerdump(void)
{
/* Are user registers available from interrupt processing? */
if (current_regs)
if (CURRENT_REGS)
{
int regs;
@@ -153,13 +153,13 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&current_regs[regs];
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
lldbg("CPSR: %08x\n", current_regs[REG_CPSR]);
lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
}
}
#else
@@ -310,7 +310,7 @@ static void _up_assert(int errorcode)
{
/* Are we in an interrupt handler or the idle task? */
if (current_regs || this_task()->pid == 0)
if (CURRENT_REGS || this_task()->pid == 0)
{
(void)up_irq_save();
for (; ; )
arch/arm/src/arm/up_blocktask.c
+2 -2
View File
@@ -116,10 +116,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/arm/up_dataabort.c
+7 -7
View File
@@ -108,14 +108,14 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
#ifdef CONFIG_PAGING
uint32_t *savestate;
/* Save the saved processor context in current_regs where it can be accessed
/* Save the saved processor context in CURRENT_REGS where it can be accessed
* for register dumps and possibly context switching.
*/
savestate = (uint32_t *)current_regs;
savestate = (uint32_t *)CURRENT_REGS;
#endif
current_regs = regs;
CURRENT_REGS = regs;
#ifdef CONFIG_PAGING
/* In the NuttX on-demand paging implementation, only the read-only, .text
@@ -170,12 +170,12 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
pg_miss();
/* Restore the previous value of current_regs. NULL would indicate that
/* Restore the previous value of CURRENT_REGS. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = savestate;
CURRENT_REGS = savestate;
return;
segfault:
@@ -188,11 +188,11 @@ segfault:
void up_dataabort(uint32_t *regs)
{
/* Save the saved processor context in current_regs where it can be accessed
/* Save the saved processor context in CURRENT_REGS where it can be accessed
* for register dumps and possibly context switching.
*/
current_regs = regs;
CURRENT_REGS = regs;
/* Crash -- possibly showing diagnost debug information. */
arch/arm/src/arm/up_doirq.c
+8 -8
View File
@@ -80,13 +80,13 @@ void up_doirq(int irq, uint32_t *regs)
#else
/* Nested interrupts are not supported */
DEBUGASSERT(current_regs == NULL);
DEBUGASSERT(CURRENT_REGS == NULL);
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
* CURRENT_REGS is also used to manage interrupt level context switches.
*/
current_regs = regs;
CURRENT_REGS = regs;
/* Acknowledge the interrupt */
@@ -98,18 +98,18 @@ void up_doirq(int irq, uint32_t *regs)
#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
/* Check for a context switch. If a context switch occurred, then
* current_regs will have a different value than it did on entry. If an
* CURRENT_REGS will have a different value than it did on entry. If an
* interrupt level context switch has occurred, then restore the floating
* point state and the establish the correct address environment before
* returning from the interrupt.
*/
if (regs != current_regs)
if (regs != CURRENT_REGS)
{
#ifdef CONFIG_ARCH_FPU
/* Restore floating point registers */
up_restorefpu((uint32_t *)current_regs);
up_restorefpu((uint32_t *)CURRENT_REGS);
#endif
#ifdef CONFIG_ARCH_ADDRENV
@@ -124,11 +124,11 @@ void up_doirq(int irq, uint32_t *regs)
}
#endif
/* Set current_regs to NULL to indicate that we are no longer in an
/* Set CURRENT_REGS to NULL to indicate that we are no longer in an
* interrupt handler.
*/
current_regs = NULL;
CURRENT_REGS = NULL;
#endif
board_autoled_off(LED_INIRQ);
}
arch/arm/src/arm/up_prefetchabort.c
+5 -5
View File
@@ -92,13 +92,13 @@ void up_prefetchabort(uint32_t *regs)
#ifdef CONFIG_PAGING
uint32_t *savestate;
/* Save the saved processor context in current_regs where it can be accessed
/* Save the saved processor context in CURRENT_REGS where it can be accessed
* for register dumps and possibly context switching.
*/
savestate = (uint32_t *)current_regs;
savestate = (uint32_t *)CURRENT_REGS;
#endif
current_regs = regs;
CURRENT_REGS = regs;
#ifdef CONFIG_PAGING
/* Get the (virtual) address of instruction that caused the prefetch abort.
@@ -138,12 +138,12 @@ void up_prefetchabort(uint32_t *regs)
pg_miss();
/* Restore the previous value of current_regs. NULL would indicate that
/* Restore the previous value of CURRENT_REGS. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = savestate;
CURRENT_REGS = savestate;
}
else
#endif
arch/arm/src/arm/up_releasepending.c
+2 -2
View File
@@ -84,10 +84,10 @@ void up_release_pending(void)
/* Are we operating in interrupt context? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/arm/up_reprioritizertr.c
+2 -2
View File
@@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/arm/up_schedulesigaction.c
+7 -7
View File
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs);
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
@@ -116,7 +116,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* a task is signalling itself for some reason.
*/
if (!current_regs)
if (!CURRENT_REGS)
{
/* In this case just deliver the signal now. */
@@ -132,7 +132,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* logic would fail in the strange case where we are in an
* interrupt handler, the thread is signalling itself, but
* a context switch to another task has occurred so that
* current_regs does not refer to the thread of this_task()!
* CURRENT_REGS does not refer to the thread of this_task()!
*/
else
@@ -143,15 +143,15 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = current_regs[REG_PC];
tcb->xcp.saved_cpsr = current_regs[REG_CPSR];
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR];
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
current_regs[REG_PC] = (uint32_t)up_sigdeliver;
current_regs[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver;
CURRENT_REGS[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
/* And make sure that the saved context in the TCB
* is the same as the interrupt return context.
arch/arm/src/arm/up_syscall.c
+1 -1
View File
@@ -94,6 +94,6 @@
void up_syscall(uint32_t *regs)
{
lldbg("Syscall from 0x%x\n", regs[REG_PC]);
current_regs = regs;
CURRENT_REGS = regs;
PANIC();
}
arch/arm/src/arm/up_unblocktask.c
+2 -2
View File
@@ -98,10 +98,10 @@ void up_unblock_task(struct tcb_s *tcb)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/arm/up_undefinedinsn.c
+1 -1
View File
@@ -81,6 +81,6 @@
void up_undefinedinsn(uint32_t *regs)
{
lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
current_regs = regs;
CURRENT_REGS = regs;
PANIC();
}
arch/arm/src/armv6-m/up_assert.c
+15 -15
View File
@@ -180,27 +180,27 @@ static inline void up_registerdump(void)
{
/* Are user registers available from interrupt processing? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes.. dump the interrupt registers */
lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R0], current_regs[REG_R1],
current_regs[REG_R2], current_regs[REG_R3],
current_regs[REG_R4], current_regs[REG_R5],
current_regs[REG_R6], current_regs[REG_R7]);
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R8], current_regs[REG_R9],
current_regs[REG_R10], current_regs[REG_R11],
current_regs[REG_R12], current_regs[REG_R13],
current_regs[REG_R14], current_regs[REG_R15]);
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
lldbg("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK],
current_regs[REG_EXC_RETURN]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
#else
lldbg("xPSR: %08x PRIMASK: %08x\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
}
}
@@ -294,9 +294,9 @@ static void up_dumpstate(void)
* pointer (and the above range check should have failed).
*/
if (current_regs)
if (CURRENT_REGS)
{
sp = current_regs[REG_R13];
sp = CURRENT_REGS[REG_R13];
lldbg("sp: %08x\n", sp);
}
@@ -365,7 +365,7 @@ static void _up_assert(int errorcode)
{
/* Are we in an interrupt handler or the idle task? */
if (current_regs || this_task()->pid == 0)
if (CURRENT_REGS || this_task()->pid == 0)
{
(void)up_irq_save();
for (; ; )
arch/arm/src/armv6-m/up_blocktask.c
+2 -2
View File
@@ -114,10 +114,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv6-m/up_doirq.c
+8 -8
View File
@@ -80,18 +80,18 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
/* Nested interrupts are not supported in this implementation. If you want
* to implement nested interrupts, you would have to (1) change the way that
* current_regs is handled and (2) the design associated with
* CURRENT_REGS is handled and (2) the design associated with
* CONFIG_ARCH_INTERRUPTSTACK. The savestate variable will not work for
* that purpose as implemented here because only the outermost nested
* interrupt can result in a context switch (it can probably be deleted).
*/
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
* CURRENT_REGS is also used to manage interrupt level context switches.
*/
savestate = (uint32_t *)current_regs;
current_regs = regs;
savestate = (uint32_t *)CURRENT_REGS;
CURRENT_REGS = regs;
/* Acknowledge the interrupt */
@@ -102,19 +102,19 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
irq_dispatch(irq, regs);
/* If a context switch occurred while processing the interrupt then
* current_regs may have change value. If we return any value different
* CURRENT_REGS may have change value. If we return any value different
* from the input regs, then the lower level will know that a context
* switch occurred during interrupt processing.
*/
regs = (uint32_t *)current_regs;
regs = (uint32_t *)CURRENT_REGS;
/* Restore the previous value of current_regs. NULL would indicate that
/* Restore the previous value of CURRENT_REGS. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = savestate;
CURRENT_REGS = savestate;
#endif
board_autoled_off(LED_INIRQ);
return regs;
arch/arm/src/armv6-m/up_hardfault.c
+1 -1
View File
@@ -145,7 +145,7 @@ int up_hardfault(int irq, FAR void *context)
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
(void)up_irq_save();
arch/arm/src/armv6-m/up_releasepending.c
+2 -2
View File
@@ -83,10 +83,10 @@ void up_release_pending(void)
/* Are we operating in interrupt context? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently. Just copy the
* current_regs into the OLD rtcb.
* CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv6-m/up_reprioritizertr.c
+2 -2
View File
@@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv6-m/up_schedulesigaction.c
+10 -10
View File
@@ -121,7 +121,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs);
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
@@ -129,7 +129,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* signalling itself for some reason.
*/
if (!current_regs)
if (!CURRENT_REGS)
{
/* In this case just deliver the signal now. */
@@ -150,22 +150,22 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = current_regs[REG_PC];
tcb->xcp.saved_primask = current_regs[REG_PRIMASK];
tcb->xcp.saved_xpsr = current_regs[REG_XPSR];
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
tcb->xcp.saved_primask = CURRENT_REGS[REG_PRIMASK];
tcb->xcp.saved_xpsr = CURRENT_REGS[REG_XPSR];
#ifdef CONFIG_BUILD_PROTECTED
tcb->xcp.saved_lr = current_regs[REG_LR];
tcb->xcp.saved_lr = CURRENT_REGS[REG_LR];
#endif
/* Then set up to vector to the trampoline with interrupts
* disabled. The kernel-space trampoline must run in
* privileged thread mode.
*/
current_regs[REG_PC] = (uint32_t)up_sigdeliver;
current_regs[REG_PRIMASK] = 1;
current_regs[REG_XPSR] = ARMV6M_XPSR_T;
CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver;
CURRENT_REGS[REG_PRIMASK] = 1;
CURRENT_REGS[REG_XPSR] = ARMV6M_XPSR_T;
#ifdef CONFIG_BUILD_PROTECTED
current_regs[REG_LR] = EXC_RETURN_PRIVTHR;
CURRENT_REGS[REG_LR] = EXC_RETURN_PRIVTHR;
#endif
/* And make sure that the saved context in the TCB is the same
* as the interrupt return context.
arch/arm/src/armv6-m/up_svcall.c
+19 -19
View File
@@ -162,7 +162,7 @@ int up_svcall(int irq, FAR void *context)
uint32_t *regs = (uint32_t *)context;
uint32_t cmd;
DEBUGASSERT(regs && regs == current_regs);
DEBUGASSERT(regs && regs == CURRENT_REGS);
cmd = regs[REG_R0];
/* The SVCall software interrupt is called with R0 = system call command
@@ -224,16 +224,16 @@ int up_svcall(int irq, FAR void *context)
* R0 = SYS_restore_context
* R1 = restoreregs
*
* In this case, we simply need to set current_regs to restore register
* area referenced in the saved R1. context == current_regs is the normal
* exception return. By setting current_regs = context[R1], we force
* In this case, we simply need to set CURRENT_REGS to restore register
* area referenced in the saved R1. context == CURRENT_REGS is the normal
* exception return. By setting CURRENT_REGS = context[R1], we force
* the return to the saved context referenced in R1.
*/
case SYS_restore_context:
{
DEBUGASSERT(regs[REG_R1] != 0);
current_regs = (uint32_t *)regs[REG_R1];
CURRENT_REGS = (uint32_t *)regs[REG_R1];
}
break;
@@ -249,7 +249,7 @@ int up_svcall(int irq, FAR void *context)
*
* In this case, we do both: We save the context registers to the save
* register area reference by the saved contents of R1 and then set
* current_regs to to the save register area referenced by the saved
* CURRENT_REGS to to the save register area referenced by the saved
* contents of R2.
*/
@@ -257,7 +257,7 @@ int up_svcall(int irq, FAR void *context)
{
DEBUGASSERT(regs[REG_R1] != 0 && regs[REG_R2] != 0);
memcpy((uint32_t *)regs[REG_R1], regs, XCPTCONTEXT_SIZE);
current_regs = (uint32_t *)regs[REG_R2];
CURRENT_REGS = (uint32_t *)regs[REG_R2];
}
break;
@@ -483,27 +483,27 @@ int up_svcall(int irq, FAR void *context)
# ifndef CONFIG_DEBUG_SVCALL
if (cmd > SYS_switch_context)
# else
if (regs != current_regs)
if (regs != CURRENT_REGS)
# endif
{
svcdbg("SVCall Return:\n");
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R0], current_regs[REG_R1],
current_regs[REG_R2], current_regs[REG_R3],
current_regs[REG_R4], current_regs[REG_R5],
current_regs[REG_R6], current_regs[REG_R7]);
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R8], current_regs[REG_R9],
current_regs[REG_R10], current_regs[REG_R11],
current_regs[REG_R12], current_regs[REG_R13],
current_regs[REG_R14], current_regs[REG_R15]);
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
svcdbg(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK],
current_regs[REG_EXC_RETURN]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
#else
svcdbg(" PSR: %08x PRIMASK: %08x\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
arch/arm/src/armv6-m/up_unblocktask.c
+2 -2
View File
@@ -96,10 +96,10 @@ void up_unblock_task(struct tcb_s *tcb)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-a/arm_assert.c
+4 -4
View File
@@ -175,7 +175,7 @@ static inline void up_registerdump(void)
{
/* Are user registers available from interrupt processing? */
if (current_regs)
if (CURRENT_REGS)
{
int regs;
@@ -183,13 +183,13 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&current_regs[regs];
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
lldbg("CPSR: %08x\n", current_regs[REG_CPSR]);
lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
}
}
#else
@@ -361,7 +361,7 @@ static void _up_assert(int errorcode)
{
/* Are we in an interrupt handler or the idle task? */
if (current_regs || this_task()->pid == 0)
if (CURRENT_REGS || this_task()->pid == 0)
{
(void)up_irq_save();
for (; ; )
arch/arm/src/armv7-a/arm_blocktask.c
+2 -2
View File
@@ -116,10 +116,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-a/arm_dataabort.c
+7 -7
View File
@@ -95,12 +95,12 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
struct tcb_s *tcb = this_task();
uint32_t *savestate;
/* Save the saved processor context in current_regs where it can be accessed
/* Save the saved processor context in CURRENT_REGS where it can be accessed
* for register dumps and possibly context switching.
*/
savestate = (uint32_t *)current_regs;
current_regs = regs;
savestate = (uint32_t *)CURRENT_REGS;
CURRENT_REGS = regs;
/* In the NuttX on-demand paging implementation, only the read-only, .text
* section is paged. However, the ARM compiler generated PC-relative data
@@ -154,12 +154,12 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
pg_miss();
/* Restore the previous value of current_regs. NULL would indicate that
/* Restore the previous value of CURRENT_REGS. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = savestate;
CURRENT_REGS = savestate;
return regs;
segfault:
@@ -173,11 +173,11 @@ segfault:
uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
{
/* Save the saved processor context in current_regs where it can be accessed
/* Save the saved processor context in CURRENT_REGS where it can be accessed
* for register dumps and possibly context switching.
*/
current_regs = regs;
CURRENT_REGS = regs;
/* Crash -- possibly showing diagnostic debug information. */
arch/arm/src/armv7-a/arm_doirq.c
+9 -9
View File
@@ -80,13 +80,13 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
#else
/* Nested interrupts are not supported */
DEBUGASSERT(current_regs == NULL);
DEBUGASSERT(CURRENT_REGS == NULL);
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
* CURRENT_REGS is also used to manage interrupt level context switches.
*/
current_regs = regs;
CURRENT_REGS = regs;
/* Deliver the IRQ */
@@ -94,18 +94,18 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
/* Check for a context switch. If a context switch occurred, then
* current_regs will have a different value than it did on entry. If an
* CURRENT_REGS will have a different value than it did on entry. If an
* interrupt level context switch has occurred, then restore the floating
* point state and the establish the correct address environment before
* returning from the interrupt.
*/
if (regs != current_regs)
if (regs != CURRENT_REGS)
{
#ifdef CONFIG_ARCH_FPU
/* Restore floating point registers */
up_restorefpu((uint32_t *)current_regs);
up_restorefpu((uint32_t *)CURRENT_REGS);
#endif
#ifdef CONFIG_ARCH_ADDRENV
@@ -120,12 +120,12 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
}
#endif
/* Set current_regs to NULL to indicate that we are no longer in an
/* Set CURRENT_REGS to NULL to indicate that we are no longer in an
* interrupt handler.
*/
regs = (uint32_t *)current_regs;
current_regs = NULL;
regs = (uint32_t *)CURRENT_REGS;
CURRENT_REGS = NULL;
#endif
board_autoled_off(LED_INIRQ);
arch/arm/src/armv7-a/arm_prefetchabort.c
+7 -7
View File
@@ -93,12 +93,12 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
{
uint32_t *savestate;
/* Save the saved processor context in current_regs where it can be accessed
/* Save the saved processor context in CURRENT_REGS where it can be accessed
* for register dumps and possibly context switching.
*/
savestate = (uint32_t *)current_regs;
current_regs = regs;
savestate = (uint32_t *)CURRENT_REGS;
CURRENT_REGS = regs;
/* Get the (virtual) address of instruction that caused the prefetch abort.
* When the exception occurred, this address was provided in the lr register
@@ -137,12 +137,12 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
pg_miss();
/* Restore the previous value of current_regs. NULL would indicate that
/* Restore the previous value of CURRENT_REGS. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = savestate;
CURRENT_REGS = savestate;
}
else
{
@@ -158,11 +158,11 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
{
/* Save the saved processor context in current_regs where it can be accessed
/* Save the saved processor context in CURRENT_REGS where it can be accessed
* for register dumps and possibly context switching.
*/
current_regs = regs;
CURRENT_REGS = regs;
/* Crash -- possibly showing diagnostic debug information. */
arch/arm/src/armv7-a/arm_releasepending.c
+2 -2
View File
@@ -84,10 +84,10 @@ void up_release_pending(void)
/* Are we operating in interrupt context? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-a/arm_reprioritizertr.c
+2 -2
View File
@@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-a/arm_schedulesigaction.c
+7 -7
View File
@@ -120,7 +120,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs);
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
@@ -128,7 +128,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* signalling itself for some reason.
*/
if (!current_regs)
if (!CURRENT_REGS)
{
/* In this case just deliver the signal now. */
@@ -143,7 +143,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* Hmmm... there looks like a latent bug here: The following logic
* would fail in the strange case where we are in an interrupt
* handler, the thread is signalling itself, but a context switch
* to another task has occurred so that current_regs does not
* to another task has occurred so that CURRENT_REGS does not
* refer to the thread of this_task()!
*/
@@ -155,15 +155,15 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = current_regs[REG_PC];
tcb->xcp.saved_cpsr = current_regs[REG_CPSR];
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR];
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
current_regs[REG_PC] = (uint32_t)up_sigdeliver;
current_regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver;
CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
/* And make sure that the saved context in the TCB is the same
* as the interrupt return context.
arch/arm/src/armv7-a/arm_syscall.c
+1 -1
View File
@@ -527,7 +527,7 @@ uint32_t *arm_syscall(uint32_t *regs)
uint32_t *arm_syscall(uint32_t *regs)
{
lldbg("SYSCALL from 0x%x\n", regs[REG_PC]);
current_regs = regs;
CURRENT_REGS = regs;
PANIC();
}
arch/arm/src/armv7-a/arm_unblocktask.c
+2 -2
View File
@@ -110,10 +110,10 @@ void up_unblock_task(struct tcb_s *tcb)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-a/arm_undefinedinsn.c
+1 -1
View File
@@ -81,7 +81,7 @@
uint32_t *arm_undefinedinsn(uint32_t *regs)
{
lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
current_regs = regs;
CURRENT_REGS = regs;
PANIC();
return regs; /* To keep the compiler happy */
}
arch/arm/src/armv7-m/up_assert.c
+15 -15
View File
@@ -179,33 +179,33 @@ static inline void up_registerdump(void)
{
/* Are user registers available from interrupt processing? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes.. dump the interrupt registers */
lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R0], current_regs[REG_R1],
current_regs[REG_R2], current_regs[REG_R3],
current_regs[REG_R4], current_regs[REG_R5],
current_regs[REG_R6], current_regs[REG_R7]);
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R8], current_regs[REG_R9],
current_regs[REG_R10], current_regs[REG_R11],
current_regs[REG_R12], current_regs[REG_R13],
current_regs[REG_R14], current_regs[REG_R15]);
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
lldbg("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n",
current_regs[REG_XPSR], current_regs[REG_BASEPRI],
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
getcontrol());
#else
lldbg("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK],
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
getcontrol());
#endif
#ifdef REG_EXC_RETURN
lldbg("EXC_RETURN: %08x\n", current_regs[REG_EXC_RETURN]);
lldbg("EXC_RETURN: %08x\n", CURRENT_REGS[REG_EXC_RETURN]);
#endif
}
}
@@ -299,9 +299,9 @@ static void up_dumpstate(void)
* pointer (and the above range check should have failed).
*/
if (current_regs)
if (CURRENT_REGS)
{
sp = current_regs[REG_R13];
sp = CURRENT_REGS[REG_R13];
lldbg("sp: %08x\n", sp);
}
@@ -374,7 +374,7 @@ static void _up_assert(int errorcode)
{
/* Are we in an interrupt handler or the idle task? */
if (current_regs || (this_task())->pid == 0)
if (CURRENT_REGS || (this_task())->pid == 0)
{
(void)up_irq_save();
for (; ; )
arch/arm/src/armv7-m/up_blocktask.c
+2 -2
View File
@@ -115,10 +115,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-m/up_doirq.c
+8 -8
View File
@@ -80,18 +80,18 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
/* Nested interrupts are not supported in this implementation. If you want
* to implement nested interrupts, you would have to (1) change the way that
* current_regs is handled and (2) the design associated with
* CURRENT_REGS is handled and (2) the design associated with
* CONFIG_ARCH_INTERRUPTSTACK. The savestate variable will not work for
* that purpose as implemented here because only the outermost nested
* interrupt can result in a context switch (it can probably be deleted).
*/
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
* CURRENT_REGS is also used to manage interrupt level context switches.
*/
savestate = (uint32_t *)current_regs;
current_regs = regs;
savestate = (uint32_t *)CURRENT_REGS;
CURRENT_REGS = regs;
/* Acknowledge the interrupt */
@@ -102,19 +102,19 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
irq_dispatch(irq, regs);
/* If a context switch occurred while processing the interrupt then
* current_regs may have change value. If we return any value different
* CURRENT_REGS may have change value. If we return any value different
* from the input regs, then the lower level will know that a context
* switch occurred during interrupt processing.
*/
regs = (uint32_t *)current_regs;
regs = (uint32_t *)CURRENT_REGS;
/* Restore the previous value of current_regs. NULL would indicate that
/* Restore the previous value of CURRENT_REGS. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = savestate;
CURRENT_REGS = savestate;
#endif
board_autoled_off(LED_INIRQ);
return regs;
arch/arm/src/armv7-m/up_hardfault.c
+6 -6
View File
@@ -161,20 +161,20 @@ int up_hardfault(int irq, FAR void *context)
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
hfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_BASEPRI],
current_regs[REG_EXC_RETURN]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
hfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_BASEPRI]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
hfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK],
current_regs[REG_EXC_RETURN]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif
arch/arm/src/armv7-m/up_memfault.c
+6 -6
View File
@@ -108,20 +108,20 @@ int up_memfault(int irq, FAR void *context)
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
mfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_BASEPRI],
current_regs[REG_EXC_RETURN]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_BASEPRI]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
mfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK],
current_regs[REG_EXC_RETURN]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
current_regs[REG_XPSR], current_regs[REG_PRIMASK]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif
arch/arm/src/armv7-m/up_releasepending.c
+2 -2
View File
@@ -83,10 +83,10 @@ void up_release_pending(void)
/* Are we operating in interrupt context? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently. Just copy the
* current_regs into the OLD rtcb.
* CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-m/up_reprioritizertr.c
+2 -2
View File
@@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-m/up_schedulesigaction.c
+12 -12
View File
@@ -110,7 +110,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs);
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
@@ -118,7 +118,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* signalling itself for some reason.
*/
if (!current_regs)
if (!CURRENT_REGS)
{
/* In this case just deliver the signal now. */
@@ -140,30 +140,30 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = current_regs[REG_PC];
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
#ifdef CONFIG_ARMV7M_USEBASEPRI
tcb->xcp.saved_basepri = current_regs[REG_BASEPRI];
tcb->xcp.saved_basepri = CURRENT_REGS[REG_BASEPRI];
#else
tcb->xcp.saved_primask = current_regs[REG_PRIMASK];
tcb->xcp.saved_primask = CURRENT_REGS[REG_PRIMASK];
#endif
tcb->xcp.saved_xpsr = current_regs[REG_XPSR];
tcb->xcp.saved_xpsr = CURRENT_REGS[REG_XPSR];
#ifdef CONFIG_BUILD_PROTECTED
tcb->xcp.saved_lr = current_regs[REG_LR];
tcb->xcp.saved_lr = CURRENT_REGS[REG_LR];
#endif
/* Then set up to vector to the trampoline with interrupts
* disabled. The kernel-space trampoline must run in
* privileged thread mode.
*/
current_regs[REG_PC] = (uint32_t)up_sigdeliver;
CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver;
#ifdef CONFIG_ARMV7M_USEBASEPRI
current_regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY;
CURRENT_REGS[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY;
#else
current_regs[REG_PRIMASK] = 1;
CURRENT_REGS[REG_PRIMASK] = 1;
#endif
current_regs[REG_XPSR] = ARMV7M_XPSR_T;
CURRENT_REGS[REG_XPSR] = ARMV7M_XPSR_T;
#ifdef CONFIG_BUILD_PROTECTED
current_regs[REG_LR] = EXC_RETURN_PRIVTHR;
CURRENT_REGS[REG_LR] = EXC_RETURN_PRIVTHR;
#endif
/* And make sure that the saved context in the TCB is the same
* as the interrupt return context.
arch/arm/src/armv7-m/up_svcall.c
+18 -18
View File
@@ -157,7 +157,7 @@ int up_svcall(int irq, FAR void *context)
uint32_t *regs = (uint32_t *)context;
uint32_t cmd;
DEBUGASSERT(regs && regs == current_regs);
DEBUGASSERT(regs && regs == CURRENT_REGS);
cmd = regs[REG_R0];
/* The SVCall software interrupt is called with R0 = system call command
@@ -222,16 +222,16 @@ int up_svcall(int irq, FAR void *context)
* R0 = SYS_restore_context
* R1 = restoreregs
*
* In this case, we simply need to set current_regs to restore register
* area referenced in the saved R1. context == current_regs is the normal
* exception return. By setting current_regs = context[R1], we force
* In this case, we simply need to set CURRENT_REGS to restore register
* area referenced in the saved R1. context == CURRENT_REGS is the normal
* exception return. By setting CURRENT_REGS = context[R1], we force
* the return to the saved context referenced in R1.
*/
case SYS_restore_context:
{
DEBUGASSERT(regs[REG_R1] != 0);
current_regs = (uint32_t *)regs[REG_R1];
CURRENT_REGS = (uint32_t *)regs[REG_R1];
}
break;
@@ -247,7 +247,7 @@ int up_svcall(int irq, FAR void *context)
*
* In this case, we do both: We save the context registers to the save
* register area reference by the saved contents of R1 and then set
* current_regs to to the save register area referenced by the saved
* CURRENT_REGS to to the save register area referenced by the saved
* contents of R2.
*/
@@ -259,7 +259,7 @@ int up_svcall(int irq, FAR void *context)
(!defined(CONFIG_ARMV7M_CMNVECTOR) || defined(CONFIG_ARMV7M_LAZYFPU))
up_savefpu((uint32_t *)regs[REG_R1]);
#endif
current_regs = (uint32_t *)regs[REG_R2];
CURRENT_REGS = (uint32_t *)regs[REG_R2];
}
break;
@@ -485,25 +485,25 @@ int up_svcall(int irq, FAR void *context)
# ifndef CONFIG_DEBUG_SVCALL
if (cmd > SYS_switch_context)
# else
if (regs != current_regs)
if (regs != CURRENT_REGS)
# endif
{
svcdbg("SVCall Return:\n");
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R0], current_regs[REG_R1],
current_regs[REG_R2], current_regs[REG_R3],
current_regs[REG_R4], current_regs[REG_R5],
current_regs[REG_R6], current_regs[REG_R7]);
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R8], current_regs[REG_R9],
current_regs[REG_R10], current_regs[REG_R11],
current_regs[REG_R12], current_regs[REG_R13],
current_regs[REG_R14], current_regs[REG_R15]);
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
# ifdef REG_EXC_RETURN
svcdbg(" PSR: %08x EXC_RETURN: %08x\n",
current_regs[REG_XPSR], current_regs[REG_EXC_RETURN]);
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_EXC_RETURN]);
# else
svcdbg(" PSR: %08x\n", current_regs[REG_XPSR]);
svcdbg(" PSR: %08x\n", CURRENT_REGS[REG_XPSR]);
# endif
}
# ifdef CONFIG_DEBUG_SVCALL
arch/arm/src/armv7-m/up_unblocktask.c
+2 -2
View File
@@ -97,10 +97,10 @@ void up_unblock_task(struct tcb_s *tcb)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-r/arm_assert.c
+4 -4
View File
@@ -175,7 +175,7 @@ static inline void up_registerdump(void)
{
/* Are user registers available from interrupt processing? */
if (current_regs)
if (CURRENT_REGS)
{
int regs;
@@ -183,13 +183,13 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&current_regs[regs];
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
lldbg("CPSR: %08x\n", current_regs[REG_CPSR]);
lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
}
}
#else
@@ -361,7 +361,7 @@ static void _up_assert(int errorcode)
{
/* Are we in an interrupt handler or the idle task? */
if (current_regs || (this_task())->pid == 0)
if (CURRENT_REGS || (this_task())->pid == 0)
{
(void)up_irq_save();
for (; ; )
arch/arm/src/armv7-r/arm_blocktask.c
+2 -2
View File
@@ -116,10 +116,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-r/arm_dataabort.c
+2 -2
View File
@@ -78,11 +78,11 @@
uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
{
/* Save the saved processor context in current_regs where it can be accessed
/* Save the saved processor context in CURRENT_REGS where it can be accessed
* for register dumps and possibly context switching.
*/
current_regs = regs;
CURRENT_REGS = regs;
/* Crash -- possibly showing diagnostic debug information. */
arch/arm/src/armv7-r/arm_doirq.c
+9 -9
View File
@@ -81,13 +81,13 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
#else
/* Nested interrupts are not supported */
DEBUGASSERT(current_regs == NULL);
DEBUGASSERT(CURRENT_REGS == NULL);
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
* CURRENT_REGS is also used to manage interrupt level context switches.
*/
current_regs = regs;
CURRENT_REGS = regs;
/* Deliver the IRQ */
@@ -95,26 +95,26 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
#ifdef CONFIG_ARCH_FPU
/* Check for a context switch. If a context switch occurred, then
* current_regs will have a different value than it did on entry. If an
* CURRENT_REGS will have a different value than it did on entry. If an
* interrupt level context switch has occurred, then restore the floating
* point state and the establish the correct address environment before
* returning from the interrupt.
*/
if (regs != current_regs)
if (regs != CURRENT_REGS)
{
/* Restore floating point registers */
up_restorefpu((uint32_t *)current_regs);
up_restorefpu((uint32_t *)CURRENT_REGS);
}
#endif
/* Set current_regs to NULL to indicate that we are no longer in an
/* Set CURRENT_REGS to NULL to indicate that we are no longer in an
* interrupt handler.
*/
regs = (uint32_t *)current_regs;
current_regs = NULL;
regs = (uint32_t *)CURRENT_REGS;
CURRENT_REGS = NULL;
board_autoled_off(LED_INIRQ);
#endif
arch/arm/src/armv7-r/arm_prefetchabort.c
+2 -2
View File
@@ -74,11 +74,11 @@
uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
{
/* Save the saved processor context in current_regs where it can be accessed
/* Save the saved processor context in CURRENT_REGS where it can be accessed
* for register dumps and possibly context switching.
*/
current_regs = regs;
CURRENT_REGS = regs;
/* Crash -- possibly showing diagnostic debug information. */
arch/arm/src/armv7-r/arm_releasepending.c
+2 -2
View File
@@ -84,10 +84,10 @@ void up_release_pending(void)
/* Are we operating in interrupt context? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-r/arm_reprioritizertr.c
+2 -2
View File
@@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
/* Are we in an interrupt handler? */
if (current_regs)
if (CURRENT_REGS)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
arch/arm/src/armv7-r/arm_schedulesigaction.c
+7 -7
View File
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs);
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
@@ -116,7 +116,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* signalling itself for some reason.
*/
if (!current_regs)
if (!CURRENT_REGS)
{
/* In this case just deliver the signal now. */
@@ -131,7 +131,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* Hmmm... there looks like a latent bug here: The following logic
* would fail in the strange case where we are in an interrupt
* handler, the thread is signalling itself, but a context switch
* to another task has occurred so that current_regs does not
* to another task has occurred so that CURRENT_REGS does not
* refer to the thread of this_task()!
*/
@@ -143,15 +143,15 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = current_regs[REG_PC];
tcb->xcp.saved_cpsr = current_regs[REG_CPSR];
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR];
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
current_regs[REG_PC] = (uint32_t)up_sigdeliver;
current_regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver;
CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
/* And make sure that the saved context in the TCB is the same
* as the interrupt return context.

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