diff --git a/arch/arm/src/a1x/a1x_irq.c b/arch/arm/src/a1x/a1x_irq.c index 46535946b79..adb4ebc16e4 100644 --- a/arch/arm/src/a1x/a1x_irq.c +++ b/arch/arm/src/a1x/a1x_irq.c @@ -57,7 +57,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Functions @@ -169,7 +169,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; #ifndef CONFIG_SUPPRESS_INTERRUPTS #ifdef CONFIG_A1X_PIO_IRQ diff --git a/arch/arm/src/arm/up_assert.c b/arch/arm/src/arm/up_assert.c index 5c6ceea7a08..336a76c8613 100644 --- a/arch/arm/src/arm/up_assert.c +++ b/arch/arm/src/arm/up_assert.c @@ -145,7 +145,7 @@ static inline void up_registerdump(void) { /* Are user registers available from interrupt processing? */ - if (current_regs) + if (CURRENT_REGS) { int regs; @@ -153,13 +153,13 @@ static inline void up_registerdump(void) for (regs = REG_R0; regs <= REG_R15; regs += 8) { - uint32_t *ptr = (uint32_t *)¤t_regs[regs]; + uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs]; lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", regs, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7]); } - lldbg("CPSR: %08x\n", current_regs[REG_CPSR]); + lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]); } } #else @@ -310,7 +310,7 @@ static void _up_assert(int errorcode) { /* Are we in an interrupt handler or the idle task? */ - if (current_regs || this_task()->pid == 0) + if (CURRENT_REGS || this_task()->pid == 0) { (void)up_irq_save(); for (; ; ) diff --git a/arch/arm/src/arm/up_blocktask.c b/arch/arm/src/arm/up_blocktask.c index 3a4fd6b93db..71696671456 100644 --- a/arch/arm/src/arm/up_blocktask.c +++ b/arch/arm/src/arm/up_blocktask.c @@ -116,10 +116,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/arm/up_dataabort.c b/arch/arm/src/arm/up_dataabort.c index 866a431a164..2ab00b15c94 100644 --- a/arch/arm/src/arm/up_dataabort.c +++ b/arch/arm/src/arm/up_dataabort.c @@ -108,14 +108,14 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr) #ifdef CONFIG_PAGING uint32_t *savestate; - /* Save the saved processor context in current_regs where it can be accessed + /* Save the saved processor context in CURRENT_REGS where it can be accessed * for register dumps and possibly context switching. */ - savestate = (uint32_t *)current_regs; + savestate = (uint32_t *)CURRENT_REGS; #endif - current_regs = regs; + CURRENT_REGS = regs; #ifdef CONFIG_PAGING /* In the NuttX on-demand paging implementation, only the read-only, .text @@ -170,12 +170,12 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr) pg_miss(); - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of CURRENT_REGS. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - current_regs = savestate; + CURRENT_REGS = savestate; return; segfault: @@ -188,11 +188,11 @@ segfault: void up_dataabort(uint32_t *regs) { - /* Save the saved processor context in current_regs where it can be accessed + /* Save the saved processor context in CURRENT_REGS where it can be accessed * for register dumps and possibly context switching. */ - current_regs = regs; + CURRENT_REGS = regs; /* Crash -- possibly showing diagnost debug information. */ diff --git a/arch/arm/src/arm/up_doirq.c b/arch/arm/src/arm/up_doirq.c index 52603f435d5..d13b04c19f2 100644 --- a/arch/arm/src/arm/up_doirq.c +++ b/arch/arm/src/arm/up_doirq.c @@ -80,13 +80,13 @@ void up_doirq(int irq, uint32_t *regs) #else /* Nested interrupts are not supported */ - DEBUGASSERT(current_regs == NULL); + DEBUGASSERT(CURRENT_REGS == NULL); /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. */ - current_regs = regs; + CURRENT_REGS = regs; /* Acknowledge the interrupt */ @@ -98,18 +98,18 @@ void up_doirq(int irq, uint32_t *regs) #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. If an + * CURRENT_REGS will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ - if (regs != current_regs) + if (regs != CURRENT_REGS) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t *)current_regs); + up_restorefpu((uint32_t *)CURRENT_REGS); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -124,11 +124,11 @@ void up_doirq(int irq, uint32_t *regs) } #endif - /* Set current_regs to NULL to indicate that we are no longer in an + /* Set CURRENT_REGS to NULL to indicate that we are no longer in an * interrupt handler. */ - current_regs = NULL; + CURRENT_REGS = NULL; #endif board_autoled_off(LED_INIRQ); } diff --git a/arch/arm/src/arm/up_prefetchabort.c b/arch/arm/src/arm/up_prefetchabort.c index 47cfb853d7b..ed2bfb1bf9d 100644 --- a/arch/arm/src/arm/up_prefetchabort.c +++ b/arch/arm/src/arm/up_prefetchabort.c @@ -92,13 +92,13 @@ void up_prefetchabort(uint32_t *regs) #ifdef CONFIG_PAGING uint32_t *savestate; - /* Save the saved processor context in current_regs where it can be accessed + /* Save the saved processor context in CURRENT_REGS where it can be accessed * for register dumps and possibly context switching. */ - savestate = (uint32_t *)current_regs; + savestate = (uint32_t *)CURRENT_REGS; #endif - current_regs = regs; + CURRENT_REGS = regs; #ifdef CONFIG_PAGING /* Get the (virtual) address of instruction that caused the prefetch abort. @@ -138,12 +138,12 @@ void up_prefetchabort(uint32_t *regs) pg_miss(); - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of CURRENT_REGS. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - current_regs = savestate; + CURRENT_REGS = savestate; } else #endif diff --git a/arch/arm/src/arm/up_releasepending.c b/arch/arm/src/arm/up_releasepending.c index 4d4a5d6ed6e..4defb895e00 100644 --- a/arch/arm/src/arm/up_releasepending.c +++ b/arch/arm/src/arm/up_releasepending.c @@ -84,10 +84,10 @@ void up_release_pending(void) /* Are we operating in interrupt context? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/arm/up_reprioritizertr.c b/arch/arm/src/arm/up_reprioritizertr.c index 3b92e8c6ec7..8f6b739d08d 100644 --- a/arch/arm/src/arm/up_reprioritizertr.c +++ b/arch/arm/src/arm/up_reprioritizertr.c @@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/arm/up_schedulesigaction.c b/arch/arm/src/arm/up_schedulesigaction.c index c27bd11dfb0..3972b779212 100644 --- a/arch/arm/src/arm/up_schedulesigaction.c +++ b/arch/arm/src/arm/up_schedulesigaction.c @@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * being delivered to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS); if (tcb == this_task()) { @@ -116,7 +116,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * a task is signalling itself for some reason. */ - if (!current_regs) + if (!CURRENT_REGS) { /* In this case just deliver the signal now. */ @@ -132,7 +132,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * logic would fail in the strange case where we are in an * interrupt handler, the thread is signalling itself, but * a context switch to another task has occurred so that - * current_regs does not refer to the thread of this_task()! + * CURRENT_REGS does not refer to the thread of this_task()! */ else @@ -143,15 +143,15 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc = current_regs[REG_PC]; - tcb->xcp.saved_cpsr = current_regs[REG_CPSR]; + tcb->xcp.saved_pc = CURRENT_REGS[REG_PC]; + tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR]; /* Then set up to vector to the trampoline with interrupts * disabled */ - current_regs[REG_PC] = (uint32_t)up_sigdeliver; - current_regs[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT; + CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver; + CURRENT_REGS[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT; /* And make sure that the saved context in the TCB * is the same as the interrupt return context. diff --git a/arch/arm/src/arm/up_syscall.c b/arch/arm/src/arm/up_syscall.c index 990baed2538..07d8ac26d22 100644 --- a/arch/arm/src/arm/up_syscall.c +++ b/arch/arm/src/arm/up_syscall.c @@ -94,6 +94,6 @@ void up_syscall(uint32_t *regs) { lldbg("Syscall from 0x%x\n", regs[REG_PC]); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); } diff --git a/arch/arm/src/arm/up_unblocktask.c b/arch/arm/src/arm/up_unblocktask.c index d9346f9ca6b..12cb984d831 100644 --- a/arch/arm/src/arm/up_unblocktask.c +++ b/arch/arm/src/arm/up_unblocktask.c @@ -98,10 +98,10 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/arm/up_undefinedinsn.c b/arch/arm/src/arm/up_undefinedinsn.c index fc57427212e..99b1e3fc66b 100644 --- a/arch/arm/src/arm/up_undefinedinsn.c +++ b/arch/arm/src/arm/up_undefinedinsn.c @@ -81,6 +81,6 @@ void up_undefinedinsn(uint32_t *regs) { lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); } diff --git a/arch/arm/src/armv6-m/up_assert.c b/arch/arm/src/armv6-m/up_assert.c index d8aa9871f14..dcb71392696 100644 --- a/arch/arm/src/armv6-m/up_assert.c +++ b/arch/arm/src/armv6-m/up_assert.c @@ -180,27 +180,27 @@ static inline void up_registerdump(void) { /* Are user registers available from interrupt processing? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes.. dump the interrupt registers */ lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R0], current_regs[REG_R1], - current_regs[REG_R2], current_regs[REG_R3], - current_regs[REG_R4], current_regs[REG_R5], - current_regs[REG_R6], current_regs[REG_R7]); + CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1], + CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3], + CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5], + CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]); lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R8], current_regs[REG_R9], - current_regs[REG_R10], current_regs[REG_R11], - current_regs[REG_R12], current_regs[REG_R13], - current_regs[REG_R14], current_regs[REG_R15]); + CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9], + CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11], + CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13], + CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]); #ifdef CONFIG_BUILD_PROTECTED lldbg("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK], - current_regs[REG_EXC_RETURN]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK], + CURRENT_REGS[REG_EXC_RETURN]); #else lldbg("xPSR: %08x PRIMASK: %08x\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]); #endif } } @@ -294,9 +294,9 @@ static void up_dumpstate(void) * pointer (and the above range check should have failed). */ - if (current_regs) + if (CURRENT_REGS) { - sp = current_regs[REG_R13]; + sp = CURRENT_REGS[REG_R13]; lldbg("sp: %08x\n", sp); } @@ -365,7 +365,7 @@ static void _up_assert(int errorcode) { /* Are we in an interrupt handler or the idle task? */ - if (current_regs || this_task()->pid == 0) + if (CURRENT_REGS || this_task()->pid == 0) { (void)up_irq_save(); for (; ; ) diff --git a/arch/arm/src/armv6-m/up_blocktask.c b/arch/arm/src/armv6-m/up_blocktask.c index 9723638ba7b..2a95163cca2 100644 --- a/arch/arm/src/armv6-m/up_blocktask.c +++ b/arch/arm/src/armv6-m/up_blocktask.c @@ -114,10 +114,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv6-m/up_doirq.c b/arch/arm/src/armv6-m/up_doirq.c index 3edc9d3b82e..ac688ba3066 100644 --- a/arch/arm/src/armv6-m/up_doirq.c +++ b/arch/arm/src/armv6-m/up_doirq.c @@ -80,18 +80,18 @@ uint32_t *up_doirq(int irq, uint32_t *regs) /* Nested interrupts are not supported in this implementation. If you want * to implement nested interrupts, you would have to (1) change the way that - * current_regs is handled and (2) the design associated with + * CURRENT_REGS is handled and (2) the design associated with * CONFIG_ARCH_INTERRUPTSTACK. The savestate variable will not work for * that purpose as implemented here because only the outermost nested * interrupt can result in a context switch (it can probably be deleted). */ /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. */ - savestate = (uint32_t *)current_regs; - current_regs = regs; + savestate = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = regs; /* Acknowledge the interrupt */ @@ -102,19 +102,19 @@ uint32_t *up_doirq(int irq, uint32_t *regs) irq_dispatch(irq, regs); /* If a context switch occurred while processing the interrupt then - * current_regs may have change value. If we return any value different + * CURRENT_REGS may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ - regs = (uint32_t *)current_regs; + regs = (uint32_t *)CURRENT_REGS; - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of CURRENT_REGS. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - current_regs = savestate; + CURRENT_REGS = savestate; #endif board_autoled_off(LED_INIRQ); return regs; diff --git a/arch/arm/src/armv6-m/up_hardfault.c b/arch/arm/src/armv6-m/up_hardfault.c index 55079571fb0..edd1bab6a23 100644 --- a/arch/arm/src/armv6-m/up_hardfault.c +++ b/arch/arm/src/armv6-m/up_hardfault.c @@ -145,7 +145,7 @@ int up_hardfault(int irq, FAR void *context) regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11], regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]); hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]); #endif (void)up_irq_save(); diff --git a/arch/arm/src/armv6-m/up_releasepending.c b/arch/arm/src/armv6-m/up_releasepending.c index 4a50062ac76..c3e2d02ea70 100644 --- a/arch/arm/src/armv6-m/up_releasepending.c +++ b/arch/arm/src/armv6-m/up_releasepending.c @@ -83,10 +83,10 @@ void up_release_pending(void) /* Are we operating in interrupt context? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. Just copy the - * current_regs into the OLD rtcb. + * CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv6-m/up_reprioritizertr.c b/arch/arm/src/armv6-m/up_reprioritizertr.c index c963b7e211a..bd50b88b70c 100644 --- a/arch/arm/src/armv6-m/up_reprioritizertr.c +++ b/arch/arm/src/armv6-m/up_reprioritizertr.c @@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv6-m/up_schedulesigaction.c b/arch/arm/src/armv6-m/up_schedulesigaction.c index 9c7cb168783..be9505a9c2c 100644 --- a/arch/arm/src/armv6-m/up_schedulesigaction.c +++ b/arch/arm/src/armv6-m/up_schedulesigaction.c @@ -121,7 +121,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS); if (tcb == this_task()) { @@ -129,7 +129,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * signalling itself for some reason. */ - if (!current_regs) + if (!CURRENT_REGS) { /* In this case just deliver the signal now. */ @@ -150,22 +150,22 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc = current_regs[REG_PC]; - tcb->xcp.saved_primask = current_regs[REG_PRIMASK]; - tcb->xcp.saved_xpsr = current_regs[REG_XPSR]; + tcb->xcp.saved_pc = CURRENT_REGS[REG_PC]; + tcb->xcp.saved_primask = CURRENT_REGS[REG_PRIMASK]; + tcb->xcp.saved_xpsr = CURRENT_REGS[REG_XPSR]; #ifdef CONFIG_BUILD_PROTECTED - tcb->xcp.saved_lr = current_regs[REG_LR]; + tcb->xcp.saved_lr = CURRENT_REGS[REG_LR]; #endif /* Then set up to vector to the trampoline with interrupts * disabled. The kernel-space trampoline must run in * privileged thread mode. */ - current_regs[REG_PC] = (uint32_t)up_sigdeliver; - current_regs[REG_PRIMASK] = 1; - current_regs[REG_XPSR] = ARMV6M_XPSR_T; + CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver; + CURRENT_REGS[REG_PRIMASK] = 1; + CURRENT_REGS[REG_XPSR] = ARMV6M_XPSR_T; #ifdef CONFIG_BUILD_PROTECTED - current_regs[REG_LR] = EXC_RETURN_PRIVTHR; + CURRENT_REGS[REG_LR] = EXC_RETURN_PRIVTHR; #endif /* And make sure that the saved context in the TCB is the same * as the interrupt return context. diff --git a/arch/arm/src/armv6-m/up_svcall.c b/arch/arm/src/armv6-m/up_svcall.c index 7e67e2b1013..b5cec079379 100644 --- a/arch/arm/src/armv6-m/up_svcall.c +++ b/arch/arm/src/armv6-m/up_svcall.c @@ -162,7 +162,7 @@ int up_svcall(int irq, FAR void *context) uint32_t *regs = (uint32_t *)context; uint32_t cmd; - DEBUGASSERT(regs && regs == current_regs); + DEBUGASSERT(regs && regs == CURRENT_REGS); cmd = regs[REG_R0]; /* The SVCall software interrupt is called with R0 = system call command @@ -224,16 +224,16 @@ int up_svcall(int irq, FAR void *context) * R0 = SYS_restore_context * R1 = restoreregs * - * In this case, we simply need to set current_regs to restore register - * area referenced in the saved R1. context == current_regs is the normal - * exception return. By setting current_regs = context[R1], we force + * In this case, we simply need to set CURRENT_REGS to restore register + * area referenced in the saved R1. context == CURRENT_REGS is the normal + * exception return. By setting CURRENT_REGS = context[R1], we force * the return to the saved context referenced in R1. */ case SYS_restore_context: { DEBUGASSERT(regs[REG_R1] != 0); - current_regs = (uint32_t *)regs[REG_R1]; + CURRENT_REGS = (uint32_t *)regs[REG_R1]; } break; @@ -249,7 +249,7 @@ int up_svcall(int irq, FAR void *context) * * In this case, we do both: We save the context registers to the save * register area reference by the saved contents of R1 and then set - * current_regs to to the save register area referenced by the saved + * CURRENT_REGS to to the save register area referenced by the saved * contents of R2. */ @@ -257,7 +257,7 @@ int up_svcall(int irq, FAR void *context) { DEBUGASSERT(regs[REG_R1] != 0 && regs[REG_R2] != 0); memcpy((uint32_t *)regs[REG_R1], regs, XCPTCONTEXT_SIZE); - current_regs = (uint32_t *)regs[REG_R2]; + CURRENT_REGS = (uint32_t *)regs[REG_R2]; } break; @@ -483,27 +483,27 @@ int up_svcall(int irq, FAR void *context) # ifndef CONFIG_DEBUG_SVCALL if (cmd > SYS_switch_context) # else - if (regs != current_regs) + if (regs != CURRENT_REGS) # endif { svcdbg("SVCall Return:\n"); svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R0], current_regs[REG_R1], - current_regs[REG_R2], current_regs[REG_R3], - current_regs[REG_R4], current_regs[REG_R5], - current_regs[REG_R6], current_regs[REG_R7]); + CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1], + CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3], + CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5], + CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]); svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R8], current_regs[REG_R9], - current_regs[REG_R10], current_regs[REG_R11], - current_regs[REG_R12], current_regs[REG_R13], - current_regs[REG_R14], current_regs[REG_R15]); + CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9], + CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11], + CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13], + CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]); #ifdef CONFIG_BUILD_PROTECTED svcdbg(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK], - current_regs[REG_EXC_RETURN]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK], + CURRENT_REGS[REG_EXC_RETURN]); #else svcdbg(" PSR: %08x PRIMASK: %08x\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]); #endif } # ifdef CONFIG_DEBUG_SVCALL diff --git a/arch/arm/src/armv6-m/up_unblocktask.c b/arch/arm/src/armv6-m/up_unblocktask.c index 6ae3458e9d1..62ec07d90a3 100644 --- a/arch/arm/src/armv6-m/up_unblocktask.c +++ b/arch/arm/src/armv6-m/up_unblocktask.c @@ -96,10 +96,10 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-a/arm_assert.c b/arch/arm/src/armv7-a/arm_assert.c index 0b1e27e0685..00c730919c7 100644 --- a/arch/arm/src/armv7-a/arm_assert.c +++ b/arch/arm/src/armv7-a/arm_assert.c @@ -175,7 +175,7 @@ static inline void up_registerdump(void) { /* Are user registers available from interrupt processing? */ - if (current_regs) + if (CURRENT_REGS) { int regs; @@ -183,13 +183,13 @@ static inline void up_registerdump(void) for (regs = REG_R0; regs <= REG_R15; regs += 8) { - uint32_t *ptr = (uint32_t *)¤t_regs[regs]; + uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs]; lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", regs, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7]); } - lldbg("CPSR: %08x\n", current_regs[REG_CPSR]); + lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]); } } #else @@ -361,7 +361,7 @@ static void _up_assert(int errorcode) { /* Are we in an interrupt handler or the idle task? */ - if (current_regs || this_task()->pid == 0) + if (CURRENT_REGS || this_task()->pid == 0) { (void)up_irq_save(); for (; ; ) diff --git a/arch/arm/src/armv7-a/arm_blocktask.c b/arch/arm/src/armv7-a/arm_blocktask.c index cf9fa1fa13d..3f02e46b362 100644 --- a/arch/arm/src/armv7-a/arm_blocktask.c +++ b/arch/arm/src/armv7-a/arm_blocktask.c @@ -116,10 +116,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-a/arm_dataabort.c b/arch/arm/src/armv7-a/arm_dataabort.c index 1ab67680619..818557c552a 100644 --- a/arch/arm/src/armv7-a/arm_dataabort.c +++ b/arch/arm/src/armv7-a/arm_dataabort.c @@ -95,12 +95,12 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr) struct tcb_s *tcb = this_task(); uint32_t *savestate; - /* Save the saved processor context in current_regs where it can be accessed + /* Save the saved processor context in CURRENT_REGS where it can be accessed * for register dumps and possibly context switching. */ - savestate = (uint32_t *)current_regs; - current_regs = regs; + savestate = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = regs; /* In the NuttX on-demand paging implementation, only the read-only, .text * section is paged. However, the ARM compiler generated PC-relative data @@ -154,12 +154,12 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr) pg_miss(); - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of CURRENT_REGS. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - current_regs = savestate; + CURRENT_REGS = savestate; return regs; segfault: @@ -173,11 +173,11 @@ segfault: uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr) { - /* Save the saved processor context in current_regs where it can be accessed + /* Save the saved processor context in CURRENT_REGS where it can be accessed * for register dumps and possibly context switching. */ - current_regs = regs; + CURRENT_REGS = regs; /* Crash -- possibly showing diagnostic debug information. */ diff --git a/arch/arm/src/armv7-a/arm_doirq.c b/arch/arm/src/armv7-a/arm_doirq.c index 79a5ed5f557..4980111d582 100644 --- a/arch/arm/src/armv7-a/arm_doirq.c +++ b/arch/arm/src/armv7-a/arm_doirq.c @@ -80,13 +80,13 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) #else /* Nested interrupts are not supported */ - DEBUGASSERT(current_regs == NULL); + DEBUGASSERT(CURRENT_REGS == NULL); /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. */ - current_regs = regs; + CURRENT_REGS = regs; /* Deliver the IRQ */ @@ -94,18 +94,18 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. If an + * CURRENT_REGS will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ - if (regs != current_regs) + if (regs != CURRENT_REGS) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t *)current_regs); + up_restorefpu((uint32_t *)CURRENT_REGS); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -120,12 +120,12 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) } #endif - /* Set current_regs to NULL to indicate that we are no longer in an + /* Set CURRENT_REGS to NULL to indicate that we are no longer in an * interrupt handler. */ - regs = (uint32_t *)current_regs; - current_regs = NULL; + regs = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = NULL; #endif board_autoled_off(LED_INIRQ); diff --git a/arch/arm/src/armv7-a/arm_prefetchabort.c b/arch/arm/src/armv7-a/arm_prefetchabort.c index 906cc6e83af..7d2b4cf2df2 100644 --- a/arch/arm/src/armv7-a/arm_prefetchabort.c +++ b/arch/arm/src/armv7-a/arm_prefetchabort.c @@ -93,12 +93,12 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr) { uint32_t *savestate; - /* Save the saved processor context in current_regs where it can be accessed + /* Save the saved processor context in CURRENT_REGS where it can be accessed * for register dumps and possibly context switching. */ - savestate = (uint32_t *)current_regs; - current_regs = regs; + savestate = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = regs; /* Get the (virtual) address of instruction that caused the prefetch abort. * When the exception occurred, this address was provided in the lr register @@ -137,12 +137,12 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr) pg_miss(); - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of CURRENT_REGS. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - current_regs = savestate; + CURRENT_REGS = savestate; } else { @@ -158,11 +158,11 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr) uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr) { - /* Save the saved processor context in current_regs where it can be accessed + /* Save the saved processor context in CURRENT_REGS where it can be accessed * for register dumps and possibly context switching. */ - current_regs = regs; + CURRENT_REGS = regs; /* Crash -- possibly showing diagnostic debug information. */ diff --git a/arch/arm/src/armv7-a/arm_releasepending.c b/arch/arm/src/armv7-a/arm_releasepending.c index 989b5e4f4d9..9696e931c0b 100644 --- a/arch/arm/src/armv7-a/arm_releasepending.c +++ b/arch/arm/src/armv7-a/arm_releasepending.c @@ -84,10 +84,10 @@ void up_release_pending(void) /* Are we operating in interrupt context? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-a/arm_reprioritizertr.c b/arch/arm/src/armv7-a/arm_reprioritizertr.c index e2cba59a432..d4b2699f6dd 100644 --- a/arch/arm/src/armv7-a/arm_reprioritizertr.c +++ b/arch/arm/src/armv7-a/arm_reprioritizertr.c @@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-a/arm_schedulesigaction.c b/arch/arm/src/armv7-a/arm_schedulesigaction.c index 678d21cf351..e8db2d35f45 100644 --- a/arch/arm/src/armv7-a/arm_schedulesigaction.c +++ b/arch/arm/src/armv7-a/arm_schedulesigaction.c @@ -120,7 +120,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS); if (tcb == this_task()) { @@ -128,7 +128,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * signalling itself for some reason. */ - if (!current_regs) + if (!CURRENT_REGS) { /* In this case just deliver the signal now. */ @@ -143,7 +143,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * Hmmm... there looks like a latent bug here: The following logic * would fail in the strange case where we are in an interrupt * handler, the thread is signalling itself, but a context switch - * to another task has occurred so that current_regs does not + * to another task has occurred so that CURRENT_REGS does not * refer to the thread of this_task()! */ @@ -155,15 +155,15 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc = current_regs[REG_PC]; - tcb->xcp.saved_cpsr = current_regs[REG_CPSR]; + tcb->xcp.saved_pc = CURRENT_REGS[REG_PC]; + tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR]; /* Then set up to vector to the trampoline with interrupts * disabled */ - current_regs[REG_PC] = (uint32_t)up_sigdeliver; - current_regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT); + CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver; + CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT); /* And make sure that the saved context in the TCB is the same * as the interrupt return context. diff --git a/arch/arm/src/armv7-a/arm_syscall.c b/arch/arm/src/armv7-a/arm_syscall.c index 56dc38ea4d4..4b73c1e5e38 100644 --- a/arch/arm/src/armv7-a/arm_syscall.c +++ b/arch/arm/src/armv7-a/arm_syscall.c @@ -527,7 +527,7 @@ uint32_t *arm_syscall(uint32_t *regs) uint32_t *arm_syscall(uint32_t *regs) { lldbg("SYSCALL from 0x%x\n", regs[REG_PC]); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); } diff --git a/arch/arm/src/armv7-a/arm_unblocktask.c b/arch/arm/src/armv7-a/arm_unblocktask.c index 3b26c39dfea..173ca913222 100644 --- a/arch/arm/src/armv7-a/arm_unblocktask.c +++ b/arch/arm/src/armv7-a/arm_unblocktask.c @@ -110,10 +110,10 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-a/arm_undefinedinsn.c b/arch/arm/src/armv7-a/arm_undefinedinsn.c index c0af4cae728..bc08375594c 100644 --- a/arch/arm/src/armv7-a/arm_undefinedinsn.c +++ b/arch/arm/src/armv7-a/arm_undefinedinsn.c @@ -81,7 +81,7 @@ uint32_t *arm_undefinedinsn(uint32_t *regs) { lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); return regs; /* To keep the compiler happy */ } diff --git a/arch/arm/src/armv7-m/up_assert.c b/arch/arm/src/armv7-m/up_assert.c index 2e3abeb2aa7..0f6fa00d219 100644 --- a/arch/arm/src/armv7-m/up_assert.c +++ b/arch/arm/src/armv7-m/up_assert.c @@ -179,33 +179,33 @@ static inline void up_registerdump(void) { /* Are user registers available from interrupt processing? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes.. dump the interrupt registers */ lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R0], current_regs[REG_R1], - current_regs[REG_R2], current_regs[REG_R3], - current_regs[REG_R4], current_regs[REG_R5], - current_regs[REG_R6], current_regs[REG_R7]); + CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1], + CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3], + CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5], + CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]); lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R8], current_regs[REG_R9], - current_regs[REG_R10], current_regs[REG_R11], - current_regs[REG_R12], current_regs[REG_R13], - current_regs[REG_R14], current_regs[REG_R15]); + CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9], + CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11], + CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13], + CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]); #ifdef CONFIG_ARMV7M_USEBASEPRI lldbg("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n", - current_regs[REG_XPSR], current_regs[REG_BASEPRI], + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI], getcontrol()); #else lldbg("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK], + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK], getcontrol()); #endif #ifdef REG_EXC_RETURN - lldbg("EXC_RETURN: %08x\n", current_regs[REG_EXC_RETURN]); + lldbg("EXC_RETURN: %08x\n", CURRENT_REGS[REG_EXC_RETURN]); #endif } } @@ -299,9 +299,9 @@ static void up_dumpstate(void) * pointer (and the above range check should have failed). */ - if (current_regs) + if (CURRENT_REGS) { - sp = current_regs[REG_R13]; + sp = CURRENT_REGS[REG_R13]; lldbg("sp: %08x\n", sp); } @@ -374,7 +374,7 @@ static void _up_assert(int errorcode) { /* Are we in an interrupt handler or the idle task? */ - if (current_regs || (this_task())->pid == 0) + if (CURRENT_REGS || (this_task())->pid == 0) { (void)up_irq_save(); for (; ; ) diff --git a/arch/arm/src/armv7-m/up_blocktask.c b/arch/arm/src/armv7-m/up_blocktask.c index f4257c82392..5e62e0fb9fc 100644 --- a/arch/arm/src/armv7-m/up_blocktask.c +++ b/arch/arm/src/armv7-m/up_blocktask.c @@ -115,10 +115,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-m/up_doirq.c b/arch/arm/src/armv7-m/up_doirq.c index 71c1fc7d11e..b51c10e5582 100644 --- a/arch/arm/src/armv7-m/up_doirq.c +++ b/arch/arm/src/armv7-m/up_doirq.c @@ -80,18 +80,18 @@ uint32_t *up_doirq(int irq, uint32_t *regs) /* Nested interrupts are not supported in this implementation. If you want * to implement nested interrupts, you would have to (1) change the way that - * current_regs is handled and (2) the design associated with + * CURRENT_REGS is handled and (2) the design associated with * CONFIG_ARCH_INTERRUPTSTACK. The savestate variable will not work for * that purpose as implemented here because only the outermost nested * interrupt can result in a context switch (it can probably be deleted). */ /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. */ - savestate = (uint32_t *)current_regs; - current_regs = regs; + savestate = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = regs; /* Acknowledge the interrupt */ @@ -102,19 +102,19 @@ uint32_t *up_doirq(int irq, uint32_t *regs) irq_dispatch(irq, regs); /* If a context switch occurred while processing the interrupt then - * current_regs may have change value. If we return any value different + * CURRENT_REGS may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ - regs = (uint32_t *)current_regs; + regs = (uint32_t *)CURRENT_REGS; - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of CURRENT_REGS. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - current_regs = savestate; + CURRENT_REGS = savestate; #endif board_autoled_off(LED_INIRQ); return regs; diff --git a/arch/arm/src/armv7-m/up_hardfault.c b/arch/arm/src/armv7-m/up_hardfault.c index 4a18658cfce..da283893863 100644 --- a/arch/arm/src/armv7-m/up_hardfault.c +++ b/arch/arm/src/armv7-m/up_hardfault.c @@ -161,20 +161,20 @@ int up_hardfault(int irq, FAR void *context) #ifdef CONFIG_ARMV7M_USEBASEPRI # ifdef REG_EXC_RETURN hfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_BASEPRI], - current_regs[REG_EXC_RETURN]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI], + CURRENT_REGS[REG_EXC_RETURN]); # else hfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_BASEPRI]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]); # endif #else # ifdef REG_EXC_RETURN hfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK], - current_regs[REG_EXC_RETURN]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK], + CURRENT_REGS[REG_EXC_RETURN]); # else hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]); # endif #endif diff --git a/arch/arm/src/armv7-m/up_memfault.c b/arch/arm/src/armv7-m/up_memfault.c index 11d0c2eee37..145dba531d0 100644 --- a/arch/arm/src/armv7-m/up_memfault.c +++ b/arch/arm/src/armv7-m/up_memfault.c @@ -108,20 +108,20 @@ int up_memfault(int irq, FAR void *context) #ifdef CONFIG_ARMV7M_USEBASEPRI # ifdef REG_EXC_RETURN mfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_BASEPRI], - current_regs[REG_EXC_RETURN]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI], + CURRENT_REGS[REG_EXC_RETURN]); # else mfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_BASEPRI]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]); # endif #else # ifdef REG_EXC_RETURN mfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK], - current_regs[REG_EXC_RETURN]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK], + CURRENT_REGS[REG_EXC_RETURN]); # else mfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]); # endif #endif diff --git a/arch/arm/src/armv7-m/up_releasepending.c b/arch/arm/src/armv7-m/up_releasepending.c index 72bb39c7c07..e9f4cceb33c 100644 --- a/arch/arm/src/armv7-m/up_releasepending.c +++ b/arch/arm/src/armv7-m/up_releasepending.c @@ -83,10 +83,10 @@ void up_release_pending(void) /* Are we operating in interrupt context? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. Just copy the - * current_regs into the OLD rtcb. + * CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-m/up_reprioritizertr.c b/arch/arm/src/armv7-m/up_reprioritizertr.c index 97e135b6bc8..d3415e77414 100644 --- a/arch/arm/src/armv7-m/up_reprioritizertr.c +++ b/arch/arm/src/armv7-m/up_reprioritizertr.c @@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-m/up_schedulesigaction.c b/arch/arm/src/armv7-m/up_schedulesigaction.c index d415fd59288..8e9defc2687 100644 --- a/arch/arm/src/armv7-m/up_schedulesigaction.c +++ b/arch/arm/src/armv7-m/up_schedulesigaction.c @@ -110,7 +110,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS); if (tcb == this_task()) { @@ -118,7 +118,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * signalling itself for some reason. */ - if (!current_regs) + if (!CURRENT_REGS) { /* In this case just deliver the signal now. */ @@ -140,30 +140,30 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc = current_regs[REG_PC]; + tcb->xcp.saved_pc = CURRENT_REGS[REG_PC]; #ifdef CONFIG_ARMV7M_USEBASEPRI - tcb->xcp.saved_basepri = current_regs[REG_BASEPRI]; + tcb->xcp.saved_basepri = CURRENT_REGS[REG_BASEPRI]; #else - tcb->xcp.saved_primask = current_regs[REG_PRIMASK]; + tcb->xcp.saved_primask = CURRENT_REGS[REG_PRIMASK]; #endif - tcb->xcp.saved_xpsr = current_regs[REG_XPSR]; + tcb->xcp.saved_xpsr = CURRENT_REGS[REG_XPSR]; #ifdef CONFIG_BUILD_PROTECTED - tcb->xcp.saved_lr = current_regs[REG_LR]; + tcb->xcp.saved_lr = CURRENT_REGS[REG_LR]; #endif /* Then set up to vector to the trampoline with interrupts * disabled. The kernel-space trampoline must run in * privileged thread mode. */ - current_regs[REG_PC] = (uint32_t)up_sigdeliver; + CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver; #ifdef CONFIG_ARMV7M_USEBASEPRI - current_regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY; + CURRENT_REGS[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY; #else - current_regs[REG_PRIMASK] = 1; + CURRENT_REGS[REG_PRIMASK] = 1; #endif - current_regs[REG_XPSR] = ARMV7M_XPSR_T; + CURRENT_REGS[REG_XPSR] = ARMV7M_XPSR_T; #ifdef CONFIG_BUILD_PROTECTED - current_regs[REG_LR] = EXC_RETURN_PRIVTHR; + CURRENT_REGS[REG_LR] = EXC_RETURN_PRIVTHR; #endif /* And make sure that the saved context in the TCB is the same * as the interrupt return context. diff --git a/arch/arm/src/armv7-m/up_svcall.c b/arch/arm/src/armv7-m/up_svcall.c index 048f58e86a2..4d28224fd7e 100644 --- a/arch/arm/src/armv7-m/up_svcall.c +++ b/arch/arm/src/armv7-m/up_svcall.c @@ -157,7 +157,7 @@ int up_svcall(int irq, FAR void *context) uint32_t *regs = (uint32_t *)context; uint32_t cmd; - DEBUGASSERT(regs && regs == current_regs); + DEBUGASSERT(regs && regs == CURRENT_REGS); cmd = regs[REG_R0]; /* The SVCall software interrupt is called with R0 = system call command @@ -222,16 +222,16 @@ int up_svcall(int irq, FAR void *context) * R0 = SYS_restore_context * R1 = restoreregs * - * In this case, we simply need to set current_regs to restore register - * area referenced in the saved R1. context == current_regs is the normal - * exception return. By setting current_regs = context[R1], we force + * In this case, we simply need to set CURRENT_REGS to restore register + * area referenced in the saved R1. context == CURRENT_REGS is the normal + * exception return. By setting CURRENT_REGS = context[R1], we force * the return to the saved context referenced in R1. */ case SYS_restore_context: { DEBUGASSERT(regs[REG_R1] != 0); - current_regs = (uint32_t *)regs[REG_R1]; + CURRENT_REGS = (uint32_t *)regs[REG_R1]; } break; @@ -247,7 +247,7 @@ int up_svcall(int irq, FAR void *context) * * In this case, we do both: We save the context registers to the save * register area reference by the saved contents of R1 and then set - * current_regs to to the save register area referenced by the saved + * CURRENT_REGS to to the save register area referenced by the saved * contents of R2. */ @@ -259,7 +259,7 @@ int up_svcall(int irq, FAR void *context) (!defined(CONFIG_ARMV7M_CMNVECTOR) || defined(CONFIG_ARMV7M_LAZYFPU)) up_savefpu((uint32_t *)regs[REG_R1]); #endif - current_regs = (uint32_t *)regs[REG_R2]; + CURRENT_REGS = (uint32_t *)regs[REG_R2]; } break; @@ -485,25 +485,25 @@ int up_svcall(int irq, FAR void *context) # ifndef CONFIG_DEBUG_SVCALL if (cmd > SYS_switch_context) # else - if (regs != current_regs) + if (regs != CURRENT_REGS) # endif { svcdbg("SVCall Return:\n"); svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R0], current_regs[REG_R1], - current_regs[REG_R2], current_regs[REG_R3], - current_regs[REG_R4], current_regs[REG_R5], - current_regs[REG_R6], current_regs[REG_R7]); + CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1], + CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3], + CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5], + CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]); svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R8], current_regs[REG_R9], - current_regs[REG_R10], current_regs[REG_R11], - current_regs[REG_R12], current_regs[REG_R13], - current_regs[REG_R14], current_regs[REG_R15]); + CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9], + CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11], + CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13], + CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]); # ifdef REG_EXC_RETURN svcdbg(" PSR: %08x EXC_RETURN: %08x\n", - current_regs[REG_XPSR], current_regs[REG_EXC_RETURN]); + CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_EXC_RETURN]); # else - svcdbg(" PSR: %08x\n", current_regs[REG_XPSR]); + svcdbg(" PSR: %08x\n", CURRENT_REGS[REG_XPSR]); # endif } # ifdef CONFIG_DEBUG_SVCALL diff --git a/arch/arm/src/armv7-m/up_unblocktask.c b/arch/arm/src/armv7-m/up_unblocktask.c index bbc7fa902f3..3c9ae8df147 100644 --- a/arch/arm/src/armv7-m/up_unblocktask.c +++ b/arch/arm/src/armv7-m/up_unblocktask.c @@ -97,10 +97,10 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-r/arm_assert.c b/arch/arm/src/armv7-r/arm_assert.c index 3abfd2afc11..11dd9fad09b 100644 --- a/arch/arm/src/armv7-r/arm_assert.c +++ b/arch/arm/src/armv7-r/arm_assert.c @@ -175,7 +175,7 @@ static inline void up_registerdump(void) { /* Are user registers available from interrupt processing? */ - if (current_regs) + if (CURRENT_REGS) { int regs; @@ -183,13 +183,13 @@ static inline void up_registerdump(void) for (regs = REG_R0; regs <= REG_R15; regs += 8) { - uint32_t *ptr = (uint32_t *)¤t_regs[regs]; + uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs]; lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", regs, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7]); } - lldbg("CPSR: %08x\n", current_regs[REG_CPSR]); + lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]); } } #else @@ -361,7 +361,7 @@ static void _up_assert(int errorcode) { /* Are we in an interrupt handler or the idle task? */ - if (current_regs || (this_task())->pid == 0) + if (CURRENT_REGS || (this_task())->pid == 0) { (void)up_irq_save(); for (; ; ) diff --git a/arch/arm/src/armv7-r/arm_blocktask.c b/arch/arm/src/armv7-r/arm_blocktask.c index e18a0a5739a..58cefee3cfe 100644 --- a/arch/arm/src/armv7-r/arm_blocktask.c +++ b/arch/arm/src/armv7-r/arm_blocktask.c @@ -116,10 +116,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-r/arm_dataabort.c b/arch/arm/src/armv7-r/arm_dataabort.c index e48c4c9afa0..789fb0f5ada 100644 --- a/arch/arm/src/armv7-r/arm_dataabort.c +++ b/arch/arm/src/armv7-r/arm_dataabort.c @@ -78,11 +78,11 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr) { - /* Save the saved processor context in current_regs where it can be accessed + /* Save the saved processor context in CURRENT_REGS where it can be accessed * for register dumps and possibly context switching. */ - current_regs = regs; + CURRENT_REGS = regs; /* Crash -- possibly showing diagnostic debug information. */ diff --git a/arch/arm/src/armv7-r/arm_doirq.c b/arch/arm/src/armv7-r/arm_doirq.c index 7aa78aa3d28..fdf392d3384 100644 --- a/arch/arm/src/armv7-r/arm_doirq.c +++ b/arch/arm/src/armv7-r/arm_doirq.c @@ -81,13 +81,13 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) #else /* Nested interrupts are not supported */ - DEBUGASSERT(current_regs == NULL); + DEBUGASSERT(CURRENT_REGS == NULL); /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. */ - current_regs = regs; + CURRENT_REGS = regs; /* Deliver the IRQ */ @@ -95,26 +95,26 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) #ifdef CONFIG_ARCH_FPU /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. If an + * CURRENT_REGS will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ - if (regs != current_regs) + if (regs != CURRENT_REGS) { /* Restore floating point registers */ - up_restorefpu((uint32_t *)current_regs); + up_restorefpu((uint32_t *)CURRENT_REGS); } #endif - /* Set current_regs to NULL to indicate that we are no longer in an + /* Set CURRENT_REGS to NULL to indicate that we are no longer in an * interrupt handler. */ - regs = (uint32_t *)current_regs; - current_regs = NULL; + regs = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = NULL; board_autoled_off(LED_INIRQ); #endif diff --git a/arch/arm/src/armv7-r/arm_prefetchabort.c b/arch/arm/src/armv7-r/arm_prefetchabort.c index 1e3171a80f5..bf16d194676 100644 --- a/arch/arm/src/armv7-r/arm_prefetchabort.c +++ b/arch/arm/src/armv7-r/arm_prefetchabort.c @@ -74,11 +74,11 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr) { - /* Save the saved processor context in current_regs where it can be accessed + /* Save the saved processor context in CURRENT_REGS where it can be accessed * for register dumps and possibly context switching. */ - current_regs = regs; + CURRENT_REGS = regs; /* Crash -- possibly showing diagnostic debug information. */ diff --git a/arch/arm/src/armv7-r/arm_releasepending.c b/arch/arm/src/armv7-r/arm_releasepending.c index 51eecd92b9d..89827085907 100644 --- a/arch/arm/src/armv7-r/arm_releasepending.c +++ b/arch/arm/src/armv7-r/arm_releasepending.c @@ -84,10 +84,10 @@ void up_release_pending(void) /* Are we operating in interrupt context? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-r/arm_reprioritizertr.c b/arch/arm/src/armv7-r/arm_reprioritizertr.c index b3929ee8e20..4fed13e8f27 100644 --- a/arch/arm/src/armv7-r/arm_reprioritizertr.c +++ b/arch/arm/src/armv7-r/arm_reprioritizertr.c @@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-r/arm_schedulesigaction.c b/arch/arm/src/armv7-r/arm_schedulesigaction.c index 459fa9a0b3b..692debff2f0 100644 --- a/arch/arm/src/armv7-r/arm_schedulesigaction.c +++ b/arch/arm/src/armv7-r/arm_schedulesigaction.c @@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS); if (tcb == this_task()) { @@ -116,7 +116,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * signalling itself for some reason. */ - if (!current_regs) + if (!CURRENT_REGS) { /* In this case just deliver the signal now. */ @@ -131,7 +131,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * Hmmm... there looks like a latent bug here: The following logic * would fail in the strange case where we are in an interrupt * handler, the thread is signalling itself, but a context switch - * to another task has occurred so that current_regs does not + * to another task has occurred so that CURRENT_REGS does not * refer to the thread of this_task()! */ @@ -143,15 +143,15 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc = current_regs[REG_PC]; - tcb->xcp.saved_cpsr = current_regs[REG_CPSR]; + tcb->xcp.saved_pc = CURRENT_REGS[REG_PC]; + tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR]; /* Then set up to vector to the trampoline with interrupts * disabled */ - current_regs[REG_PC] = (uint32_t)up_sigdeliver; - current_regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT); + CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver; + CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT); /* And make sure that the saved context in the TCB is the same * as the interrupt return context. diff --git a/arch/arm/src/armv7-r/arm_syscall.c b/arch/arm/src/armv7-r/arm_syscall.c index 862dd74a123..3e41a348434 100644 --- a/arch/arm/src/armv7-r/arm_syscall.c +++ b/arch/arm/src/armv7-r/arm_syscall.c @@ -525,7 +525,7 @@ uint32_t *arm_syscall(uint32_t *regs) uint32_t *arm_syscall(uint32_t *regs) { lldbg("SYSCALL from 0x%x\n", regs[REG_PC]); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); } diff --git a/arch/arm/src/armv7-r/arm_unblocktask.c b/arch/arm/src/armv7-r/arm_unblocktask.c index ca3c541d563..0361c1cc816 100644 --- a/arch/arm/src/armv7-r/arm_unblocktask.c +++ b/arch/arm/src/armv7-r/arm_unblocktask.c @@ -110,10 +110,10 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (CURRENT_REGS) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the CURRENT_REGS into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/arm/src/armv7-r/arm_undefinedinsn.c b/arch/arm/src/armv7-r/arm_undefinedinsn.c index 21f08efb3f1..b1db4f88686 100644 --- a/arch/arm/src/armv7-r/arm_undefinedinsn.c +++ b/arch/arm/src/armv7-r/arm_undefinedinsn.c @@ -81,7 +81,7 @@ uint32_t *arm_undefinedinsn(uint32_t *regs) { lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); return regs; /* To keep the compiler happy */ } diff --git a/arch/arm/src/c5471/c5471_irq.c b/arch/arm/src/c5471/c5471_irq.c index c57d218d2fb..054352674ae 100644 --- a/arch/arm/src/c5471/c5471_irq.c +++ b/arch/arm/src/c5471/c5471_irq.c @@ -58,7 +58,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Data @@ -174,7 +174,7 @@ void up_irqinitialize(void) /* Initialize hardware interrupt vectors */ up_vectorinitialize(); - current_regs = NULL; + CURRENT_REGS = NULL; /* And finally, enable interrupts */ diff --git a/arch/arm/src/calypso/calypso_irq.c b/arch/arm/src/calypso/calypso_irq.c index f77b52ab7e3..9e9ec94e3af 100644 --- a/arch/arm/src/calypso/calypso_irq.c +++ b/arch/arm/src/calypso/calypso_irq.c @@ -84,7 +84,7 @@ enum irq_reg * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; extern uint32_t _exceptions; /**************************************************************************** @@ -201,7 +201,7 @@ void up_irqinitialize(void) /* Prepare hardware */ calypso_exceptions_install(); - current_regs = NULL; + CURRENT_REGS = NULL; /* Switch to internal ROM */ @@ -302,8 +302,8 @@ void up_decodeirq(uint32_t *regs) * Passed to but ignored in IRQ handlers * Only valid meaning is apparently non-NULL == IRQ context */ - saved_regs = (uint32_t *)current_regs; - current_regs = regs; + saved_regs = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = regs; /* Detect & deliver the IRQ */ @@ -316,7 +316,7 @@ void up_decodeirq(uint32_t *regs) tmp |= 0x01; putreg8(tmp, IRQ_REG(IRQ_CTRL)); - current_regs = saved_regs; + CURRENT_REGS = saved_regs; } /**************************************************************************** @@ -332,8 +332,8 @@ void calypso_fiq(void) * Passed to but ignored in IRQ handlers * Only valid meaning is apparently non-NULL == IRQ context */ - regs = (uint32_t *)current_regs; - current_regs = (uint32_t *)# + regs = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = (uint32_t *)# /* Detect & deliver like an IRQ but we are in FIQ context */ @@ -346,5 +346,5 @@ void calypso_fiq(void) tmp |= 0x02; putreg8(tmp, IRQ_REG(IRQ_CTRL)); - current_regs = regs; + CURRENT_REGS = regs; } diff --git a/arch/arm/src/common/up_initialize.c b/arch/arm/src/common/up_initialize.c index 2bd710a92d5..15f86eb4400 100644 --- a/arch/arm/src/common/up_initialize.c +++ b/arch/arm/src/common/up_initialize.c @@ -137,7 +137,7 @@ void up_initialize(void) { /* Initialize global variables */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Calibrate the timing loop */ diff --git a/arch/arm/src/common/up_internal.h b/arch/arm/src/common/up_internal.h index 489f13679de..1ebeac1dad1 100644 --- a/arch/arm/src/common/up_internal.h +++ b/arch/arm/src/common/up_internal.h @@ -129,11 +129,11 @@ # if defined(CONFIG_ARCH_FPU) && (!defined(CONFIG_ARMV7M_CMNVECTOR) || \ defined(CONFIG_ARMV7M_LAZYFPU)) -# define up_savestate(regs) up_copyarmstate(regs, (uint32_t*)current_regs) +# define up_savestate(regs) up_copyarmstate(regs, (uint32_t*)CURRENT_REGS) # else -# define up_savestate(regs) up_copyfullstate(regs, (uint32_t*)current_regs) +# define up_savestate(regs) up_copyfullstate(regs, (uint32_t*)CURRENT_REGS) # endif -# define up_restorestate(regs) (current_regs = regs) +# define up_restorestate(regs) (CURRENT_REGS = regs) /* The Cortex-A and Cortex-R supports the same mechanism, but only lazy * floating point register save/restore. @@ -149,11 +149,11 @@ */ # if defined(CONFIG_ARCH_FPU) -# define up_savestate(regs) up_copyarmstate(regs, (uint32_t*)current_regs) +# define up_savestate(regs) up_copyarmstate(regs, (uint32_t*)CURRENT_REGS) # else -# define up_savestate(regs) up_copyfullstate(regs, (uint32_t*)current_regs) +# define up_savestate(regs) up_copyfullstate(regs, (uint32_t*)CURRENT_REGS) # endif -# define up_restorestate(regs) (current_regs = regs) +# define up_restorestate(regs) (CURRENT_REGS = regs) /* Otherwise, for the ARM7 and ARM9. The state is copied in full from stack * to stack. This is not very efficient and should be fixed to match Cortex-A5. @@ -167,11 +167,11 @@ */ # if defined(CONFIG_ARCH_FPU) -# define up_savestate(regs) up_copyarmstate(regs, (uint32_t*)current_regs) +# define up_savestate(regs) up_copyarmstate(regs, (uint32_t*)CURRENT_REGS) # else -# define up_savestate(regs) up_copyfullstate(regs, (uint32_t*)current_regs) +# define up_savestate(regs) up_copyfullstate(regs, (uint32_t*)CURRENT_REGS) # endif -# define up_restorestate(regs) up_copyfullstate((uint32_t*)current_regs, regs) +# define up_restorestate(regs) up_copyfullstate((uint32_t*)CURRENT_REGS, regs) #endif @@ -204,12 +204,27 @@ extern "C" #define EXTERN extern #endif -/* This holds a references to the current interrupt level - * register storage structure. If is non-NULL only during - * interrupt processing. +/* g_current_regs[] holds a references to the current interrupt level + * register storage structure. If is non-NULL only during interrupt + * processing. Access to g_current_regs[] must be through the macro + * CURRENT_REGS for portability. */ -EXTERN volatile uint32_t *current_regs; +#ifdef CONFIG_SMP +/* For the case of architectures with multiple CPUs, then there must be one + * such value for each processor that can receive an interrupt. + */ + +int up_cpu_index(void); /* See include/nuttx/arch.h */ +EXTERN volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS]; +# define CURRENT_REGS (g_current_regs[up_cpu_index()]) + +#else + +EXTERN volatile uint32_t *g_current_regs[1]; +# define CURRENT_REGS (g_current_regs[0]) + +#endif /* This is the beginning of heap as provided from up_head.S. * This is the first address in DRAM after the loaded diff --git a/arch/arm/src/common/up_interruptcontext.c b/arch/arm/src/common/up_interruptcontext.c index b911fd5fd48..09fd58fa5ae 100644 --- a/arch/arm/src/common/up_interruptcontext.c +++ b/arch/arm/src/common/up_interruptcontext.c @@ -58,5 +58,5 @@ bool up_interrupt_context(void) { - return current_regs != NULL; + return CURRENT_REGS != NULL; } diff --git a/arch/arm/src/dm320/dm320_decodeirq.c b/arch/arm/src/dm320/dm320_decodeirq.c index e410484b5f8..5d36a6bdc65 100644 --- a/arch/arm/src/dm320/dm320_decodeirq.c +++ b/arch/arm/src/dm320/dm320_decodeirq.c @@ -75,7 +75,7 @@ void up_decodeirq(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS lowsyslog(LOG_ERR, "Unexpected IRQ\n"); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); #else /* Decode the interrupt. First, fetch the interrupt id register. */ @@ -99,13 +99,13 @@ void up_decodeirq(uint32_t *regs) up_ack_irq(irq); /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. * * Nested interrupts are not supported. */ - DEBUGASSERT(current_regs == NULL); - current_regs = regs; + DEBUGASSERT(CURRENT_REGS == NULL); + CURRENT_REGS = regs; /* Deliver the IRQ */ @@ -113,18 +113,18 @@ void up_decodeirq(uint32_t *regs) #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. + * CURRENT_REGS will have a different value than it did on entry. * If an interrupt level context switch has occurred, then restore * the floating point state and the establish the correct address * environment before returning from the interrupt. */ - if (regs != current_regs) + if (regs != CURRENT_REGS) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t *)current_regs); + up_restorefpu((uint32_t *)CURRENT_REGS); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -139,11 +139,11 @@ void up_decodeirq(uint32_t *regs) } #endif - /* Set current_regs to NULL to indicate that we are no longer in + /* Set CURRENT_REGS to NULL to indicate that we are no longer in * an interrupt handler. */ - current_regs = NULL; + CURRENT_REGS = NULL; } } #endif diff --git a/arch/arm/src/dm320/dm320_irq.c b/arch/arm/src/dm320/dm320_irq.c index 7c8edc13d77..fbaed79d5a4 100644 --- a/arch/arm/src/dm320/dm320_irq.c +++ b/arch/arm/src/dm320/dm320_irq.c @@ -56,7 +56,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Data @@ -111,7 +111,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* And finally, enable interrupts */ diff --git a/arch/arm/src/efm32/efm32_irq.c b/arch/arm/src/efm32/efm32_irq.c index 62686ca722b..7d41c5da766 100644 --- a/arch/arm/src/efm32/efm32_irq.c +++ b/arch/arm/src/efm32/efm32_irq.c @@ -83,7 +83,7 @@ * context switching. Only value during interrupt handling. */ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /* This is the address of the exception vector table (determined by the * linker script). @@ -418,7 +418,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/imx1/imx_decodeirq.c b/arch/arm/src/imx1/imx_decodeirq.c index 77248cb15df..5c35e68fab2 100644 --- a/arch/arm/src/imx1/imx_decodeirq.c +++ b/arch/arm/src/imx1/imx_decodeirq.c @@ -75,20 +75,20 @@ void up_decodeirq(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS lowsyslog(LOG_ERR, "Unexpected IRQ\n"); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); #else uint32_t regval; int irq; /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. * * Nested interrupts are not supported. */ - DEBUGASSERT(current_regs == NULL); - current_regs = regs; + DEBUGASSERT(CURRENT_REGS == NULL); + CURRENT_REGS = regs; /* Loop while there are pending interrupts to be processed */ @@ -116,18 +116,18 @@ void up_decodeirq(uint32_t *regs) #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. + * CURRENT_REGS will have a different value than it did on entry. * If an interrupt level context switch has occurred, then restore * the floating point state and the establish the correct address * environment before returning from the interrupt. */ - if (regs != current_regs) + if (regs != CURRENT_REGS) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t *)current_regs); + up_restorefpu((uint32_t *)CURRENT_REGS); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -145,10 +145,10 @@ void up_decodeirq(uint32_t *regs) } while (irq < NR_IRQS); - /* Set current_regs to NULL to indicate that we are no longer in + /* Set CURRENT_REGS to NULL to indicate that we are no longer in * an interrupt handler. */ - current_regs = NULL; + CURRENT_REGS = NULL; #endif } diff --git a/arch/arm/src/imx1/imx_irq.c b/arch/arm/src/imx1/imx_irq.c index 9de722f445f..45a0de11c1c 100644 --- a/arch/arm/src/imx1/imx_irq.c +++ b/arch/arm/src/imx1/imx_irq.c @@ -55,7 +55,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Data @@ -82,7 +82,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Set masking of normal interrupts by priority. Writing all ones * (or -1) to the NIMASK register sets the normal interrupt mask to diff --git a/arch/arm/src/imx6/imx_irq.c b/arch/arm/src/imx6/imx_irq.c index 54ab9ad967b..eb1cbc6848c 100644 --- a/arch/arm/src/imx6/imx_irq.c +++ b/arch/arm/src/imx6/imx_irq.c @@ -50,8 +50,21 @@ /**************************************************************************** * Public Data ****************************************************************************/ +/* g_current_regs[] holds a references to the current interrupt level + * register storage structure. If is non-NULL only during interrupt + * processing. Access to g_current_regs[] must be through the macro + * CURRENT_REGS for portability. + */ -volatile uint32_t *current_regs; +#ifdef CONFIG_SMP +/* For the case of configurations with multiple CPUs, then there must be one + * such value for each processor that can receive an interrupt. + */ + +volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS]; +#else +volatile uint32_t *g_current_regs[1]; +#endif /* Symbols defined via the linker script */ @@ -116,7 +129,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; #ifndef CONFIG_SUPPRESS_INTERRUPTS /* Initialize logic to support a second level of interrupt decoding for diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c index d6d24cfa4f6..e330a910e3a 100644 --- a/arch/arm/src/kinetis/kinetis_irq.c +++ b/arch/arm/src/kinetis/kinetis_irq.c @@ -79,7 +79,7 @@ * context switching. Only value during interrupt handling. */ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /* This is the address of the exception vector table (determined by the * linker script). @@ -387,7 +387,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/kl/kl_irq.c b/arch/arm/src/kl/kl_irq.c index 633b631ac59..faecc52edb6 100644 --- a/arch/arm/src/kl/kl_irq.c +++ b/arch/arm/src/kl/kl_irq.c @@ -66,7 +66,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Data @@ -217,7 +217,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/lpc11xx/lpc11_irq.c b/arch/arm/src/lpc11xx/lpc11_irq.c index f912ed9018f..eaf2e8bda44 100644 --- a/arch/arm/src/lpc11xx/lpc11_irq.c +++ b/arch/arm/src/lpc11xx/lpc11_irq.c @@ -66,7 +66,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Functions @@ -213,7 +213,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/lpc17xx/lpc17_irq.c b/arch/arm/src/lpc17xx/lpc17_irq.c index 5f16c61c171..7449ab020c7 100644 --- a/arch/arm/src/lpc17xx/lpc17_irq.c +++ b/arch/arm/src/lpc17xx/lpc17_irq.c @@ -80,7 +80,7 @@ * context switching. Only value during interrupt handling. */ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /* This is the address of the exception vector table (determined by the * linker script). @@ -359,7 +359,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/lpc214x/lpc214x_decodeirq.c b/arch/arm/src/lpc214x/lpc214x_decodeirq.c index 08da50a32c6..382c0bba022 100644 --- a/arch/arm/src/lpc214x/lpc214x_decodeirq.c +++ b/arch/arm/src/lpc214x/lpc214x_decodeirq.c @@ -112,7 +112,7 @@ static void lpc214x_decodeirq(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS lowsyslog(LOG_ERR, "Unexpected IRQ\n"); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); #else @@ -147,22 +147,22 @@ static void lpc214x_decodeirq(uint32_t *regs) uint32_t *savestate; /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. */ - savestate = (uint32_t *)current_regs; - current_regs = regs; + savestate = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = regs; /* Deliver the IRQ */ irq_dispatch(irq, regs); - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of CURRENT_REGS. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - current_regs = savestate; + CURRENT_REGS = savestate; } #endif } diff --git a/arch/arm/src/lpc214x/lpc214x_irq.c b/arch/arm/src/lpc214x/lpc214x_irq.c index db4dec1c831..cd7945cbbd9 100644 --- a/arch/arm/src/lpc214x/lpc214x_irq.c +++ b/arch/arm/src/lpc214x/lpc214x_irq.c @@ -58,7 +58,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Data @@ -106,7 +106,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* And finally, enable interrupts */ diff --git a/arch/arm/src/lpc2378/lpc23xx_decodeirq.c b/arch/arm/src/lpc2378/lpc23xx_decodeirq.c index cff7b0994ac..aca536e6651 100644 --- a/arch/arm/src/lpc2378/lpc23xx_decodeirq.c +++ b/arch/arm/src/lpc2378/lpc23xx_decodeirq.c @@ -111,7 +111,7 @@ static void lpc23xx_decodeirq(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS lowsyslog(LOG_ERR, "Unexpected IRQ\n"); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); #else @@ -133,11 +133,11 @@ static void lpc23xx_decodeirq(uint32_t *regs) uint32_t *savestate; /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. */ - savestate = (uint32_t *)current_regs; - current_regs = regs; + savestate = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = regs; /* Acknowledge the interrupt */ @@ -147,12 +147,12 @@ static void lpc23xx_decodeirq(uint32_t *regs) irq_dispatch(irq, regs); - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of CURRENT_REGS. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - current_regs = savestate; + CURRENT_REGS = savestate; } #endif diff --git a/arch/arm/src/lpc2378/lpc23xx_irq.c b/arch/arm/src/lpc2378/lpc23xx_irq.c index bb904329198..d9763ad85fd 100644 --- a/arch/arm/src/lpc2378/lpc23xx_irq.c +++ b/arch/arm/src/lpc2378/lpc23xx_irq.c @@ -64,7 +64,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Data @@ -106,7 +106,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Enable global ARM interrupts */ diff --git a/arch/arm/src/lpc31xx/lpc31_decodeirq.c b/arch/arm/src/lpc31xx/lpc31_decodeirq.c index a2794b575d4..9cfcd3f4435 100644 --- a/arch/arm/src/lpc31xx/lpc31_decodeirq.c +++ b/arch/arm/src/lpc31xx/lpc31_decodeirq.c @@ -77,7 +77,7 @@ void up_decodeirq(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS lowsyslog(LOG_ERR, "Unexpected IRQ\n"); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); #else int index; @@ -106,13 +106,13 @@ void up_decodeirq(uint32_t *regs) up_ack_irq(irq); /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. * * Nested interrupts are not supported. */ - DEBUGASSERT(current_regs == NULL); - current_regs = regs; + DEBUGASSERT(CURRENT_REGS == NULL); + CURRENT_REGS = regs; /* Deliver the IRQ */ @@ -120,18 +120,18 @@ void up_decodeirq(uint32_t *regs) #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. + * CURRENT_REGS will have a different value than it did on entry. * If an interrupt level context switch has occurred, then restore * the floating point state and the establish the correct address * environment before returning from the interrupt. */ - if (regs != current_regs) + if (regs != CURRENT_REGS) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t *)current_regs); + up_restorefpu((uint32_t *)CURRENT_REGS); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -145,11 +145,11 @@ void up_decodeirq(uint32_t *regs) #endif } #endif - /* Set current_regs to NULL to indicate that we are no longer in an + /* Set CURRENT_REGS to NULL to indicate that we are no longer in an * interrupt handler. */ - current_regs = NULL; + CURRENT_REGS = NULL; } } #endif diff --git a/arch/arm/src/lpc31xx/lpc31_irq.c b/arch/arm/src/lpc31xx/lpc31_irq.c index ce57e8bd0fa..1a1b2379a68 100644 --- a/arch/arm/src/lpc31xx/lpc31_irq.c +++ b/arch/arm/src/lpc31xx/lpc31_irq.c @@ -63,7 +63,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Data @@ -119,7 +119,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* And finally, enable interrupts */ diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c index 752f1408143..e0719793f3d 100644 --- a/arch/arm/src/lpc43xx/lpc43_irq.c +++ b/arch/arm/src/lpc43xx/lpc43_irq.c @@ -81,7 +81,7 @@ * context switching. Only value during interrupt handling. */ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /* This is the address of the exception vector table (determined by the * linker script). @@ -362,7 +362,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/moxart/moxart_irq.c b/arch/arm/src/moxart/moxart_irq.c index cc571f0394a..a8aa826b3d8 100644 --- a/arch/arm/src/moxart/moxart_irq.c +++ b/arch/arm/src/moxart/moxart_irq.c @@ -68,7 +68,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Data @@ -127,7 +127,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Setup UART shared interrupt */ @@ -310,9 +310,9 @@ void up_decodeirq(uint32_t *regs) num = ffs(status) - 1; up_ack_irq(num); - DEBUGASSERT(current_regs == NULL); - current_regs = regs; + DEBUGASSERT(CURRENT_REGS == NULL); + CURRENT_REGS = regs; irq_dispatch(num, regs); - current_regs = NULL; + CURRENT_REGS = NULL; } diff --git a/arch/arm/src/nuc1xx/nuc_irq.c b/arch/arm/src/nuc1xx/nuc_irq.c index 48b08676d06..a90057adcfd 100644 --- a/arch/arm/src/nuc1xx/nuc_irq.c +++ b/arch/arm/src/nuc1xx/nuc_irq.c @@ -66,7 +66,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Data @@ -217,7 +217,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/sam34/sam_irq.c b/arch/arm/src/sam34/sam_irq.c index e9af84d1cda..69236c77dcb 100644 --- a/arch/arm/src/sam34/sam_irq.c +++ b/arch/arm/src/sam34/sam_irq.c @@ -82,7 +82,7 @@ * context switching. Only value during interrupt handling. */ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /* This is the address of the exception vector table (determined by the * linker script). @@ -423,7 +423,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/sama5/sam_irq.c b/arch/arm/src/sama5/sam_irq.c index 831fd8137c2..fdb48ea9355 100644 --- a/arch/arm/src/sama5/sam_irq.c +++ b/arch/arm/src/sama5/sam_irq.c @@ -78,7 +78,7 @@ typedef uint32_t *(*doirq_t)(int irq, uint32_t *regs); * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /* Symbols defined via the linker script */ @@ -553,7 +553,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; #ifndef CONFIG_SUPPRESS_INTERRUPTS /* Initialize logic to support a second level of interrupt decoding for diff --git a/arch/arm/src/samdl/sam_irq.c b/arch/arm/src/samdl/sam_irq.c index 4a34e999cc4..b7aafeed2b8 100644 --- a/arch/arm/src/samdl/sam_irq.c +++ b/arch/arm/src/samdl/sam_irq.c @@ -66,7 +66,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Data @@ -173,7 +173,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/samv7/sam_irq.c b/arch/arm/src/samv7/sam_irq.c index 4cb9f439a83..4c43927b21f 100644 --- a/arch/arm/src/samv7/sam_irq.c +++ b/arch/arm/src/samv7/sam_irq.c @@ -82,7 +82,7 @@ * context switching. Only value during interrupt handling. */ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /* This is the address of the exception vector table (determined by the * linker script). @@ -423,7 +423,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c index c61b516b146..dfcbbc62e49 100644 --- a/arch/arm/src/stm32/stm32_irq.c +++ b/arch/arm/src/stm32/stm32_irq.c @@ -79,7 +79,7 @@ * context switching. Only value during interrupt handling. */ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /* This is the address of the exception vector table (determined by the * linker script). @@ -365,7 +365,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c index 6a645beaed6..b6bf3a5603f 100644 --- a/arch/arm/src/stm32f7/stm32_irq.c +++ b/arch/arm/src/stm32f7/stm32_irq.c @@ -84,7 +84,7 @@ * context switching. Only value during interrupt handling. */ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /* This is the address of the exception vector table (determined by the * linker script). @@ -457,7 +457,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault diff --git a/arch/arm/src/str71x/str71x_decodeirq.c b/arch/arm/src/str71x/str71x_decodeirq.c index 9e28a1b4aee..c908ae9e3a1 100644 --- a/arch/arm/src/str71x/str71x_decodeirq.c +++ b/arch/arm/src/str71x/str71x_decodeirq.c @@ -92,7 +92,7 @@ void up_decodeirq(uint32_t *regs) #ifdef CONFIG_SUPPRESS_INTERRUPTS board_autoled_on(LED_INIRQ); lowsyslog(LOG_ERR, "Unexpected IRQ\n"); - current_regs = regs; + CURRENT_REGS = regs; PANIC(); #else unsigned int irq; @@ -111,11 +111,11 @@ void up_decodeirq(uint32_t *regs) uint32_t *savestate; /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * CURRENT_REGS is also used to manage interrupt level context switches. */ - savestate = (uint32_t *)current_regs; - current_regs = regs; + savestate = (uint32_t *)CURRENT_REGS; + CURRENT_REGS = regs; /* Acknowledge the interrupt */ @@ -125,12 +125,12 @@ void up_decodeirq(uint32_t *regs) irq_dispatch(irq, regs); - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of CURRENT_REGS. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - current_regs = savestate; + CURRENT_REGS = savestate; } #ifdef CONFIG_DEBUG else diff --git a/arch/arm/src/str71x/str71x_irq.c b/arch/arm/src/str71x/str71x_irq.c index 76b66921ccf..60dfe3f2274 100644 --- a/arch/arm/src/str71x/str71x_irq.c +++ b/arch/arm/src/str71x/str71x_irq.c @@ -56,7 +56,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Public Functions @@ -70,7 +70,7 @@ void up_irqinitialize(void) { /* Currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* The bulk of IRQ initialization if performed in str71x_head.S, so we * have very little to do here -- basically just enabling interrupts; diff --git a/arch/arm/src/tiva/tiva_irq.c b/arch/arm/src/tiva/tiva_irq.c index 9b0a711b9e7..c0e4133059d 100644 --- a/arch/arm/src/tiva/tiva_irq.c +++ b/arch/arm/src/tiva/tiva_irq.c @@ -81,7 +81,7 @@ * context switching. Only value during interrupt handling. */ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /* This is the address of the exception vector table (determined by the * linker script). @@ -430,7 +430,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; /* Initialize support for GPIO interrupts if included in this build */ diff --git a/arch/arm/src/tms570/tms570_esm.c b/arch/arm/src/tms570/tms570_esm.c index b7f17ab52b4..a3259e4050f 100644 --- a/arch/arm/src/tms570/tms570_esm.c +++ b/arch/arm/src/tms570/tms570_esm.c @@ -147,15 +147,15 @@ int tms570_esm_initialize(void) int tms570_esm_interrupt(int irq, void *context) { - /* Save the saved processor context in current_regs where it can be accessed + /* Save the saved processor context in CURRENT_REGS where it can be accessed * for register dumps and possibly context switching. */ - current_regs = (uint32_t *)context; + CURRENT_REGS = (uint32_t *)context; /* Crash -- possibly showing diagnostic debug information. */ - lldbg("ESM Interrupt. PC: %08x\n", current_regs[REG_PC]); + lldbg("ESM Interrupt. PC: %08x\n", CURRENT_REGS[REG_PC]); PANIC(); return OK; /* To keep the compiler happy */ } diff --git a/arch/arm/src/tms570/tms570_irq.c b/arch/arm/src/tms570/tms570_irq.c index 2b5adba9d9a..957407fd06c 100644 --- a/arch/arm/src/tms570/tms570_irq.c +++ b/arch/arm/src/tms570/tms570_irq.c @@ -64,7 +64,7 @@ * context switching. Only value during interrupt handling. */ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs[1]; /**************************************************************************** * Private Functions @@ -159,7 +159,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + CURRENT_REGS = NULL; #ifdef CONFIG_ARMV7R_HAVE_DECODEFIQ /* By default, interrupt CHAN0 is mapped to ESM (Error Signal Module) diff --git a/arch/avr/src/at32uc3/at32uc3_irq.c b/arch/avr/src/at32uc3/at32uc3_irq.c index 702bb2a49c6..6df9cdf4a6c 100644 --- a/arch/avr/src/at32uc3/at32uc3_irq.c +++ b/arch/avr/src/at32uc3/at32uc3_irq.c @@ -82,7 +82,7 @@ extern uint32_t avr32_int3; * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs; /**************************************************************************** * Private Types @@ -217,7 +217,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + g_current_regs = NULL; /* Attach the exception handlers */ diff --git a/arch/avr/src/avr/avr.h b/arch/avr/src/avr/avr.h index 9e54ab37b52..b1b37befe60 100644 --- a/arch/avr/src/avr/avr.h +++ b/arch/avr/src/avr/avr.h @@ -58,8 +58,8 @@ * state from the TCB. */ -#define up_savestate(regs) up_copystate(regs, (uint8_t*)current_regs) -#define up_restorestate(regs) (current_regs = regs) +#define up_savestate(regs) up_copystate(regs, (uint8_t*)g_current_regs) +#define up_restorestate(regs) (g_current_regs = regs) /**************************************************************************** * Public Types @@ -74,7 +74,7 @@ * structure. If is non-NULL only during interrupt processing. */ -extern volatile uint8_t *current_regs; +extern volatile uint8_t *g_current_regs; /* This is the beginning of heap as provided from up_head.S. This is the first * address in DRAM after the loaded program+bss+idle stack. The end of the diff --git a/arch/avr/src/avr/up_blocktask.c b/arch/avr/src/avr/up_blocktask.c index 88335769bd5..b03b967bada 100644 --- a/arch/avr/src/avr/up_blocktask.c +++ b/arch/avr/src/avr/up_blocktask.c @@ -115,10 +115,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/avr/src/avr/up_doirq.c b/arch/avr/src/avr/up_doirq.c index 88cbcce8700..1d8ce9c3d9d 100644 --- a/arch/avr/src/avr/up_doirq.c +++ b/arch/avr/src/avr/up_doirq.c @@ -80,37 +80,37 @@ uint8_t *up_doirq(uint8_t irq, uint8_t *regs) /* Nested interrupts are not supported in this implementation. If you want * to implement nested interrupts, you would have to (1) change the way that - * current_regs is handled and (2) the design associated with + * g_current_regs is handled and (2) the design associated with * CONFIG_ARCH_INTERRUPTSTACK. The savestate variable will not work for * that purpose as implemented here because only the outermost nested * interrupt can result in a context switch (it can probably be deleted). */ /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * g_current_regs is also used to manage interrupt level context switches. */ - savestate = (uint8_t *)current_regs; /* Cast removes volatile attribute */ - current_regs = regs; + savestate = (uint8_t *)g_current_regs; /* Cast removes volatile attribute */ + g_current_regs = regs; /* Deliver the IRQ */ irq_dispatch((int)irq, (uint32_t *)regs); /* If a context switch occurred while processing the interrupt then - * current_regs may have change value. If we return any value different + * g_current_regs may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ - regs = (uint8_t *)current_regs; /* Cast removes volatile attribute */ + regs = (uint8_t *)g_current_regs; /* Cast removes volatile attribute */ - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of g_current_regs. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - current_regs = savestate; + g_current_regs = savestate; #endif board_autoled_off(LED_INIRQ); return regs; diff --git a/arch/avr/src/avr/up_dumpstate.c b/arch/avr/src/avr/up_dumpstate.c index 8ea175bd85b..a82b682d353 100644 --- a/arch/avr/src/avr/up_dumpstate.c +++ b/arch/avr/src/avr/up_dumpstate.c @@ -113,46 +113,46 @@ static inline void up_registerdump(void) { /* Are user registers available from interrupt processing? */ - if (current_regs) + if (g_current_regs) { lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n", 0, - current_regs[REG_R0], current_regs[REG_R1], - current_regs[REG_R2], current_regs[REG_R3], - current_regs[REG_R4], current_regs[REG_R5], - current_regs[REG_R6], current_regs[REG_R7]); + g_current_regs[REG_R0], g_current_regs[REG_R1], + g_current_regs[REG_R2], g_current_regs[REG_R3], + g_current_regs[REG_R4], g_current_regs[REG_R5], + g_current_regs[REG_R6], g_current_regs[REG_R7]); lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n", 8, - current_regs[REG_R8], current_regs[REG_R9], - current_regs[REG_R10], current_regs[REG_R11], - current_regs[REG_R12], current_regs[REG_R13], - current_regs[REG_R14], current_regs[REG_R15]); + g_current_regs[REG_R8], g_current_regs[REG_R9], + g_current_regs[REG_R10], g_current_regs[REG_R11], + g_current_regs[REG_R12], g_current_regs[REG_R13], + g_current_regs[REG_R14], g_current_regs[REG_R15]); lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n", 16, - current_regs[REG_R16], current_regs[REG_R17], - current_regs[REG_R18], current_regs[REG_R19], - current_regs[REG_R20], current_regs[REG_R21], - current_regs[REG_R22], current_regs[REG_R23]); + g_current_regs[REG_R16], g_current_regs[REG_R17], + g_current_regs[REG_R18], g_current_regs[REG_R19], + g_current_regs[REG_R20], g_current_regs[REG_R21], + g_current_regs[REG_R22], g_current_regs[REG_R23]); lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n", 24, - current_regs[REG_R24], current_regs[REG_R25], - current_regs[REG_R26], current_regs[REG_R27], - current_regs[REG_R28], current_regs[REG_R29], - current_regs[REG_R30], current_regs[REG_R31]); + g_current_regs[REG_R24], g_current_regs[REG_R25], + g_current_regs[REG_R26], g_current_regs[REG_R27], + g_current_regs[REG_R28], g_current_regs[REG_R29], + g_current_regs[REG_R30], g_current_regs[REG_R31]); #if !defined(REG_PC2) lldbg("PC: %02x%02x SP: %02x%02x SREG: %02x\n", - current_regs[REG_PC0], current_regs[REG_PC1], - current_regs[REG_SPH], current_regs[REG_SPL], - current_regs[REG_SREG]); + g_current_regs[REG_PC0], g_current_regs[REG_PC1], + g_current_regs[REG_SPH], g_current_regs[REG_SPL], + g_current_regs[REG_SREG]); #else lldbg("PC: %02x%02x%02x SP: %02x%02x SREG: %02x\n", - current_regs[REG_PC0], current_regs[REG_PC1], - current_regs[REG_PC2], current_regs[REG_SPH], - current_regs[REG_SPL], current_regs[REG_SREG]); + g_current_regs[REG_PC0], g_current_regs[REG_PC1], + g_current_regs[REG_PC2], g_current_regs[REG_SPH], + g_current_regs[REG_SPL], g_current_regs[REG_SREG]); #endif } } @@ -221,9 +221,9 @@ void up_dumpstate(void) * pointer (and the above range check should have failed). */ - if (current_regs) + if (g_current_regs) { - sp = current_regs[REG_R13]; + sp = g_current_regs[REG_R13]; lldbg("sp: %04x\n", sp); } diff --git a/arch/avr/src/avr/up_irq.c b/arch/avr/src/avr/up_irq.c index b647db67545..34f95628049 100644 --- a/arch/avr/src/avr/up_irq.c +++ b/arch/avr/src/avr/up_irq.c @@ -55,7 +55,7 @@ * Public Data ****************************************************************************/ -volatile uint8_t *current_regs; +volatile uint8_t *g_current_regs; /**************************************************************************** * Public Functions @@ -69,7 +69,7 @@ void up_irqinitialize(void) { /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + g_current_regs = NULL; /* Initialize GPIO interrupt facilities */ diff --git a/arch/avr/src/avr/up_releasepending.c b/arch/avr/src/avr/up_releasepending.c index 7d1557bb056..80789fee51d 100644 --- a/arch/avr/src/avr/up_releasepending.c +++ b/arch/avr/src/avr/up_releasepending.c @@ -81,10 +81,10 @@ void up_release_pending(void) sched_suspend_scheduler(rtcb); - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/avr/src/avr/up_reprioritizertr.c b/arch/avr/src/avr/up_reprioritizertr.c index a9f62b48fc3..28978a19dab 100644 --- a/arch/avr/src/avr/up_reprioritizertr.c +++ b/arch/avr/src/avr/up_reprioritizertr.c @@ -137,10 +137,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/avr/src/avr/up_schedulesigaction.c b/arch/avr/src/avr/up_schedulesigaction.c index bdc576c989b..5c6cbf52eee 100644 --- a/arch/avr/src/avr/up_schedulesigaction.c +++ b/arch/avr/src/avr/up_schedulesigaction.c @@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * being delivered to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs); if (tcb == this_task()) { @@ -116,7 +116,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * a task is signalling itself for some reason. */ - if (!current_regs) + if (!g_current_regs) { /* In this case just deliver the signal now. */ @@ -132,7 +132,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * logic would fail in the strange case where we are in an * interrupt handler, the thread is signalling itself, but * a context switch to another task has occurred so that - * current_regs does not refer to the thread of this_task()! + * g_current_regs does not refer to the thread of this_task()! */ else @@ -143,25 +143,25 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc0 = current_regs[REG_PC0]; - tcb->xcp.saved_pc1 = current_regs[REG_PC1]; + tcb->xcp.saved_pc0 = g_current_regs[REG_PC0]; + tcb->xcp.saved_pc1 = g_current_regs[REG_PC1]; #if defined(REG_PC2) - tcb->xcp.saved_pc2 = current_regs[REG_PC2]; + tcb->xcp.saved_pc2 = g_current_regs[REG_PC2]; #endif - tcb->xcp.saved_sreg = current_regs[REG_SREG]; + tcb->xcp.saved_sreg = g_current_regs[REG_SREG]; /* Then set up to vector to the trampoline with interrupts * disabled */ #if !defined(REG_PC2) - current_regs[REG_PC0] = (uint16_t)up_sigdeliver >> 8; - current_regs[REG_PC1] = (uint16_t)up_sigdeliver & 0xff; + g_current_regs[REG_PC0] = (uint16_t)up_sigdeliver >> 8; + g_current_regs[REG_PC1] = (uint16_t)up_sigdeliver & 0xff; #else - current_regs[REG_PC0] = (uint32_t)up_sigdeliver >> 16; - current_regs[REG_PC1] = (uint32_t)up_sigdeliver >> 8; - current_regs[REG_PC2] = (uint32_t)up_sigdeliver & 0xff; + g_current_regs[REG_PC0] = (uint32_t)up_sigdeliver >> 16; + g_current_regs[REG_PC1] = (uint32_t)up_sigdeliver >> 8; + g_current_regs[REG_PC2] = (uint32_t)up_sigdeliver & 0xff; #endif - current_regs[REG_SREG] &= ~(1 << SREG_I); + g_current_regs[REG_SREG] &= ~(1 << SREG_I); /* And make sure that the saved context in the TCB * is the same as the interrupt return context. diff --git a/arch/avr/src/avr/up_unblocktask.c b/arch/avr/src/avr/up_unblocktask.c index a5302781b69..d70b65405cd 100644 --- a/arch/avr/src/avr/up_unblocktask.c +++ b/arch/avr/src/avr/up_unblocktask.c @@ -97,10 +97,10 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/avr/src/avr32/avr32.h b/arch/avr/src/avr32/avr32.h index 403113c2b3b..e24abd7fc9b 100644 --- a/arch/avr/src/avr32/avr32.h +++ b/arch/avr/src/avr32/avr32.h @@ -56,8 +56,8 @@ * state from the TCB. */ -#define up_savestate(regs) up_copystate(regs, (uint32_t*)current_regs) -#define up_restorestate(regs) (current_regs = regs) +#define up_savestate(regs) up_copystate(regs, (uint32_t*)g_current_regs) +#define up_restorestate(regs) (g_current_regs = regs) /**************************************************************************** * Public Types @@ -72,7 +72,7 @@ * structure. If is non-NULL only during interrupt processing. */ -extern volatile uint32_t *current_regs; +extern volatile uint32_t *g_current_regs; /* This is the beginning of heap as provided from up_head.S. This is the first * address in DRAM after the loaded program+bss+idle stack. The end of the diff --git a/arch/avr/src/avr32/up_blocktask.c b/arch/avr/src/avr32/up_blocktask.c index 4ad077e91c7..8449d82cbe0 100644 --- a/arch/avr/src/avr32/up_blocktask.c +++ b/arch/avr/src/avr32/up_blocktask.c @@ -116,10 +116,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/avr/src/avr32/up_doirq.c b/arch/avr/src/avr32/up_doirq.c index 14b4d6a7ae9..db84ded148c 100644 --- a/arch/avr/src/avr32/up_doirq.c +++ b/arch/avr/src/avr32/up_doirq.c @@ -79,13 +79,13 @@ uint32_t *up_doirq(int irq, uint32_t *regs) PANIC(); #else /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * g_current_regs is also used to manage interrupt level context switches. * * Nested interrupts are not supported. */ - DEBUGASSERT(current_regs == NULL); - current_regs = regs; + DEBUGASSERT(g_current_regs == NULL); + g_current_regs = regs; /* Deliver the IRQ */ @@ -93,18 +93,18 @@ uint32_t *up_doirq(int irq, uint32_t *regs) #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. + * g_current_regs will have a different value than it did on entry. * If an interrupt level context switch has occurred, then restore * the floating point state and the establish the correct address * environment before returning from the interrupt. */ - if (regs != current_regs) + if (regs != g_current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t *)current_regs); + up_restorefpu((uint32_t *)g_current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -120,18 +120,18 @@ uint32_t *up_doirq(int irq, uint32_t *regs) #endif /* If a context switch occurred while processing the interrupt then - * current_regs may have change value. If we return any value different + * g_current_regs may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ - regs = current_regs; + regs = g_current_regs; - /* Set current_regs to NULL to indicate that we are no longer in + /* Set g_current_regs to NULL to indicate that we are no longer in * an interrupt handler. */ - current_regs = NULL; + g_current_regs = NULL; #endif board_autoled_off(LED_INIRQ); return regs; diff --git a/arch/avr/src/avr32/up_dumpstate.c b/arch/avr/src/avr32/up_dumpstate.c index 6f0625efd15..31daafdedb7 100644 --- a/arch/avr/src/avr32/up_dumpstate.c +++ b/arch/avr/src/avr32/up_dumpstate.c @@ -107,23 +107,23 @@ static inline void up_registerdump(void) { /* Are user registers available from interrupt processing? */ - if (current_regs) + if (g_current_regs) { lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 0, - current_regs[REG_R0], current_regs[REG_R1], - current_regs[REG_R2], current_regs[REG_R3], - current_regs[REG_R4], current_regs[REG_R5], - current_regs[REG_R6], current_regs[REG_R7]); + g_current_regs[REG_R0], g_current_regs[REG_R1], + g_current_regs[REG_R2], g_current_regs[REG_R3], + g_current_regs[REG_R4], g_current_regs[REG_R5], + g_current_regs[REG_R6], g_current_regs[REG_R7]); lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 8, - current_regs[REG_R8], current_regs[REG_R9], - current_regs[REG_R10], current_regs[REG_R11], - current_regs[REG_R12], current_regs[REG_R13], - current_regs[REG_R14], current_regs[REG_R15]); + g_current_regs[REG_R8], g_current_regs[REG_R9], + g_current_regs[REG_R10], g_current_regs[REG_R11], + g_current_regs[REG_R12], g_current_regs[REG_R13], + g_current_regs[REG_R14], g_current_regs[REG_R15]); - lldbg("SR: %08x\n", current_regs[REG_SR]); + lldbg("SR: %08x\n", g_current_regs[REG_SR]); } } @@ -187,9 +187,9 @@ void up_dumpstate(void) * pointer (and the above range check should have failed). */ - if (current_regs) + if (g_current_regs) { - sp = current_regs[REG_R13]; + sp = g_current_regs[REG_R13]; lldbg("sp: %08x\n", sp); } diff --git a/arch/avr/src/avr32/up_exceptions.S b/arch/avr/src/avr32/up_exceptions.S index de485c74242..361be60df31 100755 --- a/arch/avr/src/avr32/up_exceptions.S +++ b/arch/avr/src/avr32/up_exceptions.S @@ -269,7 +269,7 @@ avr32_common: /* Disable interrupts in the current SR. This is necessary because the */ /* AVR32 permits nested interrupts (if they are of higher priority). */ /* We can support nested interrupts without some effort because: */ - /* - The global variable current_regs permits only one interrupt, */ + /* - The global variable g_current_regs permits only one interrupt, */ /* - If CONFIG_ARCH_INTERRUPTSTACK is defined, then there is a single */ /* interrupt stack, and */ /* - Probably other things. */ diff --git a/arch/avr/src/avr32/up_releasepending.c b/arch/avr/src/avr32/up_releasepending.c index b64cd8fef30..aaae06b59e4 100644 --- a/arch/avr/src/avr32/up_releasepending.c +++ b/arch/avr/src/avr32/up_releasepending.c @@ -84,10 +84,10 @@ void up_release_pending(void) /* Are we operating in interrupt context? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/avr/src/avr32/up_reprioritizertr.c b/arch/avr/src/avr32/up_reprioritizertr.c index 51ba4fdc06f..88732c2b06e 100644 --- a/arch/avr/src/avr32/up_reprioritizertr.c +++ b/arch/avr/src/avr32/up_reprioritizertr.c @@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/avr/src/avr32/up_schedulesigaction.c b/arch/avr/src/avr32/up_schedulesigaction.c index 5c1fd5161ee..838c1382c2d 100644 --- a/arch/avr/src/avr32/up_schedulesigaction.c +++ b/arch/avr/src/avr32/up_schedulesigaction.c @@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * being delivered to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs); if (tcb == this_task()) { @@ -116,7 +116,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * a task is signalling itself for some reason. */ - if (!current_regs) + if (!g_current_regs) { /* In this case just deliver the signal now. */ @@ -132,7 +132,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * logic would fail in the strange case where we are in an * interrupt handler, the thread is signalling itself, but * a context switch to another task has occurred so that - * current_regs does not refer to the thread of this_task()! + * g_current_regs does not refer to the thread of this_task()! */ else @@ -143,15 +143,15 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc = current_regs[REG_PC]; - tcb->xcp.saved_sr = current_regs[REG_SR]; + tcb->xcp.saved_pc = g_current_regs[REG_PC]; + tcb->xcp.saved_sr = g_current_regs[REG_SR]; /* Then set up to vector to the trampoline with interrupts * disabled */ - current_regs[REG_PC] = (uint32_t)up_sigdeliver; - current_regs[REG_SR] |= AVR32_SR_GM_MASK; + g_current_regs[REG_PC] = (uint32_t)up_sigdeliver; + g_current_regs[REG_SR] |= AVR32_SR_GM_MASK; /* And make sure that the saved context in the TCB * is the same as the interrupt return context. diff --git a/arch/avr/src/avr32/up_unblocktask.c b/arch/avr/src/avr32/up_unblocktask.c index 8777c06f5dd..d8181344fdd 100644 --- a/arch/avr/src/avr32/up_unblocktask.c +++ b/arch/avr/src/avr32/up_unblocktask.c @@ -98,10 +98,10 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/avr/src/common/up_assert.c b/arch/avr/src/common/up_assert.c index a98436b9253..8ea84f017bc 100644 --- a/arch/avr/src/common/up_assert.c +++ b/arch/avr/src/common/up_assert.c @@ -105,7 +105,7 @@ static void _up_assert(int errorcode) { /* Are we in an interrupt handler or the idle task? */ - if (current_regs || this_task()->pid == 0) + if (g_current_regs || this_task()->pid == 0) { (void)up_irq_save(); for (; ; ) diff --git a/arch/avr/src/common/up_initialize.c b/arch/avr/src/common/up_initialize.c index 6088ebd9c32..e188587dcaa 100644 --- a/arch/avr/src/common/up_initialize.c +++ b/arch/avr/src/common/up_initialize.c @@ -188,7 +188,7 @@ void up_initialize(void) { /* Initialize global variables */ - current_regs = NULL; + g_current_regs = NULL; /* Calibrate the timing loop */ diff --git a/arch/avr/src/common/up_interruptcontext.c b/arch/avr/src/common/up_interruptcontext.c index 1e07bc3999c..1607bc52a4c 100644 --- a/arch/avr/src/common/up_interruptcontext.c +++ b/arch/avr/src/common/up_interruptcontext.c @@ -66,5 +66,5 @@ bool up_interrupt_context(void) { - return current_regs != NULL; + return g_current_regs != NULL; } diff --git a/arch/hc/src/common/up_blocktask.c b/arch/hc/src/common/up_blocktask.c index 4d874d17612..f6308cb7290 100644 --- a/arch/hc/src/common/up_blocktask.c +++ b/arch/hc/src/common/up_blocktask.c @@ -116,10 +116,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/hc/src/common/up_doirq.c b/arch/hc/src/common/up_doirq.c index 99e7ba6a64c..c72964ea96f 100644 --- a/arch/hc/src/common/up_doirq.c +++ b/arch/hc/src/common/up_doirq.c @@ -79,13 +79,13 @@ uint8_t *up_doirq(int irq, uint8_t *regs) PANIC(); #else /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * g_current_regs is also used to manage interrupt level context switches. * * Nested interrupts are not supported */ - DEBUGASSERT(current_regs == NULL); - current_regs = regs; + DEBUGASSERT(g_current_regs == NULL); + g_current_regs = regs; /* Deliver the IRQ */ @@ -93,18 +93,18 @@ uint8_t *up_doirq(int irq, uint8_t *regs) #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. If an + * g_current_regs will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ - if (regs != current_regs) + if (regs != g_current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t*)current_regs); + up_restorefpu((uint32_t*)g_current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -120,18 +120,18 @@ uint8_t *up_doirq(int irq, uint8_t *regs) #endif /* If a context switch occurred while processing the interrupt then - * current_regs may have change value. If we return any value different + * g_current_regs may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ - regs = (uint8_t*)current_regs; + regs = (uint8_t*)g_current_regs; - /* Set current_regs to NULL to indicate that we are no longer in an + /* Set g_current_regs to NULL to indicate that we are no longer in an * interrupt handler. */ - current_regs = NULL; + g_current_regs = NULL; #endif board_autoled_off(LED_INIRQ); return regs; diff --git a/arch/hc/src/common/up_initialize.c b/arch/hc/src/common/up_initialize.c index f549747f8a5..872d902ef4d 100644 --- a/arch/hc/src/common/up_initialize.c +++ b/arch/hc/src/common/up_initialize.c @@ -116,7 +116,7 @@ void up_initialize(void) { /* Initialize global variables */ - current_regs = NULL; + g_current_regs = NULL; /* Calibrate the timing loop */ diff --git a/arch/hc/src/common/up_internal.h b/arch/hc/src/common/up_internal.h index 61c116c2d1b..a2d44341551 100644 --- a/arch/hc/src/common/up_internal.h +++ b/arch/hc/src/common/up_internal.h @@ -114,8 +114,8 @@ * a referenced is passed to get the state from the TCB. */ -#define up_savestate(regs) up_copystate(regs, (uint8_t*)current_regs) -#define up_restorestate(regs) (current_regs = regs) +#define up_savestate(regs) up_copystate(regs, (uint8_t*)g_current_regs) +#define up_restorestate(regs) (g_current_regs = regs) /**************************************************************************** * Public Types @@ -134,7 +134,7 @@ typedef void (*up_vector_t)(void); * structure. If is non-NULL only during interrupt processing. */ -extern volatile uint8_t *current_regs; +extern volatile uint8_t *g_current_regs; /* This is the beginning of heap as provided from processor-specific logic. * This is the first address in RAM after the loaded program+bss+idle stack. diff --git a/arch/hc/src/common/up_interruptcontext.c b/arch/hc/src/common/up_interruptcontext.c index 31628790bbb..62c4e1c37d9 100644 --- a/arch/hc/src/common/up_interruptcontext.c +++ b/arch/hc/src/common/up_interruptcontext.c @@ -67,5 +67,5 @@ bool up_interrupt_context(void) { - return current_regs != NULL; + return g_current_regs != NULL; } diff --git a/arch/hc/src/common/up_releasepending.c b/arch/hc/src/common/up_releasepending.c index 2d6c115e997..d9a209c3437 100644 --- a/arch/hc/src/common/up_releasepending.c +++ b/arch/hc/src/common/up_releasepending.c @@ -83,10 +83,10 @@ void up_release_pending(void) /* Are we operating in interrupt context? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/hc/src/common/up_reprioritizertr.c b/arch/hc/src/common/up_reprioritizertr.c index 261e1becd24..efdde667389 100644 --- a/arch/hc/src/common/up_reprioritizertr.c +++ b/arch/hc/src/common/up_reprioritizertr.c @@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/hc/src/common/up_unblocktask.c b/arch/hc/src/common/up_unblocktask.c index fd32a1e307a..c2ed818ac30 100644 --- a/arch/hc/src/common/up_unblocktask.c +++ b/arch/hc/src/common/up_unblocktask.c @@ -98,10 +98,10 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/hc/src/m9s12/m9s12_assert.c b/arch/hc/src/m9s12/m9s12_assert.c index 17903074038..1eab6eb4e34 100644 --- a/arch/hc/src/m9s12/m9s12_assert.c +++ b/arch/hc/src/m9s12/m9s12_assert.c @@ -127,31 +127,31 @@ static inline void up_registerdump(void) { /* Are user registers available from interrupt processing? */ - if (current_regs) + if (g_current_regs) { lldbg("A:%02x B:%02x X:%02x%02x Y:%02x%02x PC:%02x%02x CCR:%02x\n", - current_regs[REG_A], current_regs[REG_B], current_regs[REG_XH], - current_regs[REG_XL], current_regs[REG_YH], current_regs[REG_YL], - current_regs[REG_PCH], current_regs[REG_PCL], current_regs[REG_CCR]); + g_current_regs[REG_A], g_current_regs[REG_B], g_current_regs[REG_XH], + g_current_regs[REG_XL], g_current_regs[REG_YH], g_current_regs[REG_YL], + g_current_regs[REG_PCH], g_current_regs[REG_PCL], g_current_regs[REG_CCR]); lldbg("SP:%02x%02x FRAME:%02x%02x TMP:%02x%02x Z:%02x%02x XY:%02x\n", - current_regs[REG_SPH], current_regs[REG_SPL], - current_regs[REG_FRAMEH], current_regs[REG_FRAMEL], - current_regs[REG_TMPL], current_regs[REG_TMPH], current_regs[REG_ZL], - current_regs[REG_ZH], current_regs[REG_XY], current_regs[REG_XY+1]); + g_current_regs[REG_SPH], g_current_regs[REG_SPL], + g_current_regs[REG_FRAMEH], g_current_regs[REG_FRAMEL], + g_current_regs[REG_TMPL], g_current_regs[REG_TMPH], g_current_regs[REG_ZL], + g_current_regs[REG_ZH], g_current_regs[REG_XY], g_current_regs[REG_XY+1]); #if CONFIG_HCS12_MSOFTREGS > 2 # error "Need to save more registers" #elif CONFIG_HCS12_MSOFTREGS == 2 lldbg("SOFTREGS: %02x%02x :%02x%02x\n", - current_regs[REG_SOFTREG1], current_regs[REG_SOFTREG1+1], - current_regs[REG_SOFTREG2], current_regs[REG_SOFTREG2+1]); + g_current_regs[REG_SOFTREG1], g_current_regs[REG_SOFTREG1+1], + g_current_regs[REG_SOFTREG2], g_current_regs[REG_SOFTREG2+1]); #elif CONFIG_HCS12_MSOFTREGS == 1 - lldbg("SOFTREGS: %02x%02x\n", current_regs[REG_SOFTREG1], - current_regs[REG_SOFTREG1+1]); + lldbg("SOFTREGS: %02x%02x\n", g_current_regs[REG_SOFTREG1], + g_current_regs[REG_SOFTREG1+1]); #endif #ifndef CONFIG_HCS12_NONBANKED - lldbg("PPAGE: %02x\n", current_regs[REG_PPAGE],); + lldbg("PPAGE: %02x\n", g_current_regs[REG_PPAGE],); #endif } } @@ -293,7 +293,7 @@ static void _up_assert(int errorcode) { /* Are we in an interrupt handler or the idle task? */ - if (current_regs || (this_task())->pid == 0) + if (g_current_regs || (this_task())->pid == 0) { (void)up_irq_save(); for (;;) diff --git a/arch/hc/src/m9s12/m9s12_irq.c b/arch/hc/src/m9s12/m9s12_irq.c index dd193d5b2d6..a91c270f099 100644 --- a/arch/hc/src/m9s12/m9s12_irq.c +++ b/arch/hc/src/m9s12/m9s12_irq.c @@ -55,7 +55,7 @@ * Public Data ****************************************************************************/ -volatile uint8_t *current_regs; +volatile uint8_t *g_current_regs; /**************************************************************************** * Public Functions @@ -69,7 +69,7 @@ void up_irqinitialize(void) { /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + g_current_regs = NULL; /* Initialize logic to support a second level of interrupt decoding for * GPIO pins. diff --git a/arch/mips/src/common/up_initialize.c b/arch/mips/src/common/up_initialize.c index 5a60cee560a..6c9e6997873 100644 --- a/arch/mips/src/common/up_initialize.c +++ b/arch/mips/src/common/up_initialize.c @@ -118,7 +118,7 @@ void up_initialize(void) { /* Initialize global variables */ - current_regs = NULL; + g_current_regs = NULL; /* Calibrate the timing loop */ diff --git a/arch/mips/src/common/up_internal.h b/arch/mips/src/common/up_internal.h index ec61d759446..3b2ca4ccbc3 100644 --- a/arch/mips/src/common/up_internal.h +++ b/arch/mips/src/common/up_internal.h @@ -111,8 +111,8 @@ * only a referenced is passed to get the state from the TCB. */ -#define up_savestate(regs) up_copystate(regs, (uint32_t*)current_regs) -#define up_restorestate(regs) (current_regs = regs) +#define up_savestate(regs) up_copystate(regs, (uint32_t*)g_current_regs) +#define up_restorestate(regs) (g_current_regs = regs) /**************************************************************************** * Public Types @@ -131,7 +131,7 @@ typedef void (*up_vector_t)(void); * structure. If is non-NULL only during interrupt processing. */ -extern volatile uint32_t *current_regs; +extern volatile uint32_t *g_current_regs; /* This is the beginning of heap as provided from up_head.S. This is the * first address in DRAM after the loaded program+bss+idle stack. The end diff --git a/arch/mips/src/common/up_interruptcontext.c b/arch/mips/src/common/up_interruptcontext.c index 9eee52c3d67..837238ec30d 100644 --- a/arch/mips/src/common/up_interruptcontext.c +++ b/arch/mips/src/common/up_interruptcontext.c @@ -66,5 +66,5 @@ bool up_interrupt_context(void) { - return current_regs != NULL; + return g_current_regs != NULL; } diff --git a/arch/mips/src/mips32/up_assert.c b/arch/mips/src/mips32/up_assert.c index 86f01aad73e..8b4ae3e50ab 100644 --- a/arch/mips/src/mips32/up_assert.c +++ b/arch/mips/src/mips32/up_assert.c @@ -105,7 +105,7 @@ static void _up_assert(int errorcode) { /* Are we in an interrupt handler or the idle task? */ - if (current_regs || this_task()->pid == 0) + if (g_current_regs || this_task()->pid == 0) { (void)up_irq_save(); for (; ; ) diff --git a/arch/mips/src/mips32/up_blocktask.c b/arch/mips/src/mips32/up_blocktask.c index bbc55ff795c..1ad66ce9db6 100644 --- a/arch/mips/src/mips32/up_blocktask.c +++ b/arch/mips/src/mips32/up_blocktask.c @@ -117,10 +117,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/mips/src/mips32/up_doirq.c b/arch/mips/src/mips32/up_doirq.c index 5cb7fbdbb31..61599eb99e0 100644 --- a/arch/mips/src/mips32/up_doirq.c +++ b/arch/mips/src/mips32/up_doirq.c @@ -79,13 +79,13 @@ uint32_t *up_doirq(int irq, uint32_t *regs) PANIC(); #else /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * g_current_regs is also used to manage interrupt level context switches. * * Nested interrupts are not supported */ - DEBUGASSERT(current_regs == NULL); - current_regs = regs; + DEBUGASSERT(g_current_regs == NULL); + g_current_regs = regs; /* Disable further occurrences of this interrupt (until the interrupt sources * have been clear by the driver). @@ -99,18 +99,18 @@ uint32_t *up_doirq(int irq, uint32_t *regs) #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. If an + * g_current_regs will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ - if (regs != current_regs) + if (regs != g_current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t *)current_regs); + up_restorefpu((uint32_t *)g_current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -126,18 +126,18 @@ uint32_t *up_doirq(int irq, uint32_t *regs) #endif /* If a context switch occurred while processing the interrupt then - * current_regs may have change value. If we return any value different + * g_current_regs may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ - regs = (uint32_t *)current_regs; + regs = (uint32_t *)g_current_regs; - /* Set current_regs to NULL to indicate that we are no longer in an + /* Set g_current_regs to NULL to indicate that we are no longer in an * interrupt handler. */ - current_regs = NULL; + g_current_regs = NULL; /* Unmask the last interrupt (global interrupts are still disabled) */ diff --git a/arch/mips/src/mips32/up_dumpstate.c b/arch/mips/src/mips32/up_dumpstate.c index 5a059f8cec5..b56d7f2419b 100644 --- a/arch/mips/src/mips32/up_dumpstate.c +++ b/arch/mips/src/mips32/up_dumpstate.c @@ -115,31 +115,31 @@ static inline void up_registerdump(void) { /* Are user registers available from interrupt processing? */ - if (current_regs) + if (g_current_regs) { lldbg("MFLO:%08x MFHI:%08x EPC:%08x STATUS:%08x\n", - current_regs[REG_MFLO], current_regs[REG_MFHI], current_regs[REG_EPC], - current_regs[REG_STATUS]); + g_current_regs[REG_MFLO], g_current_regs[REG_MFHI], g_current_regs[REG_EPC], + g_current_regs[REG_STATUS]); lldbg("AT:%08x V0:%08x V1:%08x A0:%08x A1:%08x A2:%08x A3:%08x\n", - current_regs[REG_AT], current_regs[REG_V0], current_regs[REG_V1], - current_regs[REG_A0], current_regs[REG_A1], current_regs[REG_A2], - current_regs[REG_A3]); + g_current_regs[REG_AT], g_current_regs[REG_V0], g_current_regs[REG_V1], + g_current_regs[REG_A0], g_current_regs[REG_A1], g_current_regs[REG_A2], + g_current_regs[REG_A3]); lldbg("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x T7:%08x\n", - current_regs[REG_T0], current_regs[REG_T1], current_regs[REG_T2], - current_regs[REG_T3], current_regs[REG_T4], current_regs[REG_T5], - current_regs[REG_T6], current_regs[REG_T7]); + g_current_regs[REG_T0], g_current_regs[REG_T1], g_current_regs[REG_T2], + g_current_regs[REG_T3], g_current_regs[REG_T4], g_current_regs[REG_T5], + g_current_regs[REG_T6], g_current_regs[REG_T7]); lldbg("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n", - current_regs[REG_S0], current_regs[REG_S1], current_regs[REG_S2], - current_regs[REG_S3], current_regs[REG_S4], current_regs[REG_S5], - current_regs[REG_S6], current_regs[REG_S7]); + g_current_regs[REG_S0], g_current_regs[REG_S1], g_current_regs[REG_S2], + g_current_regs[REG_S3], g_current_regs[REG_S4], g_current_regs[REG_S5], + g_current_regs[REG_S6], g_current_regs[REG_S7]); #ifdef MIPS32_SAVE_GP lldbg("T8:%08x T9:%08x GP:%08x SP:%08x FP:%08x RA:%08x\n", - current_regs[REG_T8], current_regs[REG_T9], current_regs[REG_GP], - current_regs[REG_SP], current_regs[REG_FP], current_regs[REG_RA]); + g_current_regs[REG_T8], g_current_regs[REG_T9], g_current_regs[REG_GP], + g_current_regs[REG_SP], g_current_regs[REG_FP], g_current_regs[REG_RA]); #else lldbg("T8:%08x T9:%08x SP:%08x FP:%08x RA:%08x\n", - current_regs[REG_T8], current_regs[REG_T9], current_regs[REG_SP], - current_regs[REG_FP], current_regs[REG_RA]); + g_current_regs[REG_T8], g_current_regs[REG_T9], g_current_regs[REG_SP], + g_current_regs[REG_FP], g_current_regs[REG_RA]); #endif } } diff --git a/arch/mips/src/mips32/up_releasepending.c b/arch/mips/src/mips32/up_releasepending.c index 2a18a23a0e7..0d4522ba8d8 100644 --- a/arch/mips/src/mips32/up_releasepending.c +++ b/arch/mips/src/mips32/up_releasepending.c @@ -86,10 +86,10 @@ void up_release_pending(void) /* Are we operating in interrupt context? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/mips/src/mips32/up_reprioritizertr.c b/arch/mips/src/mips32/up_reprioritizertr.c index 0fb1951d649..3365f8862e2 100644 --- a/arch/mips/src/mips32/up_reprioritizertr.c +++ b/arch/mips/src/mips32/up_reprioritizertr.c @@ -140,10 +140,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/mips/src/mips32/up_schedulesigaction.c b/arch/mips/src/mips32/up_schedulesigaction.c index 1a3049ff3f8..1c8612ffd93 100644 --- a/arch/mips/src/mips32/up_schedulesigaction.c +++ b/arch/mips/src/mips32/up_schedulesigaction.c @@ -109,7 +109,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * being delivered to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs); if (tcb == this_task()) { @@ -117,7 +117,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * a task is signalling itself for some reason. */ - if (!current_regs) + if (!g_current_regs) { /* In this case just deliver the signal now. */ @@ -133,7 +133,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * logic would fail in the strange case where we are in an * interrupt handler, the thread is signalling itself, but * a context switch to another task has occurred so that - * current_regs does not refer to the thread of this_task()! + * g_current_regs does not refer to the thread of this_task()! */ else @@ -144,18 +144,18 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_epc = current_regs[REG_EPC]; - tcb->xcp.saved_status = current_regs[REG_STATUS]; + tcb->xcp.saved_epc = g_current_regs[REG_EPC]; + tcb->xcp.saved_status = g_current_regs[REG_STATUS]; /* Then set up to vector to the trampoline with interrupts * disabled */ - current_regs[REG_EPC] = (uint32_t)up_sigdeliver; - status = current_regs[REG_STATUS]; + g_current_regs[REG_EPC] = (uint32_t)up_sigdeliver; + status = g_current_regs[REG_STATUS]; status &= ~CP0_STATUS_IM_MASK; status |= CP0_STATUS_IM_SWINTS; - current_regs[REG_STATUS] = status; + g_current_regs[REG_STATUS] = status; /* And make sure that the saved context in the TCB * is the same as the interrupt return context. @@ -165,7 +165,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) svdbg("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n", tcb->xcp.saved_epc, tcb->xcp.saved_status, - current_regs[REG_EPC], current_regs[REG_STATUS]); + g_current_regs[REG_EPC], g_current_regs[REG_STATUS]); } } diff --git a/arch/mips/src/mips32/up_swint0.c b/arch/mips/src/mips32/up_swint0.c index 0981ac66e8e..1d335b17924 100644 --- a/arch/mips/src/mips32/up_swint0.c +++ b/arch/mips/src/mips32/up_swint0.c @@ -160,7 +160,7 @@ int up_swint0(int irq, FAR void *context) uint32_t *regs = (uint32_t *)context; uint32_t cause; - DEBUGASSERT(regs && regs == current_regs); + DEBUGASSERT(regs && regs == g_current_regs); /* Software interrupt 0 is invoked with REG_A0 (REG_R4) = system call * command and REG_A1-3 and REG_T0-2 (REG_R5-10) = variable number of @@ -185,16 +185,16 @@ int up_swint0(int irq, FAR void *context) * R4 = SYS_restore_context * R5 = restoreregs * - * In this case, we simply need to set current_regs to restore register - * area referenced in the saved R1. context == current_regs is the normal - * exception return. By setting current_regs = context[R1], we force + * In this case, we simply need to set g_current_regs to restore register + * area referenced in the saved R1. context == g_current_regs is the normal + * exception return. By setting g_current_regs = context[R1], we force * the return to the saved context referenced in R1. */ case SYS_restore_context: { DEBUGASSERT(regs[REG_A1] != 0); - current_regs = (uint32_t *)regs[REG_A1]; + g_current_regs = (uint32_t *)regs[REG_A1]; } break; @@ -210,7 +210,7 @@ int up_swint0(int irq, FAR void *context) * * In this case, we save the context registers to the save register * area reference by the saved contents of R5 and then set - * current_regs to to the save register area referenced by the saved + * g_current_regs to to the save register area referenced by the saved * contents of R6. */ @@ -218,7 +218,7 @@ int up_swint0(int irq, FAR void *context) { DEBUGASSERT(regs[REG_A1] != 0 && regs[REG_A2] != 0); up_copystate((uint32_t *)regs[REG_A1], regs); - current_regs = (uint32_t *)regs[REG_A2]; + g_current_regs = (uint32_t *)regs[REG_A2]; } break; @@ -248,7 +248,7 @@ int up_swint0(int irq, FAR void *context) * the original mode. */ - current_regs[REG_EPC] = rtcb->xcp.syscall[index].sysreturn; + g_current_regs[REG_EPC] = rtcb->xcp.syscall[index].sysreturn; #error "Missing logic -- need to restore the original mode" rtcb->xcp.nsyscalls = index; } @@ -268,7 +268,7 @@ int up_swint0(int irq, FAR void *context) /* Verify that the SYS call number is within range */ - DEBUGASSERT(current_regs[REG_A0] < SYS_maxsyscall); + DEBUGASSERT(g_current_regs[REG_A0] < SYS_maxsyscall); /* Make sure that we got here that there is a no saved syscall * return address. We cannot yet handle nested system calls. @@ -287,7 +287,7 @@ int up_swint0(int irq, FAR void *context) /* Offset R0 to account for the reserved values */ - current_regs[REG_R0] -= CONFIG_SYS_RESERVED; + g_current_regs[REG_R0] -= CONFIG_SYS_RESERVED; #else slldbg("ERROR: Bad SYS call: %d\n", regs[REG_A0]); #endif @@ -298,10 +298,10 @@ int up_swint0(int irq, FAR void *context) /* Report what happened. That might difficult in the case of a context switch */ #ifdef CONFIG_DEBUG_SYSCALL - if (regs != current_regs) + if (regs != g_current_regs) { swidbg("SWInt Return: Context switch!\n"); - up_registerdump((const uint32_t *)current_regs); + up_registerdump((const uint32_t *)g_current_regs); } else { diff --git a/arch/mips/src/mips32/up_unblocktask.c b/arch/mips/src/mips32/up_unblocktask.c index 1e59218d41a..9e72ef17a6a 100644 --- a/arch/mips/src/mips32/up_unblocktask.c +++ b/arch/mips/src/mips32/up_unblocktask.c @@ -100,10 +100,10 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/mips/src/pic32mx/pic32mx-decodeirq.c b/arch/mips/src/pic32mx/pic32mx-decodeirq.c index 911d9a7fc2c..a9fd338cf6a 100644 --- a/arch/mips/src/pic32mx/pic32mx-decodeirq.c +++ b/arch/mips/src/pic32mx/pic32mx-decodeirq.c @@ -99,17 +99,17 @@ uint32_t *pic32mx_decodeirq(uint32_t *regs) board_autoled_on(LED_INIRQ); - /* Save the current value of current_regs (to support nested interrupt - * handling). Then set current_regs to regs, indicating that this is + /* Save the current value of g_current_regs (to support nested interrupt + * handling). Then set g_current_regs to regs, indicating that this is * the interrupted context that is being processed now. */ #ifdef CONFIG_PIC32MX_NESTED_INTERRUPTS - savestate = (uint32_t *)current_regs; + savestate = (uint32_t *)g_current_regs; #else - DEBUGASSERT(current_regs == NULL); + DEBUGASSERT(g_current_regs == NULL); #endif - current_regs = regs; + g_current_regs = regs; /* Loop while there are pending interrupts with priority greater than zero */ @@ -141,27 +141,27 @@ uint32_t *pic32mx_decodeirq(uint32_t *regs) } /* If a context switch occurred while processing the interrupt then - * current_regs may have change value. If we return any value different + * g_current_regs may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ - regs = (uint32_t *)current_regs; + regs = (uint32_t *)g_current_regs; #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. If an + * g_current_regs will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ - if (regs != current_regs) + if (regs != g_current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t *)current_regs); + up_restorefpu((uint32_t *)g_current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -177,7 +177,7 @@ uint32_t *pic32mx_decodeirq(uint32_t *regs) #endif #ifdef CONFIG_PIC32MX_NESTED_INTERRUPTS - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of g_current_regs. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. * @@ -186,13 +186,13 @@ uint32_t *pic32mx_decodeirq(uint32_t *regs) * of fixing nested context switching. The logic here is insufficient. */ - current_regs = savestate; - if (current_regs == NULL) + g_current_regs = savestate; + if (g_current_regs == NULL) { board_autoled_off(LED_INIRQ); } #else - current_regs = NULL; + g_current_regs = NULL; board_autoled_off(LED_INIRQ); #endif diff --git a/arch/mips/src/pic32mx/pic32mx-exception.c b/arch/mips/src/pic32mx/pic32mx-exception.c index 5d6db95f9c6..b5a058f3a6f 100644 --- a/arch/mips/src/pic32mx/pic32mx-exception.c +++ b/arch/mips/src/pic32mx/pic32mx-exception.c @@ -193,7 +193,7 @@ uint32_t *pic32mx_exception(uint32_t *regs) /* Crash with currents_regs set so that we can dump the register contents. */ - current_regs = regs; + g_current_regs = regs; PANIC(); return regs; /* Won't get here */ } diff --git a/arch/mips/src/pic32mx/pic32mx-irq.c b/arch/mips/src/pic32mx/pic32mx-irq.c index ed066e3b80e..ded512f6e1d 100644 --- a/arch/mips/src/pic32mx/pic32mx-irq.c +++ b/arch/mips/src/pic32mx/pic32mx-irq.c @@ -69,7 +69,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs; /**************************************************************************** * Private Data @@ -160,7 +160,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + g_current_regs = NULL; /* And finally, enable interrupts */ diff --git a/arch/mips/src/pic32mz/pic32mz-decodeirq.c b/arch/mips/src/pic32mz/pic32mz-decodeirq.c index 632af96b462..14b980c3f56 100644 --- a/arch/mips/src/pic32mz/pic32mz-decodeirq.c +++ b/arch/mips/src/pic32mz/pic32mz-decodeirq.c @@ -99,17 +99,17 @@ uint32_t *pic32mz_decodeirq(uint32_t *regs) board_autoled_on(LED_INIRQ); - /* Save the current value of current_regs (to support nested interrupt - * handling). Then set current_regs to regs, indicating that this is + /* Save the current value of g_current_regs (to support nested interrupt + * handling). Then set g_current_regs to regs, indicating that this is * the interrupted context that is being processed now. */ #ifdef CONFIG_PIC32MZ_NESTED_INTERRUPTS - savestate = (uint32_t *)current_regs; + savestate = (uint32_t *)g_current_regs; #else - DEBUGASSERT(current_regs == NULL); + DEBUGASSERT(g_current_regs == NULL); #endif - current_regs = regs; + g_current_regs = regs; /* Loop while there are pending interrupts with priority greater than zero */ @@ -141,27 +141,27 @@ uint32_t *pic32mz_decodeirq(uint32_t *regs) } /* If a context switch occurred while processing the interrupt then - * current_regs may have change value. If we return any value different + * g_current_regs may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ - regs = (uint32_t *)current_regs; + regs = (uint32_t *)g_current_regs; #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. If an + * g_current_regs will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ - if (regs != current_regs) + if (regs != g_current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t *)current_regs); + up_restorefpu((uint32_t *)g_current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -177,7 +177,7 @@ uint32_t *pic32mz_decodeirq(uint32_t *regs) #endif #ifdef CONFIG_PIC32MZ_NESTED_INTERRUPTS - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of g_current_regs. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. * @@ -186,13 +186,13 @@ uint32_t *pic32mz_decodeirq(uint32_t *regs) * of fixing nested context switching. The logic here is insufficient. */ - current_regs = savestate; - if (current_regs == NULL) + g_current_regs = savestate; + if (g_current_regs == NULL) { board_autoled_off(LED_INIRQ); } #else - current_regs = NULL; + g_current_regs = NULL; board_autoled_off(LED_INIRQ); #endif diff --git a/arch/mips/src/pic32mz/pic32mz-exception.c b/arch/mips/src/pic32mz/pic32mz-exception.c index 3b6b3bb3f46..ec23ff8c3b5 100644 --- a/arch/mips/src/pic32mz/pic32mz-exception.c +++ b/arch/mips/src/pic32mz/pic32mz-exception.c @@ -193,7 +193,7 @@ uint32_t *pic32mz_exception(uint32_t *regs) /* Crash with currents_regs set so that we can dump the register contents. */ - current_regs = regs; + g_current_regs = regs; PANIC(); return regs; /* Won't get here */ } diff --git a/arch/mips/src/pic32mz/pic32mz-irq.c b/arch/mips/src/pic32mz/pic32mz-irq.c index 31d48ae8b34..4bb185939ec 100644 --- a/arch/mips/src/pic32mz/pic32mz-irq.c +++ b/arch/mips/src/pic32mz/pic32mz-irq.c @@ -73,7 +73,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs; /**************************************************************************** * Private Data @@ -241,7 +241,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + g_current_regs = NULL; /* And finally, enable interrupts */ diff --git a/arch/rgmp/src/rgmp.c b/arch/rgmp/src/rgmp.c index 5daad129b30..40bbed971e0 100644 --- a/arch/rgmp/src/rgmp.c +++ b/arch/rgmp/src/rgmp.c @@ -109,7 +109,7 @@ void rtos_exit_interrupt(void) if (rtcb->xcp.sigdeliver) { - rtcb->xcp.ctx.tf = current_regs; + rtcb->xcp.ctx.tf = g_current_regs; push_xcptcontext(&rtcb->xcp); } @@ -119,7 +119,7 @@ void rtos_exit_interrupt(void) if (rtcb != ntcb) { - rtcb->xcp.ctx.tf = current_regs; + rtcb->xcp.ctx.tf = g_current_regs; current_task = ntcb; rgmp_switch_to(&ntcb->xcp.ctx); } diff --git a/arch/sh/src/common/up_assert.c b/arch/sh/src/common/up_assert.c index eb3a3a4142b..c8303f29958 100644 --- a/arch/sh/src/common/up_assert.c +++ b/arch/sh/src/common/up_assert.c @@ -93,7 +93,7 @@ static void _up_assert(int errorcode) { /* Are we in an interrupt handler or the idle task? */ - if (current_regs || this_task()->pid == 0) + if (g_current_regs || this_task()->pid == 0) { (void)up_irq_save(); for (;;) diff --git a/arch/sh/src/common/up_blocktask.c b/arch/sh/src/common/up_blocktask.c index 3ba48846d55..75ecdef5077 100644 --- a/arch/sh/src/common/up_blocktask.c +++ b/arch/sh/src/common/up_blocktask.c @@ -115,13 +115,13 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ - up_copystate(rtcb->xcp.regs, current_regs); + up_copystate(rtcb->xcp.regs, g_current_regs); /* Restore the exception context of the rtcb at the (new) head * of the ready-to-run task list. @@ -137,7 +137,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) * changes will be made when the interrupt returns. */ - current_regs = rtcb->xcp.regs; + g_current_regs = rtcb->xcp.regs; } /* Copy the user C context into the TCB at the (old) head of the diff --git a/arch/sh/src/common/up_doirq.c b/arch/sh/src/common/up_doirq.c index dd0edc42db6..a2996c9f482 100644 --- a/arch/sh/src/common/up_doirq.c +++ b/arch/sh/src/common/up_doirq.c @@ -80,14 +80,14 @@ uint32_t *up_doirq(int irq, uint32_t* regs) if ((unsigned)irq < NR_IRQS) { /* Current regs non-zero indicates that we are processing - * an interrupt; current_regs is also used to manage + * an interrupt; g_current_regs is also used to manage * interrupt level context switches. * * Nested interrupts are not supported. */ - DEBUGASSERT(current_regs == NULL); - current_regs = regs; + DEBUGASSERT(g_current_regs == NULL); + g_current_regs = regs; /* Deliver the IRQ */ @@ -95,18 +95,18 @@ uint32_t *up_doirq(int irq, uint32_t* regs) #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. If an + * g_current_regs will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ - if (regs != current_regs) + if (regs != g_current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t*)current_regs); + up_restorefpu((uint32_t*)g_current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -124,13 +124,13 @@ uint32_t *up_doirq(int irq, uint32_t* regs) * of a context switch performed during interrupt processing. */ - regs = current_regs; + regs = g_current_regs; - /* Set current_regs to NULL to indicate that we are no longer in an + /* Set g_current_regs to NULL to indicate that we are no longer in an * interrupt handler. */ - current_regs = NULL; + g_current_regs = NULL; } board_autoled_off(LED_INIRQ); diff --git a/arch/sh/src/common/up_initialize.c b/arch/sh/src/common/up_initialize.c index 1239cd5805a..d8a00546c79 100644 --- a/arch/sh/src/common/up_initialize.c +++ b/arch/sh/src/common/up_initialize.c @@ -120,7 +120,7 @@ void up_initialize(void) { /* Initialize global variables */ - current_regs = NULL; + g_current_regs = NULL; /* Calibrate the timing loop */ diff --git a/arch/sh/src/common/up_internal.h b/arch/sh/src/common/up_internal.h index 37c187efb22..724efbca93f 100644 --- a/arch/sh/src/common/up_internal.h +++ b/arch/sh/src/common/up_internal.h @@ -132,7 +132,7 @@ typedef void (*up_vector_t)(void); * interrupt processing. */ -extern volatile uint32_t *current_regs; +extern volatile uint32_t *g_current_regs; /* This is the beginning of heap as provided from up_head.S. * This is the first address in DRAM after the loaded diff --git a/arch/sh/src/common/up_interruptcontext.c b/arch/sh/src/common/up_interruptcontext.c index 21bbedae54c..56e4f9478ea 100644 --- a/arch/sh/src/common/up_interruptcontext.c +++ b/arch/sh/src/common/up_interruptcontext.c @@ -66,5 +66,5 @@ bool up_interrupt_context(void) { - return current_regs != NULL; + return g_current_regs != NULL; } diff --git a/arch/sh/src/common/up_releasepending.c b/arch/sh/src/common/up_releasepending.c index d080e89dfbd..b91503cbe6a 100644 --- a/arch/sh/src/common/up_releasepending.c +++ b/arch/sh/src/common/up_releasepending.c @@ -84,13 +84,13 @@ void up_release_pending(void) /* Are we operating in interrupt context? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ - up_copystate(rtcb->xcp.regs, current_regs); + up_copystate(rtcb->xcp.regs, g_current_regs); /* Restore the exception context of the rtcb at the (new) head * of the ready-to-run task list. @@ -106,7 +106,7 @@ void up_release_pending(void) * changes will be made when the interrupt returns. */ - current_regs = rtcb->xcp.regs; + g_current_regs = rtcb->xcp.regs; } /* Copy the exception context into the TCB of the task that diff --git a/arch/sh/src/common/up_reprioritizertr.c b/arch/sh/src/common/up_reprioritizertr.c index 9986a0cd5d5..e838cff0bba 100644 --- a/arch/sh/src/common/up_reprioritizertr.c +++ b/arch/sh/src/common/up_reprioritizertr.c @@ -138,13 +138,13 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ - up_copystate(rtcb->xcp.regs, current_regs); + up_copystate(rtcb->xcp.regs, g_current_regs); /* Restore the exception context of the rtcb at the (new) head * of the ready-to-run task list. @@ -160,7 +160,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) * changes will be made when the interrupt returns. */ - current_regs = rtcb->xcp.regs; + g_current_regs = rtcb->xcp.regs; } /* Copy the exception context into the TCB at the (old) head of the diff --git a/arch/sh/src/common/up_unblocktask.c b/arch/sh/src/common/up_unblocktask.c index 182cdcdd468..d506d97d094 100644 --- a/arch/sh/src/common/up_unblocktask.c +++ b/arch/sh/src/common/up_unblocktask.c @@ -98,13 +98,13 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ - up_copystate(rtcb->xcp.regs, current_regs); + up_copystate(rtcb->xcp.regs, g_current_regs); /* Restore the exception context of the rtcb at the (new) head * of the ready-to-run task list. @@ -120,7 +120,7 @@ void up_unblock_task(struct tcb_s *tcb) * changes will be made when the interrupt returns. */ - current_regs = rtcb->xcp.regs; + g_current_regs = rtcb->xcp.regs; } /* We are not in an interrupt handler. Copy the user C context diff --git a/arch/sh/src/m16c/m16c_dumpstate.c b/arch/sh/src/m16c/m16c_dumpstate.c index 32ccfb487a7..e80fbcb9f57 100644 --- a/arch/sh/src/m16c/m16c_dumpstate.c +++ b/arch/sh/src/m16c/m16c_dumpstate.c @@ -96,7 +96,7 @@ static inline uint16_t m16c_getsp(void) #if CONFIG_ARCH_INTERRUPTSTACK > 3 static inline uint16_t m16c_getusersp(void) { - uint8_t *ptr = (uint8_t*) current_regs; + uint8_t *ptr = (uint8_t*) g_current_regs; return (uint16_t)ptr[REG_SP] << 8 | ptr[REG_SP+1]; } #endif @@ -123,7 +123,7 @@ static void m16c_stackdump(uint16_t sp, uint16_t stack_base) static inline void m16c_registerdump(void) { - uint8_t *ptr = (uint8_t*) current_regs; + uint8_t *ptr = (uint8_t*) g_current_regs; /* Are user registers available from interrupt processing? */ diff --git a/arch/sh/src/m16c/m16c_irq.c b/arch/sh/src/m16c/m16c_irq.c index e07090ed4d9..2951033206e 100644 --- a/arch/sh/src/m16c/m16c_irq.c +++ b/arch/sh/src/m16c/m16c_irq.c @@ -53,7 +53,7 @@ * structure. If is non-NULL only during interrupt processing. */ -volatile uint32_t *current_regs; /* Actually a pointer to the beginning of a uint8_t array */ +volatile uint32_t *g_current_regs; /* Actually a pointer to the beginning of a uint8_t array */ /**************************************************************************** * Name: up_irqinitialize @@ -61,7 +61,7 @@ volatile uint32_t *current_regs; /* Actually a pointer to the beginning of a uin void up_irqinitialize(void) { - current_regs = NULL; + g_current_regs = NULL; /* And finally, enable interrupts */ diff --git a/arch/sh/src/m16c/m16c_schedulesigaction.c b/arch/sh/src/m16c/m16c_schedulesigaction.c index 2c89680cd2d..682d3299875 100644 --- a/arch/sh/src/m16c/m16c_schedulesigaction.c +++ b/arch/sh/src/m16c/m16c_schedulesigaction.c @@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * being delivered to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs); if (tcb == this_task()) { @@ -115,7 +115,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * a task is signalling itself for some reason. */ - if (!current_regs) + if (!g_current_regs) { /* In this case just deliver the signal now. */ @@ -136,23 +136,23 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc[0] = current_regs[REG_PC]; - tcb->xcp.saved_pc[1] = current_regs[REG_PC+1]; - tcb->xcp.saved_flg = current_regs[REG_FLG]; + tcb->xcp.saved_pc[0] = g_current_regs[REG_PC]; + tcb->xcp.saved_pc[1] = g_current_regs[REG_PC+1]; + tcb->xcp.saved_flg = g_current_regs[REG_FLG]; /* Then set up to vector to the trampoline with interrupts * disabled */ - current_regs[REG_PC] = (uint32_t)up_sigdeliver >> 8; - current_regs[REG_PC+1] = (uint32_t)up_sigdeliver; - current_regs[REG_FLG] &= ~M16C_FLG_I; + g_current_regs[REG_PC] = (uint32_t)up_sigdeliver >> 8; + g_current_regs[REG_PC+1] = (uint32_t)up_sigdeliver; + g_current_regs[REG_FLG] &= ~M16C_FLG_I; /* And make sure that the saved context in the TCB * is the same as the interrupt return context. */ - up_copystate(tcb->xcp.regs, current_regs); + up_copystate(tcb->xcp.regs, g_current_regs); } } diff --git a/arch/sh/src/sh1/sh1_dumpstate.c b/arch/sh/src/sh1/sh1_dumpstate.c index 7ae89fda24f..ad165c4d2c8 100644 --- a/arch/sh/src/sh1/sh1_dumpstate.c +++ b/arch/sh/src/sh1/sh1_dumpstate.c @@ -111,7 +111,7 @@ static void sh1_stackdump(uint32_t sp, uint32_t stack_base) static inline void sh1_registerdump(void) { - uint32_t *ptr = (uint32_t*)current_regs; + uint32_t *ptr = (uint32_t*)g_current_regs; /* Are user registers available from interrupt processing? */ diff --git a/arch/sh/src/sh1/sh1_irq.c b/arch/sh/src/sh1/sh1_irq.c index 036ecaec245..58514a25744 100644 --- a/arch/sh/src/sh1/sh1_irq.c +++ b/arch/sh/src/sh1/sh1_irq.c @@ -53,7 +53,7 @@ * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs; /**************************************************************************** * Public Funtions @@ -67,7 +67,7 @@ void up_irqinitialize(void) { /* Currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + g_current_regs = NULL; /* Enable interrupts */ diff --git a/arch/sh/src/sh1/sh1_schedulesigaction.c b/arch/sh/src/sh1/sh1_schedulesigaction.c index b78b4e8007c..4c6e7c16595 100644 --- a/arch/sh/src/sh1/sh1_schedulesigaction.c +++ b/arch/sh/src/sh1/sh1_schedulesigaction.c @@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * being delivered to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs); if (tcb == this_task()) { @@ -115,7 +115,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * a task is signalling itself for some reason. */ - if (!current_regs) + if (!g_current_regs) { /* In this case just deliver the signal now. */ @@ -136,21 +136,21 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc = current_regs[REG_PC]; - tcb->xcp.saved_sr = current_regs[REG_SR]; + tcb->xcp.saved_pc = g_current_regs[REG_PC]; + tcb->xcp.saved_sr = g_current_regs[REG_SR]; /* Then set up to vector to the trampoline with interrupts * disabled */ - current_regs[REG_PC] = (uint32_t)up_sigdeliver; - current_regs[REG_SR] |= 0x000000f0; + g_current_regs[REG_PC] = (uint32_t)up_sigdeliver; + g_current_regs[REG_SR] |= 0x000000f0; /* And make sure that the saved context in the TCB * is the same as the interrupt return context. */ - up_copystate(tcb->xcp.regs, current_regs); + up_copystate(tcb->xcp.regs, g_current_regs); } } diff --git a/arch/x86/src/common/up_assert.c b/arch/x86/src/common/up_assert.c index 669a7087d3f..32eb751c56d 100644 --- a/arch/x86/src/common/up_assert.c +++ b/arch/x86/src/common/up_assert.c @@ -227,9 +227,9 @@ static void up_dumpstate(void) /* Then dump the registers (if available) */ - if (current_regs != NULL) + if (g_current_regs != NULL) { - up_registerdump((uint32_t*)current_regs); + up_registerdump((uint32_t*)g_current_regs); } #ifdef CONFIG_ARCH_USBDUMP @@ -251,7 +251,7 @@ static void _up_assert(int errorcode) { /* Are we in an interrupt handler or the idle task? */ - if (current_regs || (this_task())->pid == 0) + if (g_current_regs || (this_task())->pid == 0) { (void)up_irq_save(); for (;;) diff --git a/arch/x86/src/common/up_blocktask.c b/arch/x86/src/common/up_blocktask.c index 86163650c68..e5a4845e244 100644 --- a/arch/x86/src/common/up_blocktask.c +++ b/arch/x86/src/common/up_blocktask.c @@ -115,10 +115,10 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/x86/src/common/up_initialize.c b/arch/x86/src/common/up_initialize.c index 43bc71a2c19..e464973c4d8 100644 --- a/arch/x86/src/common/up_initialize.c +++ b/arch/x86/src/common/up_initialize.c @@ -118,7 +118,7 @@ void up_initialize(void) { /* Initialize global variables */ - current_regs = NULL; + g_current_regs = NULL; /* Calibrate the timing loop */ diff --git a/arch/x86/src/common/up_internal.h b/arch/x86/src/common/up_internal.h index 253bb3e1ed1..db35e68035a 100644 --- a/arch/x86/src/common/up_internal.h +++ b/arch/x86/src/common/up_internal.h @@ -114,7 +114,7 @@ * referenced is passed to get the state from the TCB. */ -#define up_restorestate(regs) (current_regs = regs) +#define up_restorestate(regs) (g_current_regs = regs) /**************************************************************************** * Public Types @@ -133,7 +133,7 @@ typedef void (*up_vector_t)(void); * structure. If is non-NULL only during interrupt processing. */ -extern volatile uint32_t *current_regs; +extern volatile uint32_t *g_current_regs; /* This is the beginning of heap as provided from up_head.S. This is the first * address in DRAM after the loaded program+bss+idle stack. The end of the diff --git a/arch/x86/src/common/up_interruptcontext.c b/arch/x86/src/common/up_interruptcontext.c index a1e762edfe9..7c636e197f4 100644 --- a/arch/x86/src/common/up_interruptcontext.c +++ b/arch/x86/src/common/up_interruptcontext.c @@ -68,5 +68,5 @@ bool up_interrupt_context(void) { - return current_regs != NULL; + return g_current_regs != NULL; } diff --git a/arch/x86/src/common/up_releasepending.c b/arch/x86/src/common/up_releasepending.c index aa824c0fc93..76137604bb4 100644 --- a/arch/x86/src/common/up_releasepending.c +++ b/arch/x86/src/common/up_releasepending.c @@ -84,10 +84,10 @@ void up_release_pending(void) /* Are we operating in interrupt context? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/x86/src/common/up_reprioritizertr.c b/arch/x86/src/common/up_reprioritizertr.c index 652254a9806..398199261de 100644 --- a/arch/x86/src/common/up_reprioritizertr.c +++ b/arch/x86/src/common/up_reprioritizertr.c @@ -138,10 +138,10 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/x86/src/common/up_unblocktask.c b/arch/x86/src/common/up_unblocktask.c index 1effafdd0e3..706d36808c8 100644 --- a/arch/x86/src/common/up_unblocktask.c +++ b/arch/x86/src/common/up_unblocktask.c @@ -97,10 +97,10 @@ void up_unblock_task(struct tcb_s *tcb) /* Are we in an interrupt handler? */ - if (current_regs) + if (g_current_regs) { /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. + * Just copy the g_current_regs into the OLD rtcb. */ up_savestate(rtcb->xcp.regs); diff --git a/arch/x86/src/i486/up_irq.c b/arch/x86/src/i486/up_irq.c index 430876606ef..b216a24a719 100644 --- a/arch/x86/src/i486/up_irq.c +++ b/arch/x86/src/i486/up_irq.c @@ -68,7 +68,7 @@ static inline void up_idtinit(void); * Public Data ****************************************************************************/ -volatile uint32_t *current_regs; +volatile uint32_t *g_current_regs; /**************************************************************************** * Private Data @@ -263,7 +263,7 @@ void up_irqinitialize(void) { /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + g_current_regs = NULL; /* Initialize the IDT */ diff --git a/arch/x86/src/i486/up_savestate.c b/arch/x86/src/i486/up_savestate.c index e8d1c6d612b..d3c21709ee7 100644 --- a/arch/x86/src/i486/up_savestate.c +++ b/arch/x86/src/i486/up_savestate.c @@ -80,7 +80,7 @@ void up_savestate(uint32_t *regs) /* First, just copy all of the registers */ - up_copystate(regs, (uint32_t*)current_regs); + up_copystate(regs, (uint32_t*)g_current_regs); /* The RES_SP and REG_SS values will not be saved by the interrupt handling * logic if there is no change in privilege level. In that case, we will @@ -103,11 +103,11 @@ void up_savestate(uint32_t *regs) * the execution of the PUSHA. It will point at REG_IRQNO. */ - regs[REG_SP] = current_regs[REG_ESP] + 4*BOTTOM_NOPRIO; + regs[REG_SP] = g_current_regs[REG_ESP] + 4*BOTTOM_NOPRIO; regs[REG_SS] = up_getss(); } else { - DEBUGASSERT(regs[REG_SP] == current_regs[REG_ESP] + 4*BOTTOM_PRIO); + DEBUGASSERT(regs[REG_SP] == g_current_regs[REG_ESP] + 4*BOTTOM_PRIO); } } diff --git a/arch/x86/src/i486/up_schedulesigaction.c b/arch/x86/src/i486/up_schedulesigaction.c index 4fcd7bbfbc2..60604e8827f 100644 --- a/arch/x86/src/i486/up_schedulesigaction.c +++ b/arch/x86/src/i486/up_schedulesigaction.c @@ -115,7 +115,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * to the currently executing task. */ - sdbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs); if (tcb == this_task()) { @@ -123,7 +123,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * signalling itself for some reason. */ - if (!current_regs) + if (!g_current_regs) { /* In this case just deliver the signal now. */ @@ -137,7 +137,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * Hmmm... there looks like a latent bug here: The following logic * would fail in the strange case where we are in an interrupt * handler, the thread is signalling itself, but a context switch to - * another task has occurred so that current_regs does not refer to + * another task has occurred so that g_current_regs does not refer to * the thread of this_task()! */ @@ -149,15 +149,15 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_eip = current_regs[REG_EIP]; - tcb->xcp.saved_eflags = current_regs[REG_EFLAGS]; + tcb->xcp.saved_eip = g_current_regs[REG_EIP]; + tcb->xcp.saved_eflags = g_current_regs[REG_EFLAGS]; /* Then set up to vector to the trampoline with interrupts * disabled */ - current_regs[REG_EIP] = (uint32_t)up_sigdeliver; - current_regs[REG_EFLAGS] = 0; + g_current_regs[REG_EIP] = (uint32_t)up_sigdeliver; + g_current_regs[REG_EFLAGS] = 0; /* And make sure that the saved context in the TCB * is the same as the interrupt return context. diff --git a/arch/x86/src/qemu/qemu_handlers.c b/arch/x86/src/qemu/qemu_handlers.c index 0a22d7346f1..0f84efb3135 100644 --- a/arch/x86/src/qemu/qemu_handlers.c +++ b/arch/x86/src/qemu/qemu_handlers.c @@ -91,13 +91,13 @@ static uint32_t *common_handler(int irq, uint32_t *regs) board_autoled_on(LED_INIRQ); /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. + * g_current_regs is also used to manage interrupt level context switches. * * Nested interrupts are not supported. */ - DEBUGASSERT(current_regs == NULL); - current_regs = regs; + DEBUGASSERT(g_current_regs == NULL); + g_current_regs = regs; /* Deliver the IRQ */ @@ -105,18 +105,18 @@ static uint32_t *common_handler(int irq, uint32_t *regs) #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. If an + * g_current_regs will have a different value than it did on entry. If an * interrupt level context switch has occurred, then restore the floating * point state and the establish the correct address environment before * returning from the interrupt. */ - if (regs != current_regs) + if (regs != g_current_regs) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t*)current_regs); + up_restorefpu((uint32_t*)g_current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -132,18 +132,18 @@ static uint32_t *common_handler(int irq, uint32_t *regs) #endif /* If a context switch occurred while processing the interrupt then - * current_regs may have change value. If we return any value different + * g_current_regs may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ - regs = (uint32_t*)current_regs; + regs = (uint32_t*)g_current_regs; - /* Set current_regs to NULL to indicate that we are no longer in an + /* Set g_current_regs to NULL to indicate that we are no longer in an * interrupt handler. */ - current_regs = NULL; + g_current_regs = NULL; return regs; } #endif diff --git a/arch/z16/src/common/up_doirq.c b/arch/z16/src/common/up_doirq.c index 98983538bff..d401f580f6b 100644 --- a/arch/z16/src/common/up_doirq.c +++ b/arch/z16/src/common/up_doirq.c @@ -92,7 +92,7 @@ FAR chipreg_t *up_doirq(int irq, FAR chipreg_t *regs) /* Nested interrupts are not supported in this implementation. If * you want to implement nested interrupts, you would have to (1) change - * the way that current_regs is handled and (2) the design associated + * the way that g_current_regs is handled and (2) the design associated * with CONFIG_ARCH_INTERRUPTSTACK. The savestate variable will not * work for that purpose as implemented here because only the outermost * nested interrupt can result in a context switch (it can probably be @@ -100,12 +100,12 @@ FAR chipreg_t *up_doirq(int irq, FAR chipreg_t *regs) */ /* Current regs non-zero indicates that we are processing - * an interrupt; current_regs is also used to manage + * an interrupt; g_current_regs is also used to manage * interrupt level context switches. */ - savestate = (FAR chipreg_t *)current_regs; - current_regs = regs; + savestate = (FAR chipreg_t *)g_current_regs; + g_current_regs = regs; /* Acknowledge the interrupt */ @@ -115,13 +115,13 @@ FAR chipreg_t *up_doirq(int irq, FAR chipreg_t *regs) irq_dispatch(irq, regs); - /* Restore the previous value of current_regs. NULL would indicate that + /* Restore the previous value of g_current_regs. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ - ret = current_regs; - current_regs = savestate; + ret = g_current_regs; + g_current_regs = savestate; } board_autoled_off(LED_INIRQ); diff --git a/arch/z16/src/common/up_initialize.c b/arch/z16/src/common/up_initialize.c index ce72e27421c..e40e4fea77f 100644 --- a/arch/z16/src/common/up_initialize.c +++ b/arch/z16/src/common/up_initialize.c @@ -69,7 +69,7 @@ * interrupt processing. */ -volatile FAR chipreg_t *current_regs; +volatile FAR chipreg_t *g_current_regs; /**************************************************************************** * Private Types @@ -133,7 +133,7 @@ void up_initialize(void) { /* Initialize global variables */ - current_regs = NULL; + g_current_regs = NULL; /* Calibrate the timing loop */ diff --git a/arch/z16/src/common/up_internal.h b/arch/z16/src/common/up_internal.h index ff9f760677c..bd6f36ca9f8 100644 --- a/arch/z16/src/common/up_internal.h +++ b/arch/z16/src/common/up_internal.h @@ -107,9 +107,9 @@ /* Macros for portability */ -#define IN_INTERRUPT (current_regs != NULL) -#define SAVE_IRQCONTEXT(tcb) up_copystate((tcb)->xcp.regs, (FAR chipreg_t*)current_regs) -#define SET_IRQCONTEXT(tcb) do { current_regs = (tcb)->xcp.regs; } while (0) +#define IN_INTERRUPT (g_current_regs != NULL) +#define SAVE_IRQCONTEXT(tcb) up_copystate((tcb)->xcp.regs, (FAR chipreg_t*)g_current_regs) +#define SET_IRQCONTEXT(tcb) do { g_current_regs = (tcb)->xcp.regs; } while (0) #define SAVE_USERCONTEXT(tcb) up_saveusercontext((tcb)->xcp.regs) #define RESTORE_USERCONTEXT(tcb) up_restoreusercontext((tcb)->xcp.regs) #define SIGNAL_RETURN(regs) up_restoreusercontext(regs) @@ -132,7 +132,7 @@ typedef void (*up_vector_t)(void); * interrupt processing. */ -extern volatile FAR chipreg_t *current_regs; +extern volatile FAR chipreg_t *g_current_regs; #endif /**************************************************************************** diff --git a/arch/z16/src/common/up_interruptcontext.c b/arch/z16/src/common/up_interruptcontext.c index 38a24074613..c45cf376e5c 100644 --- a/arch/z16/src/common/up_interruptcontext.c +++ b/arch/z16/src/common/up_interruptcontext.c @@ -67,5 +67,5 @@ bool up_interrupt_context(void) { - return current_regs != NULL; + return g_current_regs != NULL; } diff --git a/arch/z16/src/common/up_registerdump.c b/arch/z16/src/common/up_registerdump.c index a447cbc457f..a4047d56f01 100644 --- a/arch/z16/src/common/up_registerdump.c +++ b/arch/z16/src/common/up_registerdump.c @@ -78,7 +78,7 @@ static void up_registerdump(void) { - FAR uint32_t *regs32 = (FAR uint32_t*)current_regs; + FAR uint32_t *regs32 = (FAR uint32_t*)g_current_regs; lldbg("R0 :%08x R1 :%08x R2 :%08x R3 :%08x " "R4 :%08x R5 :%08x R6 :%08x R7 :%08x\n" regs32[REG_R0/2], regs32[REG_R1/2], regs32[REG_R2/2], regs32[REG_R3/2], @@ -87,7 +87,7 @@ static void up_registerdump(void) regs32[REG_R8/2], regs32[REG_R9/2], regs32[REG_R10/2], regs3[REG_R11/2], regs32[REG_R12/2], regs32[REG_R13/2]); lldbg("FP :%08x SP :%08x FLG:%04x\n" - regs32[REG_R14/2], regs32[REG_R15/2], current_regs[REG_FLAGS]); + regs32[REG_R14/2], regs32[REG_R15/2], g_current_regs[REG_FLAGS]); } #endif /* CONFIG_ARCH_STACKDUMP */ diff --git a/arch/z16/src/common/up_schedulesigaction.c b/arch/z16/src/common/up_schedulesigaction.c index cebd67eef3c..0592b883352 100644 --- a/arch/z16/src/common/up_schedulesigaction.c +++ b/arch/z16/src/common/up_schedulesigaction.c @@ -106,7 +106,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) * being delivered to the currently executing task. */ - dbg("rtcb=0x%p current_regs=0x%p\n", this_task(), current_regs); + dbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs); if (tcb == this_task()) { @@ -114,7 +114,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) * a task is signalling itself for some reason. */ - if (!current_regs) + if (!g_current_regs) { /* In this case just deliver the signal now. */ @@ -129,7 +129,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) else { - FAR uint32_t *current_pc = (FAR uint32_t*)¤t_regs[REG_PC]; + FAR uint32_t *current_pc = (FAR uint32_t*)&g_current_regs[REG_PC]; /* Save the return address and interrupt state. These will be * restored by the signal trampoline after the signals have @@ -138,20 +138,20 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver) tcb->xcp.sigdeliver = sigdeliver; tcb->xcp.saved_pc = *current_pc; - tcb->xcp.saved_i = current_regs[REG_FLAGS]; + tcb->xcp.saved_i = g_current_regs[REG_FLAGS]; /* Then set up to vector to the trampoline with interrupts * disabled */ *current_pc = (uint32_t)up_sigdeliver; - current_regs[REG_FLAGS] = 0; + g_current_regs[REG_FLAGS] = 0; /* And make sure that the saved context in the TCB is the * same as the interrupt return context. */ - up_copystate(tcb->xcp.regs, current_regs); + up_copystate(tcb->xcp.regs, g_current_regs); } } diff --git a/arch/z16/src/z16f/z16f_irq.c b/arch/z16/src/z16f/z16f_irq.c index 6e06eae06ff..bc2c6ba118c 100644 --- a/arch/z16/src/z16f/z16f_irq.c +++ b/arch/z16/src/z16f/z16f_irq.c @@ -69,7 +69,7 @@ void up_irqinitialize(void) /* currents_regs is non-NULL only while processing an interrupt */ - current_regs = NULL; + g_current_regs = NULL; /* And finally, enable interrupts */ diff --git a/arch/z16/src/z16f/z16f_sysexec.c b/arch/z16/src/z16f/z16f_sysexec.c index 9a8c7da505c..d7ac6317513 100644 --- a/arch/z16/src/z16f/z16f_sysexec.c +++ b/arch/z16/src/z16f/z16f_sysexec.c @@ -79,7 +79,7 @@ void z16f_sysexec(FAR chipreg_t *regs) * diagnostics. */ - current_regs = regs; + g_current_regs = regs; /* The cause of the system exception is indicated in the SYSEXCPH&L * registers diff --git a/arch/z80/src/ez80/ez80_irq.c b/arch/z80/src/ez80/ez80_irq.c index c2e46346ae3..67b37c4eca2 100644 --- a/arch/z80/src/ez80/ez80_irq.c +++ b/arch/z80/src/ez80/ez80_irq.c @@ -53,7 +53,7 @@ * structure. If is non-NULL only during interrupt processing. */ -volatile chipreg_t *current_regs; +volatile chipreg_t *g_current_regs; /**************************************************************************** * Public Functions @@ -65,7 +65,7 @@ volatile chipreg_t *current_regs; void up_irqinitialize(void) { - current_regs = NULL; + g_current_regs = NULL; /* And finally, enable interrupts */ diff --git a/arch/z80/src/ez80/ez80_registerdump.c b/arch/z80/src/ez80/ez80_registerdump.c index 880bdbe5e9c..0e523b693a7 100644 --- a/arch/z80/src/ez80/ez80_registerdump.c +++ b/arch/z80/src/ez80/ez80_registerdump.c @@ -74,26 +74,26 @@ static void ez80_registerdump(void) { - if (current_regs) + if (g_current_regs) { #ifdef CONFIG_EZ80_Z80MODE lldbg("AF: %04x I: %04x\n", - current_regs[XCPT_AF], current_regs[XCPT_I]); + g_current_regs[XCPT_AF], g_current_regs[XCPT_I]); lldbg("BC: %04x DE: %04x HL: %04x\n", - current_regs[XCPT_BC], current_regs[XCPT_DE], current_regs[XCPT_HL]); + g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]); lldbg("IX: %04x IY: %04x\n", - current_regs[XCPT_IX], current_regs[XCPT_IY]); + g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]); lldbg("SP: %04x PC: %04x\n" - current_regs[XCPT_SP], current_regs[XCPT_PC]); + g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]); #else lldbg("AF: %06x I: %06x\n", - current_regs[XCPT_AF], current_regs[XCPT_I]); + g_current_regs[XCPT_AF], g_current_regs[XCPT_I]); lldbg("BC: %06x DE: %06x HL: %06x\n", - current_regs[XCPT_BC], current_regs[XCPT_DE], current_regs[XCPT_HL]); + g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]); lldbg("IX: %06x IY: %06x\n", - current_regs[XCPT_IX], current_regs[XCPT_IY]); + g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]); lldbg("SP: %06x PC: %06x\n" - current_regs[XCPT_SP], current_regs[XCPT_PC]); + g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]); #endif } } diff --git a/arch/z80/src/ez80/switch.h b/arch/z80/src/ez80/switch.h index a397e3334a1..a6e46204d95 100644 --- a/arch/z80/src/ez80/switch.h +++ b/arch/z80/src/ez80/switch.h @@ -59,19 +59,19 @@ /* Initialize the IRQ state */ -#define INIT_IRQCONTEXT() current_regs = NULL +#define INIT_IRQCONTEXT() g_current_regs = NULL /* IN_INTERRUPT returns true if the system is currently operating in the interrupt * context. IN_INTERRUPT is the inline equivalent of up_interrupt_context(). */ -#define IN_INTERRUPT() (current_regs != NULL) +#define IN_INTERRUPT() (g_current_regs != NULL) /* The following macro is used when the system enters interrupt handling logic * * NOTE: Nested interrupts are not supported in this implementation. If you want * to implement nested interrupts, you would have to change the way that - * current_regs is handled. The savestate variable would not work for + * g_current_regs is handled. The savestate variable would not work for * that purpose as implemented here because only the outermost nested * interrupt can result in a context switch (it can probably be deleted). */ @@ -81,25 +81,25 @@ #define IRQ_ENTER(irq, regs) \ do { \ - savestate = (FAR chipreg_t *)current_regs; \ - current_regs = (regs); \ + savestate = (FAR chipreg_t *)g_current_regs; \ + g_current_regs = (regs); \ } while (0) /* The following macro is used when the system exits interrupt handling logic */ -#define IRQ_LEAVE(irq) current_regs = savestate +#define IRQ_LEAVE(irq) g_current_regs = savestate /* The following macro is used to sample the interrupt state (as a opaque handle) */ -#define IRQ_STATE() (current_regs) +#define IRQ_STATE() (g_current_regs) /* Save the current IRQ context in the specified TCB */ -#define SAVE_IRQCONTEXT(tcb) ez80_copystate((tcb)->xcp.regs, (FAR chipreg_t*)current_regs) +#define SAVE_IRQCONTEXT(tcb) ez80_copystate((tcb)->xcp.regs, (FAR chipreg_t*)g_current_regs) /* Set the current IRQ context to the state specified in the TCB */ -#define SET_IRQCONTEXT(tcb) ez80_copystate((FAR chipreg_t*)current_regs, (tcb)->xcp.regs) +#define SET_IRQCONTEXT(tcb) ez80_copystate((FAR chipreg_t*)g_current_regs, (tcb)->xcp.regs) /* Save the user context in the specified TCB. User context saves can be simpler * because only those registers normally saved in a C called need be stored. @@ -130,7 +130,7 @@ * If is non-NULL only during interrupt processing. */ -extern volatile chipreg_t *current_regs; +extern volatile chipreg_t *g_current_regs; #endif /************************************************************************************ diff --git a/arch/z80/src/z180/switch.h b/arch/z80/src/z180/switch.h index 4be15aef5f3..4843fa450bd 100644 --- a/arch/z80/src/z180/switch.h +++ b/arch/z80/src/z180/switch.h @@ -62,14 +62,14 @@ /* Initialize the IRQ state */ #define INIT_IRQCONTEXT() \ - current_regs = NULL + g_current_regs = NULL /* IN_INTERRUPT returns true if the system is currently operating in the interrupt * context. IN_INTERRUPT is the inline equivalent of up_interrupt_context(). */ #define IN_INTERRUPT() \ - (current_regs != NULL) + (g_current_regs != NULL) /* The following macro declares the variables need by IRQ_ENTER and IRQ_LEAVE. * These variables are used to support nested interrupts. @@ -79,7 +79,7 @@ * * NOTE: Nested interrupts are not supported in this implementation. If you want * to implement nested interrupts, you would have to change the way that - * current_regs/cbr is handled. The savestate/savecbr variables would not work + * g_current_regs/cbr is handled. The savestate/savecbr variables would not work * for that purpose as implemented here because only the outermost nested * interrupt can result in a context switch (they can probabaly be deleted). */ @@ -89,23 +89,23 @@ uint8_t savecbr; /* The following macro is used when the system enters interrupt handling logic. - * The entry values of current_regs and current_cbr and stored in local variables. - * Then current_regs and current_cbr are set to the values of the interrupted + * The entry values of g_current_regs and current_cbr and stored in local variables. + * Then g_current_regs and current_cbr are set to the values of the interrupted * task. */ #define IRQ_ENTER(irq, regs) \ do \ { \ - savestate = (FAR chipreg_t *)current_regs; \ + savestate = (FAR chipreg_t *)g_current_regs; \ savecbr = current_cbr; \ - current_regs = (regs); \ + g_current_regs = (regs); \ current_cbr = inp(Z180_MMU_CBR); \ } \ while (0) /* The following macro is used when the system exits interrupt handling logic. - * The value of current_regs is restored. If we are not processing a nested + * The value of g_current_regs is restored. If we are not processing a nested * interrupt (meaning that we going to return to the user task), then also * set the MMU's CBR register. */ @@ -113,8 +113,8 @@ #define IRQ_LEAVE(irq) \ do \ { \ - current_regs = savestate; \ - if (current_regs) \ + g_current_regs = savestate; \ + if (g_current_regs) \ { \ current_cbr = savecbr; \ } \ @@ -128,12 +128,12 @@ /* The following macro is used to sample the interrupt state (as a opaque handle) */ #define IRQ_STATE() \ - (current_regs) + (g_current_regs) /* Save the current IRQ context in the specified TCB */ #define SAVE_IRQCONTEXT(tcb) \ - z180_copystate((tcb)->xcp.regs, (FAR chipreg_t*)current_regs) + z180_copystate((tcb)->xcp.regs, (FAR chipreg_t*)g_current_regs) /* Set the current IRQ context to the state specified in the TCB */ @@ -144,7 +144,7 @@ { \ current_cbr = (tcb)->xcp.cbr->cbr; \ } \ - z180_copystate((FAR chipreg_t*)current_regs, (tcb)->xcp.regs); \ + z180_copystate((FAR chipreg_t*)g_current_regs, (tcb)->xcp.regs); \ } \ while (0) @@ -188,7 +188,7 @@ * If is non-NULL only during interrupt processing. */ -extern volatile chipreg_t *current_regs; +extern volatile chipreg_t *g_current_regs; /* This holds the value of the MMU's CBR register. This value is set to the * interrupted tasks's CBR on interrupt entry, changed to the new task's CBR if diff --git a/arch/z80/src/z180/z180_irq.c b/arch/z80/src/z180/z180_irq.c index f90e9a96786..cb6b362c9ea 100644 --- a/arch/z80/src/z180/z180_irq.c +++ b/arch/z80/src/z180/z180_irq.c @@ -58,7 +58,7 @@ * structure. If is non-NULL only during interrupt processing. */ -volatile chipreg_t *current_regs; +volatile chipreg_t *g_current_regs; /* This holds the value of the MMU's CBR register. This value is set to the * interrupted tasks's CBR on interrupt entry, changed to the new task's CBR if diff --git a/arch/z80/src/z180/z180_registerdump.c b/arch/z80/src/z180/z180_registerdump.c index bf6e52bd4db..1c3a4c73be3 100644 --- a/arch/z80/src/z180/z180_registerdump.c +++ b/arch/z80/src/z180/z180_registerdump.c @@ -74,16 +74,16 @@ static void z180_registerdump(void) { - if (current_regs) + if (g_current_regs) { lldbg("AF: %04x I: %04x\n", - current_regs[XCPT_AF], current_regs[XCPT_I]); + g_current_regs[XCPT_AF], g_current_regs[XCPT_I]); lldbg("BC: %04x DE: %04x HL: %04x\n", - current_regs[XCPT_BC], current_regs[XCPT_DE], current_regs[XCPT_HL]); + g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]); lldbg("IX: %04x IY: %04x\n", - current_regs[XCPT_IX], current_regs[XCPT_IY]); + g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]); lldbg("SP: %04x PC: %04x\n" - current_regs[XCPT_SP], current_regs[XCPT_PC]); + g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]); lldbg("CBAR: %02x BBR: %02x CBR: %02x\n" inp(Z180_MMU_CBAR), inp(Z180_MMU_BBR), inp(Z180_MMU_CBR)); } diff --git a/arch/z80/src/z8/switch.h b/arch/z80/src/z8/switch.h index c1411931439..b8e23f597b8 100644 --- a/arch/z80/src/z8/switch.h +++ b/arch/z80/src/z8/switch.h @@ -116,7 +116,7 @@ * * NOTE: Nested interrupts are not supported in this implementation. If you want * to implement nested interrupts, you would have to change the way that - * current_regs is handled. The savestate variable would not work for + * g_current_regs is handled. The savestate variable would not work for * that purpose as implemented here because only the outermost nested * interrupt can result in a context switch (it can probably be deleted). */ diff --git a/arch/z80/src/z80/switch.h b/arch/z80/src/z80/switch.h index 8d6f525906a..f277893a33d 100644 --- a/arch/z80/src/z80/switch.h +++ b/arch/z80/src/z80/switch.h @@ -58,19 +58,19 @@ /* Initialize the IRQ state */ -#define INIT_IRQCONTEXT() current_regs = NULL +#define INIT_IRQCONTEXT() g_current_regs = NULL /* IN_INTERRUPT returns true if the system is currently operating in the interrupt * context. IN_INTERRUPT is the inline equivalent of up_interrupt_context(). */ -#define IN_INTERRUPT() (current_regs != NULL) +#define IN_INTERRUPT() (g_current_regs != NULL) /* The following macro is used when the system enters interrupt handling logic * * NOTE: Nested interrupts are not supported in this implementation. If you want * to implement nested interrupts, you would have to change the way that - * current_regs is handled. The savestate variable would not work for + * g_current_regs is handled. The savestate variable would not work for * that purpose as implemented here because only the outermost nested * interrupt can result in a context switch (it can probably be deleted). */ @@ -80,25 +80,25 @@ #define IRQ_ENTER(irq, regs) \ do { \ - savestate = (FAR chipreg_t *)current_regs; \ - current_regs = (regs); \ + savestate = (FAR chipreg_t *)g_current_regs; \ + g_current_regs = (regs); \ } while (0) /* The following macro is used when the system exits interrupt handling logic */ -#define IRQ_LEAVE(irq) current_regs = savestate +#define IRQ_LEAVE(irq) g_current_regs = savestate /* The following macro is used to sample the interrupt state (as a opaque handle) */ -#define IRQ_STATE() (current_regs) +#define IRQ_STATE() (g_current_regs) /* Save the current IRQ context in the specified TCB */ -#define SAVE_IRQCONTEXT(tcb) z80_copystate((tcb)->xcp.regs, (FAR chipreg_t*)current_regs) +#define SAVE_IRQCONTEXT(tcb) z80_copystate((tcb)->xcp.regs, (FAR chipreg_t*)g_current_regs) /* Set the current IRQ context to the state specified in the TCB */ -#define SET_IRQCONTEXT(tcb) z80_copystate((FAR chipreg_t*)current_regs, (tcb)->xcp.regs) +#define SET_IRQCONTEXT(tcb) z80_copystate((FAR chipreg_t*)g_current_regs, (tcb)->xcp.regs) /* Save the user context in the specified TCB. User context saves can be simpler * because only those registers normally saved in a C called need be stored. @@ -129,7 +129,7 @@ * If is non-NULL only during interrupt processing. */ -extern volatile chipreg_t *current_regs; +extern volatile chipreg_t *g_current_regs; #endif /************************************************************************************ diff --git a/arch/z80/src/z80/z80_irq.c b/arch/z80/src/z80/z80_irq.c index c1108f5bad1..69a6cc93801 100644 --- a/arch/z80/src/z80/z80_irq.c +++ b/arch/z80/src/z80/z80_irq.c @@ -52,7 +52,7 @@ * structure. If is non-NULL only during interrupt processing. */ -volatile chipreg_t *current_regs; +volatile chipreg_t *g_current_regs; /**************************************************************************** * Public Functions diff --git a/arch/z80/src/z80/z80_registerdump.c b/arch/z80/src/z80/z80_registerdump.c index 4d80a545c22..dd83a1eb8c7 100644 --- a/arch/z80/src/z80/z80_registerdump.c +++ b/arch/z80/src/z80/z80_registerdump.c @@ -74,16 +74,16 @@ static void z80_registerdump(void) { - if (current_regs) + if (g_current_regs) { lldbg("AF: %04x I: %04x\n", - current_regs[XCPT_AF], current_regs[XCPT_I]); + g_current_regs[XCPT_AF], g_current_regs[XCPT_I]); lldbg("BC: %04x DE: %04x HL: %04x\n", - current_regs[XCPT_BC], current_regs[XCPT_DE], current_regs[XCPT_HL]); + g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]); lldbg("IX: %04x IY: %04x\n", - current_regs[XCPT_IX], current_regs[XCPT_IY]); + g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]); lldbg("SP: %04x PC: %04x\n" - current_regs[XCPT_SP], current_regs[XCPT_PC]); + g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]); } }