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mpfs_corespi: Fix DEBUGASSERT() for clk divider

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Valid range is 0...255, not 2...512
This commit is contained in:
Ville Juven
2023-06-01 14:33:58 +03:00
committed by Alan Carvalho de Assis
parent 4c9e11d559
commit 4d49f80e16
1 changed files with 1 additions and 1 deletions
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arch/risc-v/src/mpfs/mpfs_corespi.c
+1 -1
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@@ -540,7 +540,7 @@ static uint32_t mpfs_spi_setfrequency(struct spi_dev_s *dev,
divider = ((MPFS_FPGA_PERIPHERAL_CLK / frequency) >> 1) - 1;
priv->actual = MPFS_FPGA_PERIPHERAL_CLK / ((divider + 1) << 1);
DEBUGASSERT(divider >= 2u && divider <= 512u);
DEBUGASSERT(divider < 256u);
putreg32(divider, MPFS_SPI_CLK_GEN);