From 4d49f80e16d98f3f1d2f0c246c72fe38a84dee3b Mon Sep 17 00:00:00 2001 From: Ville Juven Date: Thu, 1 Jun 2023 14:33:58 +0300 Subject: [PATCH] mpfs_corespi: Fix DEBUGASSERT() for clk divider Valid range is 0...255, not 2...512 --- arch/risc-v/src/mpfs/mpfs_corespi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/risc-v/src/mpfs/mpfs_corespi.c b/arch/risc-v/src/mpfs/mpfs_corespi.c index 1bf5cb0396d..da1b576a6c1 100644 --- a/arch/risc-v/src/mpfs/mpfs_corespi.c +++ b/arch/risc-v/src/mpfs/mpfs_corespi.c @@ -540,7 +540,7 @@ static uint32_t mpfs_spi_setfrequency(struct spi_dev_s *dev, divider = ((MPFS_FPGA_PERIPHERAL_CLK / frequency) >> 1) - 1; priv->actual = MPFS_FPGA_PERIPHERAL_CLK / ((divider + 1) << 1); - DEBUGASSERT(divider >= 2u && divider <= 512u); + DEBUGASSERT(divider < 256u); putreg32(divider, MPFS_SPI_CLK_GEN);