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Merge branch 'master' into stm32l4_usb

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ziggurat29
2016-05-30 13:52:45 -05:00
parent aa51ace46d dbbfddd2e8
commit 3970c98daf
761 changed files with 30996 additions and 11405 deletions
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ChangeLog
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@@ -11729,3 +11729,87 @@
STM32F746ZG MCU. From Kconstantin Berezenko (2015-05-12).
* arch/arm-src/armv7-a: Complete re-design of logic to initialize each
CPUn, n > 0, when CONFIG_SMP=y (2016-05-13).
* arch/arm/src/imx6 and configs/sabre-6quad: The basic i.MX6 port is
complete. This is a very minimal port at present and probably still
has some as-of-yet-undiscovered issues (2016-05-17).
* arch/*/Makefile: Add definitions that can be overrided to use GCC
instead of LD in the final link. From Paul Alexander Patience
(2016-05-18) .
* arch/arm/src/stm32, stm32l4, and stm32f7 serial: Add support for
compliant BSD-style breaks. From David Sidrane (2016-05-18).
* enter/leave_critical_section() may attempt to access task lists before
they have been initialized in the SMP configuration (2016-05-18).
* configs/stm32f103-minimum: Add support for this minimual STM32F103CBT6
"blue" board. From Alan Carvalho de Assis (2016-05-18).
* arch/arm/src/sam* Watchdogs: Rename up_wdginitialize() to something
more appropriate for an internal, MCU-specific function (2016-05-18).
* configs/*/src/*_watchdog.c: Remove all implementations of
up_wdginitialize() which was only used by apps/examples/watchdog.
That internal OS function is no longer called from application code.
If you want to use the watchdog example, you will need to configure
the watchdog driver by calling the appropriate, MCU-specific driver
configuration function from your board initialization logic
(2016-05-18).
* arch/srm/src/stm32l4: Add CAN support for STM32L4. From Sebastien
Lorquet (2016-05-19).
* arch/arm/src/samv7: Adds a JTAG config and ERASE config to Kconfig to
set the CCFG_SYSIO SYSIO Pins. From Davide Sidrane (2016-05-19).
* arch/sim/src: Enhance networking support for the simulation under Linux.
Includes updated support for Linux TUN/TAP, and the addition of support
for Linux bridge devices. From Steve (2016-05-20).
* configs/stm32f411e-disco: Add basic configuration for stm32f411e-disco
board with STM32F411VE chip. From Konstantin Berezenko (2016-05-20).
* i.MX6 Sabre-6Quad: Basic SMP NSH configuration is now working. But
this is probably only because the SMP NSH case does not stress the
logic. There are know outstanding SMP issues as noted in the
Sabre-6Quad README.txt file (2016-05-22).
* configs/sabre-6quad: Add an SMP configuration; Enable procfs in all
configurations (2016-05-22).
* include/nuttx/crypto/aes.h: Modifications to the crypto API needed
for LPC43xx. From Alexander Vasiljev (2016-05-23).
* arch/arm/src/lpc32xx: Add AES support. From Alexander Vasiljev
(2016-05-24).
* configs/*/src/tiva_timer.c: Tiva boards: Fix a naming collision,
rename board-specific function from tiva_timer_initialize() to
tiva_timer_configure() to remove conflict (2016-05-23).
* arch/arm/src/sam*: Ensure that the TWIHS (i2c) hw get's its clock
set when the sequence of sam_i2cbus_initialize(),
sam_i2cbus_uninitialize(), then sam_i2cbus_initialize() or twi_reset()
is called. I found this a while back in the stm32 family, so there
may be more arch-es with this sort of bug. I suppose any driver that
has the notion of "do not set the freq if it is already set" could be
suspect. From David Sidrane (2016-05-23).
* arch/arm/src/samv7: Add the up_systemreset interface to the samv7
arch. The approach is slightly different in that: 1) It enables
ARCH_HAVE_RESET and allows the user to set if, and for how long, to
drive External nRST signal. It also does not contain a default
board_reset, as that really should be done in the config's src if
CONFIG_BOARDCTL_RESET is defined. From David Sidrane (2016-05-23).
* arch/arm/include/lpc43xx and src/lpc43xx: Adds definitions for the
LPC4337jet100 chip. From Alexander Vasiljev (2016-05-24).
* Many files: board_app_initialize() now accepts an argument that may
be used to support initialization in different configurations
(2016-05-24).
* arch/arm/src/samv7: Remove disabling of whole USB on suspend of USBHS.
This fix removes the disabling of the whole USB peripheral on suspend
interrupt. Its enough to freeze the clock instead. When disabling the
whole peripheral, the next wakeup-interrupt comes up with an disabled
clocking. The unfreeze clock has no effect, because the master clock
is disabled. This makes all registers, including the IDR unwriteable
and the IRQ falls in an endless loop blocking the whole system.
Furthermore the disabling of the peripheral clock prevents hotplugging
or reconnecting the USB. From Frank Benkert (2015-05-25).
* drivers/lcd: Add support for PCF8574 LCD Backpack driver. This driver
supports an interface board that is based on the PCF8574 io expander
and supports the HD44780-based (or compatible) LCD modules. There
are a myriad of different vendors of such, but they are principally
the same, save wiring and minor features like jumpers for I2C
addresses. This driver supports known and unknown variants. From
Dave (ziggurat29, 2013-6-26).
* arch/arm/stm32: Add support for a custom 1-wire driver. The serial
driver already supports a 1-wire interface, but this driver uses the
same serial logic to implement a lower half driver much like the I2C
lower half driver. From Aleksandr Vyhovanec (2015-05-25).
* fs/: Add logic to detach a file structure from a file descriptor.
This is for use only within the OS. It permits an open file or driver
to be used across multiple threads (2016-05-26).
Documentation/README.html
+7 -2
View File
@@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX README Files</i></font></big></h1>
<p>Last Updated: May 12, 2016</p>
<p>Last Updated: May 26, 2016</p>
</td>
</tr>
</table>
@@ -251,10 +251,14 @@ nuttx/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm3240g-eval/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32_tiny/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32_tiny/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32f103-minumum/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f103-minumum/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32f3discovery/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f3discovery/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32f4discovery/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f4discovery/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32f411e-disco/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f411e-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32f429i-disco/
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f429i-disco/ide/ltcd/uvision/README.txt" target="_blank"><b><i>ide/ltcd/uvision/README.txt</i></b></a>
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f429i-disco/ltdc/README.txt" target="_blank"><b><i>ltdc/README.txt</i></b></a>
@@ -312,7 +316,8 @@ nuttx/
| |- eeprom/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/drivers/eeprom/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- lcd/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/drivers/lcd/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/drivers/lcd/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/drivers/lcd/pcf8574_lcd_backpack_readme.txt" target="_blank"><b><i>pcf8574_lcd_backpack_readme.txt</i></b></a>
| |- mtd/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/drivers/mtd/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- sensors/
README.txt
+6 -1
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@@ -1426,10 +1426,14 @@ nuttx/
| | `- README.txt
| |- stm32_tiny/
| | `- README.txt
| |- stm32f103-minumum/
| | `- README.txt
| |- stm32f3discovery/
| | `- README.txt
| |- stm32f4discovery/
| | `- README.txt
| |- stm32f411e-disco/
| | `- README.txt
| |- stm32f429i-disco/
| | |- ide/ltcd/uvision/README.txt
| | |- ltdc/README.txt
@@ -1487,7 +1491,8 @@ nuttx/
| |- eeprom/
| | `- README.txt
| |- lcd/
| | `- README.txt
| | | README.txt
| | `- pcf8574_lcd_backpack_readme.txt
| |- mtd/
| | `- README.txt
| |- sensors/
TODO
+66 -63
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@@ -1,20 +1,20 @@
NuttX TODO List (Last updated March 31, 2016)
NuttX TODO List (Last updated May 28, 2016)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This file summarizes known NuttX bugs, limitations, inconsistencies with
standards, things that could be improved, and ideas for enhancements. This
TODO list does not include issues associated with individual boar ports. See
altheso individual README.txt files in the configs/ sub-directories for
issues reated to each board port.
also the individual README.txt files in the configs/ sub-directories for
issues related to each board port.
nuttx/
nuttx/:
(13) Task/Scheduler (sched/)
(1) Memory Management (mm/)
(3) Signals (sched/signal, arch/)
(2) pthreads (sched/pthread)
(0) Message Queues (sched/mqueue)
(8) Kernel/Protected Build
(9) Kernel/Protected Build
(3) C++ Support
(6) Binary loaders (binfmt/)
(12) Network (net/, drivers/net)
@@ -23,16 +23,16 @@ nuttx/
(11) Libraries (libc/, libm/)
(11) File system/Generic drivers (fs/, drivers/)
(8) Graphics subsystem (graphics/)
(1) Pascal add-on (pcode/)
(1) Build system / Toolchains
(4) Linux/Cywgin simulation (arch/sim)
(3) Linux/Cywgin simulation (arch/sim)
(4) ARM (arch/arm/)
apps/
apps/ and other Add-Ons:
(3) Network Utilities (apps/netutils/)
(2) NuttShell (NSH) (apps/nshlib)
(1) System libraries apps/system (apps/system)
(1) Pascal add-on (pcode/)
(4) Other Applications & Tests (apps/examples/)
o Task/Scheduler (sched/)
@@ -70,7 +70,7 @@ o Task/Scheduler (sched/)
Title: GET_ENVIRON_PTR()
Description: get_environ_ptr() (sched/sched_getenvironptr.c) is not implemented.
The representation of the environment strings selected for
NutX is not compatible with the operation. Some significant
NuttX is not compatible with the operation. Some significant
re-design would be required to implement this function and that
effort is thought to be not worth the result.
Status: Open. No change is planned.
@@ -81,7 +81,7 @@ o Task/Scheduler (sched/)
Status: Open
Priority: Low -- There is no plan to implement this.
Title: INCOMPATIBILITES WITH execv() AND execl()
Title: INCOMPATIBILITIES WITH execv() AND execl()
Description: Simplified 'execl()' and 'execv()' functions are provided by
NuttX. NuttX does not support processes and hence the concept
of overlaying a tasks process image with a new process image
@@ -175,7 +175,7 @@ o Task/Scheduler (sched/)
Yahoo! Groups message 7726: "I think that the system
should be required to handle pthread_cancel safely in
all cases. In the NuttX model, a task is like a Unix
process and a pthread is like a Unix thread. Cancelling
process and a pthread is like a Unix thread. Canceling
threads should always be safe (or at least as unsafe) as
under Unix because the model is complete for pthreads...
@@ -188,7 +188,7 @@ o Task/Scheduler (sched/)
"The patch I just incorporated is also insufficient. It
works only if the serial driver is shut down when the
thread is cancelled. But what if there are other open
thread is canceled. But what if there are other open
references to the driver? Then the driver will not be
shut down, the semaphores will not be re-initialized, and
the semaphore counts will still be off by one.
@@ -202,7 +202,7 @@ o Task/Scheduler (sched/)
hooks so that given a semaphore it can traverse all
holders. What is needed would be logic so that given
a task, you can traverse all semaphores held by the task,
releasing each semaphore cound held by the exiting task.
releasing each semaphore count held by the exiting task.
Nothing like this exists now so that solution is not
imminent.
@@ -228,16 +228,15 @@ o Task/Scheduler (sched/)
hidden behind simple accessor functions and so the internal
data structures can be changed if need with very little impact.
Explicity refereence to the list strucutre are hidden behnid
Explicitly reference to the list structure are hidden behind
the macro this_task().
Status: Open
Priority: Low. Things are just the way that we want them for the way
that NuttX is used today.
o Memory Managment (mm/)
^^^^^^^^^^^^^^^^^^^^^^
o Memory Management (mm/)
^^^^^^^^^^^^^^^^^^^^^^^
Title: FREE MEMORY ON TASK EXIT
Description: Add an option to free all memory allocated by a task when the
@@ -390,7 +389,7 @@ o pthreads (sched/pthreads)
Priority: Low -- about zero, probably not that useful. Priority inheritance is
already supported and is a much better solution. And it turns out
that priority protection is just about as complex as priority inheritance.
Exerpted from my post in a Linked-In discussion:
Excerpted from my post in a Linked-In discussion:
"I started to implement this HLS/"PCP" semaphore in an RTOS that I
work with (http://www.nuttx.org) and I discovered after doing the
@@ -589,8 +588,21 @@ o Kernel/Protected Build
interrupt level callbacks into applications. This, of course,
will never work in anything but a non-secure, flat build.
Status: Open
Priority: Medium. The driver is only usable with all of its features in a FLAT build.
Priority: Medium. The driver is only usable with all of its features
in a FLAT build.
Title: USER MODE TASKS CAN MODIFY PRIVILEGED TASKS
Description: Certain interfaces, such as sched_setparam(),
sched_setscheduler(), etc. can be used by user mode tasks to
modify the behavior of priviledged kernel threads.
task_delete() could even be used to kill a kernel thread.
For a truly secure system. Privileges need to be checked in
every interface that permits one thread to modify the
properties of another thread.
Status: Open
Priority: Low for most embedded systems but would be a critical need if
NuttX were used in a secure system.
o C++ Support
^^^^^^^^^^^
@@ -784,7 +796,7 @@ o Binary loaders (binfmt/)
to get fixed as needed for Windows native tool builds.
Title: TOOLCHAIN COMPATIBILITY PROBLEM
Descripton: The older 4.3.3 compiler generates GOTOFF relocations to the constant
Description: The older 4.3.3 compiler generates GOTOFF relocations to the constant
strings, like:
.L3:
@@ -794,7 +806,7 @@ o Binary loaders (binfmt/)
.word .LC3(GOTOFF)
.word .LC4(GOTOFF)
Where .LC0, LC1, LC2, LC3, and .LC4 are the labels correponding to strings in
Where .LC0, LC1, LC2, LC3, and .LC4 are the labels corresponding to strings in
the .rodata.str1.1 section. One consequence of this is that .rodata must reside
in D-Space since it will addressed relative to the GOT (see the section entitled
"Read-Only Data in RAM" at
@@ -880,7 +892,7 @@ o Network (net/, drivers/net)
RFC3678 (IGMPv3) suggests ioctl() commands to do this (SIOCSIPMSFILTER) but
also status that those APIs are historic. NuttX implements these ioctl
commands, but is non-standard because: (1) It does not support IGMPv3, and
(2) it looks up drivers by their device name (eg., "eth0") vs IP address.
(2) it looks up drivers by their device name (e.g., "eth0") vs IP address.
Linux uses setsockopt() to control multicast group membership using the
IP_ADD_MEMBERSHIP and IP_DROP_MEMBERSHIP options. It also looks up drivers
@@ -896,7 +908,7 @@ o Network (net/, drivers/net)
that connection may time out. How should this be handled? Should the
connection be removed from the backlog if it is times out or is closed?
Or should it remain in the backlog with a status indication so that accept()
can fail when it encounteres the invalid connection?
can fail when it encounters the invalid connection?
Status: Open
Priority: Medium. Important on slow applications that will not accept
connections promptly.
@@ -975,7 +987,7 @@ o Network (net/, drivers/net)
it is no longer needed. Perhaps there should be a delayed
call to unlink() (using a watchdog or the work queue). If
the driver is re-opened, the delayed unlink could be
cancelled? Needs more thought.
canceled? Needs more thought.
NOTE: This is not an issue for Unix domain streams sockets:
The end-of-life of the FIFO is well determined when sockets
are disconnected and support for that case is fully implemented.
@@ -1020,7 +1032,7 @@ o USB (drivers/usbdev, drivers/usbhost)
that involves delays. This needs to be redesigned to eliminate these
delays. See logic conditioned on CONFIG_USBMSC_RACEWAR.
If queuing of stall requests is supported by DCD then this workaround
If queuing of stall requests is supported by the DCD then this workaround
is not required. In this case, (1) the stall is not sent until all
write requests preceding the stall request are sent, (2) the stall is
sent, and then after the stall is cleared, (3) all write requests
@@ -1135,7 +1147,7 @@ o USB (drivers/usbdev, drivers/usbhost)
Priority: Medium-Low
Title: USB CDC/ACM HOST CLASS DRIVER
Desciption: A CDC/ACM host class driver has been added. This has been
Description: A CDC/ACM host class driver has been added. This has been
testing by running the USB CDC/ACM host on an Olimex
LPC1766STK and using the configs/stm3210e-eval/usbserial
configuration (using the CDC/ACM device side driver). There
@@ -1374,7 +1386,7 @@ o File system / Generic drivers (fs/, drivers/)
Priority: Medium
Title: UNIFIED DESCRIPTOR REPRESENTATION
Descripton: There are two separate ranges of descriptors for file and
Description: There are two separate ranges of descriptors for file and
socket descriptors: if a descriptor is in one range then it is
recognized as a file descriptor; if it is in another range
then it is recognized as a socket descriptor. These separate
@@ -1410,7 +1422,7 @@ o File system / Generic drivers (fs/, drivers/)
Status: Open
Priority: Low
Title: FAT LONG FILENAME COMPATIBILTY
Title: FAT LONG FILENAME COMPATIBILITY
Description: Recently there have been reports that file with long file
names created by NuttX don't have long file names when viewed
on Windows. The long file name support has been around for a
@@ -1423,7 +1435,7 @@ o File system / Generic drivers (fs/, drivers/)
Description: I have seen cases where (1) long file names are enabled,
but (2) a short file name is created like:
nsh> echo "This is another thest" >/mnt/sdcard/another.txt
nsh> echo "This is another test" >/mnt/sdcard/another.txt
But then on subsequent 'ls' operations, the file does not appear:
@@ -1472,7 +1484,7 @@ o File system / Generic drivers (fs/, drivers/)
4) When comparing the checksum in the long file name
entry with the checksum of the short file name, the
checksum fails and the entire directlry sequence is
checksum fails and the entire directory sequence is
ignored by readder() logic. This the file does not
appear in the 'ls'.
@@ -1539,7 +1551,7 @@ o Graphics subsystem (graphics/)
Priority: Low, the need has not yet arisen.
Title: PER-WINDOW FRAMEBUFFERS
Description: One of the most awkard things to handle in the NX windowing
Description: One of the most awkward things to handle in the NX windowing
system is the re-draw callback. This is difficult because it
requires ad hoc, custom logic to be able to do the redrawing
in most cases.
@@ -1567,26 +1579,6 @@ o Graphics subsystem (graphics/)
Priority: Low, not a serious issue but worth noting. There is no plan
to change this behavior.
o Pascal Add-On (pcode/)
^^^^^^^^^^^^^^^^^^^^^^
Title: P-CODES IN MEMORY UNTESTED
Description: Need APIs to verify execution of P-Code from memory buffer.
Status: Open
Priority: Low
Title: SMALLER LOADER AND OBJECT FORMAT
Description: Loader and object format may be too large for some small
memory systems. Consider ways to reduce memory footprint.
Status: Open
Priority: Medium
Title: PDBG
Description: Move the the pascal p-code debugger into the NuttX apps/ tree
where it can be used from the NSH command line.
Status: Open
Priority: Low
o Build system
^^^^^^^^^^^^
@@ -1609,15 +1601,6 @@ o Other drivers (drivers/)
o Linux/Cywgin simulation (arch/sim)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Title: SIMULATOR NETWORKING SUPPORT
Description: I never did get networking to work on the sim Linux target. On Linux,
it tries to use the tap device (/dev/net/tun) to emulate an Ethernet
NIC, but I never got it correctly integrated with the NuttX networking.
NOTE: On Cygwin, the build uses the Cygwin WPCAP library and is, at
least, partially functional (it has never been rigorously tested).
Status: Open
Priority: Low (unless you want to test networking features on the simulation).
Title: SIMULATOR HAS NO INTERRUPTS (NON-PREMPTIBLE)
Description: The current simulator implementation is has no interrupts and, hence,
is non-preemptible. Also, without simulated interrupt, there can
@@ -1765,7 +1748,7 @@ o ARM (arch/arm/)
But this has not been proven to be a solution.
UPDATE: Other ARM architectures have a similer issue.
UPDATE: Other ARM architectures have a similar issue.
Status: Open
Priority: Low. The conditions of continuous interrupts is really the problem.
@@ -1823,7 +1806,7 @@ o NuttShell (NSH) (apps/nshlib)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Title: IFCONFIG AND MULTIPLE NETWORK INTERFACES
Descripton: The ifconfig command will not behave correctly if an interface
Description: The ifconfig command will not behave correctly if an interface
is provided and there are multiple interfaces. It should only
show status for the single interface on the command line; it will
still show status for all interfaces.
@@ -1848,6 +1831,26 @@ o System libraries apps/system (apps/system)
Priority: Low (unless you are using mixed C-buffered I/O with readline and
fgetc, for example).
o Pascal Add-On (pcode/)
^^^^^^^^^^^^^^^^^^^^^^
Title: P-CODES IN MEMORY UNTESTED
Description: Need APIs to verify execution of P-Code from memory buffer.
Status: Open
Priority: Low
Title: SMALLER LOADER AND OBJECT FORMAT
Description: Loader and object format may be too large for some small
memory systems. Consider ways to reduce memory footprint.
Status: Open
Priority: Medium
Title: PDBG
Description: Move the the pascal p-code debugger into the NuttX apps/ tree
where it can be used from the NSH command line.
Status: Open
Priority: Low
o Other Applications & Tests (apps/examples/)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
arch/arm/Kconfig
+2 -2
View File
@@ -27,7 +27,7 @@ config ARCH_CHIP_C5471
bool "TMS320 C5471"
select ARCH_ARM7TDMI
select ARCH_HAVE_LOWVECTORS
select ARCH_HAVE_OTHER_UART
select OTHER_UART_SERIALDRIVER
---help---
TI TMS320 C5471, A180, or DA180 (ARM7TDMI)
@@ -36,7 +36,7 @@ config ARCH_CHIP_CALYPSO
select ARCH_ARM7TDMI
select ARCH_HAVE_HEAP2
select ARCH_HAVE_LOWVECTORS
select ARCH_HAVE_OTHER_UART
select OTHER_UART_SERIALDRIVER
select ARCH_HAVE_POWEROFF
---help---
TI Calypso-based cell phones (ARM7TDMI)
arch/arm/include/lpc43xx/chip.h
+42 -17
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/include/lpc43xx/chip.h
*
* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -167,7 +167,7 @@
# warning "Data sheet and user manual are consistement for the LPC4320"
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (16*1024) /* 32Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -194,7 +194,7 @@
# warning "Data sheet and user manual are consistement for the LPC4320"
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (16*1024) /* 32Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -220,7 +220,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4330FBD144)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -246,7 +246,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET100)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -272,7 +272,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET180)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -298,7 +298,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET256)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -324,7 +324,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4337JBD144)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -350,7 +350,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4350FBD208)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -376,7 +376,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4350FET180)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -402,7 +402,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4350FET256)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -428,7 +428,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4353FBD208)
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (256*1025)
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -454,7 +454,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4353FET180)
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (256*1025)
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -480,7 +480,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4353FET256)
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (256*1025)
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -506,7 +506,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4357FET180)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -532,7 +532,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4357FBD208)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -558,7 +558,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4357FET256)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -632,6 +632,31 @@
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels (per ADC)*/
# define LPC43_NADC12 (1) /* ONne 12-bit ADC controllers (ADCHS)*/
#elif defined(CONFIG_ARCH_CHIP_LPC4337JET100)
# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1024)
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
# define LPC43_AHBSRAM_BANK2_SIZE (16*1024)
# define LPC43_EEPROM_SIZE (16*1024) /* 16Kb EEPROM */
# define LPC43_NLCD (0) /* Has LCD controller */
# define LPC43_ETHERNET (1) /* One Ethernet controller */
# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
# define LPC43_USB1 (1) /* Have USB1 (Host, Device) */
# define LPC43_USB1_ULPI (0) /* Have USB1 (Host, Device) with ULPI I/F */
# define LPC43_MCPWM (0) /* One PWM interface */
# define LPC43_QEI (0) /* One Quadrature Encoder interface */
# define LPC43_NUSARTS (4) /* Three USARTs + 1 UART */
# define LPC43_NSSP (2) /* Two SSP controllers */
# define LPC43_NTIMERS (4) /* Four Timers */
# define LPC43_NI2C (2) /* Two I2C controllers */
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (4) /* Four ADC channels */
#else
# error "Unsupported LPC43xx chip"
#endif
arch/arm/include/stm32/chip.h
+39 -1
View File
@@ -1568,7 +1568,7 @@
# define STM32_NGTIMNDMA 3 /* 16-bit general timers TIM9-11 without DMA */
# define STM32_NBTIM 0 /* No basic timers */
# define STM32_NDMA 2 /* DMA1-2 with 8 streams each*/
# define STM32_NSPI 4 /* SPI1-4 */
# define STM32_NSPI 5 /* SPI1-5 */
# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */
# define STM32_NUSART 6 /* Actually only 3: USART1, 2 and 6 */
# define STM32_NI2C 3 /* I2C1-3 */
@@ -1585,6 +1585,44 @@
# define STM32_NRNG 0 /* No Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F411VE) /* 100 pin LQFP/BGA package, 512Kb FLASH, 128KiB SRAM */
# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */
# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_MEDIUMPLUSDENSITY /* STM32L15xxC w/ 32/256 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
# undef CONFIG_STM32_STM32F30XX /* STM32F30xxx family */
# undef CONFIG_STM32_STM32F37XX /* STM32F37xxx family */
# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 1 /* One advanced timers TIM1 */
# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA
* 32-bit general timers TIM2 and 5 with DMA */
# define STM32_NGTIMNDMA 3 /* 16-bit general timers TIM9-11 without DMA */
# define STM32_NBTIM 0 /* No basic timers */
# define STM32_NDMA 2 /* DMA1-2 with 8 streams each*/
# define STM32_NSPI 5 /* SPI1-5 */
# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */
# define STM32_NUSART 6 /* Actually only 3: USART1, 2 and 6 */
# define STM32_NI2C 3 /* I2C1-3 */
# define STM32_NCAN 0 /* No CAN */
# define STM32_NSDIO 1 /* One SDIO interface */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBOTG 1 /* USB OTG FS (only) */
# define STM32_NGPIO 81 /* GPIOA-H */
# define STM32_NADC 1 /* One 12-bit ADC1, 16 channels */
# define STM32_NDAC 0 /* No DAC */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* No CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 0 /* No Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F405RG) /* LQFP 64 10x10x1.4 1024Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */
# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */
arch/arm/include/stm32/stm32f10xxx_irq.h
+1 -1
View File
@@ -120,7 +120,7 @@
# define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */
# define STM32_IRQ_SPI3 (67) /* 51: SPI3 global interrupt */
# define STM32_IRQ_UART4 (68) /* 52: USART2 global interrupt */
# define STM32_IRQ_UART5 (69) /* 53: USART5 global interrupt */
# define STM32_IRQ_UART5 (69) /* 53: UART5 global interrupt */
# define STM32_IRQ_TIM6 (70) /* 54: TIM6 global interrupt */
# define STM32_IRQ_TIM7 (71) /* 55: TIM7 global interrupt */
# define STM32_IRQ_DMA2CH1 (72) /* 56: DMA2 Channel 1 global interrupt */
arch/arm/src/Makefile
+7 -2
View File
@@ -1,7 +1,7 @@
############################################################################
# arch/arm/src/Makefile
#
# Copyright (C) 2007-2009, 2011-2012, 2014-2015 Gregory Nutt. All rights reserved.
# Copyright (C) 2007-2009, 2011-2012, 2014-2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@@ -127,6 +127,11 @@ BIN = libarch$(LIBEXT)
LDFLAGS += $(ARCHSCRIPT)
# Override in Make.defs if linker is not 'ld'
LDSTARTGROUP ?= --start-group
LDENDGROUP ?= --end-group
EXTRA_LIBS ?=
EXTRA_LIBPATHS ?=
LINKLIBS ?=
@@ -198,7 +203,7 @@ nuttx$(EXEEXT): $(HEAD_OBJ) board$(DELIM)libboard$(LIBEXT)
$(Q) echo "LD: nuttx"
$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \
-o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \
--start-group $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) --end-group
$(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
$(Q) $(NM) $(NUTTX) | \
grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
arch/arm/src/a1x/Kconfig
+8 -8
View File
@@ -21,49 +21,49 @@ menu "Allwinner A1X Peripheral Support"
config A1X_UART0
bool "UART 0"
default n
select ARCH_HAVE_UART0
select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART1
bool "UART 1"
default n
select ARCH_HAVE_UART1
select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART2
bool "UART 2"
default n
select ARCH_HAVE_UART2
select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART3
bool "UART 3"
default n
select ARCH_HAVE_UART3
select UART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART4
bool "UART 4"
default n
select ARCH_HAVE_UART4
select UART4_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART5
bool "UART 5"
default n
select ARCH_HAVE_UART5
select UART5_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART6
bool "UART 6"
default n
select ARCH_HAVE_UART6
select UART6_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART7
bool "UART 7"
default n
select ARCH_HAVE_UART7
select UART7_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_IR0
arch/arm/src/armv7-a/arm_addrenv.c
-4
View File
@@ -141,10 +141,6 @@
# error CONFIG_ARCH_HEAP_VBASE not aligned to section boundary
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_addrenv_kstack.c
-12
View File
@@ -121,18 +121,6 @@
#if defined(CONFIG_ARCH_ADDRENV) && defined(CONFIG_ARCH_KERNEL_STACK)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_addrenv_shm.c
-12
View File
@@ -55,18 +55,6 @@
#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_SHM)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_addrenv_ustack.c
-8
View File
@@ -116,14 +116,6 @@
# error CONFIG_ARCH_STACK_VBASE not aligned to section boundary
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_addrenv_utils.c
-12
View File
@@ -53,18 +53,6 @@
#ifdef CONFIG_ARCH_ADDRENV
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_allocpage.c
-8
View File
@@ -54,10 +54,6 @@
#include "pg_macros.h"
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
@@ -108,10 +104,6 @@ static L1ndx_t g_ptemap[CONFIG_PAGING_NPPAGED];
static bool g_pgwrap;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_assert.c
+7 -1
View File
@@ -334,7 +334,13 @@ static void up_dumpstate(void)
}
#endif
/* Then dump the registers (if available) */
#ifdef CONFIG_SMP
/* Show the CPU number */
lldbg("CPU%d:\n", up_cpu_index());
#endif
/* Then dump the CPU registers (if available) */
up_registerdump();
arch/arm/src/armv7-a/arm_checkmapping.c
-12
View File
@@ -51,18 +51,6 @@
#ifdef CONFIG_PAGING
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_coherent_dcache.c
-12
View File
@@ -46,18 +46,6 @@
#include <nuttx/arch.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_copyfullstate.c
-12
View File
@@ -44,18 +44,6 @@
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_cpuidlestack.c
+6 -2
View File
@@ -47,7 +47,7 @@
#include "smp.h"
#include "up_internal.h"
#if defined(CONFIG_SMP) && CONFIG_SMP_NCPUS > 1
#ifdef CONFIG_SMP
/****************************************************************************
* Pre-processor Definitions
@@ -61,6 +61,7 @@
* Private Data
****************************************************************************/
#if CONFIG_SMP_NCPUS > 1
static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
{
0
@@ -72,6 +73,7 @@ static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
#endif /* CONFIG_SMP_NCPUS > 3 */
#endif /* CONFIG_SMP_NCPUS > 2 */
};
#endif
/****************************************************************************
* Public Functions
@@ -122,6 +124,7 @@ static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
{
#if CONFIG_SMP_NCPUS > 1
uintptr_t stack_alloc;
uintptr_t top_of_stack;
@@ -138,8 +141,9 @@ int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
tcb->adj_stack_size = SMP_STACK_SIZE;
tcb->stack_alloc_ptr = (FAR uint32_t *)stack_alloc;
tcb->adj_stack_ptr = (FAR uint32_t *)top_of_stack;
#endif
return OK;
}
#endif /* CONFIG_SMP && CONFIG_SMP_NCPUS > 1 */
#endif /* CONFIG_SMP */
arch/arm/src/armv7-a/arm_cpustart.c
+46 -1
View File
@@ -46,10 +46,42 @@
#include "up_internal.h"
#include "gic.h"
#include "cp15_cacheops.h"
#include "sched/sched.h"
#ifdef CONFIG_SMP
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: arm_registerdump
****************************************************************************/
#if 0 /* Was useful in solving some startup problems */
static inline void arm_registerdump(FAR struct tcb_s *tcb)
{
int regndx;
lldbg("CPU%d:\n", up_cpu_index());
/* Dump the startup registers */
for (regndx = REG_R0; regndx <= REG_R15; regndx += 8)
{
uint32_t *ptr = (uint32_t *)&tcb->xcp.regs[regndx];
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regndx, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
lldbg("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
}
#else
# define arm_registerdump(tcb)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -72,12 +104,19 @@
int arm_start_handler(int irq, FAR void *context)
{
FAR struct tcb_s *tcb = this_task();
FAR struct tcb_s *tcb;
sllvdbg("CPU%d Started\n", up_cpu_index());
/* Reset scheduler parameters */
tcb = this_task();
sched_resume_scheduler(tcb);
/* Dump registers so that we can see what is going to happen on return */
arm_registerdump(tcb);
/* Then switch contexts. This instantiates the exception context of the
* tcb at the head of the assigned task list. In this case, this should
* be the CPUs NULL task.
@@ -116,8 +155,14 @@ int arm_start_handler(int irq, FAR void *context)
int up_cpu_start(int cpu)
{
sllvdbg("Starting CPU%d\n", cpu);
DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
/* Make the content of CPU0 L1 cache has been written to coherent L2 */
cp15_clean_dcache(CONFIG_RAM_START, CONFIG_RAM_END - 1);
/* Execute SGI1 */
return arm_cpu_sgi(GIC_IRQ_SGI1, (1 << cpu));
arch/arm/src/armv7-a/arm_doirq.c
-16
View File
@@ -52,22 +52,6 @@
#include "group/group.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_elf.c
-12
View File
@@ -48,18 +48,6 @@
#include <nuttx/arch.h>
#include <nuttx/binfmt/elf.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_fullcontextrestore.S
-16
View File
@@ -44,28 +44,12 @@
.file "arm_fullcontextrestore.S"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Symbols
****************************************************************************/
.globl up_fullcontextrestore
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_gicv2.c
+89 -12
View File
@@ -166,12 +166,12 @@ void arm_gic_initialize(void)
/* Registers with 8-bits per interrupt */
putreg32(0x80808080, GIC_ICDIPR(0)); /* SGI[3:0] priority */
putreg32(0x80808080, GIC_ICDIPR(4)); /* SGI[4:7] priority */
putreg32(0x80808080, GIC_ICDIPR(8)); /* SGI[8:11] priority */
putreg32(0x80808080, GIC_ICDIPR(12)); /* SGI[12:15] priority */
putreg32(0x80000000, GIC_ICDIPR(24)); /* PPI[0] priority */
putreg32(0x80808080, GIC_ICDIPR(28)); /* PPI[1:4] priority */
putreg32(0x80808080, GIC_ICDIPR(0)); /* SGI[3:0] priority */
putreg32(0x80808080, GIC_ICDIPR(4)); /* SGI[4:7] priority */
putreg32(0x80808080, GIC_ICDIPR(8)); /* SGI[8:11] priority */
putreg32(0x80808080, GIC_ICDIPR(12)); /* SGI[12:15] priority */
putreg32(0x80000000, GIC_ICDIPR(24)); /* PPI[0] priority */
putreg32(0x80808080, GIC_ICDIPR(28)); /* PPI[1:4] priority */
/* Set the binary point register.
*
@@ -211,7 +211,16 @@ void arm_gic_initialize(void)
#endif
#if defined(CONFIG_ARCH_TRUSTZONE_SECURE) || defined(CONFIG_ARCH_TRUSTZONE_BOTH)
#if defined(CONFIG_ARCH_TRUSTZONE_SECURE)
/* Set FIQn=1 if secure interrupts are to signal using nfiq_c.
*
* NOTE: Only for processors that operate in secure state.
* REVISIT: Do I need to do this?
*/
//iccicr |= GIC_ICCICRS_FIQEN;
#elif defined(CONFIG_ARCH_TRUSTZONE_BOTH)
/* Set FIQn=1 if secure interrupts are to signal using nfiq_c.
*
* NOTE: Only for processors that operate in secure state.
@@ -221,25 +230,35 @@ void arm_gic_initialize(void)
iccicr |= GIC_ICCICRS_FIQEN;
#endif
#if defined(ONFIG_ARCH_TRUSTZONE_BOTH)
#if defined(CONFIG_ARCH_TRUSTZONE_SECURE)
/* Program the AckCtl bit to select the required interrupt acknowledge
* behavior.
*
* NOTE: Only for processors that operate in both secure and non-secure
* state.
* REVISIT: I don't yet fully understand this setting.
* REVISIT: This is here only for superstituous reasons. I don't think
* I need this setting in this configuration.
*/
// iccicr |= GIC_ICCICRS_ACKTCTL;
iccicr |= GIC_ICCICRS_ACKTCTL;
#elif defined(CONFIG_ARCH_TRUSTZONE_BOTH)
/* Program the AckCtl bit to select the required interrupt acknowledge
* behavior.
*
* NOTE: Only for processors that operate in both secure and non-secure
* state.
*/
iccicr |= GIC_ICCICRS_ACKTCTL;
/* Program the SBPR bit to select the required binary pointer behavior.
*
* NOTE: Only for processors that operate in both secure and non-secure
* state.
* REVISIT: I don't yet fully understand this setting.
*/
// iccicr |= GIC_ICCICRS_CBPR;
iccicr |= GIC_ICCICRS_CBPR;
#endif
#if defined(CONFIG_ARCH_TRUSTZONE_SECURE) || defined(CONFIG_ARCH_TRUSTZONE_BOTH)
@@ -291,9 +310,15 @@ void arm_gic_initialize(void)
* bypass.
*/
#if 0 /* REVISIT -- I don't know why this needs to be like this */
iccicr |= (GIC_ICCICRS_ENABLEGRP0 | GIC_ICCICRS_FIQBYPDISGRP0 |
GIC_ICCICRS_IRQBYPDISGRP0 | GIC_ICCICRS_FIQBYPDISGRP1 |
GIC_ICCICRS_IRQBYPDISGRP1);
#else
iccicr |= (GIC_ICCICRS_ENABLEGRP0 | GIC_ICCICRS_ENABLEGRP1 |
GIC_ICCICRS_FIQBYPDISGRP0 | GIC_ICCICRS_IRQBYPDISGRP0 |
GIC_ICCICRS_FIQBYPDISGRP1 | GIC_ICCICRS_IRQBYPDISGRP1);
#endif
icddcr = GIC_ICDDCR_ENABLEGRP0;
#elif defined(CONFIG_ARCH_TRUSTZONE_BOTH)
@@ -498,4 +523,56 @@ int up_prioritize_irq(int irq, int priority)
return -EINVAL;
}
/****************************************************************************
* Name: arm_gic_irq_trigger
*
* Description:
* Set the trigger type for the specified IRQ source and the current CPU.
*
* Since this API is not supported on all architectures, it should be
* avoided in common implementations where possible.
*
* Input Paramters:
* irq - The interrupt request to modify.
* edge - False: Active HIGH level sensitive, True: Rising edge sensitive
*
* Returned Value:
* Zero (OK) on success; a negated errno value is returned on any failure.
*
****************************************************************************/
int arm_gic_irq_trigger(int irq, bool edge)
{
uintptr_t regaddr;
uint32_t regval;
uint32_t intcfg;
if (irq > GIC_IRQ_SGI15 && irq < NR_IRQS)
{
/* Get the address of the Interrupt Configuration Register for this
* irq.
*/
regaddr = GIC_ICDICFR(irq);
/* Get the new Interrupt configuration bit setting */
intcfg = (edge ? (INT_ICDICFR_EDGE | INT_ICDICFR_1N) : INT_ICDICFR_1N);
/* Write the correct interrupt trigger to the Interrupt Configuration
* Register.
*/
regval = getreg32(regaddr);
regval &= ~GIC_ICDICFR_ID_MASK(irq);
regval |= GIC_ICDICFR_ID(irq, intcfg);
putreg32(regval, regaddr);
return OK;
}
return -EINVAL;
}
#endif /* CONFIG_ARMV7A_HAVE_GICv2 */
arch/arm/src/armv7-a/arm_initialstate.c
-12
View File
@@ -48,18 +48,6 @@
#include "up_internal.h"
#include "up_arch.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_mmu.c
-12
View File
@@ -44,18 +44,6 @@
#include "cache.h"
#include "mmu.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_pgalloc.c
-7
View File
@@ -54,13 +54,6 @@
#ifdef CONFIG_BUILD_KERNEL
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
arch/arm/src/armv7-a/arm_pginitialize.c
-12
View File
@@ -49,18 +49,6 @@
#ifdef CONFIG_PAGING
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_physpgaddr.c
-11
View File
@@ -55,17 +55,6 @@
#ifdef CONFIG_MM_PGALLOC
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_prefetchabort.c
-12
View File
@@ -61,18 +61,6 @@
#include "sched/sched.h"
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_schedulesigaction.c
-12
View File
@@ -53,18 +53,6 @@
#ifndef CONFIG_DISABLE_SIGNALS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_signal_dispatch.c
-12
View File
@@ -47,18 +47,6 @@
#if ((defined(CONFIG_BUILD_PROTECTED) && defined(__KERNEL__)) || \
defined(CONFIG_BUILD_KERNEL)) && !defined(CONFIG_DISABLE_SIGNALS)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_syscall.c
+1 -1
View File
@@ -77,7 +77,7 @@
#endif
/****************************************************************************
* Private Data
* Private Functions
****************************************************************************/
/****************************************************************************
arch/arm/src/armv7-a/arm_unblocktask.c
-12
View File
@@ -49,18 +49,6 @@
#include "clock/clock.h"
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_undefinedinsn.c
-12
View File
@@ -58,18 +58,6 @@
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_va2pte.c
-12
View File
@@ -52,18 +52,6 @@
#ifdef CONFIG_PAGING
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/arm_vectors.S
-8
View File
@@ -45,10 +45,6 @@
.file "arm_vectors.S"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Private Data
************************************************************************************/
@@ -69,10 +65,6 @@ g_fiqtmp:
.word 0 /* Saved spsr */
#endif
/************************************************************************************
* Assembly Macros
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
arch/arm/src/armv7-a/arm_virtpgaddr.c
-12
View File
@@ -43,18 +43,6 @@
#if defined(CONFIG_MM_PGALLOC) && defined(CONFIG_ARCH_PGPOOL_MAPPING)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/armv7-a/crt0.c
-8
View File
@@ -46,14 +46,6 @@
#ifdef CONFIG_BUILD_KERNEL
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
arch/arm/src/armv7-a/gic.h
+21 -1
View File
@@ -495,7 +495,7 @@
#define INT_ICDICFR_EDGE 2 /* Bit n+2: 1=Edge sensitive */
#define GIC_ICDICFR_ID_SHIFT(n) GIC_SHIFT16(n)
#define GIC_ICDICFR_ID_MASK(n) GIC_MASK16(n
#define GIC_ICDICFR_ID_MASK(n) GIC_MASK16(n)
# define GIC_ICDICFR_ID(n,c) ((uint32_t)(c) << GIC_SHIFT16(n))
/* PPI Status Register */
@@ -720,6 +720,26 @@ void arm_gic0_initialize(void);
void arm_gic_initialize(void);
/****************************************************************************
* Name: arm_gic_irq_trigger
*
* Description:
* Set the trigger type for the specificd IRQ source and the current CPU.
*
* Since this API is not supported on all architectures, it should be
* avoided in common implementations where possible.
*
* Input Paramters:
* irq - The interrupt request to modify.
* edge - False: Active HIGH level sensitive, True: Rising edge sensitive
*
* Returned Value:
* Zero (OK) on success; a negated errno value is returned on any failure.
*
****************************************************************************/
int arm_gic_irq_trigger(int irq, bool edge);
/****************************************************************************
* Name: arm_decodeirq
*
arch/arm/src/common/up_createstack.c
+2 -2
View File
@@ -220,7 +220,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
if (tcb->stack_alloc_ptr)
{
#if defined(CONFIG_TLS) && defined(CONFIG_STACK_COLORATION)
uinptr_t stack_base;
uintptr_t stack_base;
#endif
size_t top_of_stack;
size_t size_of_stack;
@@ -264,7 +264,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
* water marks.
*/
stackbase = (uintptr_t)tcb->stack_alloc_ptr + sizeof(struct tls_info_s);
stack_base = (uintptr_t)tcb->stack_alloc_ptr + sizeof(struct tls_info_s);
stack_size = tcb->adj_stack_size - sizeof(struct tls_info_s);
up_stack_color((FAR void *)stack_base, stack_size);
arch/arm/src/common/up_usestack.c
+7 -1
View File
@@ -174,7 +174,13 @@ int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size)
* value that we can use later to test for high water marks.
*/
# warning Missing logic
#ifdef CONFIG_TLS
up_stack_color(
(FAR void *)((uintptr_t)tcb->stack_alloc_ptr + sizeof(struct tls_info_s)),
tcb->adj_stack_size - sizeof(struct tls_info_s));
#else
up_stack_color(tcb->stack_alloc_ptr, tcb->adj_stack_size);
#endif
#endif
return OK;
arch/arm/src/dm320/Kconfig
+2 -2
View File
@@ -11,12 +11,12 @@ menu "DM320 Peripheral Selections"
config DM320_UART0
bool
default y
select ARCH_HAVE_UART0
select UART0_SERIALDRIVER
config DM320_UART1
bool
default y
select ARCH_HAVE_UART1
select UART1_SERIALDRIVER
endmenu # DM320 Peripheral Selections
endif # ARCH_CHIP_DM320
arch/arm/src/efm32/Kconfig
+7 -10
View File
@@ -157,45 +157,42 @@ config EFM32_BITBAND
config EFM32_USART0
bool "USART0"
default n
select ARCH_HAVE_USART0
select ARCH_HAVE_SERIAL_TERMIOS
config EFM32_USART1
bool "USART1"
default n
select ARCH_HAVE_USART1
select ARCH_HAVE_SERIAL_TERMIOS
config EFM32_USART2
bool "USART2"
default n
depends on EFM32_HAVE_USART2
select ARCH_HAVE_USART2
select ARCH_HAVE_SERIAL_TERMIOS
config EFM32_UART0
bool "UART0"
default n
select ARCH_HAVE_UART0
select UART0_SERIALDRIVER
select EFM32_UART
config EFM32_UART1
bool "UART1"
default n
select ARCH_HAVE_UART1
select UART1_SERIALDRIVER
select EFM32_UART
config EFM32_LEUART0
bool "Low energy UART0"
default n
select ARCH_HAVE_OTHER_UART
select OTHER_UART_SERIALDRIVER
select EFM32_LEUART
config EFM32_LEUART1
bool "Low energy UART1"
default n
depends on EFM32_HAVE_LEUART1
select ARCH_HAVE_OTHER_UART
select OTHER_UART_SERIALDRIVER
select EFM32_LEUART
config EFM32_OTGFS
@@ -261,7 +258,7 @@ choice
config EFM32_USART0_ISUART
bool "USART0 is a UART"
select USART0_ISUART
select USART0_SERIALDRIVER
select EFM32_USART_ISUART
config EFM32_USART0_ISSPI
@@ -277,7 +274,7 @@ choice
config EFM32_USART1_ISUART
bool "USART1 is a UART"
select USART1_ISUART
select USART1_SERIALDRIVER
select EFM32_USART_ISUART
config EFM32_USART1_ISSPI
@@ -293,7 +290,7 @@ choice
config EFM32_USART2_ISUART
bool "USART2 is a UART"
select USART2_ISUART
select USART2_SERIALDRIVER
select EFM32_USART_ISUART
config EFM32_USART2_ISSPI
arch/arm/src/efm32/efm32_adc.c
+45 -12
View File
@@ -2,7 +2,9 @@
* arch/arm/src/efm32/efm32_adc.c
*
* Copyright (C) 2014 Bouteville Pierre-Noel. All rights reserved.
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Bouteville Pierre-Noel <pnb990@gmail.com>
* Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -63,9 +65,9 @@
#include "efm32.h"
#include "efm32_adc.h"
/* ADC "upper half" support must be enabled */
/* ADC "lower half" support must be enabled */
#ifdef CONFIG_ADC
#ifdef CONFIG_EFM32_ADC
/* Some ADC peripheral must be enabled */
@@ -100,6 +102,7 @@
struct efm32_dev_s
{
FAR const struct adc_callback_s *cb;
uint8_t irq; /* Interrupt generated by this ADC block */
uint8_t nchannels; /* Number of channels */
uint8_t current; /* Current ADC channel being converted */
@@ -124,6 +127,8 @@ static int adc_interrupt(FAR struct adc_dev_s *dev);
/* ADC Driver Methods */
static int adc_bind(FAR struct adc_dev_s *dev,
FAR const struct adc_callback_s *callback);
static void adc_reset(FAR struct adc_dev_s *dev);
static int adc_setup(FAR struct adc_dev_s *dev);
static void adc_shutdown(FAR struct adc_dev_s *dev);
@@ -148,6 +153,7 @@ static void adc_startconv(FAR struct efm32_dev_s *priv, bool enable);
static const struct adc_ops_s g_adcops =
{
.ao_bind = adc_bind,
.ao_reset = adc_reset,
.ao_setup = adc_setup,
.ao_shutdown = adc_shutdown,
@@ -790,7 +796,7 @@ static void adc_startconv(struct efm32_dev_s *priv, bool enable)
#endif
/****************************************************************************
* Name: adc_reset
* Name: adc_hw_reset
*
* Description:
* Deinitializes the ADCx peripheral registers to their default
@@ -873,6 +879,25 @@ static void adc_enable(FAR struct efm32_dev_s *priv, bool enable)
adc_putreg(priv, EFM32_ADC_CR2_OFFSET, regval);
}
/****************************************************************************
* Name: adc_bind
*
* Description:
* Bind the upper-half driver callbacks to the lower-half implementation. This
* must be called early in order to receive ADC event notifications.
*
****************************************************************************/
static int adc_bind(FAR struct adc_dev_s *dev,
FAR const struct adc_callback_s *callback)
{
FAR struct efm32_dev_s *priv = (FAR struct efm32_dev_s *)dev->ad_priv;
DEBUGASSERT(priv != NULL);
priv->cb = callback;
return OK;
}
/****************************************************************************
* Name: adc_reset
*
@@ -1180,14 +1205,21 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
value = adc_getreg(priv, EFM32_ADC_DR_OFFSET);
value &= ADC_DR_DATA_MASK;
/* Give the ADC data to the ADC driver. adc_receive accepts 3 parameters:
*
* 1) The first is the ADC device instance for this ADC block.
* 2) The second is the channel number for the data, and
* 3) The third is the converted data for the channel.
*/
/* Verify that the upper-half driver has bound its callback functions */
adc_receive(dev, priv->chanlist[priv->current], value);
if (priv->cb != NULL)
{
/* Give the ADC data to the ADC driver. The ADC receive method
* accepts 3 parameters:
*
* 1) The first is the ADC device instance for this ADC block.
* 2) The second is the channel number for the data, and
* 3) The third is the converted data for the channel.
*/
DEBUGASSERT(priv->cb->au_receive != NULL);
priv->cb->au_receive(dev, priv->chanlist[priv->current], value);
}
/* Set the channel number of the next channel that will complete conversion */
@@ -1272,7 +1304,8 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
/* Configure the selected ADC */
priv = dev->ad_priv;
priv = dev->ad_priv;
priv->cb = NULL;
DEBUGASSERT(nchannels <= ADC_MAX_SAMPLES);
priv->nchannels = nchannels;
@@ -1283,4 +1316,4 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
#endif /* CONFIG_EFM32_EFM32GG */
#endif /* CONFIG_EFM32_ADC1 */
#endif /* CONFIG_ADC */
#endif /* CONFIG_EFM32_ADC */
arch/arm/src/imx1/Kconfig
+3 -3
View File
@@ -12,17 +12,17 @@ menu "iMX.1 Peripheral Selection"
config IMX1_UART1
bool "UART1"
default n
select ARCH_HAVE_UART1
select UART1_SERIALDRIVER
config IMX1_UART2
bool "UART2"
default n
select ARCH_HAVE_UART2
select UART2_SERIALDRIVER
config IMX1_UART3
bool "UART3"
default n
select ARCH_HAVE_UART3
select UART3_SERIALDRIVER
config IMX1_SPI1
bool "SPI1"
arch/arm/src/imx1/imx_cspi.h
+2 -2
View File
@@ -74,7 +74,7 @@
#define IMX_CSPI1_SPIDMA (IMX_CSPI1_VBASE + CSPI_DMA_OFFSET)
#define IMX_CSPI1_SPIRESET (IMX_CSPI1_VBASE + CSPI_RESET_OFFSET)
/* CSPI1 */
/* CSPI2 */
#define IMX_CSPI2_RXD (IMX_CSPI2_VBASE + CSPI_RXD_OFFSET)
#define IMX_CSPI2_TXD (IMX_CSPI2_VBASE + CSPI_TXD_OFFSET)
@@ -138,7 +138,7 @@
/* CSPI Sample Period Control Register */
#define CSPI_SPCR_WAIT_SHIFT 0
#define CSPI_SPCR_WAIT_MASK (0x7ff << CSPI_CTRL_DATARATE_SHIFT)
#define CSPI_SPCR_WAIT_MASK (0x7ff << CSPI_SPCR_WAIT_SHIFT)
#define CSPI_SPCR_CSRC (1 << 15) /* Bit 15: 1:32768 or 32 kHz clock source */
/* CSPI DMA Control Register */
arch/arm/src/imx6/Kconfig
+34 -5
View File
@@ -54,32 +54,61 @@ config IMX6_HAVE_HDCP
endmenu # "iMX.6 Chip Selection"
config IMX6_ECSPI
bool
default n
menu "iMX.6 Peripheral Selection"
config IMX6_ECSPI1
bool "ECSPI1"
default n
select IMX6_ECSPI
config IMX6_ECSPI2
bool "ECSPI2"
default n
select IMX6_ECSPI
config IMX6_ECSPI3
bool "ECSPI3"
default n
select IMX6_ECSPI
config IMX6_ECSPI4
bool "ECSPI4"
default n
select IMX6_ECSPI
config IMX6_ECSPI5
bool "ECSPI5"
default n
select IMX6_ECSPI
config IMX6_UART1
bool "UART1"
default n
select ARCH_HAVE_UART1
select UART1_SERIALDRIVER
config IMX6_UART2
bool "UART2"
default n
select ARCH_HAVE_UART2
select UART2_SERIALDRIVER
config IMX6_UART3
bool "UART3"
default n
select ARCH_HAVE_UART3
select UART3_SERIALDRIVER
config IMX6_UART4
bool "UART4"
default n
select ARCH_HAVE_UART4
select UART4_SERIALDRIVER
config IMX6_UART5
bool "UART5"
default n
select ARCH_HAVE_UART5
select UART5_SERIALDRIVER
config IMX6_SPI1
bool "SPI1"

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