diff --git a/ChangeLog b/ChangeLog
index 6504de162ef..dab311760b5 100755
--- a/ChangeLog
+++ b/ChangeLog
@@ -11729,3 +11729,87 @@
STM32F746ZG MCU. From Kconstantin Berezenko (2015-05-12).
* arch/arm-src/armv7-a: Complete re-design of logic to initialize each
CPUn, n > 0, when CONFIG_SMP=y (2016-05-13).
+ * arch/arm/src/imx6 and configs/sabre-6quad: The basic i.MX6 port is
+ complete. This is a very minimal port at present and probably still
+ has some as-of-yet-undiscovered issues (2016-05-17).
+ * arch/*/Makefile: Add definitions that can be overrided to use GCC
+ instead of LD in the final link. From Paul Alexander Patience
+ (2016-05-18) .
+ * arch/arm/src/stm32, stm32l4, and stm32f7 serial: Add support for
+ compliant BSD-style breaks. From David Sidrane (2016-05-18).
+ * enter/leave_critical_section() may attempt to access task lists before
+ they have been initialized in the SMP configuration (2016-05-18).
+ * configs/stm32f103-minimum: Add support for this minimual STM32F103CBT6
+ "blue" board. From Alan Carvalho de Assis (2016-05-18).
+ * arch/arm/src/sam* Watchdogs: Rename up_wdginitialize() to something
+ more appropriate for an internal, MCU-specific function (2016-05-18).
+ * configs/*/src/*_watchdog.c: Remove all implementations of
+ up_wdginitialize() which was only used by apps/examples/watchdog.
+ That internal OS function is no longer called from application code.
+ If you want to use the watchdog example, you will need to configure
+ the watchdog driver by calling the appropriate, MCU-specific driver
+ configuration function from your board initialization logic
+ (2016-05-18).
+ * arch/srm/src/stm32l4: Add CAN support for STM32L4. From Sebastien
+ Lorquet (2016-05-19).
+ * arch/arm/src/samv7: Adds a JTAG config and ERASE config to Kconfig to
+ set the CCFG_SYSIO SYSIO Pins. From Davide Sidrane (2016-05-19).
+ * arch/sim/src: Enhance networking support for the simulation under Linux.
+ Includes updated support for Linux TUN/TAP, and the addition of support
+ for Linux bridge devices. From Steve (2016-05-20).
+ * configs/stm32f411e-disco: Add basic configuration for stm32f411e-disco
+ board with STM32F411VE chip. From Konstantin Berezenko (2016-05-20).
+ * i.MX6 Sabre-6Quad: Basic SMP NSH configuration is now working. But
+ this is probably only because the SMP NSH case does not stress the
+ logic. There are know outstanding SMP issues as noted in the
+ Sabre-6Quad README.txt file (2016-05-22).
+ * configs/sabre-6quad: Add an SMP configuration; Enable procfs in all
+ configurations (2016-05-22).
+ * include/nuttx/crypto/aes.h: Modifications to the crypto API needed
+ for LPC43xx. From Alexander Vasiljev (2016-05-23).
+ * arch/arm/src/lpc32xx: Add AES support. From Alexander Vasiljev
+ (2016-05-24).
+ * configs/*/src/tiva_timer.c: Tiva boards: Fix a naming collision,
+ rename board-specific function from tiva_timer_initialize() to
+ tiva_timer_configure() to remove conflict (2016-05-23).
+ * arch/arm/src/sam*: Ensure that the TWIHS (i2c) hw get's its clock
+ set when the sequence of sam_i2cbus_initialize(),
+ sam_i2cbus_uninitialize(), then sam_i2cbus_initialize() or twi_reset()
+ is called. I found this a while back in the stm32 family, so there
+ may be more arch-es with this sort of bug. I suppose any driver that
+ has the notion of "do not set the freq if it is already set" could be
+ suspect. From David Sidrane (2016-05-23).
+ * arch/arm/src/samv7: Add the up_systemreset interface to the samv7
+ arch. The approach is slightly different in that: 1) It enables
+ ARCH_HAVE_RESET and allows the user to set if, and for how long, to
+ drive External nRST signal. It also does not contain a default
+ board_reset, as that really should be done in the config's src if
+ CONFIG_BOARDCTL_RESET is defined. From David Sidrane (2016-05-23).
+ * arch/arm/include/lpc43xx and src/lpc43xx: Adds definitions for the
+ LPC4337jet100 chip. From Alexander Vasiljev (2016-05-24).
+ * Many files: board_app_initialize() now accepts an argument that may
+ be used to support initialization in different configurations
+ (2016-05-24).
+ * arch/arm/src/samv7: Remove disabling of whole USB on suspend of USBHS.
+ This fix removes the disabling of the whole USB peripheral on suspend
+ interrupt. Its enough to freeze the clock instead. When disabling the
+ whole peripheral, the next wakeup-interrupt comes up with an disabled
+ clocking. The unfreeze clock has no effect, because the master clock
+ is disabled. This makes all registers, including the IDR unwriteable
+ and the IRQ falls in an endless loop blocking the whole system.
+ Furthermore the disabling of the peripheral clock prevents hotplugging
+ or reconnecting the USB. From Frank Benkert (2015-05-25).
+ * drivers/lcd: Add support for PCF8574 LCD Backpack driver. This driver
+ supports an interface board that is based on the PCF8574 io expander
+ and supports the HD44780-based (or compatible) LCD modules. There
+ are a myriad of different vendors of such, but they are principally
+ the same, save wiring and minor features like jumpers for I2C
+ addresses. This driver supports known and unknown variants. From
+ Dave (ziggurat29, 2013-6-26).
+ * arch/arm/stm32: Add support for a custom 1-wire driver. The serial
+ driver already supports a 1-wire interface, but this driver uses the
+ same serial logic to implement a lower half driver much like the I2C
+ lower half driver. From Aleksandr Vyhovanec (2015-05-25).
+ * fs/: Add logic to detach a file structure from a file descriptor.
+ This is for use only within the OS. It permits an open file or driver
+ to be used across multiple threads (2016-05-26).
diff --git a/Documentation/README.html b/Documentation/README.html
index ce2d5eef2a5..1c13c8abdd8 100644
--- a/Documentation/README.html
+++ b/Documentation/README.html
@@ -8,7 +8,7 @@
NuttX README Files
- Last Updated: May 12, 2016
+ Last Updated: May 26, 2016
|
@@ -251,10 +251,14 @@ nuttx/
| | `- README.txt
| |- stm32_tiny/
| | `- README.txt
+ | |- stm32f103-minumum/
+ | | `- README.txt
| |- stm32f3discovery/
| | `- README.txt
| |- stm32f4discovery/
| | `- README.txt
+ | |- stm32f411e-disco/
+ | | `- README.txt
| |- stm32f429i-disco/
| | |- ide/ltcd/uvision/README.txt
| | |- ltdc/README.txt
@@ -312,7 +316,8 @@ nuttx/
| |- eeprom/
| | `- README.txt
| |- lcd/
- | | `- README.txt
+ | | |- README.txt
+ | | `- pcf8574_lcd_backpack_readme.txt
| |- mtd/
| | `- README.txt
| |- sensors/
diff --git a/README.txt b/README.txt
index ed3d0141f56..db0e5e6c10b 100644
--- a/README.txt
+++ b/README.txt
@@ -1426,10 +1426,14 @@ nuttx/
| | `- README.txt
| |- stm32_tiny/
| | `- README.txt
+ | |- stm32f103-minumum/
+ | | `- README.txt
| |- stm32f3discovery/
| | `- README.txt
| |- stm32f4discovery/
| | `- README.txt
+ | |- stm32f411e-disco/
+ | | `- README.txt
| |- stm32f429i-disco/
| | |- ide/ltcd/uvision/README.txt
| | |- ltdc/README.txt
@@ -1487,7 +1491,8 @@ nuttx/
| |- eeprom/
| | `- README.txt
| |- lcd/
- | | `- README.txt
+ | | | README.txt
+ | | `- pcf8574_lcd_backpack_readme.txt
| |- mtd/
| | `- README.txt
| |- sensors/
diff --git a/TODO b/TODO
index 290dc13ef46..eeb3e6d29dd 100644
--- a/TODO
+++ b/TODO
@@ -1,20 +1,20 @@
-NuttX TODO List (Last updated March 31, 2016)
+NuttX TODO List (Last updated May 28, 2016)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This file summarizes known NuttX bugs, limitations, inconsistencies with
standards, things that could be improved, and ideas for enhancements. This
TODO list does not include issues associated with individual boar ports. See
-altheso individual README.txt files in the configs/ sub-directories for
-issues reated to each board port.
+also the individual README.txt files in the configs/ sub-directories for
+issues related to each board port.
-nuttx/
+nuttx/:
(13) Task/Scheduler (sched/)
(1) Memory Management (mm/)
(3) Signals (sched/signal, arch/)
(2) pthreads (sched/pthread)
(0) Message Queues (sched/mqueue)
- (8) Kernel/Protected Build
+ (9) Kernel/Protected Build
(3) C++ Support
(6) Binary loaders (binfmt/)
(12) Network (net/, drivers/net)
@@ -23,16 +23,16 @@ nuttx/
(11) Libraries (libc/, libm/)
(11) File system/Generic drivers (fs/, drivers/)
(8) Graphics subsystem (graphics/)
- (1) Pascal add-on (pcode/)
(1) Build system / Toolchains
- (4) Linux/Cywgin simulation (arch/sim)
+ (3) Linux/Cywgin simulation (arch/sim)
(4) ARM (arch/arm/)
-apps/
+apps/ and other Add-Ons:
(3) Network Utilities (apps/netutils/)
(2) NuttShell (NSH) (apps/nshlib)
(1) System libraries apps/system (apps/system)
+ (1) Pascal add-on (pcode/)
(4) Other Applications & Tests (apps/examples/)
o Task/Scheduler (sched/)
@@ -70,7 +70,7 @@ o Task/Scheduler (sched/)
Title: GET_ENVIRON_PTR()
Description: get_environ_ptr() (sched/sched_getenvironptr.c) is not implemented.
The representation of the environment strings selected for
- NutX is not compatible with the operation. Some significant
+ NuttX is not compatible with the operation. Some significant
re-design would be required to implement this function and that
effort is thought to be not worth the result.
Status: Open. No change is planned.
@@ -81,7 +81,7 @@ o Task/Scheduler (sched/)
Status: Open
Priority: Low -- There is no plan to implement this.
- Title: INCOMPATIBILITES WITH execv() AND execl()
+ Title: INCOMPATIBILITIES WITH execv() AND execl()
Description: Simplified 'execl()' and 'execv()' functions are provided by
NuttX. NuttX does not support processes and hence the concept
of overlaying a tasks process image with a new process image
@@ -175,7 +175,7 @@ o Task/Scheduler (sched/)
Yahoo! Groups message 7726: "I think that the system
should be required to handle pthread_cancel safely in
all cases. In the NuttX model, a task is like a Unix
- process and a pthread is like a Unix thread. Cancelling
+ process and a pthread is like a Unix thread. Canceling
threads should always be safe (or at least as unsafe) as
under Unix because the model is complete for pthreads...
@@ -188,7 +188,7 @@ o Task/Scheduler (sched/)
"The patch I just incorporated is also insufficient. It
works only if the serial driver is shut down when the
- thread is cancelled. But what if there are other open
+ thread is canceled. But what if there are other open
references to the driver? Then the driver will not be
shut down, the semaphores will not be re-initialized, and
the semaphore counts will still be off by one.
@@ -202,7 +202,7 @@ o Task/Scheduler (sched/)
hooks so that given a semaphore it can traverse all
holders. What is needed would be logic so that given
a task, you can traverse all semaphores held by the task,
- releasing each semaphore cound held by the exiting task.
+ releasing each semaphore count held by the exiting task.
Nothing like this exists now so that solution is not
imminent.
@@ -228,16 +228,15 @@ o Task/Scheduler (sched/)
hidden behind simple accessor functions and so the internal
data structures can be changed if need with very little impact.
-
- Explicity refereence to the list strucutre are hidden behnid
+ Explicitly reference to the list structure are hidden behind
the macro this_task().
Status: Open
Priority: Low. Things are just the way that we want them for the way
that NuttX is used today.
-o Memory Managment (mm/)
- ^^^^^^^^^^^^^^^^^^^^^^
+o Memory Management (mm/)
+ ^^^^^^^^^^^^^^^^^^^^^^^
Title: FREE MEMORY ON TASK EXIT
Description: Add an option to free all memory allocated by a task when the
@@ -390,7 +389,7 @@ o pthreads (sched/pthreads)
Priority: Low -- about zero, probably not that useful. Priority inheritance is
already supported and is a much better solution. And it turns out
that priority protection is just about as complex as priority inheritance.
- Exerpted from my post in a Linked-In discussion:
+ Excerpted from my post in a Linked-In discussion:
"I started to implement this HLS/"PCP" semaphore in an RTOS that I
work with (http://www.nuttx.org) and I discovered after doing the
@@ -589,8 +588,21 @@ o Kernel/Protected Build
interrupt level callbacks into applications. This, of course,
will never work in anything but a non-secure, flat build.
Status: Open
- Priority: Medium. The driver is only usable with all of its features in a FLAT build.
-
+ Priority: Medium. The driver is only usable with all of its features
+ in a FLAT build.
+
+ Title: USER MODE TASKS CAN MODIFY PRIVILEGED TASKS
+ Description: Certain interfaces, such as sched_setparam(),
+ sched_setscheduler(), etc. can be used by user mode tasks to
+ modify the behavior of priviledged kernel threads.
+ task_delete() could even be used to kill a kernel thread.
+ For a truly secure system. Privileges need to be checked in
+ every interface that permits one thread to modify the
+ properties of another thread.
+ Status: Open
+ Priority: Low for most embedded systems but would be a critical need if
+ NuttX were used in a secure system.
+
o C++ Support
^^^^^^^^^^^
@@ -784,7 +796,7 @@ o Binary loaders (binfmt/)
to get fixed as needed for Windows native tool builds.
Title: TOOLCHAIN COMPATIBILITY PROBLEM
- Descripton: The older 4.3.3 compiler generates GOTOFF relocations to the constant
+ Description: The older 4.3.3 compiler generates GOTOFF relocations to the constant
strings, like:
.L3:
@@ -794,7 +806,7 @@ o Binary loaders (binfmt/)
.word .LC3(GOTOFF)
.word .LC4(GOTOFF)
- Where .LC0, LC1, LC2, LC3, and .LC4 are the labels correponding to strings in
+ Where .LC0, LC1, LC2, LC3, and .LC4 are the labels corresponding to strings in
the .rodata.str1.1 section. One consequence of this is that .rodata must reside
in D-Space since it will addressed relative to the GOT (see the section entitled
"Read-Only Data in RAM" at
@@ -880,7 +892,7 @@ o Network (net/, drivers/net)
RFC3678 (IGMPv3) suggests ioctl() commands to do this (SIOCSIPMSFILTER) but
also status that those APIs are historic. NuttX implements these ioctl
commands, but is non-standard because: (1) It does not support IGMPv3, and
- (2) it looks up drivers by their device name (eg., "eth0") vs IP address.
+ (2) it looks up drivers by their device name (e.g., "eth0") vs IP address.
Linux uses setsockopt() to control multicast group membership using the
IP_ADD_MEMBERSHIP and IP_DROP_MEMBERSHIP options. It also looks up drivers
@@ -896,7 +908,7 @@ o Network (net/, drivers/net)
that connection may time out. How should this be handled? Should the
connection be removed from the backlog if it is times out or is closed?
Or should it remain in the backlog with a status indication so that accept()
- can fail when it encounteres the invalid connection?
+ can fail when it encounters the invalid connection?
Status: Open
Priority: Medium. Important on slow applications that will not accept
connections promptly.
@@ -975,7 +987,7 @@ o Network (net/, drivers/net)
it is no longer needed. Perhaps there should be a delayed
call to unlink() (using a watchdog or the work queue). If
the driver is re-opened, the delayed unlink could be
- cancelled? Needs more thought.
+ canceled? Needs more thought.
NOTE: This is not an issue for Unix domain streams sockets:
The end-of-life of the FIFO is well determined when sockets
are disconnected and support for that case is fully implemented.
@@ -1020,7 +1032,7 @@ o USB (drivers/usbdev, drivers/usbhost)
that involves delays. This needs to be redesigned to eliminate these
delays. See logic conditioned on CONFIG_USBMSC_RACEWAR.
- If queuing of stall requests is supported by DCD then this workaround
+ If queuing of stall requests is supported by the DCD then this workaround
is not required. In this case, (1) the stall is not sent until all
write requests preceding the stall request are sent, (2) the stall is
sent, and then after the stall is cleared, (3) all write requests
@@ -1135,7 +1147,7 @@ o USB (drivers/usbdev, drivers/usbhost)
Priority: Medium-Low
Title: USB CDC/ACM HOST CLASS DRIVER
- Desciption: A CDC/ACM host class driver has been added. This has been
+ Description: A CDC/ACM host class driver has been added. This has been
testing by running the USB CDC/ACM host on an Olimex
LPC1766STK and using the configs/stm3210e-eval/usbserial
configuration (using the CDC/ACM device side driver). There
@@ -1374,7 +1386,7 @@ o File system / Generic drivers (fs/, drivers/)
Priority: Medium
Title: UNIFIED DESCRIPTOR REPRESENTATION
- Descripton: There are two separate ranges of descriptors for file and
+ Description: There are two separate ranges of descriptors for file and
socket descriptors: if a descriptor is in one range then it is
recognized as a file descriptor; if it is in another range
then it is recognized as a socket descriptor. These separate
@@ -1410,7 +1422,7 @@ o File system / Generic drivers (fs/, drivers/)
Status: Open
Priority: Low
- Title: FAT LONG FILENAME COMPATIBILTY
+ Title: FAT LONG FILENAME COMPATIBILITY
Description: Recently there have been reports that file with long file
names created by NuttX don't have long file names when viewed
on Windows. The long file name support has been around for a
@@ -1423,7 +1435,7 @@ o File system / Generic drivers (fs/, drivers/)
Description: I have seen cases where (1) long file names are enabled,
but (2) a short file name is created like:
- nsh> echo "This is another thest" >/mnt/sdcard/another.txt
+ nsh> echo "This is another test" >/mnt/sdcard/another.txt
But then on subsequent 'ls' operations, the file does not appear:
@@ -1472,7 +1484,7 @@ o File system / Generic drivers (fs/, drivers/)
4) When comparing the checksum in the long file name
entry with the checksum of the short file name, the
- checksum fails and the entire directlry sequence is
+ checksum fails and the entire directory sequence is
ignored by readder() logic. This the file does not
appear in the 'ls'.
@@ -1539,7 +1551,7 @@ o Graphics subsystem (graphics/)
Priority: Low, the need has not yet arisen.
Title: PER-WINDOW FRAMEBUFFERS
- Description: One of the most awkard things to handle in the NX windowing
+ Description: One of the most awkward things to handle in the NX windowing
system is the re-draw callback. This is difficult because it
requires ad hoc, custom logic to be able to do the redrawing
in most cases.
@@ -1567,26 +1579,6 @@ o Graphics subsystem (graphics/)
Priority: Low, not a serious issue but worth noting. There is no plan
to change this behavior.
-o Pascal Add-On (pcode/)
- ^^^^^^^^^^^^^^^^^^^^^^
-
- Title: P-CODES IN MEMORY UNTESTED
- Description: Need APIs to verify execution of P-Code from memory buffer.
- Status: Open
- Priority: Low
-
- Title: SMALLER LOADER AND OBJECT FORMAT
- Description: Loader and object format may be too large for some small
- memory systems. Consider ways to reduce memory footprint.
- Status: Open
- Priority: Medium
-
- Title: PDBG
- Description: Move the the pascal p-code debugger into the NuttX apps/ tree
- where it can be used from the NSH command line.
- Status: Open
- Priority: Low
-
o Build system
^^^^^^^^^^^^
@@ -1609,15 +1601,6 @@ o Other drivers (drivers/)
o Linux/Cywgin simulation (arch/sim)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
- Title: SIMULATOR NETWORKING SUPPORT
- Description: I never did get networking to work on the sim Linux target. On Linux,
- it tries to use the tap device (/dev/net/tun) to emulate an Ethernet
- NIC, but I never got it correctly integrated with the NuttX networking.
- NOTE: On Cygwin, the build uses the Cygwin WPCAP library and is, at
- least, partially functional (it has never been rigorously tested).
- Status: Open
- Priority: Low (unless you want to test networking features on the simulation).
-
Title: SIMULATOR HAS NO INTERRUPTS (NON-PREMPTIBLE)
Description: The current simulator implementation is has no interrupts and, hence,
is non-preemptible. Also, without simulated interrupt, there can
@@ -1765,7 +1748,7 @@ o ARM (arch/arm/)
But this has not been proven to be a solution.
- UPDATE: Other ARM architectures have a similer issue.
+ UPDATE: Other ARM architectures have a similar issue.
Status: Open
Priority: Low. The conditions of continuous interrupts is really the problem.
@@ -1823,7 +1806,7 @@ o NuttShell (NSH) (apps/nshlib)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Title: IFCONFIG AND MULTIPLE NETWORK INTERFACES
- Descripton: The ifconfig command will not behave correctly if an interface
+ Description: The ifconfig command will not behave correctly if an interface
is provided and there are multiple interfaces. It should only
show status for the single interface on the command line; it will
still show status for all interfaces.
@@ -1848,6 +1831,26 @@ o System libraries apps/system (apps/system)
Priority: Low (unless you are using mixed C-buffered I/O with readline and
fgetc, for example).
+o Pascal Add-On (pcode/)
+ ^^^^^^^^^^^^^^^^^^^^^^
+
+ Title: P-CODES IN MEMORY UNTESTED
+ Description: Need APIs to verify execution of P-Code from memory buffer.
+ Status: Open
+ Priority: Low
+
+ Title: SMALLER LOADER AND OBJECT FORMAT
+ Description: Loader and object format may be too large for some small
+ memory systems. Consider ways to reduce memory footprint.
+ Status: Open
+ Priority: Medium
+
+ Title: PDBG
+ Description: Move the the pascal p-code debugger into the NuttX apps/ tree
+ where it can be used from the NSH command line.
+ Status: Open
+ Priority: Low
+
o Other Applications & Tests (apps/examples/)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index fd960282a1d..6b6c046060d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -27,7 +27,7 @@ config ARCH_CHIP_C5471
bool "TMS320 C5471"
select ARCH_ARM7TDMI
select ARCH_HAVE_LOWVECTORS
- select ARCH_HAVE_OTHER_UART
+ select OTHER_UART_SERIALDRIVER
---help---
TI TMS320 C5471, A180, or DA180 (ARM7TDMI)
@@ -36,7 +36,7 @@ config ARCH_CHIP_CALYPSO
select ARCH_ARM7TDMI
select ARCH_HAVE_HEAP2
select ARCH_HAVE_LOWVECTORS
- select ARCH_HAVE_OTHER_UART
+ select OTHER_UART_SERIALDRIVER
select ARCH_HAVE_POWEROFF
---help---
TI Calypso-based cell phones (ARM7TDMI)
diff --git a/arch/arm/include/lpc43xx/chip.h b/arch/arm/include/lpc43xx/chip.h
index 56db6292937..a88559df21b 100644
--- a/arch/arm/include/lpc43xx/chip.h
+++ b/arch/arm/include/lpc43xx/chip.h
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/include/lpc43xx/chip.h
*
- * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -167,7 +167,7 @@
# warning "Data sheet and user manual are consistement for the LPC4320"
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
-# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (16*1024) /* 32Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -194,7 +194,7 @@
# warning "Data sheet and user manual are consistement for the LPC4320"
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
-# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (16*1024) /* 32Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -220,7 +220,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4330FBD144)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
-# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -246,7 +246,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET100)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
-# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -272,7 +272,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET180)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
-# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -298,7 +298,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET256)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
-# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -324,7 +324,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4337JBD144)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
-# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -350,7 +350,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4350FBD208)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
-# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -376,7 +376,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4350FET180)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
-# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -402,7 +402,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4350FET256)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
-# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -428,7 +428,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4353FBD208)
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (256*1025)
-# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -454,7 +454,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4353FET180)
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (256*1025)
-# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -480,7 +480,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4353FET256)
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (256*1025)
-# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -506,7 +506,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4357FET180)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
-# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -532,7 +532,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4357FBD208)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
-# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -558,7 +558,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4357FET256)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
-# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/
+# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
@@ -632,6 +632,31 @@
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels (per ADC)*/
# define LPC43_NADC12 (1) /* ONne 12-bit ADC controllers (ADCHS)*/
+#elif defined(CONFIG_ARCH_CHIP_LPC4337JET100)
+# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */
+# define LPC43_FLASH_BANKB_SIZE (512*1024)
+# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
+# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
+# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
+# define LPC43_AHBSRAM_BANK1_SIZE (0)
+# define LPC43_AHBSRAM_BANK2_SIZE (16*1024)
+# define LPC43_EEPROM_SIZE (16*1024) /* 16Kb EEPROM */
+# define LPC43_NLCD (0) /* Has LCD controller */
+# define LPC43_ETHERNET (1) /* One Ethernet controller */
+# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
+# define LPC43_USB1 (1) /* Have USB1 (Host, Device) */
+# define LPC43_USB1_ULPI (0) /* Have USB1 (Host, Device) with ULPI I/F */
+# define LPC43_MCPWM (0) /* One PWM interface */
+# define LPC43_QEI (0) /* One Quadrature Encoder interface */
+# define LPC43_NUSARTS (4) /* Three USARTs + 1 UART */
+# define LPC43_NSSP (2) /* Two SSP controllers */
+# define LPC43_NTIMERS (4) /* Four Timers */
+# define LPC43_NI2C (2) /* Two I2C controllers */
+# define LPC43_NI2S (2) /* Two I2S controllers */
+# define LPC43_NCAN (2) /* Two CAN controllers */
+# define LPC43_NDAC (1) /* One 10-bit DAC */
+# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
+# define LPC43_NADC_CHANNELS (4) /* Four ADC channels */
#else
# error "Unsupported LPC43xx chip"
#endif
diff --git a/arch/arm/include/stm32/chip.h b/arch/arm/include/stm32/chip.h
index ae2c1b614c9..98d0073c506 100644
--- a/arch/arm/include/stm32/chip.h
+++ b/arch/arm/include/stm32/chip.h
@@ -1568,7 +1568,7 @@
# define STM32_NGTIMNDMA 3 /* 16-bit general timers TIM9-11 without DMA */
# define STM32_NBTIM 0 /* No basic timers */
# define STM32_NDMA 2 /* DMA1-2 with 8 streams each*/
-# define STM32_NSPI 4 /* SPI1-4 */
+# define STM32_NSPI 5 /* SPI1-5 */
# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */
# define STM32_NUSART 6 /* Actually only 3: USART1, 2 and 6 */
# define STM32_NI2C 3 /* I2C1-3 */
@@ -1585,6 +1585,44 @@
# define STM32_NRNG 0 /* No Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
+#elif defined(CONFIG_ARCH_CHIP_STM32F411VE) /* 100 pin LQFP/BGA package, 512Kb FLASH, 128KiB SRAM */
+# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */
+# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */
+# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
+# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
+# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
+# undef CONFIG_STM32_MEDIUMPLUSDENSITY /* STM32L15xxC w/ 32/256 Kbytes */
+# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
+# undef CONFIG_STM32_VALUELINE /* STM32F100x */
+# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
+# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
+# undef CONFIG_STM32_STM32F30XX /* STM32F30xxx family */
+# undef CONFIG_STM32_STM32F37XX /* STM32F37xxx family */
+# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */
+# define STM32_NFSMC 0 /* No FSMC */
+# define STM32_NATIM 1 /* One advanced timers TIM1 */
+# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA
+ * 32-bit general timers TIM2 and 5 with DMA */
+# define STM32_NGTIMNDMA 3 /* 16-bit general timers TIM9-11 without DMA */
+# define STM32_NBTIM 0 /* No basic timers */
+# define STM32_NDMA 2 /* DMA1-2 with 8 streams each*/
+# define STM32_NSPI 5 /* SPI1-5 */
+# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */
+# define STM32_NUSART 6 /* Actually only 3: USART1, 2 and 6 */
+# define STM32_NI2C 3 /* I2C1-3 */
+# define STM32_NCAN 0 /* No CAN */
+# define STM32_NSDIO 1 /* One SDIO interface */
+# define STM32_NLCD 0 /* No LCD */
+# define STM32_NUSBOTG 1 /* USB OTG FS (only) */
+# define STM32_NGPIO 81 /* GPIOA-H */
+# define STM32_NADC 1 /* One 12-bit ADC1, 16 channels */
+# define STM32_NDAC 0 /* No DAC */
+# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
+# define STM32_NCRC 1 /* No CRC */
+# define STM32_NETHERNET 0 /* No Ethernet MAC */
+# define STM32_NRNG 0 /* No Random number generator (RNG) */
+# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
+
#elif defined(CONFIG_ARCH_CHIP_STM32F405RG) /* LQFP 64 10x10x1.4 1024Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */
# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */
diff --git a/arch/arm/include/stm32/stm32f10xxx_irq.h b/arch/arm/include/stm32/stm32f10xxx_irq.h
index 3c62e1e2ea3..29f07b0fd88 100644
--- a/arch/arm/include/stm32/stm32f10xxx_irq.h
+++ b/arch/arm/include/stm32/stm32f10xxx_irq.h
@@ -120,7 +120,7 @@
# define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */
# define STM32_IRQ_SPI3 (67) /* 51: SPI3 global interrupt */
# define STM32_IRQ_UART4 (68) /* 52: USART2 global interrupt */
-# define STM32_IRQ_UART5 (69) /* 53: USART5 global interrupt */
+# define STM32_IRQ_UART5 (69) /* 53: UART5 global interrupt */
# define STM32_IRQ_TIM6 (70) /* 54: TIM6 global interrupt */
# define STM32_IRQ_TIM7 (71) /* 55: TIM7 global interrupt */
# define STM32_IRQ_DMA2CH1 (72) /* 56: DMA2 Channel 1 global interrupt */
diff --git a/arch/arm/src/Makefile b/arch/arm/src/Makefile
index e74c0cfc28b..e505b956da5 100644
--- a/arch/arm/src/Makefile
+++ b/arch/arm/src/Makefile
@@ -1,7 +1,7 @@
############################################################################
# arch/arm/src/Makefile
#
-# Copyright (C) 2007-2009, 2011-2012, 2014-2015 Gregory Nutt. All rights reserved.
+# Copyright (C) 2007-2009, 2011-2012, 2014-2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt
#
# Redistribution and use in source and binary forms, with or without
@@ -127,6 +127,11 @@ BIN = libarch$(LIBEXT)
LDFLAGS += $(ARCHSCRIPT)
+# Override in Make.defs if linker is not 'ld'
+
+LDSTARTGROUP ?= --start-group
+LDENDGROUP ?= --end-group
+
EXTRA_LIBS ?=
EXTRA_LIBPATHS ?=
LINKLIBS ?=
@@ -198,7 +203,7 @@ nuttx$(EXEEXT): $(HEAD_OBJ) board$(DELIM)libboard$(LIBEXT)
$(Q) echo "LD: nuttx"
$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \
-o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \
- --start-group $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) --end-group
+ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
$(Q) $(NM) $(NUTTX) | \
grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
diff --git a/arch/arm/src/a1x/Kconfig b/arch/arm/src/a1x/Kconfig
index 41414352212..c66753d5381 100644
--- a/arch/arm/src/a1x/Kconfig
+++ b/arch/arm/src/a1x/Kconfig
@@ -21,49 +21,49 @@ menu "Allwinner A1X Peripheral Support"
config A1X_UART0
bool "UART 0"
default n
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART1
bool "UART 1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART2
bool "UART 2"
default n
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART3
bool "UART 3"
default n
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART4
bool "UART 4"
default n
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART5
bool "UART 5"
default n
- select ARCH_HAVE_UART5
+ select UART5_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART6
bool "UART 6"
default n
- select ARCH_HAVE_UART6
+ select UART6_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_UART7
bool "UART 7"
default n
- select ARCH_HAVE_UART7
+ select UART7_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config A1X_IR0
diff --git a/arch/arm/src/armv7-a/arm_addrenv.c b/arch/arm/src/armv7-a/arm_addrenv.c
index 56d4d05ceea..2bd1f886cec 100644
--- a/arch/arm/src/armv7-a/arm_addrenv.c
+++ b/arch/arm/src/armv7-a/arm_addrenv.c
@@ -141,10 +141,6 @@
# error CONFIG_ARCH_HEAP_VBASE not aligned to section boundary
#endif
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_addrenv_kstack.c b/arch/arm/src/armv7-a/arm_addrenv_kstack.c
index 852b03620b9..da2a474126e 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_kstack.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_kstack.c
@@ -121,18 +121,6 @@
#if defined(CONFIG_ARCH_ADDRENV) && defined(CONFIG_ARCH_KERNEL_STACK)
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_addrenv_shm.c b/arch/arm/src/armv7-a/arm_addrenv_shm.c
index 3bd2715350a..9a05b9f7b92 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_shm.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_shm.c
@@ -55,18 +55,6 @@
#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_SHM)
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_addrenv_ustack.c b/arch/arm/src/armv7-a/arm_addrenv_ustack.c
index 97da35992ff..206d517ef38 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_ustack.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_ustack.c
@@ -116,14 +116,6 @@
# error CONFIG_ARCH_STACK_VBASE not aligned to section boundary
#endif
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_addrenv_utils.c b/arch/arm/src/armv7-a/arm_addrenv_utils.c
index fc62c9b1261..f3147918f26 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_utils.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_utils.c
@@ -53,18 +53,6 @@
#ifdef CONFIG_ARCH_ADDRENV
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_allocpage.c b/arch/arm/src/armv7-a/arm_allocpage.c
index 39ffea6e21e..88dc1bc47f1 100644
--- a/arch/arm/src/armv7-a/arm_allocpage.c
+++ b/arch/arm/src/armv7-a/arm_allocpage.c
@@ -54,10 +54,6 @@
#include "pg_macros.h"
#include "up_internal.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
/****************************************************************************
* Private Types
****************************************************************************/
@@ -108,10 +104,6 @@ static L1ndx_t g_ptemap[CONFIG_PAGING_NPPAGED];
static bool g_pgwrap;
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_assert.c b/arch/arm/src/armv7-a/arm_assert.c
index 00c730919c7..ab3bd4c9081 100644
--- a/arch/arm/src/armv7-a/arm_assert.c
+++ b/arch/arm/src/armv7-a/arm_assert.c
@@ -334,7 +334,13 @@ static void up_dumpstate(void)
}
#endif
- /* Then dump the registers (if available) */
+#ifdef CONFIG_SMP
+ /* Show the CPU number */
+
+ lldbg("CPU%d:\n", up_cpu_index());
+#endif
+
+ /* Then dump the CPU registers (if available) */
up_registerdump();
diff --git a/arch/arm/src/armv7-a/arm_checkmapping.c b/arch/arm/src/armv7-a/arm_checkmapping.c
index 4f20d220532..5a7b2518ef5 100644
--- a/arch/arm/src/armv7-a/arm_checkmapping.c
+++ b/arch/arm/src/armv7-a/arm_checkmapping.c
@@ -51,18 +51,6 @@
#ifdef CONFIG_PAGING
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_coherent_dcache.c b/arch/arm/src/armv7-a/arm_coherent_dcache.c
index 363e88f8046..c9552093ef2 100644
--- a/arch/arm/src/armv7-a/arm_coherent_dcache.c
+++ b/arch/arm/src/armv7-a/arm_coherent_dcache.c
@@ -46,18 +46,6 @@
#include
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_copyfullstate.c b/arch/arm/src/armv7-a/arm_copyfullstate.c
index b41b3f2ebb5..b35149ff07b 100644
--- a/arch/arm/src/armv7-a/arm_copyfullstate.c
+++ b/arch/arm/src/armv7-a/arm_copyfullstate.c
@@ -44,18 +44,6 @@
#include "up_internal.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_cpuidlestack.c b/arch/arm/src/armv7-a/arm_cpuidlestack.c
index 09e9f0d12ee..dd264d25c14 100644
--- a/arch/arm/src/armv7-a/arm_cpuidlestack.c
+++ b/arch/arm/src/armv7-a/arm_cpuidlestack.c
@@ -47,7 +47,7 @@
#include "smp.h"
#include "up_internal.h"
-#if defined(CONFIG_SMP) && CONFIG_SMP_NCPUS > 1
+#ifdef CONFIG_SMP
/****************************************************************************
* Pre-processor Definitions
@@ -61,6 +61,7 @@
* Private Data
****************************************************************************/
+#if CONFIG_SMP_NCPUS > 1
static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
{
0
@@ -72,6 +73,7 @@ static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
#endif /* CONFIG_SMP_NCPUS > 3 */
#endif /* CONFIG_SMP_NCPUS > 2 */
};
+#endif
/****************************************************************************
* Public Functions
@@ -122,6 +124,7 @@ static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
{
+#if CONFIG_SMP_NCPUS > 1
uintptr_t stack_alloc;
uintptr_t top_of_stack;
@@ -138,8 +141,9 @@ int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
tcb->adj_stack_size = SMP_STACK_SIZE;
tcb->stack_alloc_ptr = (FAR uint32_t *)stack_alloc;
tcb->adj_stack_ptr = (FAR uint32_t *)top_of_stack;
+#endif
return OK;
}
-#endif /* CONFIG_SMP && CONFIG_SMP_NCPUS > 1 */
+#endif /* CONFIG_SMP */
diff --git a/arch/arm/src/armv7-a/arm_cpustart.c b/arch/arm/src/armv7-a/arm_cpustart.c
index d5d0fe99bc6..1ec95da855a 100644
--- a/arch/arm/src/armv7-a/arm_cpustart.c
+++ b/arch/arm/src/armv7-a/arm_cpustart.c
@@ -46,10 +46,42 @@
#include "up_internal.h"
#include "gic.h"
+#include "cp15_cacheops.h"
#include "sched/sched.h"
#ifdef CONFIG_SMP
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: arm_registerdump
+ ****************************************************************************/
+
+#if 0 /* Was useful in solving some startup problems */
+static inline void arm_registerdump(FAR struct tcb_s *tcb)
+{
+ int regndx;
+
+ lldbg("CPU%d:\n", up_cpu_index());
+
+ /* Dump the startup registers */
+
+ for (regndx = REG_R0; regndx <= REG_R15; regndx += 8)
+ {
+ uint32_t *ptr = (uint32_t *)&tcb->xcp.regs[regndx];
+ lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ regndx, ptr[0], ptr[1], ptr[2], ptr[3],
+ ptr[4], ptr[5], ptr[6], ptr[7]);
+ }
+
+ lldbg("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
+}
+#else
+# define arm_registerdump(tcb)
+#endif
+
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -72,12 +104,19 @@
int arm_start_handler(int irq, FAR void *context)
{
- FAR struct tcb_s *tcb = this_task();
+ FAR struct tcb_s *tcb;
+
+ sllvdbg("CPU%d Started\n", up_cpu_index());
/* Reset scheduler parameters */
+ tcb = this_task();
sched_resume_scheduler(tcb);
+ /* Dump registers so that we can see what is going to happen on return */
+
+ arm_registerdump(tcb);
+
/* Then switch contexts. This instantiates the exception context of the
* tcb at the head of the assigned task list. In this case, this should
* be the CPUs NULL task.
@@ -116,8 +155,14 @@ int arm_start_handler(int irq, FAR void *context)
int up_cpu_start(int cpu)
{
+ sllvdbg("Starting CPU%d\n", cpu);
+
DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
+ /* Make the content of CPU0 L1 cache has been written to coherent L2 */
+
+ cp15_clean_dcache(CONFIG_RAM_START, CONFIG_RAM_END - 1);
+
/* Execute SGI1 */
return arm_cpu_sgi(GIC_IRQ_SGI1, (1 << cpu));
diff --git a/arch/arm/src/armv7-a/arm_doirq.c b/arch/arm/src/armv7-a/arm_doirq.c
index 4980111d582..b3d98151c0b 100644
--- a/arch/arm/src/armv7-a/arm_doirq.c
+++ b/arch/arm/src/armv7-a/arm_doirq.c
@@ -52,22 +52,6 @@
#include "group/group.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_elf.c b/arch/arm/src/armv7-a/arm_elf.c
index 3f076908c4d..57898e136af 100644
--- a/arch/arm/src/armv7-a/arm_elf.c
+++ b/arch/arm/src/armv7-a/arm_elf.c
@@ -48,18 +48,6 @@
#include
#include
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_fullcontextrestore.S b/arch/arm/src/armv7-a/arm_fullcontextrestore.S
index 88fce91dba6..64f74c8a98f 100644
--- a/arch/arm/src/armv7-a/arm_fullcontextrestore.S
+++ b/arch/arm/src/armv7-a/arm_fullcontextrestore.S
@@ -44,28 +44,12 @@
.file "arm_fullcontextrestore.S"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
/****************************************************************************
* Public Symbols
****************************************************************************/
.globl up_fullcontextrestore
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_gicv2.c b/arch/arm/src/armv7-a/arm_gicv2.c
index c03ef01c7a5..990a2c66dd3 100644
--- a/arch/arm/src/armv7-a/arm_gicv2.c
+++ b/arch/arm/src/armv7-a/arm_gicv2.c
@@ -166,12 +166,12 @@ void arm_gic_initialize(void)
/* Registers with 8-bits per interrupt */
- putreg32(0x80808080, GIC_ICDIPR(0)); /* SGI[3:0] priority */
- putreg32(0x80808080, GIC_ICDIPR(4)); /* SGI[4:7] priority */
- putreg32(0x80808080, GIC_ICDIPR(8)); /* SGI[8:11] priority */
- putreg32(0x80808080, GIC_ICDIPR(12)); /* SGI[12:15] priority */
- putreg32(0x80000000, GIC_ICDIPR(24)); /* PPI[0] priority */
- putreg32(0x80808080, GIC_ICDIPR(28)); /* PPI[1:4] priority */
+ putreg32(0x80808080, GIC_ICDIPR(0)); /* SGI[3:0] priority */
+ putreg32(0x80808080, GIC_ICDIPR(4)); /* SGI[4:7] priority */
+ putreg32(0x80808080, GIC_ICDIPR(8)); /* SGI[8:11] priority */
+ putreg32(0x80808080, GIC_ICDIPR(12)); /* SGI[12:15] priority */
+ putreg32(0x80000000, GIC_ICDIPR(24)); /* PPI[0] priority */
+ putreg32(0x80808080, GIC_ICDIPR(28)); /* PPI[1:4] priority */
/* Set the binary point register.
*
@@ -211,7 +211,16 @@ void arm_gic_initialize(void)
#endif
-#if defined(CONFIG_ARCH_TRUSTZONE_SECURE) || defined(CONFIG_ARCH_TRUSTZONE_BOTH)
+#if defined(CONFIG_ARCH_TRUSTZONE_SECURE)
+ /* Set FIQn=1 if secure interrupts are to signal using nfiq_c.
+ *
+ * NOTE: Only for processors that operate in secure state.
+ * REVISIT: Do I need to do this?
+ */
+
+ //iccicr |= GIC_ICCICRS_FIQEN;
+
+#elif defined(CONFIG_ARCH_TRUSTZONE_BOTH)
/* Set FIQn=1 if secure interrupts are to signal using nfiq_c.
*
* NOTE: Only for processors that operate in secure state.
@@ -221,25 +230,35 @@ void arm_gic_initialize(void)
iccicr |= GIC_ICCICRS_FIQEN;
#endif
-#if defined(ONFIG_ARCH_TRUSTZONE_BOTH)
+#if defined(CONFIG_ARCH_TRUSTZONE_SECURE)
/* Program the AckCtl bit to select the required interrupt acknowledge
* behavior.
*
* NOTE: Only for processors that operate in both secure and non-secure
* state.
- * REVISIT: I don't yet fully understand this setting.
+ * REVISIT: This is here only for superstituous reasons. I don't think
+ * I need this setting in this configuration.
*/
- // iccicr |= GIC_ICCICRS_ACKTCTL;
+ iccicr |= GIC_ICCICRS_ACKTCTL;
+
+#elif defined(CONFIG_ARCH_TRUSTZONE_BOTH)
+ /* Program the AckCtl bit to select the required interrupt acknowledge
+ * behavior.
+ *
+ * NOTE: Only for processors that operate in both secure and non-secure
+ * state.
+ */
+
+ iccicr |= GIC_ICCICRS_ACKTCTL;
/* Program the SBPR bit to select the required binary pointer behavior.
*
* NOTE: Only for processors that operate in both secure and non-secure
* state.
- * REVISIT: I don't yet fully understand this setting.
*/
- // iccicr |= GIC_ICCICRS_CBPR;
+ iccicr |= GIC_ICCICRS_CBPR;
#endif
#if defined(CONFIG_ARCH_TRUSTZONE_SECURE) || defined(CONFIG_ARCH_TRUSTZONE_BOTH)
@@ -291,9 +310,15 @@ void arm_gic_initialize(void)
* bypass.
*/
+#if 0 /* REVISIT -- I don't know why this needs to be like this */
iccicr |= (GIC_ICCICRS_ENABLEGRP0 | GIC_ICCICRS_FIQBYPDISGRP0 |
GIC_ICCICRS_IRQBYPDISGRP0 | GIC_ICCICRS_FIQBYPDISGRP1 |
GIC_ICCICRS_IRQBYPDISGRP1);
+#else
+ iccicr |= (GIC_ICCICRS_ENABLEGRP0 | GIC_ICCICRS_ENABLEGRP1 |
+ GIC_ICCICRS_FIQBYPDISGRP0 | GIC_ICCICRS_IRQBYPDISGRP0 |
+ GIC_ICCICRS_FIQBYPDISGRP1 | GIC_ICCICRS_IRQBYPDISGRP1);
+#endif
icddcr = GIC_ICDDCR_ENABLEGRP0;
#elif defined(CONFIG_ARCH_TRUSTZONE_BOTH)
@@ -498,4 +523,56 @@ int up_prioritize_irq(int irq, int priority)
return -EINVAL;
}
+/****************************************************************************
+ * Name: arm_gic_irq_trigger
+ *
+ * Description:
+ * Set the trigger type for the specified IRQ source and the current CPU.
+ *
+ * Since this API is not supported on all architectures, it should be
+ * avoided in common implementations where possible.
+ *
+ * Input Paramters:
+ * irq - The interrupt request to modify.
+ * edge - False: Active HIGH level sensitive, True: Rising edge sensitive
+ *
+ * Returned Value:
+ * Zero (OK) on success; a negated errno value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int arm_gic_irq_trigger(int irq, bool edge)
+{
+ uintptr_t regaddr;
+ uint32_t regval;
+ uint32_t intcfg;
+
+ if (irq > GIC_IRQ_SGI15 && irq < NR_IRQS)
+ {
+ /* Get the address of the Interrupt Configuration Register for this
+ * irq.
+ */
+
+ regaddr = GIC_ICDICFR(irq);
+
+ /* Get the new Interrupt configuration bit setting */
+
+ intcfg = (edge ? (INT_ICDICFR_EDGE | INT_ICDICFR_1N) : INT_ICDICFR_1N);
+
+ /* Write the correct interrupt trigger to the Interrupt Configuration
+ * Register.
+ */
+
+ regval = getreg32(regaddr);
+ regval &= ~GIC_ICDICFR_ID_MASK(irq);
+ regval |= GIC_ICDICFR_ID(irq, intcfg);
+ putreg32(regval, regaddr);
+
+ return OK;
+ }
+
+ return -EINVAL;
+}
+
+
#endif /* CONFIG_ARMV7A_HAVE_GICv2 */
diff --git a/arch/arm/src/armv7-a/arm_initialstate.c b/arch/arm/src/armv7-a/arm_initialstate.c
index c43e12d67eb..cb912021b1f 100644
--- a/arch/arm/src/armv7-a/arm_initialstate.c
+++ b/arch/arm/src/armv7-a/arm_initialstate.c
@@ -48,18 +48,6 @@
#include "up_internal.h"
#include "up_arch.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_mmu.c b/arch/arm/src/armv7-a/arm_mmu.c
index 19c609e5b0f..1589e8081a0 100644
--- a/arch/arm/src/armv7-a/arm_mmu.c
+++ b/arch/arm/src/armv7-a/arm_mmu.c
@@ -44,18 +44,6 @@
#include "cache.h"
#include "mmu.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_pgalloc.c b/arch/arm/src/armv7-a/arm_pgalloc.c
index d430f8b68b3..514c623fe90 100644
--- a/arch/arm/src/armv7-a/arm_pgalloc.c
+++ b/arch/arm/src/armv7-a/arm_pgalloc.c
@@ -54,13 +54,6 @@
#ifdef CONFIG_BUILD_KERNEL
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
/****************************************************************************
* Private Functions
diff --git a/arch/arm/src/armv7-a/arm_pginitialize.c b/arch/arm/src/armv7-a/arm_pginitialize.c
index 94b44449ed2..ba431a8c603 100644
--- a/arch/arm/src/armv7-a/arm_pginitialize.c
+++ b/arch/arm/src/armv7-a/arm_pginitialize.c
@@ -49,18 +49,6 @@
#ifdef CONFIG_PAGING
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_physpgaddr.c b/arch/arm/src/armv7-a/arm_physpgaddr.c
index d3fecd1fc11..0c753ab8640 100644
--- a/arch/arm/src/armv7-a/arm_physpgaddr.c
+++ b/arch/arm/src/armv7-a/arm_physpgaddr.c
@@ -55,17 +55,6 @@
#ifdef CONFIG_MM_PGALLOC
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_prefetchabort.c b/arch/arm/src/armv7-a/arm_prefetchabort.c
index 7d2b4cf2df2..bdd28c4a3aa 100644
--- a/arch/arm/src/armv7-a/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-a/arm_prefetchabort.c
@@ -61,18 +61,6 @@
#include "sched/sched.h"
#include "up_internal.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_schedulesigaction.c b/arch/arm/src/armv7-a/arm_schedulesigaction.c
index e8db2d35f45..3dfe5fc285f 100644
--- a/arch/arm/src/armv7-a/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-a/arm_schedulesigaction.c
@@ -53,18 +53,6 @@
#ifndef CONFIG_DISABLE_SIGNALS
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_signal_dispatch.c b/arch/arm/src/armv7-a/arm_signal_dispatch.c
index 3e4f90b6e9b..5925923760f 100644
--- a/arch/arm/src/armv7-a/arm_signal_dispatch.c
+++ b/arch/arm/src/armv7-a/arm_signal_dispatch.c
@@ -47,18 +47,6 @@
#if ((defined(CONFIG_BUILD_PROTECTED) && defined(__KERNEL__)) || \
defined(CONFIG_BUILD_KERNEL)) && !defined(CONFIG_DISABLE_SIGNALS)
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_syscall.c b/arch/arm/src/armv7-a/arm_syscall.c
index 4b73c1e5e38..854ece3de2c 100644
--- a/arch/arm/src/armv7-a/arm_syscall.c
+++ b/arch/arm/src/armv7-a/arm_syscall.c
@@ -77,7 +77,7 @@
#endif
/****************************************************************************
- * Private Data
+ * Private Functions
****************************************************************************/
/****************************************************************************
diff --git a/arch/arm/src/armv7-a/arm_unblocktask.c b/arch/arm/src/armv7-a/arm_unblocktask.c
index 173ca913222..e3d2fa3fc79 100644
--- a/arch/arm/src/armv7-a/arm_unblocktask.c
+++ b/arch/arm/src/armv7-a/arm_unblocktask.c
@@ -49,18 +49,6 @@
#include "clock/clock.h"
#include "up_internal.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_undefinedinsn.c b/arch/arm/src/armv7-a/arm_undefinedinsn.c
index bc08375594c..0c051d9dd91 100644
--- a/arch/arm/src/armv7-a/arm_undefinedinsn.c
+++ b/arch/arm/src/armv7-a/arm_undefinedinsn.c
@@ -58,18 +58,6 @@
#include "up_internal.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_va2pte.c b/arch/arm/src/armv7-a/arm_va2pte.c
index ded054187e3..fb6e4f03586 100644
--- a/arch/arm/src/armv7-a/arm_va2pte.c
+++ b/arch/arm/src/armv7-a/arm_va2pte.c
@@ -52,18 +52,6 @@
#ifdef CONFIG_PAGING
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_vectors.S b/arch/arm/src/armv7-a/arm_vectors.S
index 5699a449fda..33d1f8fc550 100644
--- a/arch/arm/src/armv7-a/arm_vectors.S
+++ b/arch/arm/src/armv7-a/arm_vectors.S
@@ -45,10 +45,6 @@
.file "arm_vectors.S"
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
/************************************************************************************
* Private Data
************************************************************************************/
@@ -69,10 +65,6 @@ g_fiqtmp:
.word 0 /* Saved spsr */
#endif
-/************************************************************************************
- * Assembly Macros
- ************************************************************************************/
-
/************************************************************************************
* Private Functions
************************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_virtpgaddr.c b/arch/arm/src/armv7-a/arm_virtpgaddr.c
index 741bf8d1227..26dc9cc209b 100644
--- a/arch/arm/src/armv7-a/arm_virtpgaddr.c
+++ b/arch/arm/src/armv7-a/arm_virtpgaddr.c
@@ -43,18 +43,6 @@
#if defined(CONFIG_MM_PGALLOC) && defined(CONFIG_ARCH_PGPOOL_MAPPING)
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/crt0.c b/arch/arm/src/armv7-a/crt0.c
index cfa00e7b1c4..a06e3f858e2 100644
--- a/arch/arm/src/armv7-a/crt0.c
+++ b/arch/arm/src/armv7-a/crt0.c
@@ -46,14 +46,6 @@
#ifdef CONFIG_BUILD_KERNEL
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/gic.h b/arch/arm/src/armv7-a/gic.h
index 45f8a606cbe..cc6ee483300 100644
--- a/arch/arm/src/armv7-a/gic.h
+++ b/arch/arm/src/armv7-a/gic.h
@@ -495,7 +495,7 @@
#define INT_ICDICFR_EDGE 2 /* Bit n+2: 1=Edge sensitive */
#define GIC_ICDICFR_ID_SHIFT(n) GIC_SHIFT16(n)
-#define GIC_ICDICFR_ID_MASK(n) GIC_MASK16(n
+#define GIC_ICDICFR_ID_MASK(n) GIC_MASK16(n)
# define GIC_ICDICFR_ID(n,c) ((uint32_t)(c) << GIC_SHIFT16(n))
/* PPI Status Register */
@@ -720,6 +720,26 @@ void arm_gic0_initialize(void);
void arm_gic_initialize(void);
+/****************************************************************************
+ * Name: arm_gic_irq_trigger
+ *
+ * Description:
+ * Set the trigger type for the specificd IRQ source and the current CPU.
+ *
+ * Since this API is not supported on all architectures, it should be
+ * avoided in common implementations where possible.
+ *
+ * Input Paramters:
+ * irq - The interrupt request to modify.
+ * edge - False: Active HIGH level sensitive, True: Rising edge sensitive
+ *
+ * Returned Value:
+ * Zero (OK) on success; a negated errno value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int arm_gic_irq_trigger(int irq, bool edge);
+
/****************************************************************************
* Name: arm_decodeirq
*
diff --git a/arch/arm/src/common/up_createstack.c b/arch/arm/src/common/up_createstack.c
index 12d4575e3dd..c3aa9d7adb9 100644
--- a/arch/arm/src/common/up_createstack.c
+++ b/arch/arm/src/common/up_createstack.c
@@ -220,7 +220,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
if (tcb->stack_alloc_ptr)
{
#if defined(CONFIG_TLS) && defined(CONFIG_STACK_COLORATION)
- uinptr_t stack_base;
+ uintptr_t stack_base;
#endif
size_t top_of_stack;
size_t size_of_stack;
@@ -264,7 +264,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
* water marks.
*/
- stackbase = (uintptr_t)tcb->stack_alloc_ptr + sizeof(struct tls_info_s);
+ stack_base = (uintptr_t)tcb->stack_alloc_ptr + sizeof(struct tls_info_s);
stack_size = tcb->adj_stack_size - sizeof(struct tls_info_s);
up_stack_color((FAR void *)stack_base, stack_size);
diff --git a/arch/arm/src/common/up_usestack.c b/arch/arm/src/common/up_usestack.c
index 5dea96be4e9..887387976ae 100644
--- a/arch/arm/src/common/up_usestack.c
+++ b/arch/arm/src/common/up_usestack.c
@@ -174,7 +174,13 @@ int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size)
* value that we can use later to test for high water marks.
*/
-# warning Missing logic
+#ifdef CONFIG_TLS
+ up_stack_color(
+ (FAR void *)((uintptr_t)tcb->stack_alloc_ptr + sizeof(struct tls_info_s)),
+ tcb->adj_stack_size - sizeof(struct tls_info_s));
+#else
+ up_stack_color(tcb->stack_alloc_ptr, tcb->adj_stack_size);
+#endif
#endif
return OK;
diff --git a/arch/arm/src/dm320/Kconfig b/arch/arm/src/dm320/Kconfig
index cc0de49494c..ff6356ff5f5 100644
--- a/arch/arm/src/dm320/Kconfig
+++ b/arch/arm/src/dm320/Kconfig
@@ -11,12 +11,12 @@ menu "DM320 Peripheral Selections"
config DM320_UART0
bool
default y
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
config DM320_UART1
bool
default y
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
endmenu # DM320 Peripheral Selections
endif # ARCH_CHIP_DM320
diff --git a/arch/arm/src/efm32/Kconfig b/arch/arm/src/efm32/Kconfig
index 0b90826e5ed..ad1abfbfa06 100644
--- a/arch/arm/src/efm32/Kconfig
+++ b/arch/arm/src/efm32/Kconfig
@@ -157,45 +157,42 @@ config EFM32_BITBAND
config EFM32_USART0
bool "USART0"
default n
- select ARCH_HAVE_USART0
select ARCH_HAVE_SERIAL_TERMIOS
config EFM32_USART1
bool "USART1"
default n
- select ARCH_HAVE_USART1
select ARCH_HAVE_SERIAL_TERMIOS
config EFM32_USART2
bool "USART2"
default n
depends on EFM32_HAVE_USART2
- select ARCH_HAVE_USART2
select ARCH_HAVE_SERIAL_TERMIOS
config EFM32_UART0
bool "UART0"
default n
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
select EFM32_UART
config EFM32_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select EFM32_UART
config EFM32_LEUART0
bool "Low energy UART0"
default n
- select ARCH_HAVE_OTHER_UART
+ select OTHER_UART_SERIALDRIVER
select EFM32_LEUART
config EFM32_LEUART1
bool "Low energy UART1"
default n
depends on EFM32_HAVE_LEUART1
- select ARCH_HAVE_OTHER_UART
+ select OTHER_UART_SERIALDRIVER
select EFM32_LEUART
config EFM32_OTGFS
@@ -261,7 +258,7 @@ choice
config EFM32_USART0_ISUART
bool "USART0 is a UART"
- select USART0_ISUART
+ select USART0_SERIALDRIVER
select EFM32_USART_ISUART
config EFM32_USART0_ISSPI
@@ -277,7 +274,7 @@ choice
config EFM32_USART1_ISUART
bool "USART1 is a UART"
- select USART1_ISUART
+ select USART1_SERIALDRIVER
select EFM32_USART_ISUART
config EFM32_USART1_ISSPI
@@ -293,7 +290,7 @@ choice
config EFM32_USART2_ISUART
bool "USART2 is a UART"
- select USART2_ISUART
+ select USART2_SERIALDRIVER
select EFM32_USART_ISUART
config EFM32_USART2_ISSPI
diff --git a/arch/arm/src/efm32/efm32_adc.c b/arch/arm/src/efm32/efm32_adc.c
index 102384ff3de..53cb731ad60 100644
--- a/arch/arm/src/efm32/efm32_adc.c
+++ b/arch/arm/src/efm32/efm32_adc.c
@@ -2,7 +2,9 @@
* arch/arm/src/efm32/efm32_adc.c
*
* Copyright (C) 2014 Bouteville Pierre-Noel. All rights reserved.
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Bouteville Pierre-Noel
+ * Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -63,9 +65,9 @@
#include "efm32.h"
#include "efm32_adc.h"
-/* ADC "upper half" support must be enabled */
+/* ADC "lower half" support must be enabled */
-#ifdef CONFIG_ADC
+#ifdef CONFIG_EFM32_ADC
/* Some ADC peripheral must be enabled */
@@ -100,6 +102,7 @@
struct efm32_dev_s
{
+ FAR const struct adc_callback_s *cb;
uint8_t irq; /* Interrupt generated by this ADC block */
uint8_t nchannels; /* Number of channels */
uint8_t current; /* Current ADC channel being converted */
@@ -124,6 +127,8 @@ static int adc_interrupt(FAR struct adc_dev_s *dev);
/* ADC Driver Methods */
+static int adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback);
static void adc_reset(FAR struct adc_dev_s *dev);
static int adc_setup(FAR struct adc_dev_s *dev);
static void adc_shutdown(FAR struct adc_dev_s *dev);
@@ -148,6 +153,7 @@ static void adc_startconv(FAR struct efm32_dev_s *priv, bool enable);
static const struct adc_ops_s g_adcops =
{
+ .ao_bind = adc_bind,
.ao_reset = adc_reset,
.ao_setup = adc_setup,
.ao_shutdown = adc_shutdown,
@@ -790,7 +796,7 @@ static void adc_startconv(struct efm32_dev_s *priv, bool enable)
#endif
/****************************************************************************
- * Name: adc_reset
+ * Name: adc_hw_reset
*
* Description:
* Deinitializes the ADCx peripheral registers to their default
@@ -873,6 +879,25 @@ static void adc_enable(FAR struct efm32_dev_s *priv, bool enable)
adc_putreg(priv, EFM32_ADC_CR2_OFFSET, regval);
}
+/****************************************************************************
+ * Name: adc_bind
+ *
+ * Description:
+ * Bind the upper-half driver callbacks to the lower-half implementation. This
+ * must be called early in order to receive ADC event notifications.
+ *
+ ****************************************************************************/
+
+static int adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback)
+{
+ FAR struct efm32_dev_s *priv = (FAR struct efm32_dev_s *)dev->ad_priv;
+
+ DEBUGASSERT(priv != NULL);
+ priv->cb = callback;
+ return OK;
+}
+
/****************************************************************************
* Name: adc_reset
*
@@ -1180,14 +1205,21 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
value = adc_getreg(priv, EFM32_ADC_DR_OFFSET);
value &= ADC_DR_DATA_MASK;
- /* Give the ADC data to the ADC driver. adc_receive accepts 3 parameters:
- *
- * 1) The first is the ADC device instance for this ADC block.
- * 2) The second is the channel number for the data, and
- * 3) The third is the converted data for the channel.
- */
+ /* Verify that the upper-half driver has bound its callback functions */
- adc_receive(dev, priv->chanlist[priv->current], value);
+ if (priv->cb != NULL)
+ {
+ /* Give the ADC data to the ADC driver. The ADC receive method
+ * accepts 3 parameters:
+ *
+ * 1) The first is the ADC device instance for this ADC block.
+ * 2) The second is the channel number for the data, and
+ * 3) The third is the converted data for the channel.
+ */
+
+ DEBUGASSERT(priv->cb->au_receive != NULL);
+ priv->cb->au_receive(dev, priv->chanlist[priv->current], value);
+ }
/* Set the channel number of the next channel that will complete conversion */
@@ -1272,7 +1304,8 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
/* Configure the selected ADC */
- priv = dev->ad_priv;
+ priv = dev->ad_priv;
+ priv->cb = NULL;
DEBUGASSERT(nchannels <= ADC_MAX_SAMPLES);
priv->nchannels = nchannels;
@@ -1283,4 +1316,4 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
#endif /* CONFIG_EFM32_EFM32GG */
#endif /* CONFIG_EFM32_ADC1 */
-#endif /* CONFIG_ADC */
+#endif /* CONFIG_EFM32_ADC */
diff --git a/arch/arm/src/imx1/Kconfig b/arch/arm/src/imx1/Kconfig
index e138090e457..aa2b6bb6932 100644
--- a/arch/arm/src/imx1/Kconfig
+++ b/arch/arm/src/imx1/Kconfig
@@ -12,17 +12,17 @@ menu "iMX.1 Peripheral Selection"
config IMX1_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
config IMX1_UART2
bool "UART2"
default n
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
config IMX1_UART3
bool "UART3"
default n
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
config IMX1_SPI1
bool "SPI1"
diff --git a/arch/arm/src/imx1/imx_cspi.h b/arch/arm/src/imx1/imx_cspi.h
index 4a43e554694..842a4ca1116 100644
--- a/arch/arm/src/imx1/imx_cspi.h
+++ b/arch/arm/src/imx1/imx_cspi.h
@@ -74,7 +74,7 @@
#define IMX_CSPI1_SPIDMA (IMX_CSPI1_VBASE + CSPI_DMA_OFFSET)
#define IMX_CSPI1_SPIRESET (IMX_CSPI1_VBASE + CSPI_RESET_OFFSET)
-/* CSPI1 */
+/* CSPI2 */
#define IMX_CSPI2_RXD (IMX_CSPI2_VBASE + CSPI_RXD_OFFSET)
#define IMX_CSPI2_TXD (IMX_CSPI2_VBASE + CSPI_TXD_OFFSET)
@@ -138,7 +138,7 @@
/* CSPI Sample Period Control Register */
#define CSPI_SPCR_WAIT_SHIFT 0
-#define CSPI_SPCR_WAIT_MASK (0x7ff << CSPI_CTRL_DATARATE_SHIFT)
+#define CSPI_SPCR_WAIT_MASK (0x7ff << CSPI_SPCR_WAIT_SHIFT)
#define CSPI_SPCR_CSRC (1 << 15) /* Bit 15: 1:32768 or 32 kHz clock source */
/* CSPI DMA Control Register */
diff --git a/arch/arm/src/imx6/Kconfig b/arch/arm/src/imx6/Kconfig
index 7250001d562..f49dde32bf6 100644
--- a/arch/arm/src/imx6/Kconfig
+++ b/arch/arm/src/imx6/Kconfig
@@ -54,32 +54,61 @@ config IMX6_HAVE_HDCP
endmenu # "iMX.6 Chip Selection"
+config IMX6_ECSPI
+ bool
+ default n
+
menu "iMX.6 Peripheral Selection"
+config IMX6_ECSPI1
+ bool "ECSPI1"
+ default n
+ select IMX6_ECSPI
+
+config IMX6_ECSPI2
+ bool "ECSPI2"
+ default n
+ select IMX6_ECSPI
+
+config IMX6_ECSPI3
+ bool "ECSPI3"
+ default n
+ select IMX6_ECSPI
+
+config IMX6_ECSPI4
+ bool "ECSPI4"
+ default n
+ select IMX6_ECSPI
+
+config IMX6_ECSPI5
+ bool "ECSPI5"
+ default n
+ select IMX6_ECSPI
+
config IMX6_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
config IMX6_UART2
bool "UART2"
default n
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
config IMX6_UART3
bool "UART3"
default n
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
config IMX6_UART4
bool "UART4"
default n
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
config IMX6_UART5
bool "UART5"
default n
- select ARCH_HAVE_UART5
+ select UART5_SERIALDRIVER
config IMX6_SPI1
bool "SPI1"
diff --git a/arch/arm/src/imx6/chip/imx_ecspi.h b/arch/arm/src/imx6/chip/imx_ecspi.h
new file mode 100644
index 00000000000..2d7864132d0
--- /dev/null
+++ b/arch/arm/src/imx6/chip/imx_ecspi.h
@@ -0,0 +1,290 @@
+/************************************************************************************
+ * arch/arm/src/imx6/imx_ecspi.h
+ *
+ * Copyright (C) 2009-2010, 2015-2016 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_IMX6_CHIP_ECSPI_H
+#define __ARCH_ARM_IMX6_CHIP_ECSPI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include
+#include "chip/imx_memorymap.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* ECSPI Register Offsets ***********************************************************/
+
+#define ECSPI_RXDATA_OFFSET 0x0000 /* Receive Data Register */
+#define ECSPI_TXDATA_OFFSET 0x0004 /* Transmit Data Register */
+#define ECSPI_CONREG_OFFSET 0x0008 /* Control Register */
+#define ECSPI_CONFIGREG_OFFSET 0x000c /* Configuration Register */
+#define ECSPI_INTREG_OFFSET 0x0010 /* Interrupt Control Register */
+#define ECSPI_DMAREG_OFFSET 0x0014 /* DMA Control Register */
+#define ECSPI_STATREG_OFFSET 0x0018 /* Status Register */
+#define ECSPI_PERIODREG_OFFSET 0x001c /* Sample Period Control Register */
+#define ECSPI_TESTREG_OFFSET 0x0020 /* Test Control Register */
+#define ECSPI_MSGDATA_OFFSET 0x0040 /* Message Data Register */
+
+/* ECSPI Register Addresses *********************************************************/
+
+/* ECSPI1 */
+
+#define IMX_ECSPI1_RXDATA (IMX_ECSPI1_VBASE + ECSPI_RXDATA_OFFSET)
+#define IMX_ECSPI1_TXDATA (IMX_ECSPI1_VBASE + ECSPI_TXDATA_OFFSET)
+#define IMX_ECSPI1_CONREG (IMX_ECSPI1_VBASE + ECSPI_CONREG_OFFSET)
+#define IMX_ECSPI1_CONFIGREG (IMX_ECSPI1_VBASE + ECSPI_CONFIGREG_OFFSET)
+#define IMX_ECSPI1_INTREG (IMX_ECSPI1_VBASE + ECSPI_INTREG_OFFSET)
+#define IMX_ECSPI1_DMAREG (IMX_ECSPI1_VBASE + ECSPI_DMAREG_OFFSET)
+#define IMX_ECSPI1_STATREG (IMX_ECSPI1_VBASE + ECSPI_STATREG_OFFSET)
+#define IMX_ECSPI1_PERIODREG (IMX_ECSPI1_VBASE + ECSPI_PERIODREG_OFFSET)
+#define IMX_ECSPI1_TESTREG (IMX_ECSPI1_VBASE + ECSPI_TESTREG_OFFSET)
+#define IMX_ECSPI1_MSGDATA (IMX_ECSPI1_VBASE + ECSPI_MSGDATA_OFFSET)
+
+/* ECSPI2 */
+
+#define IMX_ECSPI2_RXDATA (IMX_ECSPI2_VBASE + ECSPI_RXDATA_OFFSET)
+#define IMX_ECSPI2_TXDATA (IMX_ECSPI2_VBASE + ECSPI_TXDATA_OFFSET)
+#define IMX_ECSPI2_CONREG (IMX_ECSPI2_VBASE + ECSPI_CONREG_OFFSET)
+#define IMX_ECSPI2_CONFIGREG (IMX_ECSPI2_VBASE + ECSPI_CONFIGREG_OFFSET)
+#define IMX_ECSPI2_INTREG (IMX_ECSPI2_VBASE + ECSPI_INTREG_OFFSET)
+#define IMX_ECSPI2_DMAREG (IMX_ECSPI2_VBASE + ECSPI_DMAREG_OFFSET)
+#define IMX_ECSPI2_STATREG (IMX_ECSPI2_VBASE + ECSPI_STATREG_OFFSET)
+#define IMX_ECSPI2_PERIODREG (IMX_ECSPI2_VBASE + ECSPI_PERIODREG_OFFSET)
+#define IMX_ECSPI2_TESTREG (IMX_ECSPI2_VBASE + ECSPI_TESTREG_OFFSET)
+#define IMX_ECSPI2_MSGDATA (IMX_ECSPI2_VBASE + ECSPI_MSGDATA_OFFSET)
+
+/* ECSPI3 */
+
+#define IMX_ECSPI3_RXDATA (IMX_ECSPI3_VBASE + ECSPI_RXDATA_OFFSET)
+#define IMX_ECSPI3_TXDATA (IMX_ECSPI3_VBASE + ECSPI_TXDATA_OFFSET)
+#define IMX_ECSPI3_CONREG (IMX_ECSPI3_VBASE + ECSPI_CONREG_OFFSET)
+#define IMX_ECSPI3_CONFIGREG (IMX_ECSPI3_VBASE + ECSPI_CONFIGREG_OFFSET)
+#define IMX_ECSPI3_INTREG (IMX_ECSPI3_VBASE + ECSPI_INTREG_OFFSET)
+#define IMX_ECSPI3_DMAREG (IMX_ECSPI3_VBASE + ECSPI_DMAREG_OFFSET)
+#define IMX_ECSPI3_STATREG (IMX_ECSPI3_VBASE + ECSPI_STATREG_OFFSET)
+#define IMX_ECSPI3_PERIODREG (IMX_ECSPI3_VBASE + ECSPI_PERIODREG_OFFSET)
+#define IMX_ECSPI3_TESTREG (IMX_ECSPI3_VBASE + ECSPI_TESTREG_OFFSET)
+#define IMX_ECSPI3_MSGDATA (IMX_ECSPI3_VBASE + ECSPI_MSGDATA_OFFSET)
+
+/* ECSPI4 */
+
+#define IMX_ECSPI4_RXDATA (IMX_ECSPI4_VBASE + ECSPI_RXDATA_OFFSET)
+#define IMX_ECSPI4_TXDATA (IMX_ECSPI4_VBASE + ECSPI_TXDATA_OFFSET)
+#define IMX_ECSPI4_CONREG (IMX_ECSPI4_VBASE + ECSPI_CONREG_OFFSET)
+#define IMX_ECSPI4_CONFIGREG (IMX_ECSPI4_VBASE + ECSPI_CONFIGREG_OFFSET)
+#define IMX_ECSPI4_INTREG (IMX_ECSPI4_VBASE + ECSPI_INTREG_OFFSET)
+#define IMX_ECSPI4_DMAREG (IMX_ECSPI4_VBASE + ECSPI_DMAREG_OFFSET)
+#define IMX_ECSPI4_STATREG (IMX_ECSPI4_VBASE + ECSPI_STATREG_OFFSET)
+#define IMX_ECSPI4_PERIODREG (IMX_ECSPI4_VBASE + ECSPI_PERIODREG_OFFSET)
+#define IMX_ECSPI4_TESTREG (IMX_ECSPI4_VBASE + ECSPI_TESTREG_OFFSET)
+#define IMX_ECSPI4_MSGDATA (IMX_ECSPI4_VBASE + ECSPI_MSGDATA_OFFSET)
+
+/* ECSPI5 */
+
+#define IMX_ECSPI5_RXDATA (IMX_ECSPI5_VBASE + ECSPI_RXDATA_OFFSET)
+#define IMX_ECSPI5_TXDATA (IMX_ECSPI5_VBASE + ECSPI_TXDATA_OFFSET)
+#define IMX_ECSPI5_CONREG (IMX_ECSPI5_VBASE + ECSPI_CONREG_OFFSET)
+#define IMX_ECSPI5_CONFIGREG (IMX_ECSPI5_VBASE + ECSPI_CONFIGREG_OFFSET)
+#define IMX_ECSPI5_INTREG (IMX_ECSPI5_VBASE + ECSPI_INTREG_OFFSET)
+#define IMX_ECSPI5_DMAREG (IMX_ECSPI5_VBASE + ECSPI_DMAREG_OFFSET)
+#define IMX_ECSPI5_STATREG (IMX_ECSPI5_VBASE + ECSPI_STATREG_OFFSET)
+#define IMX_ECSPI5_PERIODREG (IMX_ECSPI5_VBASE + ECSPI_PERIODREG_OFFSET)
+#define IMX_ECSPI5_TESTREG (IMX_ECSPI5_VBASE + ECSPI_TESTREG_OFFSET)
+#define IMX_ECSPI5_MSGDATA (IMX_ECSPI5_VBASE + ECSPI_MSGDATA_OFFSET)
+
+/* ECSPI Register Bit Definitions ***************************************************/
+
+/* Control Register */
+
+#define ECSPI_CONREG_EN (1 << 0) /* Bit 0: SPI Block enable control */
+#define ECSPI_CONREG_HT (1 << 1) /* Bit 1: Hardware trigger enable */
+#define ECSPI_CONREG_XCH (1 << 2) /* Bit 2: SPI Exchange bit */
+#define ECSPI_CONREG_SMC (1 << 3) /* Bit 3: Start mode control */
+#define ECSPI_CONREG_CHMODE_SHIFT (4) /* Bits 4-7: SPI Channel mode */
+#define ECSPI_CONREG_CHMODE_MASK (15 << ECSPI_CONREG_CHMODE_SHIFT)
+# define ECSPI_CONREG_CH0MASTER (1 << ECSPI_CONREG_CHMODE_SHIFT) /* Channel 0 master mode */
+# define ECSPI_CONREG_CH1MASTER (2 << ECSPI_CONREG_CHMODE_SHIFT) /* Channel 1 master mode */
+# define ECSPI_CONREG_CH2MASTER (4 << ECSPI_CONREG_CHMODE_SHIFT) /* Channel 2 master mode */
+# define ECSPI_CONREG_CH3MASTER (8 << ECSPI_CONREG_CHMODE_SHIFT) /* Channel 3 master mode */
+#define ECSPI_CONREG_POSTDIV_SHIFT (8) /* Bits 8-11: SPI Post divider (exponent) */
+#define ECSPI_CONREG_POSTDIV_MASK (15 << ECSPI_CONREG_POSTDIV_SHIFT)
+# define ECSPI_CONREG_POSTDIV_EXP(n) ((uint32_t)(n) << ECSPI_CONREG_POSTDIV_SHIFT)
+# define ECSPI_CONREG_POSTDIV_1 (0 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*0 */
+# define ECSPI_CONREG_POSTDIV_2 (1 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*1 */
+# define ECSPI_CONREG_POSTDIV_4 (2 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*2 */
+# define ECSPI_CONREG_POSTDIV_8 (3 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*3 */
+# define ECSPI_CONREG_POSTDIV_16 (4 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*4 */
+# define ECSPI_CONREG_POSTDIV_32 (5 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*5 */
+# define ECSPI_CONREG_POSTDIV_64 (6 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*6 */
+# define ECSPI_CONREG_POSTDIV_128 (7 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*7 */
+# define ECSPI_CONREG_POSTDIV_256 (8 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*8 */
+# define ECSPI_CONREG_POSTDIV_512 (9 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*9 */
+# define ECSPI_CONREG_POSTDIV_1024 (10 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*10 */
+# define ECSPI_CONREG_POSTDIV_2048 (11 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*11 */
+# define ECSPI_CONREG_POSTDIV_4096 (12 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*12 */
+# define ECSPI_CONREG_POSTDIV_8192 (13 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*13 */
+# define ECSPI_CONREG_POSTDIV_16384 (14 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*14 */
+# define ECSPI_CONREG_POSTDIV_32768 (15 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*15 */
+#define ECSPI_CONREG_PREDIV_SHIFT (12) /* Bits 12-15: SPI Pre divider (minus 1) */
+#define ECSPI_CONREG_PREDIV_MASK (15 << ECSPI_CONREG_PREDIV_SHIFT)
+# define ECSPI_CONREG_PREDIV(n) ((uint32_t)(n) << ECSPI_CONREG_PREDIV_SHIFT)
+#define ECSPI_CONREG_DRCTL_SHIFT 16 /* Bits 16-17: SPI Data ready control */
+#define ECSPI_CONREG_DRCTL_MASK (3 << ECSPI_CONREG_DRCTL_SHIFT)
+# define ECSPI_CONREG_DRCTL_IGNRDY (0 << ECSPI_CONREG_DRCTL_SHIFT)
+# define ECSPI_CONREG_DRCTL_FALLING (1 << ECSPI_CONREG_DRCTL_SHIFT)
+# define ECSPI_CONREG_DRCTL_ACTVLOW (2 << ECSPI_CONREG_DRCTL_SHIFT)
+#define ECSPI_CONREG_CHSEL_SHIFT (18) /* Bits 18-19: SPI Channel select bits */
+#define ECSPI_CONREG_CHSEL_MASK (3 << ECSPI_CONREG_CHSEL_SHIFT)
+# define ECSPI_CONREG_CHSEL_SS0 (0 << ECSPI_CONREG_CHSEL_SHIFT) /* Channel 0 select (SS0) */
+# define ECSPI_CONREG_CHSEL_SS1 (1 << ECSPI_CONREG_CHSEL_SHIFT) /* Channel 1 select (SS1) */
+# define ECSPI_CONREG_CHSEL_SS2 (2 << ECSPI_CONREG_CHSEL_SHIFT) /* Channel 2 select (SS2) */
+# define ECSPI_CONREG_CHSEL_SS3 (3 << ECSPI_CONREG_CHSEL_SHIFT) /* Channel 3 select (SS3) */
+#define ECSPI_CONREG_BURSTLEN_SHIFT (20) /* Bits 20-31: Burst length */
+#define ECSPI_CONREG_BURSTLEN_MASK (0xfff << ECSPI_CONREG_BURSTLEN_SHIFT)
+# define ECSPI_CONREG_BURSTLEN(n) ((uint32_t)(n) << ECSPI_CONREG_BURSTLEN_SHIFT)
+
+/* Configuration Register */
+
+#define ECSPI_CONFIGREG_SCLKPHA_SHIFT (0) /* Bits 0-3: SPI Clock/Data Phase Control */
+#define ECSPI_CONFIGREG_SCLKPHA_MASK (15 << ECSPI_CONFIGREG_SCLKPHA_SHIFT)
+# define ECSPI_CONFIGREG_CH0PHA (1 << ECSPI_CONFIGREG_SCLKPHA_SHIFT) /* Channel 0 SCLK Phase */
+# define ECSPI_CONFIGREG_CH1PHA (2 << ECSPI_CONFIGREG_SCLKPHA_SHIFT) /* Channel 1 SCLK Phase */
+# define ECSPI_CONFIGREG_CH2PHA (4 << ECSPI_CONFIGREG_SCLKPHA_SHIFT) /* Channel 2 SCLK Phase */
+# define ECSPI_CONFIGREG_CH3PHA (8 << ECSPI_CONFIGREG_SCLKPHA_SHIFT) /* Channel 3 SCLK Phase */
+#define ECSPI_CONFIGREG_SCLKPOL_SHIFT (4) /* Bits 4-7: SPI Clock polarity control */
+#define ECSPI_CONFIGREG_SCLKPOL_MASK (15 << ECSPI_CONFIGREG_SCLKPOL_SHIFT)
+# define ECSPI_CONFIGREG_CH0POL (1 << ECSPI_CONFIGREG_SCLKPOL_SHIFT) /* Channel 0 SCLK polarity */
+# define ECSPI_CONFIGREG_CH1POL (2 << ECSPI_CONFIGREG_SCLKPOL_SHIFT) /* Channel 1 SCLK polarity */
+# define ECSPI_CONFIGREG_CH2POL (4 << ECSPI_CONFIGREG_SCLKPOL_SHIFT) /* Channel 2 SCLK polarity */
+# define ECSPI_CONFIGREG_CH3POL (8 << ECSPI_CONFIGREG_SCLKPOL_SHIFT) /* Channel 3 SCLK polarity */
+#define ECSPI_CONFIGREG_SSCTL_SHIFT (8) /* Bits 8-11: SPI SS Wave form select */
+#define ECSPI_CONFIGREG_SSCTL_MASK (15 << ECSPI_CONFIGREG_SSCTL_SHIFT)
+# define ECSPI_CONFIGREG_CH0SSCTRL (1 << ECSPI_CONFIGREG_SSCTL_SHIFT) /* Channel 0 SS control */
+# define ECSPI_CONFIGREG_CH1SSCTRL (2 << ECSPI_CONFIGREG_SSCTL_SHIFT) /* Channel 1 SS control */
+# define ECSPI_CONFIGREG_CH2SSCTRL (4 << ECSPI_CONFIGREG_SSCTL_SHIFT) /* Channel 2 SS control */
+# define ECSPI_CONFIGREG_CH3SSCTRL (8 << ECSPI_CONFIGREG_SSCTL_SHIFT) /* Channel 3 SS control */
+#define ECSPI_CONFIGREG_SSPOL_SHIFT (12) /* Bits 12-15: SPI SS Polarity select */
+#define ECSPI_CONFIGREG_SSPOL_MASK (15 << ECSPI_CONFIGREG_SSPOL_SHIFT)
+# define ECSPI_CONFIGREG_CH0SSPOL (1 << ECSPI_CONFIGREG_CHMODE_SHIFT) /* Channel 0 SS polarity */
+# define ECSPI_CONFIGREG_CH1SSPOL (2 << ECSPI_CONFIGREG_CHMODE_SHIFT) /* Channel 1 SS polarity */
+# define ECSPI_CONFIGREG_CH2SSPOL (4 << ECSPI_CONFIGREG_CHMODE_SHIFT) /* Channel 2 SS polarity */
+# define ECSPI_CONFIGREG_CH3SSPOL (8 << ECSPI_CONFIGREG_CHMODE_SHIFT) /* Channel 3 SS polarity */
+#define ECSPI_CONFIGREG_DATCTL_SHIFT (16) /* Bits 16-19: Data control */
+#define ECSPI_CONFIGREG_DATCTL_MASK (15 << ECSPI_CONFIGREG_DATCTL_SHIFT)
+# define ECSPI_CONFIGREG_CH0DATLOW (1 << ECSPI_CONFIGREG_DATCTL_SHIFT) /* Channel 0 SS low when inactive */
+# define ECSPI_CONFIGREG_CH1DATLOW (2 << ECSPI_CONFIGREG_DATCTL_SHIFT) /* Channel 1 SS low when inactive */
+# define ECSPI_CONFIGREG_CH2DATLOW (4 << ECSPI_CONFIGREG_DATCTL_SHIFT) /* Channel 2 SS low when inactive */
+# define ECSPI_CONFIGREG_CH3DATLOW (8 << ECSPI_CONFIGREG_DATCTL_SHIFT) /* Channel 3 SS low when inactive */
+#define ECSPI_CONFIGREG_SCLKCTL_SHIFT (20) /* Bits 20-23: SCLK Control */
+#define ECSPI_CONFIGREG_SCLKCTL_MASK (15 << ECSPI_CONFIGREG_SCLKCTL_SHIFT)
+# define ECSPI_CONFIGREG_CH0SCLKLOW (1 << ECSPI_CONFIGREG_SCLKCTL_SHIFT) /* Channel 0 SCLK low when inactive */
+# define ECSPI_CONFIGREG_CH1SCLKLOW (2 << ECSPI_CONFIGREG_SCLKCTL_SHIFT) /* Channel 1 SCLK low when inactive */
+# define ECSPI_CONFIGREG_CH2SCLKLOW (4 << ECSPI_CONFIGREG_SCLKCTL_SHIFT) /* Channel 2 SCLK low when inactive */
+# define ECSPI_CONFIGREG_CH3SCLKLOW (8 << ECSPI_CONFIGREG_SCLKCTL_SHIFT) /* Channel 3 SCLK low when inactive */
+#define ECSPI_CONFIGREG_HTLEN_SHIFT (24) /* Bits 24-28: HT Length */
+#define ECSPI_CONFIGREG_HTLEN_MASK (15 << ECSPI_CONFIGREG_HTLEN_SHIFT)
+# define ECSPI_CONFIGREG_HTLEN(n) ((uint32_t)(n) << ECSPI_CONFIGREG_HTLEN_SHIFT)
+ /* Bits 29-31: Reserved */
+
+/* Common Interrupt Control Register and Status Register */
+
+#define ECSPI_INT_TE (1 << 0) /* Bit 0: TXFIFO Empty Interrupt */
+#define ECSPI_INT_TDR (1 << 1) /* Bit 1: TXFIFO Data Request Interrupt */
+#define ECSPI_INT_TF (1 << 2) /* Bit 2: TXFIFO Full Interrupt */
+#define ECSPI_INT_RR (1 << 3) /* Bit 3: RXFIFO Data Ready Interrupt */
+#define ECSPI_INT_RDR (1 << 4) /* Bit 4: RXFIFO Data Request Interrupt enable */
+#define ECSPI_INT_RF (1 << 5) /* Bit 5: RXFIFO Full Interrupt */
+#define ECSPI_INT_RO (1 << 6) /* Bit 6: RXFIFO Overflow Interrupt */
+#define ECSPI_INT_TC (1 << 7) /* Bit 7: Transfer Completed Interrupt enable */
+ /* Bits 8-31: Reserved */
+
+#define ECSPI_INT_ALL 0x000000ff
+
+/* ECSPI DMA Control Register */
+
+#define ECSPI_DMAREG_TXTHRES_SHIFT (0) /* Bits 0-5: TX Threshold */
+#define ECSPI_DMAREG_TXTHRES_MASK (0x3f << ECSPI_DMAREG_TXTHRES_SHIFT)
+# define ECSPI_DMAREG_TXTHRES(n) ((uint32_t)(n) << ECSPI_DMAREG_TXTHRES_SHIFT)
+ /* Bit 6: Reserved */
+#define ECSPI_DMAREG_TEDEN (1 << 7) /* Bit 7: TXFIFO Empty DMA request enable */
+ /* Bits 8-15: Reserved */
+#define ECSPI_DMAREG_RXTHRES_SHIFT (16) /* Bits 16-21: RX Threshold */
+#define ECSPI_DMAREG_RXTHRES_MASK (0x3f << ECSPI_DMAREG_RXTHRES_SHIFT)
+# define ECSPI_DMAREG_RXTHRES(n) ((uint32_t)(n) << ECSPI_DMAREG_RXTHRES_SHIFT)
+ /* Bit 22: Reserved */
+#define ECSPI_DMAREG_RXDEN (1 << 23) /* Bit 23: RXFIFO DMA request enable */
+#define ECSPI_DMAREG_RXLEN_SHIFT (24) /* Bits 24-29: RX DMA length */
+#define ECSPI_DMAREG_RXLEN_MASK (0x3f << ECSPI_DMAREG_RXLEN_SHIFT)
+# define ECSPI_DMAREG_RXLEN(n) ((uint32_t)(n) << ECSPI_DMAREG_RXLEN_SHIFT)
+ /* Bit 30: Reserved */
+#define ECSPI_DMAREG_RXTDEN (1 << 31) /* Bit 31: RXFIFO Tail DMA request enable */
+
+/* ECSPI Sample Period Control Register */
+
+#define ECSPI_PERIODREG_PERIOD_SHIFT (0) /* Bits 0-14: Sample Period Control */
+#define ECSPI_PERIODREG_PERIOD_MASK (0x7fff << ECSPI_PERIODREG_PERIOD_SHIFT)
+# define ECSPI_PERIODREG_PERIOD(n) ((uint32_t)(n) << ECSPI_PERIODREG_PERIOD_SHIFT)
+#define ECSPI_PERIODREG_CSRC (1 << 15) /* Bit 15: Clock source control */
+#define ECSPI_PERIODREG_CSDCTL_SHIFT (16) /* Bits 16-21: Chip Select delay control */
+#define ECSPI_PERIODREG_CSDCTL_MASK (0x3f << ECSPI_PERIODREG_CSDCTL_SHIFT)
+# define ECSPI_PERIODREG_CSDCTL(n) ((uint32_t)(n) << ECSPI_PERIODREG_CSDCTL_SHIFT)
+ /* Bits 22-31: Reserved */
+
+/* Test Control Register */
+
+#define ECSPI_TESTREG_TXCNT_SHIFT (0) /* Bits 0-6: TXFIFO Counter */
+#define ECSPI_TESTREG_TXCNT_MASK (0x7f << ECSPI_TESTREG_TXCNT_SHIFT)
+# define ECSPI_TESTREG_TXCNT(n) ((uint32_t)(n) << ECSPI_TESTREG_TXCNT_SHIFT)
+ /* Bit 7: Reserved */
+#define ECSPI_TESTREG_RXCNT_SHIFT (8) /* Bits 8-14: RXFIFO Counter */
+#define ECSPI_TESTREG_RXCNT_MASK (0x7f << ECSPI_TESTREG_RXCNT_SHIFT)
+# define ECSPI_TESTREG_RXCNT(n) ((uint32_t)(n) << ECSPI_TESTREG_RXCNT_SHIFT)
+ /* Bits 15-30: Reserved */
+#define ECSPI_TESTREG_LBC (1 << 31) /* Bit 31: Loop Back Control */
+
+/* Message Data Register (32-bit message data) */
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_IMX6_CHIP_ECSPI_H */
diff --git a/arch/arm/src/imx6/chip/imx_uart.h b/arch/arm/src/imx6/chip/imx_uart.h
index 8f21d9768f6..81c2801ca8e 100644
--- a/arch/arm/src/imx6/chip/imx_uart.h
+++ b/arch/arm/src/imx6/chip/imx_uart.h
@@ -195,10 +195,10 @@
#define UART_UCR1_RRDYEN (1 << 9) /* Bit 9: Receiver ready interrupt enable */
#define UART_UCR1_ICD_SHIFT 10 /* Bit 10-11: Idle condition detect */
#define UART_UCR1_ICD_MASK (3 << UART_UCR1_ICD_SHIFT)
-# define UART_UCR1_ICD_4FRMS (0 << UART_UCR1_ICD_SHIFT) /* Idle for more than 4 frames */
-# define UART_UCR1_ICD_8FRMS (1 << UART_UCR1_ICD_SHIFT) /* Idle for more than 8 frames */
-# define UART_UCR1_ICD_16FRMS (2 << UART_UCR1_ICD_SHIFT) /* Idle for more than 16 frames */
-# define UART_UCR1_ICD_32FRMS (3 << UART_UCR1_ICD_SHIFT) /* Idle for more than 32 frames */
+# define UART_UCR1_ICD_4FRMS (0 << UART_UCR1_ICD_SHIFT) /* Idle for more than 4 frames */
+# define UART_UCR1_ICD_8FRMS (1 << UART_UCR1_ICD_SHIFT) /* Idle for more than 8 frames */
+# define UART_UCR1_ICD_16FRMS (2 << UART_UCR1_ICD_SHIFT) /* Idle for more than 16 frames */
+# define UART_UCR1_ICD_32FRMS (3 << UART_UCR1_ICD_SHIFT) /* Idle for more than 32 frames */
#define UART_UCR1_IDEN (1 << 12) /* Bit 12: Idle condition detected interrupt enable */
#define UART_UCR1_TRDYEN (1 << 13) /* Bit 13: Transmitter ready interrupt enable */
#define UART_UCR1_ADBR (1 << 14) /* Bit 14: Automatic detection of baud rate */
diff --git a/arch/arm/src/imx6/imx_cpuboot.c b/arch/arm/src/imx6/imx_cpuboot.c
index cc8494782e9..50b23b5c1d4 100644
--- a/arch/arm/src/imx6/imx_cpuboot.c
+++ b/arch/arm/src/imx6/imx_cpuboot.c
@@ -51,7 +51,9 @@
#include "chip/imx_src.h"
#include "sctlr.h"
#include "smp.h"
+#include "fpu.h"
#include "gic.h"
+#include "cp15_cacheops.h"
#ifdef CONFIG_SMP
@@ -68,44 +70,44 @@ typedef CODE void (*cpu_start_t)(void);
#if 0 /* Not used */
static const uint32_t g_cpu_reset[CONFIG_SMP_NCPUS] =
{
- 0,
+ SRC_SCR_CORE0_RST
#if CONFIG_SMP_NCPUS > 1
- SRC_SCR_CORE1_RST,
+ , SRC_SCR_CORE1_RST
#endif
#if CONFIG_SMP_NCPUS > 2
- SRC_SCR_CORE2_RST,
+ , SRC_SCR_CORE2_RST
#endif
#if CONFIG_SMP_NCPUS > 3
- SRC_SCR_CORE3_RST
+ , SRC_SCR_CORE3_RST
#endif
};
#endif
static const uint32_t g_cpu_ctrl[CONFIG_SMP_NCPUS] =
{
- 0,
+ 0
#if CONFIG_SMP_NCPUS > 1
- SRC_SCR_CORE1_ENABLE,
+ , SRC_SCR_CORE1_ENABLE
#endif
#if CONFIG_SMP_NCPUS > 2
- SRC_SCR_CORE2_ENABLE,
+ , SRC_SCR_CORE2_ENABLE
#endif
#if CONFIG_SMP_NCPUS > 3
- SRC_SCR_CORE3_ENABLE
+ , SRC_SCR_CORE3_ENABLE
#endif
};
static const uintptr_t g_cpu_gpr[CONFIG_SMP_NCPUS] =
{
- 0,
+ IMX_SRC_GPR1
#if CONFIG_SMP_NCPUS > 1
- IMX_SRC_GPR3,
+ , IMX_SRC_GPR3
#endif
#if CONFIG_SMP_NCPUS > 2
- IMX_SRC_GPR5,
+ , IMX_SRC_GPR5
#endif
#if CONFIG_SMP_NCPUS > 3
- IMX_SRC_GPR7
+ , IMX_SRC_GPR7
#endif
};
@@ -258,6 +260,12 @@ void imx_cpu_enable(void)
void arm_cpu_boot(int cpu)
{
+#ifdef CONFIG_ARCH_FPU
+ /* Initialize the FPU */
+
+ arm_fpuconfig();
+#endif
+
/* Initialize the Generic Interrupt Controller (GIC) for CPUn (n != 0) */
arm_gic_initialize();
@@ -289,6 +297,10 @@ void arm_cpu_boot(int cpu)
(void)up_irq_enable();
#endif
+ /* Invalidate CPUn L1 so that is will be reloaded from coherent L2. */
+
+ cp15_invalidate_dcache_all();
+
/* The next thing that we expect to happen is for logic running on CPU0
* to call up_cpu_start() which generate an SGI and a context switch to
* the configured NuttX IDLE task.
diff --git a/arch/arm/src/imx6/imx_ecspi.h b/arch/arm/src/imx6/imx_ecspi.h
new file mode 100644
index 00000000000..40ca57c465c
--- /dev/null
+++ b/arch/arm/src/imx6/imx_ecspi.h
@@ -0,0 +1,166 @@
+/************************************************************************************
+ * arch/arm/src/imx6/imx_ecspi.h
+ *
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_IMX6_ECSPI_H
+#define __ARCH_ARM_IMX6_ECSPI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include
+
+#include
+#include
+#include
+
+#include "chip/imx_ecspi.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif /* __cplusplus */
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+struct spi_dev_s; /* Forward reference */
+enum spi_dev_e; /* Forward reference */
+
+/************************************************************************************
+ * Name: imx_spibus_initialize
+ *
+ * Description:
+ * Initialize common parts the selected SPI port. Initialization of
+ * chip select GPIOs must have been performed by board specific logic
+ * prior to calling this function. Specifically: GPIOs should have
+ * been configured for output, and all chip selects disabled.
+ *
+ * One GPIO, SS (PB2 on the eZ8F091) is reserved as a chip select. However,
+ * If multiple devices on on the bus, then multiple chip selects will be
+ * required. Theregore, all GPIO chip management is deferred to board-
+ * specific logic.
+ *
+ * Input Parameter:
+ * Port number (for hardware that has mutiple SPI interfaces)
+ *
+ * Returned Value:
+ * Valid SPI device structre reference on succcess; a NULL on failure
+ *
+ ************************************************************************************/
+
+FAR struct spi_dev_s *imx_spibus_initialize(int port);
+
+/************************************************************************************
+ * The external functions, imx_spiselect, imx_spistatus, and imx_cmddaa must be
+ * provided by board-specific logic. These are implementations of the select and
+ * status methods of the SPI interface defined by struct spi_ops_s (see
+ * include/nuttx/spi/spi.h). All other methods (including imx_spibus_initialize()) are
+ * provided by common logic. To use this common SPI logic on your board:
+ *
+ * 1. Provide imx_spiselect() and imx_spistatus() functions in your board-specific
+ * logic. This function will perform chip selection and status operations using
+ * GPIOs in the way your board is configured.
+ * 2. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration, provide the
+ * imx_spicmddata() function in your board-specific logic. This function will
+ * perform cmd/data selection operations using GPIOs in the way your board is
+ * configured.
+ * 3. Add a call to imx_spibus_initialize() in your low level initialization logic
+ * 4. The handle returned by imx_spibus_initialize() may then be used to bind the
+ * SPI driver to higher level logic (e.g., calling mmcsd_spislotinitialize(),
+ * for example, will bind the SPI driver to the SPI MMC/SD driver).
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_IMX6_ECSPI1
+void imx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
+uint8_t imx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+int imx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
+#endif
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI2
+void imx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
+uint8_t imx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+int imx_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
+#endif
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI3
+void imx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
+uint8_t imx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+int imx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
+#endif
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI4
+void imx_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
+uint8_t imx_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+int imx_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
+#endif
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI5
+void imx_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
+uint8_t imx_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+int imx_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
+#endif
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARCH_ARM_IMX6_ECSPI_H */
diff --git a/arch/arm/src/imx6/imx_serial.c b/arch/arm/src/imx6/imx_serial.c
index 39a61fddffd..a34d2f988ad 100644
--- a/arch/arm/src/imx6/imx_serial.c
+++ b/arch/arm/src/imx6/imx_serial.c
@@ -50,6 +50,7 @@
#include
#include
+#include
#include
#include
@@ -57,6 +58,7 @@
#include "up_arch.h"
#include "up_internal.h"
+#include "gic.h"
#include "chip/imx_uart.h"
#include "imx_config.h"
#include "imx_lowputc.h"
@@ -258,6 +260,12 @@ static bool imx_txempty(struct uart_dev_s *dev);
* Private Data
****************************************************************************/
+/* Used to assure mutually exclusive access up_putc() */
+
+static sem_t g_putc_lock = SEM_INITIALIZER(1);
+
+/* Serial driver UART operations */
+
static const struct uart_ops_s g_uart_ops =
{
.setup = imx_setup,
@@ -613,6 +621,10 @@ static int imx_attach(struct uart_dev_s *dev)
ret = irq_attach(priv->irq, priv->handler);
if (ret == OK)
{
+ /* Configure as a (high) level interrupt */
+
+ (void)arm_gic_irq_trigger(priv->irq, false);
+
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
@@ -1001,6 +1013,27 @@ int up_putc(int ch)
{
struct imx_uart_s *priv = (struct imx_uart_s *)CONSOLE_DEV.priv;
uint32_t ier;
+ bool locked;
+ int ret;
+
+ /* Only one thread may enter up_putc at a time. */
+
+ locked = false;
+
+ if (!up_interrupt_context() && g_os_initstate >= OSINIT_HARDWARE)
+ {
+ ret = sem_wait(&g_putc_lock);
+ if (ret < 0)
+ {
+ return ERROR;
+ }
+
+ locked = true;
+ }
+
+ /* Disable UART interrupts and wait until the hardware is ready to send
+ * a byte.
+ */
imx_disableuartint(priv, &ier);
imx_waittxready(priv);
@@ -1018,6 +1051,12 @@ int up_putc(int ch)
imx_serialout(priv, UART_TXD_OFFSET, (uint32_t)ch);
imx_waittxready(priv);
imx_restoreuartint(priv, ier);
+
+ if (locked)
+ {
+ sem_post(&g_putc_lock);
+ }
+
return ch;
}
diff --git a/arch/arm/src/imx6/imx_timerisr.c b/arch/arm/src/imx6/imx_timerisr.c
index 50d405973f6..60f8864177f 100644
--- a/arch/arm/src/imx6/imx_timerisr.c
+++ b/arch/arm/src/imx6/imx_timerisr.c
@@ -46,6 +46,7 @@
#include
#include "up_arch.h"
+#include "gic.h"
#include "chip/imx_ccm.h"
#include "chip/imx_gpt.h"
@@ -76,10 +77,25 @@
* We should be able to use a prescaler of 1.
*/
-#define GPT_PR_VALUE 1
-#define GPT_OCR3_VALUE ((GPT_CLOCK + ((1*CLK_TCK) >> 1)) / (1*CLK_TCK))
-#define GPT_OCR2_VALUE ((GPT_CLOCK + ((2*CLK_TCK) >> 1)) / (2*CLK_TCK))
-#define GPT_OCR1_VALUE ((GPT_CLOCK + ((3*CLK_TCK) >> 1)) / (3*CLK_TCK))
+#define GPT_PR_VALUE 1
+
+/* Timer counter comparison settings:
+ *
+ * - OCR3 will interrupt at CLK_TCK ticks/second after the timer counter
+ * has been reset.
+ * - OCR2 will interrupt at 2*CLK_TCK ticks/second after the timer counter
+ * has been reset.
+ * - OCR2 will interrupt at 3*CLK_TCK ticks/second after the timer counter
+ * has been reset and then will reset the timer, starting the 3 interrupt
+ * sequence again.
+ *
+ * Using three comparisons virtually eliminates the possibility of timer
+ * interrupt overrun.
+ */
+
+#define GPT_OCR3_VALUE ((1 * GPT_CLOCK + (CLK_TCK >> 1)) / CLK_TCK)
+#define GPT_OCR2_VALUE ((2 * GPT_CLOCK + (CLK_TCK >> 1)) / CLK_TCK)
+#define GPT_OCR1_VALUE ((3 * GPT_CLOCK + (CLK_TCK >> 1)) / CLK_TCK)
/****************************************************************************
* Private Functions
@@ -164,7 +180,7 @@ void up_timer_initialize(void)
/* Disable GPT by setting EN=0 in GPT_CR register */
- cr = getreg32(IMX_GPT_CR);
+ cr = getreg32(IMX_GPT_CR);
cr &= ~GPT_CR_EN;
putreg32(cr, IMX_GPT_CR);
@@ -220,7 +236,7 @@ void up_timer_initialize(void)
*/
cr &= ~GPT_CR_FFR;
- putreg32(cr | GPT_CR_SWR, IMX_GPT_CR);
+ putreg32(cr, IMX_GPT_CR);
/* Set ENMOD=1 in GPT_CR register, to bring GPT counter to 0x00000000. If
* the ENMOD bit is 1, then the Main Counter and Prescaler Counter values
@@ -235,6 +251,10 @@ void up_timer_initialize(void)
cr |= GPT_CR_EN;
putreg32(cr, IMX_GPT_CR);
+ /* Configure as a (rising) edge-triggered interrupt */
+
+ (void)arm_gic_irq_trigger(IMX_IRQ_GPT, true);
+
/* Attach the timer interrupt vector */
(void)irq_attach(IMX_IRQ_GPT, (xcpt_t)up_timerisr);
diff --git a/arch/arm/src/kinetis/Kconfig b/arch/arm/src/kinetis/Kconfig
index 9540050b668..fdf54e1941c 100644
--- a/arch/arm/src/kinetis/Kconfig
+++ b/arch/arm/src/kinetis/Kconfig
@@ -131,42 +131,42 @@ config KINETIS_FLEXBUS
config KINETIS_UART0
bool "UART0"
default n
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
---help---
Support UART0
config KINETIS_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
---help---
Support UART1
config KINETIS_UART2
bool "UART2"
default n
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
---help---
Support UART2
config KINETIS_UART3
bool "UART3"
default n
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
---help---
Support UART3
config KINETIS_UART4
bool "UART4"
default n
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
---help---
Support UART4
config KINETIS_UART5
bool "UART5"
default n
- select ARCH_HAVE_UART5
+ select UART5_SERIALDRIVER
---help---
Support UART5
diff --git a/arch/arm/src/kl/Kconfig b/arch/arm/src/kl/Kconfig
index 4505fc3e67c..bfa40491538 100644
--- a/arch/arm/src/kl/Kconfig
+++ b/arch/arm/src/kl/Kconfig
@@ -47,21 +47,21 @@ config KL_FLEXBUS
config KL_UART0
bool "UART0"
default n
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
---help---
Support UART0
config KL_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
---help---
Support UART1
config KL_UART2
bool "UART2"
default n
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
---help---
Support UART2
diff --git a/arch/arm/src/lpc11xx/Kconfig b/arch/arm/src/lpc11xx/Kconfig
index 127f3f0db89..45bb842a302 100644
--- a/arch/arm/src/lpc11xx/Kconfig
+++ b/arch/arm/src/lpc11xx/Kconfig
@@ -55,7 +55,7 @@ config LPC11_PLL
config LPC11_UART0
bool "UART0"
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
default y
config LPC11_CAN0
diff --git a/arch/arm/src/lpc17xx/Kconfig b/arch/arm/src/lpc17xx/Kconfig
index e8ac3d3a22f..4bb53068bb6 100644
--- a/arch/arm/src/lpc17xx/Kconfig
+++ b/arch/arm/src/lpc17xx/Kconfig
@@ -172,36 +172,36 @@ config LPC17_SDCARD
config LPC17_UART0
bool "UART0"
default n
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config LPC17_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config LPC17_UART2
bool "UART2"
default n
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config LPC17_UART3
bool "UART3"
default n
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config LPC17_UART4
bool "UART4"
default n
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config LPC17_CAN1
bool "CAN1"
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
default n
config LPC17_CAN2
diff --git a/arch/arm/src/lpc17xx/lpc17_adc.c b/arch/arm/src/lpc17xx/lpc17_adc.c
index 9d761c6afad..490b25bf800 100644
--- a/arch/arm/src/lpc17xx/lpc17_adc.c
+++ b/arch/arm/src/lpc17xx/lpc17_adc.c
@@ -2,8 +2,9 @@
* arch/arm/src/lpc17xx/lpc17_adc.c
*
* Copyright (C) 2011 Li Zhuoyi. All rights reserved.
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Li Zhuoyi
- * History: 0.1 2011-08-05 initial version
+ * Gregory Nutt
*
* This file is a part of NuttX:
*
@@ -50,6 +51,7 @@
#include
#include
#include
+#include
#include
#include
@@ -87,6 +89,7 @@
struct up_dev_s
{
+ FAR const struct adc_callback_s *cb;
uint8_t mask;
uint32_t sps;
int irq;
@@ -98,8 +101,12 @@ struct up_dev_s
* Private Function Prototypes
****************************************************************************/
+static void adc_receive(FAR struct up_dev_s *priv, uint8_t ch, int32_t data);
+
/* ADC methods */
+static int adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback);
static void adc_reset(FAR struct adc_dev_s *dev);
static int adc_setup(FAR struct adc_dev_s *dev);
static void adc_shutdown(FAR struct adc_dev_s *dev);
@@ -113,6 +120,7 @@ static int adc_interrupt(int irq, void *context);
static const struct adc_ops_s g_adcops =
{
+ .ao_bind = adc_bind,
.ao_reset = adc_reset,
.ao_setup = adc_setup,
.ao_shutdown = adc_shutdown,
@@ -137,6 +145,46 @@ static struct adc_dev_s g_adcdev =
* Private Functions
****************************************************************************/
+/****************************************************************************
+ * Name: adc_receive
+ *
+ * Description:
+ * Provide received ADC dat to the upper-half driver.
+ *
+ ****************************************************************************/
+
+static void adc_receive(FAR struct up_dev_s *priv, uint8_t ch, int32_t data)
+{
+ /* Verify that the upper-half driver has bound its callback functions. */
+
+ if (priv->cb != NULL)
+ {
+ /* Perform the data received callback */
+
+ DEBUGASSERT(priv->cb->au_receive != NULL);
+ priv->cb->au_receive(&g_adcdev, ch, data);
+ }
+}
+
+/****************************************************************************
+ * Name: adc_bind
+ *
+ * Description:
+ * Bind the upper-half driver callbacks to the lower-half implementation. This
+ * must be called early in order to receive ADC event notifications.
+ *
+ ****************************************************************************/
+
+static int adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback)
+{
+ FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
+
+ DEBUGASSERT(priv != NULL);
+ priv->cb = callback;
+ return OK;
+}
+
/****************************************************************************
* Name: adc_reset
*
@@ -384,7 +432,7 @@ static int adc_interrupt(int irq, void *context)
{
value = priv->buf[ch] / priv->count[ch];
value <<= 15;
- adc_receive(&g_adcdev, ch, value);
+ adc_receive(priv, ch, value);
priv->buf[ch] = 0;
priv->count[ch] = 0;
}
@@ -409,7 +457,7 @@ static int adc_interrupt(int irq, void *context)
{
value = priv->buf[ch] / priv->count[ch];
value <<= 15;
- adc_receive(&g_adcdev, ch, value);
+ adc_receive(priv, ch, value);
priv->buf[ch] = 0;
priv->count[ch] = 0;
}
@@ -446,7 +494,7 @@ static int adc_interrupt(int irq, void *context)
#else /* CONFIG_ADC_WORKER_THREAD */
if ((regVal) & (1 << 31))
{
- adc_receive(&g_adcdev, 0, (regVal >> 4) & 0xFFF);
+ adc_receive(priv, 0, (regVal >> 4) & 0xFFF);
}
#endif /* CONFIG_ADC_WORKER_THREAD */
@@ -473,7 +521,7 @@ static int adc_interrupt(int irq, void *context)
#else /* CONFIG_ADC_WORKER_THREAD */
if ((regVal) & (1 << 31))
{
- adc_receive(&g_adcdev, 1, (regVal >> 4) & 0xFFF);
+ adc_receive(priv, 1, (regVal >> 4) & 0xFFF);
}
#endif /* CONFIG_ADC_WORKER_THREAD */
@@ -500,7 +548,7 @@ static int adc_interrupt(int irq, void *context)
#else /* CONFIG_ADC_WORKER_THREAD */
if ((regVal) & (1 << 31))
{
- adc_receive(&g_adcdev, 2, (regVal >> 4) & 0xFFF);
+ adc_receive(priv, 2, (regVal >> 4) & 0xFFF);
}
#endif /* CONFIG_ADC_WORKER_THREAD */
@@ -512,7 +560,7 @@ static int adc_interrupt(int irq, void *context)
regVal = getreg32(LPC17_ADC_DR3);
if ((regVal) & (1 << 31))
{
- adc_receive(&g_adcdev, 3, (regVal >> 4) & 0xFFF);
+ adc_receive(priv, 3, (regVal >> 4) & 0xFFF);
}
}
@@ -521,7 +569,7 @@ static int adc_interrupt(int irq, void *context)
regVal = getreg32(LPC17_ADC_DR4);
if ((regVal) & (1 << 31))
{
- adc_receive(&g_adcdev, 4, (regVal >> 4) & 0xFFF);
+ adc_receive(priv, 4, (regVal >> 4) & 0xFFF);
}
}
@@ -530,7 +578,7 @@ static int adc_interrupt(int irq, void *context)
regVal = getreg32(LPC17_ADC_DR5);
if ((regVal) & (1 << 31))
{
- adc_receive(&g_adcdev, 5, (regVal >> 4) & 0xFFF);
+ adc_receive(priv, 5, (regVal >> 4) & 0xFFF);
}
}
@@ -539,7 +587,7 @@ static int adc_interrupt(int irq, void *context)
regVal = getreg32(LPC17_ADC_DR6);
if ((regVal) & (1 << 31))
{
- adc_receive(&g_adcdev, 6, (regVal >> 4) & 0xFFF);
+ adc_receive(priv, 6, (regVal >> 4) & 0xFFF);
}
}
@@ -548,7 +596,7 @@ static int adc_interrupt(int irq, void *context)
regVal = getreg32(LPC17_ADC_DR7);
if ((regVal) & (1 << 31))
{
- adc_receive(&g_adcdev, 7, (regVal >> 4) & 0xFFF);
+ adc_receive(priv, 7, (regVal >> 4) & 0xFFF);
}
}
diff --git a/arch/arm/src/lpc214x/Kconfig b/arch/arm/src/lpc214x/Kconfig
index 857b5f54d0e..68926095cf0 100644
--- a/arch/arm/src/lpc214x/Kconfig
+++ b/arch/arm/src/lpc214x/Kconfig
@@ -92,12 +92,12 @@ menu "LPC214x Peripheral Support"
config LPC214X_UART0
bool
default y
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
config LPC214X_UART1
bool
default y
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
config LPC214X_USBDEV
bool "USB Device"
diff --git a/arch/arm/src/lpc2378/Kconfig b/arch/arm/src/lpc2378/Kconfig
index 4e153df4013..08197970c66 100644
--- a/arch/arm/src/lpc2378/Kconfig
+++ b/arch/arm/src/lpc2378/Kconfig
@@ -118,22 +118,22 @@ menu "LPC2378 Peripheral Support"
config LPC2378_UART0
bool "UART0"
default n
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
config LPC2378_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
config LPC2378_UART2
bool "UART2"
default n
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
config LPC2378_UART3
bool "UART3"
default n
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
config LPC2378_USBDEV
bool "USB Device"
diff --git a/arch/arm/src/lpc31xx/Kconfig b/arch/arm/src/lpc31xx/Kconfig
index bb3f9435068..ffdaa811460 100644
--- a/arch/arm/src/lpc31xx/Kconfig
+++ b/arch/arm/src/lpc31xx/Kconfig
@@ -51,7 +51,7 @@ menu "LPC31xx Peripheral Support"
config LPC31_UART
bool "UART"
default n
- select ARCH_HAVE_UART
+ select UART_SERIALDRIVER
config LPC31_SPI
bool "SPI"
diff --git a/arch/arm/src/lpc43xx/Kconfig b/arch/arm/src/lpc43xx/Kconfig
index b0385a9d3c3..5b7d730151e 100644
--- a/arch/arm/src/lpc43xx/Kconfig
+++ b/arch/arm/src/lpc43xx/Kconfig
@@ -37,6 +37,9 @@ config ARCH_CHIP_LPC4330FET256
config ARCH_CHIP_LPC4337JBD144
bool "LPC4337JBD144"
+config ARCH_CHIP_LPC4337JET100
+ bool "LPC4337JET100"
+
config ARCH_CHIP_LPC4350FBD208
bool "LPC4350FBD208"
@@ -81,7 +84,7 @@ config ARCH_FAMILY_LPC4320
config ARCH_FAMILY_LPC4330
bool
- default y if ARCH_CHIP_LPC4330FBD144 || ARCH_CHIP_LPC4330FET100 || ARCH_CHIP_LPC4330FET180 || ARCH_CHIP_LPC4330FET256
+ default y if ARCH_CHIP_LPC4330FBD144 || ARCH_CHIP_LPC4330FET100 || ARCH_CHIP_LPC4330FET180 || ARCH_CHIP_LPC4330FET256 || ARCH_CHIP_LPC4337JET100
select ARCH_HAVE_TICKLESS
config ARCH_FAMILY_LPC4337
@@ -271,25 +274,25 @@ config LPC43_TMR3
config LPC43_USART0
bool "USART0"
default n
- select ARCH_HAVE_USART0
+ select USART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config LPC43_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config LPC43_USART2
bool "USART2"
default n
- select ARCH_HAVE_USART2
+ select USART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config LPC43_USART3
bool "USART3"
default n
- select ARCH_HAVE_USART3
+ select USART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config LPC43_USBOTG
diff --git a/arch/arm/src/lpc43xx/Make.defs b/arch/arm/src/lpc43xx/Make.defs
index 2ec96995545..018b929d4d4 100644
--- a/arch/arm/src/lpc43xx/Make.defs
+++ b/arch/arm/src/lpc43xx/Make.defs
@@ -182,6 +182,10 @@ ifeq ($(CONFIG_LPC43_USBOTG),y)
CHIP_CSRCS += lpc43_ehci.c
endif
+ifeq ($(CONFIG_CRYPTO_AES),y)
+CHIP_CSRCS += lpc43_aes.c
+endif
+
ifeq ($(CONFIG_LPC43_USB0),y)
ifeq ($(CONFIG_USBDEV),y)
CHIP_CSRCS += lpc43_usb0dev.c
diff --git a/arch/arm/src/lpc43xx/chip.h b/arch/arm/src/lpc43xx/chip.h
index 08ef7217a52..630bdcb1909 100644
--- a/arch/arm/src/lpc43xx/chip.h
+++ b/arch/arm/src/lpc43xx/chip.h
@@ -141,6 +141,10 @@
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc435357_memorymap.h"
# include "chip/lpc4357fet256_pinconfig.h"
+#elif defined(CONFIG_ARCH_CHIP_LPC4337JET100)
+# define ARMV7M_PERIPHERAL_INTERRUPTS 53
+# include "chip/lpc435357_memorymap.h"
+# include "chip/lpc4337jet100_pinconfig.h"
#else
# error "Unsupported LPC43xx chip"
#endif
diff --git a/arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h b/arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h
new file mode 100644
index 00000000000..cf3fcd22132
--- /dev/null
+++ b/arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h
@@ -0,0 +1,982 @@
+/****************************************************************************************************
+ * arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h
+ *
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_LPC43XX_CHIP_LPC4337JET100_PINCONF_H
+#define __ARCH_ARM_SRC_LPC43XX_CHIP_LPC4337JET100_PINCONF_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+/* NOTES:
+ *
+ * 1. These settings were taken from the LPC43_10_20_30_50 data sheet and may not be applicable to
+ * any other family members.
+ *
+ * 2. Settings taken from the data sheet include only function, pin set, and pin number. Additional
+ * settings must be verified before using these pin configurations (like pull-ups, open-drain,
+ * drive strength, input buffering, etc.).
+ *
+ * 3. Alternative pin selections are provided with a numeric suffix like _1, _2, etc. Drivers,
+ * however, will use the pin selection without the numeric suffix. Additional definitions are
+ * required in the board.h file to select between the alternative pins. For example, if CAN1_RD
+ * connects via Pins1[18], then the following definition should appear in the board.h header file
+ * for that board:
+ *
+ * 4. For ADC pins (PINCONF_ADCNpM), the pin must first be configured configured as a GPIO input.
+ * Then SCU's ADC function select register can be used to select the ADC.
+ *
+ * #define PINCONF_CAN1_RD PINCONF_CAN1_RD_1
+ *
+ * The driver will then automatically configre Pins1[18] as the CAN1 RD pin.
+ */
+
+#define PINCONF_ADC0p0 (PINCONF_FUNC0|PINCONF_PINS4|PINCONF_PIN_3)
+#define PINCONF_ADC0p1 (PINCONF_FUNC0|PINCONF_PINS4|PINCONF_PIN_1)
+#define PINCONF_ADC0p2 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_8)
+#define PINCONF_ADC0p3 (PINCONF_FUNC0|PINCONF_PINS7|PINCONF_PIN_5)
+#define PINCONF_ADC0p4 (PINCONF_FUNC0|PINCONF_PINS7|PINCONF_PIN_4)
+#define PINCONF_ADC0p5 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_10)
+#define PINCONF_ADC0p6 (PINCONF_FUNC0|PINCONF_PINSB|PINCONF_PIN_6)
+
+#define PINCONF_ADC1p0 (PINCONF_FUNC4|PINCONF_PINSC|PINCONF_PIN_3)
+#define PINCONF_ADC1p1 (PINCONF_FUNC0|PINCONF_PINSC|PINCONF_PIN_0)
+#define PINCONF_ADC1p2 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_9)
+#define PINCONF_ADC1p3 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_6)
+#define PINCONF_ADC1p4 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_5)
+#define PINCONF_ADC1p5 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_11)
+#define PINCONF_ADC1p6 (PINCONF_FUNC0|PINCONF_PINS7|PINCONF_PIN_7)
+#define PINCONF_ADC1p7 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_7)
+
+#define PINCONF_ADCTRIG0 (PINCONF_FUNC0|PINCONF_PINSE|PINCONF_PIN_2)
+#define PINCONF_ADCTRIG1_1 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_3)
+#define PINCONF_ADCTRIG1_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_5)
+
+#define PINCONF_CAN0_RD_1 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_2)
+#define PINCONF_CAN0_RD_2 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_1)
+#define PINCONF_CAN0_TD_1 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_3)
+#define PINCONF_CAN0_TD_2 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_2)
+
+#define PINCONF_CAN1_RD_1 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_18)
+#define PINCONF_CAN1_RD_2 (PINCONF_FUNC5|PINCONF_PINSE|PINCONF_PIN_1)
+#define PINCONF_CAN1_RD_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_9)
+#define PINCONF_CAN1_TD_1 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_17)
+#define PINCONF_CAN1_TD_2 (PINCONF_FUNC5|PINCONF_PINSE|PINCONF_PIN_0)
+#define PINCONF_CAN1_TD_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_8)
+
+#define PINCONF_CGU_OUT0 (PINCONF_FUNC6|PINCONF_PINS8|PINCONF_PIN_8)
+#define PINCONF_CGU_OUT1_1 (PINCONF_FUNC4|PINCONF_PINS3|PINCONF_PIN_3)
+#define PINCONF_CGU_OUT1_2 (PINCONF_FUNC6|PINCONF_PINSA|PINCONF_PIN_0)
+
+#define PINCONF_CLKOUT (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_19)
+
+#define PINCONF_CTIN0_1 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_13)
+#define PINCONF_CTIN0_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_4)
+#define PINCONF_CTIN1_1 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_10)
+#define PINCONF_CTIN1_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_3)
+#define PINCONF_CTIN2_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_5)
+#define PINCONF_CTIN2_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_10)
+#define PINCONF_CTIN2_3 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_8)
+#define PINCONF_CTIN3_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_0)
+#define PINCONF_CTIN3_2 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_3)
+#define PINCONF_CTIN3_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_10)
+#define PINCONF_CTIN4_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_13)
+#define PINCONF_CTIN4_2 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_2)
+#define PINCONF_CTIN4_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_9)
+#define PINCONF_CTIN5_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_6)
+#define PINCONF_CTIN5_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_8)
+#define PINCONF_CTIN5_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_7)
+#define PINCONF_CTIN5_4 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_4)
+#define PINCONF_CTIN6_1 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_9)
+#define PINCONF_CTIN6_2 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_4)
+#define PINCONF_CTIN6_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_8)
+#define PINCONF_CTIN6_4 (PINCONF_FUNC5|PINCONF_PINS2|PINCONF_PIN_2)
+#define PINCONF_CTIN6_5 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_6)
+#define PINCONF_CTIN7_1 (PINCONF_FUNC5|PINCONF_PINS2|PINCONF_PIN_6)
+#define PINCONF_CTIN7_2 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_5)
+
+#define PINCONF_CTOUT0_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_8)
+#define PINCONF_CTOUT0_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_2)
+#define PINCONF_CTOUT0_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_15)
+#define PINCONF_CTOUT1_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_7)
+#define PINCONF_CTOUT1_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_1)
+#define PINCONF_CTOUT1_3 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_9)
+#define PINCONF_CTOUT2_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_10)
+#define PINCONF_CTOUT2_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_4)
+#define PINCONF_CTOUT2_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_6)
+#define PINCONF_CTOUT3_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_9)
+#define PINCONF_CTOUT3_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_3)
+#define PINCONF_CTOUT3_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_5)
+#define PINCONF_CTOUT4_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_12)
+#define PINCONF_CTOUT4_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_6)
+#define PINCONF_CTOUT4_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_8)
+#define PINCONF_CTOUT5_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_11)
+#define PINCONF_CTOUT5_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_5)
+#define PINCONF_CTOUT5_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_7)
+#define PINCONF_CTOUT6_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_2)
+#define PINCONF_CTOUT6_2 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_5)
+#define PINCONF_CTOUT6_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_3)
+#define PINCONF_CTOUT6_4 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_1)
+#define PINCONF_CTOUT7_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_1)
+#define PINCONF_CTOUT7_2 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_12)
+#define PINCONF_CTOUT7_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_2)
+#define PINCONF_CTOUT7_4 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_2)
+#define PINCONF_CTOUT8_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_3)
+#define PINCONF_CTOUT8_2 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_7)
+#define PINCONF_CTOUT8_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_4)
+#define PINCONF_CTOUT8_4 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_3)
+#define PINCONF_CTOUT8_5 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_15)
+#define PINCONF_CTOUT9_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_4)
+#define PINCONF_CTOUT9_2 (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_4)
+#define PINCONF_CTOUT9_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_5)
+#define PINCONF_CTOUT10_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_5)
+#define PINCONF_CTOUT10_2 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_0)
+#define PINCONF_CTOUT10_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_6)
+#define PINCONF_CTOUT10_4 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_12)
+#define PINCONF_CTOUT11_1 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_6)
+#define PINCONF_CTOUT11_2 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_12)
+#define PINCONF_CTOUT11_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_9)
+#define PINCONF_CTOUT11_4 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_14)
+#define PINCONF_CTOUT12_1 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_5)
+#define PINCONF_CTOUT12_2 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_11)
+#define PINCONF_CTOUT12_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_8)
+#define PINCONF_CTOUT12_4 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_16)
+#define PINCONF_CTOUT13_1 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_4)
+#define PINCONF_CTOUT13_2 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_9)
+#define PINCONF_CTOUT13_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_7)
+#define PINCONF_CTOUT13_4 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_13)
+#define PINCONF_CTOUT14_1 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_0)
+#define PINCONF_CTOUT14_2 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_13)
+#define PINCONF_CTOUT14_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_10)
+#define PINCONF_CTOUT14_4 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_11)
+#define PINCONF_CTOUT15_1 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_1)
+#define PINCONF_CTOUT15_2 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_0)
+#define PINCONF_CTOUT15_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_11)
+
+#define PINCONF_EMC_A0 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_9)
+#define PINCONF_EMC_A1 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_10)
+#define PINCONF_EMC_A2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_11)
+#define PINCONF_EMC_A3 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_12)
+#define PINCONF_EMC_A4 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_13)
+#define PINCONF_EMC_A5 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_0)
+#define PINCONF_EMC_A6 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_1)
+#define PINCONF_EMC_A7 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_2)
+#define PINCONF_EMC_A8 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_8)
+#define PINCONF_EMC_A9 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_7)
+#define PINCONF_EMC_A10 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_6)
+#define PINCONF_EMC_A11 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_2)
+#define PINCONF_EMC_A12 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_1)
+#define PINCONF_EMC_A13 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_0)
+#define PINCONF_EMC_A14 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_8)
+#define PINCONF_EMC_A15 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_7)
+#define PINCONF_EMC_A16 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_16)
+#define PINCONF_EMC_A17 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_15)
+#define PINCONF_EMC_A18 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_0)
+#define PINCONF_EMC_A19 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_1)
+#define PINCONF_EMC_A20 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_2)
+#define PINCONF_EMC_A21 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_3)
+#define PINCONF_EMC_A22 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_4)
+#define PINCONF_EMC_A23 (PINCONF_FUNC3|PINCONF_PINSA|PINCONF_PIN_4)
+#define PINCONF_EMC_BLS0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_4)
+#define PINCONF_EMC_BLS1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_6)
+#define PINCONF_EMC_BLS2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_13)
+#define PINCONF_EMC_BLS3 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_10)
+#define PINCONF_EMC_CAS (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_4)
+#define PINCONF_EMC_CKEOUT0 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_11)
+#define PINCONF_EMC_CKEOUT1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_2)
+#define PINCONF_EMC_CKEOUT2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_1)
+#define PINCONF_EMC_CKEOUT3 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_15)
+#define PINCONF_EMC_CS0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_5)
+#define PINCONF_EMC_CS1 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_3)
+#define PINCONF_EMC_CS2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_12)
+#define PINCONF_EMC_CS3 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_11)
+#define PINCONF_EMC_D0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_7)
+#define PINCONF_EMC_D1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_8)
+#define PINCONF_EMC_D2 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_9)
+#define PINCONF_EMC_D3 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_10)
+#define PINCONF_EMC_D4 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_11)
+#define PINCONF_EMC_D5 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_EMC_D6 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_EMC_D7 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_14)
+#define PINCONF_EMC_D8 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_4)
+#define PINCONF_EMC_D9 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_5)
+#define PINCONF_EMC_D10 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_6)
+#define PINCONF_EMC_D11 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_7)
+#define PINCONF_EMC_D12 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_0)
+#define PINCONF_EMC_D13 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_1)
+#define PINCONF_EMC_D14 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_2)
+#define PINCONF_EMC_D15 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_3)
+#define PINCONF_EMC_D16 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_2)
+#define PINCONF_EMC_D17 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_3)
+#define PINCONF_EMC_D18 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_4)
+#define PINCONF_EMC_D19 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_5)
+#define PINCONF_EMC_D20 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_6)
+#define PINCONF_EMC_D21 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_7)
+#define PINCONF_EMC_D22 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_8)
+#define PINCONF_EMC_D23 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_9)
+#define PINCONF_EMC_D24 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_5)
+#define PINCONF_EMC_D25 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_6)
+#define PINCONF_EMC_D26 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_7)
+#define PINCONF_EMC_D27 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_8)
+#define PINCONF_EMC_D28 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_9)
+#define PINCONF_EMC_D29 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_10)
+#define PINCONF_EMC_D30 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_11)
+#define PINCONF_EMC_D31 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_12)
+#define PINCONF_EMC_DQMOUT0 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_12)
+#define PINCONF_EMC_DQMOUT1 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_10)
+#define PINCONF_EMC_DQMOUT2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_0)
+#define PINCONF_EMC_DQMOUT3 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_13)
+#define PINCONF_EMC_DYCS0 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_9)
+#define PINCONF_EMC_DYCS1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_1)
+#define PINCONF_EMC_DYCS2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_14)
+#define PINCONF_EMC_DYCS3 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_14)
+#define PINCONF_EMC_OE (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_3)
+#define PINCONF_EMC_RAS (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_5)
+#define PINCONF_EMC_WE (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_6)
+
+#define PINCONF_ENET_COL_1 (PINCONF_FUNC2|PINCONF_PINS0|PINCONF_PIN_1)
+#define PINCONF_ENET_COL_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_6)
+#define PINCONF_ENET_COL_3 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_1)
+#define PINCONF_ENET_CRS_1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_16)
+#define PINCONF_ENET_CRS_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_0)
+#define PINCONF_ENET_MDC_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_1)
+#define PINCONF_ENET_MDC_2 (PINCONF_FUNC6|PINCONF_PINS7|PINCONF_PIN_7)
+#define PINCONF_ENET_MDC_3 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_0)
+#define PINCONF_ENET_MDIO (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_17|PINCONF_FLOAT|PINCONF_INBUFFER|PINCONF_GLITCH)
+#define PINCONF_ENET_REF_CLK (PINCONF_FUNC0|PINCONF_PINS1|PINCONF_PIN_19|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_FLOAT)
+#define PINCONF_ENET_RXD0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_15|PINCONF_FLOAT|PINCONF_INBUFFER|PINCONF_GLITCH)
+#define PINCONF_ENET_RXD1 (PINCONF_FUNC2|PINCONF_PINS0|PINCONF_PIN_0|PINCONF_FLOAT|PINCONF_INBUFFER|PINCONF_GLITCH)
+#define PINCONF_ENET_RXD2_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_6)
+#define PINCONF_ENET_RXD2_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_3)
+#define PINCONF_ENET_RXD3_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_7)
+#define PINCONF_ENET_RXD3_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_2)
+#define PINCONF_ENET_RX_CLK (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_0)
+#define PINCONF_ENET_RX_DV_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_8)
+#define PINCONF_ENET_RX_DV_2 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_16|PINCONF_FLOAT|PINCONF_INBUFFER|PINCONF_GLITCH)
+#define PINCONF_ENET_RX_ER_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_9)
+#define PINCONF_ENET_RX_ER_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_1)
+#define PINCONF_ENET_TXD0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_18|PINCONF_FLOAT|PINCONF_GLITCH)
+#define PINCONF_ENET_TXD1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_20|PINCONF_FLOAT|PINCONF_GLITCH)
+#define PINCONF_ENET_TXD2_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_2)
+#define PINCONF_ENET_TXD2_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_4)
+#define PINCONF_ENET_TXD3_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_3)
+#define PINCONF_ENET_TXD3_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_5)
+#define PINCONF_ENET_TXEN (PINCONF_FUNC6|PINCONF_PINS0|PINCONF_PIN_1|PINCONF_FLOAT|PINCONF_GLITCH)
+#define PINCONF_ENET_TX_CLK (PINCONF_FUNC0|PINCONF_PINS1|PINCONF_PIN_19)
+#define PINCONF_ENET_TX_EN (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_4)
+#define PINCONF_ENET_TX_ER_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_5)
+#define PINCONF_ENET_TX_ER_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_14)
+
+#define PINCONF_GPIO0p0 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS0|PINCONF_PIN_0)
+#define PINCONF_GPIO0p1 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS0|PINCONF_PIN_1)
+#define PINCONF_GPIO0p2 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_15)
+#define PINCONF_GPIO0p3 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_16)
+#define PINCONF_GPIO0p4 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_0)
+#define PINCONF_GPIO0p5 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_6)
+#define PINCONF_GPIO0p6 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_6)
+#define PINCONF_GPIO0p7 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_7)
+#define PINCONF_GPIO0p8 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_1)
+#define PINCONF_GPIO0p9 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_2)
+#define PINCONF_GPIO0p10 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_3)
+#define PINCONF_GPIO0p11 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_4)
+#define PINCONF_GPIO0p12 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_17)
+#define PINCONF_GPIO0p13 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_18)
+#define PINCONF_GPIO0p14 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_10)
+#define PINCONF_GPIO0p15 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_20)
+#define PINCONF_GPIO1p0 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_7)
+#define PINCONF_GPIO1p1 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_8)
+#define PINCONF_GPIO1p2 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_9)
+#define PINCONF_GPIO1p3 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_10)
+#define PINCONF_GPIO1p4 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_11)
+#define PINCONF_GPIO1p5 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_GPIO1p6 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_GPIO1p7 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_14)
+#define PINCONF_GPIO1p8 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_5)
+#define PINCONF_GPIO1p9 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_6)
+#define PINCONF_GPIO1p10 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_9)
+#define PINCONF_GPIO1p11 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_11)
+#define PINCONF_GPIO1p12 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_12)
+#define PINCONF_GPIO1p13 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_13)
+#define PINCONF_GPIO1p14 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_4)
+#define PINCONF_GPIO1p15 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_5)
+#define PINCONF_GPIO2p0 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_0)
+#define PINCONF_GPIO2p1 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_1)
+#define PINCONF_GPIO2p2 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_2)
+#define PINCONF_GPIO2p3 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_3)
+#define PINCONF_GPIO2p4 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_4)
+#define PINCONF_GPIO2p5 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_5)
+#define PINCONF_GPIO2p6 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_6)
+#define PINCONF_GPIO2p7 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_7)
+#define PINCONF_GPIO2p8 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_12)
+#define PINCONF_GPIO2p9 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_0)
+#define PINCONF_GPIO2p10 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_1)
+#define PINCONF_GPIO2p11 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_2)
+#define PINCONF_GPIO2p12 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_3)
+#define PINCONF_GPIO2p13 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_4)
+#define PINCONF_GPIO2p14 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_5)
+#define PINCONF_GPIO2p15 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_6)
+#define PINCONF_GPIO3p0 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_1)
+#define PINCONF_GPIO3p1 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_2)
+#define PINCONF_GPIO3p2 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_3)
+#define PINCONF_GPIO3p3 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_4)
+#define PINCONF_GPIO3p4 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_5)
+#define PINCONF_GPIO3p5 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_9)
+#define PINCONF_GPIO3p6 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_10)
+#define PINCONF_GPIO3p7 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_11)
+#define PINCONF_GPIO3p8 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_0)
+#define PINCONF_GPIO3p9 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_1)
+#define PINCONF_GPIO3p10 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_2)
+#define PINCONF_GPIO3p11 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_3)
+#define PINCONF_GPIO3p12 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_4)
+#define PINCONF_GPIO3p13 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_5)
+#define PINCONF_GPIO3p14 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_6)
+#define PINCONF_GPIO3p15 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_7)
+#define PINCONF_GPIO4p0 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_0)
+#define PINCONF_GPIO4p1 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_1)
+#define PINCONF_GPIO4p2 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_2)
+#define PINCONF_GPIO4p3 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_3)
+#define PINCONF_GPIO4p4 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_4)
+#define PINCONF_GPIO4p5 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_5)
+#define PINCONF_GPIO4p6 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_6)
+#define PINCONF_GPIO4p7 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_7)
+#define PINCONF_GPIO4p8 (PINCONF_FUNC0|PINCONF_PINSA|PINCONF_PIN_1)
+#define PINCONF_GPIO4p9 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINSA|PINCONF_PIN_2)
+#define PINCONF_GPIO4p10 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINSA|PINCONF_PIN_3)
+#define PINCONF_GPIO4p11 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_6)
+#define PINCONF_GPIO4p12 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_0)
+#define PINCONF_GPIO4p13 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_1)
+#define PINCONF_GPIO4p14 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_2)
+#define PINCONF_GPIO4p15 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_3)
+#define PINCONF_GPIO5p0 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_0)
+#define PINCONF_GPIO5p1 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_1)
+#define PINCONF_GPIO5p2 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_2)
+#define PINCONF_GPIO5p3 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_3)
+#define PINCONF_GPIO5p4 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_4)
+#define PINCONF_GPIO5p5 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_5)
+#define PINCONF_GPIO5p6 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_6)
+#define PINCONF_GPIO5p7 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_8)
+#define PINCONF_GPIO5p8 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_1)
+#define PINCONF_GPIO5p9 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_2)
+#define PINCONF_GPIO5p10 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_7)
+#define PINCONF_GPIO5p11 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_8)
+#define PINCONF_GPIO5p12 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_8)
+#define PINCONF_GPIO5p13 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_9)
+#define PINCONF_GPIO5p14 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_10)
+#define PINCONF_GPIO5p15 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_7)
+#define PINCONF_GPIO5p16 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_8)
+#define PINCONF_GPIO5p17 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_4)
+#define PINCONF_GPIO5p18 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_5)
+#define PINCONF_GPIO5p19 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSA|PINCONF_PIN_4)
+#define PINCONF_GPIO5p20 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_0)
+#define PINCONF_GPIO5p21 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_1)
+#define PINCONF_GPIO5p22 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_2)
+#define PINCONF_GPIO5p23 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_3)
+#define PINCONF_GPIO5p24 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_4)
+#define PINCONF_GPIO5p25 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_5)
+#define PINCONF_GPIO5p26 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_6)
+#define PINCONF_GPIO6p0 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_1)
+#define PINCONF_GPIO6p1 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_2)
+#define PINCONF_GPIO6p2 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_3)
+#define PINCONF_GPIO6p3 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_4)
+#define PINCONF_GPIO6p4 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_5)
+#define PINCONF_GPIO6p5 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_6)
+#define PINCONF_GPIO6p6 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_7)
+#define PINCONF_GPIO6p7 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_8)
+#define PINCONF_GPIO6p8 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_9)
+#define PINCONF_GPIO6p9 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_10)
+#define PINCONF_GPIO6p10 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_11)
+#define PINCONF_GPIO6p11 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_12)
+#define PINCONF_GPIO6p12 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_13)
+#define PINCONF_GPIO6p13 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_14)
+#define PINCONF_GPIO6p14 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_0)
+#define PINCONF_GPIO6p15 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_1)
+#define PINCONF_GPIO6p16 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_2)
+#define PINCONF_GPIO6p17 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_3)
+#define PINCONF_GPIO6p18 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_4)
+#define PINCONF_GPIO6p19 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_5)
+#define PINCONF_GPIO6p20 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_6)
+#define PINCONF_GPIO6p21 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_7)
+#define PINCONF_GPIO6p22 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_8)
+#define PINCONF_GPIO6p23 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_9)
+#define PINCONF_GPIO6p24 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_10)
+#define PINCONF_GPIO6p25 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_11)
+#define PINCONF_GPIO6p26 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_12)
+#define PINCONF_GPIO6p27 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_13)
+#define PINCONF_GPIO6p28 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_14)
+#define PINCONF_GPIO6p29 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_15)
+#define PINCONF_GPIO6p30 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_16)
+#define PINCONF_GPIO7p0 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_0)
+#define PINCONF_GPIO7p1 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_1)
+#define PINCONF_GPIO7p2 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_2)
+#define PINCONF_GPIO7p3 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_3)
+#define PINCONF_GPIO7p4 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_4)
+#define PINCONF_GPIO7p5 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_5)
+#define PINCONF_GPIO7p6 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_6)
+#define PINCONF_GPIO7p7 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_7)
+#define PINCONF_GPIO7p8 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_8)
+#define PINCONF_GPIO7p9 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_9)
+#define PINCONF_GPIO7p10 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_10)
+#define PINCONF_GPIO7p11 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_11)
+#define PINCONF_GPIO7p12 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_12)
+#define PINCONF_GPIO7p13 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_13)
+#define PINCONF_GPIO7p14 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_14)
+#define PINCONF_GPIO7p15 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_15)
+#define PINCONF_GPIO7p16 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_1)
+#define PINCONF_GPIO7p17 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_2)
+#define PINCONF_GPIO7p18 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_3)
+#define PINCONF_GPIO7p19 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_5)
+#define PINCONF_GPIO7p20 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_6)
+#define PINCONF_GPIO7p21 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_7)
+#define PINCONF_GPIO7p22 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_8)
+#define PINCONF_GPIO7p23 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_9)
+#define PINCONF_GPIO7p24 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_10)
+#define PINCONF_GPIO7p25 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_11)
+
+#define PINCONF_GP_CLKIN_1 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_7)
+#define PINCONF_GP_CLKIN_2 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_0)
+#define PINCONF_GP_CLKIN_3 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_4)
+
+#define PINCONF_I2C1_SCL_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_4)
+#define PINCONF_I2C1_SCL_2 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_15)
+#define PINCONF_I2C1_SDA_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_3)
+#define PINCONF_I2C1_SDA_2 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_13)
+
+#define PINCONF_I2S0_RX_MCLK_1 (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_0)
+#define PINCONF_I2S0_RX_MCLK_2 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_0)
+#define PINCONF_I2S0_RX_MCLK_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_19)
+#define PINCONF_I2S0_RX_SCK_1 (PINCONF_FUNC0|PINCONF_PINS3|PINCONF_PIN_0)
+#define PINCONF_I2S0_RX_SCK_2 (PINCONF_FUNC4|PINCONF_PINS6|PINCONF_PIN_0)
+#define PINCONF_I2S0_RX_SCK_3 (PINCONF_FUNC7|PINCONF_PINSF|PINCONF_PIN_4)
+#define PINCONF_I2S0_RX_SDA_1 (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_2)
+#define PINCONF_I2S0_RX_SDA_2 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_2)
+#define PINCONF_I2S0_RX_WS_1 (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_1)
+#define PINCONF_I2S0_RX_WS_2 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_1)
+#define PINCONF_I2S0_TXWS (PINCONF_FUNC6|PINCONF_PINS0|PINCONF_PIN_0)
+#define PINCONF_I2S0_TX_MCLK_1 (PINCONF_FUNC3|PINCONF_PINS3|PINCONF_PIN_0)
+#define PINCONF_I2S0_TX_MCLK_2 (PINCONF_FUNC6|PINCONF_PINS3|PINCONF_PIN_3)
+#define PINCONF_I2S0_TX_MCLK_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_4)
+#define PINCONF_I2S0_TX_SCK_1 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_0)
+#define PINCONF_I2S0_TX_SCK_2 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_7)
+#define PINCONF_I2S0_TX_SDA_1 (PINCONF_FUNC0|PINCONF_PINS3|PINCONF_PIN_2)
+#define PINCONF_I2S0_TX_SDA_2 (PINCONF_FUNC2|PINCONF_PINS7|PINCONF_PIN_2)
+#define PINCONF_I2S0_TX_SDA_3 (PINCONF_FUNC4|PINCONF_PINS9|PINCONF_PIN_2)
+#define PINCONF_I2S0_TX_SDA_4 (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_5)
+#define PINCONF_I2S0_TX_SDA_5 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_12)
+#define PINCONF_I2S0_TX_WS_1 (PINCONF_FUNC0|PINCONF_PINS3|PINCONF_PIN_1)
+#define PINCONF_I2S0_TX_WS_2 (PINCONF_FUNC2|PINCONF_PINS7|PINCONF_PIN_1)
+#define PINCONF_I2S0_TX_WS_3 (PINCONF_FUNC4|PINCONF_PINS9|PINCONF_PIN_1)
+#define PINCONF_I2S0_TX_WS_4 (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_4)
+#define PINCONF_I2S0_TX_WS_5 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_13)
+
+#define PINCONF_I2S1_RX_MCLK (PINCONF_FUNC5|PINCONF_PINSA|PINCONF_PIN_0)
+#define PINCONF_I2S1_RX_SDA (PINCONF_FUNC6|PINCONF_PINS3|PINCONF_PIN_4)
+#define PINCONF_I2S1_RX_WS (PINCONF_FUNC6|PINCONF_PINS3|PINCONF_PIN_5)
+#define PINCONF_I2S1_TXSDA (PINCONF_FUNC7|PINCONF_PINS0|PINCONF_PIN_1)
+#define PINCONF_I2S1_TXWS (PINCONF_FUNC7|PINCONF_PINS0|PINCONF_PIN_0)
+#define PINCONF_I2S1_TX_MCLK_1 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_8)
+#define PINCONF_I2S1_TX_MCLK_2 (PINCONF_FUNC7|PINCONF_PINSF|PINCONF_PIN_0)
+#define PINCONF_I2S1_TX_SCK_1 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_7)
+#define PINCONF_I2S1_TX_SCK_2 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_19)
+#define PINCONF_I2S1_TX_SCK_3 (PINCONF_FUNC7|PINCONF_PINS3|PINCONF_PIN_3)
+#define PINCONF_I2S1_TX_SDA (PINCONF_FUNC7|PINCONF_PINSF|PINCONF_PIN_6)
+#define PINCONF_I2S1_TX_WS (PINCONF_FUNC7|PINCONF_PINSF|PINCONF_PIN_7)
+
+#define PINCONF_LCD_DCLK_1 (PINCONF_FUNC0|PINCONF_PINS4|PINCONF_PIN_7)
+#define PINCONF_LCD_DCLK_2 (PINCONF_FUNC4|PINCONF_PINSC|PINCONF_PIN_0)
+#define PINCONF_LCD_ENAB (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_6)
+#define PINCONF_LCD_FP (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_5)
+#define PINCONF_LCD_LCDM (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_6)
+#define PINCONF_LCD_LE (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_0)
+#define PINCONF_LCD_LP_1 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_6)
+#define PINCONF_LCD_LP_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_6)
+#define PINCONF_LCD_PWR_1 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_7)
+#define PINCONF_LCD_PWR_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_7)
+#define PINCONF_LCD_PWR_3 (PINCONF_FUNC6|PINCONF_PINSB|PINCONF_PIN_5)
+#define PINCONF_LCD_VD0 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_1)
+#define PINCONF_LCD_VD1 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_4)
+#define PINCONF_LCD_VD2 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_3)
+#define PINCONF_LCD_VD3 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_2)
+#define PINCONF_LCD_VD4_1 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_7)
+#define PINCONF_LCD_VD4_2 (PINCONF_FUNC4|PINCONF_PINS7|PINCONF_PIN_4)
+#define PINCONF_LCD_VD5_1 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_6)
+#define PINCONF_LCD_VD5_2 (PINCONF_FUNC4|PINCONF_PINS7|PINCONF_PIN_3)
+#define PINCONF_LCD_VD6_1 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_5)
+#define PINCONF_LCD_VD6_2 (PINCONF_FUNC4|PINCONF_PINS7|PINCONF_PIN_2)
+#define PINCONF_LCD_VD7_1 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_4)
+#define PINCONF_LCD_VD7_2 (PINCONF_FUNC4|PINCONF_PINS7|PINCONF_PIN_1)
+#define PINCONF_LCD_VD8_1 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_5)
+#define PINCONF_LCD_VD8_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_5)
+#define PINCONF_LCD_VD9 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_8)
+#define PINCONF_LCD_VD10 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_10)
+#define PINCONF_LCD_VD11 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_9)
+#define PINCONF_LCD_VD12_1 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_3)
+#define PINCONF_LCD_VD12_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_2)
+#define PINCONF_LCD_VD12_3 (PINCONF_FUNC7|PINCONF_PINS3|PINCONF_PIN_5)
+#define PINCONF_LCD_VD13_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_6)
+#define PINCONF_LCD_VD13_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_0)
+#define PINCONF_LCD_VD13_3 (PINCONF_FUNC7|PINCONF_PINS3|PINCONF_PIN_4)
+#define PINCONF_LCD_VD14_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_5)
+#define PINCONF_LCD_VD14_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_10)
+#define PINCONF_LCD_VD14_3 (PINCONF_FUNC6|PINCONF_PINS3|PINCONF_PIN_2)
+#define PINCONF_LCD_VD15_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_4)
+#define PINCONF_LCD_VD15_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_9)
+#define PINCONF_LCD_VD15_3 (PINCONF_FUNC6|PINCONF_PINS3|PINCONF_PIN_1)
+#define PINCONF_LCD_VD16_1 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_4)
+#define PINCONF_LCD_VD16_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_4)
+#define PINCONF_LCD_VD17 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_3)
+#define PINCONF_LCD_VD18 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_2)
+#define PINCONF_LCD_VD19_1 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_1)
+#define PINCONF_LCD_VD19_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_3)
+#define PINCONF_LCD_VD19_3 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_1)
+#define PINCONF_LCD_VD19_4 (PINCONF_FUNC6|PINCONF_PINSB|PINCONF_PIN_6)
+#define PINCONF_LCD_VD20_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_3)
+#define PINCONF_LCD_VD20_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_4)
+#define PINCONF_LCD_VD21_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_2)
+#define PINCONF_LCD_VD21_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_3)
+#define PINCONF_LCD_VD22_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_1)
+#define PINCONF_LCD_VD22_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_8)
+#define PINCONF_LCD_VD23_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_0)
+#define PINCONF_LCD_VD23_2 (PINCONF_FUNC4|PINCONF_PINS7|PINCONF_PIN_5)
+
+#define PINCONF_MCABORT_1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_10)
+#define PINCONF_MCABORT_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_0)
+#define PINCONF_MCI0_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_3)
+#define PINCONF_MCI0_2 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_2)
+#define PINCONF_MCI1_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_2)
+#define PINCONF_MCI1_2 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_1)
+#define PINCONF_MCI2_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_1)
+#define PINCONF_MCI2_2 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_0)
+#define PINCONF_MCOA0_1 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_0)
+#define PINCONF_MCOA0_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_3)
+#define PINCONF_MCOA1_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_5)
+#define PINCONF_MCOA1_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_5)
+#define PINCONF_MCOA2_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_7)
+#define PINCONF_MCOA2_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_1)
+#define PINCONF_MCOB0_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_4)
+#define PINCONF_MCOB0_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_4)
+#define PINCONF_MCOB1_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_6)
+#define PINCONF_MCOB1_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_6)
+#define PINCONF_MCOB2_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_0)
+#define PINCONF_MCOB2_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_2)
+
+#define PINCONF_NMI_1 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_4)
+#define PINCONF_NMI_2 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_0)
+
+#define PINCONF_QEI_IDX (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_1)
+#define PINCONF_QEI_PHA (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_3)
+#define PINCONF_QEI_PHB (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_2)
+
+#define PINCONF_SD_CD_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_SD_CD_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_8)
+#define PINCONF_SD_CLK (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_0)
+#define PINCONF_SD_CMD_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_6)
+#define PINCONF_SD_CMD_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_10)
+#define PINCONF_SD_DAT0_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_9)
+#define PINCONF_SD_DAT0_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_4)
+#define PINCONF_SD_DAT1_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_10)
+#define PINCONF_SD_DAT1_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_5)
+#define PINCONF_SD_DAT2_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_11)
+#define PINCONF_SD_DAT2_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_6)
+#define PINCONF_SD_DAT3_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_SD_DAT3_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_7)
+#define PINCONF_SD_DAT4 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_11)
+#define PINCONF_SD_DAT5 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_12)
+#define PINCONF_SD_DAT6 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_13)
+#define PINCONF_SD_DAT7 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_14)
+#define PINCONF_SD_POW_1 (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_1)
+#define PINCONF_SD_POW_2 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_5)
+#define PINCONF_SD_POW_3 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_9)
+#define PINCONF_SD_RST_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_3)
+#define PINCONF_SD_RST_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_2)
+#define PINCONF_SD_VOLT0_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_8)
+#define PINCONF_SD_VOLT0_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_1)
+#define PINCONF_SD_VOLT1_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_4)
+#define PINCONF_SD_VOLT1_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_3)
+#define PINCONF_SD_VOLT2_1 (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_16)
+#define PINCONF_SD_VOLT2_2 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_11)
+#define PINCONF_SD_WP_1 (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_15)
+#define PINCONF_SD_WP_2 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_10)
+
+#define PINCONF_SGPIO0_1 (PINCONF_FUNC3|PINCONF_PINS0|PINCONF_PIN_0)
+#define PINCONF_SGPIO0_2 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_0)
+#define PINCONF_SGPIO0_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_1)
+#define PINCONF_SGPIO1_1 (PINCONF_FUNC3|PINCONF_PINS0|PINCONF_PIN_1)
+#define PINCONF_SGPIO1_2 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_1)
+#define PINCONF_SGPIO1_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_2)
+#define PINCONF_SGPIO2_1 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_15)
+#define PINCONF_SGPIO2_2 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_2)
+#define PINCONF_SGPIO2_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_3)
+#define PINCONF_SGPIO3_1 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_16)
+#define PINCONF_SGPIO3_2 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_5)
+#define PINCONF_SGPIO3_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_9)
+#define PINCONF_SGPIO4_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_0)
+#define PINCONF_SGPIO4_2 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_3)
+#define PINCONF_SGPIO4_3 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_4)
+#define PINCONF_SGPIO4_4 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_5)
+#define PINCONF_SGPIO4_5 (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_0)
+#define PINCONF_SGPIO4_6 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_0)
+#define PINCONF_SGPIO5_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_1)
+#define PINCONF_SGPIO5_2 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_6)
+#define PINCONF_SGPIO5_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_6)
+#define PINCONF_SGPIO5_4 (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_1)
+#define PINCONF_SGPIO5_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_1)
+#define PINCONF_SGPIO6_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_2)
+#define PINCONF_SGPIO6_2 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_7)
+#define PINCONF_SGPIO6_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_7)
+#define PINCONF_SGPIO6_4 (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_2)
+#define PINCONF_SGPIO6_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_2)
+#define PINCONF_SGPIO7_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_6)
+#define PINCONF_SGPIO7_2 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_8)
+#define PINCONF_SGPIO7_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_0)
+#define PINCONF_SGPIO7_4 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_8)
+#define PINCONF_SGPIO7_5 (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_7)
+#define PINCONF_SGPIO7_6 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_3)
+#define PINCONF_SGPIO8_1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_1)
+#define PINCONF_SGPIO8_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_0)
+#define PINCONF_SGPIO8_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_SGPIO8_4 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_6)
+#define PINCONF_SGPIO8_5 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_2)
+#define PINCONF_SGPIO8_6 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_4)
+#define PINCONF_SGPIO9_1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_2)
+#define PINCONF_SGPIO9_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_1)
+#define PINCONF_SGPIO9_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_SGPIO9_4 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_3)
+#define PINCONF_SGPIO9_5 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_3)
+#define PINCONF_SGPIO9_6 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_5)
+#define PINCONF_SGPIO10_1 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_3)
+#define PINCONF_SGPIO10_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_2)
+#define PINCONF_SGPIO10_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_14)
+#define PINCONF_SGPIO10_4 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_4)
+#define PINCONF_SGPIO10_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_6)
+#define PINCONF_SGPIO11_1 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_4)
+#define PINCONF_SGPIO11_2 (PINCONF_FUNC5|PINCONF_PINSC|PINCONF_PIN_12)
+#define PINCONF_SGPIO11_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_17)
+#define PINCONF_SGPIO11_4 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_5)
+#define PINCONF_SGPIO11_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_7)
+#define PINCONF_SGPIO12_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_3)
+#define PINCONF_SGPIO12_2 (PINCONF_FUNC5|PINCONF_PINSC|PINCONF_PIN_13)
+#define PINCONF_SGPIO12_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_18)
+#define PINCONF_SGPIO12_4 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_6)
+#define PINCONF_SGPIO12_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_8)
+#define PINCONF_SGPIO13_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_4)
+#define PINCONF_SGPIO13_2 (PINCONF_FUNC5|PINCONF_PINSC|PINCONF_PIN_14)
+#define PINCONF_SGPIO13_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_20)
+#define PINCONF_SGPIO13_4 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_8)
+#define PINCONF_SGPIO13_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_9)
+#define PINCONF_SGPIO14_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_5)
+#define PINCONF_SGPIO14_2 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_6)
+#define PINCONF_SGPIO14_3 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_9)
+#define PINCONF_SGPIO15_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_8)
+#define PINCONF_SGPIO15_2 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_5)
+#define PINCONF_SGPIO15_3 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_10)
+
+#define PINCONF_SPIFI_CS (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_PINS3|PINCONF_PIN_8)
+#define PINCONF_SPIFI_MISO (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_6)
+#define PINCONF_SPIFI_MOSI (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_7)
+#define PINCONF_SPIFI_SCK (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_3)
+#define PINCONF_SPIFI_SIO2 (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_5)
+#define PINCONF_SPIFI_SIO3 (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_4)
+
+#define PINCONF_SPI_MISO (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_6)
+#define PINCONF_SPI_MOSI (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_7)
+#define PINCONF_SPI_SCK (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_3)
+#define PINCONF_SPI_SSEL (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_8)
+
+#define PINCONF_SSP0_MISO_1 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_7)
+#define PINCONF_SSP0_MISO_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_2)
+#define PINCONF_SSP0_MISO_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_1)
+#define PINCONF_SSP0_MISO_4 (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_6)
+#define PINCONF_SSP0_MISO_5 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_1)
+#define PINCONF_SSP0_MOSI_1 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_8)
+#define PINCONF_SSP0_MOSI_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_3)
+#define PINCONF_SSP0_MOSI_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_2)
+#define PINCONF_SSP0_MOSI_4 (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_7)
+#define PINCONF_SSP0_MOSI_5 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_2)
+#define PINCONF_SSP0_SCK_1 (PINCONF_FUNC0|PINCONF_PINSF|PINCONF_PIN_0)
+#define PINCONF_SSP0_SCK_2 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_3)
+#define PINCONF_SSP0_SCK_3 (PINCONF_FUNC4|PINCONF_PINS3|PINCONF_PIN_0)
+#define PINCONF_SSP0_SSEL_1 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_6)
+#define PINCONF_SSP0_SSEL_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_1)
+#define PINCONF_SSP0_SSEL_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_0)
+#define PINCONF_SSP0_SSEL_4 (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_8)
+#define PINCONF_SSP0_SSEL_5 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_0)
+
+#define PINCONF_SSP1_MISO_1 (PINCONF_FUNC1|PINCONF_PINS0|PINCONF_PIN_0)
+#define PINCONF_SSP1_MISO_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_6)
+#define PINCONF_SSP1_MISO_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_3)
+#define PINCONF_SSP1_MOSI_1 (PINCONF_FUNC1|PINCONF_PINS0|PINCONF_PIN_1)
+#define PINCONF_SSP1_MOSI_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_7)
+#define PINCONF_SSP1_MOSI_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_4)
+#define PINCONF_SSP1_SCK_1 (PINCONF_FUNC0|PINCONF_PINSF|PINCONF_PIN_4)
+#define PINCONF_SSP1_SCK_2 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_19)
+#define PINCONF_SSP1_SSEL_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_20)
+#define PINCONF_SSP1_SSEL_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_5)
+#define PINCONF_SSP1_SSEL_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_5)
+
+#define PINCONF_T0_CAP0_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_T0_CAP0_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_4)
+#define PINCONF_T0_CAP1_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_T0_CAP1_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_5)
+#define PINCONF_T0_CAP2_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_20)
+#define PINCONF_T0_CAP2_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_6)
+#define PINCONF_T0_CAP3_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_17)
+#define PINCONF_T0_CAP3_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_7)
+#define PINCONF_T0_MAT0_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_16)
+#define PINCONF_T0_MAT0_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_0)
+#define PINCONF_T0_MAT1_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_15)
+#define PINCONF_T0_MAT1_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_1)
+#define PINCONF_T0_MAT2_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_14)
+#define PINCONF_T0_MAT2_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_2)
+#define PINCONF_T0_MAT3_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_18)
+#define PINCONF_T0_MAT3_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_3)
+
+#define PINCONF_T1_CAP0 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_0)
+#define PINCONF_T1_CAP1 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_1)
+#define PINCONF_T1_CAP2 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_2)
+#define PINCONF_T1_CAP3 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_3)
+#define PINCONF_T1_MAT0 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_4)
+#define PINCONF_T1_MAT1 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_5)
+#define PINCONF_T1_MAT2 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_6)
+#define PINCONF_T1_MAT3 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_7)
+
+#define PINCONF_T2_CAP0 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_1)
+#define PINCONF_T2_CAP1 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_2)
+#define PINCONF_T2_CAP2 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_3)
+#define PINCONF_T2_CAP3 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_6)
+#define PINCONF_T2_MAT0 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_7)
+#define PINCONF_T2_MAT1 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_8)
+#define PINCONF_T2_MAT2 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_9)
+#define PINCONF_T2_MAT3 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_11)
+
+#define PINCONF_T3_CAP0_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_0)
+#define PINCONF_T3_CAP0_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_1)
+#define PINCONF_T3_CAP1_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_1)
+#define PINCONF_T3_CAP1_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_4)
+#define PINCONF_T3_CAP2_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_2)
+#define PINCONF_T3_CAP2_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_5)
+#define PINCONF_T3_CAP3_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_6)
+#define PINCONF_T3_CAP3_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_6)
+#define PINCONF_T3_MAT0_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_3)
+#define PINCONF_T3_MAT0_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_7)
+#define PINCONF_T3_MAT1_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_4)
+#define PINCONF_T3_MAT1_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_8)
+#define PINCONF_T3_MAT2_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_5)
+#define PINCONF_T3_MAT2_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_9)
+#define PINCONF_T3_MAT3_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_7)
+#define PINCONF_T3_MAT3_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_10)
+
+#define PINCONF_TRACECLK (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_4)
+#define PINCONF_TRACEDATA0_1 (PINCONF_FUNC3|PINCONF_PINSF|PINCONF_PIN_5)
+#define PINCONF_TRACEDATA0_2 (PINCONF_FUNC5|PINCONF_PINS7|PINCONF_PIN_4)
+#define PINCONF_TRACEDATA1_1 (PINCONF_FUNC3|PINCONF_PINSF|PINCONF_PIN_6)
+#define PINCONF_TRACEDATA1_2 (PINCONF_FUNC5|PINCONF_PINS7|PINCONF_PIN_5)
+#define PINCONF_TRACEDATA2_1 (PINCONF_FUNC3|PINCONF_PINSF|PINCONF_PIN_7)
+#define PINCONF_TRACEDATA2_2 (PINCONF_FUNC5|PINCONF_PINS7|PINCONF_PIN_6)
+#define PINCONF_TRACEDATA3_1 (PINCONF_FUNC3|PINCONF_PINSF|PINCONF_PIN_8)
+#define PINCONF_TRACEDATA3_2 (PINCONF_FUNC5|PINCONF_PINS7|PINCONF_PIN_7)
+
+#define PINCONF_U0_DIR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_6)
+#define PINCONF_U0_DIR_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_9)
+#define PINCONF_U0_DIR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_2)
+#define PINCONF_U0_RXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_1)
+#define PINCONF_U0_RXD_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_11)
+#define PINCONF_U0_RXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_5)
+#define PINCONF_U0_RXD_4 (PINCONF_FUNC7|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_6)
+#define PINCONF_U0_TXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_0)
+#define PINCONF_U0_TXD_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_10)
+#define PINCONF_U0_TXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_4)
+#define PINCONF_U0_TXD_4 (PINCONF_FUNC7|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_5)
+#define PINCONF_U0_UCLK_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_2)
+#define PINCONF_U0_UCLK_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_8)
+#define PINCONF_U0_UCLK_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_1)
+
+#define PINCONF_U1_CTS_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_11)
+#define PINCONF_U1_CTS_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_2)
+#define PINCONF_U1_CTS_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_7)
+#define PINCONF_U1_CTS_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_4)
+#define PINCONF_U1_DCD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_U1_DCD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_11)
+#define PINCONF_U1_DCD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_9)
+#define PINCONF_U1_DCD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_5)
+#define PINCONF_U1_DSR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_7)
+#define PINCONF_U1_DSR_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_10)
+#define PINCONF_U1_DSR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_8)
+#define PINCONF_U1_DSR_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_0)
+#define PINCONF_U1_DTR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_8)
+#define PINCONF_U1_DTR_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_12)
+#define PINCONF_U1_DTR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_10)
+#define PINCONF_U1_DTR_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_1)
+#define PINCONF_U1_RI_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_10)
+#define PINCONF_U1_RI_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_1)
+#define PINCONF_U1_RI_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_6)
+#define PINCONF_U1_RI_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_3)
+#define PINCONF_U1_RTS_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_9)
+#define PINCONF_U1_RTS_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_3)
+#define PINCONF_U1_RTS_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_5)
+#define PINCONF_U1_RTS_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_2)
+#define PINCONF_U1_RXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_14)
+#define PINCONF_U1_RXD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_14)
+#define PINCONF_U1_RXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_12)
+#define PINCONF_U1_RXD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_5)
+#define PINCONF_U1_RXD_5 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_7)
+#define PINCONF_U1_TXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_U1_TXD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_13)
+#define PINCONF_U1_TXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_11)
+#define PINCONF_U1_TXD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_4)
+#define PINCONF_U1_TXD_5 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_6)
+
+#define PINCONF_U2_DIR_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_18)
+#define PINCONF_U2_DIR_2 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_13)
+#define PINCONF_U2_RXD_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_16)
+#define PINCONF_U2_RXD_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_11)
+#define PINCONF_U2_RXD_3 (PINCONF_FUNC3|PINCONF_PINSA|PINCONF_PIN_2)
+#define PINCONF_U2_RXD_4 (PINCONF_FUNC6|PINCONF_PINS7|PINCONF_PIN_2)
+#define PINCONF_U2_TXD_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_15)
+#define PINCONF_U2_TXD_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_10)
+#define PINCONF_U2_TXD_3 (PINCONF_FUNC3|PINCONF_PINSA|PINCONF_PIN_1)
+#define PINCONF_U2_TXD_4 (PINCONF_FUNC6|PINCONF_PINS7|PINCONF_PIN_1)
+#define PINCONF_U2_UCLK_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_17)
+#define PINCONF_U2_UCLK_2 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_12)
+
+#define PINCONF_U3_BAUD_1 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_7)
+#define PINCONF_U3_BAUD_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_9)
+#define PINCONF_U3_BAUD_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_3)
+#define PINCONF_U3_DIR_1 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_6)
+#define PINCONF_U3_DIR_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_8)
+#define PINCONF_U3_DIR_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_4)
+#define PINCONF_U3_RXD_1 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_3)
+#define PINCONF_U3_RXD_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_4)
+#define PINCONF_U3_RXD_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_2)
+#define PINCONF_U3_RXD_4 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_4)
+#define PINCONF_U3_TXD_1 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_2)
+#define PINCONF_U3_TXD_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_3)
+#define PINCONF_U3_TXD_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_1)
+#define PINCONF_U3_TXD_4 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_3)
+#define PINCONF_U3_UCLK_1 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_5)
+#define PINCONF_U3_UCLK_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_7)
+#define PINCONF_U3_UCLK_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_0)
+
+#define PINCONF_USB0_IND0_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_2)
+#define PINCONF_USB0_IND0_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_6)
+#define PINCONF_USB0_IND0_3 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_8)
+#define PINCONF_USB0_IND0_4 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_4)
+#define PINCONF_USB0_IND0_5 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_5)
+#define PINCONF_USB0_IND1_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_1)
+#define PINCONF_USB0_IND1_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_2)
+#define PINCONF_USB0_IND1_3 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_7)
+#define PINCONF_USB0_IND1_4 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_3)
+#define PINCONF_USB0_PPWR_1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_3)
+#define PINCONF_USB0_PPWR_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_0)
+#define PINCONF_USB0_PPWR_3 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_7)
+#define PINCONF_USB0_PPWR_4 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_3)
+#define PINCONF_USB0_PWR_FAULT_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_0)
+#define PINCONF_USB0_PWR_FAULT_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_1)
+#define PINCONF_USB0_PWR_FAULT_3 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_6)
+#define PINCONF_USB0_PWR_FAULT_4 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_5)
+#define PINCONF_USB0_PWR_FAULT_5 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_4)
+
+#define PINCONF_USB1_IND0_1 (PINCONF_FUNC2|PINCONF_PINS9|PINCONF_PIN_4)
+#define PINCONF_USB1_IND0_2 (PINCONF_FUNC3|PINCONF_PINS3|PINCONF_PIN_2)
+#define PINCONF_USB1_IND1_1 (PINCONF_FUNC2|PINCONF_PINS9|PINCONF_PIN_3)
+#define PINCONF_USB1_IND1_2 (PINCONF_FUNC3|PINCONF_PINS3|PINCONF_PIN_1)
+#define PINCONF_USB1_PPWR (PINCONF_FUNC2|PINCONF_PINS9|PINCONF_PIN_5)
+#define PINCONF_USB1_PWR_FAULT (PINCONF_FUNC2|PINCONF_PINS9|PINCONF_PIN_6)
+#define PINCONF_USB1_ULPI_CLK_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_8)
+#define PINCONF_USB1_ULPI_CLK_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_0)
+#define PINCONF_USB1_ULPI_D0_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_5)
+#define PINCONF_USB1_ULPI_D0_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_8)
+#define PINCONF_USB1_ULPI_D0_3 (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_11)
+#define PINCONF_USB1_ULPI_D1_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_4)
+#define PINCONF_USB1_ULPI_D1_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_7)
+#define PINCONF_USB1_ULPI_D2_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_3)
+#define PINCONF_USB1_ULPI_D2_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_6)
+#define PINCONF_USB1_ULPI_D3_1 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_6)
+#define PINCONF_USB1_ULPI_D3_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_5)
+#define PINCONF_USB1_ULPI_D4_1 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_5)
+#define PINCONF_USB1_ULPI_D4_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_4)
+#define PINCONF_USB1_ULPI_D5_1 (PINCONF_FUNC0|PINCONF_PINSC|PINCONF_PIN_3)
+#define PINCONF_USB1_ULPI_D5_2 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_4)
+#define PINCONF_USB1_ULPI_D6_1 (PINCONF_FUNC0|PINCONF_PINSC|PINCONF_PIN_2)
+#define PINCONF_USB1_ULPI_D6_2 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_3)
+#define PINCONF_USB1_ULPI_D7_1 (PINCONF_FUNC0|PINCONF_PINSC|PINCONF_PIN_1)
+#define PINCONF_USB1_ULPI_D7_2 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_2)
+#define PINCONF_USB1_ULPI_DIR_1 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_1)
+#define PINCONF_USB1_ULPI_DIR_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_11)
+#define PINCONF_USB1_ULPI_NXT_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_6)
+#define PINCONF_USB1_ULPI_NXT_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_9)
+#define PINCONF_USB1_ULPI_STP_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_7)
+#define PINCONF_USB1_ULPI_STP_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_10)
+#define PINCONF_USB1_VBUS (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_5)
+
+#define CLKCONF_CGU_OUT0 (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK1)
+#define CLKCONF_CGU_OUT1 (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK3)
+#define CLKCONF_CLKOUT_1 (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK0)
+#define CLKCONF_CLKOUT_2 (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK1)
+#define CLKCONF_CLKOUT_3 (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK2)
+#define CLKCONF_CLKOUT_4 (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK3)
+#define CLKCONF_EMC_CLK0 (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK0)
+#define CLKCONF_EMC_CLK01 (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK0)
+#define CLKCONF_EMC_CLK1 (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK1)
+#define CLKCONF_EMC_CLK2 (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK3)
+#define CLKCONF_EMC_CLK23 (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK2)
+#define CLKCONF_EMC_CLK3 (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK2)
+#define CLKCONF_ENET_REF_CLK (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK0)
+#define CLKCONF_ENET_TX_CLK (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK0)
+#define CLKCONF_I2S0_TX_MCLK (PINCONFIG_DIGITAL|PINCONF_FUNC6|PINCONF_CLK2)
+#define CLKCONF_I2S1_RX_SCK_1 (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK2)
+#define CLKCONF_I2S1_RX_SCK_2 (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK3)
+#define CLKCONF_I2S1_TX_MCLK (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK1)
+#define CLKCONF_SD_CLK_1 (PINCONFIG_DIGITAL|PINCONF_FUNC4|PINCONF_CLK0)
+#define CLKCONF_SD_CLK_2 (PINCONFIG_DIGITAL|PINCONF_FUNC4|PINCONF_CLK2)
+#define CLKCONF_SSP1_SCK (PINCONFIG_DIGITAL|PINCONF_FUNC6|PINCONF_CLK0)
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_LPC43XX_CHIP_LPC4337JET100_PINCONF_H */
diff --git a/arch/arm/src/lpc43xx/chip/lpc43_aes.h b/arch/arm/src/lpc43xx/chip/lpc43_aes.h
index e5f66d5f1ff..fbd557f3d48 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_aes.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_aes.h
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/lpc43xx/chip/lpc43_aes.h
*
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -45,6 +45,7 @@
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
+
/* The AES is controlled through a set of simple API calls located in the LPC43xx
* ROM. This value holds the pointer to the AES driver table.
*/
@@ -86,17 +87,32 @@ struct lpc43_aes_s
/* Loads 128-bit AES software defined user key (16 bytes) */
- void (*aes_LoadKeySW)(unsigned char *key);
+ void (*aes_LoadKeySW)(const unsigned char *key);
/* Loads 128-bit AES initialization vector (16 bytes) */
- void (*aes_LoadIV_SW)(unsigned char *iv);
+ void (*aes_LoadIV_SW)(const unsigned char *iv);
/* Loads 128-bit AES IC specific initialization vector, which is used to decrypt
* a boot image.
*/
void (*aes_LoadIV_IC)(void);
+
+ /* Process data */
+
+ unsigned int (*aes_Operate)(unsigned char* out, const unsigned char* in, unsigned blocks);
+};
+
+enum lpc43_aes_errorcodes_e
+{
+ AES_API_ERR_BASE = 0x30000,
+ AES_API_ERR_WRONG_CMD,
+ AES_API_ERR_NOT_SUPPORTED,
+ AES_API_ERR_KEY_ALREADY_PROGRAMMED,
+ AES_API_ERR_DMA_CHANNEL_CFG,
+ AES_API_ERR_DMA_MUX_CFG,
+ AES_API_ERR_DMA_BUSY
};
/************************************************************************************
diff --git a/arch/arm/src/lpc43xx/lpc43_adc.c b/arch/arm/src/lpc43xx/lpc43_adc.c
index 487c0b5cf37..4286451f11e 100644
--- a/arch/arm/src/lpc43xx/lpc43_adc.c
+++ b/arch/arm/src/lpc43xx/lpc43_adc.c
@@ -7,8 +7,9 @@
* Ported from from the LPC17 version:
*
* Copyright(C) 2011 Li Zhuoyi. All rights reserved.
+ * Copyright(C) 2016 Gregory Nutt. All rights reserved.
* Author: Li Zhuoyi
- * History: 0.1 2011-08-05 initial version
+ * Gregory Nutt
*
* This file is a part of NuttX:
*
@@ -55,6 +56,7 @@
#include
#include
#include
+#include
#include
#include
@@ -112,6 +114,7 @@
struct up_dev_s
{
+ FAR const struct adc_callback_s *cb;
uint8_t mask;
uint8_t mask_int;
uint32_t freq;
@@ -126,6 +129,8 @@ struct up_dev_s
/* ADC methods */
+static int adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback);
static void adc_reset(FAR struct adc_dev_s *dev);
static int adc_setup(FAR struct adc_dev_s *dev);
static void adc_shutdown(FAR struct adc_dev_s *dev);
@@ -139,6 +144,7 @@ static int adc_interrupt(int irq, void *context);
static const struct adc_ops_s g_adcops =
{
+ .ao_bind = adc_bind,
.ao_reset = adc_reset,
.ao_setup = adc_setup,
.ao_shutdown = adc_shutdown,
@@ -166,6 +172,25 @@ static struct adc_dev_s g_adcdev =
* Private Functions
****************************************************************************/
+/****************************************************************************
+ * Name: adc_bind
+ *
+ * Description:
+ * Bind the upper-half driver callbacks to the lower-half implementation. This
+ * must be called early in order to receive ADC event notifications.
+ *
+ ****************************************************************************/
+
+static int adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback)
+{
+ FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
+
+ DEBUGASSERT(priv != NULL);
+ priv->cb = callback;
+ return OK;
+}
+
/****************************************************************************
* Name: adc_reset
*
@@ -454,8 +479,20 @@ static int adc_interrupt(int irq, void *context)
{
if (priv->mask & (1 << i))
{
+ int32_t data;
+
regval = getreg32(LPC43_ADC0_DR(i));
- adc_receive(&g_adcdev, i,(regval&ADC_DR_VVREF_MASK)>>ADC_DR_VVREF_SHIFT);
+ data = (regval & ADC_DR_VVREF_MASK) >> ADC_DR_VVREF_SHIFT;
+
+ /* Verify that the upper-half driver has bound its callback functions */
+
+ if (priv->cb != NULL)
+ {
+ /* Perform the data received callback */
+
+ DEBUGASSERT(priv->cb->au_receive != NULL);
+ priv->cb->au_receive(&g_adcdev, i, data);
+ }
}
}
diff --git a/arch/arm/src/lpc43xx/lpc43_aes.c b/arch/arm/src/lpc43xx/lpc43_aes.c
new file mode 100644
index 00000000000..3f9af5ada39
--- /dev/null
+++ b/arch/arm/src/lpc43xx/lpc43_aes.c
@@ -0,0 +1,209 @@
+/****************************************************************************
+ * arch/arm/src/lpc43xx/lpc43_aes.c
+ *
+ * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Author: Alexander Vasiljev
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include
+
+#define AES_BLOCK_SIZE 16
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct lpc43_aes_s *g_aes;
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+int aes_cypher(void *out, const void *in, uint32_t size, const void *iv,
+ const void *key, uint32_t keysize, int mode, int encrypt)
+{
+ unsigned int ret = 0;
+ uint32_t outl = size;
+
+ ret = aes_init(iv, key, keysize, mode, encrypt);
+
+ if (ret != OK)
+ {
+ return ret;
+ }
+
+ return aes_update(out, &outl, in, size);
+}
+
+int up_aesreset(void)
+{
+ return OK;
+}
+
+int aes_init(FAR const void *iv, FAR const void *key, uint32_t keysize,
+ int mode, int encrypt)
+{
+ unsigned int cmd = 0;
+ unsigned int ret = 0;
+
+ if (g_aes == NULL)
+ {
+ return -ENOSYS;
+ }
+
+ /* The LPC43 aes engine can load two keys from otp and one random
+ * generated key. This behavior doesn't fit current api. So if
+ * key == NULL, we will usr keysize as identifier of the special key.
+ */
+
+ if (keysize != 16 && key)
+ {
+ return -EINVAL;
+ }
+
+ if (mode != AES_MODE_ECB && mode != AES_MODE_CBC)
+ {
+ return -EINVAL;
+ }
+
+ if (encrypt == CYPHER_ENCRYPT)
+ {
+ cmd = mode == AES_MODE_ECB ? AES_API_CMD_ENCODE_ECB : AES_API_CMD_ENCODE_CBC;
+ }
+ else
+ {
+ cmd = mode == AES_MODE_ECB ? AES_API_CMD_DECODE_ECB : AES_API_CMD_DECODE_CBC;
+ }
+
+ g_aes->aes_Init();
+
+ if (key != NULL)
+ {
+ g_aes->aes_LoadKeySW(key);
+ }
+ else
+ {
+ switch (keysize)
+ {
+ case 0:
+ g_aes->aes_LoadKey1();
+ break;
+
+ case 1:
+ g_aes->aes_LoadKey2();
+ break;
+
+ case 2:
+ g_aes->aes_LoadKeyRNG();
+ break;
+ }
+ }
+
+ g_aes->aes_LoadIV_SW((const unsigned char*)iv);
+
+ ret = g_aes->aes_SetMode(cmd);
+ switch (ret)
+ {
+ case AES_API_ERR_WRONG_CMD:
+ case AES_API_ERR_NOT_SUPPORTED:
+ case AES_API_ERR_KEY_ALREADY_PROGRAMMED:
+ ret = -EINVAL;
+ break;
+
+ case AES_API_ERR_DMA_CHANNEL_CFG:
+ case AES_API_ERR_DMA_MUX_CFG:
+ case AES_API_ERR_DMA_BUSY:
+ ret = -EBUSY;
+ break;
+ }
+
+ return 0;
+}
+
+int aes_update(FAR const void *out, uint32_t *outl, FAR const void *in,
+ uint32_t inl)
+{
+ if (g_aes == NULL)
+ {
+ return -ENOSYS;
+ }
+
+ if ((inl & (AES_BLOCK_SIZE-1)) != 0)
+ {
+ return -EINVAL;
+ }
+
+ if (inl > *outl)
+ {
+ return -EINVAL;
+ }
+
+ return g_aes->aes_Operate((unsigned char*)out,
+ (unsigned char*)in, inl / 16);
+}
+
+int up_aesinitialize(void)
+{
+ g_aes = (struct lpc43_g_aes*)*((uint32_t*)LPC43_ROM_AES_DRIVER_TABLE);
+ if (g_aes != NULL)
+ {
+ return OK;
+ }
+
+ return -ENOSYS;
+}
+
+int up_aesuninitialize(void)
+{
+ return OK;
+}
diff --git a/arch/arm/src/nuc1xx/Kconfig b/arch/arm/src/nuc1xx/Kconfig
index 50cddcbdee1..3571b4b6260 100644
--- a/arch/arm/src/nuc1xx/Kconfig
+++ b/arch/arm/src/nuc1xx/Kconfig
@@ -314,20 +314,20 @@ config NUC_PWM7
config NUC_UART0
bool "UART0"
default y
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config NUC_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config NUC_UART2
bool "UART2"
default n
depends on NUC_HAVE_UART2
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config NUC_USBD
diff --git a/arch/arm/src/sam34/Kconfig b/arch/arm/src/sam34/Kconfig
index bb400e649ce..b704da5674f 100644
--- a/arch/arm/src/sam34/Kconfig
+++ b/arch/arm/src/sam34/Kconfig
@@ -453,7 +453,7 @@ config SAM34_PICOUART
bool "PicoUART"
default n
depends on ARCH_CHIP_SAM4L
- select ARCH_HAVE_UART
+ select UART_SERIALDRIVER
config SAM34_PWM
bool "Pulse Width Modulation (PWM) Controller"
@@ -609,14 +609,14 @@ config SAM34_UART0
bool "UART 0"
default y
depends on ARCH_CHIP_SAM3U || ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A || ARCH_CHIP_SAM4CM || ARCH_CHIP_SAM4S || ARCH_CHIP_SAM4E
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAM34_UART1
bool "UART 1"
default n
depends on ARCH_CHIP_SAM4CM || ARCH_CHIP_SAM4S || ARCH_CHIP_SAM4E
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
if SAM34_UART1 && ARCH_CHIP_SAM4CM
@@ -651,27 +651,27 @@ config SAM34_USBC
config SAM34_USART0
bool "USART 0"
default n
- select ARCH_HAVE_USART0
+ select USART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAM34_USART1
bool "USART 1"
default n
- select ARCH_HAVE_USART1
+ select USART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAM34_USART2
bool "USART 2"
default n
depends on ARCH_CHIP_SAM3U || ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A || ARCH_CHIP_SAM4CM || ARCH_CHIP_SAM4L
- select ARCH_HAVE_USART2
+ select USART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAM34_USART3
bool "USART 3"
default n
depends on ARCH_CHIP_SAM3U || ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A || ARCH_CHIP_SAM4CM || ARCH_CHIP_SAM4L
- select ARCH_HAVE_USART3
+ select USART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAM34_WDT
@@ -1060,6 +1060,7 @@ config SAM34_TC5_TIOB
config SAM34_ONESHOT
bool "TC one-shot wrapper"
+ depends on SAM34_FREERUN
default n if !SCHED_TICKLESS
default y if SCHED_TICKLESS
---help---
diff --git a/arch/arm/src/sam34/sam4cm_oneshot.c b/arch/arm/src/sam34/sam4cm_oneshot.c
index a793350d66c..eeda41bc8ee 100644
--- a/arch/arm/src/sam34/sam4cm_oneshot.c
+++ b/arch/arm/src/sam34/sam4cm_oneshot.c
@@ -58,6 +58,7 @@
#include
#include "sam4cm_oneshot.h"
+#include "sam4cm_freerun.h"
#ifdef CONFIG_SAM34_ONESHOT
@@ -106,10 +107,11 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
/* Forward the event, clearing out any vestiges */
- oneshot_handler = (oneshot_handler_t)oneshot->handler;
- oneshot->handler = NULL;
- oneshot_arg = (void *)oneshot->arg;
- oneshot->arg = NULL;
+ oneshot_handler = (oneshot_handler_t)oneshot->handler;
+ oneshot->handler = NULL;
+ oneshot_arg = (void *)oneshot->arg;
+ oneshot->arg = NULL;
+ oneshot->start_count = 0;
oneshot_handler(oneshot_arg);
}
@@ -206,10 +208,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
* success.
*/
- oneshot->chan = chan;
- oneshot->running = false;
- oneshot->handler = NULL;
- oneshot->arg = NULL;
+ oneshot->chan = chan;
+ oneshot->running = false;
+ oneshot->handler = NULL;
+ oneshot->arg = NULL;
+ oneshot->start_count = 0;
return OK;
}
@@ -248,8 +251,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec)
*
****************************************************************************/
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
- void *arg, const struct timespec *ts)
+int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ oneshot_handler_t handler, void *arg, const struct timespec *ts)
{
uint64_t usec;
uint64_t regval;
@@ -267,7 +270,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
/* Yes.. then cancel it */
tcvdbg("Already running... cancelling\n");
- (void)sam_oneshot_cancel(oneshot, NULL);
+ (void)sam_oneshot_cancel(oneshot, freerun, NULL);
}
/* Save the new handler and its argument */
@@ -306,6 +309,26 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
sam_tc_start(oneshot->tch);
+ /* The function sam_tc_start() starts the timer/counter by setting the
+ * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register.
+ * The first one enables the timer/counter the latter performs an
+ * software trigger, which starts the clock and sets the counter
+ * register to zero. This reset is performed with the next valid edge
+ * of the selected clock. Thus it can take up USEC_PER_TICK microseconds
+ * until the counter register becomes zero.
+ *
+ * If the timer is canceled within this period the counter register holds
+ * the counter value for the last timer/counter run. To circumvent this
+ * the counter value of the freerun timer/counter is stored at each start
+ * of the oneshot timer/counter.
+ *
+ * The function up_timer_gettime() could also be used for this but it takes
+ * too long. If up_timer_gettime() is called within this function the problem
+ * vanishes at least if compiled with no optimisation.
+ */
+
+ oneshot->start_count = sam_tc_getcounter(freerun->tch);
+
/* Enable interrupts. We should get the callback when the interrupt
* occurs.
*/
@@ -340,7 +363,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
*
****************************************************************************/
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts)
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ struct timespec *ts)
{
irqstate_t flags;
uint64_t usec;
@@ -381,6 +405,17 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts)
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
+ /* In the case the timer/counter was canceled very short after its start,
+ * the counter register can hold the wrong value (the value of the last
+ * run). To prevent this the counter value is set to zero if not at
+ * least on tick passed since the start of the timer/counter.
+ */
+
+ if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count)
+ {
+ count = 0;
+ }
+
/* Now we can disable the interrupt and stop the timer. */
sam_tc_attach(oneshot->tch, NULL, NULL, 0);
@@ -429,6 +464,14 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts)
usec = (((uint64_t)(rc - count)) * USEC_PER_SEC) /
sam_tc_divfreq(oneshot->tch);
+ /* Each time the timer/counter is canceled the time calculated from
+ * the two registers (counter and REGC) is accurate up to an error
+ * between 0 and USEC_PER_TICK microseconds. To correct this error
+ * one tick which means USEC_PER_TICK microseconds are subtracted.
+ */
+
+ usec = usec > USEC_PER_TICK ? usec - USEC_PER_TICK : 0;
+
/* Return the time remaining in the correct form */
sec = usec / USEC_PER_SEC;
diff --git a/arch/arm/src/sam34/sam4cm_oneshot.h b/arch/arm/src/sam34/sam4cm_oneshot.h
index 3c3266b5db6..d7dc7a18ee0 100644
--- a/arch/arm/src/sam34/sam4cm_oneshot.h
+++ b/arch/arm/src/sam34/sam4cm_oneshot.h
@@ -46,6 +46,7 @@
#include
#include "sam4cm_tc.h"
+#include "sam4cm_freerun.h"
#ifdef CONFIG_SAM34_ONESHOT
@@ -82,6 +83,11 @@ struct sam_oneshot_s
volatile oneshot_handler_t handler; /* Oneshot expiration callback */
volatile void *arg; /* The argument that will accompany
* the callback */
+ volatile uint32_t start_count; /* Stores the value of the freerun counter,
+ * at each start of the onshot timer. Is neccesary
+ * to find out if the onshot counter was updated
+ * correctly at the time of the call to
+ * sam_oneshot_cancel or not. */
};
/****************************************************************************
@@ -136,6 +142,9 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* sam_oneshot_initialize();
+ * freerun Caller allocated instance of the freerun state structure. This
+ * structure must have been previously initialized via a call to
+ * sam_freerun_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@@ -146,8 +155,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
*
****************************************************************************/
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
- void *arg, const struct timespec *ts);
+int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ oneshot_handler_t handler, void *arg, const struct timespec *ts);
/****************************************************************************
* Name: sam_oneshot_cancel
@@ -162,6 +171,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* sam_oneshot_initialize();
+ * freerun Caller allocated instance of the freerun state structure. This
+ * structure must have been previously initialized via a call to
+ * sam_freerun_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
@@ -173,7 +185,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
*
****************************************************************************/
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts);
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ struct timespec *ts);
#undef EXTERN
#ifdef __cplusplus
diff --git a/arch/arm/src/sam34/sam4cm_tickless.c b/arch/arm/src/sam34/sam4cm_tickless.c
index 04952413314..7d13e8756ef 100644
--- a/arch/arm/src/sam34/sam4cm_tickless.c
+++ b/arch/arm/src/sam34/sam4cm_tickless.c
@@ -365,8 +365,8 @@ int up_timer_gettime(FAR struct timespec *ts)
int up_timer_cancel(FAR struct timespec *ts)
{
- return ONESHOT_INITIALIZED(&g_tickless.oneshot) ?
- sam_oneshot_cancel(&g_tickless.oneshot, ts) :
+ return ONESHOT_INITIALIZED(&g_tickless.oneshot) && FREERUN_INITIALIZED(&g_tickless.freerun) ?
+ sam_oneshot_cancel(&g_tickless.oneshot, &g_tickless.freerun, ts) :
-EAGAIN;
}
@@ -398,7 +398,7 @@ int up_timer_cancel(FAR struct timespec *ts)
int up_timer_start(FAR const struct timespec *ts)
{
return ONESHOT_INITIALIZED(&g_tickless.oneshot) ?
- sam_oneshot_start(&g_tickless.oneshot, sam_oneshot_handler, NULL, ts) :
+ sam_oneshot_start(&g_tickless.oneshot, &g_tickless.freerun, sam_oneshot_handler, NULL, ts) :
-EAGAIN;
}
#endif /* CONFIG_SCHED_TICKLESS */
diff --git a/arch/arm/src/sam34/sam_lowputc.c b/arch/arm/src/sam34/sam_lowputc.c
index 88be9f0752c..13d5046ef08 100644
--- a/arch/arm/src/sam34/sam_lowputc.c
+++ b/arch/arm/src/sam34/sam_lowputc.c
@@ -75,16 +75,16 @@
* for our purposes.
*/
-#ifndef CONFIG_USART0_ISUART
+#ifndef CONFIG_USART0_SERIALDRIVER
# undef CONFIG_SAM34_USART0
#endif
-#ifndef CONFIG_USART1_ISUART
+#ifndef CONFIG_USART1_SERIALDRIVER
# undef CONFIG_SAM34_USART1
#endif
-#ifndef CONFIG_USART2_ISUART
+#ifndef CONFIG_USART2_SERIALDRIVER
# undef CONFIG_SAM34_USART2
#endif
-#ifndef CONFIG_USART3_ISUART
+#ifndef CONFIG_USART3_SERIALDRIVER
# undef CONFIG_SAM34_USART3
#endif
diff --git a/arch/arm/src/sam34/sam_serial.c b/arch/arm/src/sam34/sam_serial.c
index 306a1210ea5..46df27954a1 100644
--- a/arch/arm/src/sam34/sam_serial.c
+++ b/arch/arm/src/sam34/sam_serial.c
@@ -84,16 +84,16 @@
* for our purposes.
*/
-#ifndef CONFIG_USART0_ISUART
+#ifndef CONFIG_USART0_SERIALDRIVER
# undef CONFIG_SAM34_USART0
#endif
-#ifndef CONFIG_USART1_ISUART
+#ifndef CONFIG_USART1_SERIALDRIVER
# undef CONFIG_SAM34_USART1
#endif
-#ifndef CONFIG_USART2_ISUART
+#ifndef CONFIG_USART2_SERIALDRIVER
# undef CONFIG_SAM34_USART2
#endif
-#ifndef CONFIG_USART3_ISUART
+#ifndef CONFIG_USART3_SERIALDRIVER
# undef CONFIG_SAM34_USART3
#endif
diff --git a/arch/arm/src/sam34/sam_twi.c b/arch/arm/src/sam34/sam_twi.c
index a71525b6276..f8c2f7f7caf 100644
--- a/arch/arm/src/sam34/sam_twi.c
+++ b/arch/arm/src/sam34/sam_twi.c
@@ -901,6 +901,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
/* Set the initial TWI data transfer frequency */
+ priv->i2cfreq = 0;
twi_setfrequency(priv, frequency);
}
diff --git a/arch/arm/src/sama5/Kconfig b/arch/arm/src/sama5/Kconfig
index 351a5bebe85..b2701131bc2 100644
--- a/arch/arm/src/sama5/Kconfig
+++ b/arch/arm/src/sama5/Kconfig
@@ -387,7 +387,7 @@ config SAMA5_AESB
config SAMA5_DBGU
bool "Debug Unit (DBGU)"
default n
- select ARCH_HAVE_OTHER_UART
+ select OTHER_UART_SERIALDRIVER
config SAMA5_PIT
bool "Periodic Interval Timer (PIT)"
@@ -432,70 +432,70 @@ config SAMA5_UART0
bool "UART 0"
default y
depends on SAMA5_HAVE_UART0
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_UART1
bool "UART 1"
default n
depends on SAMA5_HAVE_UART1
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_UART2
bool "UART 2"
default n
depends on SAMA5_HAVE_UART2
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_UART3
bool "UART 3"
default n
depends on SAMA5_HAVE_UART3
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_UART4
bool "UART 4"
default n
depends on SAMA5_HAVE_UART4
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_USART0
bool "USART 0"
default n
depends on SAMA5_HAVE_USART0
- select ARCH_HAVE_USART0
+ select USART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_USART1
bool "USART 1"
default n
depends on SAMA5_HAVE_USART1
- select ARCH_HAVE_USART1
+ select USART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_USART2
bool "USART 2"
default n
depends on SAMA5_HAVE_USART2
- select ARCH_HAVE_USART2
+ select USART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_USART3
bool "USART 3"
default n
depends on SAMA5_HAVE_USART3
- select ARCH_HAVE_USART3
+ select USART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_USART4
bool "USART 4"
default n
depends on SAMA5_HAVE_USART4
- select ARCH_HAVE_USART4
+ select USART4_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_FLEXCOM0
@@ -786,7 +786,7 @@ choice
config SAMA5_FLEXCOM0_USART
bool "USART"
select SAMA5_FLEXCOM_USART
- select ARCH_HAVE_USART0
+ select USART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_FLEXCOM0_SPI
@@ -807,7 +807,7 @@ choice
config SAMA5_FLEXCOM1_USART
bool "USART"
select SAMA5_FLEXCOM_USART
- select ARCH_HAVE_USART1
+ select USART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_FLEXCOM1_SPI
@@ -828,7 +828,7 @@ choice
config SAMA5_FLEXCOM2_USART
bool "USART"
select SAMA5_FLEXCOM_USART
- select ARCH_HAVE_USART2
+ select USART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_FLEXCOM2_SPI
@@ -853,7 +853,7 @@ config SAMA5_FLEXCOM3_USART
config SAMA5_FLEXCOM3_SPI
bool "SPI"
select SAMA5_FLEXCOM_SPI
- select ARCH_HAVE_USART3
+ select USART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_FLEXCOM3_SPI
@@ -870,7 +870,7 @@ choice
config SAMA5_FLEXCOM4_USART
bool "USART"
select SAMA5_FLEXCOM_USART
- select ARCH_HAVE_USART4
+ select USART4_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMA5_FLEXCOM4_SPI
@@ -3866,6 +3866,7 @@ endif # SAMA5_TC2
config SAMA5_ONESHOT
bool "TC one-shot wrapper"
+ depends on SAMA5_FREERUN
default n if !SCHED_TICKLESS
default y if SCHED_TICKLESS
---help---
diff --git a/arch/arm/src/sama5/sam_adc.c b/arch/arm/src/sama5/sam_adc.c
index 261434229e6..68565bc502f 100644
--- a/arch/arm/src/sama5/sam_adc.c
+++ b/arch/arm/src/sama5/sam_adc.c
@@ -57,6 +57,7 @@
#include
#include
#include
+#include
#include
#include
@@ -378,6 +379,7 @@
struct sam_adc_s
{
+ FAR const struct adc_callback_s *cb;
sem_t exclsem; /* Supports exclusive access to the ADC interface */
bool initialized; /* The ADC driver is already initialized */
uint32_t frequency; /* ADC clock frequency */
@@ -446,6 +448,8 @@ static int sam_adc_interrupt(int irq, void *context);
/* ADC methods */
#ifdef SAMA5_ADC_HAVE_CHANNELS
+static int sam_adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback);
static void sam_adc_reset(struct adc_dev_s *dev);
static int sam_adc_setup(struct adc_dev_s *dev);
static void sam_adc_shutdown(struct adc_dev_s *dev);
@@ -477,6 +481,7 @@ static void sam_adc_channels(struct sam_adc_s *priv);
static const struct adc_ops_s g_adcops =
{
+ .ao_bind = sam_adc_bind,
.ao_reset = sam_adc_reset,
.ao_setup = sam_adc_setup,
.ao_shutdown = sam_adc_shutdown,
@@ -664,9 +669,15 @@ static void sam_adc_dmadone(void *arg)
chan = (int)((*buffer & ADC_LCDR_CHANB_MASK) >> ADC_LCDR_CHANB_SHIFT);
sample = ((*buffer & ADC_LCDR_DATA_MASK) >> ADC_LCDR_DATA_SHIFT);
- /* And give the sample data to the ADC upper half */
+ /* Verify that the upper-half driver has bound its callback functions */
- (void)adc_receive(priv->dev, chan, sample);
+ if (priv->cb != NULL)
+ {
+ /* Give the sample data to the ADC upper half */
+
+ DEBUGASSERT(priv->cb->au_receive != NULL);
+ priv->cb->au_receive(priv->dev, chan, sample);
+ }
}
}
@@ -858,7 +869,17 @@ static void sam_adc_endconversion(void *arg)
/* Read the ADC sample and pass it to the upper half */
regval = sam_adc_getreg(priv, SAM_ADC_CDR(chan));
- (void)adc_receive(priv->dev, chan, regval & ADC_CDR_DATA_MASK);
+
+ /* Verify that the upper-half driver has bound its callback functions */
+
+ if (priv->cb != NULL)
+ {
+ /* Perform the data received callback */
+
+ DEBUGASSERT(priv->cb->au_receive != NULL);
+ priv->cb->au_receive(priv->dev, chan, regval & ADC_CDR_DATA_MASK);
+ }
+
pending &= ~bit;
}
}
@@ -954,6 +975,26 @@ static int sam_adc_interrupt(int irq, void *context)
/****************************************************************************
* ADC methods
****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_adc_bind
+ *
+ * Description:
+ * Bind the upper-half driver callbacks to the lower-half implementation. This
+ * must be called early in order to receive ADC event notifications.
+ *
+ ****************************************************************************/
+
+static int sam_adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback)
+{
+ struct sam_adc_s *priv = (struct sam_adc_s *)dev->ad_priv;
+
+ DEBUGASSERT(priv != NULL);
+ priv->cb = callback;
+ return OK;
+}
+
/****************************************************************************
* Name: sam_adc_reset
*
@@ -1980,6 +2021,7 @@ struct adc_dev_s *sam_adc_initialize(void)
/* Initialize the private ADC device data structure */
sem_init(&priv->exclsem, 0, 1);
+ priv->cb = NULL;
priv->dev = &g_adcdev;
#ifdef CONFIG_SAMA5_ADC_DMA
diff --git a/arch/arm/src/sama5/sam_config.h b/arch/arm/src/sama5/sam_config.h
index 650d6c15032..14ab9b8dcfa 100644
--- a/arch/arm/src/sama5/sam_config.h
+++ b/arch/arm/src/sama5/sam_config.h
@@ -52,27 +52,27 @@
* for our purposes.
*/
-#ifndef CONFIG_USART0_ISUART
+#ifndef CONFIG_USART0_SERIALDRIVER
# undef CONFIG_SAMA5_USART0
# undef CONFIG_SAMA5_FLEXCOM0_USART
# undef CONFIG_USART0_SERIAL_CONSOLE
#endif
-#ifndef CONFIG_USART1_ISUART
+#ifndef CONFIG_USART1_SERIALDRIVER
# undef CONFIG_SAMA5_USART1
# undef CONFIG_SAMA5_FLEXCOM1_USART
# undef CONFIG_USART1_SERIAL_CONSOLE
#endif
-#ifndef CONFIG_USART2_ISUART
+#ifndef CONFIG_USART2_SERIALDRIVER
# undef CONFIG_SAMA5_USART2
# undef CONFIG_SAMA5_FLEXCOM2_USART
# undef CONFIG_USART2_SERIAL_CONSOLE
#endif
-#ifndef CONFIG_USART3_ISUART
+#ifndef CONFIG_USART3_SERIALDRIVER
# undef CONFIG_SAMA5_USART3
# undef CONFIG_SAMA5_FLEXCOM3_USART
# undef CONFIG_USART3_SERIAL_CONSOLE
#endif
-#ifndef CONFIG_USART4_ISUART
+#ifndef CONFIG_USART4_SERIALDRIVER
# undef CONFIG_SAMA5_USART4
# undef CONFIG_SAMA5_FLEXCOM4_USART
# undef CONFIG_USART4_SERIAL_CONSOLE
@@ -212,7 +212,7 @@
# define SAMA5_HAVE_UART_CONSOLE 1
# undef SAMA5_HAVE_USART_CONSOLE
# undef SAMA5_HAVE_FLEXCOM_CONSOLE
-#elif defined(CONFIG_USART0_SERIAL_CONSOLE) && defined(CONFIG_USART0_ISUART)
+#elif defined(CONFIG_USART0_SERIAL_CONSOLE) && defined(CONFIG_USART0_SERIALDRIVER)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
@@ -227,7 +227,7 @@
# undef SAMA5_HAVE_UART_CONSOLE
# define SAMA5_HAVE_USART_CONSOLE 1
# undef SAMA5_HAVE_FLEXCOM_CONSOLE
-#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_USART1_ISUART)
+#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_USART1_SERIALDRIVER)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
@@ -242,7 +242,7 @@
# undef SAMA5_HAVE_UART_CONSOLE
# define SAMA5_HAVE_USART_CONSOLE 1
# undef SAMA5_HAVE_FLEXCOM_CONSOLE
-#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_USART2_ISUART)
+#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_USART2_SERIALDRIVER)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
@@ -257,7 +257,7 @@
# undef SAMA5_HAVE_UART_CONSOLE
# define SAMA5_HAVE_USART_CONSOLE 1
# undef SAMA5_HAVE_FLEXCOM_CONSOLE
-#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_USART3_ISUART)
+#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_USART3_SERIALDRIVER)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
@@ -272,7 +272,7 @@
# undef SAMA5_HAVE_UART_CONSOLE
# define SAMA5_HAVE_USART_CONSOLE 1
# undef SAMA5_HAVE_FLEXCOM_CONSOLE
-#elif defined(CONFIG_USART4_SERIAL_CONSOLE) && defined(CONFIG_USART4_ISUART)
+#elif defined(CONFIG_USART4_SERIAL_CONSOLE) && defined(CONFIG_USART4_SERIALDRIVER)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
diff --git a/arch/arm/src/sama5/sam_flexcom_serial.c b/arch/arm/src/sama5/sam_flexcom_serial.c
index c65c1aab474..c0d4693ac86 100644
--- a/arch/arm/src/sama5/sam_flexcom_serial.c
+++ b/arch/arm/src/sama5/sam_flexcom_serial.c
@@ -120,19 +120,19 @@
# define FLEXUS4_ASSIGNED 1
#else
# undef CONSOLE_DEV /* No console */
-# if defined(CONFIG_USART0_ISUART)
+# if defined(CONFIG_USART0_SERIALDRIVER)
# define TTYFC0_DEV g_flexus0port /* FLEXUS0 is ttyFC0 */
# define FLEXUS0_ASSIGNED 1
-# elif defined(CONFIG_USART1_ISUART)
+# elif defined(CONFIG_USART1_SERIALDRIVER)
# define TTYFC0_DEV g_flexus1port /* FLEXUS1 is ttyFC0 */
# define FLEXUS1_ASSIGNED 1
-# elif defined(CONFIG_USART2_ISUART)
+# elif defined(CONFIG_USART2_SERIALDRIVER)
# define TTYFC0_DEV g_flexus2port /* FLEXUS2 is ttyFC0 */
# define FLEXUS2_ASSIGNED 1
-# elif defined(CONFIG_USART3_ISUART)
+# elif defined(CONFIG_USART3_SERIALDRIVER)
# define TTYFC0_DEV g_flexus3port /* FLEXUS3 is ttyFC0 */
# define FLEXUS3_ASSIGNED 1
-# elif defined(CONFIG_USART4_ISUART)
+# elif defined(CONFIG_USART4_SERIALDRIVER)
# define TTYFC0_DEV g_flexus4port /* FLEXUS4 is ttyFC0 */
# define FLEXUS4_ASSIGNED 4
# endif
@@ -140,19 +140,19 @@
/* Pick ttyFC1. This could be any of USART0-4 excluding the console UART. */
-#if defined(CONFIG_USART0_ISUART) && !defined(FLEXUS0_ASSIGNED)
+#if defined(CONFIG_USART0_SERIALDRIVER) && !defined(FLEXUS0_ASSIGNED)
# define TTYFC1_DEV g_flexus0port /* FLEXUS0 is ttyFC1 */
# define FLEXUS0_ASSIGNED 1
-#elif defined(CONFIG_USART1_ISUART) && !defined(FLEXUS1_ASSIGNED)
+#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(FLEXUS1_ASSIGNED)
# define TTYFC1_DEV g_flexus1port /* FLEXUS1 is ttyFC1 */
# define FLEXUS1_ASSIGNED 1
-#elif defined(CONFIG_USART2_ISUART) && !defined(FLEXUS2_ASSIGNED)
+#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(FLEXUS2_ASSIGNED)
# define TTYFC1_DEV g_flexus2port /* FLEXUS2 is ttyFC1 */
# define FLEXUS2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(FLEXUS3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(FLEXUS3_ASSIGNED)
# define TTYFC1_DEV g_flexus3port /* FLEXUS3 is ttyFC1 */
# define FLEXUS3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(FLEXUS4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(FLEXUS4_ASSIGNED)
# define TTYFC1_DEV g_flexus4port /* FLEXUS4 is ttyFC1 */
# define FLEXUS4_ASSIGNED 1
#endif
@@ -162,16 +162,16 @@
* could also be the console.
*/
-#if defined(CONFIG_USART1_ISUART) && !defined(FLEXUS1_ASSIGNED)
+#if defined(CONFIG_USART1_SERIALDRIVER) && !defined(FLEXUS1_ASSIGNED)
# define TTYFC2_DEV g_flexus1port /* FLEXUS1 is ttyFC2 */
# define FLEXUS1_ASSIGNED 1
-#elif defined(CONFIG_USART2_ISUART) && !defined(FLEXUS2_ASSIGNED)
+#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(FLEXUS2_ASSIGNED)
# define TTYFC2_DEV g_flexus2port /* FLEXUS2 is ttyFC2 */
# define FLEXUS2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(FLEXUS3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(FLEXUS3_ASSIGNED)
# define TTYFC2_DEV g_flexus3port /* FLEXUS3 is ttyFC2 */
# define FLEXUS3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYFC2_DEV g_flexus4port /* FLEXUS4 is ttyFC2 */
# define FLEXUS4_ASSIGNED 1
#endif
@@ -181,13 +181,13 @@
* FLEXUS2-4 could also be the console.
*/
-#if defined(CONFIG_USART2_ISUART) && !defined(FLEXUS2_ASSIGNED)
+#if defined(CONFIG_USART2_SERIALDRIVER) && !defined(FLEXUS2_ASSIGNED)
# define TTYFC3_DEV g_flexus2port /* FLEXUS2 is ttyFC3 */
# define FLEXUS2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(FLEXUS3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(FLEXUS3_ASSIGNED)
# define TTYFC3_DEV g_flexus3port /* FLEXUS3 is ttyFC3 */
# define FLEXUS3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(FLEXUS4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(FLEXUS4_ASSIGNED)
# define TTYFC3_DEV g_flexus4port /* FLEXUS4 is ttyFC3 */
# define FLEXUS4_ASSIGNED 1
#endif
@@ -197,10 +197,10 @@
* USART3-4 could also be the console.
*/
-#if defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED)
+#if defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED)
# define TTYFC4_DEV g_flexus3port /* USART3 is ttyFC4 */
# define USART3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYFC4_DEV g_flexus4port /* USART4 is ttyFC4 */
# define USART4_ASSIGNED 1
#endif
@@ -234,19 +234,19 @@ struct flexus_dev_s
****************************************************************************/
static int flexus_interrupt(struct uart_dev_s *dev);
-#ifdef CONFIG_USART0_ISUART
+#ifdef CONFIG_USART0_SERIALDRIVER
static int flexus0_interrupt(int irq, void *context);
#endif
-#ifdef CONFIG_USART1_ISUART
+#ifdef CONFIG_USART1_SERIALDRIVER
static int flexus1_interrupt(int irq, void *context);
#endif
-#ifdef CONFIG_USART2_ISUART
+#ifdef CONFIG_USART2_SERIALDRIVER
static int flexus2_interrupt(int irq, void *context);
#endif
-#ifdef CONFIG_USART3_ISUART
+#ifdef CONFIG_USART3_SERIALDRIVER
static int flexus3_interrupt(int irq, void *context);
#endif
-#ifdef CONFIG_USART4_ISUART
+#ifdef CONFIG_USART4_SERIALDRIVER
static int flexus4_interrupt(int irq, void *context);
#endif
@@ -288,30 +288,30 @@ static const struct uart_ops_s g_flexus_ops =
/* I/O buffers */
-#ifdef CONFIG_USART0_ISUART
+#ifdef CONFIG_USART0_SERIALDRIVER
static char g_flexus0rxbuffer[CONFIG_USART0_RXBUFSIZE];
static char g_flexus0txbuffer[CONFIG_USART0_TXBUFSIZE];
#endif
-#ifdef CONFIG_USART1_ISUART
+#ifdef CONFIG_USART1_SERIALDRIVER
static char g_flexus1rxbuffer[CONFIG_USART1_RXBUFSIZE];
static char g_flexus1txbuffer[CONFIG_USART1_TXBUFSIZE];
#endif
-#ifdef CONFIG_USART2_ISUART
+#ifdef CONFIG_USART2_SERIALDRIVER
static char g_flexus2rxbuffer[CONFIG_USART2_RXBUFSIZE];
static char g_flexus2txbuffer[CONFIG_USART2_TXBUFSIZE];
#endif
-#ifdef CONFIG_USART3_ISUART
+#ifdef CONFIG_USART3_SERIALDRIVER
static char g_flexus3rxbuffer[CONFIG_USART3_RXBUFSIZE];
static char g_flexus3txbuffer[CONFIG_USART3_TXBUFSIZE];
#endif
-#ifdef CONFIG_USART4_ISUART
+#ifdef CONFIG_USART4_SERIALDRIVER
static char g_flexus4rxbuffer[CONFIG_USART4_RXBUFSIZE];
static char g_flexus4txbuffer[CONFIG_USART4_TXBUFSIZE];
#endif
/* This describes the state of the USART0 port. */
-#ifdef CONFIG_USART0_ISUART
+#ifdef CONFIG_USART0_SERIALDRIVER
static struct flexus_dev_s g_flexus0priv =
{
.handler = flexus0_interrupt,
@@ -345,7 +345,7 @@ static uart_dev_t g_flexus0port =
/* This describes the state of the USART1 port. */
-#ifdef CONFIG_USART1_ISUART
+#ifdef CONFIG_USART1_SERIALDRIVER
static struct flexus_dev_s g_flexus1priv =
{
.handler = flexus1_interrupt,
@@ -379,7 +379,7 @@ static uart_dev_t g_flexus1port =
/* This describes the state of the USART2 port. */
-#ifdef CONFIG_USART2_ISUART
+#ifdef CONFIG_USART2_SERIALDRIVER
static struct flexus_dev_s g_flexus2priv =
{
.handler = flexus2_interrupt,
@@ -413,7 +413,7 @@ static uart_dev_t g_flexus2port =
/* This describes the state of the USART3 port. */
-#ifdef CONFIG_USART3_ISUART
+#ifdef CONFIG_USART3_SERIALDRIVER
static struct flexus_dev_s g_flexus3priv =
{
.handler = flexus3_interrupt,
@@ -447,7 +447,7 @@ static uart_dev_t g_flexus3port =
/* This describes the state of the USART4 port. */
-#ifdef CONFIG_USART4_ISUART
+#ifdef CONFIG_USART4_SERIALDRIVER
static struct flexus_dev_s g_flexus4priv =
{
.handler = flexus4_interrupt,
@@ -613,31 +613,31 @@ static int flexus_interrupt(struct uart_dev_s *dev)
*
****************************************************************************/
-#ifdef CONFIG_USART0_ISUART
+#ifdef CONFIG_USART0_SERIALDRIVER
static int flexus0_interrupt(int irq, void *context)
{
return flexus_interrupt(&g_flexus0port);
}
#endif
-#ifdef CONFIG_USART1_ISUART
+#ifdef CONFIG_USART1_SERIALDRIVER
static int flexus1_interrupt(int irq, void *context)
{
return flexus_interrupt(&g_flexus1port);
}
#endif
-#ifdef CONFIG_USART2_ISUART
+#ifdef CONFIG_USART2_SERIALDRIVER
static int flexus2_interrupt(int irq, void *context)
{
return flexus_interrupt(&g_flexus2port);
}
#endif
-#ifdef CONFIG_USART3_ISUART
+#ifdef CONFIG_USART3_SERIALDRIVER
static int flexus3_interrupt(int irq, void *context)
{
return flexus_interrupt(&g_flexus3port);
}
#endif
-#ifdef CONFIG_USART4_ISUART
+#ifdef CONFIG_USART4_SERIALDRIVER
static int flexus4_interrupt(int irq, void *context)
{
return flexus_interrupt(&g_flexus4port);
diff --git a/arch/arm/src/sama5/sam_lowputc.c b/arch/arm/src/sama5/sam_lowputc.c
index 84e7a37d213..f94f6f05167 100644
--- a/arch/arm/src/sama5/sam_lowputc.c
+++ b/arch/arm/src/sama5/sam_lowputc.c
@@ -379,7 +379,7 @@ void sam_lowsetup(void)
#ifdef CONFIG_SAMA5_UART4
sam_uart4_enableclk();
#endif
-#ifdef CONFIG_USART0_ISUART
+#ifdef CONFIG_USART0_SERIALDRIVER
sam_usart0_enableclk();
#endif
#ifdef CONFIG_SAMA5_USART1
@@ -436,7 +436,7 @@ void sam_lowsetup(void)
(void)sam_configpio(PIO_UART4_TXD);
#endif
-#if defined(CONFIG_USART0_ISUART) && defined(CONFIG_SAMA5_USART0)
+#if defined(CONFIG_USART0_SERIALDRIVER) && defined(CONFIG_SAMA5_USART0)
(void)sam_configpio(PIO_USART0_RXD);
(void)sam_configpio(PIO_USART0_TXD);
#ifdef CONFIG_USART0_OFLOWCONTROL
@@ -447,7 +447,7 @@ void sam_lowsetup(void)
#endif
#endif
-#if defined(CONFIG_USART1_ISUART) && defined(CONFIG_SAMA5_USART1)
+#if defined(CONFIG_USART1_SERIALDRIVER) && defined(CONFIG_SAMA5_USART1)
(void)sam_configpio(PIO_USART1_RXD);
(void)sam_configpio(PIO_USART1_TXD);
#ifdef CONFIG_USART1_OFLOWCONTROL
@@ -458,7 +458,7 @@ void sam_lowsetup(void)
#endif
#endif
-#if defined(CONFIG_USART2_ISUART) && defined(CONFIG_SAMA5_USART2)
+#if defined(CONFIG_USART2_SERIALDRIVER) && defined(CONFIG_SAMA5_USART2)
(void)sam_configpio(PIO_USART2_RXD);
(void)sam_configpio(PIO_USART2_TXD);
#ifdef CONFIG_USART2_OFLOWCONTROL
@@ -469,7 +469,7 @@ void sam_lowsetup(void)
#endif
#endif
-#if defined(CONFIG_USART3_ISUART) && defined(CONFIG_SAMA5_USART3)
+#if defined(CONFIG_USART3_SERIALDRIVER) && defined(CONFIG_SAMA5_USART3)
(void)sam_configpio(PIO_USART3_RXD);
(void)sam_configpio(PIO_USART3_TXD);
#ifdef CONFIG_USART3_OFLOWCONTROL
@@ -480,7 +480,7 @@ void sam_lowsetup(void)
#endif
#endif
-#if defined(CONFIG_USART4_ISUART) && defined(CONFIG_SAMA5_USART4)
+#if defined(CONFIG_USART4_SERIALDRIVER) && defined(CONFIG_SAMA5_USART4)
(void)sam_configpio(PIO_USART4_RXD);
(void)sam_configpio(PIO_USART4_TXD);
#ifdef CONFIG_USART4_OFLOWCONTROL
@@ -500,7 +500,7 @@ void sam_lowsetup(void)
* FLEXCOM_IO4 = RTS
*/
-#if defined(CONFIG_USART0_ISUART) && defined(CONFIG_SAMA5_FLEXCOM0_USART)
+#if defined(CONFIG_USART0_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM0_USART)
(void)sam_configpio(PIO_FLEXCOM0_IO0);
(void)sam_configpio(PIO_FLEXCOM0_IO1);
#ifdef CONFIG_USART0_OFLOWCONTROL
@@ -511,7 +511,7 @@ void sam_lowsetup(void)
#endif
#endif
-#if defined(CONFIG_USART1_ISUART) && defined(CONFIG_SAMA5_FLEXCOM1_USART)
+#if defined(CONFIG_USART1_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM1_USART)
(void)sam_configpio(PIO_FLEXCOM1_IO0);
(void)sam_configpio(PIO_FLEXCOM1_IO1);
#ifdef CONFIG_USART1_OFLOWCONTROL
@@ -522,7 +522,7 @@ void sam_lowsetup(void)
#endif
#endif
-#if defined(CONFIG_USART2_ISUART) && defined(CONFIG_SAMA5_FLEXCOM2_USART)
+#if defined(CONFIG_USART2_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM2_USART)
(void)sam_configpio(PIO_FLEXCOM2_IO0);
(void)sam_configpio(PIO_FLEXCOM2_IO1);
#ifdef CONFIG_USART2_OFLOWCONTROL
@@ -533,7 +533,7 @@ void sam_lowsetup(void)
#endif
#endif
-#if defined(CONFIG_USART3_ISUART) && defined(CONFIG_SAMA5_FLEXCOM3_USART)
+#if defined(CONFIG_USART3_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM3_USART)
(void)sam_configpio(PIO_FLEXCOM3_IO0);
(void)sam_configpio(PIO_FLEXCOM3_IO1);
#ifdef CONFIG_USART3_OFLOWCONTROL
@@ -544,7 +544,7 @@ void sam_lowsetup(void)
#endif
#endif
-#if defined(CONFIG_USART4_ISUART) && defined(CONFIG_SAMA5_FLEXCOM4_USART)
+#if defined(CONFIG_USART4_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM4_USART)
(void)sam_configpio(PIO_FLEXCOM4_IO0);
(void)sam_configpio(PIO_FLEXCOM4_IO1);
#ifdef CONFIG_USART4_OFLOWCONTROL
diff --git a/arch/arm/src/sama5/sam_oneshot.c b/arch/arm/src/sama5/sam_oneshot.c
index c86224155af..c6d0a79ef58 100644
--- a/arch/arm/src/sama5/sam_oneshot.c
+++ b/arch/arm/src/sama5/sam_oneshot.c
@@ -59,6 +59,7 @@
#include
#include "sam_oneshot.h"
+#include "sam_freerun.h"
#ifdef CONFIG_SAMA5_ONESHOT
@@ -123,10 +124,11 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
/* Forward the event, clearing out any vestiges */
- oneshot_handler = (oneshot_handler_t)oneshot->handler;
- oneshot->handler = NULL;
- oneshot_arg = (void *)oneshot->arg;
- oneshot->arg = NULL;
+ oneshot_handler = (oneshot_handler_t)oneshot->handler;
+ oneshot->handler = NULL;
+ oneshot_arg = (void *)oneshot->arg;
+ oneshot->arg = NULL;
+ oneshot->start_count = 0;
oneshot_handler(oneshot_arg);
}
@@ -223,10 +225,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
* success.
*/
- oneshot->chan = chan;
- oneshot->running = false;
- oneshot->handler = NULL;
- oneshot->arg = NULL;
+ oneshot->chan = chan;
+ oneshot->running = false;
+ oneshot->handler = NULL;
+ oneshot->arg = NULL;
+ oneshot->start_count = 0;
return OK;
}
@@ -250,8 +253,8 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
*
****************************************************************************/
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
- void *arg, const struct timespec *ts)
+int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ oneshot_handler_t handler, void *arg, const struct timespec *ts)
{
uint64_t usec;
uint64_t regval;
@@ -269,7 +272,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
/* Yes.. then cancel it */
tcvdbg("Already running... cancelling\n");
- (void)sam_oneshot_cancel(oneshot, NULL);
+ (void)sam_oneshot_cancel(oneshot, freerun, NULL);
}
/* Save the new handler and its argument */
@@ -308,6 +311,26 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
sam_tc_start(oneshot->tch);
+ /* The function sam_tc_start() starts the timer/counter by setting the
+ * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register.
+ * The first one enables the timer/counter the latter performs an
+ * software trigger, which starts the clock and sets the counter
+ * register to zero. This reset is performed with the next valid edge
+ * of the selected clock. Thus it can take up USEC_PER_TICK microseconds
+ * until the counter register becomes zero.
+ *
+ * If the timer is canceled within this period the counter register holds
+ * the counter value for the last timer/counter run. To circumvent this
+ * the counter value of the freerun timer/counter is stored at each start
+ * of the oneshot timer/counter.
+ *
+ * The function up_timer_gettime() could also be used for this but it takes
+ * too long. If up_timer_gettime() is called within this function the problem
+ * vanishes at least if compiled with no optimisation.
+ */
+
+ oneshot->start_count = sam_tc_getcounter(freerun->tch);
+
/* Enable interrupts. We should get the callback when the interrupt
* occurs.
*/
@@ -342,7 +365,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
*
****************************************************************************/
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts)
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ struct timespec *ts)
{
irqstate_t flags;
uint64_t usec;
@@ -383,6 +407,17 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts)
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
+ /* In the case the timer/counter was canceled very short after its start,
+ * the counter register can hold the wrong value (the value of the last
+ * run). To prevent this the counter value is set to zero if not at
+ * least on tick passed since the start of the timer/counter.
+ */
+
+ if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count)
+ {
+ count = 0;
+ }
+
/* Now we can disable the interrupt and stop the timer. */
sam_tc_attach(oneshot->tch, NULL, NULL, 0);
@@ -431,6 +466,14 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts)
usec = (((uint64_t)(rc - count)) * USEC_PER_SEC) /
sam_tc_divfreq(oneshot->tch);
+ /* Each time the timer/counter is canceled the time calculated from
+ * the two registers (counter and REGC) is accurate up to an error
+ * between 0 and USEC_PER_TICK microseconds. To correct this error
+ * one tick which means USEC_PER_TICK microseconds are subtracted.
+ */
+
+ usec = usec > USEC_PER_TICK ? usec - USEC_PER_TICK : 0;
+
/* Return the time remaining in the correct form */
sec = usec / USEC_PER_SEC;
diff --git a/arch/arm/src/sama5/sam_oneshot.h b/arch/arm/src/sama5/sam_oneshot.h
index 4fefe9fe11b..0443fcd693d 100644
--- a/arch/arm/src/sama5/sam_oneshot.h
+++ b/arch/arm/src/sama5/sam_oneshot.h
@@ -46,6 +46,7 @@
#include
#include "sam_tc.h"
+#include "sam_freerun.h"
#ifdef CONFIG_SAMA5_ONESHOT
@@ -82,6 +83,11 @@ struct sam_oneshot_s
volatile oneshot_handler_t handler; /* Oneshot expiration callback */
volatile void *arg; /* The argument that will accompany
* the callback */
+ volatile uint32_t start_count; /* Stores the value of the freerun counter,
+ * at each start of the onshot timer. Is neccesary
+ * to find out if the onshot counter was updated
+ * correctly at the time of the call to
+ * sam_oneshot_cancel or not. */
};
/****************************************************************************
@@ -134,6 +140,9 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* sam_oneshot_initialize();
+ * freerun Caller allocated instance of the freerun state structure. This
+ * structure must have been previously initialized via a call to
+ * sam_freerun_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@@ -144,8 +153,8 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
*
****************************************************************************/
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
- void *arg, const struct timespec *ts);
+int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ oneshot_handler_t handler, void *arg, const struct timespec *ts);
/****************************************************************************
* Name: sam_oneshot_cancel
@@ -160,6 +169,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* sam_oneshot_initialize();
+ * freerun Caller allocated instance of the freerun state structure. This
+ * structure must have been previously initialized via a call to
+ * sam_freerun_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
@@ -171,7 +183,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
*
****************************************************************************/
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts);
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ struct timespec *ts);
#undef EXTERN
#ifdef __cplusplus
diff --git a/arch/arm/src/sama5/sam_serial.c b/arch/arm/src/sama5/sam_serial.c
index 0083606dba1..a73ac33cd24 100644
--- a/arch/arm/src/sama5/sam_serial.c
+++ b/arch/arm/src/sama5/sam_serial.c
@@ -167,19 +167,19 @@
# elif defined(CONFIG_SAMA5_UART4)
# define TTYS0_DEV g_uart1port /* UART4 is ttyS0 */
# define UART4_ASSIGNED 1
-# elif defined(CONFIG_USART0_ISUART)
+# elif defined(CONFIG_USART0_SERIALDRIVER)
# define TTYS0_DEV g_usart0port /* USART0 is ttyS0 */
# define USART0_ASSIGNED 1
-# elif defined(CONFIG_USART1_ISUART)
+# elif defined(CONFIG_USART1_SERIALDRIVER)
# define TTYS0_DEV g_usart1port /* USART1 is ttyS0 */
# define USART1_ASSIGNED 1
-# elif defined(CONFIG_USART2_ISUART)
+# elif defined(CONFIG_USART2_SERIALDRIVER)
# define TTYS0_DEV g_usart2port /* USART2 is ttyS0 */
# define USART2_ASSIGNED 1
-# elif defined(CONFIG_USART3_ISUART)
+# elif defined(CONFIG_USART3_SERIALDRIVER)
# define TTYS0_DEV g_usart3port /* USART3 is ttyS0 */
# define USART3_ASSIGNED 1
-# elif defined(CONFIG_USART4_ISUART)
+# elif defined(CONFIG_USART4_SERIALDRIVER)
# define TTYS0_DEV g_usart4port /* USART4 is ttyS0 */
# define USART4_ASSIGNED 4
# endif
@@ -202,19 +202,19 @@
#elif defined(CONFIG_SAMA5_UART4) && !defined(UART4_ASSIGNED)
# define TTYS1_DEV g_uart1port /* UART4 is ttyS1 */
# define UART4_ASSIGNED 1
-#elif defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED)
+#elif defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED)
# define TTYS1_DEV g_usart0port /* USART0 is ttyS1 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED)
+#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED)
# define TTYS1_DEV g_usart1port /* USART1 is ttyS1 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED)
+#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED)
# define TTYS1_DEV g_usart2port /* USART2 is ttyS1 */
# define USART2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED)
# define TTYS1_DEV g_usart3port /* USART3 is ttyS1 */
# define USART3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYS1_DEV g_usart4port /* USART4 is ttyS1 */
# define USART4_ASSIGNED 1
#endif
@@ -236,19 +236,19 @@
#elif defined(CONFIG_SAMA5_UART4) && !defined(UART4_ASSIGNED)
# define TTYS2_DEV g_uart1port /* UART4 is ttyS2 */
# define UART4_ASSIGNED 1
-#elif defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED)
+#elif defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED)
# define TTYS2_DEV g_usart0port /* USART0 is ttyS2 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED)
+#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED)
# define TTYS2_DEV g_usart1port /* USART1 is ttyS2 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED)
+#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED)
# define TTYS2_DEV g_usart2port /* USART2 is ttyS2 */
# define USART2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED)
# define TTYS2_DEV g_usart3port /* USART3 is ttyS2 */
# define USART3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYS2_DEV g_usart4port /* USART4 is ttyS2 */
# define USART4_ASSIGNED 1
#endif
@@ -267,19 +267,19 @@
#elif defined(CONFIG_SAMA5_UART4) && !defined(UART4_ASSIGNED)
# define TTYS3_DEV g_uart1port /* UART4 is ttyS3 */
# define UART4_ASSIGNED 1
-#elif defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED)
+#elif defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED)
# define TTYS3_DEV g_usart0port /* USART0 is ttyS3 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED)
+#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED)
# define TTYS3_DEV g_usart1port /* USART1 is ttyS3 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED)
+#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED)
# define TTYS3_DEV g_usart2port /* USART2 is ttyS3 */
# define USART2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED)
# define TTYS3_DEV g_usart3port /* USART3 is ttyS3 */
# define USART3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYS3_DEV g_usart4port /* USART4 is ttyS3 */
# define USART4_ASSIGNED 1
#endif
@@ -295,19 +295,19 @@
#elif defined(CONFIG_SAMA5_UART4) && !defined(UART4_ASSIGNED)
# define TTYS4_DEV g_uart1port /* UART4 is ttyS4 */
# define UART4_ASSIGNED 1
-#elif defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED)
+#elif defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED)
# define TTYS4_DEV g_usart0port /* USART0 is ttyS4 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED)
+#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED)
# define TTYS4_DEV g_usart1port /* USART1 is ttyS4 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED)
+#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED)
# define TTYS4_DEV g_usart2port /* USART2 is ttyS4 */
# define USART2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED)
# define TTYS4_DEV g_usart3port /* USART3 is ttyS4 */
# define USART3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYS4_DEV g_usart4port /* USART4 is ttyS4 */
# define USART4_ASSIGNED 1
#endif
@@ -320,19 +320,19 @@
#if defined(CONFIG_SAMA5_UART4) && !defined(UART4_ASSIGNED)
# define TTYS5_DEV g_uart4port /* UART4 is ttyS5 */
# define UART1_ASSIGNED 1
-#elif defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED)
+#elif defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED)
# define TTYS5_DEV g_usart0port /* USART0 is ttyS5 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED)
+#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED)
# define TTYS5_DEV g_usart1port /* USART1 is ttyS5 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED)
+#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED)
# define TTYS5_DEV g_usart2port /* USART2 is ttyS5 */
# define USART2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED)
# define TTYS5_DEV g_usart3port /* USART3 is ttyS5 */
# define USART3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYS5_DEV g_usart4port /* USART4 is ttyS5 */
# define USART4_ASSIGNED 1
#endif
@@ -342,19 +342,19 @@
* could also be the console.
*/
-#if defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED)
+#if defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED)
# define TTYS6_DEV g_usart0port /* USART0 is ttyS6 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED)
+#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED)
# define TTYS6_DEV g_usart1port /* USART1 is ttyS6 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED)
+#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED)
# define TTYS6_DEV g_usart2port /* USART2 is ttyS6 */
# define USART2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED)
# define TTYS6_DEV g_usart3port /* USART3 is ttyS6 */
# define USART3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYS6_DEV g_usart4port /* USART4 is ttyS6 */
# define USART4_ASSIGNED 1
#endif
@@ -364,16 +364,16 @@
* USART1-4 could also be the console.
*/
-#if defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED)
+#if defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED)
# define TTYS7_DEV g_usart1port /* USART1 is ttyS7 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED)
+#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED)
# define TTYS7_DEV g_usart2port /* USART2 is ttyS7 */
# define USART2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED)
# define TTYS7_DEV g_usart3port /* USART3 is ttyS7 */
# define USART3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYS7_DEV g_usart4port /* USART4 is ttyS7 */
# define USART4_ASSIGNED 1
#endif
@@ -383,13 +383,13 @@
* USART2-4 could also be the console.
*/
-#if defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED)
+#if defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED)
# define TTYS8_DEV g_usart2port /* USART2 is ttyS8 */
# define USART2_ASSIGNED 1
-#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED)
+#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED)
# define TTYS8_DEV g_usart3port /* USART3 is ttyS8 */
# define USART3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYS8_DEV g_usart4port /* USART4 is ttyS8 */
# define USART4_ASSIGNED 1
#endif
@@ -399,10 +399,10 @@
* USART3-4 could also be the console.
*/
-#if defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED)
+#if defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED)
# define TTYS9_DEV g_usart3port /* USART3 is ttyS9 */
# define USART3_ASSIGNED 1
-#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED)
+#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED)
# define TTYS9_DEV g_usart4port /* USART4 is ttyS9 */
# define USART4_ASSIGNED 1
#endif
@@ -451,19 +451,19 @@ static int up_uart3_interrupt(int irq, void *context);
#ifdef CONFIG_SAMA5_UART4
static int up_uart4_interrupt(int irq, void *context);
#endif
-#ifdef CONFIG_USART0_ISUART
+#ifdef CONFIG_USART0_SERIALDRIVER
static int up_usart0_interrupt(int irq, void *context);
#endif
-#ifdef CONFIG_USART1_ISUART
+#ifdef CONFIG_USART1_SERIALDRIVER
static int up_usart1_interrupt(int irq, void *context);
#endif
-#ifdef CONFIG_USART2_ISUART
+#ifdef CONFIG_USART2_SERIALDRIVER
static int up_usart2_interrupt(int irq, void *context);
#endif
-#ifdef CONFIG_USART3_ISUART
+#ifdef CONFIG_USART3_SERIALDRIVER
static int up_usart3_interrupt(int irq, void *context);
#endif
-#ifdef CONFIG_USART4_ISUART
+#ifdef CONFIG_USART4_SERIALDRIVER
static int up_usart4_interrupt(int irq, void *context);
#endif
@@ -525,23 +525,23 @@ static char g_uart3txbuffer[CONFIG_UART3_TXBUFSIZE];
static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE];
static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE];
#endif
-#ifdef CONFIG_USART0_ISUART
+#ifdef CONFIG_USART0_SERIALDRIVER
static char g_usart0rxbuffer[CONFIG_USART0_RXBUFSIZE];
static char g_usart0txbuffer[CONFIG_USART0_TXBUFSIZE];
#endif
-#ifdef CONFIG_USART1_ISUART
+#ifdef CONFIG_USART1_SERIALDRIVER
static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE];
static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE];
#endif
-#ifdef CONFIG_USART2_ISUART
+#ifdef CONFIG_USART2_SERIALDRIVER
static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE];
static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE];
#endif
-#ifdef CONFIG_USART3_ISUART
+#ifdef CONFIG_USART3_SERIALDRIVER
static char g_usart3rxbuffer[CONFIG_USART3_RXBUFSIZE];
static char g_usart3txbuffer[CONFIG_USART3_TXBUFSIZE];
#endif
-#ifdef CONFIG_USART4_ISUART
+#ifdef CONFIG_USART4_SERIALDRIVER
static char g_usart4rxbuffer[CONFIG_USART4_RXBUFSIZE];
static char g_usart4txbuffer[CONFIG_USART4_TXBUFSIZE];
#endif
@@ -753,7 +753,7 @@ static uart_dev_t g_uart4port =
/* This describes the state of the USART0 port. */
-#ifdef CONFIG_USART0_ISUART
+#ifdef CONFIG_USART0_SERIALDRIVER
static struct up_dev_s g_usart0priv =
{
.handler = up_usart0_interrupt,
@@ -787,7 +787,7 @@ static uart_dev_t g_usart0port =
/* This describes the state of the USART1 port. */
-#ifdef CONFIG_USART1_ISUART
+#ifdef CONFIG_USART1_SERIALDRIVER
static struct up_dev_s g_usart1priv =
{
.handler = up_usart1_interrupt,
@@ -821,7 +821,7 @@ static uart_dev_t g_usart1port =
/* This describes the state of the USART2 port. */
-#ifdef CONFIG_USART2_ISUART
+#ifdef CONFIG_USART2_SERIALDRIVER
static struct up_dev_s g_usart2priv =
{
.handler = up_usart2_interrupt,
@@ -855,7 +855,7 @@ static uart_dev_t g_usart2port =
/* This describes the state of the USART3 port. */
-#ifdef CONFIG_USART3_ISUART
+#ifdef CONFIG_USART3_SERIALDRIVER
static struct up_dev_s g_usart3priv =
{
.handler = up_usart3_interrupt,
@@ -889,7 +889,7 @@ static uart_dev_t g_usart3port =
/* This describes the state of the USART4 port. */
-#ifdef CONFIG_USART4_ISUART
+#ifdef CONFIG_USART4_SERIALDRIVER
static struct up_dev_s g_usart4priv =
{
.handler = up_usart4_interrupt,
@@ -1073,31 +1073,31 @@ static int up_uart4_interrupt(int irq, void *context)
return up_interrupt(&g_uart4port);
}
#endif
-#ifdef CONFIG_USART0_ISUART
+#ifdef CONFIG_USART0_SERIALDRIVER
static int up_usart0_interrupt(int irq, void *context)
{
return up_interrupt(&g_usart0port);
}
#endif
-#ifdef CONFIG_USART1_ISUART
+#ifdef CONFIG_USART1_SERIALDRIVER
static int up_usart1_interrupt(int irq, void *context)
{
return up_interrupt(&g_usart1port);
}
#endif
-#ifdef CONFIG_USART2_ISUART
+#ifdef CONFIG_USART2_SERIALDRIVER
static int up_usart2_interrupt(int irq, void *context)
{
return up_interrupt(&g_usart2port);
}
#endif
-#ifdef CONFIG_USART3_ISUART
+#ifdef CONFIG_USART3_SERIALDRIVER
static int up_usart3_interrupt(int irq, void *context)
{
return up_interrupt(&g_usart3port);
}
#endif
-#ifdef CONFIG_USART4_ISUART
+#ifdef CONFIG_USART4_SERIALDRIVER
static int up_usart4_interrupt(int irq, void *context)
{
return up_interrupt(&g_usart4port);
diff --git a/arch/arm/src/sama5/sam_tickless.c b/arch/arm/src/sama5/sam_tickless.c
index a785266a5dd..70cecb1217a 100644
--- a/arch/arm/src/sama5/sam_tickless.c
+++ b/arch/arm/src/sama5/sam_tickless.c
@@ -377,8 +377,8 @@ int up_timer_gettime(FAR struct timespec *ts)
int up_timer_cancel(FAR struct timespec *ts)
{
- return ONESHOT_INITIALIZED(&g_tickless.oneshot) ?
- sam_oneshot_cancel(&g_tickless.oneshot, ts) :
+ return ONESHOT_INITIALIZED(&g_tickless.oneshot) && FREERUN_INITIALIZED(&g_tickless.freerun) ?
+ sam_oneshot_cancel(&g_tickless.oneshot, &g_tickless.freerun, ts) :
-EAGAIN;
}
@@ -410,7 +410,7 @@ int up_timer_cancel(FAR struct timespec *ts)
int up_timer_start(FAR const struct timespec *ts)
{
return ONESHOT_INITIALIZED(&g_tickless.oneshot) ?
- sam_oneshot_start(&g_tickless.oneshot, sam_oneshot_handler, NULL, ts) :
+ sam_oneshot_start(&g_tickless.oneshot, &g_tickless.freerun, sam_oneshot_handler, NULL, ts) :
-EAGAIN;
}
#endif /* CONFIG_SCHED_TICKLESS */
diff --git a/arch/arm/src/sama5/sam_twi.c b/arch/arm/src/sama5/sam_twi.c
index 8944de9ed4b..14df0f62a42 100644
--- a/arch/arm/src/sama5/sam_twi.c
+++ b/arch/arm/src/sama5/sam_twi.c
@@ -1200,6 +1200,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency)
/* Set the initial TWI data transfer frequency */
+ priv->frequency = 0;
twi_setfrequency(priv, frequency);
/* Enable Interrupts */
diff --git a/arch/arm/src/sama5/sam_wdt.c b/arch/arm/src/sama5/sam_wdt.c
index 6868b573c60..d14f45c1983 100644
--- a/arch/arm/src/sama5/sam_wdt.c
+++ b/arch/arm/src/sama5/sam_wdt.c
@@ -648,7 +648,7 @@ static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
****************************************************************************/
/****************************************************************************
- * Name: up_wdginitialize
+ * Name: sam_wdt_initialize
*
* Description:
* Initialize the WDT watchdog time. The watchdog timer is initialized and
@@ -663,7 +663,7 @@ static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
*
****************************************************************************/
-int up_wdginitialize(void)
+int sam_wdt_initialize(void)
{
FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
diff --git a/arch/arm/src/sama5/sam_wdt.h b/arch/arm/src/sama5/sam_wdt.h
index 6f99082e163..0f9eab7b75b 100644
--- a/arch/arm/src/sama5/sam_wdt.h
+++ b/arch/arm/src/sama5/sam_wdt.h
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/sama5/sam_wdt.h
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -66,6 +66,26 @@ extern "C"
* Public Functions
****************************************************************************/
+/****************************************************************************
+ * Name: sam_wdt_initialize()
+ *
+ * Description:
+ * Perform architecture-specific initialization of the Watchdog hardware.
+ * This interface should be provided by all configurations using
+ * to avoid exposed platform-dependent logic.
+ *
+ * At a minimum, this function should call watchdog_register().
+ *
+ * Input parameters:
+ * None
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int sam_wdt_initialize(void);
+
#undef EXTERN
#if defined(__cplusplus)
}
diff --git a/arch/arm/src/samdl/Kconfig b/arch/arm/src/samdl/Kconfig
index 68ea979f909..a890db6a0fd 100644
--- a/arch/arm/src/samdl/Kconfig
+++ b/arch/arm/src/samdl/Kconfig
@@ -589,8 +589,7 @@ config SAMDL_SERCOM0_ISSPI
config SAMDL_SERCOM0_ISUSART
bool "USART"
- select ARCH_HAVE_USART0
- select USART0_ISUART
+ select USART0_SERIALDRIVER
endchoice
@@ -623,8 +622,7 @@ config SAMDL_SERCOM1_ISSPI
config SAMDL_SERCOM1_ISUSART
bool "USART"
- select ARCH_HAVE_USART1
- select USART1_ISUART
+ select USART1_SERIALDRIVER
endchoice
@@ -643,8 +641,7 @@ config SAMDL_SERCOM2_ISSPI
config SAMDL_SERCOM2_ISUSART
bool "USART"
- select ARCH_HAVE_USART2
- select USART2_ISUART
+ select USART2_SERIALDRIVER
endchoice
@@ -663,8 +660,7 @@ config SAMDL_SERCOM3_ISSPI
config SAMDL_SERCOM3_ISUSART
bool "USART"
- select ARCH_HAVE_USART3
- select USART3_ISUART
+ select USART3_SERIALDRIVER
endchoice
@@ -683,8 +679,7 @@ config SAMDL_SERCOM4_ISSPI
config SAMDL_SERCOM4_ISUSART
bool "USART"
- select ARCH_HAVE_USART4
- select USART4_ISUART
+ select USART4_SERIALDRIVER
endchoice
@@ -703,8 +698,7 @@ config SAMDL_SERCOM5_ISSPI
config SAMDL_SERCOM5_ISUSART
bool "USART"
- select ARCH_HAVE_USART5
- select USART5_ISUART
+ select USART5_SERIALDRIVER
endchoice
diff --git a/arch/arm/src/samdl/sam_config.h b/arch/arm/src/samdl/sam_config.h
index 846e3291d31..db85694e5d2 100644
--- a/arch/arm/src/samdl/sam_config.h
+++ b/arch/arm/src/samdl/sam_config.h
@@ -56,7 +56,7 @@
#define SAMDL_HAVE_USART5 1
#if !defined(CONFIG_SAMDL_SERCOM0) || !defined(CONFIG_SAMDL_SERCOM0_ISUSART) || \
- !defined(CONFIG_USART0_ISUART)
+ !defined(CONFIG_USART0_SERIALDRIVER)
# undef SAMDL_HAVE_USART0
# undef CONFIG_SAMDL_SERCOM0_ISUSART
# undef CONFIG_USART0_SERIAL_CONSOLE
@@ -66,7 +66,7 @@
#endif
#if !defined(CONFIG_SAMDL_SERCOM1) || !defined(CONFIG_SAMDL_SERCOM1_ISUSART) || \
- !defined(CONFIG_USART1_ISUART)
+ !defined(CONFIG_USART1_SERIALDRIVER)
# undef SAMDL_HAVE_USART1
# undef CONFIG_SAMDL_SERCOM1_ISUSART
# undef CONFIG_USART1_SERIAL_CONSOLE
@@ -76,7 +76,7 @@
#endif
#if !defined(CONFIG_SAMDL_SERCOM2) || !defined(CONFIG_SAMDL_SERCOM2_ISUSART) || \
- !defined(CONFIG_USART2_ISUART)
+ !defined(CONFIG_USART2_SERIALDRIVER)
# undef SAMDL_HAVE_USART2
# undef CONFIG_SAMDL_SERCOM2_ISUSART
# undef CONFIG_USART2_SERIAL_CONSOLE
@@ -86,7 +86,7 @@
#endif
#if !defined(CONFIG_SAMDL_SERCOM3) || !defined(CONFIG_SAMDL_SERCOM3_ISUSART) || \
- !defined(CONFIG_USART3_ISUART)
+ !defined(CONFIG_USART3_SERIALDRIVER)
# undef SAMDL_HAVE_USART3
# undef CONFIG_SAMDL_SERCOM3_ISUSART
# undef CONFIG_USART3_SERIAL_CONSOLE
@@ -96,7 +96,7 @@
#endif
#if !defined(CONFIG_SAMDL_SERCOM4) || !defined(CONFIG_SAMDL_SERCOM4_ISUSART) || \
- !defined(CONFIG_USART4_ISUART)
+ !defined(CONFIG_USART4_SERIALDRIVER)
# undef SAMDL_HAVE_USART4
# undef CONFIG_SAMDL_SERCOM4_ISUSART
# undef CONFIG_USART4_SERIAL_CONSOLE
@@ -106,7 +106,7 @@
#endif
#if !defined(CONFIG_SAMDL_SERCOM5) || !defined(CONFIG_SAMDL_SERCOM5_ISUSART) || \
- !defined(CONFIG_USART5_ISUART)
+ !defined(CONFIG_USART5_SERIALDRIVER)
# undef SAMDL_HAVE_USART5
# undef CONFIG_SAMDL_SERCOM5_ISUSART
# undef CONFIG_USART5_SERIAL_CONSOLE
diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig
index 5a68712427d..7a7d75c8408 100644
--- a/arch/arm/src/samv7/Kconfig
+++ b/arch/arm/src/samv7/Kconfig
@@ -465,31 +465,31 @@ config SAMV7_TWIHS2
config SAMV7_UART0
bool "UART 0"
default y
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMV7_UART1
bool "UART 1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMV7_UART2
bool "UART 2"
default y
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMV7_UART3
bool "UART 3"
default n
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMV7_UART4
bool "UART 4"
default y
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMV7_USBDEVFS
@@ -520,21 +520,21 @@ config SAMV7_USART0
bool "USART 0"
default n
depends on SAMV7_HAVE_USART0
- select ARCH_HAVE_USART0
+ select USART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMV7_USART1
bool "USART 1"
default n
depends on SAMV7_HAVE_USART1
- select ARCH_HAVE_USART1
+ select USART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMV7_USART2
bool "USART 2"
default n
depends on SAMV7_HAVE_USART2
- select ARCH_HAVE_USART2
+ select USART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config SAMV7_WDT
@@ -549,6 +549,97 @@ config SAMV7_RSWDT
endmenu # SAMV7 Peripheral Selection
+choice
+ prompt "JTAG IO Configuration"
+ default SAMV7_JTAG_FULL_ENABLE
+ ---help---
+ JTAG Enable settings (by default the IO for JTAG-DP and SW-DP are
+ enabled)
+
+config SAMV7_JTAG_DISABLE
+ bool "Disable all JTAG IO"
+ ---help---
+ JTAG Enable settings (by default the IO for JTAG-DP and SW-DP are
+ enabled)
+
+ When JTAG is disabled PB4-BP7 is assigned as a GPIO and can be
+ configured for use as GPIO or a Peripheral
+
+config SAMV7_JTAG_FULL_ENABLE
+ bool "Enable full JTAG IO to use JTAG-DP + SW-DP"
+ ---help---
+ The JTAG IO is configured for both JTAG-DP + SW-DP"
+
+ PB4 is TDI
+ PB5 is TDO/TRACESWO
+ PB6 is TMS/SWDIO
+ PB7 is TCK/SWCLK
+
+config SAMV7_JTAG_FULL_SW_ENABLE
+ bool "Set JTAG-DP IO disabled and Full SW-DP IO enabled"
+ ---help---
+ JTAG IO is configured for SW-DP with Trace"
+
+ PB5 is TDO/TRACESWO
+ PB6 is TMS/SWDIO
+ PB7 is TCK/SWCLK
+
+config SAMV7_JTAG_SW_ENABLE
+ bool "Set JTAG-DP IO disabled and SW-DP IO enabled"
+ ---help---
+ JTAG IO is configured for SW-DP without Trace "
+
+ PB6 is TMS/SWDIO
+ PB7 is TCK/SWCLK
+
+endchoice # JTAG IO Configuration
+
+choice
+ prompt "ERASE Pin Configuration"
+ default SAMV7_ERASE_ENABLE
+ ---help---
+ ERASE Pin Enable settings (by default ERASE pin is enabled)
+
+config SAMV7_ERASE_DISABLE
+ bool "Disable ERASE Pin"
+ ---help---
+ ERASE Pin Enable settings (by default ERASE pin is enabled)
+
+ When the ERASE pin is disabled PB12 is assigned as a GPIO and can be
+ configured for use as GPIO or a Peripheral.
+
+ N.B. a low level must be ensured at startup to prevent Flash erase before
+ the user application sets PB12 into PIO mode,
+
+config SAMV7_ERASE_ENABLE
+ bool "Enable ERASE Pin"
+ ---help---
+ The ERASE pin is configured to reinitialize the Flash content.
+
+endchoice
+
+menuconfig SAMV7_SYSTEMRESET
+ bool "Enable System Reset"
+ select ARCH_HAVE_RESET
+ ---help---
+ Enable up_systemreset
+
+if SAMV7_SYSTEMRESET
+
+config SAMV7_EXTRESET_ERST
+ int "Drive External nRST duration"
+ default 0
+ range 0 16
+ ---help---
+ Define if the external reset (nRST) will be generated in up_systemreset
+ and for how long:
+
+ - A value of 0 will not drive the external reset
+ - A value of 1-6 will drive the external reset for 2^SAMV7_EXTRESET_ERST
+ slow clock cycles.
+
+endif # SAMV7_SYSTEMRESET
+
menuconfig SAMV7_GPIO_IRQ
bool "GPIO pin interrupts"
---help---
@@ -1423,6 +1514,7 @@ endif # SAMV7_TC3
config SAMV7_ONESHOT
bool "TC one-shot wrapper"
+ depends on SAMV7_FREERUN
default n if !SCHED_TICKLESS
default y if SCHED_TICKLESS
---help---
diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs
index 5d3dfc437bd..fbd88a6e7f4 100644
--- a/arch/arm/src/samv7/Make.defs
+++ b/arch/arm/src/samv7/Make.defs
@@ -150,6 +150,10 @@ ifeq ($(CONFIG_SAMV7_RSWDT),y)
CHIP_CSRCS += sam_rswdt.c
endif
+ifeq ($(CONFIG_SAMV7_SYSTEMRESET),y)
+CHIP_CSRCS += sam_systemreset.c
+endif
+
ifeq ($(CONFIG_SAMV7_SPI_MASTER),y)
CHIP_CSRCS += sam_spi.c
endif
diff --git a/arch/arm/src/samv7/sam_config.h b/arch/arm/src/samv7/sam_config.h
index 242c2eb5037..05e6db84f11 100644
--- a/arch/arm/src/samv7/sam_config.h
+++ b/arch/arm/src/samv7/sam_config.h
@@ -113,19 +113,19 @@
* enabled for our purposes.
*/
-#if !defined(CONFIG_USART0_ISUART) && !defined(CONFIG_USART0_ISSPI)
+#if !defined(CONFIG_USART0_SERIALDRIVER) && !defined(CONFIG_USART0_ISSPI)
# undef CONFIG_SAMV7_USART0
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART0_IFLOWCONTROL
#endif
-#if !defined(CONFIG_USART1_ISUART) && !defined(CONFIG_USART1_ISSPI)
+#if !defined(CONFIG_USART1_SERIALDRIVER) && !defined(CONFIG_USART1_ISSPI)
# undef CONFIG_SAMV7_USART1
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART1_IFLOWCONTROL
#endif
-#if !defined(CONFIG_USART2_ISUART) && !defined(CONFIG_USART2_ISSPI)
+#if !defined(CONFIG_USART2_SERIALDRIVER) && !defined(CONFIG_USART2_ISSPI)
# undef CONFIG_SAMV7_USART2
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART2_IFLOWCONTROL
diff --git a/arch/arm/src/samv7/sam_gpio.c b/arch/arm/src/samv7/sam_gpio.c
index 628c1979f86..32547ff1a3b 100644
--- a/arch/arm/src/samv7/sam_gpio.c
+++ b/arch/arm/src/samv7/sam_gpio.c
@@ -54,14 +54,33 @@
#include "sam_gpio.h"
#include "chip/sam_pio.h"
+#include "chip/sam_matrix.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
-/****************************************************************************
- * Private Types
- ****************************************************************************/
+#if !defined(CONFIG_SAMV7_ERASE_ENABLE) || \
+ !defined(CONFIG_SAMV7_JTAG_FULL_ENABLE)
+# if defined(CONFIG_SAMV7_ERASE_DISABLE)
+# define SYSIO_ERASE_BIT MATRIX_CCFG_SYSIO_SYSIO12
+# else
+# define SYSIO_ERASE_BIT 0
+# endif
+# if defined(CONFIG_SAMV7_JTAG_DISABLE)
+# define SYSIO_BITS (MATRIX_CCFG_SYSIO_SYSIO4 | MATRIX_CCFG_SYSIO_SYSIO5 | \
+ MATRIX_CCFG_SYSIO_SYSIO6 | MATRIX_CCFG_SYSIO_SYSIO7)
+# endif
+# if defined(CONFIG_SAMV7_JTAG_FULL_SW_ENABLE)
+# define SYSIO_BITS MATRIX_CCFG_SYSIO_SYSIO4
+# endif
+# if defined(CONFIG_SAMV7_JTAG_SW_ENABLE)
+# define SYSIO_BITS (MATRIX_CCFG_SYSIO_SYSIO4 | MATRIX_CCFG_SYSIO_SYSIO5)
+# endif
+#endif
+#if !defined(SYSIO_BITS)
+# define SYSIO_BITS 0
+#endif
/****************************************************************************
* Private Data
@@ -70,7 +89,7 @@
#ifdef CONFIG_DEBUG_GPIO
static const char g_portchar[SAMV7_NPIO] =
{
- 'A'
+ 'A'
#if SAMV7_NPIO > 1
, 'B'
#endif
@@ -402,6 +421,33 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
* Public Functions
****************************************************************************/
+/****************************************************************************
+ * Function: sam_gpioinit
+ *
+ * Description:
+ * Based on configuration within the .config file, it does:
+ * - Configures the CCFG_SYSIO bits.
+ *
+ * Typically called from sam_start().
+ *
+ * Assumptions:
+ * This function is called early in the initialization sequence so that
+ * no mutual exlusion is necessary.
+ *
+ ****************************************************************************/
+
+#if !defined(CONFIG_SAMV7_ERASE_ENABLE) || \
+ !defined(CONFIG_SAMV7_JTAG_FULL_ENABLE)
+void sam_gpioinit(void)
+{
+ uint32_t regval;
+
+ regval = getreg32(SAM_MATRIX_CCFG_SYSIO);
+ regval |= (SYSIO_ERASE_BIT | SYSIO_BITS);
+ putreg32(regval, SAM_MATRIX_CCFG_SYSIO);
+}
+#endif
+
/****************************************************************************
* Name: sam_configgpio
*
diff --git a/arch/arm/src/samv7/sam_gpio.h b/arch/arm/src/samv7/sam_gpio.h
index 4b5b6f5208b..2e564ec787d 100644
--- a/arch/arm/src/samv7/sam_gpio.h
+++ b/arch/arm/src/samv7/sam_gpio.h
@@ -265,6 +265,24 @@ static inline int sam_gpio_pinmask(gpio_pinset_t cfgset)
* Public Function Prototypes
************************************************************************************/
+/************************************************************************************
+ * Function: sam_gpioinit
+ *
+ * Description:
+ * Based on configuration within the .config file, it does:
+ * - Remaps positions of alternative functions for GPIO.
+ *
+ * Typically called from sam_start().
+ *
+ ************************************************************************************/
+
+#if !defined(CONFIG_SAMV7_ERASE_ENABLE) || \
+ !defined(CONFIG_SAMV7_JTAG_FULL_ENABLE)
+void sam_gpioinit(void);
+#else
+# define sam_gpioinit()
+#endif
+
/************************************************************************************
* Name: sam_gpioirqinitialize
*
diff --git a/arch/arm/src/samv7/sam_lowputc.c b/arch/arm/src/samv7/sam_lowputc.c
index 502884cc0de..fe298f4f23f 100644
--- a/arch/arm/src/samv7/sam_lowputc.c
+++ b/arch/arm/src/samv7/sam_lowputc.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/samv7/sam_lowputc.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -348,19 +348,26 @@ void sam_lowsetup(void)
#ifdef CONFIG_SAMV7_USART1
(void)sam_configgpio(GPIO_USART1_RXD);
(void)sam_configgpio(GPIO_USART1_TXD);
-#ifdef CONFIG_USART1_OFLOWCONTROL
+# ifdef CONFIG_USART1_OFLOWCONTROL
(void)sam_configgpio(GPIO_USART1_CTS);
-#endif
-#ifdef CONFIG_USART1_IFLOWCONTROL
+# endif
+# ifdef CONFIG_USART1_IFLOWCONTROL
(void)sam_configgpio(GPIO_USART1_RTS);
-#endif
+# endif
+
/* To use the USART1 as an USART, the SYSIO Pin4 must be bound to PB4
* instead of TDI
*/
+# if defined(CONFIG_SAMV7_JTAG_FULL_ENABLE)
+# warning CONFIG_SAMV7_JTAG_FULL_ENABLE is incompatible with CONFIG_SAMV7_USART1.
+# warning The SYSIO Pin4 must be bound to PB4 to use USART1
+# endif
+
uint32_t sysioreg = getreg32(SAM_MATRIX_CCFG_SYSIO);
sysioreg |= MATRIX_CCFG_SYSIO_SYSIO4;
putreg32(sysioreg, SAM_MATRIX_CCFG_SYSIO);
+
#endif
#ifdef CONFIG_SAMV7_USART2
diff --git a/arch/arm/src/samv7/sam_oneshot.c b/arch/arm/src/samv7/sam_oneshot.c
index 34fa89843e3..76c4ee1a41b 100644
--- a/arch/arm/src/samv7/sam_oneshot.c
+++ b/arch/arm/src/samv7/sam_oneshot.c
@@ -60,6 +60,7 @@
#include
#include "sam_oneshot.h"
+#include "sam_freerun.h"
#ifdef CONFIG_SAMV7_ONESHOT
@@ -124,10 +125,11 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
/* Forward the event, clearing out any vestiges */
- oneshot_handler = (oneshot_handler_t)oneshot->handler;
- oneshot->handler = NULL;
- oneshot_arg = (void *)oneshot->arg;
- oneshot->arg = NULL;
+ oneshot_handler = (oneshot_handler_t)oneshot->handler;
+ oneshot->handler = NULL;
+ oneshot_arg = (void *)oneshot->arg;
+ oneshot->arg = NULL;
+ oneshot->start_count = 0;
oneshot_handler(oneshot_arg);
}
@@ -224,10 +226,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
* success.
*/
- oneshot->chan = chan;
- oneshot->running = false;
- oneshot->handler = NULL;
- oneshot->arg = NULL;
+ oneshot->chan = chan;
+ oneshot->running = false;
+ oneshot->handler = NULL;
+ oneshot->arg = NULL;
+ oneshot->start_count = 0;
return OK;
}
@@ -251,8 +254,8 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
*
****************************************************************************/
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
- void *arg, const struct timespec *ts)
+int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ oneshot_handler_t handler, void *arg, const struct timespec *ts)
{
uint64_t usec;
uint64_t regval;
@@ -270,7 +273,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
/* Yes.. then cancel it */
tcvdbg("Already running... cancelling\n");
- (void)sam_oneshot_cancel(oneshot, NULL);
+ (void)sam_oneshot_cancel(oneshot, freerun, NULL);
}
/* Save the new handler and its argument */
@@ -309,6 +312,26 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
sam_tc_start(oneshot->tch);
+ /* The function sam_tc_start() starts the timer/counter by setting the
+ * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register.
+ * The first one enables the timer/counter the latter performs an
+ * software trigger, which starts the clock and sets the counter
+ * register to zero. This reset is performed with the next valid edge
+ * of the selected clock. Thus it can take up USEC_PER_TICK microseconds
+ * until the counter register becomes zero.
+ *
+ * If the timer is canceled within this period the counter register holds
+ * the counter value for the last timer/counter run. To circumvent this
+ * the counter value of the freerun timer/counter is stored at each start
+ * of the oneshot timer/counter.
+ *
+ * The function up_timer_gettime() could also be used for this but it takes
+ * too long. If up_timer_gettime() is called within this function the problem
+ * vanishes at least if compiled with no optimisation.
+ */
+
+ oneshot->start_count = sam_tc_getcounter(freerun->tch);
+
/* Enable interrupts. We should get the callback when the interrupt
* occurs.
*/
@@ -343,7 +366,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
*
****************************************************************************/
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts)
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ struct timespec *ts)
{
irqstate_t flags;
uint64_t usec;
@@ -384,6 +408,17 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts)
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
+ /* In the case the timer/counter was canceled very short after its start,
+ * the counter register can hold the wrong value (the value of the last
+ * run). To prevent this the counter value is set to zero if not at
+ * least on tick passed since the start of the timer/counter.
+ */
+
+ if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count)
+ {
+ count = 0;
+ }
+
/* Now we can disable the interrupt and stop the timer. */
sam_tc_attach(oneshot->tch, NULL, NULL, 0);
@@ -432,6 +467,14 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts)
usec = (((uint64_t)(rc - count)) * USEC_PER_SEC) /
sam_tc_divfreq(oneshot->tch);
+ /* Each time the timer/counter is canceled the time calculated from
+ * the two registers (counter and REGC) is accurate up to an error
+ * between 0 and USEC_PER_TICK microseconds. To correct this error
+ * one tick which means USEC_PER_TICK microseconds are subtracted.
+ */
+
+ usec = usec > USEC_PER_TICK ? usec - USEC_PER_TICK : 0;
+
/* Return the time remaining in the correct form */
sec = usec / USEC_PER_SEC;
diff --git a/arch/arm/src/samv7/sam_oneshot.h b/arch/arm/src/samv7/sam_oneshot.h
index 62efde8047d..6c4e42337f1 100644
--- a/arch/arm/src/samv7/sam_oneshot.h
+++ b/arch/arm/src/samv7/sam_oneshot.h
@@ -46,6 +46,7 @@
#include
#include "sam_tc.h"
+#include "sam_freerun.h"
#ifdef CONFIG_SAMV7_ONESHOT
@@ -82,6 +83,11 @@ struct sam_oneshot_s
volatile oneshot_handler_t handler; /* Oneshot expiration callback */
volatile void *arg; /* The argument that will accompany
* the callback */
+ volatile uint32_t start_count; /* Stores the value of the freerun counter,
+ * at each start of the onshot timer. Is neccesary
+ * to find out if the onshot counter was updated
+ * correctly at the time of the call to
+ * sam_oneshot_cancel or not. */
};
/****************************************************************************
@@ -157,6 +163,9 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* sam_oneshot_initialize();
+ * freerun Caller allocated instance of the freerun state structure. This
+ * structure must have been previously initialized via a call to
+ * sam_freerun_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@@ -167,8 +176,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
*
****************************************************************************/
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
- void *arg, const struct timespec *ts);
+int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ oneshot_handler_t handler, void *arg, const struct timespec *ts);
/****************************************************************************
* Name: sam_oneshot_cancel
@@ -183,6 +192,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* sam_oneshot_initialize();
+ * freerun Caller allocated instance of the freerun state structure. This
+ * structure must have been previously initialized via a call to
+ * sam_freerun_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
@@ -194,7 +206,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler,
*
****************************************************************************/
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts);
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
+ struct timespec *ts);
#undef EXTERN
#ifdef __cplusplus
diff --git a/arch/arm/src/samv7/sam_rswdt.c b/arch/arm/src/samv7/sam_rswdt.c
index 61593a54c4d..20ea3c21834 100644
--- a/arch/arm/src/samv7/sam_rswdt.c
+++ b/arch/arm/src/samv7/sam_rswdt.c
@@ -648,7 +648,7 @@ static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
****************************************************************************/
/****************************************************************************
- * Name: up_wdginitialize
+ * Name: sam_rswdt_initialize
*
* Description:
* Initialize the RSWDT watchdog time. The watchdog timer is initialized and
@@ -663,7 +663,7 @@ static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
*
****************************************************************************/
-int up_wdginitialize(void)
+int sam_rswdt_initialize(void)
{
FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
diff --git a/arch/arm/src/samv7/sam_serial.c b/arch/arm/src/samv7/sam_serial.c
index bb7827ea636..6744a72ce2e 100644
--- a/arch/arm/src/samv7/sam_serial.c
+++ b/arch/arm/src/samv7/sam_serial.c
@@ -123,13 +123,13 @@
# elif defined(CONFIG_SAMV7_UART4)
# define TTYS0_DEV g_uart4port /* UART4 is ttyS0 */
# define UART4_ASSIGNED 1
-# elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART)
+# elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER)
# define TTYS0_DEV g_usart0port /* USART0 is ttyS0 */
# define USART0_ASSIGNED 1
-# elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART)
+# elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER)
# define TTYS0_DEV g_usart1port /* USART1 is ttyS0 */
# define USART1_ASSIGNED 1
-# elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART)
+# elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER)
# define TTYS0_DEV g_usart2port /* USART2 is ttyS0 */
# define USART2_ASSIGNED 1
# endif
@@ -154,15 +154,15 @@
#elif defined(CONFIG_SAMV7_UART4) && !defined(UART4_ASSIGNED)
# define TTYS1_DEV g_uart4port /* UART4 is ttyS1 */
# define UART4_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \
!defined(USART0_ASSIGNED)
# define TTYS1_DEV g_usart0port /* USART0 is ttyS1 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \
!defined(USART1_ASSIGNED)
# define TTYS1_DEV g_usart1port /* USART1 is ttyS1 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \
!defined(USART2_ASSIGNED)
# define TTYS1_DEV g_usart2port /* USART2 is ttyS1 */
# define USART2_ASSIGNED 1
@@ -185,15 +185,15 @@
#elif defined(CONFIG_SAMV7_UART4) && !defined(UART4_ASSIGNED)
# define TTYS2_DEV g_uart4port /* UART4 is ttyS2 */
# define UART4_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \
!defined(USART0_ASSIGNED)
# define TTYS2_DEV g_usart0port /* USART0 is ttyS2 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \
!defined(USART1_ASSIGNED)
# define TTYS2_DEV g_usart1port /* USART1 is ttyS2 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \
!defined(USART2_ASSIGNED)
# define TTYS2_DEV g_usart2port /* USART2 is ttyS2 */
# define USART2_ASSIGNED 1
@@ -213,15 +213,15 @@
#elif defined(CONFIG_SAMV7_UART4) && !defined(UART4_ASSIGNED)
# define TTYS3_DEV g_uart4port /* UART4 is ttyS3 */
# define UART4_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \
!defined(USART0_ASSIGNED)
# define TTYS3_DEV g_usart0port /* USART0 is ttyS3 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \
!defined(USART1_ASSIGNED)
# define TTYS3_DEV g_usart1port /* USART1 is ttyS3 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \
!defined(USART2_ASSIGNED)
# define TTYS3_DEV g_usart2port /* USART2 is ttyS3 */
# define USART2_ASSIGNED 1
@@ -238,15 +238,15 @@
#elif defined(CONFIG_SAMV7_UART4) && !defined(UART4_ASSIGNED)
# define TTYS4_DEV g_uart4port /* UART4 is ttyS4 */
# define UART4_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \
!defined(USART0_ASSIGNED)
# define TTYS4_DEV g_usart0port /* USART0 is ttyS4 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \
!defined(USART1_ASSIGNED)
# define TTYS4_DEV g_usart1port /* USART1 is ttyS4 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \
!defined(USART2_ASSIGNED)
# define TTYS4_DEV g_usart2port /* USART2 is ttyS4 */
# define USART2_ASSIGNED 1
@@ -260,15 +260,15 @@
#if defined(CONFIG_SAMV7_UART4) && !defined(UART4_ASSIGNED)
# define TTYS5_DEV g_uart4port /* UART4 is ttyS5 */
# define UART4_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \
!defined(USART0_ASSIGNED)
# define TTYS5_DEV g_usart0port /* USART0 is ttyS5 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \
!defined(USART1_ASSIGNED)
# define TTYS5_DEV g_usart1port /* USART1 is ttyS5 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \
!defined(USART2_ASSIGNED)
# define TTYS5_DEV g_usart2port /* USART2 is ttyS5 */
# define USART2_ASSIGNED 1
@@ -279,15 +279,15 @@
* One of USART0-2 could also be the console.
*/
-#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \
+#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \
!defined(USART0_ASSIGNED)
# define TTYS6_DEV g_usart0port /* USART0 is ttyS6 */
# define USART0_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \
!defined(USART1_ASSIGNED)
# define TTYS6_DEV g_usart1port /* USART1 is ttyS6 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \
!defined(USART2_ASSIGNED)
# define TTYS6_DEV g_usart2port /* USART2 is ttyS6 */
# define USART2_ASSIGNED 1
@@ -298,11 +298,11 @@
* One of of USART1-2 could also be the console.
*/
-#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \
+#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \
!defined(USART1_ASSIGNED)
# define TTYS7_DEV g_usart1port /* USART1 is ttyS7 */
# define USART1_ASSIGNED 1
-#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \
+#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \
!defined(USART2_ASSIGNED)
# define TTYS7_DEV g_usart2port /* USART2 is ttyS7 */
# define USART2_ASSIGNED 1
@@ -369,13 +369,13 @@ static int sam_uart3_interrupt(int irq, void *context);
#ifdef CONFIG_SAMV7_UART4
static int sam_uart4_interrupt(int irq, void *context);
#endif
-#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART)
+#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER)
static int sam_usart0_interrupt(int irq, void *context);
#endif
-#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART)
+#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER)
static int sam_usart1_interrupt(int irq, void *context);
#endif
-#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART)
+#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER)
static int sam_usart2_interrupt(int irq, void *context);
#endif
static int sam_ioctl(struct file *filep, int cmd, unsigned long arg);
@@ -432,15 +432,15 @@ static char g_uart3txbuffer[CONFIG_UART3_TXBUFSIZE];
static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE];
static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE];
#endif
-#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART)
+#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER)
static char g_usart0rxbuffer[CONFIG_USART0_RXBUFSIZE];
static char g_usart0txbuffer[CONFIG_USART0_TXBUFSIZE];
#endif
-#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART)
+#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER)
static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE];
static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE];
#endif
-#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART)
+#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER)
static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE];
static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE];
#endif
@@ -602,7 +602,7 @@ static uart_dev_t g_uart4port =
/* This describes the state of the USART0 port. */
-#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART)
+#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER)
static struct sam_dev_s g_usart0priv =
{
.usartbase = SAM_USART0_BASE,
@@ -636,7 +636,7 @@ static uart_dev_t g_usart0port =
/* This describes the state of the USART1 port. */
-#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART)
+#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER)
static struct sam_dev_s g_usart1priv =
{
.usartbase = SAM_USART1_BASE,
@@ -670,7 +670,7 @@ static uart_dev_t g_usart1port =
/* This describes the state of the USART2 port. */
-#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART)
+#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER)
static struct sam_dev_s g_usart2priv =
{
.usartbase = SAM_USART2_BASE,
@@ -1115,19 +1115,19 @@ static int sam_uart4_interrupt(int irq, void *context)
*
****************************************************************************/
-#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART)
+#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER)
static int sam_usart0_interrupt(int irq, void *context)
{
return sam_interrupt(&g_usart0port);
}
#endif
-#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART)
+#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER)
static int sam_usart1_interrupt(int irq, void *context)
{
return sam_interrupt(&g_usart1port);
}
#endif
-#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART)
+#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER)
static int sam_usart2_interrupt(int irq, void *context)
{
return sam_interrupt(&g_usart2port);
diff --git a/arch/arm/src/samv7/sam_start.c b/arch/arm/src/samv7/sam_start.c
index 9d5331721f8..0e540b0ca58 100644
--- a/arch/arm/src/samv7/sam_start.c
+++ b/arch/arm/src/samv7/sam_start.c
@@ -58,6 +58,7 @@
#include "sam_mpuinit.h"
#include "sam_userspace.h"
#include "sam_start.h"
+#include "sam_gpio.h"
/****************************************************************************
* Pre-processor Definitions
@@ -357,6 +358,7 @@ void __start(void)
sam_clockconfig();
sam_fpuconfig();
+ sam_gpioinit();
sam_lowsetup();
/* Enable/disable tightly coupled memories */
diff --git a/arch/arm/src/samv7/sam_systemreset.c b/arch/arm/src/samv7/sam_systemreset.c
new file mode 100644
index 00000000000..fbc9f19daf2
--- /dev/null
+++ b/arch/arm/src/samv7/sam_systemreset.c
@@ -0,0 +1,90 @@
+/****************************************************************************
+ * arch/arm/src/samv7/sam_systemreset.c
+ *
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ * David Sidrane
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include
+
+#include
+#include
+
+#include
+#include
+
+#include "up_arch.h"
+#include "chip/sam_rstc.h"
+
+#ifdef CONFIG_SAMV7_SYSTEMRESET
+
+/****************************************************************************
+ * Public functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_systemreset
+ *
+ * Description:
+ * Internal reset logic.
+ *
+ ****************************************************************************/
+
+void up_systemreset(void)
+{
+ uint32_t rstcr;
+#if defined(CONFIG_SAMV7_EXTRESET_ERST) && CONFIG_SAMV7_EXTRESET_ERST != 0
+ uint32_t rstmr;
+#endif
+
+ rstcr = (RSTC_CR_PROCRST | RSTC_CR_KEY);
+
+#if defined(CONFIG_SAMV7_EXTRESET_ERST) && CONFIG_SAMV7_EXTRESET_ERST != 0
+ rstcr |= RSTC_CR_EXTRST;
+
+ rstmr = getreg32(SAM_RSTC_MR);
+ rstmr &= ~RSTC_MR_ERSTL_MASK;
+ rstmr &= RSTC_MR_ERSTL(CONFIG_SAMV7_EXTRESET_ERST-1) | RSTC_MR_KEY;
+ putreg32(rstmr, SAM_RSTC_MR);
+#endif
+
+ putreg32(rstcr, SAM_RSTC_CR);
+
+ /* Wait for the reset */
+
+ for (; ; );
+}
+#endif /* CONFIG_SAMV7_SYSTEMRESET */
diff --git a/arch/arm/src/samv7/sam_tickless.c b/arch/arm/src/samv7/sam_tickless.c
index 33cbc948c1b..3d1a7ad95ac 100644
--- a/arch/arm/src/samv7/sam_tickless.c
+++ b/arch/arm/src/samv7/sam_tickless.c
@@ -363,8 +363,8 @@ int up_timer_gettime(FAR struct timespec *ts)
int up_timer_cancel(FAR struct timespec *ts)
{
- return ONESHOT_INITIALIZED(&g_tickless.oneshot) ?
- sam_oneshot_cancel(&g_tickless.oneshot, ts) :
+ return ONESHOT_INITIALIZED(&g_tickless.oneshot) && FREERUN_INITIALIZED(&g_tickless.freerun) ?
+ sam_oneshot_cancel(&g_tickless.oneshot, &g_tickless.freerun, ts) :
-EAGAIN;
}
@@ -396,7 +396,7 @@ int up_timer_cancel(FAR struct timespec *ts)
int up_timer_start(FAR const struct timespec *ts)
{
return ONESHOT_INITIALIZED(&g_tickless.oneshot) ?
- sam_oneshot_start(&g_tickless.oneshot, sam_oneshot_handler, NULL, ts) :
+ sam_oneshot_start(&g_tickless.oneshot, &g_tickless.freerun, sam_oneshot_handler, NULL, ts) :
-EAGAIN;
}
#endif /* CONFIG_SCHED_TICKLESS */
diff --git a/arch/arm/src/samv7/sam_twihs.c b/arch/arm/src/samv7/sam_twihs.c
index f11ae78cbb3..fa5a8b2a525 100644
--- a/arch/arm/src/samv7/sam_twihs.c
+++ b/arch/arm/src/samv7/sam_twihs.c
@@ -1230,6 +1230,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency)
/* Set the initial TWIHS data transfer frequency */
+ priv->frequency = 0;
twi_setfrequency(priv, frequency);
/* Enable Interrupts */
diff --git a/arch/arm/src/samv7/sam_usbdevhs.c b/arch/arm/src/samv7/sam_usbdevhs.c
index 80bf1619c59..de6872e92ee 100644
--- a/arch/arm/src/samv7/sam_usbdevhs.c
+++ b/arch/arm/src/samv7/sam_usbdevhs.c
@@ -3259,15 +3259,6 @@ static void sam_suspend(struct sam_usbdev_s *priv)
priv->prevstate = priv->devstate;
priv->devstate = USBHS_DEVSTATE_SUSPENDED;
- /* Disable clocking to the USBHS peripheral
- *
- * NOTE: The Atmel sample code disables USB clocking here (via the PMC
- * CKGR_UCKR). However, we cannot really do that here because that
- * clocking is also needed by the UHPHS host.
- */
-
- sam_usbhs_disableclk();
-
/* Let the board-specific logic know that we have entered the
* suspend state. This may trigger additional reduced power
* consumption measures.
diff --git a/arch/arm/src/samv7/sam_wdt.c b/arch/arm/src/samv7/sam_wdt.c
index 3f8e858ead3..8d638066820 100644
--- a/arch/arm/src/samv7/sam_wdt.c
+++ b/arch/arm/src/samv7/sam_wdt.c
@@ -648,7 +648,7 @@ static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
****************************************************************************/
/****************************************************************************
- * Name: up_wdginitialize
+ * Name: sam_wdt_initialize
*
* Description:
* Initialize the WDT watchdog time. The watchdog timer is initialized and
@@ -663,7 +663,7 @@ static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
*
****************************************************************************/
-int up_wdginitialize(void)
+int sam_wdt_initialize(void)
{
FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
diff --git a/arch/arm/src/samv7/sam_wdt.h b/arch/arm/src/samv7/sam_wdt.h
index d5d7c50728b..f5ee97a2479 100644
--- a/arch/arm/src/samv7/sam_wdt.h
+++ b/arch/arm/src/samv7/sam_wdt.h
@@ -66,6 +66,46 @@ extern "C"
* Public Functions
****************************************************************************/
+/****************************************************************************
+ * Name: sam_wdt_initialize()
+ *
+ * Description:
+ * Perform architecture-specific initialization of the WDT hardware.
+ * This interface should be provided by all configurations using
+ * to avoid exposed platform-dependent logic.
+ *
+ * At a minimum, this function should call watchdog_register().
+ *
+ * Input parameters:
+ * None
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int sam_wdt_initialize(void);
+
+/****************************************************************************
+ * Name: sam_rswdt_initialize()
+ *
+ * Description:
+ * Perform architecture-specific initialization of the RSWDT hardware.
+ * This interface should be provided by all configurations using
+ * to avoid exposed platform-dependent logic.
+ *
+ * At a minimum, this function should call watchdog_register().
+ *
+ * Input parameters:
+ * None
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int sam_rswdt_initialize(void);
+
#undef EXTERN
#if defined(__cplusplus)
}
diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig
index 4c4dd327c0c..1da3821f825 100644
--- a/arch/arm/src/stm32/Kconfig
+++ b/arch/arm/src/stm32/Kconfig
@@ -879,6 +879,13 @@ config ARCH_CHIP_STM32F411RE
select STM32_STM32F411
select ARCH_HAVE_FPU
+config ARCH_CHIP_STM32F411VE
+ bool "STM32F411VE"
+ select ARCH_CORTEXM4
+ select STM32_STM32F40XX
+ select STM32_STM32F411
+ select ARCH_HAVE_FPU
+
config ARCH_CHIP_STM32F405RG
bool "STM32F405RG"
select ARCH_CORTEXM4
@@ -2153,63 +2160,47 @@ config STM32_TSC
config STM32_USART1
bool "USART1"
default n
- select ARCH_HAVE_USART1
- select ARCH_HAVE_SERIAL_TERMIOS
select STM32_USART
config STM32_USART2
bool "USART2"
default n
- select ARCH_HAVE_USART2
- select ARCH_HAVE_SERIAL_TERMIOS
select STM32_USART
config STM32_USART3
bool "USART3"
default n
depends on STM32_HAVE_USART3
- select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_USART3
select STM32_USART
config STM32_UART4
bool "UART4"
default n
depends on STM32_HAVE_UART4
- select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_UART4
select STM32_USART
config STM32_UART5
bool "UART5"
default n
depends on STM32_HAVE_UART5
- select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_UART5
select STM32_USART
config STM32_USART6
bool "USART6"
default n
depends on STM32_HAVE_USART6
- select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_USART6
select STM32_USART
config STM32_UART7
bool "UART7"
default n
depends on STM32_HAVE_UART7
- select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_UART7
select STM32_USART
config STM32_UART8
bool "UART8"
default n
depends on STM32_HAVE_UART8
- select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_UART8
select STM32_USART
config STM32_USB
@@ -5407,13 +5398,39 @@ endmenu
config STM32_USART
bool
+config STM32_SERIALDRIVER
+ bool
+
+config STM32_1WIREDRIVER
+ bool
+
menu "U[S]ART Configuration"
depends on STM32_USART
+comment "U[S]ART Device Configuration"
+
+choice
+ prompt "USART1 Driver Configuration"
+ default STM32_USART1_SERIALDRIVER
+ depends on STM32_USART1
+
+config STM32_USART1_SERIALDRIVER
+ bool "Standard serial driver"
+ select USART1_SERIALDRIVER
+ select ARCH_HAVE_SERIAL_TERMIOS
+ select STM32_SERIALDRIVER
+
+config STM32_USART1_1WIREDRIVER
+ bool "1-Wire driver"
+ select STM32_1WIREDRIVER
+
+endchoice # USART1 Driver Configuration
+
+if STM32_USART1_SERIALDRIVER
+
config USART1_RS485
bool "RS-485 on USART1"
default n
- depends on STM32_USART1
---help---
Enable RS-485 interface on USART1. Your board config will have to
provide GPIO_USART1_RS485_DIR pin definition. Currently it cannot be
@@ -5431,14 +5448,34 @@ config USART1_RS485_DIR_POLARITY
config USART1_RXDMA
bool "USART1 Rx DMA"
default n
- depends on STM32_USART1 && (((STM32_STM32F10XX || STM32_STM32L15XX) && STM32_DMA1) || (!STM32_STM32F10XX && STM32_DMA2))
+ depends on (((STM32_STM32F10XX || STM32_STM32L15XX) && STM32_DMA1) || (!STM32_STM32F10XX && STM32_DMA2))
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
+endif # STM32_USART1_SERIALDRIVER
+
+choice
+ prompt "USART2 Driver Configuration"
+ default STM32_USART2_SERIALDRIVER
+ depends on STM32_USART2
+
+config STM32_USART2_SERIALDRIVER
+ bool "Standard serial driver"
+ select USART2_SERIALDRIVER
+ select ARCH_HAVE_SERIAL_TERMIOS
+ select STM32_SERIALDRIVER
+
+config STM32_USART2_1WIREDRIVER
+ bool "1-Wire driver"
+ select STM32_1WIREDRIVER
+
+endchoice # USART2 Driver Configuration
+
+if STM32_USART2_SERIALDRIVER
+
config USART2_RS485
bool "RS-485 on USART2"
default n
- depends on STM32_USART2
---help---
Enable RS-485 interface on USART2. Your board config will have to
provide GPIO_USART2_RS485_DIR pin definition. Currently it cannot be
@@ -5456,14 +5493,34 @@ config USART2_RS485_DIR_POLARITY
config USART2_RXDMA
bool "USART2 Rx DMA"
default n
- depends on STM32_USART2 && STM32_DMA1
+ depends on STM32_DMA1
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
+endif # STM32_USART2_SERIALDRIVER
+
+choice
+ prompt "USART3 Driver Configuration"
+ default STM32_USART3_SERIALDRIVER
+ depends on STM32_USART3
+
+config STM32_USART3_SERIALDRIVER
+ bool "Standard serial driver"
+ select USART3_SERIALDRIVER
+ select ARCH_HAVE_SERIAL_TERMIOS
+ select STM32_SERIALDRIVER
+
+config STM32_USART3_1WIREDRIVER
+ bool "1-Wire driver"
+ select STM32_1WIREDRIVER
+
+endchoice # USART3 Driver Configuration
+
+if STM32_USART3_SERIALDRIVER
+
config USART3_RS485
bool "RS-485 on USART3"
default n
- depends on STM32_USART3
---help---
Enable RS-485 interface on USART3. Your board config will have to
provide GPIO_USART3_RS485_DIR pin definition. Currently it cannot be
@@ -5481,14 +5538,34 @@ config USART3_RS485_DIR_POLARITY
config USART3_RXDMA
bool "USART3 Rx DMA"
default n
- depends on STM32_USART3 && STM32_DMA1
+ depends on STM32_DMA1
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
+endif # STM32_USART3_SERIALDRIVER
+
+choice
+ prompt "UART4 Driver Configuration"
+ default STM32_UART4_SERIALDRIVER
+ depends on STM32_UART4
+
+config STM32_UART4_SERIALDRIVER
+ bool "Standard serial driver"
+ select UART4_SERIALDRIVER
+ select ARCH_HAVE_SERIAL_TERMIOS
+ select STM32_SERIALDRIVER
+
+config STM32_UART4_1WIREDRIVER
+ bool "1-Wire driver"
+ select STM32_1WIREDRIVER
+
+endchoice # UART1 Driver Configuration
+
+if STM32_UART4_SERIALDRIVER
+
config UART4_RS485
bool "RS-485 on UART4"
default n
- depends on STM32_UART4
---help---
Enable RS-485 interface on UART4. Your board config will have to
provide GPIO_UART4_RS485_DIR pin definition. Currently it cannot be
@@ -5506,14 +5583,34 @@ config UART4_RS485_DIR_POLARITY
config UART4_RXDMA
bool "UART4 Rx DMA"
default n
- depends on STM32_UART4 && STM32_DMA1
+ depends on STM32_DMA1
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
+endif # STM32_UART4_SERIALDRIVER
+
+choice
+ prompt "UART5 Driver Configuration"
+ default STM32_UART5_SERIALDRIVER
+ depends on STM32_UART5
+
+config STM32_UART5_SERIALDRIVER
+ bool "Standard serial driver"
+ select UART5_SERIALDRIVER
+ select ARCH_HAVE_SERIAL_TERMIOS
+ select STM32_SERIALDRIVER
+
+config STM32_UART5_1WIREDRIVER
+ bool "1-Wire driver"
+ select STM32_1WIREDRIVER
+
+endchoice # UART5 Driver Configuration
+
+if STM32_UART5_SERIALDRIVER
+
config UART5_RS485
bool "RS-485 on UART5"
default n
- depends on STM32_UART5
---help---
Enable RS-485 interface on UART5. Your board config will have to
provide GPIO_UART5_RS485_DIR pin definition. Currently it cannot be
@@ -5531,14 +5628,34 @@ config UART5_RS485_DIR_POLARITY
config UART5_RXDMA
bool "UART5 Rx DMA"
default n
- depends on STM32_UART5 && STM32_DMA1
+ depends on STM32_DMA1
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
+endif # STM32_UART5_SERIALDRIVER
+
+choice
+ prompt "USART6 Driver Configuration"
+ default STM32_USART6_SERIALDRIVER
+ depends on STM32_USART6
+
+config STM32_USART6_SERIALDRIVER
+ bool "Standard serial driver"
+ select USART6_SERIALDRIVER
+ select ARCH_HAVE_SERIAL_TERMIOS
+ select STM32_SERIALDRIVER
+
+config STM32_USART6_1WIREDRIVER
+ bool "1-Wire driver"
+ select STM32_1WIREDRIVER
+
+endchoice # USART6 Driver Configuration
+
+if STM32_USART6_SERIALDRIVER
+
config USART6_RS485
bool "RS-485 on USART6"
default n
- depends on STM32_USART6
---help---
Enable RS-485 interface on USART6. Your board config will have to
provide GPIO_USART6_RS485_DIR pin definition. Currently it cannot be
@@ -5556,14 +5673,34 @@ config USART6_RS485_DIR_POLARITY
config USART6_RXDMA
bool "USART6 Rx DMA"
default n
- depends on STM32_USART6 && STM32_DMA2
+ depends on STM32_DMA2
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
+endif # STM32_USART6_SERIALDRIVER
+
+choice
+ prompt "UART7 Driver Configuration"
+ default STM32_UART7_SERIALDRIVER
+ depends on STM32_UART7
+
+config STM32_UART7_SERIALDRIVER
+ bool "Standard serial driver"
+ select UART7_SERIALDRIVER
+ select ARCH_HAVE_SERIAL_TERMIOS
+ select STM32_SERIALDRIVER
+
+config STM32_UART7_1WIREDRIVER
+ bool "1-Wire driver"
+ select STM32_1WIREDRIVER
+
+endchoice # UART7 Driver Configuration
+
+if STM32_UART7_SERIALDRIVER
+
config UART7_RS485
bool "RS-485 on UART7"
default n
- depends on STM32_UART7
---help---
Enable RS-485 interface on UART7. Your board config will have to
provide GPIO_UART7_RS485_DIR pin definition. Currently it cannot be
@@ -5581,14 +5718,34 @@ config UART7_RS485_DIR_POLARITY
config UART7_RXDMA
bool "UART7 Rx DMA"
default n
- depends on STM32_UART7 && STM32_DMA2
+ depends on STM32_DMA2
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
+endif # STM32_UART7_SERIALDRIVER
+
+choice
+ prompt "UART8 Driver Configuration"
+ default STM32_UART8_SERIALDRIVER
+ depends on STM32_UART7
+
+config STM32_UART8_SERIALDRIVER
+ bool "Standard serial driver"
+ select UART8_SERIALDRIVER
+ select ARCH_HAVE_SERIAL_TERMIOS
+ select STM32_SERIALDRIVER
+
+config STM32_UART8_1WIREDRIVER
+ bool "1-Wire driver"
+ select STM32_1WIREDRIVER
+
+endchoice # UART8 Driver Configuration
+
+if STM32_UART8_SERIALDRIVER
+
config UART8_RS485
bool "RS-485 on UART8"
default n
- depends on STM32_UART8
---help---
Enable RS-485 interface on UART8. Your board config will have to
provide GPIO_UART8_RS485_DIR pin definition. Currently it cannot be
@@ -5606,10 +5763,16 @@ config UART8_RS485_DIR_POLARITY
config UART8_RXDMA
bool "UART8 Rx DMA"
default n
- depends on STM32_UART8 && STM32_DMA2
+ depends on STM32_DMA2
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
+endif # STM32_UART8_SERIALDRIVER
+
+if STM32_SERIALDRIVER
+
+comment "Serial Driver Configuration"
+
config SERIAL_DISABLE_REORDERING
bool "Disable reordering of ttySx devices."
depends on STM32_USART1 || STM32_USART2 || STM32_USART3 || STM32_UART4 || STM32_UART5 || STM32_USART6 || STM32_UART7 || STM32_UART8
@@ -5634,7 +5797,25 @@ config STM32_FLOWCONTROL_BROKEN
nRTS after every byte received) Enable this setting workaround
this issue by useing software based management of RTS
-endmenu
+config STM32_USART_BREAKS
+ bool "Add TIOxSBRK to support sending Breaks"
+ depends on STM32_USART
+ default n
+ ---help---
+ Add TIOCxBRK routines to send a line break per the STM32 manual, the
+ break will be a pulse based on the value M. This is not a BSD compatible
+ break.
+
+config STM32_SERIALBRK_BSDCOMPAT
+ bool "Use GPIO To send Break"
+ depends on STM32_USART && STM32_USART_BREAKS
+ default n
+ ---help---
+ Enable using GPIO on the TX pin to send a BSD compatible break:
+ TIOCSBRK will start the break and TIOCCBRK will end the break.
+ The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
+ on because the SW starts the break and then the HW automatically clears
+ the break. This makes it is difficult to sent a long break.
config STM32_USART_SINGLEWIRE
bool "Single Wire Support"
@@ -5644,6 +5825,9 @@ config STM32_USART_SINGLEWIRE
Enable single wire UART support. The option enables support for the
TIOCSSINGLEWIRE ioctl in the STM32 serial driver.
+endif # STM32_SERIALDRIVER
+endmenu # U[S]ART Configuration
+
menu "SPI Configuration"
depends on STM32_SPI
diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs
index 64034976b5a..98c1bad6463 100644
--- a/arch/arm/src/stm32/Make.defs
+++ b/arch/arm/src/stm32/Make.defs
@@ -203,7 +203,7 @@ CHIP_CSRCS += stm32_rtc_lowerhalf.c
endif
endif
-ifeq ($(CONFIG_ADC),y)
+ifeq ($(CONFIG_STM32_ADC),y)
CHIP_CSRCS += stm32_adc.c
endif
@@ -211,6 +211,10 @@ ifeq ($(CONFIG_DAC),y)
CHIP_CSRCS += stm32_dac.c
endif
+ifeq ($(CONFIG_STM32_1WIREDRIVER),y)
+CHIP_CSRCS += stm32_1wire.c
+endif
+
ifeq ($(CONFIG_STM32_RNG),y)
CHIP_CSRCS += stm32_rng.c
endif
diff --git a/arch/arm/src/stm32/chip/stm32_can.h b/arch/arm/src/stm32/chip/stm32_can.h
index d64332d1d93..6b4a12a855e 100644
--- a/arch/arm/src/stm32/chip/stm32_can.h
+++ b/arch/arm/src/stm32/chip/stm32_can.h
@@ -75,8 +75,11 @@
#define STM32_CAN_MCR_OFFSET 0x0000 /* CAN master control register */
#define STM32_CAN_MSR_OFFSET 0x0004 /* CAN master status register */
#define STM32_CAN_TSR_OFFSET 0x0008 /* CAN transmit status register */
+
+#define STM32_CAN_RFR_OFFSET(m) (0x000c+((m)<<2))
#define STM32_CAN_RF0R_OFFSET 0x000c /* CAN receive FIFO 0 register */
#define STM32_CAN_RF1R_OFFSET 0x0010 /* CAN receive FIFO 1 register */
+
#define STM32_CAN_IER_OFFSET 0x0014 /* CAN interrupt enable register */
#define STM32_CAN_ESR_OFFSET 0x0018 /* CAN error status register */
#define STM32_CAN_BTR_OFFSET 0x001c /* CAN bit timing register */
@@ -127,8 +130,8 @@
#define STM32_CAN_FFA1R_OFFSET 0x0214 /* CAN filter FIFO assignment register */
#define STM32_CAN_FA1R_OFFSET 0x021c /* CAN filter activation register */
-/* There are 14 or 28 filter banks (depending) on the device. Each filter bank is
- * composed of two 32-bit registers, CAN_FiR:
+/* There are 14 or 28 filter banks (depending) on the device.
+ * Each filter bank is composed of two 32-bit registers, CAN_FiR:
* F0R1 Offset 0x240
* F0R2 Offset 0x244
* F1R1 Offset 0x248
@@ -445,7 +448,7 @@
/* CAN filter master register */
-#define CAN_FMR_FINIT (1 << 0) /* Bit 0: Filter Init Mode */
+#define CAN_FMR_FINIT (1 << 0) /* Bit 0: Filter Init Mode */
#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# define CAN_FMR_CAN2SB_SHIFT (8) /* Bits 13-8: CAN2 start bank */
# define CAN_FMR_CAN2SB_MASK (0x3f << CAN_FMR_CAN2SB_SHIFT)
diff --git a/arch/arm/src/stm32/chip/stm32f10xxx_vectors.h b/arch/arm/src/stm32/chip/stm32f10xxx_vectors.h
index 24822c37d3e..0af150638a0 100644
--- a/arch/arm/src/stm32/chip/stm32f10xxx_vectors.h
+++ b/arch/arm/src/stm32/chip/stm32f10xxx_vectors.h
@@ -110,7 +110,7 @@ UNUSED(STM32_IRQ_RESERVED6) /* Vector 16+49: Reserved 6 */
VECTOR(stm32_tim5, STM32_IRQ_TIM5) /* Vector 16+50: TIM5 global interrupt */
VECTOR(stm32_spi3, STM32_IRQ_SPI3) /* Vector 16+51: SPI3 global interrupt */
VECTOR(stm32_uart4, STM32_IRQ_UART4) /* Vector 16+52: USART2 global interrupt */
-VECTOR(stm32_uart5, STM32_IRQ_UART5) /* Vector 16+53: USART5 global interrupt */
+VECTOR(stm32_uart5, STM32_IRQ_UART5) /* Vector 16+53: UART5 global interrupt */
VECTOR(stm32_tim6, STM32_IRQ_TIM6) /* Vector 16+54: TIM6 global interrupt */
VECTOR(stm32_tim7, STM32_IRQ_TIM7) /* Vector 16+55: TIM7 global interrupt */
VECTOR(stm32_dma2ch1, STM32_IRQ_DMA2CH1) /* Vector 16+56: DMA2 Channel 1 global interrupt */
diff --git a/arch/arm/src/stm32/chip/stm32f20xxx_uart.h b/arch/arm/src/stm32/chip/stm32f20xxx_uart.h
index 5e5b4449de0..4da5c0af2e0 100644
--- a/arch/arm/src/stm32/chip/stm32f20xxx_uart.h
+++ b/arch/arm/src/stm32/chip/stm32f20xxx_uart.h
@@ -199,7 +199,7 @@
#define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */
#define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */
#define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */
-#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
+#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
/* Guard time and prescaler register */
diff --git a/arch/arm/src/stm32/chip/stm32f30xxx_uart.h b/arch/arm/src/stm32/chip/stm32f30xxx_uart.h
index 9a55a921a72..5593e6848ff 100644
--- a/arch/arm/src/stm32/chip/stm32f30xxx_uart.h
+++ b/arch/arm/src/stm32/chip/stm32f30xxx_uart.h
@@ -218,19 +218,19 @@
#define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */
#define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */
#define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */
-#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
-#define USART_CR1_OVRDIS (1 << 12) /* Bit 12: Overrun Disable */
-#define USART_CR1_DDRE (1 << 13) /* Bit 13: DMA Disable on Reception Error */
-#define USART_CR1_DEM (1 << 14) /* Bit 14: Driver enable mode */
-#define USART_CR1_DEP (1 << 15) /* Bit 15: Driver enable polarity selection */
-#define USART_CR1_SCARCNT_SHIFT (17) /* Bit 17-19: Smartcard auto-retry count */
-#define USART_CR1_SCARCNT_MASK (7 << USART_CR1_SCARCNT_SHIFT)
-#define USART_CR1_WUS_SHIFT (20) /* Bit 20-21: Wakeup from Stop mode interrupt */
-#define USART_CR1_WUS_MASK (3 << USART_CR1_WUS_SHIFT)
-# define USART_CR1_WUS_ADDRMAT (0 << USART_CR1_WUS_SHIFT) /* Active on address match */
-# define USART_CR1_WUS_STARTBIT (2 << USART_CR1_WUS_SHIFT) /* Active on Start bit */
-# define USART_CR1_WUS_RXNE (3 << USART_CR1_WUS_SHIFT) /* Active on RXNE */
-#define USART_CR1_WUFIE (1 << 22) /* Bit 22: Wakeup from Stop mode interrupt enable */
+#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
+#define USART_CR3_OVRDIS (1 << 12) /* Bit 12: Overrun Disable */
+#define USART_CR3_DDRE (1 << 13) /* Bit 13: DMA Disable on Reception Error */
+#define USART_CR3_DEM (1 << 14) /* Bit 14: Driver enable mode */
+#define USART_CR3_DEP (1 << 15) /* Bit 15: Driver enable polarity selection */
+#define USART_CR3_SCARCNT_SHIFT (17) /* Bit 17-19: Smartcard auto-retry count */
+#define USART_CR3_SCARCNT_MASK (7 << USART_CR3_SCARCNT_SHIFT)
+#define USART_CR3_WUS_SHIFT (20) /* Bit 20-21: Wakeup from Stop mode interrupt */
+#define USART_CR3_WUS_MASK (3 << USART_CR3_WUS_SHIFT)
+# define USART_CR3_WUS_ADDRMAT (0 << USART_CR3_WUS_SHIFT) /* Active on address match */
+# define USART_CR3_WUS_STARTBIT (2 << USART_CR3_WUS_SHIFT) /* Active on Start bit */
+# define USART_CR3_WUS_RXNE (3 << USART_CR3_WUS_SHIFT) /* Active on RXNE */
+#define USART_CR3_WUFIE (1 << 22) /* Bit 22: Wakeup from Stop mode interrupt enable */
/* Baud Rate Register */
diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
index d8fbe7346cc..c0f675aa023 100644
--- a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
+++ b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
@@ -628,7 +628,8 @@
#endif
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
- defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
+ defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) || \
+ defined(CONFIG_STM32_STM32F411)
# define GPIO_SPI4_MISO_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN5)
# define GPIO_SPI4_MISO_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN13)
# define GPIO_SPI4_MOSI_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN6)
@@ -643,7 +644,7 @@
#endif
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
- defined(CONFIG_STM32_STM32F469)
+ defined(CONFIG_STM32_STM32F469) || defined(CONFIG_STM32_STM32F411)
# define GPIO_SPI5_MISO_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN8)
# define GPIO_SPI5_MISO_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN7)
# define GPIO_SPI5_MOSI_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN9)
@@ -652,7 +653,10 @@
# define GPIO_SPI5_NSS_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN5)
# define GPIO_SPI5_SCK_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN7)
# define GPIO_SPI5_SCK_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN6)
+#endif
+#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
+ defined(CONFIG_STM32_STM32F469)
# define GPIO_SPI6_MISO (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN12)
# define GPIO_SPI6_MOSI (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN14)
# define GPIO_SPI6_NSS (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN8)
diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_rcc.h b/arch/arm/src/stm32/chip/stm32f40xxx_rcc.h
index a81f798c18b..cccbedbf505 100644
--- a/arch/arm/src/stm32/chip/stm32f40xxx_rcc.h
+++ b/arch/arm/src/stm32/chip/stm32f40xxx_rcc.h
@@ -356,7 +356,8 @@
#define RCC_APB2RSTR_SDIORST (1 << 11) /* Bit 11: SDIO reset */
#define RCC_APB2RSTR_SPI1RST (1 << 12) /* Bit 12: SPI1 reset */
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
- defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
+ defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) || \
+ defined(CONFIG_STM32_STM32F411)
# define RCC_APB2RSTR_SPI4RST (1 << 13) /* Bit 13: SPI4 reset */
#endif
#define RCC_APB2RSTR_SYSCFGRST (1 << 14) /* Bit 14: System configuration controller reset */
@@ -364,8 +365,11 @@
#define RCC_APB2RSTR_TIM10RST (1 << 17) /* Bit 17: TIM10 reset */
#define RCC_APB2RSTR_TIM11RST (1 << 18) /* Bit 18: TIM11 reset */
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
- defined(CONFIG_STM32_STM32F469)
+ defined(CONFIG_STM32_STM32F469) || defined(CONFIG_STM32_STM32F411)
# define RCC_APB2RSTR_SPI5RST (1 << 20) /* Bit 20: SPI 5 reset */
+#endif
+#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
+ defined(CONFIG_STM32_STM32F469)
# define RCC_APB2RSTR_SPI6RST (1 << 21) /* Bit 21: SPI 6 reset */
#endif
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
@@ -500,7 +504,8 @@
#define RCC_APB2ENR_SDIOEN (1 << 11) /* Bit 11: SDIO clock enable */
#define RCC_APB2ENR_SPI1EN (1 << 12) /* Bit 12: SPI1 clock enable */
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
- defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
+ defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) || \
+ defined(CONFIG_STM32_STM32F411)
# define RCC_APB2ENR_SPI4EN (1 << 13) /* Bit 13: SPI4 clock enable */
#endif
#define RCC_APB2ENR_SYSCFGEN (1 << 14) /* Bit 14: System configuration controller clock enable */
@@ -508,8 +513,11 @@
#define RCC_APB2ENR_TIM10EN (1 << 17) /* Bit 17: TIM10 clock enable */
#define RCC_APB2ENR_TIM11EN (1 << 18) /* Bit 18: TIM11 clock enable */
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
- defined(CONFIG_STM32_STM32F469)
+ defined(CONFIG_STM32_STM32F469) || defined(CONFIG_STM32_STM32F411)
# define RCC_APB2ENR_SPI5EN (1 << 20) /* Bit 20: SPI5 clock enable */
+#endif
+#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
+ defined(CONFIG_STM32_STM32F469)
# define RCC_APB2ENR_SPI6EN (1 << 21) /* Bit 21: SPI6 clock enable */
#endif
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
@@ -649,7 +657,8 @@
#define RCC_APB2LPENR_SDIOLPEN (1 << 11) /* Bit 11: SDIO clock enable during Sleep mode */
#define RCC_APB2LPENR_SPI1LPEN (1 << 12) /* Bit 12: SPI1 clock enable during Sleep mode */
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
- defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
+ defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) || \
+ defined(CONFIG_STM32_STM32F411)
# define RCC_APB2LPENR_SPI4LPEN (1 << 13) /* Bit 13: SPI4 clock enable during Sleep mode */
#endif
#define RCC_APB2LPENR_SYSCFGLPEN (1 << 14) /* Bit 14: System configuration controller clock enable during Sleep mode */
@@ -657,8 +666,11 @@
#define RCC_APB2LPENR_TIM10LPEN (1 << 17) /* Bit 17: TIM10 clock enable during Sleep mode */
#define RCC_APB2LPENR_TIM11LPEN (1 << 18) /* Bit 18: TIM11 clock enable during Sleep mode */
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
- defined(CONFIG_STM32_STM32F469)
+ defined(CONFIG_STM32_STM32F469) || defined(CONFIG_STM32_STM32F411)
# define RCC_APB2LPENR_SPI5LPEN (1 << 20) /* Bit 20: SPI5 clock enable during Sleep mode */
+#endif
+#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
+ defined(CONFIG_STM32_STM32F469)
# define RCC_APB2LPENR_SPI6LPEN (1 << 21) /* Bit 21: SPI6 clock enable during Sleep mode */
#endif
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \
diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_uart.h b/arch/arm/src/stm32/chip/stm32f40xxx_uart.h
index 824ea9515b5..9693baa5077 100644
--- a/arch/arm/src/stm32/chip/stm32f40xxx_uart.h
+++ b/arch/arm/src/stm32/chip/stm32f40xxx_uart.h
@@ -217,7 +217,7 @@
#define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */
#define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */
#define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */
-#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
+#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
/* Guard time and prescaler register */
diff --git a/arch/arm/src/stm32/chip/stm32l15xxx_uart.h b/arch/arm/src/stm32/chip/stm32l15xxx_uart.h
index dff92449335..4b85b837c76 100644
--- a/arch/arm/src/stm32/chip/stm32l15xxx_uart.h
+++ b/arch/arm/src/stm32/chip/stm32l15xxx_uart.h
@@ -191,7 +191,7 @@
#define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */
#define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */
#define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */
-#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
+#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
/* Guard time and prescaler register */
diff --git a/arch/arm/src/stm32/stm32_1wire.c b/arch/arm/src/stm32/stm32_1wire.c
new file mode 100644
index 00000000000..4c0fa6c0f77
--- /dev/null
+++ b/arch/arm/src/stm32/stm32_1wire.c
@@ -0,0 +1,1354 @@
+/****************************************************************************
+ * arch/arm/src/stm32/stm32_1wire.c
+ *
+ * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved.
+ * Author: Aleksandr Vyhovanec
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* Links:
+ * https://www.maximintegrated.com/en/app-notes/index.mvp/id/214
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include "up_arch.h"
+
+#include "stm32_rcc.h"
+#include "stm32_1wire.h"
+
+#ifdef HAVE_1WIREDRIVER
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define BUS_TIMEOUT 5 /* tv_sec */
+
+#define RESET_BAUD 9600
+#define RESET_TX 0xF0
+#define TIMESLOT_BAUD 115200
+#define READ_TX 0xFF
+#define READ_RX1 0xFF
+#define WRITE_TX0 0x00
+#define WRITE_TX1 0xFF
+
+#define PIN_OPENDRAIN(GPIO) ((GPIO) | GPIO_OPENDRAIN)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* 1-Wire bus task */
+
+enum stm32_1wire_msg_e
+{
+ ONEWIRETASK_NONE = 0,
+ ONEWIRETASK_RESET,
+ ONEWIRETASK_WRITE,
+ ONEWIRETASK_READ
+};
+
+struct stm32_1wire_msg_s
+{
+ enum stm32_1wire_msg_e task; /* Task */
+ uint8_t *buffer; /* Task buffer */
+ int buflen; /* Buffer length */
+};
+
+/* 1-Wire device hardware configuration */
+
+struct stm32_1wire_config_s
+{
+ const uint32_t usartbase; /* Base address of USART registers */
+ const uint32_t apbclock; /* PCLK 1 or 2 frequency */
+ const uint32_t data_pin; /* GPIO configuration for DATA */
+ const uint8_t irq; /* IRQ associated with this USART */
+ int (*const vector)(int irq, void *context); /* Interrupt handler */
+};
+
+/* 1-Wire device Private Data */
+
+struct stm32_1wire_priv_s
+{
+ const struct stm32_1wire_config_s *config; /* Port configuration */
+ volatile int refs; /* Referernce count */
+ sem_t sem_excl; /* Mutual exclusion semaphore */
+ sem_t sem_isr; /* Interrupt wait semaphore */
+ int baud; /* Baud rate */
+ const struct stm32_1wire_msg_s *msgs; /* Messages data */
+ uint8_t *byte; /* Current byte */
+ uint8_t bit; /* Current bit */
+ volatile int result; /* Exchange result */
+};
+
+/* 1-Wire device, Instance */
+
+struct stm32_1wire_inst_s
+{
+ const struct onewire_ops_s *ops; /* Standard 1-Wire operations */
+ struct stm32_1wire_priv_s *priv; /* Common driver private data structure */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static inline uint32_t stm32_1wire_in(struct stm32_1wire_priv_s *priv, int offset);
+static inline void stm32_1wire_out(struct stm32_1wire_priv_s *priv, int offset, uint32_t value);
+static int stm32_1wire_recv(struct stm32_1wire_priv_s *priv);
+static void stm32_1wire_send(struct stm32_1wire_priv_s *priv, int ch);
+static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv);
+static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv, bool on);
+static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv);
+static int stm32_1wire_deinit(FAR struct stm32_1wire_priv_s *priv);
+static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv);
+static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv);
+static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv);
+static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv);
+static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
+ FAR const struct stm32_1wire_msg_s *msgs, int count);
+static int stm32_1wire_isr(struct stm32_1wire_priv_s *priv);
+
+#ifdef CONFIG_STM32_USART1_1WIREDRIVER
+static int stm32_interrupt_1wire1(int irq, void *context);
+#endif
+#ifdef CONFIG_STM32_USART2_1WIREDRIVER
+static int stm32_interrupt_1wire2(int irq, void *context);
+#endif
+#ifdef CONFIG_STM32_USART3_1WIREDRIVER
+static int stm32_interrupt_1wire3(int irq, void *context);
+#endif
+#ifdef CONFIG_STM32_UART4_1WIREDRIVER
+static int stm32_interrupt_1wire4(int irq, void *context);
+#endif
+#ifdef CONFIG_STM32_UART5_1WIREDRIVER
+static int stm32_interrupt_1wire5(int irq, void *context);
+#endif
+#ifdef CONFIG_STM32_USART6_1WIREDRIVER
+static int stm32_interrupt_1wire6(int irq, void *context);
+#endif
+#ifdef CONFIG_STM32_UART7_1WIREDRIVER
+static int stm32_interrupt_1wire7(int irq, void *context);
+#endif
+#ifdef CONFIG_STM32_UART8_1WIREDRIVER
+static int stm32_interrupt_1wire8(int irq, void *context);
+#endif
+
+static int stm32_1wire_reset(FAR struct onewire_dev_s *dev);
+static int stm32_1wire_write(FAR struct onewire_dev_s *dev,
+ const uint8_t *buffer, int buflen);
+static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer,
+ int buflen);
+static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
+ const uint8_t *txbuffer, int txbuflen,
+ uint8_t *rxbuffer, int rxbuflen);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* 1-Wire device structures */
+
+#ifdef CONFIG_STM32_USART1_1WIREDRIVER
+
+static const struct stm32_1wire_config_s stm32_1wire1_config =
+{
+ .usartbase = STM32_USART1_BASE,
+ .apbclock = STM32_PCLK2_FREQUENCY,
+ .data_pin = PIN_OPENDRAIN(GPIO_USART1_TX),
+ .irq = STM32_IRQ_USART1,
+ .vector = stm32_interrupt_1wire1,
+};
+
+static struct stm32_1wire_priv_s stm32_1wire1_priv =
+{
+ .config = &stm32_1wire1_config,
+ .refs = 0,
+ .msgs = NULL
+};
+
+#endif
+
+#ifdef CONFIG_STM32_USART2_1WIREDRIVER
+
+static const struct stm32_1wire_config_s stm32_1wire2_config =
+{
+ .usartbase = STM32_USART2_BASE,
+ .apbclock = STM32_PCLK1_FREQUENCY,
+ .data_pin = PIN_OPENDRAIN(GPIO_USART2_TX),
+ .irq = STM32_IRQ_USART2,
+ .vector = stm32_interrupt_1wire2,
+};
+
+static struct stm32_1wire_priv_s stm32_1wire2_priv =
+{
+ .config = &stm32_1wire2_config,
+ .refs = 0,
+ .msgs = NULL
+};
+
+#endif
+
+#ifdef CONFIG_STM32_USART3_1WIREDRIVER
+
+static const struct stm32_1wire_config_s stm32_1wire3_config =
+{
+ .usartbase = STM32_USART3_BASE,
+ .apbclock = STM32_PCLK1_FREQUENCY,
+ .data_pin = PIN_OPENDRAIN(GPIO_USART3_TX),
+ .irq = STM32_IRQ_USART3,
+ .vector = stm32_interrupt_1wire3,
+};
+
+static struct stm32_1wire_priv_s stm32_1wire3_priv =
+{
+ .config = &stm32_1wire3_config,
+ .refs = 0,
+ .msgs = NULL
+};
+
+#endif
+
+#ifdef CONFIG_STM32_UART4_1WIREDRIVER
+
+static const struct stm32_1wire_config_s stm32_1wire4_config =
+{
+ .usartbase = STM32_UART4_BASE,
+ .apbclock = STM32_PCLK1_FREQUENCY,
+ .data_pin = PIN_OPENDRAIN(GPIO_UART4_TX),
+ .irq = STM32_IRQ_UART4,
+ .vector = stm32_interrupt_1wire4,
+};
+
+static struct stm32_1wire_priv_s stm32_1wire4_priv =
+{
+ .config = &stm32_1wire4_config,
+ .refs = 0,
+ .msgs = NULL
+};
+
+#endif
+
+#ifdef CONFIG_STM32_UART5_1WIREDRIVER
+
+static const struct stm32_1wire_config_s stm32_1wire5_config =
+{
+ .usartbase = STM32_UART5_BASE,
+ .apbclock = STM32_PCLK1_FREQUENCY,
+ .data_pin = PIN_OPENDRAIN(GPIO_UART5_TX),
+ .irq = STM32_IRQ_UART5,
+ .vector = stm32_interrupt_1wire5,
+};
+
+static struct stm32_1wire_priv_s stm32_1wire5_priv =
+{
+ .config = &stm32_1wire5_config,
+ .refs = 0,
+ .msgs = NULL
+};
+
+#endif
+
+#ifdef CONFIG_STM32_USART6_1WIREDRIVER
+
+static const struct stm32_1wire_config_s stm32_1wire6_config =
+{
+ .usartbase = STM32_USART6_BASE,
+ .apbclock = STM32_PCLK2_FREQUENCY,
+ .data_pin = PIN_OPENDRAIN(GPIO_USART6_TX),
+ .irq = STM32_IRQ_USART6,
+ .vector = stm32_interrupt_1wire6,
+};
+
+static struct stm32_1wire_priv_s stm32_1wire6_priv =
+{
+ .config = &stm32_1wire6_config,
+ .refs = 0,
+ .msgs = NULL
+};
+
+#endif
+
+#ifdef CONFIG_STM32_UART7_1WIREDRIVER
+
+static const struct stm32_1wire_config_s stm32_1wire7_config =
+{
+ .usartbase = STM32_UART7_BASE,
+ .apbclock = STM32_PCLK1_FREQUENCY,
+ .data_pin = PIN_OPENDRAIN(GPIO_UART7_TX),
+ .irq = STM32_IRQ_UART7,
+ .vector = stm32_interrupt_1wire7,
+};
+
+static struct stm32_1wire_priv_s stm32_1wire7_priv =
+{
+ .config = &stm32_1wire7_config,
+ .refs = 0,
+ .msgs = NULL
+};
+
+#endif
+
+#ifdef CONFIG_STM32_UART8_1WIREDRIVER
+
+static const struct stm32_1wire_config_s stm32_1wire8_config =
+{
+ .usartbase = STM32_UART8_BASE,
+ .apbclock = STM32_PCLK1_FREQUENCY,
+ .data_pin = PIN_OPENDRAIN(GPIO_UART8_TX),
+ .irq = STM32_IRQ_UART8,
+ .vector = stm32_interrupt_1wire8,
+};
+
+static struct stm32_1wire_priv_s stm32_1wire8_priv =
+{
+ .config = &stm32_1wire8_config,
+ .refs = 0,
+ .msgs = NULL
+};
+
+#endif
+
+/* Device Structures, Instantiation */
+
+static const struct onewire_ops_s stm32_1wire_ops =
+{
+ .reset = stm32_1wire_reset,
+ .write = stm32_1wire_write,
+ .read = stm32_1wire_read,
+ .exchange = stm32_1wire_exchange
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_1wire_in
+ ****************************************************************************/
+
+static inline uint32_t stm32_1wire_in(struct stm32_1wire_priv_s *priv,
+ int offset)
+{
+ return getreg32(priv->config->usartbase + offset);
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_out
+ ****************************************************************************/
+
+static inline void stm32_1wire_out(struct stm32_1wire_priv_s *priv,
+ int offset, uint32_t value)
+{
+ putreg32(value, priv->config->usartbase + offset);
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_recv
+ *
+ * Description:
+ * This method will recv one byte on the USART
+ *
+ ****************************************************************************/
+
+static int stm32_1wire_recv(struct stm32_1wire_priv_s *priv)
+{
+ return stm32_1wire_in(priv, STM32_USART_RDR_OFFSET) & 0xff;
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_send
+ *
+ * Description:
+ * This method will send one byte on the USART
+ *
+ ****************************************************************************/
+
+static void stm32_1wire_send(struct stm32_1wire_priv_s *priv, int ch)
+{
+ stm32_1wire_out(priv, STM32_USART_TDR_OFFSET, (uint32_t)(ch & 0xff));
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_set_baud
+ *
+ * Description:
+ * Set the serial line baud.
+ *
+ ****************************************************************************/
+
+static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
+{
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+ /* This first implementation is for U[S]ARTs that support oversampling
+ * by 8 in additional to the standard oversampling by 16.
+ */
+
+ uint32_t usartdiv8;
+ uint32_t cr1;
+ uint32_t brr;
+
+ /* In case of oversampling by 8, the equation is:
+ *
+ * baud = 2 * fCK / usartdiv8
+ * usartdiv8 = 2 * fCK / baud
+ */
+
+ usartdiv8 = ((priv->config->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
+
+ /* Baud rate for standard USART (SPI mode included):
+ *
+ * In case of oversampling by 16, the equation is:
+ * baud = fCK / usartdiv16
+ * usartdiv16 = fCK / baud
+ * = 2 * usartdiv8
+ */
+
+ /* Use oversamply by 8 only if the divisor is small. But what is small? */
+
+ cr1 = stm32_1wire_in(priv, STM32_USART_CR1_OFFSET);
+ if (usartdiv8 > 100)
+ {
+ /* Use usartdiv16 */
+
+ brr = (usartdiv8 + 1) >> 1;
+
+ /* Clear oversampling by 8 to enable oversampling by 16 */
+
+ cr1 &= ~USART_CR1_OVER8;
+ }
+ else
+ {
+ DEBUGASSERT(usartdiv8 >= 8);
+
+ /* Perform mysterious operations on bits 0-3 */
+
+ brr = ((usartdiv8 & 0xfff0) | ((usartdiv8 & 0x000f) >> 1));
+
+ /* Set oversampling by 8 */
+
+ cr1 |= USART_CR1_OVER8;
+ }
+
+ stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, cr1);
+ stm32_1wire_out(priv, STM32_USART_BRR_OFFSET, brr);
+
+#else
+
+ /* This second implementation is for U[S]ARTs that support fractional
+ * dividers.
+ */
+
+ uint32_t usartdiv32;
+ uint32_t mantissa;
+ uint32_t fraction;
+ uint32_t brr;
+
+ /* Configure the USART Baud Rate. The baud rate for the receiver and
+ * transmitter (Rx and Tx) are both set to the same value as programmed
+ * in the Mantissa and Fraction values of USARTDIV.
+ *
+ * baud = fCK / (16 * usartdiv)
+ * usartdiv = fCK / (16 * baud)
+ *
+ * Where fCK is the input clock to the peripheral (PCLK1 for USART2, 3, 4, 5
+ * or PCLK2 for USART1)
+ *
+ * First calculate (NOTE: all stand baud values are even so dividing by two
+ * does not lose precision):
+ *
+ * usartdiv32 = 32 * usartdiv = fCK / (baud/2)
+ */
+
+ usartdiv32 = priv->config->apbclock / (priv->baud >> 1);
+
+ /* The mantissa part is then */
+
+ mantissa = usartdiv32 >> 5;
+ brr = mantissa << USART_BRR_MANT_SHIFT;
+
+ /* The fractional remainder (with rounding) */
+
+ fraction = (usartdiv32 - (mantissa << 5) + 1) >> 1;
+ brr |= fraction << USART_BRR_FRAC_SHIFT;
+ stm32_1wire_out(priv, STM32_USART_BRR_OFFSET, brr);
+#endif
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_set_apb_clock
+ *
+ * Description:
+ * Enable or disable APB clock for the USART peripheral
+ *
+ * Input parameters:
+ * priv - A reference to the 1-Wire driver state structure
+ * on - Enable clock if 'on' is 'true' and disable if 'false'
+ *
+ ****************************************************************************/
+
+static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv,
+ bool on)
+{
+ const struct stm32_1wire_config_s *config = priv->config;
+ uint32_t rcc_en;
+ uint32_t regaddr;
+
+ /* Determine which USART to configure */
+
+ switch (config->usartbase)
+ {
+ default:
+ return;
+
+#ifdef CONFIG_STM32_USART1_1WIREDRIVER
+ case STM32_USART1_BASE:
+ rcc_en = RCC_APB2ENR_USART1EN;
+ regaddr = STM32_RCC_APB2ENR;
+ break;
+#endif
+#ifdef CONFIG_STM32_USART2_1WIREDRIVER
+ case STM32_USART2_BASE:
+ rcc_en = RCC_APB1ENR_USART2EN;
+ regaddr = STM32_RCC_APB1ENR;
+ break;
+#endif
+#ifdef CONFIG_STM32_USART3_1WIREDRIVER
+ case STM32_USART3_BASE:
+ rcc_en = RCC_APB1ENR_USART3EN;
+ regaddr = STM32_RCC_APB1ENR;
+ break;
+#endif
+#ifdef CONFIG_STM32_UART4
+ case STM32_UART4_BASE:
+ rcc_en = RCC_APB1ENR_UART4EN;
+ regaddr = STM32_RCC_APB1ENR;
+ break;
+#endif
+#ifdef CONFIG_STM32_UART5
+ case STM32_UART5_BASE:
+ rcc_en = RCC_APB1ENR_UART5EN;
+ regaddr = STM32_RCC_APB1ENR;
+ break;
+#endif
+#ifdef CONFIG_STM32_USART6_1WIREDRIVER
+ case STM32_USART6_BASE:
+ rcc_en = RCC_APB2ENR_USART6EN;
+ regaddr = STM32_RCC_APB2ENR;
+ break;
+#endif
+#ifdef CONFIG_STM32_UART7
+ case STM32_UART7_BASE:
+ rcc_en = RCC_APB1ENR_UART7EN;
+ regaddr = STM32_RCC_APB1ENR;
+ break;
+#endif
+#ifdef CONFIG_STM32_UART8
+ case STM32_UART8_BASE:
+ rcc_en = RCC_APB1ENR_UART8EN;
+ regaddr = STM32_RCC_APB1ENR;
+ break;
+#endif
+ }
+
+ /* Enable/disable APB 1/2 clock for USART */
+
+ if (on)
+ {
+ modifyreg32(regaddr, 0, rcc_en);
+ }
+ else
+ {
+ modifyreg32(regaddr, rcc_en, 0);
+ }
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_init
+ *
+ * Description:
+ * Setup the 1-Wire hardware, ready for operation with defaults
+ *
+ ****************************************************************************/
+
+static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
+{
+ const struct stm32_1wire_config_s *config = priv->config;
+ uint32_t regval;
+ int ret;
+
+ /* Enable USART APB1/2 clock */
+
+ stm32_1wire_set_apb_clock(priv, true);
+
+ /* Configure CR2 */
+ /* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */
+ /* Set LBDIE */
+
+ regval = stm32_1wire_in(priv, STM32_USART_CR2_OFFSET);
+ regval &= ~(USART_CR2_STOP_MASK | USART_CR2_CLKEN | USART_CR2_CPOL |
+ USART_CR2_CPHA | USART_CR2_LBCL | USART_CR2_LBDIE);
+ regval |= USART_CR2_LBDIE;
+ stm32_1wire_out(priv, STM32_USART_CR2_OFFSET, regval);
+
+ /* Configure CR1 */
+ /* Clear TE, REm, all interrupt enable bits, PCE, PS and M */
+ /* Set RXNEIE */
+
+ regval = stm32_1wire_in(priv, STM32_USART_CR1_OFFSET);
+ regval &= ~(USART_CR1_TE | USART_CR1_RE | USART_CR1_ALLINTS |
+ USART_CR1_PCE | USART_CR1_PS | USART_CR1_M);
+ regval |= USART_CR1_RXNEIE;
+ stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, regval);
+
+ /* Configure CR3 */
+ /* Clear CTSE, RTSE, and all interrupt enable bits */
+ /* Set ONEBIT, HDSEL and EIE */
+
+ regval = stm32_1wire_in(priv, STM32_USART_CR3_OFFSET);
+ regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE);
+ regval |= (USART_CR3_ONEBIT | USART_CR3_HDSEL | USART_CR3_EIE);
+ stm32_1wire_out(priv, STM32_USART_CR3_OFFSET, regval);
+
+ /* Set baud rate */
+
+ priv->baud = RESET_BAUD;
+ stm32_1wire_set_baud(priv);
+
+ /* Enable Rx, Tx, and the USART */
+
+ regval = stm32_1wire_in(priv, STM32_USART_CR1_OFFSET);
+ regval |= (USART_CR1_UE | USART_CR1_TE | USART_CR1_RE);
+ stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, regval);
+
+ /* Configure pins for USART use */
+
+ stm32_configgpio(config->data_pin);
+
+ ret = irq_attach(config->irq, config->vector);
+ if (ret == OK)
+ {
+ up_enable_irq(config->irq);
+ }
+
+ return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_deinit
+ *
+ * Description:
+ * Shutdown the 1-Wire hardware
+ *
+ ****************************************************************************/
+
+static int stm32_1wire_deinit(FAR struct stm32_1wire_priv_s *priv)
+{
+ const struct stm32_1wire_config_s *config = priv->config;
+ uint32_t regval;
+
+ up_disable_irq(config->irq);
+ irq_detach(config->irq);
+
+ /* Unconfigure GPIO pins */
+
+ stm32_unconfiggpio(config->data_pin);
+
+ /* Disable RXNEIE, Rx, Tx, and the USART */
+
+ regval = stm32_1wire_in(priv, STM32_USART_CR1_OFFSET);
+ regval &= ~(USART_CR1_UE | USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE);
+ stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, regval);
+
+ /* Clear LBDIE */
+
+ regval = stm32_1wire_in(priv, STM32_USART_CR2_OFFSET);
+ regval &= ~USART_CR2_LBDIE;
+ stm32_1wire_out(priv, STM32_USART_CR2_OFFSET, regval);
+
+ /* Clear ONEBIT, HDSEL and EIE */
+
+ regval = stm32_1wire_in(priv, STM32_USART_CR3_OFFSET);
+ regval &= ~(USART_CR3_ONEBIT | USART_CR3_HDSEL | USART_CR3_EIE);
+ stm32_1wire_out(priv, STM32_USART_CR3_OFFSET, regval);
+
+ /* Disable USART APB1/2 clock */
+
+ stm32_1wire_set_apb_clock(priv, false);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_sem_init
+ *
+ * Description:
+ * Initialize semaphores
+ *
+ ****************************************************************************/
+
+static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv)
+{
+ sem_init(&priv->sem_excl, 0, 1);
+ sem_init(&priv->sem_isr, 0, 0);
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_sem_destroy
+ *
+ * Description:
+ * Destroy semaphores.
+ *
+ ****************************************************************************/
+
+static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv)
+{
+ sem_destroy(&priv->sem_excl);
+ sem_destroy(&priv->sem_isr);
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_sem_wait
+ *
+ * Description:
+ * Take the exclusive access, waiting as necessary
+ *
+ ****************************************************************************/
+
+static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv)
+{
+ while (sem_wait(&priv->sem_excl) != 0)
+ {
+ ASSERT(errno == EINTR);
+ }
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_sem_post
+ *
+ * Description:
+ * Release the mutual exclusion semaphore
+ *
+ ****************************************************************************/
+
+static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv)
+{
+ sem_post(&priv->sem_excl);
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_exec
+ *
+ * Description:
+ * Execute 1-Wire task
+ ****************************************************************************/
+static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
+ FAR const struct stm32_1wire_msg_s *msgs,
+ int count)
+{
+ irqstate_t irqs;
+ struct timespec abstime;
+ int indx;
+ int ret;
+
+ /* Lock out other clients */
+
+ stm32_1wire_sem_wait(priv);
+
+ priv->result = ERROR;
+
+ for (indx = 0; indx < count; indx++)
+ {
+ switch (msgs[indx].task)
+ {
+ case ONEWIRETASK_NONE:
+ priv->result = OK;
+ break;
+
+ case ONEWIRETASK_RESET:
+ /* Set baud rate */
+
+ priv->baud = RESET_BAUD;
+ stm32_1wire_set_baud(priv);
+
+ /* Atomic */
+
+ irqs = enter_critical_section();
+ priv->msgs = &msgs[indx];
+ stm32_1wire_send(priv, RESET_TX);
+ leave_critical_section(irqs);
+
+ /* Wait */
+
+ clock_gettime(CLOCK_REALTIME, &abstime);
+ abstime.tv_sec += BUS_TIMEOUT;
+ sem_timedwait(&priv->sem_isr, &abstime); /* break on timeout if TX line closed to GND */
+ break;
+
+ case ONEWIRETASK_WRITE:
+ /* Set baud rate */
+
+ priv->baud = TIMESLOT_BAUD;
+ stm32_1wire_set_baud(priv);
+
+ /* Atomic */
+
+ irqs = enter_critical_section();
+ priv->msgs = &msgs[indx];
+ priv->byte = priv->msgs->buffer;
+ priv->bit = 0;
+ stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
+ leave_critical_section(irqs);
+
+ /* Wait */
+
+ clock_gettime(CLOCK_REALTIME, &abstime);
+ abstime.tv_sec += BUS_TIMEOUT;
+ sem_timedwait(&priv->sem_isr, &abstime); /* break on timeout if TX line closed to GND */
+ break;
+
+ case ONEWIRETASK_READ:
+ /* Set baud rate */
+
+ priv->baud = TIMESLOT_BAUD;
+ stm32_1wire_set_baud(priv);
+
+ /* Atomic */
+
+ irqs = enter_critical_section();
+ priv->msgs = &msgs[indx];
+ priv->byte = priv->msgs->buffer;
+ priv->bit = 0;
+ stm32_1wire_send(priv, READ_TX);
+ leave_critical_section(irqs);
+
+ /* Wait */
+
+ clock_gettime(CLOCK_REALTIME, &abstime);
+ abstime.tv_sec += BUS_TIMEOUT;
+ sem_timedwait(&priv->sem_isr, &abstime); /* break on timeout if TX line closed to GND */
+ break;
+ }
+
+ if (priv->result != OK) /* break if error */
+ {
+ break;
+ }
+ }
+
+ /* Atomic */
+
+ irqs = enter_critical_section();
+ priv->msgs = NULL;
+ ret = priv->result;
+ leave_critical_section(irqs);
+
+ /* Release the port for re-use by other clients */
+
+ stm32_1wire_sem_post(priv);
+
+ return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_isr
+ *
+ * Description:
+ * Common Interrupt Service Routine
+ ****************************************************************************/
+
+static int stm32_1wire_isr(struct stm32_1wire_priv_s *priv)
+{
+ uint32_t sr, dr;
+
+ /* Get the masked USART status word. */
+
+ sr = stm32_1wire_in(priv, STM32_USART_SR_OFFSET);
+
+ /* Receive loop */
+
+ if ((sr & USART_SR_RXNE) != 0)
+ {
+ dr = stm32_1wire_recv(priv);
+
+ if (priv->msgs != NULL)
+ {
+ switch (priv->msgs->task)
+ {
+ case ONEWIRETASK_NONE:
+ break;
+
+ case ONEWIRETASK_RESET:
+ priv->msgs = NULL;
+ priv->result = (dr != RESET_TX) ? OK : -ENODEV; /* if read RESET_TX then no slave */
+ sem_post(&priv->sem_isr);
+ break;
+
+ case ONEWIRETASK_WRITE:
+ if (++priv->bit >= 8)
+ {
+ priv->bit = 0;
+ if (++priv->byte >= (priv->msgs->buffer + priv->msgs->buflen)) /* Done? */
+ {
+ priv->msgs = NULL;
+ priv->result = OK;
+ sem_post(&priv->sem_isr);
+ break;
+ }
+ }
+
+ /* Send next bit */
+
+ stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
+ break;
+
+ case ONEWIRETASK_READ:
+ if (dr == READ_RX1)
+ {
+ *priv->byte |= (1 << priv->bit);
+ }
+ else
+ {
+ *priv->byte &= ~(1 << priv->bit);
+ }
+
+ if (++priv->bit >= 8)
+ {
+ priv->bit = 0;
+ if (++priv->byte >= (priv->msgs->buffer + priv->msgs->buflen)) /* Done? */
+ {
+ priv->msgs = NULL;
+ priv->result = OK;
+ sem_post(&priv->sem_isr);
+ break;
+ }
+ }
+
+ /* Recv next bit */
+
+ stm32_1wire_send(priv, READ_TX);
+ break;
+ }
+ }
+ }
+
+ /* Bounce check. */
+
+ if ((sr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE)) != 0)
+ {
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+ /* These errors are cleared by writing the corresponding bit to the
+ * interrupt clear register (ICR).
+ */
+
+ stm32_1wire_out(priv, STM32_USART_ICR_OFFSET,
+ (USART_ICR_NCF | USART_ICR_ORECF | USART_ICR_FECF));
+#else
+ /* If an error occurs, read from DR to clear the error (data has
+ * been lost). If ORE is set along with RXNE then it tells you
+ * that the byte *after* the one in the data register has been
+ * lost, but the data register value is correct. That case will
+ * be handled above if interrupts are enabled. Otherwise, that
+ * good byte will be lost.
+ */
+
+ (void)stm32_1wire_recv(priv);
+#endif
+
+ if (priv->msgs != NULL)
+ {
+ priv->msgs = NULL;
+ priv->result = ERROR;
+ sem_post(&priv->sem_isr);
+ }
+ }
+
+ /* Bounce check. LIN break detection */
+
+ if ((sr & USART_SR_LBD) != 0)
+ {
+ sr &= ~USART_SR_LBD;
+ stm32_1wire_out(priv, STM32_USART_SR_OFFSET, sr);
+
+ if (priv->msgs != NULL)
+ {
+ priv->msgs = NULL;
+ priv->result = ERROR;
+ sem_post(&priv->sem_isr);
+ }
+ }
+
+ return OK;
+}
+
+#ifdef CONFIG_STM32_USART1_1WIREDRIVER
+static int stm32_interrupt_1wire1(int irq, void *context)
+{
+ return stm32_1wire_isr(&stm32_1wire1_priv);
+}
+#endif
+#ifdef CONFIG_STM32_USART2_1WIREDRIVER
+static int stm32_interrupt_1wire2(int irq, void *context)
+{
+ return stm32_1wire_isr(&stm32_1wire2_priv);
+}
+#endif
+#ifdef CONFIG_STM32_USART3_1WIREDRIVER
+static int stm32_interrupt_1wire3(int irq, void *context)
+{
+ return stm32_1wire_isr(&stm32_1wire3_priv);
+}
+#endif
+#ifdef CONFIG_STM32_UART4_1WIREDRIVER
+static int stm32_interrupt_1wire4(int irq, void *context)
+{
+ return stm32_1wire_isr(&stm32_1wire4_priv);
+}
+#endif
+#ifdef CONFIG_STM32_UART5_1WIREDRIVER
+static int stm32_interrupt_1wire5(int irq, void *context)
+{
+ return stm32_1wire_isr(&stm32_1wire5_priv);
+}
+#endif
+#ifdef CONFIG_STM32_USART6_1WIREDRIVER
+static int stm32_interrupt_1wire6(int irq, void *context)
+{
+ return stm32_1wire_isr(&stm32_1wire6_priv);
+}
+#endif
+#ifdef CONFIG_STM32_UART7_1WIREDRIVER
+static int stm32_interrupt_1wire7(int irq, void *context)
+{
+ return stm32_1wire_isr(&stm32_1wire7_priv);
+}
+#endif
+#ifdef CONFIG_STM32_UART8_1WIREDRIVER
+static int stm32_interrupt_1wire8(int irq, void *context)
+{
+ return stm32_1wire_isr(&stm32_1wire8_priv);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_1wire_reset
+ *
+ * Description:
+ * 1-Wire reset pulse and presence detect.
+ *
+ ****************************************************************************/
+
+static int stm32_1wire_reset(FAR struct onewire_dev_s *dev)
+{
+ struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
+ const struct stm32_1wire_msg_s msgs[1] =
+ {
+ [0].task = ONEWIRETASK_RESET
+ };
+
+ return stm32_1wire_process(priv, msgs, 1);
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_write
+ *
+ * Description:
+ * Write 1-Wire data
+ *
+ ****************************************************************************/
+
+static int stm32_1wire_write(FAR struct onewire_dev_s *dev, const uint8_t *buffer,
+ int buflen)
+{
+ struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
+ const struct stm32_1wire_msg_s msgs[1] =
+ {
+ [0].task = ONEWIRETASK_WRITE,
+ [0].buffer = (uint8_t *)buffer,
+ [0].buflen = buflen
+ };
+
+ return stm32_1wire_process(priv, msgs, 1);
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_read
+ *
+ * Description:
+ * Read 1-Wire data
+ *
+ ****************************************************************************/
+
+static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, int buflen)
+{
+ struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
+ const struct stm32_1wire_msg_s msgs[1] =
+ {
+ [0].task = ONEWIRETASK_READ,
+ [0].buffer = buffer,
+ [0].buflen = buflen
+ };
+
+ return stm32_1wire_process(priv, msgs, 1);
+}
+
+/****************************************************************************
+ * Name: stm32_1wire_exchange
+ *
+ * Description:
+ * 1-Wire reset pulse and presence detect,
+ * Write 1-Wire data,
+ * Read 1-Wire data
+ *
+ ****************************************************************************/
+
+static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
+ const uint8_t *txbuffer, int txbuflen,
+ uint8_t *rxbuffer, int rxbuflen)
+
+{
+ int result = ERROR;
+ struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
+
+ if (reset)
+ {
+ const struct stm32_1wire_msg_s msgs[3] =
+ {
+ [0].task = ONEWIRETASK_RESET,
+
+ [1].task = ONEWIRETASK_WRITE,
+ [1].buffer = (uint8_t *)txbuffer,
+ [1].buflen = txbuflen,
+
+ [2].task = ONEWIRETASK_READ,
+ [2].buffer = rxbuffer,
+ [2].buflen = rxbuflen
+ };
+
+ result = stm32_1wire_process(priv, msgs, 3);
+ }
+ else
+ {
+ const struct stm32_1wire_msg_s msgs[2] =
+ {
+ [0].task = ONEWIRETASK_WRITE,
+ [0].buffer = (uint8_t *)txbuffer,
+ [0].buflen = txbuflen,
+
+ [1].task = ONEWIRETASK_READ,
+ [1].buffer = rxbuffer,
+ [1].buflen = rxbuflen
+ };
+
+ result = stm32_1wire_process(priv, msgs, 2);
+ }
+ return result;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_1wireinitialize
+ *
+ * Description:
+ * Initialize the selected 1-Wire port. And return a unique instance of struct
+ * struct onewire_dev_s. This function may be called to obtain multiple
+ * instances of the interface, each of which may be set up with a
+ * different frequency and slave address.
+ *
+ * Input Parameter:
+ * Port number (for hardware that has multiple 1-Wire interfaces)
+ *
+ * Returned Value:
+ * Valid 1-Wire device structure reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+FAR struct onewire_dev_s *stm32_1wireinitialize(int port)
+{
+ struct stm32_1wire_priv_s *priv = NULL; /* Private data of device with multiple instances */
+ struct stm32_1wire_inst_s *inst = NULL; /* Device, single instance */
+ int irqs;
+
+ /* Get 1-Wire private structure */
+
+ switch (port)
+ {
+#ifdef CONFIG_STM32_USART1_1WIREDRIVER
+ case 1:
+ priv = &stm32_1wire1_priv;
+ break;
+#endif
+#ifdef CONFIG_STM32_USART2_1WIREDRIVER
+ case 2:
+ priv = &stm32_1wire2_priv;
+ break;
+#endif
+#ifdef CONFIG_STM32_USART3_1WIREDRIVER
+ case 3:
+ priv = &stm32_1wire3_priv;
+ break;
+#endif
+#ifdef CONFIG_STM32_UART4_1WIREDRIVER
+ case 4:
+ priv = &stm32_1wire4_priv;
+ break;
+#endif
+#ifdef CONFIG_STM32_UART5_1WIREDRIVER
+ case 5:
+ priv = &stm32_1wire5_priv;
+ break;
+#endif
+#ifdef CONFIG_STM32_USART6_1WIREDRIVER
+ case 6:
+ priv = &stm32_1wire6_priv;
+ break;
+#endif
+#ifdef CONFIG_STM32_UART7_1WIREDRIVER
+ case 7:
+ priv = &stm32_1wire7_priv;
+ break;
+#endif
+#ifdef CONFIG_STM32_UART8_1WIREDRIVER
+ case 8:
+ priv = &stm32_1wire8_priv;
+ break;
+#endif
+ default:
+ return NULL;
+ }
+
+ /* Allocate instance */
+
+ if (!(inst = kmm_malloc(sizeof(struct stm32_1wire_inst_s))))
+ {
+ return NULL;
+ }
+
+ /* Initialize instance */
+
+ inst->ops = &stm32_1wire_ops;
+ inst->priv = priv;
+
+ /* Initialize private data for the first time, increment reference count,
+ * power-up hardware and configure GPIOs.
+ */
+
+ irqs = enter_critical_section();
+
+ if (priv->refs++ == 0)
+ {
+ stm32_1wire_sem_init(priv);
+ stm32_1wire_init(priv);
+ }
+
+ leave_critical_section(irqs);
+ return (struct onewire_dev_s *)inst;
+}
+
+/****************************************************************************
+ * Name: stm32_1wireuninitialize
+ *
+ * Description:
+ * De-initialize the selected 1-Wire port, and power down the device.
+ *
+ * Input Parameter:
+ * Device structure as returned by the stm32_1wireinitialize()
+ *
+ * Returned Value:
+ * OK on success, ERROR when internal reference count mismatch or dev
+ * points to invalid hardware device.
+ *
+ ****************************************************************************/
+
+int stm32_1wireuninitialize(FAR struct onewire_dev_s *dev)
+{
+ struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
+ int irqs;
+
+ ASSERT(dev);
+
+ /* Decrement reference count and check for underflow */
+
+ if (priv->refs == 0)
+ {
+ return ERROR;
+ }
+
+ irqs = enter_critical_section();
+
+ if (--priv->refs)
+ {
+ leave_critical_section(irqs);
+ kmm_free(priv);
+ return OK;
+ }
+
+ leave_critical_section(irqs);
+
+ /* Disable power and other HW resource (GPIO's) */
+
+ stm32_1wire_deinit(priv);
+
+ /* Release unused resources */
+
+ stm32_1wire_sem_destroy(priv);
+
+ /* Free instance */
+
+ kmm_free(dev);
+ return OK;
+}
+
+#endif /* HAVE_1WIREDRIVER */
diff --git a/arch/arm/src/stm32/stm32_1wire.h b/arch/arm/src/stm32/stm32_1wire.h
new file mode 100644
index 00000000000..24cfe45592f
--- /dev/null
+++ b/arch/arm/src/stm32/stm32_1wire.h
@@ -0,0 +1,87 @@
+/************************************************************************************
+ * arch/arm/src/stm32/stm32_1wire.h
+ *
+ * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved.
+ * Author: Aleksandr Vyhovanec
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_STM32_1WIRE_H
+#define __ARCH_ARM_SRC_STM32_STM32_1WIRE_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include
+
+#include "stm32_uart.h"
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_1wireinitialize
+ *
+ * Description:
+ * Initialize the selected 1-Wire port. And return a unique instance of struct
+ * struct onewire_dev_s. This function may be called to obtain multiple
+ * instances of the interface, each of which may be set up with a
+ * different frequency and slave address.
+ *
+ * Input Parameter:
+ * Port number (for hardware that has multiple 1-Wire interfaces)
+ *
+ * Returned Value:
+ * Valid 1-Wire device structure reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+FAR struct onewire_dev_s *stm32_1wireinitialize(int port);
+
+/****************************************************************************
+ * Name: stm32_1wireuninitialize
+ *
+ * Description:
+ * De-initialize the selected 1-Wire port, and power down the device.
+ *
+ * Input Parameter:
+ * Device structure as returned by the stm32_1wireinitialize()
+ *
+ * Returned Value:
+ * OK on success, ERROR when internal reference count mismatch or dev
+ * points to invalid hardware device.
+ *
+ ****************************************************************************/
+
+int stm32_1wireuninitialize(FAR struct onewire_dev_s *dev);
+
+#endif /* __ARCH_ARM_SRC_STM32_STM32_1WIRE_H */
diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c
index a2d97cf51cd..c24a98dbc75 100644
--- a/arch/arm/src/stm32/stm32_adc.c
+++ b/arch/arm/src/stm32/stm32_adc.c
@@ -69,7 +69,7 @@
/* ADC "upper half" support must be enabled */
-#ifdef CONFIG_ADC
+#ifdef CONFIG_STM32_ADC
/* Some ADC peripheral must be enabled */
@@ -272,6 +272,7 @@
struct stm32_dev_s
{
+ FAR const struct adc_callback_s *cb;
uint8_t irq; /* Interrupt generated by this ADC block */
uint8_t nchannels; /* Number of channels */
uint8_t cchannels; /* Number of configured channels */
@@ -364,6 +365,8 @@ static int adc123_interrupt(int irq, FAR void *context);
/* ADC Driver Methods */
+static int adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback);
static void adc_reset(FAR struct adc_dev_s *dev);
static int adc_setup(FAR struct adc_dev_s *dev);
static void adc_shutdown(FAR struct adc_dev_s *dev);
@@ -412,6 +415,7 @@ static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable);
static const struct adc_ops_s g_adcops =
{
+ .ao_bind = adc_bind,
#if defined(CONFIG_STM32_STM32L15XX) && \
(STM32_CFGR_PLLSRC != 0 || STM32_SYSCLK_SW != RCC_CFGR_SW_HSI)
.ao_reset = adc_reset_hsi_disable,
@@ -1641,15 +1645,22 @@ static void adc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr, FAR void *arg)
FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
int i;
- for (i = 0; i < priv->nchannels; i++)
- {
- adc_receive(dev, priv->current, priv->dmabuffer[priv->current]);
- priv->current++;
- if (priv->current >= priv->nchannels)
- {
- /* Restart the conversion sequence from the beginning */
+ /* Verify that the upper-half driver has bound its callback functions */
- priv->current = 0;
+ if (priv->cb != NULL)
+ {
+ DEBUGASSERT(priv->cb->au_receive != NULL);
+
+ for (i = 0; i < priv->nchannels; i++)
+ {
+ priv->cb->au_receive(dev, priv->current, priv->dmabuffer[priv->current]);
+ priv->current++;
+ if (priv->current >= priv->nchannels)
+ {
+ /* Restart the conversion sequence from the beginning */
+
+ priv->current = 0;
+ }
}
}
@@ -1660,6 +1671,25 @@ static void adc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr, FAR void *arg)
}
#endif
+/****************************************************************************
+ * Name: adc_bind
+ *
+ * Description:
+ * Bind the upper-half driver callbacks to the lower-half implementation. This
+ * must be called early in order to receive ADC event notifications.
+ *
+ ****************************************************************************/
+
+static int adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback)
+{
+ FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+
+ DEBUGASSERT(priv != NULL);
+ priv->cb = callback;
+ return OK;
+}
+
/****************************************************************************
* Name: adc_reset
*
@@ -2702,15 +2732,21 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
data = adc_getreg(priv, STM32_ADC_DR_OFFSET) & ADC_DR_RDATA_MASK;
- /* Give the ADC data to the ADC driver. adc_receive() accepts 3
- * parameters:
- *
- * 1) The first is the ADC device instance for this ADC block.
- * 2) The second is the channel number for the data, and
- * 3) The third is the converted data for the channel.
- */
+ /* Verify that the upper-half driver has bound its callback functions */
- adc_receive(dev, priv->chanlist[priv->current], data);
+ if (priv->cb != NULL)
+ {
+ /* Give the ADC data to the ADC driver. The ADC receive() method
+ * accepts 3 parameters:
+ *
+ * 1) The first is the ADC device instance for this ADC block.
+ * 2) The second is the channel number for the data, and
+ * 3) The third is the converted data for the channel.
+ */
+
+ DEBUGASSERT(priv->cb->au_receive != NULL);
+ priv->cb->au_receive(dev, priv->chanlist[priv->current], data);
+ }
/* Set the channel number of the next channel that will complete
* conversion.
@@ -2995,6 +3031,7 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,
DEBUGASSERT(cchannels <= ADC_MAX_SAMPLES);
+ priv->cb = NULL;
priv->cchannels = cchannels;
memcpy(priv->chanlist, chanlist, cchannels);
@@ -3009,4 +3046,4 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,
#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 ||
* CONFIG_STM32_ADC3 || CONFIG_STM32_ADC4
*/
-#endif /* CONFIG_ADC */
+#endif /* CONFIG_STM32_ADC */
diff --git a/arch/arm/src/stm32/stm32_can.c b/arch/arm/src/stm32/stm32_can.c
index 8628b2fa79b..8cb61decf14 100644
--- a/arch/arm/src/stm32/stm32_can.c
+++ b/arch/arm/src/stm32/stm32_can.c
@@ -4,6 +4,9 @@
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
+ * Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ * Author: Paul Alexander Patience
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -103,13 +106,13 @@
struct stm32_can_s
{
- uint8_t port; /* CAN port number (1 or 2) */
- uint8_t canrx0; /* CAN RX FIFO 0 IRQ number */
- uint8_t cantx; /* CAN TX IRQ number */
- uint8_t filter; /* Filter number */
- uint32_t base; /* Base address of the CAN control registers */
- uint32_t fbase; /* Base address of the CAN filter registers */
- uint32_t baud; /* Configured baud */
+ uint8_t port; /* CAN port number (1 or 2) */
+ uint8_t canrx[2]; /* CAN RX FIFO 0/1 IRQ number */
+ uint8_t cantx; /* CAN TX IRQ number */
+ uint8_t filter; /* Filter number */
+ uint32_t base; /* Base address of the CAN control registers */
+ uint32_t fbase; /* Base address of the CAN filter registers */
+ uint32_t baud; /* Configured baud */
};
/****************************************************************************
@@ -118,14 +121,19 @@ struct stm32_can_s
/* CAN Register access */
-static uint32_t can_getreg(struct stm32_can_s *priv, int offset);
-static uint32_t can_getfreg(struct stm32_can_s *priv, int offset);
-static void can_putreg(struct stm32_can_s *priv, int offset, uint32_t value);
-static void can_putfreg(struct stm32_can_s *priv, int offset, uint32_t value);
+static uint32_t can_getreg(FAR struct stm32_can_s *priv, int offset);
+static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset);
+static void can_putreg(FAR struct stm32_can_s *priv, int offset,
+ uint32_t value);
+static void can_putfreg(FAR struct stm32_can_s *priv, int offset,
+ uint32_t value);
#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpctrlregs(struct stm32_can_s *priv, FAR const char *msg);
-static void can_dumpmbregs(struct stm32_can_s *priv, FAR const char *msg);
-static void can_dumpfiltregs(struct stm32_can_s *priv, FAR const char *msg);
+static void can_dumpctrlregs(FAR struct stm32_can_s *priv,
+ FAR const char *msg);
+static void can_dumpmbregs(FAR struct stm32_can_s *priv,
+ FAR const char *msg);
+static void can_dumpfiltregs(FAR struct stm32_can_s *priv,
+ FAR const char *msg);
#else
# define can_dumpctrlregs(priv,msg)
# define can_dumpmbregs(priv,msg)
@@ -147,14 +155,16 @@ static bool can_txempty(FAR struct can_dev_s *dev);
/* CAN interrupt handling */
-static int can_rx0interrupt(int irq, void *context);
-static int can_txinterrupt(int irq, void *context);
+static int can_rxinterrupt(int irq, FAR void *context, int rxmb);
+static int can_rx0interrupt(int irq, FAR void *context);
+static int can_rx1interrupt(int irq, FAR void *context);
+static int can_txinterrupt(int irq, FAR void *context);
/* Initialization */
-static int can_bittiming(struct stm32_can_s *priv);
-static int can_cellinit(struct stm32_can_s *priv);
-static int can_filterinit(struct stm32_can_s *priv);
+static int can_bittiming(FAR struct stm32_can_s *priv);
+static int can_cellinit(FAR struct stm32_can_s *priv);
+static int can_filterinit(FAR struct stm32_can_s *priv);
/****************************************************************************
* Private Data
@@ -178,7 +188,11 @@ static const struct can_ops_s g_canops =
static struct stm32_can_s g_can1priv =
{
.port = 1,
- .canrx0 = STM32_IRQ_CAN1RX0,
+ .canrx =
+ {
+ STM32_IRQ_CAN1RX0,
+ STM32_IRQ_CAN1RX1,
+ },
.cantx = STM32_IRQ_CAN1TX,
.filter = 0,
.base = STM32_CAN1_BASE,
@@ -197,7 +211,11 @@ static struct can_dev_s g_can1dev =
static struct stm32_can_s g_can2priv =
{
.port = 2,
- .canrx0 = STM32_IRQ_CAN2RX0,
+ .canrx =
+ {
+ STM32_IRQ_CAN2RX0,
+ STM32_IRQ_CAN2RX1,
+ },
.cantx = STM32_IRQ_CAN2TX,
.filter = CAN_NFILTERS / 2,
.base = STM32_CAN2_BASE,
@@ -285,23 +303,23 @@ static uint32_t can_vgetreg(uint32_t addr)
return val;
}
-static uint32_t can_getreg(struct stm32_can_s *priv, int offset)
+static uint32_t can_getreg(FAR struct stm32_can_s *priv, int offset)
{
return can_vgetreg(priv->base + offset);
}
-static uint32_t can_getfreg(struct stm32_can_s *priv, int offset)
+static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset)
{
return can_vgetreg(priv->fbase + offset);
}
#else
-static uint32_t can_getreg(struct stm32_can_s *priv, int offset)
+static uint32_t can_getreg(FAR struct stm32_can_s *priv, int offset)
{
return getreg32(priv->base + offset);
}
-static uint32_t can_getfreg(struct stm32_can_s *priv, int offset)
+static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset)
{
return getreg32(priv->fbase + offset);
}
@@ -338,23 +356,27 @@ static void can_vputreg(uint32_t addr, uint32_t value)
putreg32(value, addr);
}
-static void can_putreg(struct stm32_can_s *priv, int offset, uint32_t value)
+static void can_putreg(FAR struct stm32_can_s *priv, int offset,
+ uint32_t value)
{
can_vputreg(priv->base + offset, value);
}
-static void can_putfreg(struct stm32_can_s *priv, int offset, uint32_t value)
+static void can_putfreg(FAR struct stm32_can_s *priv, int offset,
+ uint32_t value)
{
can_vputreg(priv->fbase + offset, value);
}
#else
-static void can_putreg(struct stm32_can_s *priv, int offset, uint32_t value)
+static void can_putreg(FAR struct stm32_can_s *priv, int offset,
+ uint32_t value)
{
putreg32(value, priv->base + offset);
}
-static void can_putfreg(struct stm32_can_s *priv, int offset, uint32_t value)
+static void can_putfreg(FAR struct stm32_can_s *priv, int offset,
+ uint32_t value)
{
putreg32(value, priv->fbase + offset);
}
@@ -375,7 +397,8 @@ static void can_putfreg(struct stm32_can_s *priv, int offset, uint32_t value)
****************************************************************************/
#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpctrlregs(struct stm32_can_s *priv, FAR const char *msg)
+static void can_dumpctrlregs(FAR struct stm32_can_s *priv,
+ FAR const char *msg)
{
if (msg)
{
@@ -419,7 +442,8 @@ static void can_dumpctrlregs(struct stm32_can_s *priv, FAR const char *msg)
****************************************************************************/
#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpmbregs(struct stm32_can_s *priv, FAR const char *msg)
+static void can_dumpmbregs(FAR struct stm32_can_s *priv,
+ FAR const char *msg)
{
if (msg)
{
@@ -479,7 +503,8 @@ static void can_dumpmbregs(struct stm32_can_s *priv, FAR const char *msg)
****************************************************************************/
#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpfiltregs(struct stm32_can_s *priv, FAR const char *msg)
+static void can_dumpfiltregs(FAR struct stm32_can_s *priv,
+ FAR const char *msg)
{
int i;
@@ -553,8 +578,8 @@ static void can_reset(FAR struct can_dev_s *dev)
return;
}
- /* Disable interrupts momentary to stop any ongoing CAN event processing and
- * to prevent any concurrent access to the AHB1RSTR register.
+ /* Disable interrupts momentarily to stop any ongoing CAN event processing
+ * and to prevent any concurrent access to the AHB1RSTR register.
*/
flags = enter_critical_section();
@@ -592,7 +617,8 @@ static int can_setup(FAR struct can_dev_s *dev)
FAR struct stm32_can_s *priv = dev->cd_priv;
int ret;
- canllvdbg("CAN%d RX0 irq: %d TX irq: %d\n", priv->port, priv->canrx0, priv->cantx);
+ canllvdbg("CAN%d RX0 irq: %d RX1 irq: %d TX irq: %d\n",
+ priv->port, priv->canrx[0], priv->canrx[1], priv->cantx);
/* CAN cell initialization */
@@ -616,28 +642,41 @@ static int can_setup(FAR struct can_dev_s *dev)
}
can_dumpfiltregs(priv, "After filter initialization");
- /* Attach the CAN RX FIFO 0 interrupt and TX interrupts. The others are not used */
+ /* Attach the CAN RX FIFO 0/1 interrupts and TX interrupts.
+ * The others are not used.
+ */
- ret = irq_attach(priv->canrx0, can_rx0interrupt);
+ ret = irq_attach(priv->canrx[0], can_rx0interrupt);
if (ret < 0)
{
- canlldbg("Failed to attach CAN%d RX0 IRQ (%d)", priv->port, priv->canrx0);
+ canlldbg("Failed to attach CAN%d RX0 IRQ (%d)",
+ priv->port, priv->canrx[0]);
+ return ret;
+ }
+
+ ret = irq_attach(priv->canrx[1], can_rx1interrupt);
+ if (ret < 0)
+ {
+ canlldbg("Failed to attach CAN%d RX1 IRQ (%d)",
+ priv->port, priv->canrx[1]);
return ret;
}
ret = irq_attach(priv->cantx, can_txinterrupt);
if (ret < 0)
{
- canlldbg("Failed to attach CAN%d TX IRQ (%d)", priv->port, priv->cantx);
+ canlldbg("Failed to attach CAN%d TX IRQ (%d)",
+ priv->port, priv->cantx);
return ret;
}
- /* Enable the interrupts at the NVIC. Interrupts arestill disabled in
+ /* Enable the interrupts at the NVIC. Interrupts are still disabled in
* the CAN module. Since we coming out of reset here, there should be
* no pending interrupts.
*/
- up_enable_irq(priv->canrx0);
+ up_enable_irq(priv->canrx[0]);
+ up_enable_irq(priv->canrx[1]);
up_enable_irq(priv->cantx);
return OK;
}
@@ -663,14 +702,16 @@ static void can_shutdown(FAR struct can_dev_s *dev)
canllvdbg("CAN%d\n", priv->port);
- /* Disable the RX FIFO 0 and TX interrupts */
+ /* Disable the RX FIFO 0/1 and TX interrupts */
- up_disable_irq(priv->canrx0);
+ up_disable_irq(priv->canrx[0]);
+ up_disable_irq(priv->canrx[1]);
up_disable_irq(priv->cantx);
- /* Detach the RX FIFO 0 and TX interrupts */
+ /* Detach the RX FIFO 0/1 and TX interrupts */
- irq_detach(priv->canrx0);
+ irq_detach(priv->canrx[0]);
+ irq_detach(priv->canrx[1]);
irq_detach(priv->cantx);
/* And reset the hardware */
@@ -699,16 +740,16 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
canllvdbg("CAN%d enable: %d\n", priv->port, enable);
- /* Enable/disable the FIFO 0 message pending interrupt */
+ /* Enable/disable the FIFO 0/1 message pending interrupt */
regval = can_getreg(priv, STM32_CAN_IER_OFFSET);
if (enable)
{
- regval |= CAN_IER_FMPIE0;
+ regval |= CAN_IER_FMPIE0 | CAN_IER_FMPIE1;
}
else
{
- regval &= ~CAN_IER_FMPIE0;
+ regval &= ~(CAN_IER_FMPIE0 | CAN_IER_FMPIE1);
}
can_putreg(priv, STM32_CAN_IER_OFFSET, regval);
}
@@ -817,7 +858,8 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
int dlc;
int txmb;
- canllvdbg("CAN%d ID: %d DLC: %d\n", priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
+ canllvdbg("CAN%d ID: %d DLC: %d\n",
+ priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
/* Select one empty transmit mailbox */
@@ -843,7 +885,8 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
/* Clear TXRQ, RTR, IDE, EXID, and STID fields */
regval = can_getreg(priv, STM32_CAN_TIR_OFFSET(txmb));
- regval &= ~(CAN_TIR_TXRQ | CAN_TIR_RTR | CAN_TIR_IDE | CAN_TIR_EXID_MASK | CAN_TIR_STID_MASK);
+ regval &= ~(CAN_TIR_TXRQ | CAN_TIR_RTR | CAN_TIR_IDE |
+ CAN_TIR_EXID_MASK | CAN_TIR_STID_MASK);
can_putreg(priv, STM32_CAN_TIR_OFFSET(txmb), regval);
/* Set up the ID, standard 11-bit or extended 29-bit. */
@@ -886,17 +929,17 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
if (dlc > 1)
{
- tmp = (uint32_t)*ptr++;
+ tmp = (uint32_t)*ptr++;
regval |= tmp << CAN_TDLR_DATA1_SHIFT;
if (dlc > 2)
{
- tmp = (uint32_t)*ptr++;
+ tmp = (uint32_t)*ptr++;
regval |= tmp << CAN_TDLR_DATA2_SHIFT;
if (dlc > 3)
{
- tmp = (uint32_t)*ptr++;
+ tmp = (uint32_t)*ptr++;
regval |= tmp << CAN_TDLR_DATA3_SHIFT;
}
}
@@ -912,17 +955,17 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
if (dlc > 5)
{
- tmp = (uint32_t)*ptr++;
+ tmp = (uint32_t)*ptr++;
regval |= tmp << CAN_TDHR_DATA5_SHIFT;
if (dlc > 6)
{
- tmp = (uint32_t)*ptr++;
+ tmp = (uint32_t)*ptr++;
regval |= tmp << CAN_TDHR_DATA6_SHIFT;
if (dlc > 7)
{
- tmp = (uint32_t)*ptr++;
+ tmp = (uint32_t)*ptr++;
regval |= tmp << CAN_TDHR_DATA7_SHIFT;
}
}
@@ -970,11 +1013,7 @@ static bool can_txready(FAR struct can_dev_s *dev)
regval = can_getreg(priv, STM32_CAN_TSR_OFFSET);
canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
- if ((regval & CAN_ALL_MAILBOXES) != 0)
- {
- return true;
- }
- return false;
+ return (regval & CAN_ALL_MAILBOXES) != 0;
}
/****************************************************************************
@@ -1005,29 +1044,26 @@ static bool can_txempty(FAR struct can_dev_s *dev)
regval = can_getreg(priv, STM32_CAN_TSR_OFFSET);
canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
- if ((regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES)
- {
- return true;
- }
- return false;
+ return (regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES;
}
/****************************************************************************
- * Name: can_rx0interrupt
+ * Name: can_rxinterrupt
*
* Description:
- * CAN RX FIFO 0 interrupt handler
+ * CAN RX FIFO 0/1 interrupt handler
*
* Input Parameters:
* irq - The IRQ number of the interrupt.
* context - The register state save array at the time of the interrupt.
+ * rxmb - The RX mailbox number.
*
* Returned Value:
* Zero on success; a negated errno on failure
*
****************************************************************************/
-static int can_rx0interrupt(int irq, void *context)
+static int can_rxinterrupt(int irq, FAR void *context, int rxmb)
{
FAR struct can_dev_s *dev = NULL;
FAR struct stm32_can_s *priv;
@@ -1038,11 +1074,11 @@ static int can_rx0interrupt(int irq, void *context)
int ret;
#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
- if (g_can1priv.canrx0 == irq)
+ if (g_can1priv.canrx[rxmb] == irq)
{
dev = &g_can1dev;
}
- else if (g_can2priv.canrx0 == irq)
+ else if (g_can2priv.canrx[rxmb] == irq)
{
dev = &g_can2dev;
}
@@ -1057,9 +1093,9 @@ static int can_rx0interrupt(int irq, void *context)
#endif
priv = dev->cd_priv;
- /* Verify that a message is pending in FIFO 0 */
+ /* Verify that a message is pending in the FIFO */
- regval = can_getreg(priv, STM32_CAN_RF0R_OFFSET);
+ regval = can_getreg(priv, STM32_CAN_RFR_OFFSET(rxmb));
npending = (regval & CAN_RFR_FMP_MASK) >> CAN_RFR_FMP_SHIFT;
if (npending < 1)
{
@@ -1067,11 +1103,18 @@ static int can_rx0interrupt(int irq, void *context)
return OK;
}
- can_dumpmbregs(priv, "RX0 interrupt");
+ if (rxmb == 0)
+ {
+ can_dumpmbregs(priv, "RX0 interrupt");
+ }
+ else
+ {
+ can_dumpmbregs(priv, "RX1 interrupt");
+ }
/* Get the CAN identifier. */
- regval = can_getreg(priv, STM32_CAN_RI0R_OFFSET);
+ regval = can_getreg(priv, STM32_CAN_RIR_OFFSET(rxmb));
#ifdef CONFIG_CAN_EXTID
if ((regval & CAN_RIR_IDE) != 0)
@@ -1104,22 +1147,22 @@ static int can_rx0interrupt(int irq, void *context)
/* Extract the RTR bit */
- hdr.ch_rtr = (regval & CAN_RIR_RTR) != 0 ? true : false;
+ hdr.ch_rtr = (regval & CAN_RIR_RTR) != 0;
/* Get the DLC */
- regval = can_getreg(priv, STM32_CAN_RDT0R_OFFSET);
+ regval = can_getreg(priv, STM32_CAN_RDTR_OFFSET(rxmb));
hdr.ch_dlc = (regval & CAN_RDTR_DLC_MASK) >> CAN_RDTR_DLC_SHIFT;
/* Save the message data */
- regval = can_getreg(priv, STM32_CAN_RDL0R_OFFSET);
+ regval = can_getreg(priv, STM32_CAN_RDLR_OFFSET(rxmb));
data[0] = (regval & CAN_RDLR_DATA0_MASK) >> CAN_RDLR_DATA0_SHIFT;
data[1] = (regval & CAN_RDLR_DATA1_MASK) >> CAN_RDLR_DATA1_SHIFT;
data[2] = (regval & CAN_RDLR_DATA2_MASK) >> CAN_RDLR_DATA2_SHIFT;
data[3] = (regval & CAN_RDLR_DATA3_MASK) >> CAN_RDLR_DATA3_SHIFT;
- regval = can_getreg(priv, STM32_CAN_RDH0R_OFFSET);
+ regval = can_getreg(priv, STM32_CAN_RDHR_OFFSET(rxmb));
data[4] = (regval & CAN_RDHR_DATA4_MASK) >> CAN_RDHR_DATA4_SHIFT;
data[5] = (regval & CAN_RDHR_DATA5_MASK) >> CAN_RDHR_DATA5_SHIFT;
data[6] = (regval & CAN_RDHR_DATA6_MASK) >> CAN_RDHR_DATA6_SHIFT;
@@ -1129,17 +1172,57 @@ static int can_rx0interrupt(int irq, void *context)
ret = can_receive(dev, &hdr, data);
- /* Release the FIFO0 */
+ /* Release the FIFO */
#ifndef CONFIG_CAN_EXTID
errout:
#endif
- regval = can_getreg(priv, STM32_CAN_RF0R_OFFSET);
+ regval = can_getreg(priv, STM32_CAN_RFR_OFFSET(rxmb));
regval |= CAN_RFR_RFOM;
- can_putreg(priv, STM32_CAN_RF0R_OFFSET, regval);
+ can_putreg(priv, STM32_CAN_RFR_OFFSET(rxmb), regval);
return ret;
}
+/****************************************************************************
+ * Name: can_rx0interrupt
+ *
+ * Description:
+ * CAN RX FIFO 0 interrupt handler
+ *
+ * Input Parameters:
+ * irq - The IRQ number of the interrupt.
+ * context - The register state save array at the time of the interrupt.
+ *
+ * Returned Value:
+ * Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int can_rx0interrupt(int irq, FAR void *context)
+{
+ return can_rxinterrupt(irq, context, 0);
+}
+
+/****************************************************************************
+ * Name: can_rx1interrupt
+ *
+ * Description:
+ * CAN RX FIFO 1 interrupt handler
+ *
+ * Input Parameters:
+ * irq - The IRQ number of the interrupt.
+ * context - The register state save array at the time of the interrupt.
+ *
+ * Returned Value:
+ * Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int can_rx1interrupt(int irq, FAR void *context)
+{
+ return can_rxinterrupt(irq, context, 1);
+}
+
/****************************************************************************
* Name: can_txinterrupt
*
@@ -1155,7 +1238,7 @@ errout:
*
****************************************************************************/
-static int can_txinterrupt(int irq, void *context)
+static int can_txinterrupt(int irq, FAR void *context)
{
FAR struct can_dev_s *dev = NULL;
FAR struct stm32_can_s *priv;
@@ -1304,7 +1387,7 @@ static int can_txinterrupt(int irq, void *context)
*
****************************************************************************/
-static int can_bittiming(struct stm32_can_s *priv)
+static int can_bittiming(FAR struct stm32_can_s *priv)
{
uint32_t tmp;
uint32_t brp;
@@ -1401,7 +1484,7 @@ static int can_bittiming(struct stm32_can_s *priv)
*
****************************************************************************/
-static int can_cellinit(struct stm32_can_s *priv)
+static int can_cellinit(FAR struct stm32_can_s *priv)
{
volatile uint32_t timeout;
uint32_t regval;
@@ -1415,11 +1498,6 @@ static int can_cellinit(struct stm32_can_s *priv)
regval &= ~CAN_MCR_SLEEP;
can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
- /* Configure CAN behavior. Priority driven request order, not message ID. */
-
- regval |= CAN_MCR_TXFP;
- can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
-
/* Enter initialization mode */
regval |= CAN_MCR_INRQ;
@@ -1457,7 +1535,8 @@ static int can_cellinit(struct stm32_can_s *priv)
*/
regval = can_getreg(priv, STM32_CAN_MCR_OFFSET);
- regval &= ~(CAN_MCR_TXFP | CAN_MCR_RFLM | CAN_MCR_NART | CAN_MCR_AWUM | CAN_MCR_ABOM | CAN_MCR_TTCM);
+ regval &= ~(CAN_MCR_TXFP | CAN_MCR_RFLM | CAN_MCR_NART |
+ CAN_MCR_AWUM | CAN_MCR_ABOM | CAN_MCR_TTCM);
can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
/* Configure bit timing. */
@@ -1492,7 +1571,8 @@ static int can_cellinit(struct stm32_can_s *priv)
if (timeout < 1)
{
- canlldbg("ERROR: Timed out waiting to exit initialization mode: %08x\n", regval);
+ canlldbg("ERROR: Timed out waiting to exit initialization mode: %08x\n",
+ regval);
return -ETIMEDOUT;
}
return OK;
@@ -1531,7 +1611,7 @@ static int can_cellinit(struct stm32_can_s *priv)
*
****************************************************************************/
-static int can_filterinit(struct stm32_can_s *priv)
+static int can_filterinit(FAR struct stm32_can_s *priv)
{
uint32_t regval;
uint32_t bitmask;
@@ -1540,7 +1620,7 @@ static int can_filterinit(struct stm32_can_s *priv)
/* Get the bitmask associated with the filter used by this CAN block */
- bitmask = ((uint32_t)1) << priv->filter;
+ bitmask = (uint32_t)1 << priv->filter;
/* Enter filter initialization mode */
@@ -1548,6 +1628,17 @@ static int can_filterinit(struct stm32_can_s *priv)
regval |= CAN_FMR_FINIT;
can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval);
+ /* Assign half the filters to CAN1, half to CAN2 */
+
+#if defined(CONFIG_STM32_CONNECTIVITYLINE) || \
+ defined(CONFIG_STM32_STM32F20XX) || \
+ defined(CONFIG_STM32_STM32F40XX)
+ regval = can_getfreg(priv, STM32_CAN_FMR_OFFSET);
+ regval &= CAN_FMR_CAN2SB_MASK;
+ regval |= (CAN_NFILTERS / 2) << CAN_FMR_CAN2SB_SHIFT;
+ can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval);
+#endif
+
/* Disable the filter */
regval = can_getfreg(priv, STM32_CAN_FA1R_OFFSET);
@@ -1560,12 +1651,12 @@ static int can_filterinit(struct stm32_can_s *priv)
regval |= bitmask;
can_putfreg(priv, STM32_CAN_FS1R_OFFSET, regval);
- /* There are 14 or 28 filter banks (depending) on the device. Each filter bank is
- * composed of two 32-bit registers, CAN_FiR:
+ /* There are 14 or 28 filter banks (depending) on the device.
+ * Each filter bank is composed of two 32-bit registers, CAN_FiR:
*/
- can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 1), 0);
- can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 2), 0);
+ can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 1), 0);
+ can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 2), 0);
/* Set Id/Mask mode for the filter */
@@ -1613,7 +1704,7 @@ static int can_filterinit(struct stm32_can_s *priv)
FAR struct can_dev_s *stm32_caninitialize(int port)
{
- struct can_dev_s *dev = NULL;
+ FAR struct can_dev_s *dev = NULL;
canvdbg("CAN%d\n", port);
@@ -1662,4 +1753,3 @@ FAR struct can_dev_s *stm32_caninitialize(int port)
}
#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */
-
diff --git a/arch/arm/src/stm32/stm32_lowputc.c b/arch/arm/src/stm32/stm32_lowputc.c
index 4307c45748e..0bffb74808a 100644
--- a/arch/arm/src/stm32/stm32_lowputc.c
+++ b/arch/arm/src/stm32/stm32_lowputc.c
@@ -273,9 +273,9 @@
# define USART_CR3_CLRBITS \
(USART_CR3_EIE | USART_CR3_IREN | USART_CR3_IRLP | USART_CR3_HDSEL | \
USART_CR3_NACK | USART_CR3_SCEN | USART_CR3_DMAR | USART_CR3_DMAT | \
- USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_CTSIE | USART_CR1_ONEBIT | \
- USART_CR1_OVRDIS | USART_CR1_DDRE | USART_CR1_DEM | USART_CR1_DEP | \
- USART_CR1_SCARCNT_MASK | USART_CR1_WUS_MASK | USART_CR1_WUFIE)
+ USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_CTSIE | USART_CR3_ONEBIT | \
+ USART_CR3_OVRDIS | USART_CR3_DDRE | USART_CR3_DEM | USART_CR3_DEP | \
+ USART_CR3_SCARCNT_MASK | USART_CR3_WUS_MASK | USART_CR3_WUFIE)
# else
# define USART_CR3_CLRBITS \
(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE)
@@ -436,7 +436,7 @@ void up_lowputc(char ch)
void stm32_lowsetup(void)
{
-#if defined(HAVE_UART)
+#if defined(HAVE_SERIALDRIVER)
uint32_t mapr;
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
uint32_t cr;
@@ -559,7 +559,7 @@ void stm32_lowsetup(void)
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
#endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
-#endif /* HAVE_UART */
+#endif /* HAVE_SERIALDRIVER */
}
#elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
@@ -568,7 +568,7 @@ void stm32_lowsetup(void)
void stm32_lowsetup(void)
{
-#if defined(HAVE_UART)
+#if defined(HAVE_SERIALDRIVER)
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
uint32_t cr;
#endif
@@ -638,7 +638,7 @@ void stm32_lowsetup(void)
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
#endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
-#endif /* HAVE_UART */
+#endif /* HAVE_SERIALDRIVER */
}
#else
diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c
index 73039dcf6db..eeb5a846a7b 100644
--- a/arch/arm/src/stm32/stm32_serial.c
+++ b/arch/arm/src/stm32/stm32_serial.c
@@ -255,8 +255,24 @@
# define PM_IDLE_DOMAIN 0 /* Revisit */
#endif
+/* Keep track if a Break was set
+ *
+ * Note:
+ *
+ * 1) This value is set in the priv->ie but never written to the control
+ * register. It must not collide with USART_CR1_USED_INTS or USART_CR3_EIE
+ * 2) USART_CR3_EIE is also carried in the up_dev_s ie member.
+ *
+ * See up_restoreusartint where the masking is done.
+ */
+
+#ifdef CONFIG_STM32_SERIALBRK_BSDCOMPAT
+# define USART_CR1_IE_BREAK_INPROGRESS_SHFTS 15
+# define USART_CR1_IE_BREAK_INPROGRESS (1 << USART_CR1_IE_BREAK_INPROGRESS_SHFTS)
+#endif
+
#ifdef USE_SERIALDRIVER
-#ifdef HAVE_UART
+#ifdef HAVE_SERIALDRIVER
/****************************************************************************
* Private Types
@@ -370,28 +386,28 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate);
#endif
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
static int up_interrupt_usart1(int irq, void *context);
#endif
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
static int up_interrupt_usart2(int irq, void *context);
#endif
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
static int up_interrupt_usart3(int irq, void *context);
#endif
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
static int up_interrupt_uart4(int irq, void *context);
#endif
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
static int up_interrupt_uart5(int irq, void *context);
#endif
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
static int up_interrupt_usart6(int irq, void *context);
#endif
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
static int up_interrupt_uart7(int irq, void *context);
#endif
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
static int up_interrupt_uart8(int irq, void *context);
#endif
@@ -443,7 +459,7 @@ static const struct uart_ops_s g_uart_dma_ops =
/* I/O buffers */
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE];
static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE];
# ifdef CONFIG_USART1_RXDMA
@@ -451,7 +467,7 @@ static char g_usart1rxfifo[RXDMA_BUFFER_SIZE];
# endif
#endif
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE];
static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE];
# ifdef CONFIG_USART2_RXDMA
@@ -459,7 +475,7 @@ static char g_usart2rxfifo[RXDMA_BUFFER_SIZE];
# endif
#endif
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
static char g_usart3rxbuffer[CONFIG_USART3_RXBUFSIZE];
static char g_usart3txbuffer[CONFIG_USART3_TXBUFSIZE];
# ifdef CONFIG_USART3_RXDMA
@@ -467,7 +483,7 @@ static char g_usart3rxfifo[RXDMA_BUFFER_SIZE];
# endif
#endif
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE];
static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE];
# ifdef CONFIG_UART4_RXDMA
@@ -475,7 +491,7 @@ static char g_uart4rxfifo[RXDMA_BUFFER_SIZE];
# endif
#endif
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
static char g_uart5rxbuffer[CONFIG_UART5_RXBUFSIZE];
static char g_uart5txbuffer[CONFIG_UART5_TXBUFSIZE];
# ifdef CONFIG_UART5_RXDMA
@@ -483,7 +499,7 @@ static char g_uart5rxfifo[RXDMA_BUFFER_SIZE];
# endif
#endif
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
static char g_usart6rxbuffer[CONFIG_USART6_RXBUFSIZE];
static char g_usart6txbuffer[CONFIG_USART6_TXBUFSIZE];
# ifdef CONFIG_USART6_RXDMA
@@ -491,7 +507,7 @@ static char g_usart6rxfifo[RXDMA_BUFFER_SIZE];
# endif
#endif
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
static char g_uart7rxbuffer[CONFIG_UART7_RXBUFSIZE];
static char g_uart7txbuffer[CONFIG_UART7_TXBUFSIZE];
# ifdef CONFIG_UART7_RXDMA
@@ -499,7 +515,7 @@ static char g_uart7rxfifo[RXDMA_BUFFER_SIZE];
# endif
#endif
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
static char g_uart8rxbuffer[CONFIG_UART8_RXBUFSIZE];
static char g_uart8txbuffer[CONFIG_UART8_TXBUFSIZE];
# ifdef CONFIG_UART8_RXDMA
@@ -509,7 +525,7 @@ static char g_uart8rxfifo[RXDMA_BUFFER_SIZE];
/* This describes the state of the STM32 USART1 ports. */
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
static struct up_dev_s g_usart1priv =
{
.dev =
@@ -571,7 +587,7 @@ static struct up_dev_s g_usart1priv =
/* This describes the state of the STM32 USART2 port. */
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
static struct up_dev_s g_usart2priv =
{
.dev =
@@ -633,7 +649,7 @@ static struct up_dev_s g_usart2priv =
/* This describes the state of the STM32 USART3 port. */
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
static struct up_dev_s g_usart3priv =
{
.dev =
@@ -695,7 +711,7 @@ static struct up_dev_s g_usart3priv =
/* This describes the state of the STM32 UART4 port. */
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
static struct up_dev_s g_uart4priv =
{
.dev =
@@ -761,7 +777,7 @@ static struct up_dev_s g_uart4priv =
/* This describes the state of the STM32 UART5 port. */
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
static struct up_dev_s g_uart5priv =
{
.dev =
@@ -827,7 +843,7 @@ static struct up_dev_s g_uart5priv =
/* This describes the state of the STM32 USART6 port. */
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
static struct up_dev_s g_usart6priv =
{
.dev =
@@ -889,7 +905,7 @@ static struct up_dev_s g_usart6priv =
/* This describes the state of the STM32 UART7 port. */
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
static struct up_dev_s g_uart7priv =
{
.dev =
@@ -924,11 +940,11 @@ static struct up_dev_s g_uart7priv =
.usartbase = STM32_UART7_BASE,
.tx_gpio = GPIO_UART7_TX,
.rx_gpio = GPIO_UART7_RX,
-#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_USART7_OFLOWCONTROL)
+#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART7_OFLOWCONTROL)
.oflow = true,
.cts_gpio = GPIO_UART7_CTS,
#endif
-#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_USART7_IFLOWCONTROL)
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART7_IFLOWCONTROL)
.iflow = true,
.rts_gpio = GPIO_UART7_RTS,
#endif
@@ -951,7 +967,7 @@ static struct up_dev_s g_uart7priv =
/* This describes the state of the STM32 UART8 port. */
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
static struct up_dev_s g_uart8priv =
{
.dev =
@@ -986,11 +1002,11 @@ static struct up_dev_s g_uart8priv =
.usartbase = STM32_UART8_BASE,
.tx_gpio = GPIO_UART8_TX,
.rx_gpio = GPIO_UART8_RX,
-#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_USART8_OFLOWCONTROL)
+#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART8_OFLOWCONTROL)
.oflow = true,
.cts_gpio = GPIO_UART8_CTS,
#endif
-#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_USART8_IFLOWCONTROL)
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART8_IFLOWCONTROL)
.iflow = true,
.rts_gpio = GPIO_UART8_RTS,
#endif
@@ -1015,28 +1031,28 @@ static struct up_dev_s g_uart8priv =
static struct up_dev_s * const uart_devs[STM32_NUSART] =
{
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
[0] = &g_usart1priv,
#endif
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
[1] = &g_usart2priv,
#endif
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
[2] = &g_usart3priv,
#endif
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
[3] = &g_uart4priv,
#endif
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
[4] = &g_uart5priv,
#endif
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
[5] = &g_usart6priv,
#endif
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
[6] = &g_uart7priv,
#endif
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
[7] = &g_uart8priv,
#endif
};
@@ -1360,49 +1376,49 @@ static void up_set_apb_clock(struct uart_dev_s *dev, bool on)
{
default:
return;
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
case STM32_USART1_BASE:
rcc_en = RCC_APB2ENR_USART1EN;
regaddr = STM32_RCC_APB2ENR;
break;
#endif
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
case STM32_USART2_BASE:
rcc_en = RCC_APB1ENR_USART2EN;
regaddr = STM32_RCC_APB1ENR;
break;
#endif
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
case STM32_USART3_BASE:
rcc_en = RCC_APB1ENR_USART3EN;
regaddr = STM32_RCC_APB1ENR;
break;
#endif
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
case STM32_UART4_BASE:
rcc_en = RCC_APB1ENR_UART4EN;
regaddr = STM32_RCC_APB1ENR;
break;
#endif
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
case STM32_UART5_BASE:
rcc_en = RCC_APB1ENR_UART5EN;
regaddr = STM32_RCC_APB1ENR;
break;
#endif
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
case STM32_USART6_BASE:
rcc_en = RCC_APB2ENR_USART6EN;
regaddr = STM32_RCC_APB2ENR;
break;
#endif
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
case STM32_UART7_BASE:
rcc_en = RCC_APB1ENR_UART7EN;
regaddr = STM32_RCC_APB1ENR;
break;
#endif
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
case STM32_UART8_BASE:
rcc_en = RCC_APB1ENR_UART8EN;
regaddr = STM32_RCC_APB1ENR;
@@ -1897,11 +1913,12 @@ static int up_interrupt_common(struct up_dev_s *priv)
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
-#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT)
+#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) \
+ || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
#endif
-#ifdef CONFIG_SERIAL_TERMIOS
+#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
#endif
int ret = OK;
@@ -2057,30 +2074,74 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
break;
#endif /* CONFIG_SERIAL_TERMIOS */
-#ifdef CONFIG_USART_BREAKS
+#ifdef CONFIG_STM32_USART_BREAKS
+# ifdef CONFIG_STM32_SERIALBRK_BSDCOMPAT
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
- uint32_t cr2;
irqstate_t flags;
+ uint32_t tx_break;
flags = enter_critical_section();
- cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET);
- up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 | USART_CR2_LINEN);
+
+ /* Disable any further tx activity */
+
+ priv->ie |= USART_CR1_IE_BREAK_INPROGRESS;
+
+ up_txint(dev, false);
+
+ /* Configure TX as a GPIO output pin and Send a break signal*/
+
+ tx_break = GPIO_OUTPUT | (~(GPIO_MODE_MASK|GPIO_OUTPUT_SET) & priv->tx_gpio);
+ stm32_configgpio(tx_break);
+
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
- uint32_t cr2;
irqstate_t flags;
flags = enter_critical_section();
- cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET);
- up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 & ~USART_CR2_LINEN);
+
+ /* Configure TX back to U(S)ART */
+
+ stm32_configgpio(priv->tx_gpio);
+
+ priv->ie &= ~USART_CR1_IE_BREAK_INPROGRESS;
+
+ /* Enable further tx activity */
+
+ up_txint(dev, true);
+
leave_critical_section(flags);
}
break;
+# else
+ case TIOCSBRK: /* No BSD compatibility: Turn break on for M bit times */
+ {
+ uint32_t cr1;
+ irqstate_t flags;
+
+ flags = enter_critical_section();
+ cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
+ up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 | USART_CR1_SBK);
+ leave_critical_section(flags);
+ }
+ break;
+
+ case TIOCCBRK: /* No BSD compatibility: May turn off break too soon */
+ {
+ uint32_t cr1;
+ irqstate_t flags;
+
+ flags = enter_critical_section();
+ cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
+ up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 & ~USART_CR1_SBK);
+ leave_critical_section(flags);
+ }
+ break;
+# endif
#endif
default:
@@ -2470,6 +2531,13 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
}
# endif
+# ifdef CONFIG_STM32_SERIALBRK_BSDCOMPAT
+ if (priv->ie & USART_CR1_IE_BREAK_INPROGRESS)
+ {
+ return;
+ }
+# endif
+
up_restoreusartint(priv, ie);
/* Fake a TX interrupt here by just calling uart_xmitchars() with
@@ -2511,56 +2579,56 @@ static bool up_txready(struct uart_dev_s *dev)
*
****************************************************************************/
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
static int up_interrupt_usart1(int irq, void *context)
{
return up_interrupt_common(&g_usart1priv);
}
#endif
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
static int up_interrupt_usart2(int irq, void *context)
{
return up_interrupt_common(&g_usart2priv);
}
#endif
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
static int up_interrupt_usart3(int irq, void *context)
{
return up_interrupt_common(&g_usart3priv);
}
#endif
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
static int up_interrupt_uart4(int irq, void *context)
{
return up_interrupt_common(&g_uart4priv);
}
#endif
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
static int up_interrupt_uart5(int irq, void *context)
{
return up_interrupt_common(&g_uart5priv);
}
#endif
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
static int up_interrupt_usart6(int irq, void *context)
{
return up_interrupt_common(&g_usart6priv);
}
#endif
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
static int up_interrupt_uart7(int irq, void *context)
{
return up_interrupt_common(&g_uart7priv);
}
#endif
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
static int up_interrupt_uart8(int irq, void *context)
{
return up_interrupt_common(&g_uart8priv);
@@ -2703,7 +2771,7 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain,
return OK;
}
#endif
-#endif /* HAVE_UART */
+#endif /* HAVE_SERIALDRIVER */
#endif /* USE_SERIALDRIVER */
/****************************************************************************
@@ -2725,7 +2793,7 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain,
#ifdef USE_EARLYSERIALINIT
void up_earlyserialinit(void)
{
-#ifdef HAVE_UART
+#ifdef HAVE_SERIALDRIVER
unsigned i;
/* Disable all USART interrupts */
@@ -2758,7 +2826,7 @@ void up_earlyserialinit(void)
void up_serialinit(void)
{
-#ifdef HAVE_UART
+#ifdef HAVE_SERIALDRIVER
char devname[16];
unsigned i;
unsigned minor = 0;
diff --git a/arch/arm/src/stm32/stm32_uart.h b/arch/arm/src/stm32/stm32_uart.h
index 56ae3035439..76fc41e0ba0 100644
--- a/arch/arm/src/stm32/stm32_uart.h
+++ b/arch/arm/src/stm32/stm32_uart.h
@@ -90,18 +90,97 @@
# undef CONFIG_STM32_USART1
#endif
-/* Is there a USART enabled? */
+/* Sanity checks */
-#if defined(CONFIG_STM32_USART1) || defined(CONFIG_STM32_USART2) || \
- defined(CONFIG_STM32_USART3) || defined(CONFIG_STM32_UART4) || \
- defined(CONFIG_STM32_UART5) || defined(CONFIG_STM32_USART6) || \
- defined(CONFIG_STM32_UART7) || defined(CONFIG_STM32_UART8)
-# define HAVE_UART 1
+#if !defined(CONFIG_STM32_USART1)
+# undef CONFIG_STM32_USART1_SERIALDRIVER
+# undef CONFIG_STM32_USART1_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_USART2)
+# undef CONFIG_STM32_USART2_SERIALDRIVER
+# undef CONFIG_STM32_USART2_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_USART3)
+# undef CONFIG_STM32_USART3_SERIALDRIVER
+# undef CONFIG_STM32_USART3_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_UART4)
+# undef CONFIG_STM32_UART4_SERIALDRIVER
+# undef CONFIG_STM32_UART4_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_UART5)
+# undef CONFIG_STM32_UART5_SERIALDRIVER
+# undef CONFIG_STM32_UART5_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_USART6)
+# undef CONFIG_STM32_USART6_SERIALDRIVER
+# undef CONFIG_STM32_USART6_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_UART7)
+# undef CONFIG_STM32_UART7_SERIALDRIVER
+# undef CONFIG_STM32_UART7_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_UART8)
+# undef CONFIG_STM32_UART8_SERIALDRIVER
+# undef CONFIG_STM32_UART8_1WIREDRIVER
+#endif
+
+/* Check 1-Wire and U(S)ART conflicts */
+
+#if defined(CONFIG_STM32_USART1_1WIREDRIVER) && defined(CONFIG_STM32_USART1_SERIALDRIVER)
+# error Both CONFIG_STM32_USART1_1WIREDRIVER and CONFIG_STM32_USART1_SERIALDRIVER defined
+# undef CONFIG_STM32_USART1_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_USART2_1WIREDRIVER) && defined(CONFIG_STM32_USART2_SERIALDRIVER)
+# error Both CONFIG_STM32_USART2_1WIREDRIVER and CONFIG_STM32_USART2_SERIALDRIVER defined
+# undef CONFIG_STM32_USART2_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_USART3_1WIREDRIVER) && defined(CONFIG_STM32_USART3_SERIALDRIVER)
+# error Both CONFIG_STM32_USART3_1WIREDRIVER and CONFIG_STM32_USART3_SERIALDRIVER defined
+# undef CONFIG_STM32_USART3_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_UART4_1WIREDRIVER) && defined(CONFIG_STM32_UART4_SERIALDRIVER)
+# error Both CONFIG_STM32_UART4_1WIREDRIVER and CONFIG_STM32_UART4_SERIALDRIVER defined
+# undef CONFIG_STM32_UART4_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_UART5_1WIREDRIVER) && defined(CONFIG_STM32_UART5_SERIALDRIVER)
+# error Both CONFIG_STM32_UART5_1WIREDRIVER and CONFIG_STM32_UART5_SERIALDRIVER defined
+# undef CONFIG_STM32_UART5_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_USART6_1WIREDRIVER) && defined(CONFIG_STM32_USART6_SERIALDRIVER)
+# error Both CONFIG_STM32_USART6_1WIREDRIVER and CONFIG_STM32_USART6_SERIALDRIVER defined
+# undef CONFIG_STM32_USART6_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_UART7_1WIREDRIVER) && defined(CONFIG_STM32_UART7_SERIALDRIVER)
+# error Both CONFIG_STM32_UART7_1WIREDRIVER and CONFIG_STM32_UART7_SERIALDRIVER defined
+# undef CONFIG_STM32_UART7_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_UART8_1WIREDRIVER) && defined(CONFIG_STM32_UART8_SERIALDRIVER)
+# error Both CONFIG_STM32_UART8_1WIREDRIVER and CONFIG_STM32_UART8_SERIALDRIVER defined
+# undef CONFIG_STM32_UART8_1WIREDRIVER
+#endif
+
+/* Is the serial driver enabled? */
+
+#if defined(CONFIG_STM32_USART1_SERIALDRIVER) || defined(CONFIG_STM32_USART2_SERIALDRIVER) || \
+ defined(CONFIG_STM32_USART3_SERIALDRIVER) || defined(CONFIG_STM32_UART4_SERIALDRIVER) || \
+ defined(CONFIG_STM32_UART5_SERIALDRIVER) || defined(CONFIG_STM32_USART6_SERIALDRIVER) || \
+ defined(CONFIG_STM32_UART7_SERIALDRIVER) || defined(CONFIG_STM32_UART8_SERIALDRIVER)
+# define HAVE_SERIALDRIVER 1
+#endif
+
+/* Is the 1-Wire driver? */
+
+#if defined(CONFIG_STM32_USART1_1WIREDRIVER) || defined(CONFIG_STM32_USART2_1WIREDRIVER) || \
+ defined(CONFIG_STM32_USART3_1WIREDRIVER) || defined(CONFIG_STM32_UART4_1WIREDRIVER) || \
+ defined(CONFIG_STM32_UART5_1WIREDRIVER) || defined(CONFIG_STM32_USART6_1WIREDRIVER) || \
+ defined(CONFIG_STM32_UART7_1WIREDRIVER) || defined(CONFIG_STM32_UART8_1WIREDRIVER)
+# define HAVE_1WIREDRIVER 1
#endif
/* Is there a serial console? */
-#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1)
+#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1_SERIALDRIVER)
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef CONFIG_UART4_SERIAL_CONSOLE
@@ -111,7 +190,7 @@
# undef CONFIG_UART8_SERIAL_CONSOLE
# define CONSOLE_UART 1
# define HAVE_CONSOLE 1
-#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART2)
+#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART2_SERIALDRIVER)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef CONFIG_UART4_SERIAL_CONSOLE
@@ -121,7 +200,7 @@
# undef CONFIG_UART8_SERIAL_CONSOLE
# define CONSOLE_UART 2
# define HAVE_CONSOLE 1
-#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART3)
+#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART3_SERIALDRIVER)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_UART4_SERIAL_CONSOLE
@@ -131,7 +210,7 @@
# undef CONFIG_UART8_SERIAL_CONSOLE
# define CONSOLE_UART 3
# define HAVE_CONSOLE 1
-#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4)
+#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4_SERIALDRIVER)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
@@ -141,7 +220,7 @@
# undef CONFIG_UART8_SERIAL_CONSOLE
# define CONSOLE_UART 4
# define HAVE_CONSOLE 1
-#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5)
+#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5_SERIALDRIVER)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
@@ -151,7 +230,7 @@
# undef CONFIG_UART8_SERIAL_CONSOLE
# define CONSOLE_UART 5
# define HAVE_CONSOLE 1
-#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART6)
+#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART6_SERIALDRIVER)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
@@ -161,7 +240,7 @@
# undef CONFIG_UART8_SERIAL_CONSOLE
# define CONSOLE_UART 6
# define HAVE_CONSOLE 1
-#elif defined(CONFIG_UART7_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART7)
+#elif defined(CONFIG_UART7_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART7_SERIALDRIVER)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
@@ -172,7 +251,7 @@
# undef CONFIG_UART8_SERIAL_CONSOLE
# define CONSOLE_UART 7
# define HAVE_CONSOLE 1
-#elif defined(CONFIG_UART8_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART8)
+#elif defined(CONFIG_UART8_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART8_SERIALDRIVER)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
@@ -197,7 +276,7 @@
/* DMA support is only provided if CONFIG_ARCH_DMA is in the NuttX configuration */
-#if !defined(HAVE_UART) || !defined(CONFIG_ARCH_DMA)
+#if !defined(HAVE_SERIALDRIVER) || !defined(CONFIG_ARCH_DMA)
# undef CONFIG_USART1_RXDMA
# undef CONFIG_USART2_RXDMA
# undef CONFIG_USART3_RXDMA
@@ -210,35 +289,35 @@
/* Disable the DMA configuration on all unused USARTs */
-#ifndef CONFIG_STM32_USART1
+#ifndef CONFIG_STM32_USART1_SERIALDRIVER
# undef CONFIG_USART1_RXDMA
#endif
-#ifndef CONFIG_STM32_USART2
+#ifndef CONFIG_STM32_USART2_SERIALDRIVER
# undef CONFIG_USART2_RXDMA
#endif
-#ifndef CONFIG_STM32_USART3
+#ifndef CONFIG_STM32_USART3_SERIALDRIVER
# undef CONFIG_USART3_RXDMA
#endif
-#ifndef CONFIG_STM32_UART4
+#ifndef CONFIG_STM32_UART4_SERIALDRIVER
# undef CONFIG_UART4_RXDMA
#endif
-#ifndef CONFIG_STM32_UART5
+#ifndef CONFIG_STM32_UART5_SERIALDRIVER
# undef CONFIG_UART5_RXDMA
#endif
-#ifndef CONFIG_STM32_USART6
+#ifndef CONFIG_STM32_USART6_SERIALDRIVER
# undef CONFIG_USART6_RXDMA
#endif
-#ifndef CONFIG_STM32_UART7
+#ifndef CONFIG_STM32_UART7_SERIALDRIVER
# undef CONFIG_UART7_RXDMA
#endif
-#ifndef CONFIG_STM32_UART8
+#ifndef CONFIG_STM32_UART8_SERIALDRIVER
# undef CONFIG_UART8_RXDMA
#endif
@@ -276,21 +355,21 @@
/* Is DMA used on all (enabled) USARTs */
#define SERIAL_HAVE_ONLY_DMA 1
-#if defined(CONFIG_STM32_USART1) && !defined(CONFIG_USART1_RXDMA)
+#if defined(CONFIG_STM32_USART1_SERIALDRIVER) && !defined(CONFIG_USART1_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_USART2) && !defined(CONFIG_USART2_RXDMA)
+#elif defined(CONFIG_STM32_USART2_SERIALDRIVER) && !defined(CONFIG_USART2_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_USART3) && !defined(CONFIG_USART3_RXDMA)
+#elif defined(CONFIG_STM32_USART3_SERIALDRIVER) && !defined(CONFIG_USART3_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_UART4) && !defined(CONFIG_UART4_RXDMA)
+#elif defined(CONFIG_STM32_UART4_SERIALDRIVER) && !defined(CONFIG_UART4_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_UART5) && !defined(CONFIG_UART5_RXDMA)
+#elif defined(CONFIG_STM32_UART5_SERIALDRIVER) && !defined(CONFIG_UART5_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_USART6) && !defined(CONFIG_USART6_RXDMA)
+#elif defined(CONFIG_STM32_USART6_SERIALDRIVER) && !defined(CONFIG_USART6_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_UART7) && !defined(CONFIG_UART7_RXDMA)
+#elif defined(CONFIG_STM32_UART7_SERIALDRIVER) && !defined(CONFIG_UART7_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_UART8) && !defined(CONFIG_UART8_RXDMA)
+#elif defined(CONFIG_STM32_UART8_SERIALDRIVER) && !defined(CONFIG_UART8_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
#endif
diff --git a/arch/arm/src/stm32f7/Kconfig b/arch/arm/src/stm32f7/Kconfig
index d31b3a6ea54..e3a8d2b42cd 100644
--- a/arch/arm/src/stm32f7/Kconfig
+++ b/arch/arm/src/stm32f7/Kconfig
@@ -370,14 +370,14 @@ config STM32F7_TIM15
config STM32F7_USART1
bool "USART1"
default n
- select ARCH_HAVE_USART1
+ select USART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
select STM32F7_USART
config STM32F7_USART2
bool "USART2"
default n
- select ARCH_HAVE_USART2
+ select USART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
select STM32F7_USART
@@ -385,42 +385,42 @@ config STM32F7_USART3
bool "USART3"
default n
select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_USART3
+ select USART3_SERIALDRIVER
select STM32F7_USART
config STM32F7_UART4
bool "UART4"
default n
select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
select STM32F7_USART
config STM32F7_UART5
bool "UART5"
default n
select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_UART5
+ select UART5_SERIALDRIVER
select STM32F7_USART
config STM32F7_USART6
bool "USART6"
default n
select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_USART6
+ select USART6_SERIALDRIVER
select STM32F7_USART
config STM32F7_UART7
bool "UART7"
default n
select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_UART7
+ select UART7_SERIALDRIVER
select STM32F7_USART
config STM32F7_UART8
bool "UART8"
default n
select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_UART8
+ select UART8_SERIALDRIVER
select STM32F7_USART
config STM32F7_IWDG
@@ -435,6 +435,255 @@ config STM32F7_WWDG
endmenu
+menu "U[S]ART Configuration"
+ depends on STM32F7_USART
+
+config USART1_RS485
+ bool "RS-485 on USART1"
+ default n
+ depends on STM32F7_USART1
+ ---help---
+ Enable RS-485 interface on USART1. Your board config will have to
+ provide GPIO_USART1_RS485_DIR pin definition. Currently it cannot be
+ used with USART1_RXDMA.
+
+config USART1_RS485_DIR_POLARITY
+ int "USART1 RS-485 DIR pin polarity"
+ default 1
+ range 0 1
+ depends on USART1_RS485
+ ---help---
+ Polarity of DIR pin for RS-485 on USART1. Set to state on DIR pin which
+ enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART1_RXDMA
+ bool "USART1 Rx DMA"
+ default n
+ depends on STM32F7_USART1 && STM32F7_DMA1
+ ---help---
+ In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config USART2_RS485
+ bool "RS-485 on USART2"
+ default n
+ depends on STM32F7_USART2
+ ---help---
+ Enable RS-485 interface on USART2. Your board config will have to
+ provide GPIO_USART2_RS485_DIR pin definition. Currently it cannot be
+ used with USART2_RXDMA.
+
+config USART2_RS485_DIR_POLARITY
+ int "USART2 RS-485 DIR pin polarity"
+ default 1
+ range 0 1
+ depends on USART2_RS485
+ ---help---
+ Polarity of DIR pin for RS-485 on USART2. Set to state on DIR pin which
+ enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART2_RXDMA
+ bool "USART2 Rx DMA"
+ default n
+ depends on STM32F7_USART2 && STM32F7_DMA1
+ ---help---
+ In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config USART3_RS485
+ bool "RS-485 on USART3"
+ default n
+ depends on STM32F7_USART3
+ ---help---
+ Enable RS-485 interface on USART3. Your board config will have to
+ provide GPIO_USART3_RS485_DIR pin definition. Currently it cannot be
+ used with USART3_RXDMA.
+
+config USART3_RS485_DIR_POLARITY
+ int "USART3 RS-485 DIR pin polarity"
+ default 1
+ range 0 1
+ depends on USART3_RS485
+ ---help---
+ Polarity of DIR pin for RS-485 on USART3. Set to state on DIR pin which
+ enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART3_RXDMA
+ bool "USART3 Rx DMA"
+ default n
+ depends on STM32F7_USART3 && STM32F7_DMA1
+ ---help---
+ In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config UART4_RS485
+ bool "RS-485 on UART4"
+ default n
+ depends on STM32F7_UART4
+ ---help---
+ Enable RS-485 interface on UART4. Your board config will have to
+ provide GPIO_UART4_RS485_DIR pin definition. Currently it cannot be
+ used with UART4_RXDMA.
+
+config UART4_RS485_DIR_POLARITY
+ int "UART4 RS-485 DIR pin polarity"
+ default 1
+ range 0 1
+ depends on UART4_RS485
+ ---help---
+ Polarity of DIR pin for RS-485 on UART4. Set to state on DIR pin which
+ enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config UART4_RXDMA
+ bool "UART4 Rx DMA"
+ default n
+ depends on STM32F7_UART4 && STM32F7_DMA1
+ ---help---
+ In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config UART5_RS485
+ bool "RS-485 on UART5"
+ default n
+ depends on STM32F7_UART5
+ ---help---
+ Enable RS-485 interface on UART5. Your board config will have to
+ provide GPIO_UART5_RS485_DIR pin definition. Currently it cannot be
+ used with UART5_RXDMA.
+
+config UART5_RS485_DIR_POLARITY
+ int "UART5 RS-485 DIR pin polarity"
+ default 1
+ range 0 1
+ depends on UART5_RS485
+ ---help---
+ Polarity of DIR pin for RS-485 on UART5. Set to state on DIR pin which
+ enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config UART5_RXDMA
+ bool "UART5 Rx DMA"
+ default n
+ depends on STM32F7_UART5 && STM32F7_DMA1
+ ---help---
+ In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config USART6_RS485
+ bool "RS-485 on USART6"
+ default n
+ depends on STM32F7_USART6
+ ---help---
+ Enable RS-485 interface on USART6. Your board config will have to
+ provide GPIO_USART6_RS485_DIR pin definition. Currently it cannot be
+ used with USART6_RXDMA.
+
+config USART6_RS485_DIR_POLARITY
+ int "USART6 RS-485 DIR pin polarity"
+ default 1
+ range 0 1
+ depends on USART6_RS485
+ ---help---
+ Polarity of DIR pin for RS-485 on USART6. Set to state on DIR pin which
+ enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART6_RXDMA
+ bool "USART6 Rx DMA"
+ default n
+ depends on STM32F7_USART6 && STM32F7_DMA2
+ ---help---
+ In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config UART7_RS485
+ bool "RS-485 on UART7"
+ default n
+ depends on STM32F7_UART7
+ ---help---
+ Enable RS-485 interface on UART7. Your board config will have to
+ provide GPIO_UART7_RS485_DIR pin definition. Currently it cannot be
+ used with UART7_RXDMA.
+
+config UART7_RS485_DIR_POLARITY
+ int "UART7 RS-485 DIR pin polarity"
+ default 1
+ range 0 1
+ depends on UART7_RS485
+ ---help---
+ Polarity of DIR pin for RS-485 on UART7. Set to state on DIR pin which
+ enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config UART7_RXDMA
+ bool "UART7 Rx DMA"
+ default n
+ depends on STM32F7_UART7 && STM32F7_DMA2
+ ---help---
+ In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config UART8_RS485
+ bool "RS-485 on UART8"
+ default n
+ depends on STM32F7_UART8
+ ---help---
+ Enable RS-485 interface on UART8. Your board config will have to
+ provide GPIO_UART8_RS485_DIR pin definition. Currently it cannot be
+ used with UART8_RXDMA.
+
+config UART8_RS485_DIR_POLARITY
+ int "UART8 RS-485 DIR pin polarity"
+ default 1
+ range 0 1
+ depends on UART8_RS485
+ ---help---
+ Polarity of DIR pin for RS-485 on UART8. Set to state on DIR pin which
+ enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config UART8_RXDMA
+ bool "UART8 Rx DMA"
+ default n
+ depends on STM32F7_UART8 && STM32F7_DMA2
+ ---help---
+ In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config SERIAL_DISABLE_REORDERING
+ bool "Disable reordering of ttySx devices."
+ depends on STM32F7_USART1 || STM32F7_USART2 || STM32F7_USART3 || STM32F7_UART4 || STM32F7_UART5 || STM32F7_USART6 || STM32F7_UART7 || STM32F7_UART8
+ default n
+ ---help---
+ NuttX per default reorders the serial ports (/dev/ttySx) so that the
+ console is always on /dev/ttyS0. If more than one UART is in use this
+ can, however, have the side-effect that all port mappings
+ (hardware USART1 -> /dev/ttyS0) change if the console is moved to another
+ UART. This is in particular relevant if a project uses the USB console
+ in some configs and a serial console in other configs, but does not
+ want the side effect of having all serial port names change when just
+ the console is moved from serial to USB.
+
+config STM32F7_FLOWCONTROL_BROKEN
+ bool "Use Software UART RTS flow control"
+ depends on STM32F7_USART
+ default n
+ ---help---
+ Enable UART RTS flow control using Software. Because STM
+ Current STM32 have broken HW based RTS behavior (they assert
+ nRTS after every byte received) Enable this setting workaround
+ this issue by useing software based management of RTS
+
+config STM32F7_USART_BREAKS
+ bool "Add TIOxSBRK to support sending Breaks"
+ depends on STM32F7_USART
+ default n
+ ---help---
+ Add TIOCxBRK routines to send a line break per the STM32 manual, the
+ break will be a pulse based on the value M. This is not a BSD compatible
+ break.
+
+config STM32F7_SERIALBRK_BSDCOMPAT
+ bool "Use GPIO To send Break"
+ depends on STM32F7_USART && STM32F7_USART_BREAKS
+ default n
+ ---help---
+ Enable using GPIO on the TX pin to send a BSD compatible break:
+ TIOCSBRK will start the break and TIOCCBRK will end the break.
+ The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
+ on because the SW starts the break and then the HW automatically clears
+ the break. This makes it is difficult to sent a long break.
+
+endmenu # U[S]ART Configuration
+
config STM32F7_CUSTOM_CLOCKCONFIG
bool "Custom clock configuration"
default n
diff --git a/arch/arm/src/stm32f7/stm32_config.h b/arch/arm/src/stm32f7/stm32_config.h
index 09762b9c6b6..d26fee87139 100644
--- a/arch/arm/src/stm32f7/stm32_config.h
+++ b/arch/arm/src/stm32f7/stm32_config.h
@@ -113,13 +113,13 @@
* for our purposes.
*/
-#ifndef CONFIG_USART0_ISUART
+#ifndef CONFIG_USART0_SERIALDRIVER
# undef CONFIG_STM32F7_USART0
#endif
-#ifndef CONFIG_USART1_ISUART
+#ifndef CONFIG_USART1_SERIALDRIVER
# undef CONFIG_STM32F7_USART1
#endif
-#ifndef CONFIG_USART2_ISUART
+#ifndef CONFIG_USART2_SERIALDRIVER
# undef CONFIG_STM32F7_USART2
#endif
diff --git a/arch/arm/src/stm32f7/stm32_serial.c b/arch/arm/src/stm32f7/stm32_serial.c
index 78810f52f36..5b57549a8ef 100644
--- a/arch/arm/src/stm32f7/stm32_serial.c
+++ b/arch/arm/src/stm32f7/stm32_serial.c
@@ -208,6 +208,22 @@
# define PM_IDLE_DOMAIN 0 /* Revisit */
#endif
+/* Keep track if a Break was set
+ *
+ * Note:
+ *
+ * 1) This value is set in the priv->ie but never written to the control
+ * register. It must not collide with USART_CR1_USED_INTS or USART_CR3_EIE
+ * 2) USART_CR3_EIE is also carried in the up_dev_s ie member.
+ *
+ * See up_restoreusartint where the masking is done.
+ */
+
+#ifdef CONFIG_STM32F7_SERIALBRK_BSDCOMPAT
+# define USART_CR1_IE_BREAK_INPROGRESS_SHFTS 15
+# define USART_CR1_IE_BREAK_INPROGRESS (1 << USART_CR1_IE_BREAK_INPROGRESS_SHFTS)
+#endif
+
#ifdef USE_SERIALDRIVER
#ifdef HAVE_UART
@@ -1817,11 +1833,12 @@ static int up_interrupt_common(struct up_dev_s *priv)
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
-#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT)
+#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) \
+ || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
#endif
-#ifdef CONFIG_SERIAL_TERMIOS
+#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
#endif
int ret = OK;
@@ -1964,30 +1981,74 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
break;
#endif /* CONFIG_SERIAL_TERMIOS */
-#ifdef CONFIG_USART_BREAKS
+#ifdef CONFIG_STM32F7_USART_BREAKS
+# ifdef CONFIG_STM32F7_SERIALBRK_BSDCOMPAT
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
- uint32_t cr2;
irqstate_t flags;
+ uint32_t tx_break;
flags = enter_critical_section();
- cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET);
- up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 | USART_CR2_LINEN);
+
+ /* Disable any further tx activity */
+
+ priv->ie |= USART_CR1_IE_BREAK_INPROGRESS;
+
+ up_txint(dev, false);
+
+ /* Configure TX as a GPIO output pin and Send a break signal*/
+
+ tx_break = GPIO_OUTPUT | (~(GPIO_MODE_MASK|GPIO_OUTPUT_SET) & priv->tx_gpio);
+ stm32_configgpio(tx_break);
+
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
- uint32_t cr2;
irqstate_t flags;
flags = enter_critical_section();
- cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET);
- up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 & ~USART_CR2_LINEN);
+
+ /* Configure TX back to U(S)ART */
+
+ stm32_configgpio(priv->tx_gpio);
+
+ priv->ie &= ~USART_CR1_IE_BREAK_INPROGRESS;
+
+ /* Enable further tx activity */
+
+ up_txint(dev, true);
+
leave_critical_section(flags);
}
break;
+# else
+ case TIOCSBRK: /* No BSD compatibility: Turn break on for M bit times */
+ {
+ uint32_t cr1;
+ irqstate_t flags;
+
+ flags = enter_critical_section();
+ cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
+ up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 | USART_CR1_SBK);
+ leave_critical_section(flags);
+ }
+ break;
+
+ case TIOCCBRK: /* No BSD compatibility: May turn off break too soon */
+ {
+ uint32_t cr1;
+ irqstate_t flags;
+
+ flags = enter_critical_section();
+ cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
+ up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 & ~USART_CR1_SBK);
+ leave_critical_section(flags);
+ }
+ break;
+# endif
#endif
default:
@@ -2400,6 +2461,13 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
}
# endif
+# ifdef CONFIG_STM32_SERIALBRK_BSDCOMPAT
+ if (priv->ie & USART_CR1_IE_BREAK_INPROGRESS)
+ {
+ return;
+ }
+# endif
+
up_restoreusartint(priv, ie);
/* Fake a TX interrupt here by just calling uart_xmitchars() with
diff --git a/arch/arm/src/stm32l4/Kconfig b/arch/arm/src/stm32l4/Kconfig
index f334ca32bc6..eccd8469bfb 100644
--- a/arch/arm/src/stm32l4/Kconfig
+++ b/arch/arm/src/stm32l4/Kconfig
@@ -400,14 +400,14 @@ config STM32L4_SPI3
config STM32L4_USART1
bool "USART1"
default n
- select ARCH_HAVE_USART1
+ select USART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
select STM32L4_USART
config STM32L4_USART2
bool "USART2"
default n
- select ARCH_HAVE_USART2
+ select USART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
select STM32L4_USART
@@ -415,21 +415,21 @@ config STM32L4_USART3
bool "USART3"
default n
select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_USART3
+ select USART3_SERIALDRIVER
select STM32L4_USART
config STM32L4_UART4
bool "UART4"
default n
select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
select STM32L4_USART
config STM32L4_UART5
bool "UART5"
default n
select ARCH_HAVE_SERIAL_TERMIOS
- select ARCH_HAVE_UART5
+ select UART5_SERIALDRIVER
select STM32L4_USART
config STM32L4_I2C1
@@ -520,7 +520,7 @@ config STM32L4_TIM8
config STM32L4_USART1
bool "USART1"
default n
- select ARCH_HAVE_USART1
+ select USART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
select STM32L4_USART
@@ -782,7 +782,27 @@ config STM32L4_FLOWCONTROL_BROKEN
nRTS after every byte received) Enable this setting workaround
this issue by useing software based management of RTS
-endmenu
+config STM32L4_USART_BREAKS
+ bool "Add TIOxSBRK to support sending Breaks"
+ depends on STM32_USART
+ default n
+ ---help---
+ Add TIOCxBRK routines to send a line break per the STM32 manual, the
+ break will be a pulse based on the value M. This is not a BSD compatible
+ break.
+
+config STM32L4_SERIALBRK_BSDCOMPAT
+ bool "Use GPIO To send Break"
+ depends on STM32_USART && STM32_USART_BREAKS
+ default n
+ ---help---
+ Enable using GPIO on the TX pin to send a BSD compatible break:
+ TIOCSBRK will start the break and TIOCCBRK will end the break.
+ The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
+ on because the SW starts the break and then the HW automatically clears
+ the break. This makes it is difficult to sent a long break.
+
+endmenu # U[S]ART Configuration
menu "SPI Configuration"
depends on STM32L4_SPI
@@ -843,4 +863,27 @@ config STM32L4_I2C_DUTY16_9
endmenu
+menu "CAN driver configuration"
+ depends on STM32L4_CAN1
+
+config CAN1_BAUD
+ int "CAN1 BAUD"
+ default 250000
+ depends on STM32L4_CAN1
+ ---help---
+ CAN1 BAUD rate. Required if STM32L4_CAN1 is defined.
+
+config CAN_TSEG1
+ int "TSEG1 quanta"
+ default 6
+ ---help---
+ The number of CAN time quanta in segment 1. Default: 6
+
+config CAN_TSEG2
+ int "TSEG2 quanta"
+ default 7
+ ---help---
+ The number of CAN time quanta in segment 2. Default: 7
+endmenu
+
endif # ARCH_CHIP_STM32L4
diff --git a/arch/arm/src/stm32l4/Make.defs b/arch/arm/src/stm32l4/Make.defs
index fbbb3b53876..7cda554e564 100644
--- a/arch/arm/src/stm32l4/Make.defs
+++ b/arch/arm/src/stm32l4/Make.defs
@@ -1,7 +1,7 @@
############################################################################
# arch/arm/src/stm32l4/Make.defs
#
-# Copyright (C) 2015 Sebastien Lorquet. All rights reserved.
+# Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved.
# Author: Sebastien Lorquet
#
# Redistribution and use in source and binary forms, with or without
@@ -163,12 +163,12 @@ CHIP_CSRCS += stm32l4_exti_pwr.c
endif
ifeq ($(CONFIG_RTC),y)
-CHIP_CSRCS += stm32l4_rtcc.c
ifeq ($(CONFIG_RTC_ALARM),y)
CHIP_CSRCS += stm32l4_exti_alarm.c
endif
ifeq ($(CONFIG_RTC_DRIVER),y)
CHIP_CSRCS += stm32l4_rtc_lowerhalf.c
+CHIP_CSRCS += stm32l4_rtcc.c
endif
endif
@@ -183,3 +183,8 @@ endif
ifeq ($(CONFIG_STM32L4_QSPI),y)
CHIP_CSRCS += stm32l4_qspi.c
endif
+
+ifeq ($(CONFIG_STM32L4_CAN),y)
+CHIP_CSRCS += stm32l4_can.c
+endif
+
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_can.h b/arch/arm/src/stm32l4/chip/stm32l4_can.h
new file mode 100644
index 00000000000..75c48cfeb8a
--- /dev/null
+++ b/arch/arm/src/stm32l4/chip/stm32l4_can.h
@@ -0,0 +1,447 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/chip/stm32l4_can.h
+ *
+ * Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ *
+ * Adaptations for stm32l4:
+ * Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
+ * Author: Sebastien Lorquet
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_CAN_H
+#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_CAN_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include
+
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* 3 TX mailboxes */
+
+#define CAN_TXMBOX1 0
+#define CAN_TXMBOX2 1
+#define CAN_TXMBOX3 2
+
+/* 2 RX mailboxes */
+
+#define CAN_RXMBOX1 0
+#define CAN_RXMBOX2 1
+
+/* Number of filters depends on silicon */
+
+#define CAN_NFILTERS 14
+
+/* Register Offsets *****************************************************************/
+
+/* CAN control and status registers */
+
+#define STM32L4_CAN_MCR_OFFSET 0x0000 /* CAN master control register */
+#define STM32L4_CAN_MSR_OFFSET 0x0004 /* CAN master status register */
+#define STM32L4_CAN_TSR_OFFSET 0x0008 /* CAN transmit status register */
+#define STM32L4_CAN_RF0R_OFFSET 0x000c /* CAN receive FIFO 0 register */
+#define STM32L4_CAN_RF1R_OFFSET 0x0010 /* CAN receive FIFO 1 register */
+#define STM32L4_CAN_IER_OFFSET 0x0014 /* CAN interrupt enable register */
+#define STM32L4_CAN_ESR_OFFSET 0x0018 /* CAN error status register */
+#define STM32L4_CAN_BTR_OFFSET 0x001c /* CAN bit timing register */
+
+/* CAN mailbox registers (3 TX and 2 RX) */
+
+#define STM32L4_CAN_TIR_OFFSET(m) (0x0180+((m)<<4))
+#define STM32L4_CAN_TI0R_OFFSET 0x0180 /* TX mailbox identifier register 0 */
+#define STM32L4_CAN_TI1R_OFFSET 0x0190 /* TX mailbox identifier register 1 */
+#define STM32L4_CAN_TI2R_OFFSET 0x01a0 /* TX mailbox identifier register 2 */
+
+#define STM32L4_CAN_TDTR_OFFSET(m) (0x0184+((m)<<4))
+#define STM32L4_CAN_TDT0R_OFFSET 0x0184 /* Mailbox data length control and time stamp register 0 */
+#define STM32L4_CAN_TDT1R_OFFSET 0x0194 /* Mailbox data length control and time stamp register 1 */
+#define STM32L4_CAN_TDT2R_OFFSET 0x01a4 /* Mailbox data length control and time stamp register 2 */
+
+#define STM32L4_CAN_TDLR_OFFSET(m) (0x0188+((m)<<4))
+#define STM32L4_CAN_TDL0R_OFFSET 0x0188 /* Mailbox data low register 0 */
+#define STM32L4_CAN_TDL1R_OFFSET 0x0198 /* Mailbox data low register 1 */
+#define STM32L4_CAN_TDL2R_OFFSET 0x01a8 /* Mailbox data low register 2 */
+
+#define STM32L4_CAN_TDHR_OFFSET(m) (0x018c+((m)<<4))
+#define STM32L4_CAN_TDH0R_OFFSET 0x018c /* Mailbox data high register 0 */
+#define STM32L4_CAN_TDH1R_OFFSET 0x019c /* Mailbox data high register 1 */
+#define STM32L4_CAN_TDH2R_OFFSET 0x01ac /* Mailbox data high register 2 */
+
+#define STM32L4_CAN_RIR_OFFSET(m) (0x01b0+((m)<<4))
+#define STM32L4_CAN_RI0R_OFFSET 0x01b0 /* Rx FIFO mailbox identifier register 0 */
+#define STM32L4_CAN_RI1R_OFFSET 0x01c0 /* Rx FIFO mailbox identifier register 1 */
+
+#define STM32L4_CAN_RDTR_OFFSET(m) (0x01b4+((m)<<4))
+#define STM32L4_CAN_RDT0R_OFFSET 0x01b4 /* Rx FIFO mailbox data length control and time stamp register 0 */
+#define STM32L4_CAN_RDT1R_OFFSET 0x01c4 /* Rx FIFO mailbox data length control and time stamp register 1 */
+
+#define STM32L4_CAN_RDLR_OFFSET(m) (0x01b8+((m)<<4))
+#define STM32L4_CAN_RDL0R_OFFSET 0x01b8 /* Receive FIFO mailbox data low register 0 */
+#define STM32L4_CAN_RDL1R_OFFSET 0x01c8 /* Receive FIFO mailbox data low register 1 */
+
+#define STM32L4_CAN_RDHR_OFFSET(m) (0x01bc+((m)<<4))
+#define STM32L4_CAN_RDH0R_OFFSET 0x01bc /* Receive FIFO mailbox data high register 0 */
+#define STM32L4_CAN_RDH1R_OFFSET 0x01cc /* Receive FIFO mailbox data high register 1 */
+
+/* CAN filter registers */
+
+#define STM32L4_CAN_FMR_OFFSET 0x0200 /* CAN filter master register */
+#define STM32L4_CAN_FM1R_OFFSET 0x0204 /* CAN filter mode register */
+#define STM32L4_CAN_FS1R_OFFSET 0x020c /* CAN filter scale register */
+#define STM32L4_CAN_FFA1R_OFFSET 0x0214 /* CAN filter FIFO assignment register */
+#define STM32L4_CAN_FA1R_OFFSET 0x021c /* CAN filter activation register */
+
+/* There are 14 or 28 filter banks (depending) on the device. Each filter bank is
+ * composed of two 32-bit registers, CAN_FiR:
+ * F0R1 Offset 0x240
+ * F0R2 Offset 0x244
+ * F1R1 Offset 0x248
+ * F1R2 Offset 0x24c
+ * ...
+ */
+
+#define STM32L4_CAN_FIR_OFFSET(f,i) (0x240+((f)<<3)+(((i)-1)<<2))
+
+/* Register Addresses ***************************************************************/
+
+#if STM32L4_NCAN > 0
+# define STM32L4_CAN1_MCR (STM32L4_CAN1_BASE+STM32L4_CAN_MCR_OFFSET)
+# define STM32L4_CAN1_MSR (STM32L4_CAN1_BASE+STM32L4_CAN_MSR_OFFSET)
+# define STM32L4_CAN1_TSR (STM32L4_CAN1_BASE+STM32L4_CAN_TSR_OFFSET)
+# define STM32L4_CAN1_RF0R (STM32L4_CAN1_BASE+STM32L4_CAN_RF0R_OFFSET)
+# define STM32L4_CAN1_RF1R (STM32L4_CAN1_BASE+STM32L4_CAN_RF1R_OFFSET)
+# define STM32L4_CAN1_IER (STM32L4_CAN1_BASE+STM32L4_CAN_IER_OFFSET)
+# define STM32L4_CAN1_ESR (STM32L4_CAN1_BASE+STM32L4_CAN_ESR_OFFSET)
+# define STM32L4_CAN1_BTR (STM32L4_CAN1_BASE+STM32L4_CAN_BTR_OFFSET)
+
+# define STM32L4_CAN1_TIR(m) (STM32L4_CAN1_BASE+STM32L4_CAN_TIR_OFFSET(m))
+# define STM32L4_CAN1_TI0R (STM32L4_CAN1_BASE+STM32L4_CAN_TI0R_OFFSET)
+# define STM32L4_CAN1_TI1R (STM32L4_CAN1_BASE+STM32L4_CAN_TI1R_OFFSET)
+# define STM32L4_CAN1_TI2R (STM32L4_CAN1_BASE+STM32L4_CAN_TI2R_OFFSET)
+
+# define STM32L4_CAN1_TDTR(m) (STM32L4_CAN1_BASE+STM32L4_CAN_TDTR_OFFSET(m))
+# define STM32L4_CAN1_TDT0R (STM32L4_CAN1_BASE+STM32L4_CAN_TDT0R_OFFSET)
+# define STM32L4_CAN1_TDT1R (STM32L4_CAN1_BASE+STM32L4_CAN_TDT1R_OFFSET)
+# define STM32L4_CAN1_TDT2R (STM32L4_CAN1_BASE+STM32L4_CAN_TDT2R_OFFSET)
+
+# define STM32L4_CAN1_TDLR(m) (STM32L4_CAN1_BASE+STM32L4_CAN_TDLR_OFFSET(m))
+# define STM32L4_CAN1_TDL0R (STM32L4_CAN1_BASE+STM32L4_CAN_TDL0R_OFFSET)
+# define STM32L4_CAN1_TDL1R (STM32L4_CAN1_BASE+STM32L4_CAN_TDL1R_OFFSET)
+# define STM32L4_CAN1_TDL2R (STM32L4_CAN1_BASE+STM32L4_CAN_TDL2R_OFFSET)
+
+# define STM32L4_CAN1_TDHR(m) (STM32L4_CAN1_BASE+STM32L4_CAN_TDHR_OFFSET(m))
+# define STM32L4_CAN1_TDH0R (STM32L4_CAN1_BASE+STM32L4_CAN_TDH0R_OFFSET)
+# define STM32L4_CAN1_TDH1R (STM32L4_CAN1_BASE+STM32L4_CAN_TDH1R_OFFSET)
+# define STM32L4_CAN1_TDH2R (STM32L4_CAN1_BASE+STM32L4_CAN_TDH2R_OFFSET)
+
+# define STM32L4_CAN1_RIR(m) (STM32L4_CAN1_BASE+STM32L4_CAN_RIR_OFFSET(m))
+# define STM32L4_CAN1_RI0R (STM32L4_CAN1_BASE+STM32L4_CAN_RI0R_OFFSET)
+# define STM32L4_CAN1_RI1R (STM32L4_CAN1_BASE+STM32L4_CAN_RI1R_OFFSET)
+
+# define STM32L4_CAN1_RDTR(m) (STM32L4_CAN1_BASE+STM32L4_CAN_RDTR_OFFSET(m))
+# define STM32L4_CAN1_RDT0R (STM32L4_CAN1_BASE+STM32L4_CAN_RDT0R_OFFSET)
+# define STM32L4_CAN1_RDT1R (STM32L4_CAN1_BASE+STM32L4_CAN_RDT1R_OFFSET)
+
+# define STM32L4_CAN1_RDLR(m) (STM32L4_CAN1_BASE+STM32L4_CAN_RDLR_OFFSET(m))
+# define STM32L4_CAN1_RDL0R (STM32L4_CAN1_BASE+STM32L4_CAN_RDL0R_OFFSET)
+# define STM32L4_CAN1_RDL1R (STM32L4_CAN1_BASE+STM32L4_CAN_RDL1R_OFFSET)
+
+# define STM32L4_CAN1_RDHR(m) (STM32L4_CAN1_BASE+STM32L4_CAN_RDHR_OFFSET(m))
+# define STM32L4_CAN1_RDH0R (STM32L4_CAN1_BASE+STM32L4_CAN_RDH0R_OFFSET)
+# define STM32L4_CAN1_RDH1R (STM32L4_CAN1_BASE+STM32L4_CAN_RDH1R_OFFSET)
+
+# define STM32L4_CAN1_FMR (STM32L4_CAN1_BASE+STM32L4_CAN_FMR_OFFSET)
+# define STM32L4_CAN1_FM1R (STM32L4_CAN1_BASE+STM32L4_CAN_FM1R_OFFSET)
+# define STM32L4_CAN1_FS1R (STM32L4_CAN1_BASE+STM32L4_CAN_FS1R_OFFSET)
+# define STM32L4_CAN1_FFA1R (STM32L4_CAN1_BASE+STM32L4_CAN_FFA1R_OFFSET)
+# define STM32L4_CAN1_FA1R (STM32L4_CAN1_BASE+STM32L4_CAN_FA1R_OFFSET)
+# define STM32L4_CAN1_FIR(b,i) (STM32L4_CAN1_BASE+STM32L4_CAN_FIR_OFFSET(b,i))
+#endif
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* CAN master control register */
+
+#define CAN_MCR_INRQ (1 << 0) /* Bit 0: Initialization Request */
+#define CAN_MCR_SLEEP (1 << 1) /* Bit 1: Sleep Mode Request */
+#define CAN_MCR_TXFP (1 << 2) /* Bit 2: Transmit FIFO Priority */
+#define CAN_MCR_RFLM (1 << 3) /* Bit 3: Receive FIFO Locked Mode */
+#define CAN_MCR_NART (1 << 4) /* Bit 4: No Automatic Retransmission */
+#define CAN_MCR_AWUM (1 << 5) /* Bit 5: Automatic Wakeup Mode */
+#define CAN_MCR_ABOM (1 << 6) /* Bit 6: Automatic Bus-Off Management */
+#define CAN_MCR_TTCM (1 << 7) /* Bit 7: Time Triggered Communication Mode Enable */
+#define CAN_MCR_RESET (1 << 15) /* Bit 15: bxCAN software master reset */
+#define CAN_MCR_DBF (1 << 16) /* Bit 16: Debug freeze */
+
+/* CAN master status register */
+
+#define CAN_MSR_INAK (1 << 0) /* Bit 0: Initialization Acknowledge */
+#define CAN_MSR_SLAK (1 << 1) /* Bit 1: Sleep Acknowledge */
+#define CAN_MSR_ERRI (1 << 2) /* Bit 2: Error Interrupt */
+#define CAN_MSR_WKUI (1 << 3) /* Bit 3: Wakeup Interrupt */
+#define CAN_MSR_SLAKI (1 << 4) /* Bit 4: Sleep acknowledge interrupt */
+#define CAN_MSR_TXM (1 << 8) /* Bit 8: Transmit Mode */
+#define CAN_MSR_RXM (1 << 9) /* Bit 9: Receive Mode */
+#define CAN_MSR_SAMP (1 << 10) /* Bit 10: Last Sample Point */
+#define CAN_MSR_RX (1 << 11) /* Bit 11: CAN Rx Signal */
+
+/* CAN transmit status register */
+
+#define CAN_TSR_RQCP0 (1 << 0) /* Bit 0: Request Completed Mailbox 0 */
+#define CAN_TSR_TXOK0 (1 << 1) /* Bit 1 : Transmission OK of Mailbox 0 */
+#define CAN_TSR_ALST0 (1 << 2) /* Bit 2 : Arbitration Lost for Mailbox 0 */
+#define CAN_TSR_TERR0 (1 << 3) /* Bit 3 : Transmission Error of Mailbox 0 */
+#define CAN_TSR_ABRQ0 (1 << 7) /* Bit 7 : Abort Request for Mailbox 0 */
+#define CAN_TSR_RQCP1 (1 << 8) /* Bit 8 : Request Completed Mailbox 1 */
+#define CAN_TSR_TXOK1 (1 << 9) /* Bit 9 : Transmission OK of Mailbox 1 */
+#define CAN_TSR_ALST1 (1 << 10) /* Bit 10 : Arbitration Lost for Mailbox 1 */
+#define CAN_TSR_TERR1 (1 << 11) /* Bit 11 : Transmission Error of Mailbox 1 */
+#define CAN_TSR_ABRQ1 (1 << 15) /* Bit 15 : Abort Request for Mailbox 1 */
+#define CAN_TSR_RQCP2 (1 << 16) /* Bit 16 : Request Completed Mailbox 2 */
+#define CAN_TSR_TXOK2 (1 << 17) /* Bit 17 : Transmission OK of Mailbox 2 */
+#define CAN_TSR_ALST2 (1 << 18) /* Bit 18: Arbitration Lost for Mailbox 2 */
+#define CAN_TSR_TERR2 (1 << 19) /* Bit 19: Transmission Error of Mailbox 2 */
+#define CAN_TSR_ABRQ2 (1 << 23) /* Bit 23: Abort Request for Mailbox 2 */
+#define CAN_TSR_CODE_SHIFT (24) /* Bits 25-24: Mailbox Code */
+#define CAN_TSR_CODE_MASK (3 << CAN_TSR_CODE_SHIFT)
+#define CAN_TSR_TME0 (1 << 26) /* Bit 26: Transmit Mailbox 0 Empty */
+#define CAN_TSR_TME1 (1 << 27) /* Bit 27: Transmit Mailbox 1 Empty */
+#define CAN_TSR_TME2 (1 << 28) /* Bit 28: Transmit Mailbox 2 Empty */
+#define CAN_TSR_LOW0 (1 << 29) /* Bit 29: Lowest Priority Flag for Mailbox 0 */
+#define CAN_TSR_LOW1 (1 << 30) /* Bit 30: Lowest Priority Flag for Mailbox 1 */
+#define CAN_TSR_LOW2 (1 << 31) /* Bit 31: Lowest Priority Flag for Mailbox 2 */
+
+/* CAN receive FIFO 0/1 registers */
+
+#define CAN_RFR_FMP_SHIFT (0) /* Bits 1-0: FIFO Message Pending */
+#define CAN_RFR_FMP_MASK (3 << CAN_RFR_FMP_SHIFT)
+#define CAN_RFR_FULL (1 << 3) /* Bit 3: FIFO 0 Full */
+#define CAN_RFR_FOVR (1 << 4) /* Bit 4: FIFO 0 Overrun */
+#define CAN_RFR_RFOM (1 << 5) /* Bit 5: Release FIFO 0 Output Mailbox */
+
+/* CAN interrupt enable register */
+
+#define CAN_IER_TMEIE (1 << 0) /* Bit 0: Transmit Mailbox Empty Interrupt Enable */
+#define CAN_IER_FMPIE0 (1 << 1) /* Bit 1: FIFO Message Pending Interrupt Enable */
+#define CAN_IER_FFIE0 (1 << 2) /* Bit 2: FIFO Full Interrupt Enable */
+#define CAN_IER_FOVIE0 (1 << 3) /* Bit 3: FIFO Overrun Interrupt Enable */
+#define CAN_IER_FMPIE1 (1 << 4) /* Bit 4: FIFO Message Pending Interrupt Enable */
+#define CAN_IER_FFIE1 (1 << 5) /* Bit 5: FIFO Full Interrupt Enable */
+#define CAN_IER_FOVIE1 (1 << 6) /* Bit 6: FIFO Overrun Interrupt Enable */
+#define CAN_IER_EWGIE (1 << 8) /* Bit 8: Error Warning Interrupt Enable */
+#define CAN_IER_EPVIE (1 << 9) /* Bit 9: Error Passive Interrupt Enable */
+#define CAN_IER_BOFIE (1 << 10) /* Bit 10: Bus-Off Interrupt Enable */
+#define CAN_IER_LECIE (1 << 11) /* Bit 11: Last Error Code Interrupt Enable */
+#define CAN_IER_ERRIE (1 << 15) /* Bit 15: Error Interrupt Enable */
+#define CAN_IER_WKUIE (1 << 16) /* Bit 16: Wakeup Interrupt Enable */
+#define CAN_IER_SLKIE (1 << 17) /* Bit 17: Sleep Interrupt Enable */
+
+/* CAN error status register */
+
+#define CAN_ESR_EWGF (1 << 0) /* Bit 0: Error Warning Flag */
+#define CAN_ESR_EPVF (1 << 1) /* Bit 1: Error Passive Flag */
+#define CAN_ESR_BOFF (1 << 2) /* Bit 2: Bus-Off Flag */
+#define CAN_ESR_LEC_SHIFT (4) /* Bits 6-4: Last Error Code */
+#define CAN_ESR_LEC_MASK (7 << CAN_ESR_LEC_SHIFT)
+# define CAN_ESR_NOERROR (0 << CAN_ESR_LEC_SHIFT) /* 000: No Error */
+# define CAN_ESR_STUFFERROR (1 << CAN_ESR_LEC_SHIFT) /* 001: Stuff Error */
+# define CAN_ESR_FORMERROR (2 << CAN_ESR_LEC_SHIFT) /* 010: Form Error */
+# define CAN_ESR_ACKERROR (3 << CAN_ESR_LEC_SHIFT) /* 011: Acknowledgment Error */
+# define CAN_ESR_BRECERROR (4 << CAN_ESR_LEC_SHIFT) /* 100: Bit recessive Error */
+# define CAN_ESR_BDOMERROR (5 << CAN_ESR_LEC_SHIFT) /* 101: Bit dominant Error */
+# define CAN_ESR_CRCERRPR (6 << CAN_ESR_LEC_SHIFT) /* 110: CRC Error */
+# define CAN_ESR_SWERROR (7 << CAN_ESR_LEC_SHIFT) /* 111: Set by software */
+#define CAN_ESR_TEC_SHIFT (16) /* Bits 23-16: LS byte of the 9-bit Transmit Error Counter */
+#define CAN_ESR_TEC_MASK (0xff << CAN_ESR_TEC_SHIF)
+#define CAN_ESR_REC_SHIFT (24) /* Bits 31-24: Receive Error Counter */
+#define CAN_ESR_REC_MASK (0xff << CAN_ESR_REC_SHIFT)
+
+/* CAN bit timing register */
+
+#define CAN_BTR_BRP_SHIFT (0) /* Bits 9-0: Baud Rate Prescaler */
+#define CAN_BTR_BRP_MASK (0x03ff << CAN_BTR_BRP_SHIFT)
+#define CAN_BTR_TS1_SHIFT (16) /* Bits 19-16: Time Segment 1 */
+#define CAN_BTR_TS1_MASK (0x0f << CAN_BTR_TS1_SHIFT)
+#define CAN_BTR_TS2_SHIFT (20) /* Bits 22-20: Time Segment 2 */
+#define CAN_BTR_TS2_MASK (7 << CAN_BTR_TS2_SHIFT)
+#define CAN_BTR_SJW_SHIFT (24) /* Bits 25-24: Resynchronization Jump Width */
+#define CAN_BTR_SJW_MASK (3 << CAN_BTR_SJW_SHIFT)
+#define CAN_BTR_LBKM (1 << 30) /* Bit 30: Loop Back Mode (Debug) */
+#define CAN_BTR_SILM (1 << 31) /* Bit 31: Silent Mode (Debug) */
+
+#define CAN_BTR_BRP_MAX (1024) /* Maximum BTR value (without decrement) */
+#define CAN_BTR_TSEG1_MAX (16) /* Maximum TSEG1 value (without decrement) */
+#define CAN_BTR_TSEG2_MAX (8) /* Maximum TSEG2 value (without decrement) */
+
+/* TX mailbox identifier register */
+
+#define CAN_TIR_TXRQ (1 << 0) /* Bit 0: Transmit Mailbox Request */
+#define CAN_TIR_RTR (1 << 1) /* Bit 1: Remote Transmission Request */
+#define CAN_TIR_IDE (1 << 2) /* Bit 2: Identifier Extension */
+#define CAN_TIR_EXID_SHIFT (3) /* Bit 3-31: Extended Identifier */
+#define CAN_TIR_EXID_MASK (0x1fffffff << CAN_TIR_EXID_SHIFT)
+#define CAN_TIR_STID_SHIFT (21) /* Bits 21-31: Standard Identifier */
+#define CAN_TIR_STID_MASK (0x07ff << CAN_TIR_STID_SHIFT)
+
+/* Mailbox data length control and time stamp register */
+
+#define CAN_TDTR_DLC_SHIFT (0) /* Bits 3:0: Data Length Code */
+#define CAN_TDTR_DLC_MASK (0x0f << CAN_TDTR_DLC_SHIFT)
+#define CAN_TDTR_TGT (1 << 8) /* Bit 8: Transmit Global Time */
+#define CAN_TDTR_TIME_SHIFT (16) /* Bits 31:16: Message Time Stamp */
+#define CAN_TDTR_TIME_MASK (0xffff << CAN_TDTR_TIME_SHIFT)
+
+/* Mailbox data low register */
+
+#define CAN_TDLR_DATA0_SHIFT (0) /* Bits 7-0: Data Byte 0 */
+#define CAN_TDLR_DATA0_MASK (0xff << CAN_TDLR_DATA0_SHIFT)
+#define CAN_TDLR_DATA1_SHIFT (8) /* Bits 15-8: Data Byte 1 */
+#define CAN_TDLR_DATA1_MASK (0xff << CAN_TDLR_DATA1_SHIFT)
+#define CAN_TDLR_DATA2_SHIFT (16) /* Bits 23-16: Data Byte 2 */
+#define CAN_TDLR_DATA2_MASK (0xff << CAN_TDLR_DATA2_SHIFT)
+#define CAN_TDLR_DATA3_SHIFT (24) /* Bits 31-24: Data Byte 3 */
+#define CAN_TDLR_DATA3_MASK (0xff << CAN_TDLR_DATA3_SHIFT)
+
+/* Mailbox data high register */
+
+#define CAN_TDHR_DATA4_SHIFT (0) /* Bits 7-0: Data Byte 4 */
+#define CAN_TDHR_DATA4_MASK (0xff << CAN_TDHR_DATA4_SHIFT)
+#define CAN_TDHR_DATA5_SHIFT (8) /* Bits 15-8: Data Byte 5 */
+#define CAN_TDHR_DATA5_MASK (0xff << CAN_TDHR_DATA5_SHIFT)
+#define CAN_TDHR_DATA6_SHIFT (16) /* Bits 23-16: Data Byte 6 */
+#define CAN_TDHR_DATA6_MASK (0xff << CAN_TDHR_DATA6_SHIFT)
+#define CAN_TDHR_DATA7_SHIFT (24) /* Bits 31-24: Data Byte 7 */
+#define CAN_TDHR_DATA7_MASK (0xff << CAN_TDHR_DATA7_SHIFT)
+
+/* Rx FIFO mailbox identifier register */
+
+#define CAN_RIR_RTR (1 << 1) /* Bit 1: Remote Transmission Request */
+#define CAN_RIR_IDE (1 << 2) /* Bit 2: Identifier Extension */
+#define CAN_RIR_EXID_SHIFT (3) /* Bit 3-31: Extended Identifier */
+#define CAN_RIR_EXID_MASK (0x1fffffff << CAN_RIR_EXID_SHIFT)
+#define CAN_RIR_STID_SHIFT (21) /* Bits 21-31: Standard Identifier */
+#define CAN_RIR_STID_MASK (0x07ff << CAN_RIR_STID_SHIFT)
+
+/* Receive FIFO mailbox data length control and time stamp register */
+
+#define CAN_RDTR_DLC_SHIFT (0) /* Bits 3:0: Data Length Code */
+#define CAN_RDTR_DLC_MASK (0x0f << CAN_RDTR_DLC_SHIFT)
+#define CAN_RDTR_FM_SHIFT (8) /* Bits 15-8: Filter Match Index */
+#define CAN_RDTR_FM_MASK (0xff << CAN_RDTR_FM_SHIFT)
+#define CAN_RDTR_TIME_SHIFT (16) /* Bits 31:16: Message Time Stamp */
+#define CAN_RDTR_TIME_MASK (0xffff << CAN_RDTR_TIME_SHIFT)
+
+/* Receive FIFO mailbox data low register */
+
+#define CAN_RDLR_DATA0_SHIFT (0) /* Bits 7-0: Data Byte 0 */
+#define CAN_RDLR_DATA0_MASK (0xff << CAN_RDLR_DATA0_SHIFT)
+#define CAN_RDLR_DATA1_SHIFT (8) /* Bits 15-8: Data Byte 1 */
+#define CAN_RDLR_DATA1_MASK (0xff << CAN_RDLR_DATA1_SHIFT)
+#define CAN_RDLR_DATA2_SHIFT (16) /* Bits 23-16: Data Byte 2 */
+#define CAN_RDLR_DATA2_MASK (0xff << CAN_RDLR_DATA2_SHIFT)
+#define CAN_RDLR_DATA3_SHIFT (24) /* Bits 31-24: Data Byte 3 */
+#define CAN_RDLR_DATA3_MASK (0xff << CAN_RDLR_DATA3_SHIFT)
+
+/* Receive FIFO mailbox data high register */
+
+#define CAN_RDHR_DATA4_SHIFT (0) /* Bits 7-0: Data Byte 4 */
+#define CAN_RDHR_DATA4_MASK (0xff << CAN_RDHR_DATA4_SHIFT)
+#define CAN_RDHR_DATA5_SHIFT (8) /* Bits 15-8: Data Byte 5 */
+#define CAN_RDHR_DATA5_MASK (0xff << CAN_RDHR_DATA5_SHIFT)
+#define CAN_RDHR_DATA6_SHIFT (16) /* Bits 23-16: Data Byte 6 */
+#define CAN_RDHR_DATA6_MASK (0xff << CAN_RDHR_DATA6_SHIFT)
+#define CAN_RDHR_DATA7_SHIFT (24) /* Bits 31-24: Data Byte 7 */
+#define CAN_RDHR_DATA7_MASK (0xff << CAN_RDHR_DATA7_SHIFT)
+
+/* CAN filter master register */
+
+#define CAN_FMR_FINIT (1 << 0) /* Bit 0: Filter Init Mode */
+
+/* CAN filter mode register */
+
+#if defined(CONFIG_STM32L4_CONNECTIVITYLINE) || defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
+# define CAN_FM1R_FBM_SHIFT (0) /* Bits 13:0: Filter Mode */
+# define CAN_FM1R_FBM_MASK (0x3fff << CAN_FM1R_FBM_SHIFT)
+#else
+# define CAN_FM1R_FBM_SHIFT (0) /* Bits 27:0: Filter Mode */
+# define CAN_FM1R_FBM_MASK (0x0fffffff << CAN_FM1R_FBM_SHIFT)
+#endif
+
+/* CAN filter scale register */
+
+#if defined(CONFIG_STM32L4_CONNECTIVITYLINE) || defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
+# define CAN_FS1R_FSC_SHIFT (0) /* Bits 13:0: Filter Scale Configuration */
+# define CAN_FS1R_FSC_MASK (0x3fff << CAN_FS1R_FSC_SHIFT)
+#else
+# define CAN_FS1R_FSC_SHIFT (0) /* Bits 27:0: Filter Scale Configuration */
+# define CAN_FS1R_FSC_MASK (0x0fffffff << CAN_FS1R_FSC_SHIFT)
+#endif
+
+/* CAN filter FIFO assignment register */
+
+#if defined(CONFIG_STM32L4_CONNECTIVITYLINE) || defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
+# define CAN_FFA1R_FFA_SHIFT (0) /* Bits 13:0: Filter FIFO Assignment */
+# define CAN_FFA1R_FFA_MASK (0x3fff << CAN_FFA1R_FFA_SHIFT)
+#else
+# define CAN_FFA1R_FFA_SHIFT (0) /* Bits 27:0: Filter FIFO Assignment */
+# define CAN_FFA1R_FFA_MASK (0x0fffffff << CAN_FFA1R_FFA_SHIFT)
+#endif
+
+/* CAN filter activation register */
+
+#if defined(CONFIG_STM32L4_CONNECTIVITYLINE) || defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
+# define CAN_FA1R_FACT_SHIFT (0) /* Bits 13:0: Filter Active */
+# define CAN_FA1R_FACT_MASK (0x3fff << CAN_FA1R_FACT_SHIFT)
+#else
+# define CAN_FA1R_FACT_SHIFT (0) /* Bits 27:0: Filter Active */
+# define CAN_FA1R_FACT_MASK (0x0fffffff << CAN_FA1R_FACT_SHIFT)
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_CAN_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_can.c b/arch/arm/src/stm32l4/stm32l4_can.c
new file mode 100644
index 00000000000..81efb677d2c
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_can.c
@@ -0,0 +1,1598 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_can.c
+ *
+ * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ *
+ * Adaptations for stm32l4:
+ * Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
+ * Author: Sebastien Lorquet
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "stm32l4.h"
+#include "stm32l4_can.h"
+
+#if defined(CONFIG_CAN) && defined(CONFIG_STM32L4_CAN1)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Delays *******************************************************************/
+/* Time out for INAK bit */
+
+#define INAK_TIMEOUT 65535
+
+/* Mailboxes ****************************************************************/
+
+#define CAN_ALL_MAILBOXES (CAN_TSR_TME0 | CAN_TSR_TME1 | CAN_TSR_TME2)
+
+/* Bit timing ***************************************************************/
+
+#define CAN_BIT_QUANTA (CONFIG_CAN_TSEG1 + CONFIG_CAN_TSEG2 + 1)
+
+/* Debug ********************************************************************/
+/* Non-standard debug that may be enabled just for testing CAN */
+
+#ifdef CONFIG_DEBUG_CAN
+# define candbg dbg
+# define canvdbg vdbg
+# define canlldbg lldbg
+# define canllvdbg llvdbg
+#else
+# define candbg(x...)
+# define canvdbg(x...)
+# define canlldbg(x...)
+# define canllvdbg(x...)
+#endif
+
+#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
+# undef CONFIG_CAN_REGDEBUG
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct stm32l4_can_s
+{
+ uint8_t port; /* CAN port number (1 or 2) */
+ uint8_t canrx0; /* CAN RX FIFO 0 IRQ number */
+ uint8_t cantx; /* CAN TX IRQ number */
+ uint8_t filter; /* Filter number */
+ uint32_t base; /* Base address of the CAN control registers */
+ uint32_t fbase; /* Base address of the CAN filter registers */
+ uint32_t baud; /* Configured baud */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* CAN Register access */
+
+static uint32_t can_getreg(struct stm32l4_can_s *priv, int offset);
+static uint32_t can_getfreg(struct stm32l4_can_s *priv, int offset);
+static void can_putreg(struct stm32l4_can_s *priv, int offset, uint32_t value);
+static void can_putfreg(struct stm32l4_can_s *priv, int offset, uint32_t value);
+#ifdef CONFIG_CAN_REGDEBUG
+static void can_dumpctrlregs(struct stm32l4_can_s *priv, FAR const char *msg);
+static void can_dumpmbregs(struct stm32l4_can_s *priv, FAR const char *msg);
+static void can_dumpfiltregs(struct stm32l4_can_s *priv, FAR const char *msg);
+#else
+# define can_dumpctrlregs(priv,msg)
+# define can_dumpmbregs(priv,msg)
+# define can_dumpfiltregs(priv,msg)
+#endif
+
+/* CAN driver methods */
+
+static void can_reset(FAR struct can_dev_s *dev);
+static int can_setup(FAR struct can_dev_s *dev);
+static void can_shutdown(FAR struct can_dev_s *dev);
+static void can_rxint(FAR struct can_dev_s *dev, bool enable);
+static void can_txint(FAR struct can_dev_s *dev, bool enable);
+static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg);
+static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id);
+static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg);
+static bool can_txready(FAR struct can_dev_s *dev);
+static bool can_txempty(FAR struct can_dev_s *dev);
+
+/* CAN interrupt handling */
+
+static int can_rx0interrupt(int irq, void *context);
+static int can_txinterrupt(int irq, void *context);
+
+/* Initialization */
+
+static int can_bittiming(struct stm32l4_can_s *priv);
+static int can_cellinit(struct stm32l4_can_s *priv);
+static int can_filterinit(struct stm32l4_can_s *priv);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct can_ops_s g_canops =
+{
+ .co_reset = can_reset,
+ .co_setup = can_setup,
+ .co_shutdown = can_shutdown,
+ .co_rxint = can_rxint,
+ .co_txint = can_txint,
+ .co_ioctl = can_ioctl,
+ .co_remoterequest = can_remoterequest,
+ .co_send = can_send,
+ .co_txready = can_txready,
+ .co_txempty = can_txempty,
+};
+
+#ifdef CONFIG_STM32L4_CAN1
+static struct stm32l4_can_s g_can1priv =
+{
+ .port = 1,
+ .canrx0 = STM32L4_IRQ_CAN1RX0,
+ .cantx = STM32L4_IRQ_CAN1TX,
+ .filter = 0,
+ .base = STM32L4_CAN1_BASE,
+ .fbase = STM32L4_CAN1_BASE,
+ .baud = CONFIG_CAN1_BAUD,
+};
+
+static struct can_dev_s g_can1dev =
+{
+ .cd_ops = &g_canops,
+ .cd_priv = &g_can1priv,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: can_getreg
+ * Name: can_getfreg
+ *
+ * Description:
+ * Read the value of a CAN register or filter block register.
+ *
+ * Input Parameters:
+ * priv - A reference to the CAN block status
+ * offset - The offset to the register to read
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_REGDEBUG
+static uint32_t can_vgetreg(uint32_t addr)
+{
+ static uint32_t prevaddr = 0;
+ static uint32_t preval = 0;
+ static uint32_t count = 0;
+
+ /* Read the value from the register */
+
+ uint32_t val = getreg32(addr);
+
+ /* Is this the same value that we read from the same register last time?
+ * Are we polling the register? If so, suppress some of the output.
+ */
+
+ if (addr == prevaddr && val == preval)
+ {
+ if (count == 0xffffffff || ++count > 3)
+ {
+ if (count == 4)
+ {
+ lldbg("...\n");
+ }
+
+ return val;
+ }
+ }
+
+ /* No this is a new address or value */
+
+ else
+ {
+ /* Did we print "..." for the previous value? */
+
+ if (count > 3)
+ {
+ /* Yes.. then show how many times the value repeated */
+
+ lldbg("[repeats %d more times]\n", count-3);
+ }
+
+ /* Save the new address, value, and count */
+
+ prevaddr = addr;
+ preval = val;
+ count = 1;
+ }
+
+ /* Show the register value read */
+
+ lldbg("%08x->%08x\n", addr, val);
+ return val;
+}
+
+static uint32_t can_getreg(struct stm32l4_can_s *priv, int offset)
+{
+ return can_vgetreg(priv->base + offset);
+}
+
+static uint32_t can_getfreg(struct stm32l4_can_s *priv, int offset)
+{
+ return can_vgetreg(priv->fbase + offset);
+}
+
+#else
+static uint32_t can_getreg(struct stm32l4_can_s *priv, int offset)
+{
+ return getreg32(priv->base + offset);
+}
+
+static uint32_t can_getfreg(struct stm32l4_can_s *priv, int offset)
+{
+ return getreg32(priv->fbase + offset);
+}
+
+#endif
+
+/****************************************************************************
+ * Name: can_putreg
+ * Name: can_putfreg
+ *
+ * Description:
+ * Set the value of a CAN register or filter block register.
+ *
+ * Input Parameters:
+ * priv - A reference to the CAN block status
+ * offset - The offset to the register to write
+ * value - The value to write to the register
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_REGDEBUG
+static void can_vputreg(uint32_t addr, uint32_t value)
+{
+ /* Show the register value being written */
+
+ lldbg("%08x<-%08x\n", addr, value);
+
+ /* Write the value */
+
+ putreg32(value, addr);
+}
+
+static void can_putreg(struct stm32l4_can_s *priv, int offset, uint32_t value)
+{
+ can_vputreg(priv->base + offset, value);
+}
+
+static void can_putfreg(struct stm32l4_can_s *priv, int offset, uint32_t value)
+{
+ can_vputreg(priv->fbase + offset, value);
+}
+
+#else
+static void can_putreg(struct stm32l4_can_s *priv, int offset, uint32_t value)
+{
+ putreg32(value, priv->base + offset);
+}
+
+static void can_putfreg(struct stm32l4_can_s *priv, int offset, uint32_t value)
+{
+ putreg32(value, priv->fbase + offset);
+}
+#endif
+
+/****************************************************************************
+ * Name: can_dumpctrlregs
+ *
+ * Description:
+ * Dump the contents of all CAN control registers
+ *
+ * Input Parameters:
+ * priv - A reference to the CAN block status
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_REGDEBUG
+static void can_dumpctrlregs(struct stm32l4_can_s *priv, FAR const char *msg)
+{
+ if (msg)
+ {
+ canlldbg("Control Registers: %s\n", msg);
+ }
+ else
+ {
+ canlldbg("Control Registers:\n");
+ }
+
+ /* CAN control and status registers */
+
+ lldbg(" MCR: %08x MSR: %08x TSR: %08x\n",
+ getreg32(priv->base + STM32L4_CAN_MCR_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_MSR_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_TSR_OFFSET));
+
+ lldbg(" RF0R: %08x RF1R: %08x\n",
+ getreg32(priv->base + STM32L4_CAN_RF0R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_RF1R_OFFSET));
+
+ lldbg(" IER: %08x ESR: %08x BTR: %08x\n",
+ getreg32(priv->base + STM32L4_CAN_IER_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_ESR_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_BTR_OFFSET));
+}
+#endif
+
+/****************************************************************************
+ * Name: can_dumpmbregs
+ *
+ * Description:
+ * Dump the contents of all CAN mailbox registers
+ *
+ * Input Parameters:
+ * priv - A reference to the CAN block status
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_REGDEBUG
+static void can_dumpmbregs(struct stm32l4_can_s *priv, FAR const char *msg)
+{
+ if (msg)
+ {
+ canlldbg("Mailbox Registers: %s\n", msg);
+ }
+ else
+ {
+ canlldbg("Mailbox Registers:\n");
+ }
+
+ /* CAN mailbox registers (3 TX and 2 RX) */
+
+ lldbg(" TI0R: %08x TDT0R: %08x TDL0R: %08x TDH0R: %08x\n",
+ getreg32(priv->base + STM32L4_CAN_TI0R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_TDT0R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_TDL0R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_TDH0R_OFFSET));
+
+ lldbg(" TI1R: %08x TDT1R: %08x TDL1R: %08x TDH1R: %08x\n",
+ getreg32(priv->base + STM32L4_CAN_TI1R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_TDT1R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_TDL1R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_TDH1R_OFFSET));
+
+ lldbg(" TI2R: %08x TDT2R: %08x TDL2R: %08x TDH2R: %08x\n",
+ getreg32(priv->base + STM32L4_CAN_TI2R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_TDT2R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_TDL2R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_TDH2R_OFFSET));
+
+ lldbg(" RI0R: %08x RDT0R: %08x RDL0R: %08x RDH0R: %08x\n",
+ getreg32(priv->base + STM32L4_CAN_RI0R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_RDT0R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_RDL0R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_RDH0R_OFFSET));
+
+ lldbg(" RI1R: %08x RDT1R: %08x RDL1R: %08x RDH1R: %08x\n",
+ getreg32(priv->base + STM32L4_CAN_RI1R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_RDT1R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_RDL1R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_RDH1R_OFFSET));
+}
+#endif
+
+/****************************************************************************
+ * Name: can_dumpfiltregs
+ *
+ * Description:
+ * Dump the contents of all CAN filter registers
+ *
+ * Input Parameters:
+ * priv - A reference to the CAN block status
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_REGDEBUG
+static void can_dumpfiltregs(struct stm32l4_can_s *priv, FAR const char *msg)
+{
+ int i;
+
+ if (msg)
+ {
+ canlldbg("Filter Registers: %s\n", msg);
+ }
+ else
+ {
+ canlldbg("Filter Registers:\n");
+ }
+
+ lldbg(" FMR: %08x FM1R: %08x FS1R: %08x FFA1R: %08x FA1R: %08x\n",
+ getreg32(priv->base + STM32L4_CAN_FMR_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_FM1R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_FS1R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_FFA1R_OFFSET),
+ getreg32(priv->base + STM32L4_CAN_FA1R_OFFSET));
+
+ for (i = 0; i < CAN_NFILTERS; i++)
+ {
+ lldbg(" F%dR1: %08x F%dR2: %08x\n",
+ i, getreg32(priv->base + STM32L4_CAN_FIR_OFFSET(i, 1)),
+ i, getreg32(priv->base + STM32L4_CAN_FIR_OFFSET(i, 2)));
+ }
+}
+#endif
+
+/****************************************************************************
+ * Name: can_reset
+ *
+ * Description:
+ * Reset the CAN device. Called early to initialize the hardware. This
+ * function is called, before can_setup() and on error conditions.
+ *
+ * Input Parameters:
+ * dev - An instance of the "upper half" can driver state structure.
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+static void can_reset(FAR struct can_dev_s *dev)
+{
+ FAR struct stm32l4_can_s *priv = dev->cd_priv;
+ uint32_t regval;
+ uint32_t regbit = 0;
+ irqstate_t flags;
+
+ canllvdbg("CAN%d\n", priv->port);
+
+ /* Get the bits in the AHB1RSTR1 register needed to reset this CAN device */
+
+#ifdef CONFIG_STM32L4_CAN1
+ if (priv->port == 1)
+ {
+ regbit = RCC_APB1RSTR1_CAN1RST;
+ }
+ else
+#endif
+ {
+ canlldbg("Unsupported port %d\n", priv->port);
+ return;
+ }
+
+ /* Disable interrupts momentary to stop any ongoing CAN event processing and
+ * to prevent any concurrent access to the AHB1RSTR1 register.
+ */
+
+ flags = enter_critical_section();
+
+ /* Reset the CAN */
+
+ regval = getreg32(STM32L4_RCC_APB1RSTR1);
+ regval |= regbit;
+ putreg32(regval, STM32L4_RCC_APB1RSTR1);
+
+ regval &= ~regbit;
+ putreg32(regval, STM32L4_RCC_APB1RSTR1);
+ leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: can_setup
+ *
+ * Description:
+ * Configure the CAN. This method is called the first time that the CAN
+ * device is opened. This will occur when the port is first opened.
+ * This setup includes configuring and attaching CAN interrupts.
+ * All CAN interrupts are disabled upon return.
+ *
+ * Input Parameters:
+ * dev - An instance of the "upper half" can driver state structure.
+ *
+ * Returned Value:
+ * Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int can_setup(FAR struct can_dev_s *dev)
+{
+ FAR struct stm32l4_can_s *priv = dev->cd_priv;
+ int ret;
+
+ canllvdbg("CAN%d RX0 irq: %d TX irq: %d\n", priv->port, priv->canrx0, priv->cantx);
+
+ /* CAN cell initialization */
+
+ ret = can_cellinit(priv);
+ if (ret < 0)
+ {
+ canlldbg("CAN%d cell initialization failed: %d\n", priv->port, ret);
+ return ret;
+ }
+
+ can_dumpctrlregs(priv, "After cell initialization");
+ can_dumpmbregs(priv, NULL);
+
+ /* CAN filter initialization */
+
+ ret = can_filterinit(priv);
+ if (ret < 0)
+ {
+ canlldbg("CAN%d filter initialization failed: %d\n", priv->port, ret);
+ return ret;
+ }
+
+ can_dumpfiltregs(priv, "After filter initialization");
+
+ /* Attach the CAN RX FIFO 0 interrupt and TX interrupts. The others are not used */
+
+ ret = irq_attach(priv->canrx0, can_rx0interrupt);
+ if (ret < 0)
+ {
+ canlldbg("Failed to attach CAN%d RX0 IRQ (%d)", priv->port, priv->canrx0);
+ return ret;
+ }
+
+ ret = irq_attach(priv->cantx, can_txinterrupt);
+ if (ret < 0)
+ {
+ canlldbg("Failed to attach CAN%d TX IRQ (%d)", priv->port, priv->cantx);
+ return ret;
+ }
+
+ /* Enable the interrupts at the NVIC. Interrupts arestill disabled in
+ * the CAN module. Since we coming out of reset here, there should be
+ * no pending interrupts.
+ */
+
+ up_enable_irq(priv->canrx0);
+ up_enable_irq(priv->cantx);
+ return OK;
+}
+
+/****************************************************************************
+ * Name: can_shutdown
+ *
+ * Description:
+ * Disable the CAN. This method is called when the CAN device is closed.
+ * This method reverses the operation the setup method.
+ *
+ * Input Parameters:
+ * dev - An instance of the "upper half" can driver state structure.
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+static void can_shutdown(FAR struct can_dev_s *dev)
+{
+ FAR struct stm32l4_can_s *priv = dev->cd_priv;
+
+ canllvdbg("CAN%d\n", priv->port);
+
+ /* Disable the RX FIFO 0 and TX interrupts */
+
+ up_disable_irq(priv->canrx0);
+ up_disable_irq(priv->cantx);
+
+ /* Detach the RX FIFO 0 and TX interrupts */
+
+ irq_detach(priv->canrx0);
+ irq_detach(priv->cantx);
+
+ /* And reset the hardware */
+
+ can_reset(dev);
+}
+
+/****************************************************************************
+ * Name: can_rxint
+ *
+ * Description:
+ * Call to enable or disable RX interrupts.
+ *
+ * Input Parameters:
+ * dev - An instance of the "upper half" can driver state structure.
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+static void can_rxint(FAR struct can_dev_s *dev, bool enable)
+{
+ FAR struct stm32l4_can_s *priv = dev->cd_priv;
+ uint32_t regval;
+
+ canllvdbg("CAN%d enable: %d\n", priv->port, enable);
+
+ /* Enable/disable the FIFO 0 message pending interrupt */
+
+ regval = can_getreg(priv, STM32L4_CAN_IER_OFFSET);
+ if (enable)
+ {
+ regval |= CAN_IER_FMPIE0;
+ }
+ else
+ {
+ regval &= ~CAN_IER_FMPIE0;
+ }
+
+ can_putreg(priv, STM32L4_CAN_IER_OFFSET, regval);
+}
+
+/****************************************************************************
+ * Name: can_txint
+ *
+ * Description:
+ * Call to enable or disable TX interrupts.
+ *
+ * Input Parameters:
+ * dev - An instance of the "upper half" can driver state structure.
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+static void can_txint(FAR struct can_dev_s *dev, bool enable)
+{
+ FAR struct stm32l4_can_s *priv = dev->cd_priv;
+ uint32_t regval;
+
+ canllvdbg("CAN%d enable: %d\n", priv->port, enable);
+
+ /* Support only disabling the transmit mailbox interrupt */
+
+ if (!enable)
+ {
+ regval = can_getreg(priv, STM32L4_CAN_IER_OFFSET);
+ regval &= ~CAN_IER_TMEIE;
+ can_putreg(priv, STM32L4_CAN_IER_OFFSET, regval);
+ }
+}
+
+/****************************************************************************
+ * Name: can_ioctl
+ *
+ * Description:
+ * All ioctl calls will be routed through this method
+ *
+ * Input Parameters:
+ * dev - An instance of the "upper half" can driver state structure.
+ *
+ * Returned Value:
+ * Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
+{
+ /* No CAN ioctls are supported */
+
+ return -ENOTTY;
+}
+
+/****************************************************************************
+ * Name: can_remoterequest
+ *
+ * Description:
+ * Send a remote request
+ *
+ * Input Parameters:
+ * dev - An instance of the "upper half" can driver state structure.
+ *
+ * Returned Value:
+ * Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
+{
+#warning "Remote request not implemented"
+ return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: can_send
+ *
+ * Description:
+ * Send one can message.
+ *
+ * One CAN-message consists of a maximum of 10 bytes. A message is
+ * composed of at least the first 2 bytes (when there are no data bytes).
+ *
+ * Byte 0: Bits 0-7: Bits 3-10 of the 11-bit CAN identifier
+ * Byte 1: Bits 5-7: Bits 0-2 of the 11-bit CAN identifier
+ * Bit 4: Remote Tranmission Request (RTR)
+ * Bits 0-3: Data Length Code (DLC)
+ * Bytes 2-10: CAN data
+ *
+ * Input Parameters:
+ * dev - An instance of the "upper half" can driver state structure.
+ *
+ * Returned Value:
+ * Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
+{
+ FAR struct stm32l4_can_s *priv = dev->cd_priv;
+ FAR uint8_t *ptr;
+ uint32_t regval;
+ uint32_t tmp;
+ int dlc;
+ int txmb;
+
+ canllvdbg("CAN%d ID: %d DLC: %d\n", priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
+
+ /* Select one empty transmit mailbox */
+
+ regval = can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
+ if ((regval & CAN_TSR_TME0) != 0 && (regval & CAN_TSR_RQCP0) == 0)
+ {
+ txmb = 0;
+ }
+ else if ((regval & CAN_TSR_TME1) != 0 && (regval & CAN_TSR_RQCP1) == 0)
+ {
+ txmb = 1;
+ }
+ else if ((regval & CAN_TSR_TME2) != 0 && (regval & CAN_TSR_RQCP2) == 0)
+ {
+ txmb = 2;
+ }
+ else
+ {
+ canlldbg("ERROR: No available mailbox\n");
+ return -EBUSY;
+ }
+
+ /* Clear TXRQ, RTR, IDE, EXID, and STID fields */
+
+ regval = can_getreg(priv, STM32L4_CAN_TIR_OFFSET(txmb));
+ regval &= ~(CAN_TIR_TXRQ | CAN_TIR_RTR | CAN_TIR_IDE | CAN_TIR_EXID_MASK | CAN_TIR_STID_MASK);
+ can_putreg(priv, STM32L4_CAN_TIR_OFFSET(txmb), regval);
+
+ /* Set up the ID, standard 11-bit or extended 29-bit. */
+
+#ifdef CONFIG_CAN_EXTID
+ regval &= ~CAN_TIR_EXID_MASK;
+ if (msg->cm_hdr.ch_extid)
+ {
+ DEBUGASSERT(msg->cm_hdr.ch_id < (1 << 29));
+ regval |= (msg->cm_hdr.ch_id << CAN_TIR_EXID_SHIFT) | CAN_TIR_IDE;
+ }
+ else
+ {
+ DEBUGASSERT(msg->cm_hdr.ch_id < (1 << 11));
+ regval |= msg->cm_hdr.ch_id << CAN_TIR_STID_SHIFT;
+ }
+#else
+ regval &= ~CAN_TIR_STID_MASK;
+ regval |= (uint32_t)msg->cm_hdr.ch_id << CAN_TIR_STID_SHIFT;
+#endif
+ can_putreg(priv, STM32L4_CAN_TIR_OFFSET(txmb), regval);
+
+ /* Set up the DLC */
+
+ dlc = msg->cm_hdr.ch_dlc;
+ regval = can_getreg(priv, STM32L4_CAN_TDTR_OFFSET(txmb));
+ regval &= ~(CAN_TDTR_DLC_MASK | CAN_TDTR_TGT);
+ regval |= (uint32_t)dlc << CAN_TDTR_DLC_SHIFT;
+ can_putreg(priv, STM32L4_CAN_TDTR_OFFSET(txmb), regval);
+
+ /* Set up the data fields */
+
+ ptr = msg->cm_data;
+ regval = 0;
+
+ if (dlc > 0)
+ {
+ tmp = (uint32_t)*ptr++;
+ regval = tmp << CAN_TDLR_DATA0_SHIFT;
+
+ if (dlc > 1)
+ {
+ tmp = (uint32_t)*ptr++;
+ regval |= tmp << CAN_TDLR_DATA1_SHIFT;
+
+ if (dlc > 2)
+ {
+ tmp = (uint32_t)*ptr++;
+ regval |= tmp << CAN_TDLR_DATA2_SHIFT;
+
+ if (dlc > 3)
+ {
+ tmp = (uint32_t)*ptr++;
+ regval |= tmp << CAN_TDLR_DATA3_SHIFT;
+ }
+ }
+ }
+ }
+
+ can_putreg(priv, STM32L4_CAN_TDLR_OFFSET(txmb), regval);
+
+ regval = 0;
+ if (dlc > 4)
+ {
+ tmp = (uint32_t)*ptr++;
+ regval = tmp << CAN_TDHR_DATA4_SHIFT;
+
+ if (dlc > 5)
+ {
+ tmp = (uint32_t)*ptr++;
+ regval |= tmp << CAN_TDHR_DATA5_SHIFT;
+
+ if (dlc > 6)
+ {
+ tmp = (uint32_t)*ptr++;
+ regval |= tmp << CAN_TDHR_DATA6_SHIFT;
+
+ if (dlc > 7)
+ {
+ tmp = (uint32_t)*ptr++;
+ regval |= tmp << CAN_TDHR_DATA7_SHIFT;
+ }
+ }
+ }
+ }
+
+ can_putreg(priv, STM32L4_CAN_TDHR_OFFSET(txmb), regval);
+
+ /* Enable the transmit mailbox empty interrupt (may already be enabled) */
+
+ regval = can_getreg(priv, STM32L4_CAN_IER_OFFSET);
+ regval |= CAN_IER_TMEIE;
+ can_putreg(priv, STM32L4_CAN_IER_OFFSET, regval);
+
+ /* Request transmission */
+
+ regval = can_getreg(priv, STM32L4_CAN_TIR_OFFSET(txmb));
+ regval |= CAN_TIR_TXRQ; /* Transmit Mailbox Request */
+ can_putreg(priv, STM32L4_CAN_TIR_OFFSET(txmb), regval);
+
+ can_dumpmbregs(priv, "After send");
+ return OK;
+}
+
+/****************************************************************************
+ * Name: can_txready
+ *
+ * Description:
+ * Return true if the CAN hardware can accept another TX message.
+ *
+ * Input Parameters:
+ * dev - An instance of the "upper half" can driver state structure.
+ *
+ * Returned Value:
+ * True if the CAN hardware is ready to accept another TX message.
+ *
+ ****************************************************************************/
+
+static bool can_txready(FAR struct can_dev_s *dev)
+{
+ FAR struct stm32l4_can_s *priv = dev->cd_priv;
+ uint32_t regval;
+
+ /* Return true if any mailbox is available */
+
+ regval = can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
+ canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
+
+ if ((regval & CAN_ALL_MAILBOXES) != 0)
+ {
+ return true;
+ }
+
+ return false;
+}
+
+/****************************************************************************
+ * Name: can_txempty
+ *
+ * Description:
+ * Return true if all message have been sent. If for example, the CAN
+ * hardware implements FIFOs, then this would mean the transmit FIFO is
+ * empty. This method is called when the driver needs to make sure that
+ * all characters are "drained" from the TX hardware before calling
+ * co_shutdown().
+ *
+ * Input Parameters:
+ * dev - An instance of the "upper half" can driver state structure.
+ *
+ * Returned Value:
+ * True if there are no pending TX transfers in the CAN hardware.
+ *
+ ****************************************************************************/
+
+static bool can_txempty(FAR struct can_dev_s *dev)
+{
+ FAR struct stm32l4_can_s *priv = dev->cd_priv;
+ uint32_t regval;
+
+ /* Return true if all mailboxes are available */
+
+ regval = can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
+ canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
+
+ if ((regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES)
+ {
+ return true;
+ }
+
+ return false;
+}
+
+/****************************************************************************
+ * Name: can_rx0interrupt
+ *
+ * Description:
+ * CAN RX FIFO 0 interrupt handler
+ *
+ * Input Parameters:
+ * irq - The IRQ number of the interrupt.
+ * context - The register state save array at the time of the interrupt.
+ *
+ * Returned Value:
+ * Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int can_rx0interrupt(int irq, void *context)
+{
+ FAR struct can_dev_s *dev = NULL;
+ FAR struct stm32l4_can_s *priv;
+ struct can_hdr_s hdr;
+ uint8_t data[CAN_MAXDATALEN];
+ uint32_t regval;
+ int npending;
+ int ret;
+
+ dev = &g_can1dev;
+ priv = dev->cd_priv;
+
+ /* Verify that a message is pending in FIFO 0 */
+
+ regval = can_getreg(priv, STM32L4_CAN_RF0R_OFFSET);
+ npending = (regval & CAN_RFR_FMP_MASK) >> CAN_RFR_FMP_SHIFT;
+ if (npending < 1)
+ {
+ canlldbg("WARNING: No messages pending\n");
+ return OK;
+ }
+
+ can_dumpmbregs(priv, "RX0 interrupt");
+
+ /* Get the CAN identifier. */
+
+ regval = can_getreg(priv, STM32L4_CAN_RI0R_OFFSET);
+
+#ifdef CONFIG_CAN_EXTID
+ if ((regval & CAN_RIR_IDE) != 0)
+ {
+ hdr.ch_id = (regval & CAN_RIR_EXID_MASK) >> CAN_RIR_EXID_SHIFT;
+ hdr.ch_extid = true;
+ }
+ else
+ {
+ hdr.ch_id = (regval & CAN_RIR_STID_MASK) >> CAN_RIR_STID_SHIFT;
+ hdr.ch_extid = false;
+ }
+#else
+ if ((regval & CAN_RIR_IDE) != 0)
+ {
+ canlldbg("ERROR: Received message with extended identifier. Dropped\n");
+ ret = -ENOSYS;
+ goto errout;
+ }
+
+ hdr.ch_id = (regval & CAN_RIR_STID_MASK) >> CAN_RIR_STID_SHIFT;
+#endif
+
+ /* Clear the error indication and unused bits */
+
+#ifdef CONFIG_CAN_ERRORS
+ hdr.ch_error = 0; /* Error reporting not supported */
+#endif
+ hdr.ch_unused = 0;
+
+ /* Extract the RTR bit */
+
+ hdr.ch_rtr = (regval & CAN_RIR_RTR) != 0 ? true : false;
+
+ /* Get the DLC */
+
+ regval = can_getreg(priv, STM32L4_CAN_RDT0R_OFFSET);
+ hdr.ch_dlc = (regval & CAN_RDTR_DLC_MASK) >> CAN_RDTR_DLC_SHIFT;
+
+ /* Save the message data */
+
+ regval = can_getreg(priv, STM32L4_CAN_RDL0R_OFFSET);
+ data[0] = (regval & CAN_RDLR_DATA0_MASK) >> CAN_RDLR_DATA0_SHIFT;
+ data[1] = (regval & CAN_RDLR_DATA1_MASK) >> CAN_RDLR_DATA1_SHIFT;
+ data[2] = (regval & CAN_RDLR_DATA2_MASK) >> CAN_RDLR_DATA2_SHIFT;
+ data[3] = (regval & CAN_RDLR_DATA3_MASK) >> CAN_RDLR_DATA3_SHIFT;
+
+ regval = can_getreg(priv, STM32L4_CAN_RDH0R_OFFSET);
+ data[4] = (regval & CAN_RDHR_DATA4_MASK) >> CAN_RDHR_DATA4_SHIFT;
+ data[5] = (regval & CAN_RDHR_DATA5_MASK) >> CAN_RDHR_DATA5_SHIFT;
+ data[6] = (regval & CAN_RDHR_DATA6_MASK) >> CAN_RDHR_DATA6_SHIFT;
+ data[7] = (regval & CAN_RDHR_DATA7_MASK) >> CAN_RDHR_DATA7_SHIFT;
+
+ /* Provide the data to the upper half driver */
+
+ ret = can_receive(dev, &hdr, data);
+
+ /* Release the FIFO0 */
+
+#ifndef CONFIG_CAN_EXTID
+errout:
+#endif
+ regval = can_getreg(priv, STM32L4_CAN_RF0R_OFFSET);
+ regval |= CAN_RFR_RFOM;
+ can_putreg(priv, STM32L4_CAN_RF0R_OFFSET, regval);
+ return ret;
+}
+
+/****************************************************************************
+ * Name: can_txinterrupt
+ *
+ * Description:
+ * CAN TX mailbox complete interrupt handler
+ *
+ * Input Parameters:
+ * irq - The IRQ number of the interrupt.
+ * context - The register state save array at the time of the interrupt.
+ *
+ * Returned Value:
+ * Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int can_txinterrupt(int irq, void *context)
+{
+ FAR struct can_dev_s *dev = NULL;
+ FAR struct stm32l4_can_s *priv;
+ uint32_t regval;
+
+ dev = &g_can1dev;
+ priv = dev->cd_priv;
+
+ /* Get the transmit status */
+
+ regval = can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
+
+ /* Check for RQCP0: Request completed mailbox 0 */
+
+ if ((regval & CAN_TSR_RQCP0) != 0)
+ {
+ /* Writing '1' to RCP0 clears RCP0 and all the status bits (TXOK0,
+ * ALST0 and TERR0) for Mailbox 0.
+ */
+
+ can_putreg(priv, STM32L4_CAN_TSR_OFFSET, CAN_TSR_RQCP0);
+
+ /* Check for errors */
+
+ if ((regval & CAN_TSR_TXOK0) != 0)
+ {
+ /* Tell the upper half that the tansfer is finished. */
+
+ (void)can_txdone(dev);
+ }
+ }
+
+ /* Check for RQCP1: Request completed mailbox 1 */
+
+ if ((regval & CAN_TSR_RQCP1) != 0)
+ {
+ /* Writing '1' to RCP1 clears RCP1 and all the status bits (TXOK1,
+ * ALST1 and TERR1) for Mailbox 1.
+ */
+
+ can_putreg(priv, STM32L4_CAN_TSR_OFFSET, CAN_TSR_RQCP1);
+
+ /* Check for errors */
+
+ if ((regval & CAN_TSR_TXOK1) != 0)
+ {
+ /* Tell the upper half that the tansfer is finished. */
+
+ (void)can_txdone(dev);
+ }
+ }
+
+ /* Check for RQCP2: Request completed mailbox 2 */
+
+ if ((regval & CAN_TSR_RQCP2) != 0)
+ {
+ /* Writing '1' to RCP2 clears RCP2 and all the status bits (TXOK2,
+ * ALST2 and TERR2) for Mailbox 2.
+ */
+
+ can_putreg(priv, STM32L4_CAN_TSR_OFFSET, CAN_TSR_RQCP2);
+
+ /* Check for errors */
+
+ if ((regval & CAN_TSR_TXOK2) != 0)
+ {
+ /* Tell the upper half that the tansfer is finished. */
+
+ (void)can_txdone(dev);
+ }
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: can_bittiming
+ *
+ * Description:
+ * Set the CAN bit timing register (BTR) based on the configured BAUD.
+ *
+ * "The bit timing logic monitors the serial bus-line and performs sampling
+ * and adjustment of the sample point by synchronizing on the start-bit edge
+ * and resynchronizing on the following edges.
+ *
+ * "Its operation may be explained simply by splitting nominal bit time into
+ * three segments as follows:
+ *
+ * 1. "Synchronization segment (SYNC_SEG): a bit change is expected to occur
+ * within this time segment. It has a fixed length of one time quantum
+ * (1 x tCAN).
+ * 2. "Bit segment 1 (BS1): defines the location of the sample point. It
+ * includes the PROP_SEG and PHASE_SEG1 of the CAN standard. Its duration
+ * is programmable between 1 and 16 time quanta but may be automatically
+ * lengthened to compensate for positive phase drifts due to differences
+ * in the frequency of the various nodes of the network.
+ * 3. "Bit segment 2 (BS2): defines the location of the transmit point. It
+ * represents the PHASE_SEG2 of the CAN standard. Its duration is
+ * programmable between 1 and 8 time quanta but may also be automatically
+ * shortened to compensate for negative phase drifts."
+ *
+ * Pictorially:
+ *
+ * |<----------------- NOMINAL BIT TIME ----------------->|
+ * |<- SYNC_SEG ->|<------ BS1 ------>|<------ BS2 ------>|
+ * |<---- Tq ---->|<----- Tbs1 ------>|<----- Tbs2 ------>|
+ *
+ * Where
+ * Tbs1 is the duration of the BS1 segment
+ * Tbs2 is the duration of the BS2 segment
+ * Tq is the "Time Quantum"
+ *
+ * Relationships:
+ *
+ * baud = 1 / bit_time
+ * bit_time = Tq + Tbs1 + Tbs2
+ * Tbs1 = Tq * ts1
+ * Tbs2 = Tq * ts2
+ * Tq = brp * Tpclk1
+ *
+ * Where:
+ * Tpclk1 is the period of the APB1 clock (PCLK1).
+ *
+ * Input Parameter:
+ * priv - A reference to the CAN block status
+ *
+ * Returned Value:
+ * Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int can_bittiming(struct stm32l4_can_s *priv)
+{
+ uint32_t tmp;
+ uint32_t brp;
+ uint32_t ts1;
+ uint32_t ts2;
+
+ canllvdbg("CAN%d PCLK1: %d baud: %d\n",
+ priv->port, STM32L4_PCLK1_FREQUENCY, priv->baud);
+
+ /* Try to get CAN_BIT_QUANTA quanta in one bit_time.
+ *
+ * bit_time = Tq*(ts1 + ts2 + 1)
+ * nquanta = bit_time / Tq
+ * nquanta = (ts1 + ts2 + 1)
+ *
+ * bit_time = brp * Tpclk1 * (ts1 + ts2 + 1)
+ * nquanta = bit_time / brp / Tpclk1
+ * = PCLK1 / baud / brp
+ * brp = PCLK1 / baud / nquanta;
+ *
+ * Example:
+ * PCLK1 = 42,000,000 baud = 1,000,000 nquanta = 14 : brp = 3
+ * PCLK1 = 42,000,000 baud = 700,000 nquanta = 14 : brp = 4
+ */
+
+ tmp = STM32L4_PCLK1_FREQUENCY / priv->baud;
+ if (tmp < CAN_BIT_QUANTA)
+ {
+ /* At the smallest brp value (1), there are already too few bit times
+ * (PCLCK1 / baud) to meet our goal. brp must be one and we need
+ * make some reasonable guesses about ts1 and ts2.
+ */
+
+ brp = 1;
+
+ /* In this case, we have to guess a good value for ts1 and ts2 */
+
+ ts1 = (tmp - 1) >> 1;
+ ts2 = tmp - ts1 - 1;
+
+ if (ts1 == ts2 && ts1 > 1 && ts2 < CAN_BTR_TSEG2_MAX)
+ {
+ ts1--;
+ ts2++;
+ }
+ }
+
+ /* Otherwise, nquanta is CAN_BIT_QUANTA, ts1 is CONFIG_CAN_TSEG1, ts2 is
+ * CONFIG_CAN_TSEG2 and we calculate brp to achieve CAN_BIT_QUANTA quanta
+ * in the bit time
+ */
+
+ else
+ {
+ ts1 = CONFIG_CAN_TSEG1;
+ ts2 = CONFIG_CAN_TSEG2;
+ brp = (tmp + (CAN_BIT_QUANTA/2)) / CAN_BIT_QUANTA;
+ DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX);
+ }
+
+ canllvdbg("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);
+
+ /* Configure bit timing. This also does the following, less obvious
+ * things. Unless loopback mode is enabled, it:
+ *
+ * - Disables silent mode.
+ * - Disables loopback mode.
+ *
+ * NOTE that for the time being, SJW is set to 1 just because I don't
+ * know any better.
+ */
+
+ tmp = ((brp - 1) << CAN_BTR_BRP_SHIFT) | ((ts1 - 1) << CAN_BTR_TS1_SHIFT) |
+ ((ts2 - 1) << CAN_BTR_TS2_SHIFT) | ((1 - 1) << CAN_BTR_SJW_SHIFT);
+#ifdef CONFIG_CAN_LOOPBACK
+//tmp |= (CAN_BTR_LBKM | CAN_BTR_SILM);
+ tmp |= CAN_BTR_LBKM;
+#endif
+
+ can_putreg(priv, STM32L4_CAN_BTR_OFFSET, tmp);
+ return OK;
+}
+
+/****************************************************************************
+ * Name: can_cellinit
+ *
+ * Description:
+ * CAN cell initialization
+ *
+ * Input Parameter:
+ * priv - A pointer to the private data structure for this CAN block
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int can_cellinit(struct stm32l4_can_s *priv)
+{
+ volatile uint32_t timeout;
+ uint32_t regval;
+ int ret;
+
+ canllvdbg("CAN%d\n", priv->port);
+
+ /* Exit from sleep mode */
+
+ regval = can_getreg(priv, STM32L4_CAN_MCR_OFFSET);
+ regval &= ~CAN_MCR_SLEEP;
+ can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+
+ /* Configure CAN behavior. Priority driven request order, not message ID. */
+
+ regval |= CAN_MCR_TXFP;
+ can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+
+ /* Enter initialization mode */
+
+ regval |= CAN_MCR_INRQ;
+ can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+
+ /* Wait until initialization mode is acknowledged */
+
+ for (timeout = INAK_TIMEOUT; timeout > 0; timeout--)
+ {
+ regval = can_getreg(priv, STM32L4_CAN_MSR_OFFSET);
+ if ((regval & CAN_MSR_INAK) != 0)
+ {
+ /* We are in initialization mode */
+
+ break;
+ }
+ }
+
+ /* Check for a timeout */
+
+ if (timeout < 1)
+ {
+ canlldbg("ERROR: Timed out waiting to enter initialization mode\n");
+ return -ETIMEDOUT;
+ }
+
+ /* Disable the following modes:
+ *
+ * - Time triggered communication mode
+ * - Automatic bus-off management
+ * - Automatic wake-up mode
+ * - No automatic retransmission
+ * - Receive FIFO locked mode
+ * - Transmit FIFO priority
+ */
+
+ regval = can_getreg(priv, STM32L4_CAN_MCR_OFFSET);
+ regval &= ~(CAN_MCR_TXFP | CAN_MCR_RFLM | CAN_MCR_NART | CAN_MCR_AWUM | CAN_MCR_ABOM | CAN_MCR_TTCM);
+ can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+
+ /* Configure bit timing. */
+
+ ret = can_bittiming(priv);
+ if (ret < 0)
+ {
+ canlldbg("ERROR: Failed to set bit timing: %d\n", ret);
+ return ret;
+ }
+
+ /* Exit initialization mode */
+
+ regval = can_getreg(priv, STM32L4_CAN_MCR_OFFSET);
+ regval &= ~CAN_MCR_INRQ;
+ can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+
+ /* Wait until the initialization mode exit is acknowledged */
+
+ for (timeout = INAK_TIMEOUT; timeout > 0; timeout--)
+ {
+ regval = can_getreg(priv, STM32L4_CAN_MSR_OFFSET);
+ if ((regval & CAN_MSR_INAK) == 0)
+ {
+ /* We are out of initialization mode */
+
+ break;
+ }
+ }
+
+ /* Check for a timeout */
+
+ if (timeout < 1)
+ {
+ canlldbg("ERROR: Timed out waiting to exit initialization mode: %08x\n", regval);
+ return -ETIMEDOUT;
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: can_filterinit
+ *
+ * Description:
+ * CAN filter initialization. CAN filters are not currently used by this
+ * driver. The CAN filters can be configured in a different way:
+ *
+ * 1. As a match of specific IDs in a list (IdList mode), or as
+ * 2. And ID and a mask (IdMask mode).
+ *
+ * Filters can also be configured as:
+ *
+ * 3. 16- or 32-bit. The advantage of 16-bit filters is that you get
+ * more filters; The advantage of 32-bit filters is that you get
+ * finer control of the filtering.
+ *
+ * There is no need to set up one filter for each CAN since STM32L4 only
+ * contains one CAN devices. If one day some STM32L4 has 2 CANs, then
+ * code will have to be imported from the STM32 port.
+ *
+ * 32-bit IdMask mode is configured. However, both the ID and the MASK
+ * are set to zero thus supressing all filtering because anything masked
+ * with zero matches zero.
+ *
+ * Input Parameter:
+ * priv - A pointer to the private data structure for this CAN block
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int can_filterinit(struct stm32l4_can_s *priv)
+{
+ uint32_t regval;
+ uint32_t bitmask;
+
+ canllvdbg("CAN%d filter: %d\n", priv->port, priv->filter);
+
+ /* Get the bitmask associated with the filter used by this CAN block */
+
+ bitmask = ((uint32_t)1) << priv->filter;
+
+ /* Enter filter initialization mode */
+
+ regval = can_getfreg(priv, STM32L4_CAN_FMR_OFFSET);
+ regval |= CAN_FMR_FINIT;
+ can_putfreg(priv, STM32L4_CAN_FMR_OFFSET, regval);
+
+ /* Disable the filter */
+
+ regval = can_getfreg(priv, STM32L4_CAN_FA1R_OFFSET);
+ regval &= ~bitmask;
+ can_putfreg(priv, STM32L4_CAN_FA1R_OFFSET, regval);
+
+ /* Select the 32-bit scale for the filter */
+
+ regval = can_getfreg(priv, STM32L4_CAN_FS1R_OFFSET);
+ regval |= bitmask;
+ can_putfreg(priv, STM32L4_CAN_FS1R_OFFSET, regval);
+
+ /* There are 14 or 28 filter banks (depending) on the device. Each filter bank is
+ * composed of two 32-bit registers, CAN_FiR:
+ */
+
+ can_putfreg(priv, STM32L4_CAN_FIR_OFFSET(priv->filter, 1), 0);
+ can_putfreg(priv, STM32L4_CAN_FIR_OFFSET(priv->filter, 2), 0);
+
+ /* Set Id/Mask mode for the filter */
+
+ regval = can_getfreg(priv, STM32L4_CAN_FM1R_OFFSET);
+ regval &= ~bitmask;
+ can_putfreg(priv, STM32L4_CAN_FM1R_OFFSET, regval);
+
+ /* Assign FIFO 0 for the filter */
+
+ regval = can_getfreg(priv, STM32L4_CAN_FFA1R_OFFSET);
+ regval &= ~bitmask;
+ can_putfreg(priv, STM32L4_CAN_FFA1R_OFFSET, regval);
+
+ /* Enable the filter */
+
+ regval = can_getfreg(priv, STM32L4_CAN_FA1R_OFFSET);
+ regval |= bitmask;
+ can_putfreg(priv, STM32L4_CAN_FA1R_OFFSET, regval);
+
+ /* Exit filter initialization mode */
+
+ regval = can_getfreg(priv, STM32L4_CAN_FMR_OFFSET);
+ regval &= ~CAN_FMR_FINIT;
+ can_putfreg(priv, STM32L4_CAN_FMR_OFFSET, regval);
+ return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_caninitialize
+ *
+ * Description:
+ * Initialize the selected CAN port
+ *
+ * Input Parameter:
+ * Port number (for hardware that has mutiple CAN interfaces)
+ *
+ * Returned Value:
+ * Valid CAN device structure reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+FAR struct can_dev_s *stm32l4_caninitialize(int port)
+{
+ struct can_dev_s *dev = NULL;
+
+ canvdbg("CAN%d\n", port);
+
+ /* NOTE: Peripherical clocking for CAN1 and/or CAN2 was already provided
+ * by stm32l4_clockconfig() early in the reset sequence.
+ */
+
+#ifdef CONFIG_STM32L4_CAN1
+ if (port == 1)
+ {
+ /* Select the CAN1 device structure */
+
+ dev = &g_can1dev;
+
+ /* Configure CAN1 pins. The ambiguous settings in the stm32*_pinmap.h
+ * file must have been disambiguated in the board.h file.
+ */
+
+ stm32l4_configgpio(GPIO_CAN1_RX);
+ stm32l4_configgpio(GPIO_CAN1_TX);
+ }
+ else
+#endif
+ {
+ candbg("ERROR: Unsupported port %d\n", port);
+ return NULL;
+ }
+
+ return dev;
+}
+
+#endif /* CONFIG_CAN && (CONFIG_STM32L4_CAN1 || CONFIG_STM32L4_CAN2) */
diff --git a/arch/arm/src/stm32l4/stm32l4_can.h b/arch/arm/src/stm32l4/stm32l4_can.h
index e69de29bb2d..f9dad5d89fd 100644
--- a/arch/arm/src/stm32l4/stm32l4_can.h
+++ b/arch/arm/src/stm32l4/stm32l4_can.h
@@ -0,0 +1,143 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_can.h
+ *
+ * Copyright (C) 2009, 2011, 2015 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ *
+ * Adaptations for stm32l4:
+ * Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
+ * Author: Sebastien Lorquet
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_CAN_H
+#define __ARCH_ARM_SRC_STM32L4_STM32L4_CAN_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include
+
+#include "chip.h"
+#include "chip/stm32l4_can.h"
+
+#include
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* Up to 1 CAN interfaces are supported */
+
+#if STM32L4_NCAN < 1
+# undef CONFIG_STM32L4_CAN1
+#endif
+
+#if defined(CONFIG_CAN) && defined(CONFIG_STM32L4_CAN1)
+
+/* CAN BAUD */
+
+#if defined(CONFIG_STM32L4_CAN1) && !defined(CONFIG_CAN1_BAUD)
+# error "CONFIG_CAN1_BAUD is not defined"
+#endif
+
+/* User-defined TSEG1 and TSEG2 settings may be used.
+ *
+ * CONFIG_CAN_TSEG1 = the number of CAN time quanta in segment 1
+ * CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2
+ * CAN_BIT_QUANTA = The number of CAN time quanta in on bit time
+ */
+
+#ifndef CONFIG_CAN_TSEG1
+# define CONFIG_CAN_TSEG1 6
+#endif
+
+#if CONFIG_CAN_TSEG1 < 1 || CONFIG_CAN_TSEG1 > CAN_BTR_TSEG1_MAX
+# errror "CONFIG_CAN_TSEG1 is out of range"
+#endif
+
+#ifndef CONFIG_CAN_TSEG2
+# define CONFIG_CAN_TSEG2 7
+#endif
+
+#if CONFIG_CAN_TSEG2 < 1 || CONFIG_CAN_TSEG2 > CAN_BTR_TSEG2_MAX
+# errror "CONFIG_CAN_TSEG2 is out of range"
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_caninitialize
+ *
+ * Description:
+ * Initialize the selected CAN port
+ *
+ * Input Parameter:
+ * Port number (for hardware that has mutiple CAN interfaces)
+ *
+ * Returned Value:
+ * Valid CAN device structure reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+struct can_dev_s;
+FAR struct can_dev_s *stm32l4_caninitialize(int port);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_CAN && CONFIG_STM32L4_CAN1 */
+#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_CAN_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_i2c.c b/arch/arm/src/stm32l4/stm32l4_i2c.c
index 3a394cda750..452b125e361 100644
--- a/arch/arm/src/stm32l4/stm32l4_i2c.c
+++ b/arch/arm/src/stm32l4/stm32l4_i2c.c
@@ -1,22 +1,14 @@
/************************************************************************************
- * arch/arm/src/stm32l4/stm32f3xx_i2c.c
+ * arch/arm/src/stm32l4/stm32l4_i2c.c
* STM32L4 I2C driver - based on STM32F3 I2C Hardware Layer - Device Driver
*
* Copyright (C) 2011 Uros Platise. All rights reserved.
* Author: Uros Platise
- *
- * With extensions and modifications for the F1, F2, and F4 by:
- *
* Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregroy Nutt
- *
- * And this version for the STM32 F3 by
- *
* Author: John Wharington
- *
- * Modified for STM32L4 by
- *
* Author: Sebastien Lorquet
+ * Author: dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -96,6 +88,7 @@
#include "up_arch.h"
+#include "stm32l4_gpio.h"
#include "stm32l4_rcc.h"
#include "stm32l4_i2c.h"
#include "stm32l4_waste.h"
@@ -103,9 +96,6 @@
/* At least one I2C peripheral must be enabled */
#if defined(CONFIG_STM32L4_I2C1) || defined(CONFIG_STM32L4_I2C2) || defined(CONFIG_STM32L4_I2C3)
-/* This implementation is for the STM32 F1, F2, and F4 only */
-
-#if defined(CONFIG_STM32L4_STM32F30XX)
/************************************************************************************
* Pre-processor Definitions
@@ -138,12 +128,10 @@
#endif
#define I2C_OUTPUT \
- (GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_CNF_OUTOD | GPIO_MODE_50MHz)
+ (GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_OPENDRAIN | GPIO_SPEED_50MHz)
#define MKI2C_OUTPUT(p) \
(((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
-/* Register setting unique to the STM32F30xx */
-
#define I2C_CR1_TXRX \
(I2C_CR1_RXIE | I2C_CR1_TXIE)
#define I2C_CR1_ALLINTS \
@@ -246,7 +234,7 @@ struct stm32l4_i2c_priv_s
{
const struct i2c_ops_s *ops; /* Standard I2C operations */
const struct stm32l4_i2c_config_s *config; /* Port configuration */
- int refs; /* Referernce count */
+ int refs; /* Reference count */
sem_t sem_excl; /* Mutual exclusion semaphore */
#ifndef CONFIG_I2C_POLLED
sem_t sem_isr; /* Interrupt wait semaphore */
@@ -279,15 +267,10 @@ struct stm32l4_i2c_priv_s
* Private Function Prototypes
************************************************************************************/
-static inline uint16_t stm32l4_i2c_getreg(FAR struct stm32l4_i2c_priv_s *priv,
- uint8_t offset);
-static inline void stm32l4_i2c_putreg(FAR struct stm32l4_i2c_priv_s *priv, uint8_t offset,
- uint16_t value);
-static inline void stm32l4_i2c_putreg32(FAR struct stm32l4_i2c_priv_s *priv, uint8_t offset,
- uint32_t value);
-static inline void stm32l4_i2c_modifyreg(FAR struct stm32l4_i2c_priv_s *priv,
- uint8_t offset, uint16_t clearbits,
- uint16_t setbits);
+static inline uint32_t stm32l4_i2c_getreg32(FAR struct stm32l4_i2c_priv_s *priv,
+ uint8_t offset);
+static inline void stm32l4_i2c_putreg32(FAR struct stm32l4_i2c_priv_s *priv,
+ uint8_t offset, uint32_t value);
static inline void stm32l4_i2c_modifyreg32(FAR struct stm32l4_i2c_priv_s *priv,
uint8_t offset, uint32_t clearbits,
uint32_t setbits);
@@ -302,13 +285,14 @@ static inline void stm32l4_i2c_sem_init(FAR struct stm32l4_i2c_priv_s *priv);
static inline void stm32l4_i2c_sem_destroy(FAR struct stm32l4_i2c_priv_s *priv);
#ifdef CONFIG_I2C_TRACE
static void stm32l4_i2c_tracereset(FAR struct stm32l4_i2c_priv_s *priv);
-static void stm32l4_i2c_tracenew(FAR struct stm32l4_i2c_priv_s *priv, uint32_t status);
+static void stm32l4_i2c_tracenew(FAR struct stm32l4_i2c_priv_s *priv,
+ uint32_t status);
static void stm32l4_i2c_traceevent(FAR struct stm32l4_i2c_priv_s *priv,
- enum stm32l4_trace_e event, uint32_t parm);
+ enum stm32l4_trace_e event, uint32_t parm);
static void stm32l4_i2c_tracedump(FAR struct stm32l4_i2c_priv_s *priv);
#endif /* CONFIG_I2C_TRACE */
static void stm32l4_i2c_setclock(FAR struct stm32l4_i2c_priv_s *priv,
- uint32_t frequency);
+ uint32_t frequency);
static inline void stm32l4_i2c_sendstart(FAR struct stm32l4_i2c_priv_s *priv);
static inline void stm32l4_i2c_clrstart(FAR struct stm32l4_i2c_priv_s *priv);
static inline void stm32l4_i2c_sendstop(FAR struct stm32l4_i2c_priv_s *priv);
@@ -327,8 +311,8 @@ static int stm32l4_i2c3_isr(int irq, void *context);
#endif
static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv);
static int stm32l4_i2c_deinit(FAR struct stm32l4_i2c_priv_s *priv);
-static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs,
- int count);
+static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev,
+ FAR struct i2c_msg_s *msgs, int count);
#ifdef CONFIG_I2C_RESET
static int stm32l4_i2c_reset(FAR struct i2c_master_s *dev);
#endif
@@ -351,8 +335,8 @@ const struct i2c_ops_s stm32l4_i2c_ops =
static const struct stm32l4_i2c_config_s stm32l4_i2c1_config =
{
.base = STM32L4_I2C1_BASE,
- .clk_bit = RCC_APB1ENR_I2C1EN,
- .reset_bit = RCC_APB1RSTR_I2C1RST,
+ .clk_bit = RCC_APB1ENR1_I2C1EN,
+ .reset_bit = RCC_APB1RSTR1_I2C1RST,
.scl_pin = GPIO_I2C1_SCL,
.sda_pin = GPIO_I2C1_SDA,
#ifndef CONFIG_I2C_POLLED
@@ -441,20 +425,6 @@ struct stm32l4_i2c_priv_s stm32l4_i2c3_priv =
* Private Functions
************************************************************************************/
-/************************************************************************************
- * Name: stm32l4_i2c_getreg
- *
- * Description:
- * Get a 16-bit register value by offset
- *
- ************************************************************************************/
-
-static inline uint16_t stm32l4_i2c_getreg(FAR struct stm32l4_i2c_priv_s *priv,
- uint8_t offset)
-{
- return getreg16(priv->config->base + offset);
-}
-
/************************************************************************************
* Name: stm32l4_i2c_getreg32
*
@@ -469,20 +439,6 @@ static inline uint32_t stm32l4_i2c_getreg32(FAR struct stm32l4_i2c_priv_s *priv,
return getreg32(priv->config->base + offset);
}
-/************************************************************************************
- * Name: stm32l4_i2c_putreg
- *
- * Description:
- * Put a 16-bit register value by offset
- *
- ************************************************************************************/
-
-static inline void stm32l4_i2c_putreg(FAR struct stm32l4_i2c_priv_s *priv, uint8_t offset,
- uint16_t value)
-{
- putreg16(value, priv->config->base + offset);
-}
-
/************************************************************************************
* Name: stm32l4_i2c_putreg32
*
@@ -497,21 +453,6 @@ static inline void stm32l4_i2c_putreg32(FAR struct stm32l4_i2c_priv_s *priv,
putreg32(value, priv->config->base + offset);
}
-/************************************************************************************
- * Name: stm32l4_i2c_modifyreg
- *
- * Description:
- * Modify a 16-bit register value by offset
- *
- ************************************************************************************/
-
-static inline void stm32l4_i2c_modifyreg(FAR struct stm32l4_i2c_priv_s *priv,
- uint8_t offset, uint16_t clearbits,
- uint16_t setbits)
-{
- modifyreg16(priv->config->base + offset, clearbits, setbits);
-}
-
/************************************************************************************
* Name: stm32l4_i2c_modifyreg32
*
@@ -615,7 +556,6 @@ static inline int stm32l4_i2c_sem_waitdone(FAR struct stm32l4_i2c_priv_s *priv)
{
struct timespec abstime;
irqstate_t flags;
- uint32_t regval;
int ret;
flags = enter_critical_section();
@@ -866,7 +806,7 @@ static inline void stm32l4_i2c_sem_waitstop(FAR struct stm32l4_i2c_priv_s *priv)
/* Check for timeout error */
- sr = stm32l4_i2c_getreg(priv, STM32L4_I2C_ISR_OFFSET);
+ sr = stm32l4_i2c_getreg32(priv, STM32L4_I2C_ISR_OFFSET);
if ((sr & I2C_INT_TIMEOUT) != 0)
{
return;
@@ -1065,6 +1005,28 @@ static void stm32l4_i2c_setclock(FAR struct stm32l4_i2c_priv_s *priv, uint32_t f
uint8_t scl_h_period;
uint8_t scl_l_period;
+ /* XXX haque; these are the only freqs we support at the moment, until we can
+ * compute the values ourself.
+ */
+
+ if (frequency == 10000)
+ {
+ }
+ else if (frequency == 100000)
+ {
+ }
+ else if (frequency == 400000)
+ {
+ }
+ else
+ {
+#if 1
+ frequency = 1000000;
+#else
+ frequency = 500000;
+#endif
+ }
+
/* Has the I2C bus frequency changed? */
if (frequency != priv->frequency)
@@ -1079,41 +1041,101 @@ static void stm32l4_i2c_setclock(FAR struct stm32l4_i2c_priv_s *priv, uint32_t f
/* Update timing and control registers */
- /* TODO: speed/timing calcs */
-#warning "check set filters before timing, see RM0316"
-
- /* values from 100khz at 8mhz i2c clock */
-
- /* prescaler */
- /* t_presc= (presc+1)*t_i2cclk */
- /* RM0316 */
+ /* TODO: speed/timing calcs, taking into consideration
+ * STM32L4_PCLK1_FREQUENCY, or SYSCLK, or HSI16
+ * clock source, RCC_CCIPR, I2CxSEL, 0 = PCKL, 1 = SCLK, 2 = HSI16, 3 = reserved
+#warning "check set filters before timing, see RM0351 35.4.4 p 1112"
+ * analog filter; suppress spikes up to 50 ns in fast-mode and fast-mode plus
+ * ANFOFF cr1
+ * DNF cr1; 1-15 I2CCLK periods
+ */
+ /* RM0351 35.4.9 p 1140 */
if (frequency == 10000)
{
- presc = 0x01;
- scl_l_period = 0xc7;
- scl_h_period = 0xc3;
- h_time = 0x02;
- s_time = 0x04;
+#if 1
+ /* 10 KHz values from I2C timing tool with clock 80mhz */
+
+ presc = 0x0b; /* PRESC - (+1) prescale I2CCLK */
+ scl_l_period = 0xff; /* SCLL - SCL low period in master mode */
+ scl_h_period = 0xba; /* SCLH - SCL high period in master mode */
+ h_time = 0x00; /* SDADEL - (+1) data hold time after SCL falling edge */
+ s_time = 0x01; /* SCLDEL - (+1) data setup time from SDA edge to SCL rising edge */
+
+#else
+ /* 10 KHz values from datasheet with clock 8mhz */
+
+ presc = 0x03; /* PRESC - (+1) prescale I2CCLK */
+ scl_l_period = 0xc7; /* SCLL - SCL low period in master mode */
+ scl_h_period = 0xc3; /* SCLH - SCL high period in master mode */
+ h_time = 0x02; /* SDADEL - (+1) data hold time after SCL falling edge */
+ s_time = 0x04; /* SCLDEL - (+1) data setup time from SDA edge to SCL rising edge */
+#endif
}
else if (frequency == 100000)
{
- /* values from datasheet with clock 8mhz */
+#if 1
+ /* 100 KHz values from I2C timing tool with clock 80mhz */
+
+ presc = 0x01; /* PRESC - (+1) prescale I2CCLK */
+ scl_l_period = 0xe7; /* SCLL - SCL low period in master mode */
+ scl_h_period = 0x9b; /* SCLH - SCL high period in master mode */
+ h_time = 0x00; /* SDADEL - (+1) data hold time after SCL falling edge */
+ s_time = 0x0d; /* SCLDEL - (+1) data setup time from SDA edge to SCL rising edge */
+#else
+ /* 100 KHz values from datasheet with clock 8mhz */
presc = 0x01;
scl_l_period = 0x13;
scl_h_period = 0x0f;
h_time = 0x02;
s_time = 0x04;
+#endif
}
- else
+ else if (frequency == 400000)
{
+#if 1
+ /* 400 KHz values from I2C timing tool for clock of 80mhz */
+
+ presc = 0x01; /* PRESC - (+1) prescale I2CCLK */
+ scl_l_period = 0x43; /* SCLL - SCL low period in master mode */
+ scl_h_period = 0x13; /* SCLH - SCL high period in master mode */
+ h_time = 0x00; /* SDADEL - (+1) data hold time after SCL falling edge */
+ s_time = 0x07; /* SCLDEL - (+1) data setup time from SDA edge to SCL rising edge */
+#else
+ /* 400 KHz values from datasheet for clock of 8mhz */
+
presc = 0x00;
scl_l_period = 0x09;
scl_h_period = 0x03;
h_time = 0x01;
s_time = 0x03;
+#endif
}
+ else
+ {
+#if 1
+ /* 1000 KHhz values from I2C timing tool for clock of 80mhz */
+
+ presc = 0x01; /* PRESC - (+1) prescale I2CCLK */
+ scl_l_period = 0x14; /* SCLL - SCL low period in master mode */
+ scl_h_period = 0x13; /* SCLH - SCL high period in master mode */
+ h_time = 0x00; /* SDADEL - (+1) data hold time after SCL falling edge */
+ s_time = 0x05; /* SCLDEL - (+1) data setup time from SDA edge to SCL rising edge */
+
+ frequency = 1000000;
+#else
+ /* 500 KHhz values from datasheet for clock of 8mhz */
+
+ presc = 0x00;
+ scl_l_period = 0x06;
+ scl_h_period = 0x03;
+ h_time = 0x00;
+ s_time = 0x01;
+
+ frequency = 500000;
+#endif
+ }
uint32_t timingr =
(presc << I2C_TIMINGR_PRESC_SHIFT) |
@@ -1124,10 +1146,6 @@ static void stm32l4_i2c_setclock(FAR struct stm32l4_i2c_priv_s *priv, uint32_t f
stm32l4_i2c_putreg32(priv, STM32L4_I2C_TIMINGR_OFFSET, timingr);
- /* Bit 14 of OAR1 must be configured and kept at 1 */
-
- stm32l4_i2c_putreg(priv, STM32L4_I2C_OAR1_OFFSET, I2C_OAR1_ONE);
-
/* Re-enable the peripheral (or not) */
if (pe)
@@ -1318,7 +1336,7 @@ static int stm32l4_i2c_isr(struct stm32l4_i2c_priv_s *priv)
/* Send a byte */
stm32l4_i2c_traceevent(priv, I2CEVENT_SENDBYTE, priv->dcnt);
- stm32l4_i2c_putreg(priv, STM32L4_I2C_TXDR_OFFSET, *priv->ptr++);
+ stm32l4_i2c_putreg32(priv, STM32L4_I2C_TXDR_OFFSET, *priv->ptr++);
priv->dcnt--;
}
}
@@ -1354,7 +1372,7 @@ static int stm32l4_i2c_isr(struct stm32l4_i2c_priv_s *priv)
#endif
/* Receive a byte */
- *priv->ptr++ = stm32l4_i2c_getreg(priv, STM32L4_I2C_RXDR_OFFSET);
+ *priv->ptr++ = (uint8_t) stm32l4_i2c_getreg32(priv, STM32L4_I2C_RXDR_OFFSET);
/* Disable acknowledge when last byte is to be received */
@@ -1554,9 +1572,9 @@ static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv)
/* Enable power and reset the peripheral */
- modifyreg32(STM32L4_RCC_APB1ENR, 0, priv->config->clk_bit);
- modifyreg32(STM32L4_RCC_APB1RSTR, 0, priv->config->reset_bit);
- modifyreg32(STM32L4_RCC_APB1RSTR, priv->config->reset_bit, 0);
+ modifyreg32(STM32L4_RCC_APB1ENR1, 0, priv->config->clk_bit);
+ modifyreg32(STM32L4_RCC_APB1RSTR1, 0, priv->config->reset_bit);
+ modifyreg32(STM32L4_RCC_APB1RSTR1, priv->config->reset_bit, 0);
/* Configure pins */
@@ -1588,8 +1606,8 @@ static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv)
priv->frequency = 0;
- /* TODO: f303 i2c clock source RCC_CFGR3 */
- /* RCC_CFGR3_I2C1SW (default is HSI clock) */
+ /* TODO: i2c clock source RCC_CCIPR */
+ /* RCC_CCIPR I2CxSEL (default is PCLK clock) */
stm32l4_i2c_setclock(priv, 100000);
@@ -1629,7 +1647,7 @@ static int stm32l4_i2c_deinit(FAR struct stm32l4_i2c_priv_s *priv)
/* Disable clocking */
- modifyreg32(STM32L4_RCC_APB1ENR, priv->config->clk_bit, 0);
+ modifyreg32(STM32L4_RCC_APB1ENR1, priv->config->clk_bit, 0);
return OK;
}
@@ -1713,8 +1731,8 @@ static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg
status = stm32l4_i2c_getstatus(priv);
ret = -ETIMEDOUT;
- i2cdbg("Timed out: CR1: %04x status: %08x\n",
- stm32l4_i2c_getreg(priv, STM32L4_I2C_CR1_OFFSET), status);
+ i2cdbg("Timed out: CR1: %08x status: %08x\n",
+ stm32l4_i2c_getreg32(priv, STM32L4_I2C_CR1_OFFSET), status);
/* "Note: When the STOP, START or PEC bit is set, the software must
* not perform any write access to I2C_CR1 before this bit is
@@ -1836,6 +1854,7 @@ static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg
#ifdef CONFIG_I2C_RESET
static int stm32l4_i2c_reset(FAR struct i2c_master_s * dev)
{
+ FAR struct stm32l4_i2c_priv_s *priv = (struct stm32l4_i2c_priv_s *)dev;
unsigned int clock_count;
unsigned int stretch_count;
uint32_t scl_gpio;
@@ -1962,7 +1981,7 @@ out:
FAR struct i2c_master_s *stm32l4_i2cbus_initialize(int port)
{
struct stm32l4_i2c_priv_s * priv = NULL; /* private data of device with multiple instances */
- irqtate_t flags;
+ irqstate_t flags;
#if STM32L4_PCLK1_FREQUENCY < 4000000
# warning STM32L4_I2C_INIT: Peripheral clock must be at least 4 MHz to support 400 kHz operation.
@@ -2054,6 +2073,5 @@ int stm32l4_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
return OK;
}
-#endif /* CONFIG_STM32L4_STM32F30XX */
#endif /* CONFIG_STM32L4_I2C1 || CONFIG_STM32L4_I2C2 || CONFIG_STM32L4_I2C3 */
diff --git a/arch/arm/src/stm32l4/stm32l4_serial.c b/arch/arm/src/stm32l4/stm32l4_serial.c
index 8f68409dba5..f29a229992e 100644
--- a/arch/arm/src/stm32l4/stm32l4_serial.c
+++ b/arch/arm/src/stm32l4/stm32l4_serial.c
@@ -208,6 +208,22 @@
# define PM_IDLE_DOMAIN 0 /* Revisit */
#endif
+/* Keep track if a Break was set
+ *
+ * Note:
+ *
+ * 1) This value is set in the priv->ie but never written to the control
+ * register. It must not collide with USART_CR1_USED_INTS or USART_CR3_EIE
+ * 2) USART_CR3_EIE is also carried in the up_dev_s ie member.
+ *
+ * See up_restoreusartint where the masking is done.
+ */
+
+#ifdef CONFIG_STM32L4_SERIALBRK_BSDCOMPAT
+# define USART_CR1_IE_BREAK_INPROGRESS_SHFTS 15
+# define USART_CR1_IE_BREAK_INPROGRESS (1 << USART_CR1_IE_BREAK_INPROGRESS_SHFTS)
+#endif
+
#ifdef USE_SERIALDRIVER
#ifdef HAVE_UART
@@ -1560,11 +1576,12 @@ static int up_interrupt_common(struct up_dev_s *priv)
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
-#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT)
+#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) \
+ || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
#endif
-#ifdef CONFIG_SERIAL_TERMIOS
+#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
#endif
int ret = OK;
@@ -1720,30 +1737,74 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
break;
#endif /* CONFIG_SERIAL_TERMIOS */
-#ifdef CONFIG_USART_BREAKS
+#ifdef CONFIG_STM32L4_USART_BREAKS
+# ifdef CONFIG_STM32L4_SERIALBRK_BSDCOMPAT
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
- uint32_t cr2;
irqstate_t flags;
+ uint32_t tx_break;
flags = enter_critical_section();
- cr2 = up_serialin(priv, STM32L4_USART_CR2_OFFSET);
- up_serialout(priv, STM32L4_USART_CR2_OFFSET, cr2 | USART_CR2_LINEN);
+
+ /* Disable any further tx activity */
+
+ priv->ie |= USART_CR1_IE_BREAK_INPROGRESS;
+
+ up_txint(dev, false);
+
+ /* Configure TX as a GPIO output pin and Send a break signal*/
+
+ tx_break = GPIO_OUTPUT | (~(GPIO_MODE_MASK|GPIO_OUTPUT_SET) & priv->tx_gpio);
+ stm32_configgpio(tx_break);
+
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
- uint32_t cr2;
irqstate_t flags;
flags = enter_critical_section();
- cr2 = up_serialin(priv, STM32L4_USART_CR2_OFFSET);
- up_serialout(priv, STM32L4_USART_CR2_OFFSET, cr2 & ~USART_CR2_LINEN);
+
+ /* Configure TX back to U(S)ART */
+
+ stm32_configgpio(priv->tx_gpio);
+
+ priv->ie &= ~USART_CR1_IE_BREAK_INPROGRESS;
+
+ /* Enable further tx activity */
+
+ up_txint(dev, true);
+
leave_critical_section(flags);
}
break;
+# else
+ case TIOCSBRK: /* No BSD compatibility: Turn break on for M bit times */
+ {
+ uint32_t cr1;
+ irqstate_t flags;
+
+ flags = enter_critical_section();
+ cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
+ up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 | USART_CR1_SBK);
+ leave_critical_section(flags);
+ }
+ break;
+
+ case TIOCCBRK: /* No BSD compatibility: May turn off break too soon */
+ {
+ uint32_t cr1;
+ irqstate_t flags;
+
+ flags = enter_critical_section();
+ cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
+ up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 & ~USART_CR1_SBK);
+ leave_critical_section(flags);
+ }
+ break;
+# endif
#endif
default:
@@ -2133,6 +2194,13 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
}
# endif
+# ifdef CONFIG_STM32L4_SERIALBRK_BSDCOMPAT
+ if (priv->ie & USART_CR1_IE_BREAK_INPROGRESS)
+ {
+ return;
+ }
+# endif
+
up_restoreusartint(priv, ie);
/* Fake a TX interrupt here by just calling uart_xmitchars() with
diff --git a/arch/arm/src/str71x/Kconfig b/arch/arm/src/str71x/Kconfig
index 2b8bc7278ff..db945aaf599 100644
--- a/arch/arm/src/str71x/Kconfig
+++ b/arch/arm/src/str71x/Kconfig
@@ -80,25 +80,25 @@ config STR71X_UART0
bool "UART0"
default n
select STR71X_GPIO0
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
config STR71X_UART1
bool "UART1"
default n
select STR71X_GPIO0
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
config STR71X_UART2
bool "UART2"
default n
select STR71X_GPIO0
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
config STR71X_UART3
bool "UART3"
default n
select STR71X_GPIO0
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
config STR71X_USB
bool "USB"
diff --git a/arch/arm/src/tiva/Kconfig b/arch/arm/src/tiva/Kconfig
index 96b82a46913..20be1413092 100644
--- a/arch/arm/src/tiva/Kconfig
+++ b/arch/arm/src/tiva/Kconfig
@@ -414,48 +414,48 @@ config TIVA_I2C9
config TIVA_UART0
bool "UART0"
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
default n
config TIVA_UART1
bool "UART1"
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
default n
config TIVA_UART2
bool "UART2"
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
default n
config TIVA_UART3
bool "UART3"
default n
depends on TIVA_HAVE_UART3
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
config TIVA_UART4
bool "UART4"
default n
depends on TIVA_HAVE_UART4
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
config TIVA_UART5
bool "UART5"
default n
depends on TIVA_HAVE_UART5
- select ARCH_HAVE_UART5
+ select UART5_SERIALDRIVER
config TIVA_UART6
bool "UART6"
default n
depends on TIVA_HAVE_UART6
- select ARCH_HAVE_UART6
+ select UART6_SERIALDRIVER
config TIVA_UART7
bool "UART7"
default n
depends on TIVA_HAVE_UART7
- select ARCH_HAVE_UART7
+ select UART7_SERIALDRIVER
config TIVA_SSI0
bool "SSI0"
diff --git a/arch/arm/src/tiva/tiva_adc.h b/arch/arm/src/tiva/tiva_adc.h
index c6fc9ac2e07..693252ad35d 100644
--- a/arch/arm/src/tiva/tiva_adc.h
+++ b/arch/arm/src/tiva/tiva_adc.h
@@ -125,32 +125,32 @@
struct tiva_adc_step_cfg_s
{
- uint8_t adc; /* Parent peripheral */
- uint8_t sse; /* Parent sample sequencer (SSE) */
- uint8_t step; /* Which step in the sequencer */
- uint8_t shold; /* Sample and hold time */
- uint8_t flags; /* Last step? Interrupt enabled?
- * Internal temperature sensor? */
- uint8_t ain; /* Which analog input */
+ uint8_t adc; /* Parent peripheral */
+ uint8_t sse; /* Parent sample sequencer (SSE) */
+ uint8_t step; /* Which step in the sequencer */
+ uint8_t shold; /* Sample and hold time */
+ uint8_t flags; /* Last step? Interrupt enabled?
+ * Internal temperature sensor? */
+ uint8_t ain; /* Which analog input */
};
/* Sample Sequencer configuration options */
struct tiva_adc_sse_cfg_s
{
- uint8_t priority; /* Conversion priority, 0-3 no duplicates */
- uint8_t trigger; /* Trigger source */
+ uint8_t priority; /* Conversion priority, 0-3 no duplicates */
+ uint8_t trigger; /* Trigger source */
};
/* ADC peripheral configuration options */
struct tiva_adc_cfg_s
{
- uint8_t adc; /* ADC peripheral number */
- bool sse[4]; /* active SSEs in a bitmask */
- struct tiva_adc_sse_cfg_s ssecfg[4]; /* SSE configuration */
- uint8_t steps; /* Size of the stepcfg array */
- struct tiva_adc_step_cfg_s *stepcfg; /* Step configuration array */
+ uint8_t adc; /* ADC peripheral number */
+ bool sse[4]; /* active SSEs in a bitmask */
+ struct tiva_adc_sse_cfg_s ssecfg[4]; /* SSE configuration */
+ uint8_t steps; /* Size of the stepcfg array */
+ struct tiva_adc_step_cfg_s *stepcfg; /* Step configuration array */
};
/****************************************************************************
@@ -165,16 +165,11 @@ extern "C"
#define EXTERN extern
#endif
-/****************************************************************************
- * Inline Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
-/* Only allow access to upper level ADC drivers if they are enabled */
-#ifdef CONFIG_ADC
+#ifdef CONFIG_TIVA_ADC
/****************************************************************************
* Driver Function Prototypes
@@ -228,7 +223,7 @@ void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse);
void tiva_adc_unlock(FAR struct tiva_adc_s *priv, int sse);
-#endif /* CONFIG_ADC */
+#endif /* CONFIG_TIVA_ADC */
/****************************************************************************
* Library Function Prototypes
diff --git a/arch/arm/src/tiva/tiva_adclow.c b/arch/arm/src/tiva/tiva_adclow.c
index 7b2f8e2d9d0..7a0b5509ce9 100644
--- a/arch/arm/src/tiva/tiva_adclow.c
+++ b/arch/arm/src/tiva/tiva_adclow.c
@@ -1,8 +1,10 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_adclow.c
*
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2015 TRD2 Inc. All rights reserved.
* Author: Calvin Maguranis
+ * Gregory Nutt
*
* References:
*
@@ -67,8 +69,8 @@
#include
#include
#include
-#include
#include
+#include
#include
@@ -80,7 +82,7 @@
#include "chip/tiva_pinmap.h"
#include "chip/tiva_syscontrol.h"
-#if defined (CONFIG_TIVA_ADC) && defined (CONFIG_ADC)
+#ifdef CONFIG_TIVA_ADC
/****************************************************************************
* Pre-processor Definitions
@@ -135,6 +137,8 @@
/* Upper level ADC driver ***************************************************/
+static int tiva_adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback);
static void tiva_adc_reset(struct adc_dev_s *dev);
static int tiva_adc_setup(struct adc_dev_s *dev);
static void tiva_adc_shutdown(struct adc_dev_s *dev);
@@ -149,6 +153,7 @@ static int tiva_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg);
static const struct adc_ops_s g_adcops =
{
+ .ao_bind = tiva_adc_bind,
.ao_reset = tiva_adc_reset,
.ao_setup = tiva_adc_setup,
.ao_shutdown = tiva_adc_shutdown,
@@ -163,6 +168,7 @@ static const struct adc_ops_s g_adcops =
struct tiva_adc_s
{
struct adc_dev_s *dev;
+ const struct adc_callback_s *cb;
bool cfg; /* Configuration state */
bool ena; /* Operation state */
uint8_t devno; /* ADC device number */
@@ -373,6 +379,25 @@ static void tiva_adc_irqinitialize(struct tiva_adc_cfg_s *cfg)
#endif
}
+/****************************************************************************
+ * Name: tiva_adc_bind
+ *
+ * Description:
+ * Bind the upper-half driver callbacks to the lower-half implementation. This
+ * must be called early in order to receive ADC event notifications.
+ *
+ ****************************************************************************/
+
+static int tiva_adc_bind(FAR struct adc_dev_s *dev,
+ FAR const struct adc_callback_s *callback)
+{
+ struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
+
+ DEBUGASSERT(priv != NULL);
+ priv->cb = callback;
+ return OK;
+}
+
/****************************************************************************
* Name: tiva_adc_reset
*
@@ -559,11 +584,20 @@ static int tiva_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
fifo_count = tiva_adc_sse_data(priv->devno, sse, buf);
- for (i = 0; i < fifo_count; ++i)
+ /* Verify that the upper-half driver has bound its callback functions */
+
+ if (priv->cb != NULL)
{
- (void)adc_receive(dev,
- tiva_adc_get_ain(priv->devno, sse, i),
- buf[i]);
+ DEBUGASSERT(priv->cb->au_receive != NULL);
+
+ for (i = 0; i < fifo_count; ++i)
+ {
+ /* Perform the data received callback */
+
+ priv->cb->au_receive(dev,
+ tiva_adc_get_ain(priv->devno, sse, i),
+ buf[i]);
+ }
}
/* Release our lock on the ADC structure */
@@ -651,18 +685,28 @@ static void tiva_adc_read(void *arg)
/* This is a serious error: indicates invalid pointer indirection
* and should cause a full system stop.
*/
+
alldbg("PANIC!!! Invalid ADC device number given %d\n", sse->adc);
PANIC();
return;
}
- for (i = 0; i < fifo_count; ++i)
+ /* Verify that the upper-half driver has bound its callback functions */
+
+ if (priv->cb != NULL)
{
- (void)adc_receive(dev,
- tiva_adc_get_ain(sse->adc, sse->num, i),
- buf[i]);
- avdbg("AIN%d=0x%04x\n",
- tiva_adc_get_ain(sse->adc, sse->num, i), buf[i]);
+ DEBUGASSERT(priv->cb->au_receive != NULL);
+
+ for (i = 0; i < fifo_count; ++i)
+ {
+ /* Perform the data received callback */
+
+ priv->cb->au_receive(dev,
+ tiva_adc_get_ain(sse->adc, sse->num, i),
+ buf[i]);
+ avdbg("AIN%d = 0x%04x\n",
+ tiva_adc_get_ain(sse->adc, sse->num, i), buf[i]);
+ }
}
/* Exit, re-enabling ADC interrupts */
@@ -858,6 +902,7 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg,
/* Now we are initialized */
adc->ena = true;
+ adc->cb = NULL;
#ifdef CONFIG_DEBUG_ANALOG
tiva_adc_runtimeobj_vals();
@@ -1041,4 +1086,4 @@ static void tiva_adc_dump_dev(void)
}
#endif
-#endif /* CONFIG_TIVA_ADC && CONFIG_ADC */
+#endif /* CONFIG_TIVA_ADC */
diff --git a/arch/arm/src/tms570/Kconfig b/arch/arm/src/tms570/Kconfig
index 81136d3e339..7c2f6a8bf85 100644
--- a/arch/arm/src/tms570/Kconfig
+++ b/arch/arm/src/tms570/Kconfig
@@ -88,14 +88,14 @@ config TMS570_MIBASPI1
config TMS570_SCI1
bool "Serial Communication Interface 1 (SCI1)"
default n
- select ARCH_HAVE_SCI1
+ select SCI1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config TMS570_SCI2
bool "Serial Communication Interface 2 (SCI2)"
default n
depends on TMS570_HAVE_SCI2
- select ARCH_HAVE_SCI1
+ select SCI1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
endmenu # TMS570 Peripheral Support
diff --git a/arch/avr/src/Makefile b/arch/avr/src/Makefile
index 2905a755652..84c19eca52a 100644
--- a/arch/avr/src/Makefile
+++ b/arch/avr/src/Makefile
@@ -1,7 +1,7 @@
############################################################################
# arch/avr/src/Makefile
#
-# Copyright (C) 2010-2012, 2014 Gregory Nutt. All rights reserved.
+# Copyright (C) 2010-2012, 2014, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt
#
# Redistribution and use in source and binary forms, with or without
@@ -83,6 +83,11 @@ COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
+# Override in Make.defs if linker is not 'ld'
+
+LDSTARTGROUP ?= --start-group
+LDENDGROUP ?= --end-group
+
LDFLAGS += $(ARCHSCRIPT)
EXTRA_LIBS ?=
LINKLIBS ?=
@@ -139,7 +144,7 @@ board/libboard$(LIBEXT):
nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
@echo "LD: nuttx"
$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \
- --start-group $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) --end-group
+ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
$(Q) $(NM) $(NUTTX) | \
grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
diff --git a/arch/avr/src/at32uc3/Kconfig b/arch/avr/src/at32uc3/Kconfig
index d12c0ad17de..4f244e530cb 100644
--- a/arch/avr/src/at32uc3/Kconfig
+++ b/arch/avr/src/at32uc3/Kconfig
@@ -73,18 +73,15 @@ menu "AT32U3 Peripheral Selections"
config AVR32_USART0
bool "USART0"
default n
- select ARCH_HAVE_USART0
config AVR32_USART1
bool "USART1"
default n
- select ARCH_HAVE_USART1
config AVR32_USART2
bool "USART2"
default n
depends on ARCH_CHIP_AT32UC3B0
- select ARCH_HAVE_USART2
endmenu # AT32U3 Peripheral Selections
@@ -108,7 +105,7 @@ config AVR32_USART0_MODEM
config AVR32_USART0_RS232
bool "USART0 is RS-232"
- select USART0_ISUART
+ select USART0_SERIALDRIVER
config AVR32_USART0_RS485
bool "USART0 is RS-485"
@@ -140,7 +137,7 @@ config AVR32_USART1_MODEM
config AVR32_USART1_RS232
bool "USART1 is RS-232"
- select USART1_ISUART
+ select USART1_SERIALDRIVER
config AVR32_USART1_RS485
bool "USART1 is RS-485"
@@ -172,7 +169,7 @@ config AVR32_USART2_MODEM
config AVR32_USART2_RS232
bool "USART2 is RS-232"
- select USART2_ISUART
+ select USART2_SERIALDRIVER
config AVR32_USART2_RS485
bool "USART2 is RS-485"
diff --git a/arch/avr/src/at90usb/Kconfig b/arch/avr/src/at90usb/Kconfig
index 6481e6973f0..cef96598288 100644
--- a/arch/avr/src/at90usb/Kconfig
+++ b/arch/avr/src/at90usb/Kconfig
@@ -41,7 +41,7 @@ config AVR_SPI
config AVR_USART1
bool "USART1"
default n
- select ARCH_HAVE_USART1
+ select USART1_SERIALDRIVER
config AVR_USBDEV
bool "USB device"
diff --git a/arch/avr/src/atmega/Kconfig b/arch/avr/src/atmega/Kconfig
index 8c3d6c01456..2d2c4d813a9 100644
--- a/arch/avr/src/atmega/Kconfig
+++ b/arch/avr/src/atmega/Kconfig
@@ -31,11 +31,11 @@ menu "ATMega Peripheral Selections"
config AVR_USART0
bool "USART0"
- select ARCH_HAVE_USART0
+ select USART0_SERIALDRIVER
config AVR_USART1
bool "USART1"
- select ARCH_HAVE_USART1
+ select USART1_SERIALDRIVER
endmenu # ATMega Peripheral Selections
diff --git a/arch/hc/src/Makefile b/arch/hc/src/Makefile
index fb165188fe1..efe3876f18c 100644
--- a/arch/hc/src/Makefile
+++ b/arch/hc/src/Makefile
@@ -1,7 +1,7 @@
############################################################################
# arch/hc/src/Makefile
#
-# Copyright (C) 2009, 2011-2012, 2014 Gregory Nutt. All rights reserved.
+# Copyright (C) 2009, 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt
#
# Redistribution and use in source and binary forms, with or without
@@ -83,6 +83,11 @@ COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
+# Override in Make.defs if linker is not 'ld'
+
+LDSTARTGROUP ?= --start-group
+LDENDGROUP ?= --end-group
+
LDFLAGS += $(ARCHSCRIPT)
EXTRA_LIBS ?=
LINKLIBS ?=
@@ -138,7 +143,7 @@ board/libboard$(LIBEXT):
nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
$(Q) echo "LD: nuttx"
$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(HEAD_OBJ) \
- --start-group $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) --end-group
+ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
$(Q) $(NM) $(NUTTX)$(EXEEXT) | \
grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
diff --git a/arch/hc/src/m9s12/Kconfig b/arch/hc/src/m9s12/Kconfig
index cd70fc9814a..9e05745e49c 100644
--- a/arch/hc/src/m9s12/Kconfig
+++ b/arch/hc/src/m9s12/Kconfig
@@ -11,12 +11,12 @@ menu "M9S12 Peripheral Selection"
config HCS12_SCI0
bool "SCI0"
default n
- select ARCH_HAVE_SCI0
+ select SCI0_SERIALDRIVER
config HCS12_SCI1
bool "SCI1"
default n
- select ARCH_HAVE_SCI1
+ select SCI1_SERIALDRIVER
endmenu # M9S12 Peripheral Selection
diff --git a/arch/mips/src/Makefile b/arch/mips/src/Makefile
index a746fd22301..9efc9af5776 100644
--- a/arch/mips/src/Makefile
+++ b/arch/mips/src/Makefile
@@ -1,7 +1,7 @@
############################################################################
# arch/mips/src/Makefile
#
-# Copyright (C) 2011-2012, 2014 Gregory Nutt. All rights reserved.
+# Copyright (C) 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt
#
# Redistribution and use in source and binary forms, with or without
@@ -80,6 +80,11 @@ COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
+# Override in Make.defs if linker is not 'ld'
+
+LDSTARTGROUP ?= --start-group
+LDENDGROUP ?= --end-group
+
LDFLAGS += $(ARCHSCRIPT)
EXTRA_LIBS ?=
LINKLIBS ?=
@@ -136,7 +141,7 @@ board/libboard$(LIBEXT):
nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
@echo "LD: nuttx"
$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(HEAD_OBJ) $(EXTRA_OBJS) \
- --start-group $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) --end-group
+ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
$(Q) $(NM) $(NUTTX)$(EXEEXT) | \
grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
diff --git a/arch/mips/src/pic32mx/Kconfig b/arch/mips/src/pic32mx/Kconfig
index 6d8894bf624..3da65ead359 100644
--- a/arch/mips/src/pic32mx/Kconfig
+++ b/arch/mips/src/pic32mx/Kconfig
@@ -579,37 +579,37 @@ config PIC32MX_SPI4
config PIC32MX_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MX_UART2
bool "UART2"
default n
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MX_UART3
bool "UART3"
default n
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MX_UART4
bool "UART4"
default n
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MX_UART5
bool "UART5"
default n
- select ARCH_HAVE_UART5
+ select UART5_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MX_UART6
bool "UART6"
default n
- select ARCH_HAVE_UART6
+ select UART6_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MX_ADC
diff --git a/arch/mips/src/pic32mz/Kconfig b/arch/mips/src/pic32mz/Kconfig
index bca6f2b7644..ac412b6dc52 100644
--- a/arch/mips/src/pic32mz/Kconfig
+++ b/arch/mips/src/pic32mz/Kconfig
@@ -172,37 +172,37 @@ config PIC32MZ_SPI6
config PIC32MZ_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MZ_UART2
bool "UART2"
default n
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MZ_UART3
bool "UART3"
default n
- select ARCH_HAVE_UART3
+ select UART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MZ_UART4
bool "UART4"
default n
- select ARCH_HAVE_UART4
+ select UART4_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MZ_UART5
bool "UART5"
default n
- select ARCH_HAVE_UART5
+ select UART5_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MZ_UART6
bool "UART6"
default n
- select ARCH_HAVE_UART6
+ select UART6_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config PIC32MZ_ADC
diff --git a/arch/rgmp/src/Makefile b/arch/rgmp/src/Makefile
index 1fb3618d96f..4fe3bbfbfd9 100644
--- a/arch/rgmp/src/Makefile
+++ b/arch/rgmp/src/Makefile
@@ -1,7 +1,7 @@
############################################################################
# arch/rgmp/src/Makefile
#
-# Copyright (C) 2011-2012, 2014 Gregory Nutt. All rights reserved.
+# Copyright (C) 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt
#
# Redistribution and use in source and binary forms, with or without
@@ -39,25 +39,30 @@ include $(CONFIG_RGMP_SUBARCH)/Make.defs
RGMP_ARCH_ASRCS := $(addprefix $(CONFIG_RGMP_SUBARCH)/,$(RGMP_ARCH_ASRCS))
RGMP_ARCH_CSRCS := $(addprefix $(CONFIG_RGMP_SUBARCH)/,$(RGMP_ARCH_CSRCS))
-CPPFLAGS += -I$(TOPDIR)/sched -I$(TOPDIR)/fs $(EXTRADEFINES)
-CFLAGS += -I$(TOPDIR)/sched -I$(TOPDIR)/fs $(EXTRADEFINES)
-CXXFLAGS += -I$(TOPDIR)/sched -I$(TOPDIR)/fs $(EXTRADEFINES)
+CPPFLAGS += -I$(TOPDIR)/sched -I$(TOPDIR)/fs $(EXTRADEFINES)
+CFLAGS += -I$(TOPDIR)/sched -I$(TOPDIR)/fs $(EXTRADEFINES)
+CXXFLAGS += -I$(TOPDIR)/sched -I$(TOPDIR)/fs $(EXTRADEFINES)
-ASRCS = $(RGMP_ARCH_ASRCS)
-CSRCS = nuttx.c cxx.c $(RGMP_ARCH_CSRCS)
-AOBJS = $(ASRCS:.S=$(OBJEXT))
-COBJS = $(CSRCS:.c=$(OBJEXT))
+ASRCS = $(RGMP_ARCH_ASRCS)
+CSRCS = nuttx.c cxx.c $(RGMP_ARCH_CSRCS)
+AOBJS = $(ASRCS:.S=$(OBJEXT))
+COBJS = $(CSRCS:.c=$(OBJEXT))
-SRCS = $(ASRCS) $(CSRCS)
-OBJS = $(AOBJS) $(COBJS)
+SRCS = $(ASRCS) $(CSRCS)
+OBJS = $(AOBJS) $(COBJS)
-LINKSRCS = rgmp.c bridge.c
-LINKOBJS = $(LINKSRCS:.c=$(OBJEXT))
+LINKSRCS = rgmp.c bridge.c
+LINKOBJS = $(LINKSRCS:.c=$(OBJEXT))
-LDFLAGS += -T$(RGMPLKSCPT)
-LDLIBS = $(patsubst %.a,%,$(patsubst lib%,-l%,$(LINKLIBS)))
-LIBPATHS += -L"$(TOPDIR)/lib" -L$(RGMPLIBDIR)
-LDLIBS += -lrgmp $(shell "$(CC)" -print-libgcc-file-name)
+# Override in Make.defs if linker is not 'ld'
+
+LDSTARTGROUP ?= --start-group
+LDENDGROUP ?= --end-group
+
+LDFLAGS += -T$(RGMPLKSCPT)
+LDLIBS = $(patsubst %.a,%,$(patsubst lib%,-l%,$(LINKLIBS)))
+LIBPATHS += -L"$(TOPDIR)/lib" -L$(RGMPLIBDIR)
+LDLIBS += -lrgmp $(shell "$(CC)" -print-libgcc-file-name)
all: libarch$(LIBEXT)
@@ -79,7 +84,7 @@ libarch$(LIBEXT): $(OBJS)
nuttx$(EXEEXT): $(LINKOBJS)
@echo "LD: nuttx$(EXEEXT)"
- @$(LD) $(LDFLAGS) $(LIBPATHS) $(LINKOBJS) --start-group $(LDLIBS) $(EXTRA_LIBS) --end-group -o $(TOPDIR)/$@
+ @$(LD) $(LDFLAGS) $(LIBPATHS) $(LINKOBJS) $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LDENDGROUP) -o $(TOPDIR)/$@
@$(OBJDUMP) -S $(TOPDIR)/$@ > $(TOPDIR)/nuttx.asm
@$(NM) -n $(TOPDIR)/$@ > $(TOPDIR)/nuttx.sym
@$(OBJCOPY) -S -O binary $(TOPDIR)/$@ nuttx.img
diff --git a/arch/sh/src/Makefile b/arch/sh/src/Makefile
index 967818df2a8..81e0b5b8c14 100644
--- a/arch/sh/src/Makefile
+++ b/arch/sh/src/Makefile
@@ -1,7 +1,7 @@
############################################################################
# arch/sh/src/Makefile
#
-# Copyright (C) 2008, 2011-2012, 2014 Gregory Nutt. All rights reserved.
+# Copyright (C) 2008, 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt
#
# Redistribution and use in source and binary forms, with or without
@@ -78,6 +78,11 @@ COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
+# Override in Make.defs if linker is not 'ld'
+
+LDSTARTGROUP ?= --start-group
+LDENDGROUP ?= --end-group
+
LDFLAGS += $(ARCHSCRIPT)
EXTRA_LIBS ?=
LINKLIBS ?=
@@ -134,7 +139,7 @@ board/libboard$(LIBEXT):
nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
@echo "LD: nuttx"
$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(TOPDIR)/$@ $(HEAD_OBJ) \
- --start-group $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) --end-group
+ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
$(Q) $(NM) $(TOPDIR)/$@ | \
grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
diff --git a/arch/sh/src/m16c/Kconfig b/arch/sh/src/m16c/Kconfig
index e1f81d0727b..f70092dfa22 100644
--- a/arch/sh/src/m16c/Kconfig
+++ b/arch/sh/src/m16c/Kconfig
@@ -7,17 +7,17 @@ if ARCH_M16C
config M16C_UART0
bool "UART0"
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
default n
config M16C_UART1
bool "UART1"
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
default n
config M16C_UART2
bool "UART2"
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
default n
endif
diff --git a/arch/sh/src/sh1/Kconfig b/arch/sh/src/sh1/Kconfig
index f3002c37370..2d0723b42b2 100644
--- a/arch/sh/src/sh1/Kconfig
+++ b/arch/sh/src/sh1/Kconfig
@@ -43,12 +43,12 @@ config SH1_ITU4
config SH1_SCI0
bool "SCI0"
default n
- select ARCH_HAVE_SCI0
+ select SCI0_SERIALDRIVER
config SH1_SCI1
bool "SCI1"
default n
- select ARCH_HAVE_SCI1
+ select SCI1_SERIALDRIVER
config SH1_PCU
bool "PCU"
diff --git a/arch/sim/Kconfig b/arch/sim/Kconfig
index b0395968d79..7384d3d7230 100644
--- a/arch/sim/Kconfig
+++ b/arch/sim/Kconfig
@@ -100,6 +100,39 @@ config SIM_WALLTIME
correct for the system timer tick rate. With this definition in the configuration,
sleep() behavior is more or less normal.
+if HOST_LINUX
+choice
+ prompt "Simulation Network Type"
+ default SIM_NET_HOST_ROUTE
+
+config SIM_NET_HOST_ROUTE
+ bool "Use local host route"
+ ---help---
+ Add a host route for the simulation that points to the created tap device. The
+ simulation will not be able to access the public network unless iptables is
+ configured to masquerade for it. See configs/sim/NETWORK-LINUX.txt for more
+ information.
+
+config SIM_NET_BRIDGE
+ bool "Attach to Linux bridge"
+ ---help---
+ Add the created tap device to the specified bridge. You will need to manually
+ configure the bridge IP address (if any) and routes that point to the bridge.
+ See configs/sim/NETWORK-LINUX.txt for more information.
+
+endchoice
+endif
+
+if SIM_NET_BRIDGE
+config SIM_NET_BRIDGE_DEVICE
+ string "Bridge device to attach"
+ default "nuttx0"
+ ---help---
+ The name of the bridge device (as passed to "brctl create") to which the simulation's
+ TAP interface should be added.
+
+endif
+
config SIM_LCDDRIVER
bool "Build a simulated LCD driver"
default y
diff --git a/arch/sim/src/Makefile b/arch/sim/src/Makefile
index 406ac4ee934..72401d6c773 100644
--- a/arch/sim/src/Makefile
+++ b/arch/sim/src/Makefile
@@ -1,7 +1,7 @@
############################################################################
# arch/sim/src/Makefile
#
-# Copyright (C) 2007, 2008, 2011-2012, 2014 Gregory Nutt. All rights reserved.
+# Copyright (C) 2007, 2008, 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt
#
# Redistribution and use in source and binary forms, with or without
@@ -120,6 +120,13 @@ ifeq ($(CONFIG_NET_ETHERNET),y)
HOSTCFLAGS += -DNETDEV_BUFSIZE=$(CONFIG_NET_ETH_MTU)
ifneq ($(HOSTOS),Cygwin)
HOSTSRCS += up_tapdev.c up_netdev.c
+ifeq ($(CONFIG_SIM_NET_BRIDGE),y)
+ HOSTCFLAGS += -DCONFIG_SIM_NET_BRIDGE
+ HOSTCFLAGS += -DCONFIG_SIM_NET_BRIDGE_DEVICE=\"$(CONFIG_SIM_NET_BRIDGE_DEVICE)\"
+endif
+ifeq ($(CONFIG_SIM_NET_HOST_ROUTE),y)
+ HOSTCFLAGS += -DCONFIG_SIM_NET_HOST_ROUTE
+endif
else
HOSTSRCS += up_wpcap.c up_netdev.c
DRVLIB = /lib/w32api/libws2_32.a /lib/w32api/libiphlpapi.a
@@ -154,6 +161,11 @@ ifeq ($(CONFIG_SIM_X11FB),y)
STDLIBS += -lX11 -lXext
endif
+# Override in Make.defs if linker is not 'ld'
+
+LDSTARTGROUP ?= --start-group
+LDENDGROUP ?= --end-group
+
EXTRA_LIBS ?=
EXTRA_LIBPATHS ?=
@@ -245,7 +257,7 @@ endif
nuttx.rel : libarch$(LIBEXT) board/libboard$(LIBEXT) $(HOSTOS)-names.dat $(LINKOBJS)
$(Q) echo "LD: nuttx.rel"
- $(Q) $(LD) -r $(LDLINKFLAGS) $(RELPATHS) $(EXTRA_LIBPATHS) -o $@ $(REQUIREDOBJS) --start-group $(RELLIBS) $(EXTRA_LIBS) --end-group
+ $(Q) $(LD) -r $(LDLINKFLAGS) $(RELPATHS) $(EXTRA_LIBPATHS) -o $@ $(REQUIREDOBJS) $(LDSTARTGROUP) $(RELLIBS) $(EXTRA_LIBS) $(LDENDGROUP)
$(Q) $(OBJCOPY) --redefine-syms=$(HOSTOS)-names.dat $@
# Generate the final NuttX binary by linking the host-specific objects with the NuttX
diff --git a/arch/sim/src/up_internal.h b/arch/sim/src/up_internal.h
index e1e69dc25bd..ddae194a6a1 100644
--- a/arch/sim/src/up_internal.h
+++ b/arch/sim/src/up_internal.h
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/sim/src/up_internal.h
*
- * Copyright (C) 2007, 2009, 2011-2012, 2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007, 2009, 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -46,6 +46,7 @@
#ifndef __ASSEMBLY__
# include
# include
+# include
# include
# include
@@ -308,10 +309,14 @@ int sim_ajoy_initialize(void);
void tapdev_init(void);
unsigned int tapdev_read(unsigned char *buf, unsigned int buflen);
void tapdev_send(unsigned char *buf, unsigned int buflen);
+void tapdev_ifup(in_addr_t ifaddr);
+void tapdev_ifdown(void);
-#define netdev_init() tapdev_init()
-#define netdev_read(buf,buflen) tapdev_read(buf,buflen)
-#define netdev_send(buf,buflen) tapdev_send(buf,buflen)
+# define netdev_init() tapdev_init()
+# define netdev_read(buf,buflen) tapdev_read(buf,buflen)
+# define netdev_send(buf,buflen) tapdev_send(buf,buflen)
+# define netdev_ifup(ifaddr) tapdev_ifup(ifaddr)
+# define netdev_ifdown() tapdev_ifdown()
#endif
/* up_wpcap.c *************************************************************/
@@ -321,9 +326,11 @@ void wpcap_init(void);
unsigned int wpcap_read(unsigned char *buf, unsigned int buflen);
void wpcap_send(unsigned char *buf, unsigned int buflen);
-#define netdev_init() wpcap_init()
-#define netdev_read(buf,buflen) wpcap_read(buf,buflen)
-#define netdev_send(buf,buflen) wpcap_send(buf,buflen)
+# define netdev_init() wpcap_init()
+# define netdev_read(buf,buflen) wpcap_read(buf,buflen)
+# define netdev_send(buf,buflen) wpcap_send(buf,buflen)
+# define netdev_ifup(ifaddr) {}
+# define netdev_ifdown() {}
#endif
/* up_netdriver.c *********************************************************/
diff --git a/arch/sim/src/up_netdriver.c b/arch/sim/src/up_netdriver.c
index 346159157f3..c785f497460 100644
--- a/arch/sim/src/up_netdriver.c
+++ b/arch/sim/src/up_netdriver.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/sim/src/up_netdriver.c
*
- * Copyright (C) 2007, 2009-2012, 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007, 2009-2012, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Based on code from uIP which also has a BSD-like license:
@@ -186,21 +186,32 @@ void netdriver_loop(void)
*/
eth = BUF;
- if (g_sim_dev.d_len > ETH_HDRLEN &&
- up_comparemac(eth->dest, &g_sim_dev.d_mac) == 0)
+ if (g_sim_dev.d_len > ETH_HDRLEN)
{
+ int is_ours;
+
+ /* Figure out if this ethernet frame is addressed to us. This affects
+ * what we're willing to receive. Note that in promiscuous mode, the
+ * up_comparemac will always return 0.
+ */
+
+ is_ours = (up_comparemac(eth->dest, &g_sim_dev.d_mac) == 0);
+
#ifdef CONFIG_NET_PKT
/* When packet sockets are enabled, feed the frame into the packet
* tap.
*/
- pkt_input(&g_sim_dev);
+ if (is_ours)
+ {
+ pkt_input(&g_sim_dev);
+ }
#endif
/* We only accept IP packets of the configured type and ARP packets */
#ifdef CONFIG_NET_IPv4
- if (eth->type == HTONS(ETHTYPE_IP))
+ if (eth->type == HTONS(ETHTYPE_IP) && is_ours)
{
nllvdbg("IPv4 frame\n");
@@ -241,7 +252,7 @@ void netdriver_loop(void)
else
#endif
#ifdef CONFIG_NET_IPv6
- if (eth->type == HTONS(ETHTYPE_IP6))
+ if (eth->type == HTONS(ETHTYPE_IP6) && is_ours)
{
nllvdbg("Iv6 frame\n");
@@ -304,9 +315,22 @@ void netdriver_loop(void)
timer_reset(&g_periodic_timer);
devif_timer(&g_sim_dev, sim_txpoll);
}
+
sched_unlock();
}
+int netdriver_ifup(struct net_driver_s *dev)
+{
+ netdev_ifup(dev->d_ipaddr);
+ return OK;
+}
+
+int netdriver_ifdown(struct net_driver_s *dev)
+{
+ netdev_ifdown();
+ return OK;
+}
+
int netdriver_init(void)
{
/* Internal initalization */
@@ -314,6 +338,11 @@ int netdriver_init(void)
timer_set(&g_periodic_timer, 500);
netdev_init();
+ /* Set callbacks */
+
+ g_sim_dev.d_ifup = netdriver_ifup;
+ g_sim_dev.d_ifdown = netdriver_ifdown;
+
/* Register the device with the OS so that socket IOCTLs can be performed */
(void)netdev_register(&g_sim_dev, NET_LL_ETHERNET);
diff --git a/arch/sim/src/up_tapdev.c b/arch/sim/src/up_tapdev.c
index 4fc1394e377..ce18dee054c 100644
--- a/arch/sim/src/up_tapdev.c
+++ b/arch/sim/src/up_tapdev.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/sim/src/up_tapdev.c
*
- * Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007-2009, 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Based on code from uIP which also has a BSD-like license:
@@ -56,30 +56,25 @@
#include
#include
#include
+#include
-#include
+#ifdef CONFIG_SIM_NET_HOST_ROUTE
+# include
+#endif
+
+#include
+#include
#include
#include
+#include
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
-#define TAPDEV_DEBUG 1
+//#define TAPDEV_DEBUG 1
-#define DEVTAP "/dev/net/tun"
-
-#ifndef CONFIG_EXAMPLES_WEBSERVER_DHCPC
-# define TAP_IPADDR0 192
-# define TAP_IPADDR1 168
-# define TAP_IPADDR2 0
-# define TAP_IPADDR3 128
-#else
-# define TAP_IPADDR0 0
-# define TAP_IPADDR1 0
-# define TAP_IPADDR2 0
-# define TAP_IPADDR3 0
-#endif
+#define DEVTAP "/dev/net/tun"
/* Syslog priority (must match definitions in nuttx/include/syslog.h) */
@@ -101,10 +96,6 @@ struct sel_arg_struct
struct timeval *tvp;
};
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
/****************************************************************************
* NuttX Domain Public Function Prototypes
****************************************************************************/
@@ -117,9 +108,14 @@ int netdriver_setmacaddr(unsigned char *macaddr);
****************************************************************************/
#ifdef TAPDEV_DEBUG
-static int gdrop = 0;
+static int gdrop = 0;
+#endif
+static int gtapdevfd;
+static char gdevname[IFNAMSIZ];
+
+#ifdef CONFIG_SIM_NET_HOST_ROUTE
+static struct rtentry ghostroute;
#endif
-static int gtapdevfd;
/****************************************************************************
* Private Functions
@@ -145,32 +141,32 @@ static inline void dump_ethhdr(const char *msg, unsigned char *buf, int buflen)
static int up_setmacaddr(void)
{
- int sockfd;
+ unsigned char mac[7];
int ret = -1;
- /* Get a socket (only so that we get access to the INET subsystem) */
+ /* Assign a random locally-created MAC address.
+ *
+ * This previously took the address from the TAP interface; that was
+ * incorrect, as that hardware address belongs to the host system. Packets
+ * destined for the application aren't guaranteed to reach it if you do
+ * that, as the host may handle them at its discretion.
+ *
+ * With a unique MAC address, we get ALL the packets.
+ *
+ * TODO: The generated MAC address should be checked to see if it
+ * conflicts with something else on the network.
+ */
- sockfd = socket(PF_INET, SOCK_DGRAM, 0);
- if (sockfd >= 0)
- {
- struct ifreq req;
- memset(&req, 0, sizeof(struct ifreq));
-
- /* Put the driver name into the request */
-
- strncpy(req.ifr_name, "tap0", IFNAMSIZ);
-
- /* Perform the ioctl to get the MAC address */
-
- ret = ioctl(sockfd, SIOCGIFHWADDR, (unsigned long)&req);
- if (!ret)
- {
- /* Set the MAC address */
-
- ret = netdriver_setmacaddr((unsigned char *)&req.ifr_hwaddr.sa_data);
- }
- }
+ srand(time(NULL));
+ mac[0] = 0x42;
+ mac[1] = rand() % 256;
+ mac[2] = rand() % 256;
+ mac[3] = rand() % 256;
+ mac[4] = rand() % 256;
+ mac[5] = rand() % 256;
+ mac[6] = 0;
+ ret = netdriver_setmacaddr(mac);
return ret;
}
@@ -181,9 +177,12 @@ static int up_setmacaddr(void)
void tapdev_init(void)
{
struct ifreq ifr;
- char buf[1024];
int ret;
+#ifdef CONFIG_SIM_NET_BRIDGE
+ int sockfd;
+#endif
+
/* Open the tap device */
gtapdevfd = open(DEVTAP, O_RDWR, 0644);
@@ -204,11 +203,37 @@ void tapdev_init(void)
return;
}
- /* Assign an IPv4 address to the tap device */
+ /* Save the tap device name */
- snprintf(buf, sizeof(buf), "/sbin/ifconfig tap0 inet %d.%d.%d.%d\n",
- TAP_IPADDR0, TAP_IPADDR1, TAP_IPADDR2, TAP_IPADDR3);
- system(buf);
+ strncpy(gdevname, ifr.ifr_name, IFNAMSIZ);
+
+#ifdef CONFIG_SIM_NET_BRIDGE
+ /* Get a socket with which to manipulate the tap device; the remaining
+ * ioctl calls unfortunately won't work on the tap device fd.
+ */
+
+ sockfd = socket(AF_INET, SOCK_DGRAM, 0);
+ if (sockfd < 0)
+ {
+ syslog(LOG_ERR, "TAPDEV: Can't open socket: %d\n", -sockfd);
+ return;
+ }
+
+ /* Assign the tap device to a bridge */
+
+ memset(&ifr, 0, sizeof(ifr));
+ strncpy(ifr.ifr_name, CONFIG_SIM_NET_BRIDGE_DEVICE, IFNAMSIZ);
+ ifr.ifr_ifindex = if_nametoindex(gdevname);
+
+ ret = ioctl(sockfd, SIOCBRADDIF, &ifr);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "TAPDEV: ioctl failed (can't add interface %s to bridge %s): %d\n",
+ gdevname, CONFIG_SIM_NET_BRIDGE_DEVICE, -ret);
+ }
+
+ close(sockfd);
+#endif
/* Set the MAC address */
@@ -273,9 +298,101 @@ void tapdev_send(unsigned char *buf, unsigned int buflen)
syslog(LOG_ERR, "TAPDEV: write failed: %d", -ret);
exit(1);
}
+
dump_ethhdr("write", buf, buflen);
}
+void tapdev_ifup(in_addr_t ifaddr)
+{
+ struct ifreq ifr;
+ int sockfd;
+ int ret;
+
+#ifdef CONFIG_SIM_NET_HOST_ROUTE
+ struct sockaddr_in *addr;
+#endif
+
+ /* Get a socket with which to manipulate the tap device */
+
+ sockfd = socket(AF_INET, SOCK_DGRAM, 0);
+ if (sockfd < 0)
+ {
+ syslog(LOG_ERR, "TAPDEV: Can't open socket: %d\n", -sockfd);
+ return;
+ }
+
+ /* Bring the TAP interface up */
+
+ strncpy(ifr.ifr_name, gdevname, IFNAMSIZ);
+
+ ret = ioctl(sockfd, SIOCGIFFLAGS, (unsigned long)&ifr);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "TAPDEV: ioctl failed (can't get interface flags): %d\n", -ret);
+ close(sockfd);
+ return;
+ }
+
+ ifr.ifr_flags |= IFF_UP;
+ ret = ioctl(sockfd, SIOCSIFFLAGS, (unsigned long)&ifr);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "TAPDEV: ioctl failed (can't set interface flags): %d\n", -ret);
+ close(sockfd);
+ return;
+ }
+
+#ifdef CONFIG_SIM_NET_HOST_ROUTE
+ /* Add host route */
+
+ memset(&ghostroute, 0, sizeof(ghostroute));
+
+ addr = (struct sockaddr_in *)&ghostroute.rt_dst;
+ addr->sin_family = AF_INET;
+ addr->sin_addr.s_addr = ifaddr;
+
+ ghostroute.rt_dev = gdevname;
+ ghostroute.rt_flags = RTF_UP | RTF_HOST;
+ ghostroute.rt_metric = 0;
+
+ ret = ioctl(sockfd, SIOCADDRT, (unsigned long)&ghostroute);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "TAPDEV: ioctl failed (can't add host route): %d\n", -ret);
+ close(sockfd);
+ return;
+ }
+#endif
+
+ close(sockfd);
+}
+
+void tapdev_ifdown(void)
+{
+#ifdef CONFIG_SIM_NET_HOST_ROUTE
+ int sockfd;
+ int ret;
+
+ if (((struct sockaddr_in *)&ghostroute.rt_dst)->sin_addr.s_addr != 0)
+ {
+ /* Get a socket with which to manipulate the tap device */
+
+ sockfd = socket(AF_INET, SOCK_DGRAM, 0);
+ if (sockfd < 0)
+ {
+ syslog(LOG_ERR, "TAPDEV: Can't open socket: %d\n", -sockfd);
+ return;
+ }
+
+ ret = ioctl(sockfd, SIOCDELRT, (unsigned long)&ghostroute);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "TAPDEV: ioctl failed (can't delete host route): %d\n", -ret);
+ }
+
+ close(sockfd);
+ }
+#endif
+}
+
#endif /* !__CYGWIN__ */
-
-
diff --git a/arch/x86/src/Makefile b/arch/x86/src/Makefile
index f38bcee148d..16fbc8206c1 100644
--- a/arch/x86/src/Makefile
+++ b/arch/x86/src/Makefile
@@ -1,7 +1,7 @@
############################################################################
# arch/x86/src/Makefile
#
-# Copyright (C) 2011-2012, 2014 Gregory Nutt. All rights reserved.
+# Copyright (C) 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt
#
# Redistribution and use in source and binary forms, with or without
@@ -80,6 +80,11 @@ COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
+# Override in Make.defs if linker is not 'ld'
+
+LDSTARTGROUP ?= --start-group
+LDENDGROUP ?= --end-group
+
LDFLAGS += $(ARCHSCRIPT)
EXTRA_LIBS ?=
LINKLIBS ?=
@@ -144,7 +149,7 @@ board/libboard$(LIBEXT):
nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
@echo "LD: nuttx$(EXEEXT)"
$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(HEAD_OBJ) $(EXTRA_OBJS) \
- --start-group $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) --end-group
+ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
$(Q) $(NM) $(NUTTX)$(EXEEXT) | \
grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
diff --git a/arch/z16/src/z16f/Kconfig b/arch/z16/src/z16f/Kconfig
index 229a1aa72f1..8861726aee3 100644
--- a/arch/z16/src/z16f/Kconfig
+++ b/arch/z16/src/z16f/Kconfig
@@ -18,12 +18,12 @@ config Z16F_ESPI
config Z16F_UART0
bool "UART0"
default y
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
config Z16F_UART1
bool "UART1"
default y
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
endmenu # Z16F Peripheral Selection
diff --git a/arch/z80/src/ez80/Kconfig b/arch/z80/src/ez80/Kconfig
index df8cc5a1978..7529e2c7adc 100644
--- a/arch/z80/src/ez80/Kconfig
+++ b/arch/z80/src/ez80/Kconfig
@@ -9,17 +9,17 @@ menu "ez80 Peripheral Support"
config EZ80_UART0
bool "UART0"
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
default n
config EZ80_UART1
bool "UART1"
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
default n
config EZ80_UART2
bool "UART2"
- select ARCH_HAVE_UART2
+ select UART2_SERIALDRIVER
default n
config EZ80_EMAC
diff --git a/arch/z80/src/z8/Kconfig b/arch/z80/src/z8/Kconfig
index d7e51403104..3c77bb14264 100644
--- a/arch/z80/src/z8/Kconfig
+++ b/arch/z80/src/z8/Kconfig
@@ -10,12 +10,12 @@ if ARCH_CHIP_Z8
config Z8_UART0
bool
default y
- select ARCH_HAVE_UART0
+ select UART0_SERIALDRIVER
config Z8_UART1
bool
default y
- select ARCH_HAVE_UART1
+ select UART1_SERIALDRIVER
# The ZiLOG ZDS-II Windows toolchain is the only toolchain available for
# the ez80.
diff --git a/configs/Kconfig b/configs/Kconfig
index c2d650557c3..c8169d0086f 100644
--- a/configs/Kconfig
+++ b/configs/Kconfig
@@ -906,6 +906,13 @@ config ARCH_BOARD_STM32_TINY
STM32F103C8T6 micro-controller chip, and is (always ?) bundled with
an nRF24L01+ wireless module.
+config ARCH_BOARD_STM32F103_MINIMUM
+ bool "STM32F103C8T6 Minimum ARM Development Board"
+ depends on ARCH_CHIP_STM32F103C8
+ select ARCH_HAVE_LEDS
+ ---help---
+ A configuration for the STM32F103 Minimum board.
+
config ARCH_BOARD_STM3210E_EVAL
bool "STMicro STM3210E-EVAL development board"
depends on ARCH_CHIP_STM32F103ZE
@@ -956,6 +963,16 @@ config ARCH_BOARD_STM32F4_DISCOVERY
---help---
STMicro STM32F4-Discovery board based on the STMicro STM32F407VGT6 MCU.
+config ARCH_BOARD_STM32F411E_DISCO
+ bool "STMicro STM32F411E-Discovery board"
+ depends on ARCH_CHIP_STM32F411VE
+ select ARCH_HAVE_LEDS
+ select ARCH_HAVE_BUTTONS
+ select ARCH_HAVE_IRQBUTTONS
+ ---help---
+ This is a minimal configuration that supports low-level test of the
+ STMicro STM32F411E-Discovery Board.
+
config ARCH_BOARD_STM32F429I_DISCO
bool "STMicro STM32F429I-Discovery board"
depends on ARCH_CHIP_STM32F429Z
@@ -1146,7 +1163,7 @@ config ARCH_BOARD_VIEWTOOL_STM32F107
config ARCH_BOARD_XTRS
bool "XTRS TRS80 Model 3 emulation"
depends on ARCH_CHIP_Z80
- select ARCH_HAVE_UART
+ select UART_SERIALDRIVER
---help---
TRS80 Model 3. This port uses a vintage computer based on the Z80.
An emulator for this computer is available to run TRS80 programs on a
@@ -1164,7 +1181,7 @@ config ARCH_BOARD_Z16F2800100ZCOG
config ARCH_BOARD_Z80SIM
bool "Z80 Instruction Set Simulator"
depends on ARCH_CHIP_Z80
- select ARCH_HAVE_UART
+ select UART_SERIALDRIVER
---help---
z80 Microcontroller. This port uses a Z80 instruction set simulator
called z80sim. This port also uses the SDCC toolchain
@@ -1399,11 +1416,13 @@ config ARCH_BOARD
default "skp16c26" if ARCH_BOARD_SKP16C26
default "spark" if ARCH_BOARD_SPARK
default "stm32_tiny" if ARCH_BOARD_STM32_TINY
+ default "stm32f103-minimum" if ARCH_BOARD_STM32F103_MINIMUM
default "stm3210e-eval" if ARCH_BOARD_STM3210E_EVAL
default "stm3220g-eval" if ARCH_BOARD_STM3220G_EVAL
default "stm3240g-eval" if ARCH_BOARD_STM3240G_EVAL
default "stm32f3discovery" if ARCH_BOARD_STM32F3_DISCOVERY
default "stm32f4discovery" if ARCH_BOARD_STM32F4_DISCOVERY
+ default "stm32f411e-disco" if ARCH_BOARD_STM32F411E_DISCO
default "stm32f429i-disco" if ARCH_BOARD_STM32F429I_DISCO
default "stm32f746g-disco" if ARCH_BOARD_STM32F746G_DISCO
default "stm32l476vg-disco" if ARCH_BOARD_STM32L476VG_DISCO
@@ -1756,6 +1775,9 @@ endif
if ARCH_BOARD_STM32_TINY
source "configs/stm32_tiny/Kconfig"
endif
+if ARCH_BOARD_STM32F103_MINIMUM
+source "configs/stm32f103-minimum/Kconfig"
+endif
if ARCH_BOARD_STM3210E_EVAL
source "configs/stm3210e-eval/Kconfig"
endif
@@ -1768,6 +1790,9 @@ endif
if ARCH_BOARD_STM32F4_DISCOVERY
source "configs/stm32f4discovery/Kconfig"
endif
+if ARCH_BOARD_STM32F411E_DISCO
+source "configs/stm32f411e-disco/Kconfig"
+endif
if ARCH_BOARD_STM32F429I_DISCO
source "configs/stm32f429i-disco/Kconfig"
endif
diff --git a/configs/README.txt b/configs/README.txt
index 4b1b2017070..9b1c8486bac 100644
--- a/configs/README.txt
+++ b/configs/README.txt
@@ -637,9 +637,16 @@ configs/stm3240g-eval
microcontroller (ARM Cortex-M4 with FPU). This port uses a GNU Cortex-M4
toolchain (such as CodeSourcery).
+configs/stm32f103-minimum
+ Generic STM32F103C8T6 Minimum ARM Development Board.
+
configs/stm32f4discovery
STMicro STM32F4-Discovery board based on the STMIcro STM32F407VGT6 MCU.
+configs/stm32f411e-disco
+ This is a minimal configuration that supports low-level test of the
+ STMicro STM32F411E-Discovery Board.
+
configs/stm32f429i-disco
STMicro STM32F429I-Discovery board based on the STMicro STM32F429ZIT6 MCU.
diff --git a/configs/amber/hello/defconfig b/configs/amber/hello/defconfig
index 57a095a0e10..5c62c54f886 100644
--- a/configs/amber/hello/defconfig
+++ b/configs/amber/hello/defconfig
@@ -238,12 +238,11 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_USART0=y
+CONFIG_USART0_SERIALDRIVER=y
#
# USART Configuration
#
-CONFIG_USART0_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_USART0_SERIAL_CONSOLE=y
# CONFIG_NO_SERIAL_CONSOLE is not set
diff --git a/configs/arduino-due/README.txt b/configs/arduino-due/README.txt
index 290c095ef3a..e128fb71d68 100644
--- a/configs/arduino-due/README.txt
+++ b/configs/arduino-due/README.txt
@@ -822,10 +822,10 @@ Arduino DUE-specific Configuration Options
CONFIG_SAM34_GPIOD_IRQ
CONFIG_SAM34_GPIOE_IRQ
CONFIG_SAM34_GPIOF_IRQ
- CONFIG_USART0_ISUART
- CONFIG_USART1_ISUART
- CONFIG_USART2_ISUART
- CONFIG_USART3_ISUART
+ CONFIG_USART0_SERIALDRIVER
+ CONFIG_USART1_SERIALDRIVER
+ CONFIG_USART2_SERIALDRIVER
+ CONFIG_USART3_SERIALDRIVER
ST91SAM4S specific device driver settings
@@ -885,7 +885,7 @@ Configurations
Board Selection -> Peripheral
CONFIG_SAM34_UART0=n : Disable UART0. Can't use with this shield
CONFIG_SAM34_USART0=y : Enable USART0
- CONFIG_USART0_ISUART=y
+ CONFIG_USART0_SERIALDRIVER=y
Device Drivers -> Serial
CONFIG_USART0_SERIAL_CONSOLE=y : Configure the console on USART0
@@ -966,7 +966,7 @@ Configuration sub-directories
Board Selection -> Peripheral
CONFIG_SAM34_UART0=n : Disable UART0. Can't use with this shield
CONFIG_SAM34_USART0=y : Enable USART0
- CONFIG_USART0_ISUART=y
+ CONFIG_USART0_SERIALDRIVER=y
Device Drivers -> Serial
CONFIG_USART0_SERIAL_CONSOLE=y : Configure the console on USART0
diff --git a/configs/arduino-due/nsh/defconfig b/configs/arduino-due/nsh/defconfig
index 7fdcc2c51cc..51cf6e0923d 100644
--- a/configs/arduino-due/nsh/defconfig
+++ b/configs/arduino-due/nsh/defconfig
@@ -493,28 +493,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/arduino-due/src/sam_appinit.c b/configs/arduino-due/src/sam_appinit.c
index ef52d100ccf..32132ee3302 100644
--- a/configs/arduino-due/src/sam_appinit.c
+++ b/configs/arduino-due/src/sam_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/arduino-due/src/sam_appinit.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -76,11 +76,28 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#if defined(CONFIG_ARDUINO_ITHEAD_TFT) && defined(CONFIG_SPI_BITBANG) && \
defined(CONFIG_MMCSD_SPI)
diff --git a/configs/arduino-mega2560/hello/defconfig b/configs/arduino-mega2560/hello/defconfig
index ffa94ad0e93..4459053ee1b 100644
--- a/configs/arduino-mega2560/hello/defconfig
+++ b/configs/arduino-mega2560/hello/defconfig
@@ -301,33 +301,32 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-CONFIG_ARCH_HAVE_USART0=y
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+CONFIG_USART0_SERIALDRIVER=y
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
#
-CONFIG_USART0_ISUART=y
CONFIG_MCU_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
# CONFIG_SERIAL_OFLOWCONTROL is not set
diff --git a/configs/arduino-mega2560/nsh/defconfig b/configs/arduino-mega2560/nsh/defconfig
index d22cb731617..9aee289d6d7 100644
--- a/configs/arduino-mega2560/nsh/defconfig
+++ b/configs/arduino-mega2560/nsh/defconfig
@@ -309,33 +309,32 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-CONFIG_ARCH_HAVE_USART0=y
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+CONFIG_USART0_SERIALDRIVER=y
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
#
-CONFIG_USART0_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
diff --git a/configs/avr32dev1/nsh/defconfig b/configs/avr32dev1/nsh/defconfig
index dadecbc7139..0f87f200461 100644
--- a/configs/avr32dev1/nsh/defconfig
+++ b/configs/avr32dev1/nsh/defconfig
@@ -276,12 +276,11 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_USART1=y
+CONFIG_USART1_SERIALDRIVER=y
#
# USART Configuration
#
-CONFIG_USART1_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_USART1_SERIAL_CONSOLE=y
diff --git a/configs/avr32dev1/ostest/defconfig b/configs/avr32dev1/ostest/defconfig
index 83d72fda29d..6fc2eed59f4 100644
--- a/configs/avr32dev1/ostest/defconfig
+++ b/configs/avr32dev1/ostest/defconfig
@@ -275,12 +275,11 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_USART1=y
+CONFIG_USART1_SERIALDRIVER=y
#
# USART Configuration
#
-CONFIG_USART1_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_USART1_SERIAL_CONSOLE=y
# CONFIG_NO_SERIAL_CONSOLE is not set
diff --git a/configs/boardctl.c b/configs/boardctl.c
index 82c52890656..749056d82a5 100644
--- a/configs/boardctl.c
+++ b/configs/boardctl.c
@@ -250,14 +250,24 @@ int boardctl(unsigned int cmd, uintptr_t arg)
{
/* CMD: BOARDIOC_INIT
* DESCRIPTION: Perform one-time application initialization.
- * ARG: None
+ * ARG: The boardctl() argument is passed to the
+ * board_app_initialize() implementation without modification.
+ * The argument has no meaning to NuttX; the meaning of the
+ * argument is a contract between the board-specific
+ * initalization logic and the the matching application logic.
+ * The value cold be such things as a mode enumeration value,
+ * a set of DIP switch switch settings, a pointer to
+ * configuration data read from a file or serial FLASH, or
+ * whatever you would like to do with it. Every
+ * implementation should accept zero/NULL as a default
+ * configuration.
* CONFIGURATION: CONFIG_LIB_BOARDCTL
* DEPENDENCIES: Board logic must provide board_app_initialization
*/
case BOARDIOC_INIT:
{
- ret = board_app_initialize();
+ ret = board_app_initialize(arg);
}
break;
diff --git a/configs/c5471evm/httpd/defconfig b/configs/c5471evm/httpd/defconfig
index c3635191e01..895892b2462 100644
--- a/configs/c5471evm/httpd/defconfig
+++ b/configs/c5471evm/httpd/defconfig
@@ -348,28 +348,28 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/c5471evm/nettest/defconfig b/configs/c5471evm/nettest/defconfig
index 99517514155..006c9b09b0e 100644
--- a/configs/c5471evm/nettest/defconfig
+++ b/configs/c5471evm/nettest/defconfig
@@ -358,28 +358,28 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/c5471evm/nsh/defconfig b/configs/c5471evm/nsh/defconfig
index e36be6f8ff7..fe48c98b95b 100644
--- a/configs/c5471evm/nsh/defconfig
+++ b/configs/c5471evm/nsh/defconfig
@@ -367,28 +367,28 @@ CONFIG_NETDEV_TELNET=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/cc3200-launchpad/nsh/defconfig b/configs/cc3200-launchpad/nsh/defconfig
index 0ab668e23dc..68c1a21f1c5 100644
--- a/configs/cc3200-launchpad/nsh/defconfig
+++ b/configs/cc3200-launchpad/nsh/defconfig
@@ -354,27 +354,27 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/cc3200-launchpad/src/cc3200_boot.c b/configs/cc3200-launchpad/src/cc3200_boot.c
index 9d466b2d75c..cf644905e0f 100644
--- a/configs/cc3200-launchpad/src/cc3200_boot.c
+++ b/configs/cc3200-launchpad/src/cc3200_boot.c
@@ -67,6 +67,7 @@
/****************************************************************************
* Public Functions
****************************************************************************/
+
/****************************************************************************
* Name: board_app_initialize
*
@@ -80,9 +81,24 @@
* CONFIG_LIB_BOARDCTL=n :
* Called from board_initialize().
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return OK;
}
diff --git a/configs/cloudctrl/nsh/defconfig b/configs/cloudctrl/nsh/defconfig
index ed97bcc4b9d..ece509d9cf6 100644
--- a/configs/cloudctrl/nsh/defconfig
+++ b/configs/cloudctrl/nsh/defconfig
@@ -80,6 +80,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +99,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -246,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -417,13 +423,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -787,33 +797,28 @@ CONFIG_ETH0_PHY_DM9161=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
@@ -1076,6 +1081,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
CONFIG_LIBC_NETDB=y
# CONFIG_NETDB_HOSTFILE is not set
CONFIG_NETDB_DNSCLIENT=y
@@ -1216,6 +1223,7 @@ CONFIG_EXAMPLES_NSH=y
# CONFIG_NETUTILS_CHAT is not set
# CONFIG_NETUTILS_CODECS is not set
# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_FTPD is not set
# CONFIG_NETUTILS_JSON is not set
diff --git a/configs/cloudctrl/src/Makefile b/configs/cloudctrl/src/Makefile
index f18f63eba3f..f0ee184e64c 100644
--- a/configs/cloudctrl/src/Makefile
+++ b/configs/cloudctrl/src/Makefile
@@ -73,10 +73,6 @@ ifeq ($(CONFIG_ADC),y)
CSRCS += stm32_adc.c
endif
-ifeq ($(CONFIG_WATCHDOG),y)
-CSRCS += stm32_watchdog.c
-endif
-
ifeq ($(CONFIG_STM32_PHYINIT),y)
CSRCS += stm32_phyinit.c
endif
diff --git a/configs/cloudctrl/src/stm32_appinit.c b/configs/cloudctrl/src/stm32_appinit.c
index 6bd5e5a203b..cc772b5add3 100644
--- a/configs/cloudctrl/src/stm32_appinit.c
+++ b/configs/cloudctrl/src/stm32_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/cloudctrl/src/stm32_appinit.c
*
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
* Darcy Gong
*
@@ -108,9 +108,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#if defined(HAVE_USBHOST) || defined(HAVE_W25)
int ret;
diff --git a/configs/compal_e86/nsh_highram/defconfig b/configs/compal_e86/nsh_highram/defconfig
index c5dcaa04d3f..e521e8e7daf 100644
--- a/configs/compal_e86/nsh_highram/defconfig
+++ b/configs/compal_e86/nsh_highram/defconfig
@@ -368,28 +368,28 @@ CONFIG_SPI_EXCHANGE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/compal_e86/src/boot.c b/configs/compal_e86/src/boot.c
index 32364c631e4..8c214a004c3 100644
--- a/configs/compal_e86/src/boot.c
+++ b/configs/compal_e86/src/boot.c
@@ -1,7 +1,7 @@
/****************************************************************************
* configs/compal_e86/boot.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -44,10 +44,31 @@
* Public Functions
****************************************************************************/
-/* Application initialization stub for boardctl() */
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ * Perform architecture specific initialization
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
#ifdef CONFIG_LIB_BOARDCTL
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return 0;
}
diff --git a/configs/compal_e88/nsh_highram/defconfig b/configs/compal_e88/nsh_highram/defconfig
index 8db78614871..85ad3ce661b 100644
--- a/configs/compal_e88/nsh_highram/defconfig
+++ b/configs/compal_e88/nsh_highram/defconfig
@@ -368,28 +368,28 @@ CONFIG_SPI_EXCHANGE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/compal_e88/src/boot.c b/configs/compal_e88/src/boot.c
index 540bc39ca16..a3c68292275 100644
--- a/configs/compal_e88/src/boot.c
+++ b/configs/compal_e88/src/boot.c
@@ -44,10 +44,31 @@
* Public Functions
****************************************************************************/
-/* Application initialization stub for boardctl() */
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ * Perform architecture specific initialization
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
#ifdef CONFIG_LIB_BOARDCTL
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return 0;
}
diff --git a/configs/compal_e99/nsh_compalram/defconfig b/configs/compal_e99/nsh_compalram/defconfig
index 3ad08465712..e3107fc8470 100644
--- a/configs/compal_e99/nsh_compalram/defconfig
+++ b/configs/compal_e99/nsh_compalram/defconfig
@@ -405,28 +405,28 @@ CONFIG_LCD_LANDSCAPE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/compal_e99/nsh_highram/defconfig b/configs/compal_e99/nsh_highram/defconfig
index cb3fa5526b7..a7cbecbe981 100644
--- a/configs/compal_e99/nsh_highram/defconfig
+++ b/configs/compal_e99/nsh_highram/defconfig
@@ -404,28 +404,28 @@ CONFIG_LCD_LANDSCAPE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/compal_e99/src/boot.c b/configs/compal_e99/src/boot.c
index 74f17a2ebdb..8bc7061daf3 100644
--- a/configs/compal_e99/src/boot.c
+++ b/configs/compal_e99/src/boot.c
@@ -1,7 +1,7 @@
/****************************************************************************
* configs/compal_e99/boot.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -44,10 +44,31 @@
* Public Functions
****************************************************************************/
-/* Application initialization stub for boardctl() */
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ * Perform architecture specific initialization
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
#ifdef CONFIG_LIB_BOARDCTL
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return 0;
}
diff --git a/configs/demo9s12ne64/src/m9s12_appinit.c b/configs/demo9s12ne64/src/m9s12_appinit.c
index ec3d9ba21cf..0010a71e689 100644
--- a/configs/demo9s12ne64/src/m9s12_appinit.c
+++ b/configs/demo9s12ne64/src/m9s12_appinit.c
@@ -61,9 +61,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
/* Configure SPI-based devices */
diff --git a/configs/dk-tm4c129x/ipv6/defconfig b/configs/dk-tm4c129x/ipv6/defconfig
index fdd2e40140a..de1c4d8fbd5 100644
--- a/configs/dk-tm4c129x/ipv6/defconfig
+++ b/configs/dk-tm4c129x/ipv6/defconfig
@@ -490,28 +490,28 @@ CONFIG_LM75=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/dk-tm4c129x/nsh/defconfig b/configs/dk-tm4c129x/nsh/defconfig
index 158188fc44b..0b9e6a5f03f 100644
--- a/configs/dk-tm4c129x/nsh/defconfig
+++ b/configs/dk-tm4c129x/nsh/defconfig
@@ -545,28 +545,28 @@ CONFIG_LM75=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/dk-tm4c129x/src/dk-tm4c129x.h b/configs/dk-tm4c129x/src/dk-tm4c129x.h
index 5f0b89a7079..2c78317ba9d 100644
--- a/configs/dk-tm4c129x/src/dk-tm4c129x.h
+++ b/configs/dk-tm4c129x/src/dk-tm4c129x.h
@@ -177,7 +177,7 @@ void tm4c_led_initialize(void);
int tm4c_bringup(void);
/****************************************************************************
- * Name: tiva_timer_initialize
+ * Name: tiva_timer_configure
*
* Description:
* Configure the timer driver
@@ -185,7 +185,7 @@ int tm4c_bringup(void);
****************************************************************************/
#ifdef CONFIG_DK_TM4C129X_TIMER
-int tiva_timer_initialize(void);
+int tiva_timer_configure(void);
#endif
#endif /* __ASSEMBLY__ */
diff --git a/configs/dk-tm4c129x/src/tm4c_appinit.c b/configs/dk-tm4c129x/src/tm4c_appinit.c
index bd6c1b4b6b9..20d889d47e9 100644
--- a/configs/dk-tm4c129x/src/tm4c_appinit.c
+++ b/configs/dk-tm4c129x/src/tm4c_appinit.c
@@ -53,9 +53,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
/* If CONFIG_BOARD_INITIALIZE is selected then board initialization was
* already performed in board_initialize.
diff --git a/configs/dk-tm4c129x/src/tm4c_bringup.c b/configs/dk-tm4c129x/src/tm4c_bringup.c
index 16ebb76ed9e..72fcac02928 100644
--- a/configs/dk-tm4c129x/src/tm4c_bringup.c
+++ b/configs/dk-tm4c129x/src/tm4c_bringup.c
@@ -181,7 +181,7 @@ int tm4c_bringup(void)
#ifdef HAVE_TIMER
/* Initialize the timer driver */
- ret = tiva_timer_initialize();
+ ret = tiva_timer_configure();
if (ret < 0)
{
dbg("ERROR: Failed to initialize timer driver: %d\n", ret);
diff --git a/configs/dk-tm4c129x/src/tm4c_timer.c b/configs/dk-tm4c129x/src/tm4c_timer.c
index e5b82d71417..e6cfe3e13cb 100644
--- a/configs/dk-tm4c129x/src/tm4c_timer.c
+++ b/configs/dk-tm4c129x/src/tm4c_timer.c
@@ -91,14 +91,14 @@
****************************************************************************/
/****************************************************************************
- * Name: tiva_timer_initialize
+ * Name: tiva_timer_configure
*
* Description:
* Configure the timer driver
*
****************************************************************************/
-int tiva_timer_initialize(void)
+int tiva_timer_configure(void)
{
int ret;
diff --git a/configs/ea3131/nsh/defconfig b/configs/ea3131/nsh/defconfig
index 1edd39ab7e2..847486498eb 100644
--- a/configs/ea3131/nsh/defconfig
+++ b/configs/ea3131/nsh/defconfig
@@ -358,27 +358,27 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_UART=y
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+CONFIG_UART_SERIALDRIVER=y
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ea3131/pgnsh/defconfig b/configs/ea3131/pgnsh/defconfig
index e245da9a3c6..68215a41b38 100644
--- a/configs/ea3131/pgnsh/defconfig
+++ b/configs/ea3131/pgnsh/defconfig
@@ -451,28 +451,28 @@ CONFIG_M25P_MEMORY_TYPE=0x20
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_UART=y
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+CONFIG_UART_SERIALDRIVER=y
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ea3131/src/lpc31_appinit.c b/configs/ea3131/src/lpc31_appinit.c
index 58e58709ca8..43ef50be72c 100644
--- a/configs/ea3131/src/lpc31_appinit.c
+++ b/configs/ea3131/src/lpc31_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/ea3131/src/lpc31_appinit.c
*
- * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009, 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -107,9 +107,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef NSH_HAVEMMCSD
FAR struct sdio_dev_s *sdio;
diff --git a/configs/ea3131/usbserial/defconfig b/configs/ea3131/usbserial/defconfig
index c7e919046a3..e7a88724c9d 100644
--- a/configs/ea3131/usbserial/defconfig
+++ b/configs/ea3131/usbserial/defconfig
@@ -431,28 +431,28 @@ CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_UART=y
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+CONFIG_UART_SERIALDRIVER=y
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ea3152/ostest/defconfig b/configs/ea3152/ostest/defconfig
index bf1647db111..598fabeb5ab 100644
--- a/configs/ea3152/ostest/defconfig
+++ b/configs/ea3152/ostest/defconfig
@@ -357,27 +357,27 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_UART=y
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+CONFIG_UART_SERIALDRIVER=y
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ea3152/src/lpc31_appinit.c b/configs/ea3152/src/lpc31_appinit.c
index e77cdb63ef3..e05327622c1 100644
--- a/configs/ea3152/src/lpc31_appinit.c
+++ b/configs/ea3152/src/lpc31_appinit.c
@@ -107,9 +107,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef NSH_HAVEMMCSD
FAR struct sdio_dev_s *sdio;
diff --git a/configs/eagle100/httpd/defconfig b/configs/eagle100/httpd/defconfig
index f894505a3a7..96e0b09524e 100644
--- a/configs/eagle100/httpd/defconfig
+++ b/configs/eagle100/httpd/defconfig
@@ -352,7 +352,7 @@ CONFIG_NETDEVICES=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
+CONFIG_UART0_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/eagle100/nettest/defconfig b/configs/eagle100/nettest/defconfig
index aaf5566121d..bd692c7ffa9 100644
--- a/configs/eagle100/nettest/defconfig
+++ b/configs/eagle100/nettest/defconfig
@@ -475,28 +475,28 @@ CONFIG_NETDEVICES=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/eagle100/nsh/defconfig b/configs/eagle100/nsh/defconfig
index 03426ceba06..b8227f844f6 100644
--- a/configs/eagle100/nsh/defconfig
+++ b/configs/eagle100/nsh/defconfig
@@ -518,28 +518,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/eagle100/nxflat/defconfig b/configs/eagle100/nxflat/defconfig
index ee72ff1b14d..67b18010a40 100644
--- a/configs/eagle100/nxflat/defconfig
+++ b/configs/eagle100/nxflat/defconfig
@@ -325,27 +325,27 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/eagle100/src/lm_appinit.c b/configs/eagle100/src/lm_appinit.c
index 6594f5abb1a..72b7206fad2 100644
--- a/configs/eagle100/src/lm_appinit.c
+++ b/configs/eagle100/src/lm_appinit.c
@@ -103,9 +103,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
FAR struct spi_dev_s *spi;
int ret;
diff --git a/configs/eagle100/thttpd/defconfig b/configs/eagle100/thttpd/defconfig
index 081cb7a9830..9bd0ee452b5 100644
--- a/configs/eagle100/thttpd/defconfig
+++ b/configs/eagle100/thttpd/defconfig
@@ -459,28 +459,28 @@ CONFIG_NETDEVICES=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/efm32-g8xx-stk/nsh/defconfig b/configs/efm32-g8xx-stk/nsh/defconfig
index 899fdd919c7..a3112c194cb 100644
--- a/configs/efm32-g8xx-stk/nsh/defconfig
+++ b/configs/efm32-g8xx-stk/nsh/defconfig
@@ -384,28 +384,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/efm32gg-stk3700/nsh/defconfig b/configs/efm32gg-stk3700/nsh/defconfig
index 0649d6b5e1a..d8d3ea37a76 100644
--- a/configs/efm32gg-stk3700/nsh/defconfig
+++ b/configs/efm32gg-stk3700/nsh/defconfig
@@ -411,28 +411,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/ekk-lm3s9b96/nsh/defconfig b/configs/ekk-lm3s9b96/nsh/defconfig
index 146fb4c3cce..3d89e90c42e 100644
--- a/configs/ekk-lm3s9b96/nsh/defconfig
+++ b/configs/ekk-lm3s9b96/nsh/defconfig
@@ -507,28 +507,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ekk-lm3s9b96/src/lm_appinit.c b/configs/ekk-lm3s9b96/src/lm_appinit.c
index 313bdc9783f..21be2c1952a 100644
--- a/configs/ekk-lm3s9b96/src/lm_appinit.c
+++ b/configs/ekk-lm3s9b96/src/lm_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/ekk-lm3s9b96/src/lm_appinit.c
*
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt
* Jose Pablo Rojas V.
*
@@ -60,9 +60,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return OK;
}
diff --git a/configs/ez80f910200kitg/ostest/defconfig b/configs/ez80f910200kitg/ostest/defconfig
index b85a58b23ce..106998a223d 100644
--- a/configs/ez80f910200kitg/ostest/defconfig
+++ b/configs/ez80f910200kitg/ostest/defconfig
@@ -381,28 +381,28 @@ CONFIG_MMCSD_HAVECARDDETECT=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ez80f910200zco/dhcpd/defconfig b/configs/ez80f910200zco/dhcpd/defconfig
index 7767fcc543a..615994d436c 100644
--- a/configs/ez80f910200zco/dhcpd/defconfig
+++ b/configs/ez80f910200zco/dhcpd/defconfig
@@ -427,28 +427,28 @@ CONFIG_ETH0_PHY_AM79C874=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ez80f910200zco/httpd/defconfig b/configs/ez80f910200zco/httpd/defconfig
index 084ec33edf6..fe55d601b77 100644
--- a/configs/ez80f910200zco/httpd/defconfig
+++ b/configs/ez80f910200zco/httpd/defconfig
@@ -436,28 +436,28 @@ CONFIG_ETH0_PHY_AM79C874=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ez80f910200zco/nettest/defconfig b/configs/ez80f910200zco/nettest/defconfig
index 8dd72d76fbc..66eb97ef721 100644
--- a/configs/ez80f910200zco/nettest/defconfig
+++ b/configs/ez80f910200zco/nettest/defconfig
@@ -428,28 +428,28 @@ CONFIG_ETH0_PHY_AM79C874=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ez80f910200zco/nsh/defconfig b/configs/ez80f910200zco/nsh/defconfig
index 714dccfa3f3..4ddd6319825 100644
--- a/configs/ez80f910200zco/nsh/defconfig
+++ b/configs/ez80f910200zco/nsh/defconfig
@@ -439,28 +439,28 @@ CONFIG_ETH0_PHY_AM79C874=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ez80f910200zco/poll/defconfig b/configs/ez80f910200zco/poll/defconfig
index 336e8aa08a7..b8effce8d09 100644
--- a/configs/ez80f910200zco/poll/defconfig
+++ b/configs/ez80f910200zco/poll/defconfig
@@ -435,28 +435,28 @@ CONFIG_ETH0_PHY_AM79C874=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/fire-stm32v2/nsh/defconfig b/configs/fire-stm32v2/nsh/defconfig
index bc729a38586..c45b204918d 100644
--- a/configs/fire-stm32v2/nsh/defconfig
+++ b/configs/fire-stm32v2/nsh/defconfig
@@ -80,6 +80,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +99,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -248,6 +253,7 @@ CONFIG_ARCH_CHIP_STM32F103VE=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -424,14 +430,20 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -793,34 +805,28 @@ CONFIG_ENC28J60_FREQUENCY=20000000
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -1131,6 +1137,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
CONFIG_LIBC_NETDB=y
# CONFIG_NETDB_HOSTFILE is not set
CONFIG_NETDB_DNSCLIENT=y
@@ -1261,6 +1269,7 @@ CONFIG_EXAMPLES_NSH=y
# CONFIG_NETUTILS_CODECS is not set
# CONFIG_NETUTILS_DHCPC is not set
# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/fire-stm32v2/src/Makefile b/configs/fire-stm32v2/src/Makefile
index c9c97c43e83..ea45dc76231 100644
--- a/configs/fire-stm32v2/src/Makefile
+++ b/configs/fire-stm32v2/src/Makefile
@@ -72,8 +72,4 @@ ifeq ($(CONFIG_USBDEV_COMPOSITE),y)
CSRCS += stm32_composite.c
endif
-ifeq ($(CONFIG_WATCHDOG),y)
-CSRCS += stm32_watchdog.c
-endif
-
include $(TOPDIR)/configs/Board.mk
diff --git a/configs/fire-stm32v2/src/stm32_appinit.c b/configs/fire-stm32v2/src/stm32_appinit.c
index 8c45062a8f3..e8711ef204a 100644
--- a/configs/fire-stm32v2/src/stm32_appinit.c
+++ b/configs/fire-stm32v2/src/stm32_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/fire-stm32v2/src/stm32_appinit.c
*
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -196,9 +196,24 @@ static void stm32_i2ctool(void)
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#if defined(HAVE_MMCSD) || defined(HAVE_W25)
int ret;
diff --git a/configs/freedom-kl25z/minnsh/defconfig b/configs/freedom-kl25z/minnsh/defconfig
index 0bcfe2f3407..753da383ba1 100644
--- a/configs/freedom-kl25z/minnsh/defconfig
+++ b/configs/freedom-kl25z/minnsh/defconfig
@@ -353,28 +353,28 @@ CONFIG_SPI_EXCHANGE=y
# CONFIG_SERCOMM_CONSOLE is not set
CONFIG_SERIAL=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/freedom-kl25z/nsh/defconfig b/configs/freedom-kl25z/nsh/defconfig
index b95602880d4..7a97b9a5bb5 100644
--- a/configs/freedom-kl25z/nsh/defconfig
+++ b/configs/freedom-kl25z/nsh/defconfig
@@ -385,28 +385,28 @@ CONFIG_PWM=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/freedom-kl25z/src/kl_appinit.c b/configs/freedom-kl25z/src/kl_appinit.c
index a58a43c0bd6..a00e675cdd8 100644
--- a/configs/freedom-kl25z/src/kl_appinit.c
+++ b/configs/freedom-kl25z/src/kl_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/stm32f4discovery/src/kl_appinit.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -59,13 +59,26 @@
* Name: board_app_initialize
*
* Description:
- * Perform application specific initialization. This function is never
- * called directly from application code, but only indirectly via the
- * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ * Perform architecture specific initialization
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#if defined(CONFIG_SENSORS_ADXL345)
int ret;
diff --git a/configs/freedom-kl25z/src/kl_boardinitialize.c b/configs/freedom-kl25z/src/kl_boardinitialize.c
index 2ab54047bef..4da407d2385 100644
--- a/configs/freedom-kl25z/src/kl_boardinitialize.c
+++ b/configs/freedom-kl25z/src/kl_boardinitialize.c
@@ -124,7 +124,7 @@ void board_initialize(void)
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
- (void)board_app_initialize();
+ (void)board_app_initialize(0);
#endif
/* CC3000 wireless initialization */
diff --git a/configs/freedom-kl26z/minnsh/defconfig b/configs/freedom-kl26z/minnsh/defconfig
index 74c11f304a5..843bd482e05 100644
--- a/configs/freedom-kl26z/minnsh/defconfig
+++ b/configs/freedom-kl26z/minnsh/defconfig
@@ -356,28 +356,28 @@ CONFIG_SPI_EXCHANGE=y
# CONFIG_SERCOMM_CONSOLE is not set
CONFIG_SERIAL=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/freedom-kl26z/nsh/defconfig b/configs/freedom-kl26z/nsh/defconfig
index ec69cb5241e..40157e1b53b 100644
--- a/configs/freedom-kl26z/nsh/defconfig
+++ b/configs/freedom-kl26z/nsh/defconfig
@@ -385,28 +385,28 @@ CONFIG_PWM=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/freedom-kl26z/src/kl_appinit.c b/configs/freedom-kl26z/src/kl_appinit.c
index c4e5ad7d424..96ac70a0617 100644
--- a/configs/freedom-kl26z/src/kl_appinit.c
+++ b/configs/freedom-kl26z/src/kl_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/stm32f4discovery/src/kl_appinit.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -57,13 +57,26 @@
* Name: board_app_initialize
*
* Description:
- * Perform application specific initialization. This function is never
- * called directly from application code, but only indirectly via the
- * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ * Perform architecture specific initialization
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return OK;
}
diff --git a/configs/freedom-kl26z/src/kl_boardinitialize.c b/configs/freedom-kl26z/src/kl_boardinitialize.c
index 004274c6f62..3a3be5190a2 100644
--- a/configs/freedom-kl26z/src/kl_boardinitialize.c
+++ b/configs/freedom-kl26z/src/kl_boardinitialize.c
@@ -124,7 +124,7 @@ void board_initialize(void)
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
- (void)board_app_initialize();
+ (void)board_app_initialize(0);
#endif
}
#endif
diff --git a/configs/hymini-stm32v/buttons/defconfig b/configs/hymini-stm32v/buttons/defconfig
index edda72f4cff..3141e0c1605 100644
--- a/configs/hymini-stm32v/buttons/defconfig
+++ b/configs/hymini-stm32v/buttons/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -408,13 +414,17 @@ CONFIG_STM32_JTAG_DISABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
CONFIG_STM32_HAVE_RTC_COUNTER=y
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -677,33 +687,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -841,6 +846,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -925,7 +932,6 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
@@ -961,6 +967,7 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/hymini-stm32v/nsh/defconfig b/configs/hymini-stm32v/nsh/defconfig
index c968013077c..69662e887c4 100644
--- a/configs/hymini-stm32v/nsh/defconfig
+++ b/configs/hymini-stm32v/nsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -240,6 +245,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -411,13 +417,17 @@ CONFIG_STM32_JTAG_DISABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -706,33 +716,28 @@ CONFIG_SDIO_PREFLIGHT=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -878,6 +883,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -990,6 +997,7 @@ CONFIG_EXAMPLES_NSH=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/hymini-stm32v/nsh2/defconfig b/configs/hymini-stm32v/nsh2/defconfig
index faabb689b9a..e36492fc6aa 100644
--- a/configs/hymini-stm32v/nsh2/defconfig
+++ b/configs/hymini-stm32v/nsh2/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -240,6 +245,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -418,13 +424,17 @@ CONFIG_STM32_JTAG_DISABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -794,33 +804,28 @@ CONFIG_SDIO_PREFLIGHT=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -857,7 +862,6 @@ CONFIG_USBDEV_MAXPOWER=100
# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
CONFIG_USBDEV_TRACE=y
CONFIG_USBDEV_TRACE_NRECORDS=128
-# CONFIG_USBDEV_TRACE_STRINGS is not set
# CONFIG_USBDEV_TRACE_INITIALIDSET is not set
#
@@ -952,6 +956,7 @@ CONFIG_NX_LCDDRIVER=y
CONFIG_NX_NPLANES=1
CONFIG_NX_BGCOLOR=0x0
# CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
#
# Supported Pixel Depths
@@ -1096,6 +1101,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -1191,6 +1198,7 @@ CONFIG_EXAMPLES_NXIMAGE=y
CONFIG_EXAMPLES_NXIMAGE_VPLANE=0
CONFIG_EXAMPLES_NXIMAGE_DEVNO=0
CONFIG_EXAMPLES_NXIMAGE_BPP=16
+# CONFIG_EXAMPLES_NXIMAGE_GREYSCALE is not set
# CONFIG_EXAMPLES_NXIMAGE_XSCALEp5 is not set
CONFIG_EXAMPLES_NXIMAGE_XSCALE1p0=y
# CONFIG_EXAMPLES_NXIMAGE_XSCALE1p5 is not set
@@ -1266,6 +1274,7 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/hymini-stm32v/src/Makefile b/configs/hymini-stm32v/src/Makefile
index f4a6dc26033..f709a57b8d2 100644
--- a/configs/hymini-stm32v/src/Makefile
+++ b/configs/hymini-stm32v/src/Makefile
@@ -59,8 +59,4 @@ ifeq ($(CONFIG_USBMSC),y)
CSRCS += stm32_usbmsc.c
endif
-ifeq ($(CONFIG_WATCHDOG),y)
-CSRCS += stm32_watchdog.c
-endif
-
include $(TOPDIR)/configs/Board.mk
diff --git a/configs/hymini-stm32v/src/stm32_appinit.c b/configs/hymini-stm32v/src/stm32_appinit.c
index df8adca9070..4a7b2206337 100644
--- a/configs/hymini-stm32v/src/stm32_appinit.c
+++ b/configs/hymini-stm32v/src/stm32_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/hymini-stm32v/src/stm32_appinit.c
*
- * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -151,9 +151,24 @@ static int nsh_cdinterrupt(int irq, FAR void *context)
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef NSH_HAVEMMCSD
int ret;
diff --git a/configs/hymini-stm32v/src/stm32_watchdog.c b/configs/hymini-stm32v/src/stm32_watchdog.c
deleted file mode 100644
index db143f67b1f..00000000000
--- a/configs/hymini-stm32v/src/stm32_watchdog.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/************************************************************************************
- * configs/hymini-stm32v/src/stm32_watchdog.c
- *
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include
-
-#include
-#include
-
-#include
-#include
-
-#include "stm32_wdg.h"
-
-#ifdef CONFIG_WATCHDOG
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-/* Configuration *******************************************************************/
-/* Wathdog hardware should be enabled */
-
-#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG)
-# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined"
-#endif
-
-/* Select the path to the registered watchdog timer device */
-
-#ifndef CONFIG_STM32_WDG_DEVPATH
-# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH
-# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH
-# else
-# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0"
-# endif
-#endif
-
-/* Use the un-calibrated LSI frequency if we have nothing better */
-
-#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ)
-# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY
-#endif
-
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog timer */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_WATCHDOG
-#endif
-
-#ifdef CONFIG_DEBUG_WATCHDOG
-# define wdgdbg dbg
-# define wdglldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define wdgvdbg vdbg
-# define wdgllvdbg llvdbg
-# else
-# define wdgvdbg(x...)
-# define wdgllvdbg(x...)
-# endif
-#else
-# define wdgdbg(x...)
-# define wdglldbg(x...)
-# define wdgvdbg(x...)
-# define wdgllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-/****************************************************************************
- * Name: up_wdginitialize()
- *
- * Description:
- * Perform architecuture-specific initialization of the Watchdog hardware.
- * This interface must be provided by all configurations using
- * apps/examples/watchdog
- *
- ****************************************************************************/
-
-int up_wdginitialize(void)
-{
- /* Initialize tha register the watchdog timer device */
-
-#if defined(CONFIG_STM32_WWDG)
- stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH);
- return OK;
-#elif defined(CONFIG_STM32_IWDG)
- stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ);
- return OK;
-#else
- return -ENODEV;
-#endif
-}
-
-#endif /* CONFIG_WATCHDOG */
diff --git a/configs/hymini-stm32v/usbmsc/defconfig b/configs/hymini-stm32v/usbmsc/defconfig
index b5514012449..a38efa7b82f 100644
--- a/configs/hymini-stm32v/usbmsc/defconfig
+++ b/configs/hymini-stm32v/usbmsc/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -240,6 +245,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -413,14 +419,20 @@ CONFIG_STM32_JTAG_DISABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -525,7 +537,14 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
# Board-Specific Options
#
CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_ADCTEST is not set
+# CONFIG_BOARDCTL_PWMTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
#
# RTOS Features
@@ -701,34 +720,28 @@ CONFIG_SDIO_PREFLIGHT=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -922,6 +935,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -1033,6 +1048,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/hymini-stm32v/usbnsh/defconfig b/configs/hymini-stm32v/usbnsh/defconfig
index a5bc5c22840..d744b1a2ca9 100644
--- a/configs/hymini-stm32v/usbnsh/defconfig
+++ b/configs/hymini-stm32v/usbnsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -408,13 +414,17 @@ CONFIG_STM32_JTAG_DISABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
CONFIG_STM32_HAVE_RTC_COUNTER=y
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -516,7 +526,14 @@ CONFIG_NSH_MMCSDMINOR=0
# Board-Specific Options
#
CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_ADCTEST is not set
+# CONFIG_BOARDCTL_PWMTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
#
# RTOS Features
@@ -680,33 +697,28 @@ CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -760,8 +772,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
CONFIG_CDCACM_EPBULKIN=2
CONFIG_CDCACM_EPBULKIN_FSSIZE=64
CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_BULKIN_REQLEN=96
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
@@ -886,6 +898,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -1006,6 +1020,7 @@ CONFIG_EXAMPLES_NSH=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/hymini-stm32v/usbserial/defconfig b/configs/hymini-stm32v/usbserial/defconfig
index 7d41d164709..6183ec98d4f 100644
--- a/configs/hymini-stm32v/usbserial/defconfig
+++ b/configs/hymini-stm32v/usbserial/defconfig
@@ -117,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -135,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -241,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -412,14 +415,20 @@ CONFIG_STM32_JTAG_DISABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
CONFIG_STM32_HAVE_RTC_COUNTER=y
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -686,34 +695,28 @@ CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -1008,6 +1011,7 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/kwikstik-k40/ostest/defconfig b/configs/kwikstik-k40/ostest/defconfig
index 1f886be274e..51b5c56a7a4 100644
--- a/configs/kwikstik-k40/ostest/defconfig
+++ b/configs/kwikstik-k40/ostest/defconfig
@@ -420,28 +420,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-CONFIG_ARCH_HAVE_UART5=y
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+CONFIG_UART5_SERIALDRIVER=y
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/kwikstik-k40/src/k40_appinit.c b/configs/kwikstik-k40/src/k40_appinit.c
index 1fb77c36346..43694bce935 100644
--- a/configs/kwikstik-k40/src/k40_appinit.c
+++ b/configs/kwikstik-k40/src/k40_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/kwikstik-k40/src/k40_appinit.c
*
- * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -185,9 +185,24 @@ static int kinetis_cdinterrupt(int irq, FAR void *context)
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef NSH_HAVEMMCSD
int ret;
diff --git a/configs/launchxl-tms57004/nsh/defconfig b/configs/launchxl-tms57004/nsh/defconfig
index c0a16a9c21c..082be95f2bd 100644
--- a/configs/launchxl-tms57004/nsh/defconfig
+++ b/configs/launchxl-tms57004/nsh/defconfig
@@ -424,28 +424,28 @@ CONFIG_SPI_EXCHANGE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-CONFIG_ARCH_HAVE_SCI1=y
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+CONFIG_SCI1_SERIALDRIVER=y
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/launchxl-tms57004/src/tms570_appinit.c b/configs/launchxl-tms57004/src/tms570_appinit.c
index 448ea165775..6a187b033fd 100644
--- a/configs/launchxl-tms57004/src/tms570_appinit.c
+++ b/configs/launchxl-tms57004/src/tms570_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* configs/launchxl_tms57004/src/sim_appinit.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -50,14 +50,27 @@
* Name: board_app_initialize
*
* Description:
- * Perform application specific initialization. This function is never
- * called directly from application code, but only indirectly via the
- * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ * Perform architecture specific initialization
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
#ifdef CONFIG_LIB_BOARDCTL
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifndef CONFIG_BOARD_INITIALIZE
/* Perform application level board initialization (if that was not already
diff --git a/configs/lincoln60/netnsh/defconfig b/configs/lincoln60/netnsh/defconfig
index d8da29e553d..95feb4b7f4d 100644
--- a/configs/lincoln60/netnsh/defconfig
+++ b/configs/lincoln60/netnsh/defconfig
@@ -502,28 +502,28 @@ CONFIG_ETH0_PHY_KSZ8041=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lincoln60/nsh/defconfig b/configs/lincoln60/nsh/defconfig
index 71ddd71b843..54c6ad3f8cc 100644
--- a/configs/lincoln60/nsh/defconfig
+++ b/configs/lincoln60/nsh/defconfig
@@ -428,28 +428,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lincoln60/src/lpc17_appinit.c b/configs/lincoln60/src/lpc17_appinit.c
index a10646e7517..2e1426635ca 100644
--- a/configs/lincoln60/src/lpc17_appinit.c
+++ b/configs/lincoln60/src/lpc17_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/lincoln60/src/lpc17_appinit.c
*
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -47,10 +47,6 @@
#include
#include
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -61,9 +57,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return OK;
}
diff --git a/configs/lincoln60/thttpd-binfs/defconfig b/configs/lincoln60/thttpd-binfs/defconfig
index fe49078c526..a752c4c72ff 100644
--- a/configs/lincoln60/thttpd-binfs/defconfig
+++ b/configs/lincoln60/thttpd-binfs/defconfig
@@ -466,28 +466,28 @@ CONFIG_ETH0_PHY_KSZ8041=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lm3s6432-s2e/nsh/defconfig b/configs/lm3s6432-s2e/nsh/defconfig
index 0c8509b814c..e2984929334 100644
--- a/configs/lm3s6432-s2e/nsh/defconfig
+++ b/configs/lm3s6432-s2e/nsh/defconfig
@@ -485,28 +485,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lm3s6432-s2e/src/lm_appinit.c b/configs/lm3s6432-s2e/src/lm_appinit.c
index ff747854259..d787ea32583 100644
--- a/configs/lm3s6432-s2e/src/lm_appinit.c
+++ b/configs/lm3s6432-s2e/src/lm_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/lm3s6432-s2e/src/lm_appinit.c
*
- * Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -47,10 +47,6 @@
#include
#include
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -61,9 +57,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return OK;
}
diff --git a/configs/lm3s6965-ek/discover/defconfig b/configs/lm3s6965-ek/discover/defconfig
index 3a0a9d97456..b43f67b956b 100644
--- a/configs/lm3s6965-ek/discover/defconfig
+++ b/configs/lm3s6965-ek/discover/defconfig
@@ -512,28 +512,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lm3s6965-ek/nsh/defconfig b/configs/lm3s6965-ek/nsh/defconfig
index 3a0a9d97456..b43f67b956b 100644
--- a/configs/lm3s6965-ek/nsh/defconfig
+++ b/configs/lm3s6965-ek/nsh/defconfig
@@ -512,28 +512,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lm3s6965-ek/nx/defconfig b/configs/lm3s6965-ek/nx/defconfig
index bdafa45c256..3d779630f9d 100644
--- a/configs/lm3s6965-ek/nx/defconfig
+++ b/configs/lm3s6965-ek/nx/defconfig
@@ -491,28 +491,28 @@ CONFIG_LCD_LANDSCAPE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lm3s6965-ek/src/lm_appinit.c b/configs/lm3s6965-ek/src/lm_appinit.c
index 6f2480b80d0..c9eaf61d81c 100644
--- a/configs/lm3s6965-ek/src/lm_appinit.c
+++ b/configs/lm3s6965-ek/src/lm_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/lm3s6965-ek/src/lm_appinit.c
*
- * Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -107,9 +107,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef NSH_HAVEMMCSD
FAR struct spi_dev_s *spi;
diff --git a/configs/lm3s6965-ek/tcpecho/defconfig b/configs/lm3s6965-ek/tcpecho/defconfig
index a50ae7f2bc9..e655d4d6c13 100644
--- a/configs/lm3s6965-ek/tcpecho/defconfig
+++ b/configs/lm3s6965-ek/tcpecho/defconfig
@@ -481,28 +481,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lm3s8962-ek/nsh/defconfig b/configs/lm3s8962-ek/nsh/defconfig
index 0a28a1cea2a..48aac15aa02 100644
--- a/configs/lm3s8962-ek/nsh/defconfig
+++ b/configs/lm3s8962-ek/nsh/defconfig
@@ -522,28 +522,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lm3s8962-ek/nx/defconfig b/configs/lm3s8962-ek/nx/defconfig
index db5c996245f..c72dc447b56 100644
--- a/configs/lm3s8962-ek/nx/defconfig
+++ b/configs/lm3s8962-ek/nx/defconfig
@@ -501,28 +501,28 @@ CONFIG_LCD_LANDSCAPE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lm3s8962-ek/src/lm_appinit.c b/configs/lm3s8962-ek/src/lm_appinit.c
index 7a027dda55a..ba601eacb67 100644
--- a/configs/lm3s8962-ek/src/lm_appinit.c
+++ b/configs/lm3s8962-ek/src/lm_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/lm3s8962-ek/src/lm_appinit.c
*
- * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2010, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -109,9 +109,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef NSH_HAVEMMCSD
FAR struct spi_dev_s *spi;
diff --git a/configs/lm4f120-launchpad/nsh/defconfig b/configs/lm4f120-launchpad/nsh/defconfig
index 8156396e3e6..61ff3481e35 100644
--- a/configs/lm4f120-launchpad/nsh/defconfig
+++ b/configs/lm4f120-launchpad/nsh/defconfig
@@ -327,27 +327,27 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lm4f120-launchpad/src/lm4f_appinit.c b/configs/lm4f120-launchpad/src/lm4f_appinit.c
index b557f771f57..f667597398d 100644
--- a/configs/lm4f120-launchpad/src/lm4f_appinit.c
+++ b/configs/lm4f120-launchpad/src/lm4f_appinit.c
@@ -2,7 +2,7 @@
* config/lm4f120-launchpad/src/lm4f_appinit.c
* arch/arm/src/board/lm4f_appinit.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -79,9 +79,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return OK;
}
diff --git a/configs/lpc4330-xplorer/nsh/defconfig b/configs/lpc4330-xplorer/nsh/defconfig
index 5250c0f226c..a6a461ba6c9 100644
--- a/configs/lpc4330-xplorer/nsh/defconfig
+++ b/configs/lpc4330-xplorer/nsh/defconfig
@@ -471,33 +471,32 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-CONFIG_ARCH_HAVE_USART0=y
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+CONFIG_USART0_SERIALDRIVER=y
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
#
-CONFIG_USART0_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
diff --git a/configs/lpc4330-xplorer/src/lpc43_appinit.c b/configs/lpc4330-xplorer/src/lpc43_appinit.c
index 6377c62de57..48225e0dde4 100644
--- a/configs/lpc4330-xplorer/src/lpc43_appinit.c
+++ b/configs/lpc4330-xplorer/src/lpc43_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/lpc4330-xplorer/src/lpc43_appinit.c
*
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -139,9 +139,24 @@ static int nsh_spifi_initialize(void)
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
/* Initialize the SPIFI block device */
diff --git a/configs/lpc4337-ws/nsh/defconfig b/configs/lpc4337-ws/nsh/defconfig
index 52536d55b2b..4f36719c26f 100644
--- a/configs/lpc4337-ws/nsh/defconfig
+++ b/configs/lpc4337-ws/nsh/defconfig
@@ -468,33 +468,32 @@ CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
#
-CONFIG_USART2_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
diff --git a/configs/lpc4337-ws/src/lpc43_appinit.c b/configs/lpc4337-ws/src/lpc43_appinit.c
index 83b8cddc1e9..976b78a4181 100644
--- a/configs/lpc4337-ws/src/lpc43_appinit.c
+++ b/configs/lpc4337-ws/src/lpc43_appinit.c
@@ -116,9 +116,24 @@ static void lpc43_i2ctool(void)
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
/* Register I2C drivers on behalf of the I2C tool */
diff --git a/configs/lpc4357-evb/nsh/defconfig b/configs/lpc4357-evb/nsh/defconfig
index 68050c94d6d..e1f25c97d57 100644
--- a/configs/lpc4357-evb/nsh/defconfig
+++ b/configs/lpc4357-evb/nsh/defconfig
@@ -403,33 +403,32 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-CONFIG_ARCH_HAVE_USART0=y
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+CONFIG_USART0_SERIALDRIVER=y
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
#
-CONFIG_USART0_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
diff --git a/configs/lpc4357-evb/src/lpc43_appinit.c b/configs/lpc4357-evb/src/lpc43_appinit.c
index 2555797f22c..43efc040cee 100644
--- a/configs/lpc4357-evb/src/lpc43_appinit.c
+++ b/configs/lpc4357-evb/src/lpc43_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/lpc4357-evb/src/lpc43_appinit.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -139,9 +139,24 @@ static int nsh_spifi_initialize(void)
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
/* Initialize the SPIFI block device */
diff --git a/configs/lpc4370-link2/nsh/defconfig b/configs/lpc4370-link2/nsh/defconfig
index 949db2b1e72..8a14cef0675 100644
--- a/configs/lpc4370-link2/nsh/defconfig
+++ b/configs/lpc4370-link2/nsh/defconfig
@@ -466,33 +466,32 @@ CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
#
-CONFIG_USART2_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
diff --git a/configs/lpc4370-link2/src/lpc43_appinit.c b/configs/lpc4370-link2/src/lpc43_appinit.c
index 74fce0eb1f4..660fb2e5f7c 100644
--- a/configs/lpc4370-link2/src/lpc43_appinit.c
+++ b/configs/lpc4370-link2/src/lpc43_appinit.c
@@ -116,9 +116,24 @@ static void lpc43_i2ctool(void)
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
/* Register I2C drivers on behalf of the I2C tool */
diff --git a/configs/lpcxpresso-lpc1115/minnsh/defconfig b/configs/lpcxpresso-lpc1115/minnsh/defconfig
index d17358614bc..58ea587ca6b 100644
--- a/configs/lpcxpresso-lpc1115/minnsh/defconfig
+++ b/configs/lpcxpresso-lpc1115/minnsh/defconfig
@@ -367,28 +367,28 @@ CONFIG_DISABLE_POLL=y
# CONFIG_SERCOMM_CONSOLE is not set
CONFIG_SERIAL=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lpcxpresso-lpc1115/nsh/defconfig b/configs/lpcxpresso-lpc1115/nsh/defconfig
index bca4b63188b..fc7f470f6da 100644
--- a/configs/lpcxpresso-lpc1115/nsh/defconfig
+++ b/configs/lpcxpresso-lpc1115/nsh/defconfig
@@ -385,28 +385,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c b/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c
index bbe61c493da..3ca2de59692 100644
--- a/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c
+++ b/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/lpcxpresso-lpc1115/src/lpc11_appinit.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -99,14 +99,6 @@
# define CONFIG_NSH_MMCSDMINOR 0
#endif
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -117,9 +109,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef NSH_HAVEMMCSD
FAR struct spi_dev_s *ssp;
diff --git a/configs/lpcxpresso-lpc1768/dhcpd/defconfig b/configs/lpcxpresso-lpc1768/dhcpd/defconfig
index c7504dbae6c..aca1a2a69b5 100644
--- a/configs/lpcxpresso-lpc1768/dhcpd/defconfig
+++ b/configs/lpcxpresso-lpc1768/dhcpd/defconfig
@@ -457,28 +457,28 @@ CONFIG_ETH0_PHY_LAN8720=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-CONFIG_ARCH_HAVE_UART3=y
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+CONFIG_UART3_SERIALDRIVER=y
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lpcxpresso-lpc1768/nsh/defconfig b/configs/lpcxpresso-lpc1768/nsh/defconfig
index 2726b4626c4..082098ca9fd 100644
--- a/configs/lpcxpresso-lpc1768/nsh/defconfig
+++ b/configs/lpcxpresso-lpc1768/nsh/defconfig
@@ -537,28 +537,28 @@ CONFIG_ETH0_PHY_LAN8720=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-CONFIG_ARCH_HAVE_UART3=y
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+CONFIG_UART3_SERIALDRIVER=y
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lpcxpresso-lpc1768/nx/defconfig b/configs/lpcxpresso-lpc1768/nx/defconfig
index bc3568b5aee..e604f2997f8 100644
--- a/configs/lpcxpresso-lpc1768/nx/defconfig
+++ b/configs/lpcxpresso-lpc1768/nx/defconfig
@@ -469,28 +469,28 @@ CONFIG_LCD_LANDSCAPE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-CONFIG_ARCH_HAVE_UART3=y
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+CONFIG_UART3_SERIALDRIVER=y
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c b/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c
index a9b760b87c7..0aefdd37d44 100644
--- a/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c
+++ b/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/lpcxpresso-lpc1768/src/lpc17_appinit.c
*
- * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -120,9 +120,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef NSH_HAVEMMCSD
FAR struct spi_dev_s *ssp;
diff --git a/configs/lpcxpresso-lpc1768/thttpd/defconfig b/configs/lpcxpresso-lpc1768/thttpd/defconfig
index 5fc4662adc7..69b2148fdfc 100644
--- a/configs/lpcxpresso-lpc1768/thttpd/defconfig
+++ b/configs/lpcxpresso-lpc1768/thttpd/defconfig
@@ -457,28 +457,28 @@ CONFIG_ETH0_PHY_LAN8720=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-CONFIG_ARCH_HAVE_UART3=y
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+CONFIG_UART3_SERIALDRIVER=y
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/lpcxpresso-lpc1768/usbmsc/defconfig b/configs/lpcxpresso-lpc1768/usbmsc/defconfig
index 8d68fff8ce0..a6d2fa0c3da 100644
--- a/configs/lpcxpresso-lpc1768/usbmsc/defconfig
+++ b/configs/lpcxpresso-lpc1768/usbmsc/defconfig
@@ -447,28 +447,28 @@ CONFIG_MMCSD_SPIMODE=0
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-CONFIG_ARCH_HAVE_UART3=y
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+CONFIG_UART3_SERIALDRIVER=y
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/maple/nsh/defconfig b/configs/maple/nsh/defconfig
index b791dbad74a..54ebb6d22ea 100644
--- a/configs/maple/nsh/defconfig
+++ b/configs/maple/nsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -405,13 +411,17 @@ CONFIG_STM32_JTAG_DISABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
CONFIG_STM32_HAVE_RTC_COUNTER=y
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -667,33 +677,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -730,7 +735,6 @@ CONFIG_USBDEV_MAXPOWER=100
# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
CONFIG_USBDEV_TRACE=y
CONFIG_USBDEV_TRACE_NRECORDS=32
-# CONFIG_USBDEV_TRACE_STRINGS is not set
# CONFIG_USBDEV_TRACE_INITIALIDSET is not set
#
@@ -860,6 +864,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -936,7 +942,6 @@ CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
@@ -972,6 +977,7 @@ CONFIG_EXAMPLES_NSH=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/maple/nx/defconfig b/configs/maple/nx/defconfig
index 3d35cb2cfc0..b60f26e071e 100644
--- a/configs/maple/nx/defconfig
+++ b/configs/maple/nx/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -414,13 +420,17 @@ CONFIG_STM32_JTAG_DISABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -539,7 +549,14 @@ CONFIG_NSH_MMCSDMINOR=0
#
CONFIG_MAPLE_MINI=y
CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_ADCTEST is not set
+# CONFIG_BOARDCTL_PWMTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
#
# RTOS Features
@@ -728,6 +745,7 @@ CONFIG_LCD_LANDSCAPE=y
# Alphanumeric/Segment LCD Devices
#
# CONFIG_LCD_LCD1602 is not set
+# CONFIG_LCD_BACKPACK is not set
#
# LED Support
@@ -747,33 +765,28 @@ CONFIG_LCD_LANDSCAPE=y
CONFIG_SERIAL=y
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -810,7 +823,6 @@ CONFIG_USBDEV_MAXPOWER=100
# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
CONFIG_USBDEV_TRACE=y
CONFIG_USBDEV_TRACE_NRECORDS=32
-# CONFIG_USBDEV_TRACE_STRINGS is not set
# CONFIG_USBDEV_TRACE_INITIALIDSET is not set
#
@@ -830,8 +842,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
CONFIG_CDCACM_EPBULKIN=2
CONFIG_CDCACM_EPBULKIN_FSSIZE=64
CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_BULKIN_REQLEN=96
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
@@ -902,6 +914,7 @@ CONFIG_NX_LCDDRIVER=y
CONFIG_NX_NPLANES=1
CONFIG_NX_BGCOLOR=0x0
# CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
#
# Supported Pixel Depths
@@ -1044,6 +1057,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -1102,6 +1117,7 @@ CONFIG_EXAMPLES_NX_DEFAULT_FONT=y
CONFIG_EXAMPLES_NX_BPP=1
# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
+# CONFIG_EXAMPLES_NX_EXTERNINIT is not set
# CONFIG_EXAMPLES_NXTERM is not set
# CONFIG_EXAMPLES_NXFFS is not set
CONFIG_EXAMPLES_NXHELLO=y
@@ -1118,6 +1134,7 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y
# Example Font Configuration
#
CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y
+# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set
# CONFIG_EXAMPLES_NXIMAGE is not set
# CONFIG_EXAMPLES_NXLINES is not set
# CONFIG_EXAMPLES_NXTEXT is not set
@@ -1177,6 +1194,7 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/maple/src/Makefile b/configs/maple/src/Makefile
index 99f214e5ea0..b9191381083 100644
--- a/configs/maple/src/Makefile
+++ b/configs/maple/src/Makefile
@@ -52,10 +52,6 @@ endif
ifeq ($(CONFIG_USBMSC),y)
endif
-ifeq ($(CONFIG_WATCHDOG),y)
-CSRCS += stm32_watchdog.c
-endif
-
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
diff --git a/configs/maple/src/stm32_appinit.c b/configs/maple/src/stm32_appinit.c
index 37878339005..d1a7c50d22b 100644
--- a/configs/maple/src/stm32_appinit.c
+++ b/configs/maple/src/stm32_appinit.c
@@ -55,9 +55,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return OK;
}
diff --git a/configs/maple/usbnsh/defconfig b/configs/maple/usbnsh/defconfig
index be3bc097cb6..fe4466fd045 100644
--- a/configs/maple/usbnsh/defconfig
+++ b/configs/maple/usbnsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -405,13 +411,17 @@ CONFIG_STM32_JTAG_DISABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
CONFIG_STM32_HAVE_RTC_COUNTER=y
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -514,7 +524,14 @@ CONFIG_NSH_MMCSDMINOR=0
#
CONFIG_MAPLE_MINI=y
CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_ADCTEST is not set
+# CONFIG_BOARDCTL_PWMTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
#
# RTOS Features
@@ -674,33 +691,28 @@ CONFIG_I2C=y
CONFIG_SERIAL=y
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -737,7 +749,6 @@ CONFIG_USBDEV_MAXPOWER=100
# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
CONFIG_USBDEV_TRACE=y
CONFIG_USBDEV_TRACE_NRECORDS=32
-# CONFIG_USBDEV_TRACE_STRINGS is not set
# CONFIG_USBDEV_TRACE_INITIALIDSET is not set
#
@@ -757,8 +768,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
CONFIG_CDCACM_EPBULKIN=2
CONFIG_CDCACM_EPBULKIN_FSSIZE=64
CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_BULKIN_REQLEN=96
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
@@ -886,6 +897,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -998,6 +1011,7 @@ CONFIG_EXAMPLES_NSH=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/mbed/hidkbd/defconfig b/configs/mbed/hidkbd/defconfig
index 87f20d30da4..ef889a04118 100644
--- a/configs/mbed/hidkbd/defconfig
+++ b/configs/mbed/hidkbd/defconfig
@@ -360,7 +360,7 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
+CONFIG_UART0_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/mbed/nsh/defconfig b/configs/mbed/nsh/defconfig
index 420f83f9917..dcfda7b8c9b 100644
--- a/configs/mbed/nsh/defconfig
+++ b/configs/mbed/nsh/defconfig
@@ -453,28 +453,28 @@ CONFIG_MTD=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/mbed/src/lpc17_appinit.c b/configs/mbed/src/lpc17_appinit.c
index 505ae45545f..f70e811f3bb 100644
--- a/configs/mbed/src/lpc17_appinit.c
+++ b/configs/mbed/src/lpc17_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/mbed/src/lpc17_appinit.c
*
- * Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -78,9 +78,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return OK;
}
diff --git a/configs/mcu123-lpc214x/composite/defconfig b/configs/mcu123-lpc214x/composite/defconfig
index 770a258ebad..73d1c5912dc 100644
--- a/configs/mcu123-lpc214x/composite/defconfig
+++ b/configs/mcu123-lpc214x/composite/defconfig
@@ -388,28 +388,28 @@ CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/mcu123-lpc214x/nsh/defconfig b/configs/mcu123-lpc214x/nsh/defconfig
index ba8ec854ec2..4d7bbb44e84 100644
--- a/configs/mcu123-lpc214x/nsh/defconfig
+++ b/configs/mcu123-lpc214x/nsh/defconfig
@@ -385,28 +385,28 @@ CONFIG_MMCSD_SPIMODE=0
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/mcu123-lpc214x/src/lpc2148_appinit.c b/configs/mcu123-lpc214x/src/lpc2148_appinit.c
index 6437d12bf57..1e840af3613 100644
--- a/configs/mcu123-lpc214x/src/lpc2148_appinit.c
+++ b/configs/mcu123-lpc214x/src/lpc2148_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/mcu123-lpc214x/src/lpc2148_appinit.c
*
- * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -108,9 +108,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef HAVE_MMCSD
FAR struct spi_dev_s *spi;
diff --git a/configs/mcu123-lpc214x/usbmsc/defconfig b/configs/mcu123-lpc214x/usbmsc/defconfig
index 68b89aa1488..5d58f0bba79 100644
--- a/configs/mcu123-lpc214x/usbmsc/defconfig
+++ b/configs/mcu123-lpc214x/usbmsc/defconfig
@@ -387,28 +387,28 @@ CONFIG_MMCSD_SPIMODE=0
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/mcu123-lpc214x/usbserial/defconfig b/configs/mcu123-lpc214x/usbserial/defconfig
index bd06293269b..e13970db02d 100644
--- a/configs/mcu123-lpc214x/usbserial/defconfig
+++ b/configs/mcu123-lpc214x/usbserial/defconfig
@@ -409,28 +409,28 @@ CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/micropendous3/hello/defconfig b/configs/micropendous3/hello/defconfig
index 688b012fc2d..a1a6f7ceeca 100644
--- a/configs/micropendous3/hello/defconfig
+++ b/configs/micropendous3/hello/defconfig
@@ -246,12 +246,11 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_USART1=y
+CONFIG_USART1_SERIALDRIVER=y
#
# USART Configuration
#
-CONFIG_USART1_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_USART1_SERIAL_CONSOLE=y
# CONFIG_NO_SERIAL_CONSOLE is not set
diff --git a/configs/mikroe-stm32f4/fulldemo/defconfig b/configs/mikroe-stm32f4/fulldemo/defconfig
index 0475e67b8fa..65b3ac8069f 100644
--- a/configs/mikroe-stm32f4/fulldemo/defconfig
+++ b/configs/mikroe-stm32f4/fulldemo/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -443,14 +449,18 @@ CONFIG_STM32_DMACAPABLE=y
# ADC Configuration
#
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_USART2_RXDMA is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -719,6 +729,7 @@ CONFIG_SPI_CALLBACK=y
CONFIG_RTC=y
CONFIG_RTC_DATETIME=y
CONFIG_RTC_ALARM=y
+CONFIG_RTC_NALARMS=1
# CONFIG_RTC_DRIVER is not set
# CONFIG_RTC_EXTERNAL is not set
# CONFIG_WATCHDOG is not set
@@ -825,10 +836,12 @@ CONFIG_RAMMTD_ERASESTATE=0xff
# CONFIG_MTD_AT45DB is not set
CONFIG_MTD_M25P=y
CONFIG_M25P_SPIMODE=0
+CONFIG_M25P_SPIFREQUENCY=20000000
CONFIG_M25P_MANUFACTURER=0x1C
CONFIG_M25P_MEMORY_TYPE=0x31
CONFIG_M25P_SUBSECTOR_ERASE=y
# CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
CONFIG_MTD_SMART=y
# CONFIG_SMART_DEV_LOOP is not set
CONFIG_MTD_SMART_SECTOR_SIZE=512
@@ -841,6 +854,7 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
# CONFIG_MTD_RAMTRON is not set
# CONFIG_MTD_SST25 is not set
# CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
# CONFIG_MTD_SST39FV is not set
# CONFIG_MTD_W25 is not set
# CONFIG_EEPROM is not set
@@ -852,33 +866,28 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
CONFIG_SERIAL=y
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -932,8 +941,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
CONFIG_CDCACM_EPBULKIN=2
CONFIG_CDCACM_EPBULKIN_FSSIZE=64
CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_BULKIN_REQLEN=96
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
@@ -1016,6 +1025,7 @@ CONFIG_NX_LCDDRIVER=y
CONFIG_NX_NPLANES=1
CONFIG_NX_BGCOLOR=0x0
# CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
#
# Supported Pixel Depths
@@ -1218,6 +1228,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -1373,6 +1385,7 @@ CONFIG_FSUTILS_MKSMARTFS=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
@@ -1513,6 +1526,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=2048
# NXWidget Configuration
#
CONFIG_NXWIDGETS_BPP=16
+# CONFIG_NXWIDGETS_GREYSCALE is not set
CONFIG_NXWIDGETS_SIZEOFCHAR=1
#
diff --git a/configs/mikroe-stm32f4/kostest/defconfig b/configs/mikroe-stm32f4/kostest/defconfig
index ce0b865be0e..53c51bc66f8 100644
--- a/configs/mikroe-stm32f4/kostest/defconfig
+++ b/configs/mikroe-stm32f4/kostest/defconfig
@@ -81,6 +81,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -99,6 +100,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -120,6 +122,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -128,6 +131,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
CONFIG_ARM_MPU=y
CONFIG_ARM_MPU_NREGIONS=8
@@ -139,6 +143,7 @@ CONFIG_ARM_MPU_NREGIONS=8
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -245,6 +250,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -448,13 +454,17 @@ CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
# ADC Configuration
#
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -722,6 +732,7 @@ CONFIG_SPI_EXCHANGE=y
CONFIG_RTC=y
CONFIG_RTC_DATETIME=y
CONFIG_RTC_ALARM=y
+CONFIG_RTC_NALARMS=1
# CONFIG_RTC_DRIVER is not set
# CONFIG_RTC_EXTERNAL is not set
# CONFIG_WATCHDOG is not set
@@ -776,10 +787,12 @@ CONFIG_RAMMTD_ERASESTATE=0xff
# CONFIG_MTD_AT45DB is not set
CONFIG_MTD_M25P=y
CONFIG_M25P_SPIMODE=0
+CONFIG_M25P_SPIFREQUENCY=20000000
CONFIG_M25P_MANUFACTURER=0x1C
CONFIG_M25P_MEMORY_TYPE=0x31
CONFIG_M25P_SUBSECTOR_ERASE=y
# CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
CONFIG_MTD_SMART=y
# CONFIG_SMART_DEV_LOOP is not set
CONFIG_MTD_SMART_SECTOR_SIZE=512
@@ -792,6 +805,7 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
# CONFIG_MTD_RAMTRON is not set
# CONFIG_MTD_SST25 is not set
# CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
# CONFIG_MTD_SST39FV is not set
# CONFIG_MTD_W25 is not set
# CONFIG_EEPROM is not set
@@ -803,33 +817,28 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
CONFIG_SERIAL=y
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -883,8 +892,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
CONFIG_CDCACM_EPBULKIN=2
CONFIG_CDCACM_EPBULKIN_FSSIZE=64
CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_BULKIN_REQLEN=96
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
@@ -1027,6 +1036,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -1156,6 +1167,7 @@ CONFIG_FSUTILS_MKSMARTFS=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/mikroe-stm32f4/nsh/defconfig b/configs/mikroe-stm32f4/nsh/defconfig
index b4116fb37d1..ed18e9a0b9c 100644
--- a/configs/mikroe-stm32f4/nsh/defconfig
+++ b/configs/mikroe-stm32f4/nsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -435,13 +441,17 @@ CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
# CONFIG_STM32_TIM13_CAP is not set
# CONFIG_STM32_TIM14_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -744,10 +754,12 @@ CONFIG_RAMMTD_ERASESTATE=0xff
# CONFIG_MTD_AT45DB is not set
CONFIG_MTD_M25P=y
CONFIG_M25P_SPIMODE=0
+CONFIG_M25P_SPIFREQUENCY=20000000
CONFIG_M25P_MANUFACTURER=0x1C
CONFIG_M25P_MEMORY_TYPE=0x31
CONFIG_M25P_SUBSECTOR_ERASE=y
# CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
CONFIG_MTD_SMART=y
# CONFIG_SMART_DEV_LOOP is not set
CONFIG_MTD_SMART_SECTOR_SIZE=512
@@ -760,6 +772,7 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
# CONFIG_MTD_RAMTRON is not set
# CONFIG_MTD_SST25 is not set
# CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
# CONFIG_MTD_SST39FV is not set
# CONFIG_MTD_W25 is not set
# CONFIG_EEPROM is not set
@@ -770,33 +783,28 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
# CONFIG_SERCOMM_CONSOLE is not set
CONFIG_SERIAL=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -954,6 +962,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -1087,6 +1097,7 @@ CONFIG_FSUTILS_MKSMARTFS=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/mikroe-stm32f4/nx/defconfig b/configs/mikroe-stm32f4/nx/defconfig
index bdb7a11c41a..e0bd19efdd3 100644
--- a/configs/mikroe-stm32f4/nx/defconfig
+++ b/configs/mikroe-stm32f4/nx/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -790,6 +796,7 @@ CONFIG_NX_LCDDRIVER=y
CONFIG_NX_NPLANES=1
CONFIG_NX_BGCOLOR=0x0
# CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
#
# Supported Pixel Depths
@@ -936,6 +943,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -1066,6 +1075,7 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/mikroe-stm32f4/nxlines/defconfig b/configs/mikroe-stm32f4/nxlines/defconfig
index f1251731bbb..61f68f82d86 100644
--- a/configs/mikroe-stm32f4/nxlines/defconfig
+++ b/configs/mikroe-stm32f4/nxlines/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -790,6 +796,7 @@ CONFIG_NX_LCDDRIVER=y
CONFIG_NX_NPLANES=1
CONFIG_NX_BGCOLOR=0x0
# CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
#
# Supported Pixel Depths
@@ -935,6 +942,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -1068,6 +1077,7 @@ CONFIG_EXAMPLES_NXLINES_BPP=16
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/mikroe-stm32f4/nxtext/defconfig b/configs/mikroe-stm32f4/nxtext/defconfig
index 7e01d3ae991..06e3ab7ab25 100644
--- a/configs/mikroe-stm32f4/nxtext/defconfig
+++ b/configs/mikroe-stm32f4/nxtext/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -790,6 +796,7 @@ CONFIG_NX_LCDDRIVER=y
CONFIG_NX_NPLANES=1
CONFIG_NX_BGCOLOR=0x0
# CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
#
# Supported Pixel Depths
@@ -935,6 +942,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -1077,6 +1086,7 @@ CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/mikroe-stm32f4/src/Makefile b/configs/mikroe-stm32f4/src/Makefile
index d19eda17f71..3fba8bdc715 100644
--- a/configs/mikroe-stm32f4/src/Makefile
+++ b/configs/mikroe-stm32f4/src/Makefile
@@ -58,10 +58,6 @@ ifeq ($(CONFIG_QENCODER),y)
CSRCS += stm32_qencoder.c
endif
-ifeq ($(CONFIG_WATCHDOG),y)
-CSRCS += stm32_watchdog.c
-endif
-
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
diff --git a/configs/mikroe-stm32f4/src/stm32_appinit.c b/configs/mikroe-stm32f4/src/stm32_appinit.c
index 4ac23362d30..9970d6927be 100644
--- a/configs/mikroe-stm32f4/src/stm32_appinit.c
+++ b/configs/mikroe-stm32f4/src/stm32_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/mikroe_stm32f4/src/stm32_appinit.c
*
- * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -147,10 +147,6 @@
# endif
#endif
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -161,9 +157,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_STM32_SPI3
FAR struct spi_dev_s *spi;
diff --git a/configs/mikroe-stm32f4/src/stm32_watchdog.c b/configs/mikroe-stm32f4/src/stm32_watchdog.c
deleted file mode 100644
index 71cf65061de..00000000000
--- a/configs/mikroe-stm32f4/src/stm32_watchdog.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/************************************************************************************
- * configs/mikroe_stm32f4/src/stm32_watchdog.c
- *
- * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include
-
-#include
-#include
-
-#include
-#include
-
-#include "stm32_wdg.h"
-
-#ifdef CONFIG_WATCHDOG
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-/* Configuration *******************************************************************/
-/* Wathdog hardware should be enabled */
-
-#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG)
-# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined"
-#endif
-
-/* Select the path to the registered watchdog timer device */
-
-#ifndef CONFIG_STM32_WDG_DEVPATH
-# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH
-# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH
-# else
-# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0"
-# endif
-#endif
-
-/* Use the un-calibrated LSI frequency if we have nothing better */
-
-#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ)
-# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY
-#endif
-
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog timer */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_WATCHDOG
-#endif
-
-#ifdef CONFIG_DEBUG_WATCHDOG
-# define wdgdbg dbg
-# define wdglldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define wdgvdbg vdbg
-# define wdgllvdbg llvdbg
-# else
-# define wdgvdbg(x...)
-# define wdgllvdbg(x...)
-# endif
-#else
-# define wdgdbg(x...)
-# define wdglldbg(x...)
-# define wdgvdbg(x...)
-# define wdgllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-/****************************************************************************
- * Name: up_wdginitialize()
- *
- * Description:
- * Perform architecuture-specific initialization of the Watchdog hardware.
- * This interface must be provided by all configurations using
- * apps/examples/watchdog
- *
- ****************************************************************************/
-
-int up_wdginitialize(void)
-{
- /* Initialize tha register the watchdog timer device */
-
-#if defined(CONFIG_STM32_WWDG)
- stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH);
- return OK;
-#elif defined(CONFIG_STM32_IWDG)
- stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ);
- return OK;
-#else
- return -ENODEV;
-#endif
-}
-
-#endif /* CONFIG_WATCHDOG */
diff --git a/configs/mikroe-stm32f4/usbnsh/defconfig b/configs/mikroe-stm32f4/usbnsh/defconfig
index 1549f45fa16..ae0211b6ade 100644
--- a/configs/mikroe-stm32f4/usbnsh/defconfig
+++ b/configs/mikroe-stm32f4/usbnsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -435,13 +441,17 @@ CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
# CONFIG_STM32_TIM13_CAP is not set
# CONFIG_STM32_TIM14_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -752,10 +762,12 @@ CONFIG_RAMMTD_ERASESTATE=0xff
# CONFIG_MTD_AT45DB is not set
CONFIG_MTD_M25P=y
CONFIG_M25P_SPIMODE=0
+CONFIG_M25P_SPIFREQUENCY=20000000
CONFIG_M25P_MANUFACTURER=0x1C
CONFIG_M25P_MEMORY_TYPE=0x31
CONFIG_M25P_SUBSECTOR_ERASE=y
# CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
CONFIG_MTD_SMART=y
# CONFIG_SMART_DEV_LOOP is not set
CONFIG_MTD_SMART_SECTOR_SIZE=512
@@ -768,6 +780,7 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
# CONFIG_MTD_RAMTRON is not set
# CONFIG_MTD_SST25 is not set
# CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
# CONFIG_MTD_SST39FV is not set
# CONFIG_MTD_W25 is not set
# CONFIG_EEPROM is not set
@@ -779,33 +792,28 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
CONFIG_SERIAL=y
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -859,8 +867,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
CONFIG_CDCACM_EPBULKIN=2
CONFIG_CDCACM_EPBULKIN_FSSIZE=64
CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_BULKIN_REQLEN=96
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
@@ -1003,6 +1011,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -1136,6 +1146,7 @@ CONFIG_FSUTILS_MKSMARTFS=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/mirtoo/nsh/defconfig b/configs/mirtoo/nsh/defconfig
index 168cfab8dd8..1925e947cf0 100644
--- a/configs/mirtoo/nsh/defconfig
+++ b/configs/mirtoo/nsh/defconfig
@@ -475,28 +475,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/mirtoo/nxffs/defconfig b/configs/mirtoo/nxffs/defconfig
index ffe67df93d3..876d762db04 100644
--- a/configs/mirtoo/nxffs/defconfig
+++ b/configs/mirtoo/nxffs/defconfig
@@ -506,28 +506,28 @@ CONFIG_SST25_SPIFREQUENCY=20000000
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/mirtoo/src/pic32_appinit.c b/configs/mirtoo/src/pic32_appinit.c
index 459e97b844a..9fad1495bfa 100644
--- a/configs/mirtoo/src/pic32_appinit.c
+++ b/configs/mirtoo/src/pic32_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/mirtoo/src/pic32_appinit.c
*
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -96,9 +96,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef HAVE_SST25
FAR struct spi_dev_s *spi;
diff --git a/configs/moteino-mega/hello/defconfig b/configs/moteino-mega/hello/defconfig
index 66a682dbcc3..92218c71f21 100644
--- a/configs/moteino-mega/hello/defconfig
+++ b/configs/moteino-mega/hello/defconfig
@@ -274,33 +274,32 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-CONFIG_ARCH_HAVE_USART0=y
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+CONFIG_USART0_SERIALDRIVER=y
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
#
-CONFIG_USART0_ISUART=y
CONFIG_MCU_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
# CONFIG_SERIAL_OFLOWCONTROL is not set
diff --git a/configs/moteino-mega/nsh/defconfig b/configs/moteino-mega/nsh/defconfig
index 852f653da5e..3625027ae26 100644
--- a/configs/moteino-mega/nsh/defconfig
+++ b/configs/moteino-mega/nsh/defconfig
@@ -282,33 +282,32 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-CONFIG_ARCH_HAVE_USART0=y
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+CONFIG_USART0_SERIALDRIVER=y
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
#
-CONFIG_USART0_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
diff --git a/configs/moxa/nsh/defconfig b/configs/moxa/nsh/defconfig
index 20cf894fdf5..f4e06794072 100644
--- a/configs/moxa/nsh/defconfig
+++ b/configs/moxa/nsh/defconfig
@@ -426,28 +426,28 @@ CONFIG_16550_SUPRESS_CONFIG=y
CONFIG_16550_REGINCR=1
CONFIG_16550_REGWIDTH=32
CONFIG_16550_ADDRWIDTH=32
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/moxa/src/moxart_appinit.c b/configs/moxa/src/moxart_appinit.c
index f33045ccf56..1b7c8114d63 100644
--- a/configs/moxa/src/moxart_appinit.c
+++ b/configs/moxa/src/moxart_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/moxart/src/moxart_appinit.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Anton D. Kachalov
*
* Redistribution and use in source and binary forms, with or without
@@ -70,9 +70,24 @@
* CONFIG_LIB_BOARDCTL=n :
* Called from board_initialize().
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifndef CONFIG_BOARD_INITIALIZE
#ifdef CONFIG_NET_FTMAC100
diff --git a/configs/mx1ads/ostest/defconfig b/configs/mx1ads/ostest/defconfig
index 73b264ce0cf..0740d2a158b 100644
--- a/configs/mx1ads/ostest/defconfig
+++ b/configs/mx1ads/ostest/defconfig
@@ -320,27 +320,27 @@ CONFIG_SPI=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ne64badge/src/m9s12_appinit.c b/configs/ne64badge/src/m9s12_appinit.c
index ba61f1eaf3c..1550f5d519e 100644
--- a/configs/ne64badge/src/m9s12_appinit.c
+++ b/configs/ne64badge/src/m9s12_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/ne64badge/src/m9s12_appinit.c
*
- * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -61,9 +61,24 @@
* Description:
* Perform architecture specific initialization
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
/* Configure SPI-based devices */
diff --git a/configs/ntosd-dm320/nettest/defconfig b/configs/ntosd-dm320/nettest/defconfig
index 2cc06a37a6d..9b287554506 100644
--- a/configs/ntosd-dm320/nettest/defconfig
+++ b/configs/ntosd-dm320/nettest/defconfig
@@ -370,28 +370,28 @@ CONFIG_DM9X_MODE_AUTO=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ntosd-dm320/nsh/defconfig b/configs/ntosd-dm320/nsh/defconfig
index c295c303a2c..5a4b54b2e7f 100644
--- a/configs/ntosd-dm320/nsh/defconfig
+++ b/configs/ntosd-dm320/nsh/defconfig
@@ -389,28 +389,28 @@ CONFIG_DM9X_MODE_AUTO=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ntosd-dm320/poll/defconfig b/configs/ntosd-dm320/poll/defconfig
index cd4a2b6caf4..82d918604f1 100644
--- a/configs/ntosd-dm320/poll/defconfig
+++ b/configs/ntosd-dm320/poll/defconfig
@@ -368,28 +368,28 @@ CONFIG_DM9X_MODE_AUTO=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ntosd-dm320/thttpd/defconfig b/configs/ntosd-dm320/thttpd/defconfig
index beca63893fd..55c20c37906 100644
--- a/configs/ntosd-dm320/thttpd/defconfig
+++ b/configs/ntosd-dm320/thttpd/defconfig
@@ -361,28 +361,28 @@ CONFIG_DM9X_MODE_AUTO=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ntosd-dm320/udp/defconfig b/configs/ntosd-dm320/udp/defconfig
index aaf9d91370c..906bc57eabd 100644
--- a/configs/ntosd-dm320/udp/defconfig
+++ b/configs/ntosd-dm320/udp/defconfig
@@ -341,27 +341,27 @@ CONFIG_DM9X_MODE_AUTO=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/ntosd-dm320/webserver/defconfig b/configs/ntosd-dm320/webserver/defconfig
index 1ddee5d5599..7173e675610 100644
--- a/configs/ntosd-dm320/webserver/defconfig
+++ b/configs/ntosd-dm320/webserver/defconfig
@@ -375,28 +375,28 @@ CONFIG_DM9X_MODE_AUTO=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/nucleo-144/README.txt b/configs/nucleo-144/README.txt
index b826f78680e..e99cd427de3 100644
--- a/configs/nucleo-144/README.txt
+++ b/configs/nucleo-144/README.txt
@@ -1,24 +1,77 @@
README
======
-This README discusses issues unique to NuttX configurations for the ST
-Nucleo F746ZG board from ST Micro. See
+This README discusses issues unique to NuttX configurations for the STMicro
+Nucleo-144 board. See
-http://www.st.com/web/catalog/tools/FM116/CL1620/SC959/SS1532/LN1847/PF261636
+http://www.st.com/content/ccc/resource/technical/document/data_brief/group0/7b/df/1d/e9/64/55/43/8d/DM00247910/files/DM00247910.pdf/jcr:content/translations/en.DM00247910.pdf
-The Nucleo F746ZG order part number is NUCLEO-F746ZG. It is clumped together
-under the STM32 Nucleo-144 board family. This does provide uniformity in the
-documentation from ST and should allow us to quickly change configurations
-but just cloning this configuration and changing the CPU choice and board
-init. Unfortunately for the developer, the CPU specific information must be
-extracted from the common information in the documentation.
+Contents
+========
+
+ - Nucleo-144 Boards
+ - Nucleo F746ZG
+ - Development Environment
+ - IDEs
+ - Basic configuaration & build steps
+ - Hardware
+ - Button
+ - LED
+ - U[S]ARTs and Serial Consoles
+ - Configurations
+
+Nucleo-144 Boards:
+=================
+
+The Nucleo-144 is a standard board for use with several STM32 parts in the
+LQFP144 package. Variants include
+
+ STM32 Part Board Variant Name
+ ------------- ------------------
+ STM32F207ZGT6 NUCLEO-F207ZG
+ STM32F303ZET6 NUCLEO-F303ZE
+ STM32F429ZIT6 NUCLEO-F429ZI
+ STM32F446ZET6 NUCLEO-F446ZE
+ STM32F746ZGT6 NUCLEO-F746ZG
+ STM32F767ZIT6 NUCLEO-F767ZI
+ ------------- ------------------
+
+This directory is intended to support all Nucleo-144 variants since the
+boards are identical, differing only in the installed part. This common
+board design provides uniformity in the documentation from ST and should
+allow us to quickly change configurations by just cloning a configuration
+and changing the CPU choice and board initialization. Unfortunately for
+the developer, the CPU specific information must be extracted from the
+common information in the documentation.
Please read the User Manaul UM1727: Getting started with STM32 Nucleo board
software development tools and take note of the Powering options for the
board (6.3 Power supply and power selection) and the Solder bridges based
hardware configuration changes that are configurable (6.11 Solder bridges).
-NUCLEO-F746ZG:
+Common Board Features:
+---------------------
+
+ Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software
+ control
+ Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to
+ provide a ST-Link for programming, debug similar to the
+ OpenOcd FTDI function - USB to JTAG front-end.
+
+ Expansion I/F: ST Zio and Extended Ardino and Morpho Headers
+
+Nucleo F746ZG
+=============
+
+At present only the ST Nucleo F746ZG board from ST Micro is supported. See
+
+http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f746zg.html
+
+The Nucleo F746ZG order part number is NUCLEO-F746ZG. It is one member of
+the STM32 Nucleo-144 board family.
+
+NUCLEO-F746ZG Features:
+----------------------
Microprocessor: STM32F746ZGT6 Core: ARM 32-bit Cortex®-M7 CPU with FPU,
L1-cache: 4KB data cache and 4KB instruction cache, up to
@@ -40,41 +93,20 @@ NUCLEO-F746ZG:
clock
QSPI: Dual mode Quad-SPI
SAIs: 2 Serial Audio Interfaces
- CAN: 2 X CAN interface
+ CAN: 2 X CAN interface
SDMMC interface
SPDIFRX interface
USB: USB 2.0 full-speed device/host/OTG controller with on-chip
PHY
10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware,
- MII/RMII
+ MII/RMII
Camera Interface: 8/14 Bit
CRC calculation unit
TRG: True random number generator
RTC
-Board features:
-
- Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software
- control
- Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to
- provide a ST-Link for programming, debug similar to the
- OpenOcd FTDI function - USB to JTAG front-end.
-
- Expansion I/F ST Zio an Extended Ardino and Morpho Headers
-
-See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG form additional information about this board.
-
-Contents
-========
-
- - Development Environment
- - IDEs
- - Basic configuaration & build steps
- - Hardware
- - Button
- - LED
- - U[S]ARTs and Serial Consoles
- - Configurations
+See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG form additional
+information about this board.
Development Environment
=======================
@@ -89,7 +121,6 @@ Development Environment
If you change the default toolchain, then you may also have to modify the PATH in
the setenv.h file if your make cannot find the tools.
-
IDEs
====
@@ -104,7 +135,6 @@ IDEs
makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
there is a lot of help on the internet).
-
Basic configuration & build steps
==================================
@@ -112,9 +142,9 @@ Basic configuration & build steps
be modified to point to the correct path to the Cortex-M7 GCC toolchain (if
different from the default in your PATH variable).
- - Configures nuttx creating .config file in the nuttx directory
+ - Configures nuttx creating .config file in the nuttx directory.
$ cd tools && ./configure.sh nucleo-f746zg/nsh && cd ..
- - Refreshes the .config file with the latest features addes sice this writting
+ - Refreshes the .config file with the latest available configurations.
$ make oldconfig
- Select the features you want in the build.
$ make menuconfig
@@ -125,7 +155,7 @@ Hardware
========
GPIO - there are 144 I/O lines on the STM32F746ZGT6 with various pins pined out
- on the Nucleo F746ZG
+ on the Nucleo F746ZG.
See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic
pinouts.
@@ -146,7 +176,6 @@ Hardware
In that Case, You will need to edit the include/board.h to select different
U[S]ART and / or pin selections.
-
Serial
------
@@ -231,7 +260,7 @@ Serial Consoles
Use make menuconfig to configure USART8 as the console:
CONFIG_STM32F7_UART8=y
- CONFIG_USART8_ISUART=y
+ CONFIG_USART8_SERIALDRIVER=y
CONFIG_USART8_SERIAL_CONSOLE=y
CONFIG_UART8_RXBUFSIZE=256
CONFIG_UART8_TXBUFSIZE=256
@@ -261,46 +290,83 @@ Serial Consoles
As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the
virtual COM port is enabled.
-
Configurations
==============
- nsh:
- ---------
- Configures the NuttShell (nsh) located at apps/examples/nsh for the
- Nucleo-144 boards. The Configuration enables the serial interfaces
- on UART8. Support for builtin applications is enabled, but in the base
- configuration no builtin applications are selected (see NOTES below).
+nsh:
+----
+ Configures the NuttShell (nsh) located at apps/examples/nsh for the
+ Nucleo-144 boards. The Configuration enables the serial interfaces
+ on UART6. Support for builtin applications is enabled, but in the base
+ configuration no builtin applications are selected (see NOTES below).
- NOTES:
+ NOTES:
- 1. This configuration uses the mconf-based configuration tool. To
- change this configuration using that tool, you should:
+ 1. This configuration uses the mconf-based configuration tool. To
+ change this configuration using that tool, you should:
- a. Build and install the kconfig-mconf tool. See nuttx/README.txt
- see additional README.txt files in the NuttX tools repository.
+ a. Build and install the kconfig-mconf tool. See nuttx/README.txt
+ see additional README.txt files in the NuttX tools repository.
- b. If this is the intall configuration then Execute
- 'cd tools && ./configure.sh stm32f746g-disco/nsh && cd ..'
- in nuttx/ in order to start configuration process.
- Caution: Doing this step more than once will overwrite .config with
- the contents of the stm32f746g-disco/nsh/defconfig file.
+ b. If this is the intall configuration then Execute
+ 'cd tools && ./configure.sh nucleo-144/nsh && cd ..'
+ in nuttx/ in order to start configuration process.
+ Caution: Doing this step more than once will overwrite .config with
+ the contents of the nucleo-144/nsh/defconfig file.
- c. Execute 'make oldconfig' in nuttx/ in order to refresh the
- configuration.
+ c. Execute 'make oldconfig' in nuttx/ in order to refresh the
+ configuration.
- d. Execute 'make menuconfig' in nuttx/ in order to start the
- reconfiguration process.
+ d. Execute 'make menuconfig' in nuttx/ in order to start the
+ reconfiguration process.
- e. Save the .config file to reuse it in the future starting at step d.
+ e. Save the .config file to reuse it in the future starting at step d.
- 2. By default, this configuration uses the ARM GNU toolchain
- for Linux. That can easily be reconfigured, of course.
+ 2. By default, this configuration uses the ARM GNU toolchain
+ for Linux. That can easily be reconfigured, of course.
- CONFIG_HOST_LINUX=y : Builds under Linux
- CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : ARM GNU for Linux
+ CONFIG_HOST_LINUX=y : Builds under Linux
+ CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : ARM GNU for Linux
- 3. Although the default console is USART3 (which would correspond to
- the Virtual COM port) I have done all testing with the console
- device configured for UART8 (see instruction above under "Serial
- Consoles).
+ 3. Although the default console is USART3 (which would correspond to
+ the Virtual COM port) I have done all testing with the console
+ device configured for UART8 (see instruction above under "Serial
+ Consoles).
+
+evalos:
+-------
+ This configuration is designed to test the features of the board.
+ - Configures the NuttShell (nsh) located at apps/examples/nsh for the
+ Nucleo-144 boards. The console is available on serial interface USART3,
+ which is accessible over the USB ST-Link interface.
+ - Configures nsh with advanced features such as autocompletion.
+ - Configures the on-board LEDs to work with the 'leds' example app.
+ - Configures the 'helloxx' example app.
+
+ NOTES:
+
+ 1. This configuration uses the mconf-based configuration tool. To
+ change this configuration using that tool, you should:
+
+ a. Build and install the kconfig-mconf tool. See nuttx/README.txt
+ see additional README.txt files in the NuttX tools repository.
+
+ b. If this is the intall configuration then Execute
+ 'cd tools && ./configure.sh nucleo-144/evalos && cd ..'
+ in nuttx/ in order to start configuration process.
+ Caution: Doing this step more than once will overwrite .config with
+ the contents of the nucleo-144/evalos/defconfig file.
+
+ c. Execute 'make oldconfig' in nuttx/ in order to refresh the
+ configuration.
+
+ d. Execute 'make menuconfig' in nuttx/ in order to start the
+ reconfiguration process.
+
+ e. Save the .config file to reuse it in the future starting at step d.
+
+ 2. By default, this configuration uses the ARM GNU toolchain
+ for Linux. That can easily be reconfigured, of course.
+
+ CONFIG_HOST_LINUX=y : Builds under Linux
+ CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : ARM GNU for Linux
diff --git a/configs/nucleo-144/evalos/Make.defs b/configs/nucleo-144/evalos/Make.defs
new file mode 100644
index 00000000000..210c5ff0743
--- /dev/null
+++ b/configs/nucleo-144/evalos/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/nucleo-144/evalos/Make.defs
+#
+# Copyright (C) 2016 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt
+# Author: Mark Olsson
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = flash.ld
+
+ifeq ($(WINTOOL),y)
+ # Windows-native toolchains
+ DIRLINK = $(TOPDIR)/tools/copydir.sh
+ DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+ MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+ ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+ ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+ ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+ # Linux/Cygwin-native toolchain
+ MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+ ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+ ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+ ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+ ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+ LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/nucleo-144/evalos/defconfig b/configs/nucleo-144/evalos/defconfig
new file mode 100644
index 00000000000..9944952cac6
--- /dev/null
+++ b/configs/nucleo-144/evalos/defconfig
@@ -0,0 +1,933 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+# CONFIG_DEBUG is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_CUSTOMOPT is not set
+# CONFIG_DEBUG_FULLOPT is not set
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RGMP is not set
+# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_CALYPSO is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+CONFIG_ARCH_CHIP_STM32F7=y
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM4 is not set
+CONFIG_ARCH_CORTEXM7=y
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32f7"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+CONFIG_ARCH_HAVE_DPFPU=y
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+CONFIG_ARMV7M_HAVE_ICACHE=y
+CONFIG_ARMV7M_HAVE_DCACHE=y
+CONFIG_ARMV7M_ICACHE=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
+CONFIG_ARMV7M_HAVE_ITCM=y
+CONFIG_ARMV7M_HAVE_DTCM=y
+# CONFIG_ARMV7M_ITCM is not set
+CONFIG_ARMV7M_DTCM=y
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_USART3_RS485 is not set
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+
+#
+# STM32 F7 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32F745 is not set
+CONFIG_ARCH_CHIP_STM32F746=y
+# CONFIG_ARCH_CHIP_STM32F756 is not set
+CONFIG_STM32F7_STM32F74XX=y
+# CONFIG_STM32F7_STM32F75XX is not set
+# CONFIG_STM32F7_FLASH_512KB is not set
+CONFIG_STM32F7_FLASH_1024KB=y
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32F7_HAVE_LTDC=y
+# CONFIG_STM32F7_ADC is not set
+# CONFIG_STM32F7_CAN is not set
+# CONFIG_STM32F7_DAC is not set
+# CONFIG_STM32F7_DMA is not set
+# CONFIG_STM32F7_I2C is not set
+# CONFIG_STM32F7_SAI is not set
+# CONFIG_STM32F7_SPI is not set
+CONFIG_STM32F7_USART=y
+# CONFIG_STM32F7_ADC1 is not set
+# CONFIG_STM32F7_ADC2 is not set
+# CONFIG_STM32F7_ADC3 is not set
+# CONFIG_STM32F7_BKPSRAM is not set
+# CONFIG_STM32F7_CAN1 is not set
+# CONFIG_STM32F7_CAN2 is not set
+# CONFIG_STM32F7_CEC is not set
+# CONFIG_STM32F7_CRC is not set
+# CONFIG_STM32F7_CRYP is not set
+# CONFIG_STM32F7_DMA1 is not set
+# CONFIG_STM32F7_DMA2 is not set
+# CONFIG_STM32F7_DAC1 is not set
+# CONFIG_STM32F7_DAC2 is not set
+# CONFIG_STM32F7_DCMI is not set
+# CONFIG_STM32F7_ETHMAC is not set
+# CONFIG_STM32F7_FSMC is not set
+# CONFIG_STM32F7_I2C1 is not set
+# CONFIG_STM32F7_I2C2 is not set
+# CONFIG_STM32F7_I2C3 is not set
+# CONFIG_STM32F7_LPTIM1 is not set
+# CONFIG_STM32F7_LTDC is not set
+# CONFIG_STM32F7_DMA2D is not set
+# CONFIG_STM32F7_OTGFS is not set
+# CONFIG_STM32F7_OTGHS is not set
+# CONFIG_STM32F7_QUADSPI is not set
+# CONFIG_STM32F7_SAI1 is not set
+# CONFIG_STM32F7_RNG is not set
+# CONFIG_STM32F7_SAI2 is not set
+# CONFIG_STM32F7_SDMMC1 is not set
+# CONFIG_STM32F7_SPDIFRX is not set
+# CONFIG_STM32F7_SPI1 is not set
+# CONFIG_STM32F7_SPI2 is not set
+# CONFIG_STM32F7_SPI3 is not set
+# CONFIG_STM32F7_SPI4 is not set
+# CONFIG_STM32F7_SPI5 is not set
+# CONFIG_STM32F7_SPI6 is not set
+# CONFIG_STM32F7_TIM1 is not set
+# CONFIG_STM32F7_TIM2 is not set
+# CONFIG_STM32F7_TIM3 is not set
+# CONFIG_STM32F7_TIM4 is not set
+# CONFIG_STM32F7_TIM5 is not set
+# CONFIG_STM32F7_TIM6 is not set
+# CONFIG_STM32F7_TIM7 is not set
+# CONFIG_STM32F7_TIM8 is not set
+# CONFIG_STM32F7_TIM9 is not set
+# CONFIG_STM32F7_TIM10 is not set
+# CONFIG_STM32F7_TIM11 is not set
+# CONFIG_STM32F7_TIM12 is not set
+# CONFIG_STM32F7_TIM13 is not set
+# CONFIG_STM32F7_TIM14 is not set
+# CONFIG_STM32F7_TIM15 is not set
+# CONFIG_STM32F7_USART1 is not set
+# CONFIG_STM32F7_USART2 is not set
+CONFIG_STM32F7_USART3=y
+# CONFIG_STM32F7_UART4 is not set
+# CONFIG_STM32F7_UART5 is not set
+# CONFIG_STM32F7_USART6 is not set
+# CONFIG_STM32F7_UART7 is not set
+# CONFIG_STM32F7_UART8 is not set
+# CONFIG_STM32F7_IWDG is not set
+# CONFIG_STM32F7_WWDG is not set
+
+#
+# U[S]ART Configuration
+#
+# CONFIG_STM32F7_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32F7_USART_BREAKS is not set
+# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=43103
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20010000
+CONFIG_RAM_SIZE=245760
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_NUCLEO_144=y
+# CONFIG_ARCH_BOARD_STM32F746G_DISCO is not set
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="nucleo-144"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+# CONFIG_ARCH_LEDS is not set
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Board-Specific Options
+#
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_ADCTEST is not set
+# CONFIG_BOARDCTL_PWMTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+# CONFIG_LCD is not set
+
+#
+# LED Support
+#
+CONFIG_USERLED=y
+CONFIG_USERLED_LOWER=y
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+# CONFIG_SERCOMM_CONSOLE is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+CONFIG_USART3_SERIALDRIVER=y
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+
+#
+# USART Configuration
+#
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART3_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART3 Configuration
+#
+CONFIG_USART3_RXBUFSIZE=256
+CONFIG_USART3_TXBUFSIZE=256
+CONFIG_USART3_BAUD=115200
+CONFIG_USART3_BITS=8
+CONFIG_USART3_PARITY=0
+CONFIG_USART3_2STOP=0
+# CONFIG_USART3_IFLOWCONTROL is not set
+# CONFIG_USART3_OFLOWCONTROL is not set
+# CONFIG_USART3_DMA is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+
+#
+# System Logging Device Options
+#
+
+#
+# System Logging
+#
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_CONSOLE is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# System Logging
+#
+# CONFIG_SYSLOG is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+CONFIG_EXAMPLES_HELLOXX=y
+CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_IGMP is not set
+CONFIG_EXAMPLES_LEDS=y
+CONFIG_EXAMPLES_LEDS_PRIORITY=100
+CONFIG_EXAMPLES_LEDS_STACKSIZE=2048
+CONFIG_EXAMPLES_LEDS_DEVPATH="/dev/userleds"
+CONFIG_EXAMPLES_LEDS_LEDSET=0x0f
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_READLINE_MAX_BUILTINS=64
+CONFIG_READLINE_MAX_EXTCMDS=64
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LINELEN=80
+CONFIG_READLINE_CMD_HISTORY_LEN=16
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-144/evalos/setenv.sh b/configs/nucleo-144/evalos/setenv.sh
new file mode 100644
index 00000000000..0f767948bf4
--- /dev/null
+++ b/configs/nucleo-144/evalos/setenv.sh
@@ -0,0 +1,78 @@
+#!/bin/bash
+# configs/nucleo-144/evalos/setenv.sh
+#
+# Copyright (C) 2016 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt
+# Author: Mark Olsson
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+ echo "You must source this script, not run it!" 1>&2
+ exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+ echo "This script must be executed from the top-level NuttX build directory"
+ exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+ export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Atmel GCC
+# toolchain under Windows. You will also have to edit this if you install
+# this toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows. You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/nucleo-144/include/board.h b/configs/nucleo-144/include/board.h
index 0e9020c0de8..63eb5df084e 100644
--- a/configs/nucleo-144/include/board.h
+++ b/configs/nucleo-144/include/board.h
@@ -3,6 +3,7 @@
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
+ * Author: Mark Olsson
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -46,10 +47,12 @@
# include
#endif
+#ifdef __KERNEL__
#include "stm32_rcc.h"
#ifdef CONFIG_STM32F7_SDMMC1
# include "stm32_sdmmc.h"
#endif
+#endif
/************************************************************************************
* Pre-processor Definitions
@@ -226,13 +229,19 @@
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
-#define BOARD_NLEDS 1
+#define BOARD_LED2 1
+#define BOARD_LED3 2
+#define BOARD_NLEDS 3
#define BOARD_LD1 BOARD_LED1
+#define BOARD_LD2 BOARD_LED2
+#define BOARD_LD3 BOARD_LED3
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
+#define BOARD_LED2_BIT (1 << BOARD_LED2)
+#define BOARD_LED3_BIT (1 << BOARD_LED3)
/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
* include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
@@ -288,8 +297,11 @@
* -- ----- --------- -----
*/
-#define GPIO_USART6_RX GPIO_USART6_RX_1
-#define GPIO_USART6_TX GPIO_USART6_TX_1
+ #define GPIO_USART6_RX GPIO_USART6_RX_1
+ #define GPIO_USART6_TX GPIO_USART6_TX_1
+
+ #define GPIO_USART3_RX GPIO_USART3_RX_3
+ #define GPIO_USART3_TX GPIO_USART3_TX_3
/* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins:
*
diff --git a/configs/nucleo-144/nsh/defconfig b/configs/nucleo-144/nsh/defconfig
index f7fe7e2ebb7..cb59abca25c 100644
--- a/configs/nucleo-144/nsh/defconfig
+++ b/configs/nucleo-144/nsh/defconfig
@@ -484,33 +484,32 @@ CONFIG_SPI_EXCHANGE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-CONFIG_ARCH_HAVE_USART6=y
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+CONFIG_USART6_SERIALDRIVER=y
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
#
-CONFIG_USART6_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
diff --git a/configs/nucleo-144/src/nucleo-144.h b/configs/nucleo-144/src/nucleo-144.h
index 7628bd120be..a5766c4497c 100644
--- a/configs/nucleo-144/src/nucleo-144.h
+++ b/configs/nucleo-144/src/nucleo-144.h
@@ -2,7 +2,8 @@
* configs/nucleo-144/src/nucleo-144.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Authors: Gregory Nutt
+ * Author: Gregory Nutt
+ * Author: Mark Olsson
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -67,13 +68,19 @@
*/
#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
- GPIO_PORTI | GPIO_PIN1)
+ GPIO_PORTB | GPIO_PIN0)
+#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+ GPIO_PORTB | GPIO_PIN7)
+#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+ GPIO_PORTB | GPIO_PIN14)
-/* Pushbutton B1, labelled "User", is connected to GPIO PI11. A high value will be sensed when the
+#define LED_DRIVER_PATH "/dev/userleds"
+
+/* Pushbutton B1, labelled "User", is connected to GPIO PC13. A high value will be sensed when the
* button is depressed. Note that the EXTI interrupt is configured.
*/
-#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTI | GPIO_PIN11)
+#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
/****************************************************************************************************
* Public data
@@ -97,4 +104,3 @@ void weak_function stm32_spidev_initialize(void);
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H */
-
diff --git a/configs/nucleo-144/src/stm32_appinitialize.c b/configs/nucleo-144/src/stm32_appinitialize.c
index 6c80705c3a3..e1b318684c8 100644
--- a/configs/nucleo-144/src/stm32_appinitialize.c
+++ b/configs/nucleo-144/src/stm32_appinitialize.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
+ * Author: Mark Olsson
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -38,13 +39,10 @@
****************************************************************************/
#include
+#include
-#include "stm32_ccm.h"
#include "nucleo-144.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
+#include
/****************************************************************************
* Public Functions
@@ -58,28 +56,34 @@
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
-#ifdef CONFIG_FS_PROCFS
+#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
int ret;
-#ifdef CONFIG_STM32_CCM_PROCFS
- /* Register the CCM procfs entry. This must be done before the procfs is
- * mounted.
- */
+ /* Register the LED driver */
- (void)ccm_procfs_register();
-#endif
-
- /* Mount the procfs file system */
-
- ret = mount(NULL, SAMV71_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
+ ret = userled_lower_initialize(LED_DRIVER_PATH);
if (ret < 0)
{
- SYSLOG("ERROR: Failed to mount procfs at %s: %d\n",
- SAMV71_PROCFS_MOUNTPOINT, ret);
+ syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
}
#endif
diff --git a/configs/nucleo-144/src/stm32_autoleds.c b/configs/nucleo-144/src/stm32_autoleds.c
index 0e7a19d6ad0..e9114391aff 100644
--- a/configs/nucleo-144/src/stm32_autoleds.c
+++ b/configs/nucleo-144/src/stm32_autoleds.c
@@ -90,20 +90,20 @@ void board_autoled_on(int led)
switch (led)
{
- case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */
- /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
- /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */
- break; /* Leave ledstate == true to turn OFF */
+ case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */
+ /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
+ /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */
+ break; /* Leave ledstate == true to turn OFF */
default:
- case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */
- /* LED_SIGNAL: In a signal handler STATUS LED=N/C */
- /* LED_ASSERTION: An assertion failed STATUS LED=N/C */
- return; /* Return to leave STATUS LED unchanged */
+ case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */
+ /* LED_SIGNAL: In a signal handler STATUS LED=N/C */
+ /* LED_ASSERTION: An assertion failed STATUS LED=N/C */
+ return; /* Return to leave STATUS LED unchanged */
- case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */
- case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */
- ledstate = true; /* Set ledstate == false to turn ON */
+ case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */
+ case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */
+ ledstate = true; /* Set ledstate == false to turn ON */
break;
}
@@ -121,21 +121,21 @@ void board_autoled_off(int led)
/* These should not happen and are ignored */
default:
- case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */
- /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
- /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */
- case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */
+ case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */
+ /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
+ /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */
+ case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */
/* These result in no-change */
- case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */
- /* LED_SIGNAL: In a signal handler STATUS LED=N/C */
- /* LED_ASSERTION: An assertion failed STATUS LED=N/C */
- return; /* Return to leave STATUS LED unchanged */
+ case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */
+ /* LED_SIGNAL: In a signal handler STATUS LED=N/C */
+ /* LED_ASSERTION: An assertion failed STATUS LED=N/C */
+ return; /* Return to leave STATUS LED unchanged */
/* Turn STATUS LED off set driving the output high */
- case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */
+ case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */
stm32_gpiowrite(GPIO_LD1, false);
break;
}
diff --git a/configs/nucleo-144/src/stm32_boot.c b/configs/nucleo-144/src/stm32_boot.c
index 6024e76b226..210c0982a3d 100644
--- a/configs/nucleo-144/src/stm32_boot.c
+++ b/configs/nucleo-144/src/stm32_boot.c
@@ -47,14 +47,6 @@
#include "up_arch.h"
#include "nucleo-144.h"
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -113,7 +105,7 @@ void board_initialize(void)
* but the initialization function must run in kernel space.
*/
- (void)board_app_initialize();
+ (void)board_app_initialize(0);
#endif
}
#endif
diff --git a/configs/nucleo-144/src/stm32_buttons.c b/configs/nucleo-144/src/stm32_buttons.c
index 0421caeec7e..54a7dafbfba 100644
--- a/configs/nucleo-144/src/stm32_buttons.c
+++ b/configs/nucleo-144/src/stm32_buttons.c
@@ -47,10 +47,6 @@
#ifdef CONFIG_ARCH_BUTTONS
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/configs/nucleo-144/src/stm32_spi.c b/configs/nucleo-144/src/stm32_spi.c
index d3b5e9160e5..e31a63a11de 100644
--- a/configs/nucleo-144/src/stm32_spi.c
+++ b/configs/nucleo-144/src/stm32_spi.c
@@ -74,14 +74,6 @@
# define spivdbg(x...)
#endif
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
diff --git a/configs/nucleo-144/src/stm32_userleds.c b/configs/nucleo-144/src/stm32_userleds.c
index 19146d241de..4ec9f209479 100644
--- a/configs/nucleo-144/src/stm32_userleds.c
+++ b/configs/nucleo-144/src/stm32_userleds.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
+ * Author: Mark Olsson
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -42,6 +43,8 @@
#include
#include
+#include
+
#include "stm32_gpio.h"
#include "nucleo-144.h"
@@ -63,6 +66,17 @@
# define ledvdbg(x...)
#endif
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* This array maps an LED number to GPIO pin configuration */
+
+static const uint32_t g_ledcfg[3] =
+{
+ GPIO_LD1, GPIO_LD2, GPIO_LD3
+};
+
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -80,7 +94,14 @@
void board_userled_initialize(void)
{
- stm32_configgpio(GPIO_LD1);
+ int i;
+
+ /* Configure LED1-3 GPIOs for output */
+
+ for (i = 0; i < 3; i++)
+ {
+ stm32_configgpio(g_ledcfg[i]);
+ }
}
/****************************************************************************
@@ -95,10 +116,10 @@ void board_userled_initialize(void)
void board_userled(int led, bool ledon)
{
- if (led == BOARD_STATUS_LED)
- {
- stm32_gpiowrite(GPIO_LD1, !ledon);
- }
+ if ((unsigned)led < 3)
+ {
+ stm32_gpiowrite(g_ledcfg[led], ledon);
+ }
}
/****************************************************************************
@@ -114,7 +135,14 @@ void board_userled(int led, bool ledon)
void board_userled_all(uint8_t ledset)
{
- stm32_gpiowrite(GPIO_LD1, (ledset & BOARD_STATUS_LED_BIT) != 0);
+ int i;
+
+ /* Configure LED1-3 GPIOs for output */
+
+ for (i = 0; i < 3; i++)
+ {
+ stm32_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) != 0);
+ }
}
#endif /* !CONFIG_ARCH_LEDS */
diff --git a/configs/nucleo-f303re/adc/defconfig b/configs/nucleo-f303re/adc/defconfig
index 5932a9fe6fb..4a26a328f99 100644
--- a/configs/nucleo-f303re/adc/defconfig
+++ b/configs/nucleo-f303re/adc/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -805,6 +811,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -918,6 +926,7 @@ CONFIG_EXAMPLES_ADC_SWTRIG=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/nucleo-f303re/can/defconfig b/configs/nucleo-f303re/can/defconfig
index df3f7c0a933..3fe7a7e6ffd 100644
--- a/configs/nucleo-f303re/can/defconfig
+++ b/configs/nucleo-f303re/can/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -243,6 +248,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -807,6 +813,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -920,6 +928,7 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/nucleo-f303re/nxlines/defconfig b/configs/nucleo-f303re/nxlines/defconfig
index ddcbc7c5d3c..6ea676faa0e 100644
--- a/configs/nucleo-f303re/nxlines/defconfig
+++ b/configs/nucleo-f303re/nxlines/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -240,6 +245,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -821,6 +827,7 @@ CONFIG_NX_LCDDRIVER=y
CONFIG_NX_NPLANES=1
CONFIG_NX_BGCOLOR=0x0
# CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
#
# Supported Pixel Depths
@@ -963,6 +970,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -989,6 +998,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
# Examples
#
# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CAN is not set
# CONFIG_EXAMPLES_CHAT is not set
# CONFIG_EXAMPLES_CONFIGDATA is not set
# CONFIG_EXAMPLES_CPUHOG is not set
@@ -1079,6 +1089,7 @@ CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/nucleo-f303re/pwm/defconfig b/configs/nucleo-f303re/pwm/defconfig
index af0ecd9cbc9..08973aff2a7 100644
--- a/configs/nucleo-f303re/pwm/defconfig
+++ b/configs/nucleo-f303re/pwm/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -812,6 +818,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -933,6 +941,7 @@ CONFIG_EXAMPLES_PWM_CHANNEL2=2
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/nucleo-f303re/serialrx/defconfig b/configs/nucleo-f303re/serialrx/defconfig
index 4748e044c44..2203ccbe87e 100644
--- a/configs/nucleo-f303re/serialrx/defconfig
+++ b/configs/nucleo-f303re/serialrx/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -239,6 +244,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -413,13 +419,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
# CONFIG_STM32_TIM4_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_UART4_SERIALDRIVER=y
+# CONFIG_STM32_UART4_1WIREDRIVER is not set
# CONFIG_UART4_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
# CONFIG_STM32_HAVE_RTC_COUNTER is not set
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -690,32 +700,28 @@ CONFIG_ADC_FIFOSIZE=8
# CONFIG_SERCOMM_CONSOLE is not set
CONFIG_SERIAL=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-CONFIG_ARCH_HAVE_UART4=y
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+CONFIG_UART4_SERIALDRIVER=y
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -857,6 +863,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -974,6 +982,7 @@ CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/nucleo-f303re/src/stm32_appinitialize.c b/configs/nucleo-f303re/src/stm32_appinitialize.c
index dce4fd50909..d79c7d50412 100644
--- a/configs/nucleo-f303re/src/stm32_appinitialize.c
+++ b/configs/nucleo-f303re/src/stm32_appinitialize.c
@@ -1,7 +1,7 @@
/****************************************************************************
* configs/nucleo-f303re/src/stm32_appinitialize.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
* Authors: Gregory Nutt
* Paul Alexander Patience
@@ -61,9 +61,24 @@
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return OK;
}
diff --git a/configs/nucleo-f303re/src/stm32_boot.c b/configs/nucleo-f303re/src/stm32_boot.c
index 783a231f7c3..6410d202d00 100644
--- a/configs/nucleo-f303re/src/stm32_boot.c
+++ b/configs/nucleo-f303re/src/stm32_boot.c
@@ -86,7 +86,7 @@ void stm32_boardinitialize(void)
}
#endif
-#ifdef CONFIG_CANUTILS_UAVCAN
+#ifdef CONFIG_CANUTILS_LIBUAVCAN
(void)stm32_configgpio(GPIO_CAN1_RX);
(void)stm32_configgpio(GPIO_CAN1_TX);
#endif
diff --git a/configs/nucleo-f303re/uavcan/defconfig b/configs/nucleo-f303re/uavcan/defconfig
index 6fe165d4615..c68b048740a 100644
--- a/configs/nucleo-f303re/uavcan/defconfig
+++ b/configs/nucleo-f303re/uavcan/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -784,6 +790,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -812,36 +820,36 @@ CONFIG_HAVE_CXXINITIALIZE=y
#
# CAN Utilities
#
-CONFIG_CANUTILS_UAVCAN=y
-CONFIG_UAVCAN_LIBUAVCAN_URL="https://github.com/UAVCAN/libuavcan/archive"
-CONFIG_UAVCAN_LIBUAVCAN_VERSION="b04396ace50155573e545ed9bf2fb09964ee2367"
-CONFIG_UAVCAN_DSDL_URL="https://github.com/UAVCAN/dsdl/archive"
-CONFIG_UAVCAN_DSDL_VERSION="9804a3e6972825586be252ce08dd899f44994b14"
-CONFIG_UAVCAN_PYUAVCAN_URL="https://github.com/UAVCAN/pyuavcan/archive"
-CONFIG_UAVCAN_PYUAVCAN_VERSION="c58477a644d20ccf95a20c151f3a0402f271c3b8"
-CONFIG_UAVCAN_STM32_NUM_IFACES=1
-CONFIG_UAVCAN_STM32_TIM2=y
-# CONFIG_UAVCAN_STM32_TIM3 is not set
-# CONFIG_UAVCAN_STM32_TIM4 is not set
-# CONFIG_UAVCAN_STM32_TIM6 is not set
-# CONFIG_UAVCAN_STM32_TIM7 is not set
-CONFIG_UAVCAN_CPP03=y
-# CONFIG_UAVCAN_CPP11 is not set
-# CONFIG_UAVCAN_DEBUG is not set
-# CONFIG_UAVCAN_EXCEPTIONS is not set
-# CONFIG_UAVCAN_TINY is not set
-# CONFIG_UAVCAN_NO_GLOBAL_DATA_TYPE_REGISTRY is not set
-# CONFIG_UAVCAN_IMPLEMENT_PLACEMENT_NEW is not set
-# CONFIG_UAVCAN_USE_EXTERNAL_SNPRINTF is not set
-# CONFIG_UAVCAN_USE_EXTERNAL_FLOAT16_CONVERSION is not set
-# CONFIG_UAVCAN_NO_ASSERTIONS is not set
-CONFIG_UAVCAN_MEM_POOL_BLOCK_SIZE=0
-CONFIG_UAVCAN_FLOAT_COMPARISON_EPSILON_MULT=0
-CONFIG_UAVCAN_MAX_CAN_ACCEPTANCE_FILTERS=0
-CONFIG_UAVCAN_MAX_NETWORK_SIZE_HINT=0
-CONFIG_UAVCAN_RX_QUEUE_CAPACITY=0
-CONFIG_UAVCAN_BIT_RATE=0
-CONFIG_UAVCAN_INIT_RETRIES=0
+CONFIG_CANUTILS_LIBUAVCAN=y
+CONFIG_LIBUAVCAN_URL="https://github.com/UAVCAN/libuavcan/archive"
+CONFIG_LIBUAVCAN_VERSION="b04396ace50155573e545ed9bf2fb09964ee2367"
+CONFIG_LIBUAVCAN_DSDL_URL="https://github.com/UAVCAN/dsdl/archive"
+CONFIG_LIBUAVCAN_DSDL_VERSION="9804a3e6972825586be252ce08dd899f44994b14"
+CONFIG_LIBUAVCAN_PYUAVCAN_URL="https://github.com/UAVCAN/pyuavcan/archive"
+CONFIG_LIBUAVCAN_PYUAVCAN_VERSION="c58477a644d20ccf95a20c151f3a0402f271c3b8"
+CONFIG_LIBUAVCAN_STM32_NUM_IFACES=1
+CONFIG_LIBUAVCAN_STM32_TIM2=y
+# CONFIG_LIBUAVCAN_STM32_TIM3 is not set
+# CONFIG_LIBUAVCAN_STM32_TIM4 is not set
+# CONFIG_LIBUAVCAN_STM32_TIM6 is not set
+# CONFIG_LIBUAVCAN_STM32_TIM7 is not set
+CONFIG_LIBUAVCAN_CPP03=y
+# CONFIG_LIBUAVCAN_CPP11 is not set
+# CONFIG_LIBUAVCAN_DEBUG is not set
+# CONFIG_LIBUAVCAN_EXCEPTIONS is not set
+# CONFIG_LIBUAVCAN_TINY is not set
+# CONFIG_LIBUAVCAN_NO_GLOBAL_DATA_TYPE_REGISTRY is not set
+# CONFIG_LIBUAVCAN_IMPLEMENT_PLACEMENT_NEW is not set
+# CONFIG_LIBUAVCAN_USE_EXTERNAL_SNPRINTF is not set
+# CONFIG_LIBUAVCAN_USE_EXTERNAL_FLOAT16_CONVERSION is not set
+# CONFIG_LIBUAVCAN_NO_ASSERTIONS is not set
+CONFIG_LIBUAVCAN_MEM_POOL_BLOCK_SIZE=0
+CONFIG_LIBUAVCAN_FLOAT_COMPARISON_EPSILON_MULT=0
+CONFIG_LIBUAVCAN_MAX_CAN_ACCEPTANCE_FILTERS=0
+CONFIG_LIBUAVCAN_MAX_NETWORK_SIZE_HINT=0
+CONFIG_LIBUAVCAN_RX_QUEUE_CAPACITY=0
+CONFIG_LIBUAVCAN_BIT_RATE=0
+CONFIG_LIBUAVCAN_INIT_RETRIES=0
#
# Examples
@@ -899,7 +907,6 @@ CONFIG_EXAMPLES_UAVCAN_NODE_MEM_POOL_SIZE=4096
CONFIG_EXAMPLES_UAVCAN_NODE_ID=1
CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan"
# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
@@ -936,6 +943,7 @@ CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan"
#
# CONFIG_NETUTILS_CHAT is not set
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/nucleo-f4x1re/README.txt b/configs/nucleo-f4x1re/README.txt
index 066474d69e1..4a84121a400 100644
--- a/configs/nucleo-f4x1re/README.txt
+++ b/configs/nucleo-f4x1re/README.txt
@@ -395,7 +395,7 @@ Serial Consoles
To configure USART1 as the console:
CONFIG_STM32_USART1=y
- CONFIG_USART1_ISUART=y
+ CONFIG_USART1_SERIALDRIVER=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_RXBUFSIZE=256
CONFIG_USART1_TXBUFSIZE=256
@@ -434,7 +434,7 @@ Serial Consoles
To configure USART2 as the console:
CONFIG_STM32_USART2=y
- CONFIG_USART2_ISUART=y
+ CONFIG_USART2_SERIALDRIVER=y
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_RXBUFSIZE=256
CONFIG_USART2_TXBUFSIZE=256
@@ -455,7 +455,7 @@ Serial Consoles
To configure USART6 as the console:
CONFIG_STM32_USART6=y
- CONFIG_USART6_ISUART=y
+ CONFIG_USART6_SERIALDRIVER=y
CONFIG_USART6_SERIAL_CONSOLE=y
CONFIG_USART6_RXBUFSIZE=256
CONFIG_USART6_TXBUFSIZE=256
diff --git a/configs/nucleo-f4x1re/f401-nsh/defconfig b/configs/nucleo-f4x1re/f401-nsh/defconfig
index 6ac2b9ea553..bdacfd5723e 100644
--- a/configs/nucleo-f4x1re/f401-nsh/defconfig
+++ b/configs/nucleo-f4x1re/f401-nsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
CONFIG_ARCH_CHIP_STM32F401RE=y
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -410,13 +416,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
# CONFIG_STM32_TIM10_CAP is not set
# CONFIG_STM32_TIM11_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
# CONFIG_STM32_HAVE_RTC_COUNTER is not set
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -682,33 +692,28 @@ CONFIG_SPI_EXCHANGE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -852,6 +857,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -939,7 +946,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
@@ -975,6 +981,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/nucleo-f4x1re/f411-nsh/defconfig b/configs/nucleo-f4x1re/f411-nsh/defconfig
index df0a12a77ee..1192acfa94b 100644
--- a/configs/nucleo-f4x1re/f411-nsh/defconfig
+++ b/configs/nucleo-f4x1re/f411-nsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
CONFIG_ARCH_CHIP_STM32F411RE=y
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -412,13 +418,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
# CONFIG_STM32_TIM10_CAP is not set
# CONFIG_STM32_TIM11_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
# CONFIG_STM32_HAVE_RTC_COUNTER is not set
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -684,33 +694,28 @@ CONFIG_SPI_EXCHANGE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -854,6 +859,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -941,7 +948,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
@@ -977,6 +983,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/nucleo-f4x1re/src/stm32_ajoystick.c b/configs/nucleo-f4x1re/src/stm32_ajoystick.c
index 9d79e99cc7f..61eaccf244f 100644
--- a/configs/nucleo-f4x1re/src/stm32_ajoystick.c
+++ b/configs/nucleo-f4x1re/src/stm32_ajoystick.c
@@ -46,6 +46,7 @@
#include
#include
+#include
#include
#include "stm32_gpio.h"
@@ -108,10 +109,6 @@
AJOY_BUTTON_7_BIT )
#endif
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
@@ -158,9 +155,9 @@ static const struct ajoy_lowerhalf_s g_ajoylower =
};
#ifndef NO_JOYSTICK_ADC
-/* Descriptor for the open ADC driver */
+/* Thread-independent file structure for the open ADC driver */
-static int g_adcfd = -1;
+static struct file g_adcfile;
#endif
/* Current interrupt handler and argument */
@@ -209,7 +206,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
* channels are enabled).
*/
- nread = read(g_adcfd, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
+ nread = file_read(&g_adcfile, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
if (nread < 0)
{
int errcode = get_errno();
@@ -454,6 +451,8 @@ int board_ajoy_initialize(void)
int i;
#ifndef NO_JOYSTICK_ADC
+ int fd;
+
ivdbg("Initialize ADC driver: /dev/adc0\n");
/* Initialize ADC. We will need this to read the ADC inputs */
@@ -465,15 +464,27 @@ int board_ajoy_initialize(void)
return ret;
}
- /* Open the ADC driver for reading */
+ /* Open the ADC driver for reading. */
- g_adcfd = open("/dev/adc0", O_RDONLY);
- if (g_adcfd < 0)
+ fd = open("/dev/adc0", O_RDONLY);
+ if (fd < 0)
{
int errcode = get_errno();
idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode);
return -errcode;
}
+
+ /* Detach the file structure from the file descriptor so that it can be
+ * used on any thread.
+ */
+
+ ret = file_detach(fd, &g_adcfile);
+ if (ret < 0)
+ {
+ idbg("ERROR: Failed to detach from file descriptor: %d\n", ret);
+ (void)close(fd);
+ return ret;
+ }
#endif
/* Configure the GPIO pins as interrupting inputs. NOTE: This is
@@ -497,8 +508,7 @@ int board_ajoy_initialize(void)
{
idbg("ERROR: ajoy_register failed: %d\n", ret);
#ifndef NO_JOYSTICK_ADC
- close(g_adcfd);
- g_adcfd = -1;
+ file_close_detached(&g_adcfile);
#endif
}
diff --git a/configs/nucleo-f4x1re/src/stm32_appinit.c b/configs/nucleo-f4x1re/src/stm32_appinit.c
index 7f0d889d475..97cbc4ffc48 100644
--- a/configs/nucleo-f4x1re/src/stm32_appinit.c
+++ b/configs/nucleo-f4x1re/src/stm32_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* configs/nucleo-f4x1re/src/stm32_appinit.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -89,11 +89,28 @@ void up_netinitialize(void)
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#if defined(HAVE_MMCSD) || defined(CONFIG_AJOYSTICK)
int ret;
diff --git a/configs/nucleo-f4x1re/src/stm32_boot.c b/configs/nucleo-f4x1re/src/stm32_boot.c
index 580b2d08c46..2b6f69e65ec 100644
--- a/configs/nucleo-f4x1re/src/stm32_boot.c
+++ b/configs/nucleo-f4x1re/src/stm32_boot.c
@@ -121,7 +121,7 @@ void board_initialize(void)
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
- board_app_initialize();
+ board_app_initialize(0);
#endif
/* CC3000 wireless initialization */
diff --git a/configs/nucleo-l476rg/README.txt b/configs/nucleo-l476rg/README.txt
index ab8ff50b27a..d576d83d880 100644
--- a/configs/nucleo-l476rg/README.txt
+++ b/configs/nucleo-l476rg/README.txt
@@ -377,7 +377,7 @@ Serial Consoles
To configure USART1 as the console:
CONFIG_STM32_USART1=y
- CONFIG_USART1_ISUART=y
+ CONFIG_USART1_SERIALDRIVER=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_RXBUFSIZE=256
CONFIG_USART1_TXBUFSIZE=256
@@ -416,7 +416,7 @@ Serial Consoles
To configure USART2 as the console:
CONFIG_STM32_USART2=y
- CONFIG_USART2_ISUART=y
+ CONFIG_USART2_SERIALDRIVER=y
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_RXBUFSIZE=256
CONFIG_USART2_TXBUFSIZE=256
@@ -437,7 +437,7 @@ Serial Consoles
To configure USART6 as the console:
CONFIG_STM32_USART6=y
- CONFIG_USART6_ISUART=y
+ CONFIG_USART6_SERIALDRIVER=y
CONFIG_USART6_SERIAL_CONSOLE=y
CONFIG_USART6_RXBUFSIZE=256
CONFIG_USART6_TXBUFSIZE=256
diff --git a/configs/nucleo-l476rg/include/board.h b/configs/nucleo-l476rg/include/board.h
index cc132e838b0..32462f24775 100644
--- a/configs/nucleo-l476rg/include/board.h
+++ b/configs/nucleo-l476rg/include/board.h
@@ -1,7 +1,7 @@
/************************************************************************************
* configs/nucleo-l476rg/include/board.h
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -64,7 +64,7 @@
/* Values defined in arch/arm/src/stm32l4/chip/stm32l4x6xx_dma.h */
-#define DMACHAN_SDMMC DMACHAN_SDMMC_1 /* 2 choices */
+#define DMACHAN_SDMMC DMACHAN_SDMMC_1 /* 2 choices */
#define DMACHAN_SPI1_RX DMACHAN_SPI1_RX_1 /* 2 choices */
#define DMACHAN_SPI1_TX DMACHAN_SPI1_TX_1 /* 2 choices */
@@ -109,22 +109,29 @@
* but are normally-high GPIOs.
*/
-#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
-#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
+#define GPIO_I2C1_SCL \
+ (GPIO_I2C1_SCL_2 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
+#define GPIO_I2C1_SDA \
+ (GPIO_I2C1_SDA_2 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
#define GPIO_I2C1_SCL_GPIO \
- (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
+ (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
+ GPIO_PORTB | GPIO_PIN8)
#define GPIO_I2C1_SDA_GPIO \
- (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
+ (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
+ GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
-#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
+#define GPIO_I2C2_SCL \
+ (GPIO_I2C2_SCL_1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
+#define GPIO_I2C2_SDA \
+ (GPIO_I2C2_SDA_1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
#define GPIO_I2C2_SCL_GPIO \
- (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
+ (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
+ GPIO_PORTB | GPIO_PIN10)
#define GPIO_I2C2_SDA_GPIO \
- (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
+ (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
+ GPIO_PORTB | GPIO_PIN11)
-/* SPI
- */
+/* SPI */
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
diff --git a/configs/nucleo-l476rg/nsh/defconfig b/configs/nucleo-l476rg/nsh/defconfig
index a4c68715642..4f2c7c8da4e 100644
--- a/configs/nucleo-l476rg/nsh/defconfig
+++ b/configs/nucleo-l476rg/nsh/defconfig
@@ -559,33 +559,32 @@ CONFIG_RTC_IOCTL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
#
-CONFIG_USART2_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
diff --git a/configs/nucleo-l476rg/src/nucleo-l476rg.h b/configs/nucleo-l476rg/src/nucleo-l476rg.h
index 7f1ef0feef7..d35d247349a 100644
--- a/configs/nucleo-l476rg/src/nucleo-l476rg.h
+++ b/configs/nucleo-l476rg/src/nucleo-l476rg.h
@@ -52,9 +52,19 @@
************************************************************************************/
/* Configuration ********************************************************************/
+#define HAVE_PROC 1
#define HAVE_RTC_DRIVER 1
#define HAVE_MMCSD 1
+#if !defined(CONFIG_FS_PROCFS)
+# undef HAVE_PROC
+#endif
+
+#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT)
+# warning Mountpoints disabled. No procfs support
+# undef HAVE_PROC
+#endif
+
/* Check if we can support the RTC driver */
#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER)
diff --git a/configs/nucleo-l476rg/src/stm32_ajoystick.c b/configs/nucleo-l476rg/src/stm32_ajoystick.c
index 53d58a77d9b..bd57040a78f 100644
--- a/configs/nucleo-l476rg/src/stm32_ajoystick.c
+++ b/configs/nucleo-l476rg/src/stm32_ajoystick.c
@@ -1,7 +1,7 @@
/****************************************************************************
* configs/nucleo-f3x1re/src/stm32_ajoystick.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -45,6 +45,7 @@
#include
#include
+#include
#include
#include "stm32l4_gpio.h"
@@ -107,10 +108,6 @@
AJOY_BUTTON_7_BIT )
#endif
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
@@ -157,9 +154,9 @@ static const struct ajoy_lowerhalf_s g_ajoylower =
};
#ifndef NO_JOYSTICK_ADC
-/* Descriptor for the open ADC driver */
+/* Thread-independent file structure for the open ADC driver */
-static int g_adcfd = -1;
+static struct file g_adcfile;
#endif
/* Current interrupt handler and argument */
@@ -208,7 +205,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
* channels are enabled).
*/
- nread = read(g_adcfd, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
+ nread = file_read(&g_adcfile, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
if (nread < 0)
{
int errcode = get_errno();
@@ -453,6 +450,8 @@ int board_ajoy_initialize(void)
int i;
#ifndef NO_JOYSTICK_ADC
+ int fd;
+
ivdbg("Initialize ADC driver: /dev/adc0\n");
/* Initialize ADC. We will need this to read the ADC inputs */
@@ -464,15 +463,27 @@ int board_ajoy_initialize(void)
return ret;
}
- /* Open the ADC driver for reading */
+ /* Open the ADC driver for reading. */
- g_adcfd = open("/dev/adc0", O_RDONLY);
- if (g_adcfd < 0)
+ fd = open("/dev/adc0", O_RDONLY);
+ if (fd < 0)
{
int errcode = get_errno();
idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode);
return -errcode;
}
+
+ /* Detach the file structure from the file descriptor so that it can be
+ * used on any thread.
+ */
+
+ ret = file_detach(fd, &g_adcfile);
+ if (ret < 0)
+ {
+ idbg("ERROR: Failed to detach from file descriptor: %d\n", ret);
+ (void)close(fd);
+ return ret;
+ }
#endif
/* Configure the GPIO pins as interrupting inputs. NOTE: This is
@@ -496,8 +507,7 @@ int board_ajoy_initialize(void)
{
idbg("ERROR: ajoy_register failed: %d\n", ret);
#ifndef NO_JOYSTICK_ADC
- close(g_adcfd);
- g_adcfd = -1;
+ file_close_detached(&g_adcfile);
#endif
}
diff --git a/configs/nucleo-l476rg/src/stm32_appinit.c b/configs/nucleo-l476rg/src/stm32_appinit.c
index 5a8b78513ab..96190c07c54 100644
--- a/configs/nucleo-l476rg/src/stm32_appinit.c
+++ b/configs/nucleo-l476rg/src/stm32_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* configs/nucleo-l476rg/src/stm32_appinit.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,7 +39,11 @@
#include
+#include
+#include
#include
+#include
+#include
#include
#include
@@ -82,11 +86,28 @@ void up_netinitialize(void)
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef HAVE_RTC_DRIVER
FAR struct rtc_lowerhalf_s *rtclower;
@@ -101,6 +122,21 @@ int board_app_initialize(void)
cpuload_initialize_once();
#endif
+#ifdef HAVE_PROC
+ /* Mount the proc filesystem */
+
+ syslog(LOG_INFO, "Mounting procfs to /proc\n");
+
+ ret = mount(NULL, CONFIG_NSH_PROC_MOUNTPOINT, "procfs", 0, NULL);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR,
+ "ERROR: Failed to mount the PROC filesystem: %d (%d)\n",
+ ret, errno);
+ return ret;
+ }
+#endif
+
#ifdef HAVE_RTC_DRIVER
/* Instantiate the STM32L4 lower-half RTC driver */
diff --git a/configs/nucleo-l476rg/src/stm32_boot.c b/configs/nucleo-l476rg/src/stm32_boot.c
index 52d1a28f08f..0389d18cf11 100644
--- a/configs/nucleo-l476rg/src/stm32_boot.c
+++ b/configs/nucleo-l476rg/src/stm32_boot.c
@@ -121,7 +121,7 @@ void board_initialize(void)
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_NSH_ARCHINIT)
- board_app_initialize();
+ board_app_initialize(0);
#endif
/* CC3000 wireless initialization */
diff --git a/configs/nutiny-nuc120/nsh/defconfig b/configs/nutiny-nuc120/nsh/defconfig
index 9858f39fee4..9c73cbc043c 100644
--- a/configs/nutiny-nuc120/nsh/defconfig
+++ b/configs/nutiny-nuc120/nsh/defconfig
@@ -316,7 +316,7 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_UART1=y
+CONFIG_UART1_SERIALDRIVER=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_UART1_SERIAL_CONSOLE=y
diff --git a/configs/olimex-efm32g880f128-stk/nsh/defconfig b/configs/olimex-efm32g880f128-stk/nsh/defconfig
index 8783912c3e0..99b47aac95b 100644
--- a/configs/olimex-efm32g880f128-stk/nsh/defconfig
+++ b/configs/olimex-efm32g880f128-stk/nsh/defconfig
@@ -374,28 +374,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/olimex-lpc-h3131/nsh/defconfig b/configs/olimex-lpc-h3131/nsh/defconfig
index 2e88b0d0884..f3463176647 100644
--- a/configs/olimex-lpc-h3131/nsh/defconfig
+++ b/configs/olimex-lpc-h3131/nsh/defconfig
@@ -382,28 +382,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_UART=y
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+CONFIG_UART_SERIALDRIVER=y
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc-h3131/src/lpc31_appinit.c b/configs/olimex-lpc-h3131/src/lpc31_appinit.c
index d24c412ffd6..551a2d9bb6c 100644
--- a/configs/olimex-lpc-h3131/src/lpc31_appinit.c
+++ b/configs/olimex-lpc-h3131/src/lpc31_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* configs/olimex-lpc-h3131/src/lpc31_appinit.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -79,11 +79,28 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#if defined(HAVE_MMCSD) || defined(HAVE_USBHOST)
int ret;
diff --git a/configs/olimex-lpc1766stk/ftpc/defconfig b/configs/olimex-lpc1766stk/ftpc/defconfig
index bcad3a75a0f..6239b8e2700 100644
--- a/configs/olimex-lpc1766stk/ftpc/defconfig
+++ b/configs/olimex-lpc1766stk/ftpc/defconfig
@@ -492,28 +492,28 @@ CONFIG_ETH0_PHY_KS8721=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/hidkbd/defconfig b/configs/olimex-lpc1766stk/hidkbd/defconfig
index 57ff6174b35..995016cfd6e 100644
--- a/configs/olimex-lpc1766stk/hidkbd/defconfig
+++ b/configs/olimex-lpc1766stk/hidkbd/defconfig
@@ -459,28 +459,28 @@ CONFIG_MMCSD_NSLOTS=1
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/hidmouse/defconfig b/configs/olimex-lpc1766stk/hidmouse/defconfig
index 9128e7a1bae..152d049b7d0 100644
--- a/configs/olimex-lpc1766stk/hidmouse/defconfig
+++ b/configs/olimex-lpc1766stk/hidmouse/defconfig
@@ -478,28 +478,28 @@ CONFIG_NETDEV_TELNET=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/nettest/defconfig b/configs/olimex-lpc1766stk/nettest/defconfig
index 9913ba909f7..d9b56621523 100644
--- a/configs/olimex-lpc1766stk/nettest/defconfig
+++ b/configs/olimex-lpc1766stk/nettest/defconfig
@@ -469,28 +469,28 @@ CONFIG_ETH0_PHY_KS8721=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/nsh/defconfig b/configs/olimex-lpc1766stk/nsh/defconfig
index 402f5851469..5f83abd29a1 100644
--- a/configs/olimex-lpc1766stk/nsh/defconfig
+++ b/configs/olimex-lpc1766stk/nsh/defconfig
@@ -534,28 +534,28 @@ CONFIG_ETH0_PHY_KS8721=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/nx/defconfig b/configs/olimex-lpc1766stk/nx/defconfig
index cefbb19eb23..34b2d4c3f07 100644
--- a/configs/olimex-lpc1766stk/nx/defconfig
+++ b/configs/olimex-lpc1766stk/nx/defconfig
@@ -481,28 +481,28 @@ CONFIG_LCD_LANDSCAPE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/slip-httpd/defconfig b/configs/olimex-lpc1766stk/slip-httpd/defconfig
index 9b7dacd49d6..bf9a212683f 100644
--- a/configs/olimex-lpc1766stk/slip-httpd/defconfig
+++ b/configs/olimex-lpc1766stk/slip-httpd/defconfig
@@ -414,28 +414,28 @@ CONFIG_NET_SLIP=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/src/lpc17_appinit.c b/configs/olimex-lpc1766stk/src/lpc17_appinit.c
index 89fd701173c..a8176afa25e 100644
--- a/configs/olimex-lpc1766stk/src/lpc17_appinit.c
+++ b/configs/olimex-lpc1766stk/src/lpc17_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/olimex-lpc1766stk/src/lpc17_appinit.c
*
- * Copyright (C) 2010, 2013-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2010, 2013-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -320,11 +320,28 @@ static int nsh_usbhostinitialize(void)
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
int ret;
diff --git a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig
index af5952f5440..da3dca2d7e3 100644
--- a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig
+++ b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig
@@ -466,28 +466,28 @@ CONFIG_ETH0_PHY_KS8721=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig
index e6bb9d820b3..ae4b8bfd3e2 100644
--- a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig
+++ b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig
@@ -458,28 +458,28 @@ CONFIG_ETH0_PHY_KS8721=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/usbmsc/defconfig b/configs/olimex-lpc1766stk/usbmsc/defconfig
index c534bd45561..f499036204d 100644
--- a/configs/olimex-lpc1766stk/usbmsc/defconfig
+++ b/configs/olimex-lpc1766stk/usbmsc/defconfig
@@ -449,28 +449,28 @@ CONFIG_MMCSD_SPIMODE=0
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/usbserial/defconfig b/configs/olimex-lpc1766stk/usbserial/defconfig
index 90b9bfad375..28806b7c2b2 100644
--- a/configs/olimex-lpc1766stk/usbserial/defconfig
+++ b/configs/olimex-lpc1766stk/usbserial/defconfig
@@ -473,28 +473,28 @@ CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc1766stk/zmodem/defconfig b/configs/olimex-lpc1766stk/zmodem/defconfig
index 9a1e0933a8f..f0880d4d32b 100644
--- a/configs/olimex-lpc1766stk/zmodem/defconfig
+++ b/configs/olimex-lpc1766stk/zmodem/defconfig
@@ -512,28 +512,28 @@ CONFIG_ETH0_PHY_KS8721=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc2378/nsh/defconfig b/configs/olimex-lpc2378/nsh/defconfig
index 63e4b7cb562..207ae574d59 100644
--- a/configs/olimex-lpc2378/nsh/defconfig
+++ b/configs/olimex-lpc2378/nsh/defconfig
@@ -379,28 +379,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-CONFIG_ARCH_HAVE_UART2=y
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+CONFIG_UART2_SERIALDRIVER=y
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-lpc2378/src/lpc2378_appinit.c b/configs/olimex-lpc2378/src/lpc2378_appinit.c
index 6f7e8b194f6..ed9ee4910ab 100644
--- a/configs/olimex-lpc2378/src/lpc2378_appinit.c
+++ b/configs/olimex-lpc2378/src/lpc2378_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/olimex-lpc2378/src/lpc2378_appinit.c
*
- * Copyright (C) 2010 Rommel Marcelo. All rights reserved.
+ * Copyright (C) 2010, 2016 Rommel Marcelo. All rights reserved.
* Author: Rommel Marcelo
*
* This is part of the NuttX RTOS and based on the LPC2148 port:
@@ -88,11 +88,28 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return OK;
}
diff --git a/configs/olimex-stm32-h405/src/stm32_appinit.c b/configs/olimex-stm32-h405/src/stm32_appinit.c
index 623d9e34289..776b5ffa5c3 100644
--- a/configs/olimex-stm32-h405/src/stm32_appinit.c
+++ b/configs/olimex-stm32-h405/src/stm32_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/olimex-stm32-h405/src/stm32_appinit.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -73,7 +73,9 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library
@@ -82,9 +84,24 @@
* CONFIG_LIB_BOARDCTL=n :
* Called from board_initialize().
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#if defined(CONFIG_CAN) || defined(CONFIG_ADC)
int ret;
diff --git a/configs/olimex-stm32-h405/src/stm32_boot.c b/configs/olimex-stm32-h405/src/stm32_boot.c
index f057314fb49..7332b8a4ef1 100644
--- a/configs/olimex-stm32-h405/src/stm32_boot.c
+++ b/configs/olimex-stm32-h405/src/stm32_boot.c
@@ -118,7 +118,7 @@ void board_initialize(void)
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
- board_app_initialize();
+ board_app_initialize(0);
#endif
}
#endif
diff --git a/configs/olimex-stm32-h405/usbnsh/defconfig b/configs/olimex-stm32-h405/usbnsh/defconfig
index 4b3b04b27bd..5ba6d946fc5 100644
--- a/configs/olimex-stm32-h405/usbnsh/defconfig
+++ b/configs/olimex-stm32-h405/usbnsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -245,6 +250,7 @@ CONFIG_CAN_TSEG2=8
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
CONFIG_ARCH_CHIP_STM32F405RG=y
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -450,13 +456,17 @@ CONFIG_STM32_ADC1_TIMTRIG=0
# ADC Configuration
#
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART3_SERIALDRIVER=y
+# CONFIG_STM32_USART3_1WIREDRIVER is not set
# CONFIG_USART3_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
# CONFIG_STM32_HAVE_RTC_COUNTER is not set
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -746,33 +756,28 @@ CONFIG_ADC_FIFOSIZE=8
CONFIG_SERIAL=y
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-CONFIG_ARCH_HAVE_USART3=y
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART3_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+CONFIG_USART3_SERIALDRIVER=y
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -826,8 +831,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
CONFIG_CDCACM_EPBULKIN=2
CONFIG_CDCACM_EPBULKIN_FSSIZE=64
CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_BULKIN_REQLEN=96
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
@@ -955,6 +960,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -1100,6 +1107,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/olimex-stm32-h407/nsh/defconfig b/configs/olimex-stm32-h407/nsh/defconfig
index edcd8070ec2..808193295bd 100644
--- a/configs/olimex-stm32-h407/nsh/defconfig
+++ b/configs/olimex-stm32-h407/nsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -434,13 +440,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
# CONFIG_STM32_TIM13_CAP is not set
# CONFIG_STM32_TIM14_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
# CONFIG_STM32_HAVE_RTC_COUNTER is not set
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -706,33 +716,28 @@ CONFIG_SPI=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -884,6 +889,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -972,7 +979,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
@@ -1010,6 +1016,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/olimex-stm32-h407/src/stm32_appinit.c b/configs/olimex-stm32-h407/src/stm32_appinit.c
index e67ab3138bb..6f0cd2dd64a 100644
--- a/configs/olimex-stm32-h407/src/stm32_appinit.c
+++ b/configs/olimex-stm32-h407/src/stm32_appinit.c
@@ -71,16 +71,33 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* CONFIG_LIB_BOARDCTL=y:
* If CONFIG_NSH_ARCHINITIALIZE=y:
* Called from the NSH library (or other application)
* Otherse, assumed to be called from some other application.
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return stm32_bringup();
}
diff --git a/configs/olimex-stm32-p107/nsh/defconfig b/configs/olimex-stm32-p107/nsh/defconfig
index b867a39067d..6f02ee2d93d 100644
--- a/configs/olimex-stm32-p107/nsh/defconfig
+++ b/configs/olimex-stm32-p107/nsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -240,6 +245,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -409,13 +415,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
CONFIG_STM32_HAVE_RTC_COUNTER=y
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -718,10 +728,12 @@ CONFIG_MTD=y
# CONFIG_MTD_AT45DB is not set
# CONFIG_MTD_M25P is not set
# CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
# CONFIG_MTD_SMART is not set
# CONFIG_MTD_RAMTRON is not set
# CONFIG_MTD_SST25 is not set
# CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
# CONFIG_MTD_SST39FV is not set
# CONFIG_MTD_W25 is not set
# CONFIG_EEPROM is not set
@@ -773,33 +785,28 @@ CONFIG_ETH0_PHY_KS8721=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
@@ -1053,6 +1060,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
CONFIG_LIBC_NETDB=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSCLIENT_ENTRIES=8
@@ -1141,7 +1150,6 @@ CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_UDPBLASTER is not set
# CONFIG_EXAMPLES_DISCOVER is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
# CONFIG_EXAMPLES_XMLRPC is not set
@@ -1180,6 +1188,7 @@ CONFIG_EXAMPLES_NSH=y
# CONFIG_NETUTILS_CHAT is not set
# CONFIG_NETUTILS_CODECS is not set
# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_FTPD is not set
# CONFIG_NETUTILS_JSON is not set
diff --git a/configs/olimex-stm32-p207/nsh/defconfig b/configs/olimex-stm32-p207/nsh/defconfig
index 8e72e8d52a5..cd9c9a3aebc 100644
--- a/configs/olimex-stm32-p207/nsh/defconfig
+++ b/configs/olimex-stm32-p207/nsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -247,6 +252,7 @@ CONFIG_ARCH_CHIP_STM32F207ZE=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -451,13 +457,17 @@ CONFIG_STM32_ADC1_TIMTRIG=0
# ADC Configuration
#
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART3_SERIALDRIVER=y
+# CONFIG_STM32_USART3_1WIREDRIVER is not set
# CONFIG_USART3_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
# CONFIG_STM32_HAVE_RTC_COUNTER is not set
# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
@@ -813,33 +823,28 @@ CONFIG_ETH0_PHY_KS8721=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-CONFIG_ARCH_HAVE_USART3=y
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART3_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+CONFIG_USART3_SERIALDRIVER=y
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -1102,6 +1107,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
CONFIG_LIBC_NETDB=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSCLIENT_ENTRIES=8
@@ -1164,6 +1171,7 @@ CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_CAN is not set
# CONFIG_EXAMPLES_CHAT is not set
# CONFIG_EXAMPLES_CONFIGDATA is not set
# CONFIG_EXAMPLES_CPUHOG is not set
@@ -1254,6 +1262,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
#
# CONFIG_NETUTILS_CODECS is not set
# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/olimex-stm32-p207/src/stm32_appinit.c b/configs/olimex-stm32-p207/src/stm32_appinit.c
index 01f6362c344..695cc0607b4 100644
--- a/configs/olimex-stm32-p207/src/stm32_appinit.c
+++ b/configs/olimex-stm32-p207/src/stm32_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/olimex-stm32-p207/src/stm32_appinit.c
*
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -102,7 +102,9 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library
@@ -111,9 +113,24 @@
* CONFIG_LIB_BOARDCTL=n :
* Called from board_initialize().
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#if defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) || defined(CONFIG_ADC)
int ret;
diff --git a/configs/olimex-stm32-p207/src/stm32_boot.c b/configs/olimex-stm32-p207/src/stm32_boot.c
index 7234449534e..1d81c621094 100644
--- a/configs/olimex-stm32-p207/src/stm32_boot.c
+++ b/configs/olimex-stm32-p207/src/stm32_boot.c
@@ -47,14 +47,6 @@
#include "olimex-stm32-p207.h"
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -119,7 +111,7 @@ void board_initialize(void)
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
- board_app_initialize();
+ board_app_initialize(0);
#endif
}
#endif
diff --git a/configs/olimex-strp711/nettest/defconfig b/configs/olimex-strp711/nettest/defconfig
index f8c48131aa7..2f698cc8bdc 100644
--- a/configs/olimex-strp711/nettest/defconfig
+++ b/configs/olimex-strp711/nettest/defconfig
@@ -413,28 +413,28 @@ CONFIG_ENC28J60_STATS=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/olimex-strp711/nsh/defconfig b/configs/olimex-strp711/nsh/defconfig
index d45d72b3ced..790273c4220 100644
--- a/configs/olimex-strp711/nsh/defconfig
+++ b/configs/olimex-strp711/nsh/defconfig
@@ -324,8 +324,8 @@ CONFIG_MMCSD_SPIMODE=0
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-CONFIG_ARCH_HAVE_UART1=y
+CONFIG_UART0_SERIALDRIVER=y
+CONFIG_UART1_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/olimex-strp711/src/str71_appinit.c b/configs/olimex-strp711/src/str71_appinit.c
index 44cca74773f..e064cd59883 100644
--- a/configs/olimex-strp711/src/str71_appinit.c
+++ b/configs/olimex-strp711/src/str71_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/olimex-strp711/src/str71_appinit.c
*
- * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009-2010, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -105,11 +105,28 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifdef NSH_HAVEMMCSD
FAR struct spi_dev_s *spi;
diff --git a/configs/olimexino-stm32/can/defconfig b/configs/olimexino-stm32/can/defconfig
index b8c9da6ec56..866967575ef 100644
--- a/configs/olimexino-stm32/can/defconfig
+++ b/configs/olimexino-stm32/can/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -243,6 +248,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -431,13 +437,17 @@ CONFIG_STM32_FORCEPOWER=y
# ADC Configuration
#
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
CONFIG_SERIAL_DISABLE_REORDERING=y
CONFIG_STM32_FLOWCONTROL_BROKEN=y
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -743,33 +753,28 @@ CONFIG_ANALOG=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
@@ -924,6 +929,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=0
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -958,6 +965,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768
#
# CAN Utilities
#
+# CONFIG_CANUTILS_LIBCANARD is not set
#
# Examples
@@ -1059,6 +1067,7 @@ CONFIG_EXAMPLES_NSH=y
#
# CONFIG_NETUTILS_CHAT is not set
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/olimexino-stm32/composite/defconfig b/configs/olimexino-stm32/composite/defconfig
index 3dfff329ac8..bb7055ac686 100644
--- a/configs/olimexino-stm32/composite/defconfig
+++ b/configs/olimexino-stm32/composite/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -426,16 +432,22 @@ CONFIG_STM32_DMACAPABLE=y
#
# CONFIG_STM32_ADC1_DMA is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
# CONFIG_USART1_RXDMA is not set
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_USART2_RXDMA is not set
CONFIG_SERIAL_DISABLE_REORDERING=y
CONFIG_STM32_FLOWCONTROL_BROKEN=y
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -745,34 +757,28 @@ CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
CONFIG_SERIAL_REMOVABLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
@@ -853,8 +859,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=64
CONFIG_CDCACM_EPBULKIN=2
CONFIG_CDCACM_EPBULKIN_FSSIZE=64
CONFIG_CDCACM_EPBULKIN_HSSIZE=64
-CONFIG_CDCACM_NWRREQS=2
CONFIG_CDCACM_NRDREQS=2
+CONFIG_CDCACM_NWRREQS=2
CONFIG_CDCACM_BULKIN_REQLEN=96
CONFIG_CDCACM_RXBUFSIZE=96
CONFIG_CDCACM_TXBUFSIZE=96
@@ -1011,6 +1017,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=0
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -1045,7 +1053,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768
#
# CAN Utilities
#
-# CONFIG_CANUTILS_UAVCAN is not set
+# CONFIG_CANUTILS_LIBUAVCAN is not set
#
# Examples
@@ -1153,6 +1161,7 @@ CONFIG_EXAMPLES_NSH=y
#
# CONFIG_NETUTILS_CHAT is not set
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/olimexino-stm32/nsh/defconfig b/configs/olimexino-stm32/nsh/defconfig
index 63b15cb7fcb..bff7b461199 100644
--- a/configs/olimexino-stm32/nsh/defconfig
+++ b/configs/olimexino-stm32/nsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -426,16 +432,22 @@ CONFIG_STM32_DMACAPABLE=y
#
# CONFIG_STM32_ADC1_DMA is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
# CONFIG_USART1_RXDMA is not set
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_USART2_RXDMA is not set
CONFIG_SERIAL_DISABLE_REORDERING=y
CONFIG_STM32_FLOWCONTROL_BROKEN=y
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -743,34 +755,28 @@ CONFIG_MMCSD_SPIMODE=0
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-CONFIG_ARCH_HAVE_USART2=y
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
-CONFIG_USART2_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
@@ -939,6 +945,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=0
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
# CONFIG_NETDB_HOSTFILE is not set
@@ -973,7 +981,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768
#
# CAN Utilities
#
-# CONFIG_CANUTILS_UAVCAN is not set
+# CONFIG_CANUTILS_LIBUAVCAN is not set
#
# Examples
@@ -1081,6 +1089,7 @@ CONFIG_EXAMPLES_NSH=y
#
# CONFIG_NETUTILS_CHAT is not set
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/olimexino-stm32/smallnsh/defconfig b/configs/olimexino-stm32/smallnsh/defconfig
index fbaa9d791eb..1429b4c2b49 100644
--- a/configs/olimexino-stm32/smallnsh/defconfig
+++ b/configs/olimexino-stm32/smallnsh/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -243,6 +248,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -423,13 +429,17 @@ CONFIG_STM32_FORCEPOWER=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
CONFIG_SERIAL_DISABLE_REORDERING=y
# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -721,33 +731,28 @@ CONFIG_SPI_EXCHANGE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
@@ -892,6 +897,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=0
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -925,6 +932,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768
#
# CAN Utilities
#
+# CONFIG_CANUTILS_LIBCANARD is not set
#
# Examples
@@ -1021,6 +1029,7 @@ CONFIG_EXAMPLES_NSH=y
#
# CONFIG_NETUTILS_CHAT is not set
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/olimexino-stm32/src/stm32_appinit.c b/configs/olimexino-stm32/src/stm32_appinit.c
index c7de1858b3a..e9cd7fe0b4d 100644
--- a/configs/olimexino-stm32/src/stm32_appinit.c
+++ b/configs/olimexino-stm32/src/stm32_appinit.c
@@ -68,11 +68,28 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
int ret = OK;
diff --git a/configs/olimexino-stm32/src/stm32_boot.c b/configs/olimexino-stm32/src/stm32_boot.c
index e7f0b807e8a..1d8d40bb3fb 100644
--- a/configs/olimexino-stm32/src/stm32_boot.c
+++ b/configs/olimexino-stm32/src/stm32_boot.c
@@ -136,7 +136,7 @@ void board_initialize(void)
* space but the initialization function must run in kernel space.
*/
- board_app_initialize();
+ board_app_initialize(0);
#endif
#if defined(CONFIG_USBDEV)
diff --git a/configs/olimexino-stm32/tiny/defconfig b/configs/olimexino-stm32/tiny/defconfig
index d4c89d090a7..4fe4bb5a901 100644
--- a/configs/olimexino-stm32/tiny/defconfig
+++ b/configs/olimexino-stm32/tiny/defconfig
@@ -76,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +95,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_SAMV7 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
@@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_HAVE_DCACHE is not set
# CONFIG_ARMV7M_HAVE_ITCM is not set
# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -243,6 +248,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y
# CONFIG_ARCH_CHIP_STM32F373VC is not set
# CONFIG_ARCH_CHIP_STM32F401RE is not set
# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@@ -423,13 +429,17 @@ CONFIG_STM32_FORCEPOWER=y
# CONFIG_STM32_TIM5_CAP is not set
# CONFIG_STM32_TIM8_CAP is not set
CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
#
# U[S]ART Configuration
#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
# CONFIG_USART1_RS485 is not set
CONFIG_SERIAL_DISABLE_REORDERING=y
CONFIG_STM32_FLOWCONTROL_BROKEN=y
+# CONFIG_STM32_USART_BREAKS is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
@@ -725,33 +735,28 @@ CONFIG_SPI_EXCHANGE=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-CONFIG_ARCH_HAVE_USART1=y
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
-
-#
-# USART Configuration
-#
-CONFIG_USART1_ISUART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
CONFIG_MCU_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
# CONFIG_SERIAL_OFLOWCONTROL is not set
@@ -889,6 +894,8 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=0
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
@@ -922,6 +929,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768
#
# CAN Utilities
#
+# CONFIG_CANUTILS_LIBCANARD is not set
#
# Examples
@@ -1017,6 +1025,7 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
#
# CONFIG_NETUTILS_CHAT is not set
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
diff --git a/configs/open1788/knsh/defconfig b/configs/open1788/knsh/defconfig
index 9081e8dba9e..566df000ae0 100644
--- a/configs/open1788/knsh/defconfig
+++ b/configs/open1788/knsh/defconfig
@@ -426,27 +426,27 @@ CONFIG_PIPES=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/open1788/nsh/defconfig b/configs/open1788/nsh/defconfig
index 13381a0bb9f..82a8f975de5 100644
--- a/configs/open1788/nsh/defconfig
+++ b/configs/open1788/nsh/defconfig
@@ -463,28 +463,28 @@ CONFIG_PIPES=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/open1788/nxlines/defconfig b/configs/open1788/nxlines/defconfig
index 93dd9d965f7..486cc41cb0f 100644
--- a/configs/open1788/nxlines/defconfig
+++ b/configs/open1788/nxlines/defconfig
@@ -367,7 +367,7 @@ CONFIG_PIPES=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
+CONFIG_UART0_SERIALDRIVER=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_CONFIG_SERIAL_NPOLLWAITERS=2
diff --git a/configs/open1788/src/lpc17_appinit.c b/configs/open1788/src/lpc17_appinit.c
index 53dd70aeb9d..d1ccc94df21 100644
--- a/configs/open1788/src/lpc17_appinit.c
+++ b/configs/open1788/src/lpc17_appinit.c
@@ -1,8 +1,7 @@
/****************************************************************************
* config/open1788/src/lpc17_appinit.c
- * arch/arm/src/board/lpc17_appinit.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -362,7 +361,9 @@ static int nsh_usbhostinitialize(void)
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization for NSH.
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library
@@ -371,9 +372,24 @@ static int nsh_usbhostinitialize(void)
* CONFIG_LIB_BOARDCTL=n:
* Called from board_initialize().
*
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
int ret;
diff --git a/configs/open1788/src/lpc17_boardinitialize.c b/configs/open1788/src/lpc17_boardinitialize.c
index 201e6ff210e..0a4a3d11a0e 100644
--- a/configs/open1788/src/lpc17_boardinitialize.c
+++ b/configs/open1788/src/lpc17_boardinitialize.c
@@ -136,7 +136,7 @@ void board_initialize(void)
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
- (void)board_app_initialize();
+ (void)board_app_initialize(0);
#endif
}
#endif
diff --git a/configs/pcblogic-pic32mx/nsh/defconfig b/configs/pcblogic-pic32mx/nsh/defconfig
index 35dc7761453..7a3de04abac 100644
--- a/configs/pcblogic-pic32mx/nsh/defconfig
+++ b/configs/pcblogic-pic32mx/nsh/defconfig
@@ -472,28 +472,28 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/pcblogic-pic32mx/src/pic32mx_appinit.c b/configs/pcblogic-pic32mx/src/pic32mx_appinit.c
index 97baa0009ea..414d4b395b2 100644
--- a/configs/pcblogic-pic32mx/src/pic32mx_appinit.c
+++ b/configs/pcblogic-pic32mx/src/pic32mx_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/pcblocic-pic32mx/src/pic32mx_appinit.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -65,11 +65,28 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
int ret = OK;
diff --git a/configs/pcduino-a10/nsh/defconfig b/configs/pcduino-a10/nsh/defconfig
index a2bf40bf07f..95833160ff6 100644
--- a/configs/pcduino-a10/nsh/defconfig
+++ b/configs/pcduino-a10/nsh/defconfig
@@ -416,27 +416,27 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-CONFIG_ARCH_HAVE_UART0=y
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/pcduino-a10/src/a1x_boot.c b/configs/pcduino-a10/src/a1x_boot.c
index 951e8a87750..265d7287319 100644
--- a/configs/pcduino-a10/src/a1x_boot.c
+++ b/configs/pcduino-a10/src/a1x_boot.c
@@ -96,7 +96,7 @@ void board_initialize(void)
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
- (void)board_app_initialize();
+ (void)board_app_initialize(0);
#endif
}
#endif /* CONFIG_BOARD_INITIALIZE */
diff --git a/configs/pic32mx-starterkit/nsh/defconfig b/configs/pic32mx-starterkit/nsh/defconfig
index 2ed828d4892..34d57a29fdb 100644
--- a/configs/pic32mx-starterkit/nsh/defconfig
+++ b/configs/pic32mx-starterkit/nsh/defconfig
@@ -511,28 +511,28 @@ CONFIG_MTD=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/pic32mx-starterkit/nsh2/defconfig b/configs/pic32mx-starterkit/nsh2/defconfig
index d6d57e13e88..60935ce1ac5 100644
--- a/configs/pic32mx-starterkit/nsh2/defconfig
+++ b/configs/pic32mx-starterkit/nsh2/defconfig
@@ -570,28 +570,28 @@ CONFIG_ETH0_PHY_DP83848C=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/pic32mx-starterkit/src/pic32mx_appinit.c b/configs/pic32mx-starterkit/src/pic32mx_appinit.c
index 64236307337..64bba54fc73 100644
--- a/configs/pic32mx-starterkit/src/pic32mx_appinit.c
+++ b/configs/pic32mx-starterkit/src/pic32mx_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/pic32mx-starterkit/src/pic32mx_appinit.c
*
- * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -351,11 +351,28 @@ static int nsh_usbdevinitialize(void)
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
int ret;
diff --git a/configs/pic32mx7mmb/nsh/defconfig b/configs/pic32mx7mmb/nsh/defconfig
index 64bd042c81a..492a3f054ed 100644
--- a/configs/pic32mx7mmb/nsh/defconfig
+++ b/configs/pic32mx7mmb/nsh/defconfig
@@ -588,28 +588,28 @@ CONFIG_ETH0_PHY_LAN8720=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/pic32mx7mmb/src/pic32_appinit.c b/configs/pic32mx7mmb/src/pic32_appinit.c
index 0970e277817..8c62c9a766f 100644
--- a/configs/pic32mx7mmb/src/pic32_appinit.c
+++ b/configs/pic32mx7mmb/src/pic32_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/pic32mx7mmb/src/pic32_appinit.c
*
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -361,11 +361,28 @@ static int nsh_usbdevinitialize(void)
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
int ret;
diff --git a/configs/pic32mz-starterkit/nsh/defconfig b/configs/pic32mz-starterkit/nsh/defconfig
index 983aa750862..a6299b98a93 100644
--- a/configs/pic32mz-starterkit/nsh/defconfig
+++ b/configs/pic32mz-starterkit/nsh/defconfig
@@ -438,28 +438,28 @@ CONFIG_MTD=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/pic32mz-starterkit/src/pic32mz_appinit.c b/configs/pic32mz-starterkit/src/pic32mz_appinit.c
index a312b0e3272..0b3a3dc8238 100644
--- a/configs/pic32mz-starterkit/src/pic32mz_appinit.c
+++ b/configs/pic32mz-starterkit/src/pic32mz_appinit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* config/pic32mz-starterkit/src/pic32mz_appinit.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -53,11 +53,28 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
/* If CONFIG_BOARD_INITIALIZE is selected then board initialization was
* already performed in board_initialize.
diff --git a/configs/pirelli_dpl10/nsh_highram/defconfig b/configs/pirelli_dpl10/nsh_highram/defconfig
index c24e5a51ec7..d8eac38010b 100644
--- a/configs/pirelli_dpl10/nsh_highram/defconfig
+++ b/configs/pirelli_dpl10/nsh_highram/defconfig
@@ -369,28 +369,28 @@ CONFIG_SPI_EXCHANGE=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-CONFIG_ARCH_HAVE_OTHER_UART=y
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+CONFIG_OTHER_UART_SERIALDRIVER=y
#
# USART Configuration
diff --git a/configs/pirelli_dpl10/src/boot.c b/configs/pirelli_dpl10/src/boot.c
index 4cd07fb0a69..38d1fe8ac2b 100644
--- a/configs/pirelli_dpl10/src/boot.c
+++ b/configs/pirelli_dpl10/src/boot.c
@@ -44,10 +44,33 @@
* Public Functions
****************************************************************************/
-/* Application initialization stub for boardctl() */
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
#ifdef CONFIG_LIB_BOARDCTL
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
return 0;
}
diff --git a/configs/qemu-i486/nsh/defconfig b/configs/qemu-i486/nsh/defconfig
index 68cf8bcff9b..c07faea1dac 100644
--- a/configs/qemu-i486/nsh/defconfig
+++ b/configs/qemu-i486/nsh/defconfig
@@ -264,27 +264,27 @@ CONFIG_16550_SUPRESS_CONFIG=y
CONFIG_16550_REGINCR=1
CONFIG_16550_REGWIDTH=8
CONFIG_16550_ADDRWIDTH=16
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/qemu-i486/ostest/defconfig b/configs/qemu-i486/ostest/defconfig
index 75ebb89269f..9306bec0db8 100644
--- a/configs/qemu-i486/ostest/defconfig
+++ b/configs/qemu-i486/ostest/defconfig
@@ -242,27 +242,27 @@ CONFIG_DEV_NULL=y
CONFIG_SERIAL=y
CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/rgmp/arm/default/defconfig b/configs/rgmp/arm/default/defconfig
index 5089009ade1..4b1bf3a25ca 100644
--- a/configs/rgmp/arm/default/defconfig
+++ b/configs/rgmp/arm/default/defconfig
@@ -243,27 +243,27 @@ CONFIG_VNET_NINTERFACES=1
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/rgmp/arm/nsh/defconfig b/configs/rgmp/arm/nsh/defconfig
index e6422b47095..1d9e1737409 100644
--- a/configs/rgmp/arm/nsh/defconfig
+++ b/configs/rgmp/arm/nsh/defconfig
@@ -265,27 +265,27 @@ CONFIG_VNET_NINTERFACES=1
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/rgmp/x86/cxxtest/defconfig b/configs/rgmp/x86/cxxtest/defconfig
index 80f6559d66e..40ff45293e5 100644
--- a/configs/rgmp/x86/cxxtest/defconfig
+++ b/configs/rgmp/x86/cxxtest/defconfig
@@ -272,27 +272,27 @@ CONFIG_VNET_NINTERFACES=1
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/rgmp/x86/default/defconfig b/configs/rgmp/x86/default/defconfig
index 58c51f727bc..6f10a9ed0e4 100644
--- a/configs/rgmp/x86/default/defconfig
+++ b/configs/rgmp/x86/default/defconfig
@@ -251,27 +251,27 @@ CONFIG_VNET_NINTERFACES=1
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/rgmp/x86/helloxx/defconfig b/configs/rgmp/x86/helloxx/defconfig
index d7f663d4cb6..039dd3aa9c7 100644
--- a/configs/rgmp/x86/helloxx/defconfig
+++ b/configs/rgmp/x86/helloxx/defconfig
@@ -272,27 +272,27 @@ CONFIG_VNET_NINTERFACES=1
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/rgmp/x86/nsh/defconfig b/configs/rgmp/x86/nsh/defconfig
index 74022b3e8d6..8723d56a26d 100644
--- a/configs/rgmp/x86/nsh/defconfig
+++ b/configs/rgmp/x86/nsh/defconfig
@@ -273,27 +273,27 @@ CONFIG_VNET_NINTERFACES=1
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-# CONFIG_ARCH_HAVE_UART1 is not set
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
#
# USART Configuration
diff --git a/configs/sabre-6quad/README.txt b/configs/sabre-6quad/README.txt
index bf8fe28c2b4..122f28e8d46 100644
--- a/configs/sabre-6quad/README.txt
+++ b/configs/sabre-6quad/README.txt
@@ -13,36 +13,116 @@ Contents
- LEDs and Buttons
- Using U-Boot to Run NuttX
- Debugging with the Segger J-Link
+ - SMP
- Configurations
Status
======
2016-02-28: The i.MX6Q port is just beginning. A few files have been
-populated with the port is a long way from being complete or even ready to
-begin any kind of testing.
+ populated with the port is a long way from being complete or even ready to
+ begin any kind of testing.
2016-03-12: The i.MX6Q port is code complete including initial
-implementation of logic needed for CONFIG_SMP=y . There is no clock
-configuration logic. This is probably not an issue if we are loaded into
-SDRAM by a bootloader (because we cannot change the clocking anyway in
-that case).
+ implementation of logic needed for CONFIG_SMP=y . There is no clock
+ configuration logic. This is probably not an issue if we are loaded into
+ SDRAM by a bootloader (because we cannot change the clocking anyway in
+ that case).
-There is a lot of testing that could be done but, unfortunately, I still
-have no i.MX6 hardware to test on.
+ There is a lot of testing that could be done but, unfortunately, I still
+ have no i.MX6 hardware to test on.
-In additional to the unexpected issues, I do expect to run into some
-cache coherency issues when I get to testing an SMP configuration.
+ In additional to the unexpected issues, I do expect to run into some
+ cache coherency issues when I get to testing an SMP configuration.
2016-03-28: I now have a used MCIMX6Q-SDB which is similar to the target
-configuration described below except that it does not have the 10.1" LVDS
-display. Next step: Figure out how to run a copy of NuttX using U-Boot.
+ configuration described below except that it does not have the 10.1" LVDS
+ display. Next step: Figure out how to run a copy of NuttX using U-Boot.
2016-03-31: Most all of the boot of the NSH configuration seems to be
-working. It gets to NSH and NSH appears to run normally. Non-interrupt
-driver serial output to the VCOM console is working (llsyslog). However,
-there does not appear to be any interrupt activity: No timer interrupts,
-no interrupt driver serial console output (syslog, printf).
+ working. It gets to NSH and NSH appears to run normally. Non-interrupt
+ driver serial output to the VCOM console is working (llsyslog). However,
+ there does not appear to be any interrupt activity: No timer interrupts,
+ no interrupt driver serial console output (syslog, printf).
+
+2016-05-16: I now get serial interrupts (but not timer interrupts). This
+ involves a few changes to GIC bit settings that I do not fully understand.
+ With this change, the NSH serial console works:
+
+ MX6Q SABRESD U-Boot > ABEFGHILMN
+
+ NuttShell (NSH)
+ nsh>
+
+ But there are still no timer interrupts. LEDs do not appear to be working.
+
+2016-05-17: Timer interrupts now work. This turned out to be just a minor
+ bit setting error in the timer configuration. LEDs were not working simply
+ because board_autoled_initialize() was not being called in the board startup
+ logic.
+
+ At this point, I would say that the basic NSH port is complete.
+
+2016-05-18: Started looking at the SMP configuration. Initially, I verfied
+ that the NSH configuration works with CONFIG_SMP_NCPUS=1. Not a very
+ interesting case, but this does exercise a lot of the basic SMP logic.
+
+ When more than one CPU is configured, then there are certain failures that
+ appear to be stack corruption problem. See the open issues below under
+ SMP.
+
+2016-05-22: In a simple NSH case, SMP does not seem to be working. But there
+ are known SMP open issues so I assume if the tasking were stressed more there
+ would be additional failures. See the open issues below under SMP.
+
+ An smp configuration was added. This is not quite the same as the
+ configuration that I used for testing. I enabled DEBUG output, ran with
+ only 2 CPUS, and disabled the RAMLOG:
+
+ +CONFIG_DEBUG=y
+ +CONFIG_DEBUG_VERBOSE=y
+ +CONFIG_DEBUG_SCHED=y
+ +CONFIG_DEBUG_SYMBOLS=y
+
+ -CONFIG_DEBUG_FULLOPT=y
+ +CONFIG_DEBUG_NOOPT=y
+
+ -CONFIG_SMP_NCPUS=4
+ +CONFIG_SMP_NCPUS=2
+
+ -CONFIG_RAMLOG=y
+ -CONFIG_RAMLOG_SYSLOG=y
+ -CONFIG_RAMLOG_BUFSIZE=16384
+ -CONFIG_RAMLOG_NONBLOCKING=y
+ -CONFIG_RAMLOG_NPOLLWAITERS=4
+ -CONFIG_SYSLOG=y
+
+ I would also disable debug output from CPU0 so that I could better see the
+ debug output from CPU1:
+
+ $ diff -u libc/syslog/lib_lowsyslog.c libc/syslog/lib_lowsyslog.c.SAVE
+ --- libc/syslog/lib_lowsyslog.c 2016-05-22 14:56:35.130096500 -0600
+ +++ libc/syslog/lib_lowsyslog.c.SAVE 2016-05-20 13:36:22.588330100 -0600
+ @@ -126,7 +126,0 @@
+ {
+ va_list ap;
+ int ret;
+ +if (up_cpu_index() == 0) return 17; // REMOVE ME
+
+ /* Let lowvsyslog do the work */
+
+ va_start(ap, fmt);
+
+ $ diff -u libc/syslog/lib_syslog.c libc/syslog/lib_syslog.c.SAVE
+ --- libc/syslog/lib_syslog.c 2016-05-22 14:56:35.156098100 -0600
+ +++ libc/syslog/lib_syslog.c.SAVE 2016-05-20 13:36:15.331284000 -0600
+ @@ -192,6 +192,7 @@
+ {
+ va_list ap;
+ int ret;
+ +if (up_cpu_index() == 0) return 17; // REMOVE ME
+
+ /* Let vsyslog do the work */
Platform Features
=================
@@ -111,7 +191,7 @@ LEDs
----
A single LED is available driven GPIO1_IO02. On the schematic this is
USR_DEF_RED_LED signal to pin T1 (GPIO_2). This signal is shared with
-KEY_ROW6 (ALT2). A low value illuminates the LED.
+KEY_ROW6 (ALT2). A high value illuminates the LED.
This LED is not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
@@ -418,6 +498,74 @@ A: Yes with the following modifications to the prodecure above.
gdb> mon set pc 0x10800040
gdb> s
+SMP
+===
+
+The i.MX6 6Quad has 4 CPUs. Support is included for testing an SMP
+configuration. That configuration is still not yet ready for usage but can
+be enabled with the following configuration settings:
+
+ Build Setup:
+ CONFIG_EXPERIMENTAL=y
+
+ RTOS Features -> Tasks and Scheduling
+ CONFIG_SPINLOCK=y
+ CONFIG_SMP=y
+ CONFIG_SMP_NCPUS=4
+ CONFIG_SMP_IDLETHREAD_STACKSIZE=2048
+
+Open Issues:
+
+1. Currently all device interrupts are handled on CPU0 only. Critical sections will
+ attempt to disable interrupts but will now disable interrupts only on the current
+ CPU (which may not be CPU0). Perhaps that should be a spinlock to prohibit
+ execution of interrupts on CPU0 when other CPUs are in a critical section?
+
+2. Cache Concurency. This is a complex problem. There is logic in place now to
+ clean CPU0 D-cache before starting a new CPU and for invalidating the D-Cache
+ when the new CPU is started. REVISIT: Seems that this should not be necessary.
+ If the Shareable bit set in the MMU mappings and my understanding is that this
+ should keep cache coherency at least within a cluster. I need to study more
+ how the inner and outer shareable attribute works to control cacheing
+
+ But there may are many, many more such cache coherency issues if I cannot find
+ a systematic way to manage cache coherency.
+
+ http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0008a/CJABEHDA.html
+ http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/CEGDBEJE.html
+
+ Try:
+
+ --- mmu.h.orig 2016-05-20 13:09:34.773462000 -0600
+ +++ mmu.h 2016-05-20 13:03:13.261978100 -0600
+ @@ -572,8 +572,14 @@
+
+ #define MMU_ROMFLAGS (PMD_TYPE_SECT | PMD_SECT_AP_R1 | PMD_CACHEABLE | \
+ PMD_SECT_DOM(0))
+ -#define MMU_MEMFLAGS (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | PMD_CACHEABLE | \
+ +#ifdef CONFIG_SMP
+ +
+ +# define MMU_MEMFLAGS (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | PMD_CACHEABLE | \
+ + PMD_SECT_S | PMD_SECT_DOM(0))
+ +#else
+ +# define MMU_MEMFLAGS (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | PMD_CACHEABLE | \
+ PMD_SECT_DOM(0))
+ +#endif
+ #define MMU_IOFLAGS (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | PMD_DEVICE | \
+ PMD_SECT_DOM(0) | PMD_SECT_XN)
+ #define MMU_STRONGLY_ORDERED (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | \
+
+3. Assertions. On a fatal assertions, other CPUs need to be stopped. The SCR,
+ however, only supports disabling CPUs 1 through 3. Perhaps if the assertion
+ occurs on CPUn, n > 0, then it should use and SGI to perform the assertion
+ on CPU0 always. From CPU0, CPU1-3 can be disabled.
+
+4. Caching probabaly interferes with spinlocks as they are currently implemented.
+ Waiting on a cached copy of the spinlock may result in a hang or a failure to
+ wait.
+
+5. Do spinlocks need to go into a special "strongly ordered" memory region?
+
Configurations
==============
@@ -484,3 +632,40 @@ Configuration sub-directories
at apps/nshlib with the start logic at apps/examples/nsh.
NOTES:
+
+ 1. This configuration assumes that we are loaded into SDRAM and
+ started via U-Boot.
+
+ 2. The serial console is configured by default for use UART1, the
+ USB VCOM port (UART1), same as the serial port used by U-Boot.
+ You will need to reconfigure if you want to use a different UART.
+
+ 3. NSH built-in applications are supported, but no built-in
+ applications are enabled.
+
+ Binary Formats:
+ CONFIG_BUILTIN=y : Enable support for built-in programs
+
+ Application Configuration:
+ CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line
+
+ 4. The RAMLOG is enabled. All SYSLOG (DEBUG) output will go to the
+ RAMLOG and will not be visible unless you use the nsh 'dmesg'
+ command. To disable this RAMLOG feature, disable the following:
+
+ File Systems: CONFIG_SYSLOG
+ Device Drivers: CONFIG_RAMLOG
+
+
+ smp
+ ---
+ This is a configuration of testing the SMP configuration. It is
+ essentially equivalent to the SMP configuration except has SMP enabled.
+
+ NOTES:
+
+ 1. See the notest for the nsh configuration. Since this configuration
+ is essentially the same all of those comments apply.
+
+ 2. SMP is not fully functional. See the STATUS and SMP sections above
+ for detailed SMP-related issues.
diff --git a/configs/sabre-6quad/include/board.h b/configs/sabre-6quad/include/board.h
index f9d7d8e95b0..e6d4dd4ade8 100644
--- a/configs/sabre-6quad/include/board.h
+++ b/configs/sabre-6quad/include/board.h
@@ -88,7 +88,7 @@
*
* A single LED is available driven GPIO1_IO02. On the schematic this is
* USR_DEF_RED_LED signal to pin T1 (GPIO_2). This signal is shared with KEY_ROW6
- * (ALT2). A low value illuminates the LED.
+ * (ALT2). A high value illuminates the LED.
*/
/* LED index values for use with board_userled() */
diff --git a/configs/sabre-6quad/nsh/defconfig b/configs/sabre-6quad/nsh/defconfig
index 1c9f8ba3380..25b14c99ff4 100644
--- a/configs/sabre-6quad/nsh/defconfig
+++ b/configs/sabre-6quad/nsh/defconfig
@@ -121,6 +121,8 @@ CONFIG_ARCH_CORTEXA9=y
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-a"
CONFIG_ARCH_CHIP="imx6"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_DPFPU is not set
CONFIG_ARCH_FPU=y
@@ -208,7 +210,7 @@ CONFIG_ARCH_STACKDUMP=y
#
# Board Settings
#
-CONFIG_BOARD_LOOPSPERMSEC=65775
+CONFIG_BOARD_LOOPSPERMSEC=99369
# CONFIG_ARCH_CALIBRATION is not set
#
@@ -426,28 +428,28 @@ CONFIG_DEV_ZERO=y
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
-# CONFIG_ARCH_HAVE_UART is not set
-# CONFIG_ARCH_HAVE_UART0 is not set
-CONFIG_ARCH_HAVE_UART1=y
-# CONFIG_ARCH_HAVE_UART2 is not set
-# CONFIG_ARCH_HAVE_UART3 is not set
-# CONFIG_ARCH_HAVE_UART4 is not set
-# CONFIG_ARCH_HAVE_UART5 is not set
-# CONFIG_ARCH_HAVE_UART6 is not set
-# CONFIG_ARCH_HAVE_UART7 is not set
-# CONFIG_ARCH_HAVE_UART8 is not set
-# CONFIG_ARCH_HAVE_SCI0 is not set
-# CONFIG_ARCH_HAVE_SCI1 is not set
-# CONFIG_ARCH_HAVE_USART0 is not set
-# CONFIG_ARCH_HAVE_USART1 is not set
-# CONFIG_ARCH_HAVE_USART2 is not set
-# CONFIG_ARCH_HAVE_USART3 is not set
-# CONFIG_ARCH_HAVE_USART4 is not set
-# CONFIG_ARCH_HAVE_USART5 is not set
-# CONFIG_ARCH_HAVE_USART6 is not set
-# CONFIG_ARCH_HAVE_USART7 is not set
-# CONFIG_ARCH_HAVE_USART8 is not set
-# CONFIG_ARCH_HAVE_OTHER_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
#
# USART Configuration
@@ -517,7 +519,7 @@ CONFIG_RAMLOG_NPOLLWAITERS=4
# CONFIG_DISABLE_MOUNTPOINT is not set
# CONFIG_FS_AUTOMOUNTER is not set
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
+CONFIG_FS_READABLE=y
# CONFIG_FS_WRITABLE is not set
# CONFIG_FS_NAMED_SEMAPHORES is not set
CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
@@ -528,7 +530,15 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
# CONFIG_FS_TMPFS is not set
# CONFIG_FS_SMARTFS is not set
# CONFIG_FS_BINFS is not set
-# CONFIG_FS_PROCFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
# CONFIG_FS_UNIONFS is not set
#
@@ -607,6 +617,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
CONFIG_ARCH_HAVE_TLS=y
# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
#
# Non-standard Library Support
@@ -701,6 +712,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# File System Utilities
#
# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
#
# GPS Utilities
@@ -716,6 +728,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
#
# Interpreters
#
+# CONFIG_INTERPRETERS_BAS is not set
# CONFIG_INTERPRETERS_FICL is not set
# CONFIG_INTERPRETERS_PCODE is not set
# CONFIG_INTERPRETERS_MICROPYTHON is not set
@@ -730,6 +743,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
#
# CONFIG_NETUTILS_CHAT is not set
# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
@@ -812,6 +826,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
# CONFIG_NSH_CMDOPT_DF_H is not set
CONFIG_NSH_CODECS_BUFSIZE=128
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
CONFIG_NSH_FILEIOSIZE=512
#
diff --git a/configs/sabre-6quad/nsh/setenv.sh b/configs/sabre-6quad/nsh/setenv.sh
index cbdfc139bca..e6eae017974 100755
--- a/configs/sabre-6quad/nsh/setenv.sh
+++ b/configs/sabre-6quad/nsh/setenv.sh
@@ -1,5 +1,5 @@
#!/bin/bash
-# configs/sabre-6quad/nsh/Make.defs
+# configs/sabre-6quad/nsh/setenv.sh
#
# Copyright (C) 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt
diff --git a/configs/sabre-6quad/smp/Make.defs b/configs/sabre-6quad/smp/Make.defs
new file mode 100644
index 00000000000..b5ba0e4111d
--- /dev/null
+++ b/configs/sabre-6quad/smp/Make.defs
@@ -0,0 +1,134 @@
+############################################################################
+# configs/sabre-6quad/smp/Make.defs
+#
+# Copyright (C) 2016 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs
+
+LDSCRIPT = dramboot.ld
+
+ifeq ($(WINTOOL),y)
+ # Windows-native toolchains
+ ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}"
+ ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}"
+ ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
+else
+ # Linux/Cygwin-native toolchain
+ ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include
+ ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx
+ ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+ ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCPUFLAGS = -mcpu=cortex-a9 -mfpu=vfpv4-d16
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+# NXFLAT module definitions
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+# ELF module definitions
+
+CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
+
+LDELFFLAGS = -r -e main
+ifeq ($(WINTOOL),y)
+ LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}"
+else
+ LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld
+endif
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+ LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ LDFLAGS += -g
+endif
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+ifeq ($(CONFIG_HOST_WINDOWS),y)
+ HOSTEXEEXT = .exe
+else
+ HOSTEXEEXT =
+endif
+
+ifeq ($(WINTOOL),y)
+ # Windows-native host tools
+ DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh
+ DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh
+ MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh
+else
+ # Linux/Cygwin-native host tools
+ MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT)
+endif
diff --git a/configs/sabre-6quad/smp/defconfig b/configs/sabre-6quad/smp/defconfig
new file mode 100644
index 00000000000..2cd36db1274
--- /dev/null
+++ b/configs/sabre-6quad/smp/defconfig
@@ -0,0 +1,883 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_DEFAULT_SMALL is not set
+# CONFIG_HOST_LINUX is not set
+# CONFIG_HOST_OSX is not set
+CONFIG_HOST_WINDOWS=y
+# CONFIG_HOST_OTHER is not set
+# CONFIG_WINDOWS_NATIVE is not set
+CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_MSYS is not set
+# CONFIG_WINDOWS_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RGMP is not set
+# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_CALYPSO is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+CONFIG_ARCH_CHIP_IMX6=y
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+CONFIG_ARCH_CORTEXA9=y
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-a"
+CONFIG_ARCH_CHIP="imx6"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
+# CONFIG_ARCH_TRUSTZONE_NONSECURE is not set
+# CONFIG_ARCH_TRUSTZONE_BOTH is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
+CONFIG_ARCH_HAVE_LOWVECTORS=y
+CONFIG_ARCH_LOWVECTORS=y
+# CONFIG_ARCH_ROMPGTABLE is not set
+
+#
+# ARMv7-A Configuration Options
+#
+CONFIG_ARMV7A_HAVE_GICv2=y
+CONFIG_ARMV7A_HAVE_GTM=y
+CONFIG_ARMV7A_HAVE_PTM=y
+CONFIG_ARMV7A_HAVE_L2CC=y
+CONFIG_ARMV7A_HAVE_L2CC_PL310=y
+
+#
+# L2 Cache Configuration
+#
+# CONFIG_ARMV7A_L2CC_PL310 is not set
+# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW is not set
+# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set
+# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set
+CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y
+# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set
+# CONFIG_ARMV7A_DECODEFIQ is not set
+
+#
+# iMX.6 Chip Selection
+#
+# CONFIG_ARCH_CHIP_IMX6_6SOLOLITE is not set
+# CONFIG_ARCH_CHIP_IMX6_6SOLO is not set
+# CONFIG_ARCH_CHIP_IMX6_6DUALLITE is not set
+# CONFIG_ARCH_CHIP_IMX6_6DUAL is not set
+CONFIG_ARCH_CHIP_IMX6_6QUAD=y
+# CONFIG_IMX6_HAVE_HDCP is not set
+
+#
+# iMX.6 Peripheral Selection
+#
+CONFIG_IMX6_UART1=y
+# CONFIG_IMX6_UART2 is not set
+# CONFIG_IMX6_UART3 is not set
+# CONFIG_IMX6_UART4 is not set
+# CONFIG_IMX6_UART5 is not set
+# CONFIG_IMX6_SPI1 is not set
+# CONFIG_IMX6_SPI2 is not set
+CONFIG_IMX_DDR_SIZE=1073741824
+# CONFIG_IMX6_BOOT_OCRAM is not set
+CONFIG_IMX6_BOOT_SDRAM=y
+# CONFIG_IMX6_BOOT_NOR is not set
+# CONFIG_IMX6_BOOT_SRAM is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+# CONFIG_ARCH_HAVE_IRQPRIO is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+CONFIG_ARCH_HAVE_ADDRENV=y
+CONFIG_ARCH_NEED_ADDRENV_MAPPING=y
+CONFIG_ARCH_HAVE_MULTICPU=y
+CONFIG_ARCH_HAVE_VFORK=y
+CONFIG_ARCH_HAVE_MMU=y
+# CONFIG_ARCH_HAVE_MPU is not set
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_USE_MMU=y
+# CONFIG_ARCH_ADDRENV is not set
+# CONFIG_PAGING is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+# CONFIG_ARCH_HAVE_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=99369
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+# CONFIG_BOOT_RUNFROMFLASH is not set
+# CONFIG_BOOT_RUNFROMISRAM is not set
+CONFIG_BOOT_RUNFROMSDRAM=y
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x10000000
+CONFIG_RAM_VSTART=0x10000000
+CONFIG_RAM_SIZE=1073741824
+CONFIG_ARCH_HAVE_SDRAM=y
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_SABRE_6QUAD=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="sabre-6quad"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+CONFIG_ARCH_IRQBUTTONS=y
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Board-Specific Options
+#
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_ADCTEST is not set
+# CONFIG_BOARDCTL_PWMTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2016
+CONFIG_START_MONTH=3
+CONFIG_START_DAY=1
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=32
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+CONFIG_SPINLOCK=y
+CONFIG_SMP=y
+CONFIG_SMP_NCPUS=4
+CONFIG_SMP_IDLETHREAD_STACKSIZE=2048
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+# CONFIG_SDCLONE_DISABLE is not set
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+CONFIG_DEV_ZERO=y
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+# CONFIG_LCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+# CONFIG_SERCOMM_CONSOLE is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+
+#
+# USART Configuration
+#
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART1 Configuration
+#
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=115200
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+
+#
+# System Logging Device Options
+#
+
+#
+# System Logging
+#
+CONFIG_RAMLOG=y
+CONFIG_RAMLOG_SYSLOG=y
+# CONFIG_RAMLOG_CONSOLE is not set
+CONFIG_RAMLOG_BUFSIZE=16384
+# CONFIG_RAMLOG_CRLF is not set
+CONFIG_RAMLOG_NONBLOCKING=y
+CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_CONSOLE is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# System Logging
+#
+CONFIG_SYSLOG=y
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_CHAR is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+# CONFIG_MM_PGALLOC is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+# CONFIG_WIRELESS is not set
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sabre-6quad/smp/setenv.sh b/configs/sabre-6quad/smp/setenv.sh
new file mode 100644
index 00000000000..1d0eacadd57
--- /dev/null
+++ b/configs/sabre-6quad/smp/setenv.sh
@@ -0,0 +1,77 @@
+#!/bin/bash
+# configs/sabre-6quad/smp/setenv.sh
+#
+# Copyright (C) 2016 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+ echo "You must source this script, not run it!" 1>&2
+ exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+ echo "This script must be executed from the top-level NuttX build directory"
+ exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+ export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Atmel GCC
+# toolchain under Windows. You will also have to edit this if you install
+# this toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows. You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/sabre-6quad/src/imx_appinit.c b/configs/sabre-6quad/src/imx_appinit.c
index a1022c6cf13..7b7f66ead61 100644
--- a/configs/sabre-6quad/src/imx_appinit.c
+++ b/configs/sabre-6quad/src/imx_appinit.c
@@ -55,11 +55,28 @@
* Name: board_app_initialize
*
* Description:
- * Perform architecture specific initialization
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initalization logic and the the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
*
****************************************************************************/
-int board_app_initialize(void)
+int board_app_initialize(uintptr_t arg)
{
#ifndef CONFIG_BOARD_INITIALIZE
/* Perform board initialization */
diff --git a/configs/sabre-6quad/src/imx_autoleds.c b/configs/sabre-6quad/src/imx_autoleds.c
index ce31d0a93ec..10a3a556d96 100644
--- a/configs/sabre-6quad/src/imx_autoleds.c
+++ b/configs/sabre-6quad/src/imx_autoleds.c
@@ -117,7 +117,7 @@ void board_autoled_on(int led)
{
if (led == 1 || led == 3)
{
- imx_gpio_write(GPIO_LED, false); /* Low illuminates */
+ imx_gpio_write(GPIO_LED, true); /* High illuminates */
}
}
@@ -129,7 +129,7 @@ void board_autoled_off(int led)
{
if (led == 3)
{
- imx_gpio_write(GPIO_LED, true); /* High extinguishes */
+ imx_gpio_write(GPIO_LED, false); /* Low extinguishes */
}
}
diff --git a/configs/sabre-6quad/src/imx_boardinit.c b/configs/sabre-6quad/src/imx_boardinit.c
index e287ed2c867..f67592caf87 100644
--- a/configs/sabre-6quad/src/imx_boardinit.c
+++ b/configs/sabre-6quad/src/imx_boardinit.c
@@ -41,6 +41,7 @@
#include
+#include
#include