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arch/arm/src/lpc54xx: Bring in WWDT driver from LPC43.
This commit is contained in:
Gregory Nutt
@@ -732,8 +732,46 @@
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#define SYSCON_FROCTRL_
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/* System oscillator control */
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#define SYSCON_SYSOSCCTRL_
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/* Watchdog oscillator control */
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#define SYSCON_WDTOSCCTRL_
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#define SYSCON_WDTOSCCTRL_DIVSEL_SHIFT (0) /* Bits 0-4: Divider adjust oscillator value */
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#define SYSCON_WDTOSCCTRL_DIVSEL_MASK (0x1f << SYSCON_WDTOSCCTRL_DIVSEL_SHIFT)
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# define SYSCON_WDTOSCCTRL_DIVSEL(n) ((uint32_t)(((n) >> 1) - 1) << SYSCON_WDTOSCCTRL_DIVSEL_SHIFT)
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#define SYSCON_WDTOSCCTRL_FREQSEL_SHIFT (5) /* Bits 5-9: Frequency select */
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#define SYSCON_WDTOSCCTRL_FREQSEL_MASK (0x1f << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT)
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# define SYSCON_WDTOSCCTRL_FREQSEL_04pMHZ (1 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 0.4 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_0p75MHZ (2 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 0.6 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_0p9MHZ (3 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 0.75 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_0p9MHZ (4 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 0.9 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_1p0MHZ (5 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 1.0 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_1p2MHZ (6 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 1.2 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_1p3MHZ (7 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 1.3 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_1p4MHZ (8 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 1.4 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_1p5MHZ (9 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 1.5 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_1p6MHZ (10 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 1.6 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_1p7MHZ (11 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 1.7 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_1p8MHZ (12 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 1.8 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_1p9MHZ (13 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 1.9 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p0MHZ (14 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.0 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p05MHZ (15 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.05 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p1MHZ (16 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.1 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p2MHZ (17 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.2 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p25MHZ (18 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.25 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p3MHZ (19 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.3 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p4MHZ (20 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.4 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p45MHZ (21 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.45 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p5MHZ (22 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.5 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p6MHZ (23 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.6 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p65MHZ (24 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.65 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p7MHZ (25 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.7 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p8MHZ (26 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.8 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p85MHZ (27 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.85 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p9MHZ (28 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.9 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_2p95MHZ (29 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 2.95 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_3p0MHZ (30 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 3.0 MHz */
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# define SYSCON_WDTOSCCTRL_FREQSEL_3p05MHZ (31 << SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) /* 3.05 MHz */
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/* RTC oscillator 32 kHz output control */
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#define SYSCON_RTCOSCCTRL_
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/* USB PLL control */
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@@ -41,6 +41,7 @@
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************************************************************************************/
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#include <nuttx/config.h>
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#include "chip/lpc54_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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@@ -74,7 +75,7 @@
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#define WWDT_MOD_WDTOF (1 << 2) /* Bit 2: Watchdog time-out */
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#define WWDT_MOD_WDINT (1 << 3) /* Bit 3: Watchdog interrupt */
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#define WWDT_MOD_WDPROTECT (1 << 4) /* Bit 4: Watchdog update mode */
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#define WWDT_MOD_WDPROTECT (1 << 5) /* Bit 5: Watchdog lock */
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#define WWDT_MOD_LOCK (1 << 5) /* Bit 5: Prevent disabling WDT */
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/* Bits 6-31: Reserved */
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/* Watchdog timer constant register */
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@@ -67,7 +67,6 @@
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struct lpc54_dmach_s
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{
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bool inuse; /* True: The channel is in use */
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uint16_t nxfrs; /* Number of bytes to transfers */
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dma_callback_t callback; /* DMA completion callback function */
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void *arg; /* Argument to pass to the callback function */
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};
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,97 @@
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/****************************************************************************
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* arch/arm/src/lpc54xx/lpc54_wdt.h
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*
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* Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC54XX_CHIP_LPC54_WDT_H
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#define __ARCH_ARM_SRC_LPC54XX_CHIP_LPC54_WDT_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "chip/lpc54_wdt.h"
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#ifdef CONFIG_WATCHDOG
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: lpc54_wwdt_initialize
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*
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* Description:
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* Initialize the WWDG watchdog time. The watchdog timer is initializeed and
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* registers as 'devpath. The initial state of the watchdog time is
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* disabled.
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*
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* Input Parameters:
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* devpath - The full path to the watchdog. This should be of the form
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* /dev/watchdog0
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_LPC54_WWDT
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void lpc54_wwdt_initialize(FAR const char *devpath);
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_WATCHDOG */
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#endif /* __ARCH_ARM_SRC_LPC54XX_CHIP_LPC54_WDT_H */
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