arch/: Remove dangling space at the end of lines.

arch/xtensa/Kconfig

@@ -51,7 +51,7 @@ config XTENSA_CP_LAZY
 		processor was never used, and (2) tasks must explicitly enable and
 		disable co-processors.
 
-		An alternative, "lazy" co-processor state restore is enabled with 
+		An alternative, "lazy" co-processor state restore is enabled with
 		this option.  That logic works like as follows:
 
 		a. CPENABLE is set to zero on each context switch, disabling all co-

arch/xtensa/include/xtensa/core.h

@@ -485,7 +485,7 @@
 
 #define XCHAL_HAVE_OLD_EXC_ARCH         XCHAL_HAVE_XEA1 /* (DEPRECATED) 1 if
                                                          * old exception
-                                                         * architecture (XEA1), 
+                                                         * architecture (XEA1),
                                                          * 0 otherwise (eg.
                                                          * XEA2) */
 #define XCHAL_HAVE_EXCM                 XCHAL_HAVE_XEA2 /* (DEPRECATED) 1 if
@@ -876,7 +876,7 @@
 #  define XCHAL_KSEG_CACHED_PADDR       0x00000000 /* phys.addr of
                                                     * kseg_cached */
 #  define XCHAL_KSEG_CACHED_SIZE        0x08000000 /* size in bytes of
-                                                    * kseg_cached (assumed 
+                                                    * kseg_cached (assumed
                                                     * power of 2!!!) */
 #  define XCHAL_KSEG_BYPASS_VADDR       0xD8000000 /* virt.addr of kernel
                                                     * RAM bypass
@@ -885,7 +885,7 @@
 #  define XCHAL_KSEG_BYPASS_PADDR       0x00000000 /* phys.addr of
                                                     * kseg_bypass */
 #  define XCHAL_KSEG_BYPASS_SIZE        0x08000000 /* size in bytes of
-                                                    * kseg_bypass (assumed 
+                                                    * kseg_bypass (assumed
                                                     * power of 2!!!) */
 #  define XCHAL_KIO_CACHED_VADDR        0xE0000000 /* virt.addr of kernel
                                                     * I/O cached static
@@ -956,7 +956,7 @@
 	.endif
 	.endm
 
-/* Align portion of save area and bring ptr in range if necessary.  Used by 
+/* Align portion of save area and bring ptr in range if necessary.  Used by
  * save area load/store sequences.  Not usually invoked directly.  Allows
  * combining multiple (sub-)sequences arbitrarily.  ptr pointer to save
  * area (may be off, see .Lxchal_pofs_) minofs,maxofs range of offset from

arch/xtensa/include/xtensa/xtensa_coproc.h

@@ -74,7 +74,7 @@
  * This restriction is introduced to reduce the overhead of saving and
  * restoring co-processor state (which can be quite large) and in particular
  * remove that overhead from interrupt handlers.
- * 
+ *
  * The co-processor state save area may be in any convenient per-thread
  * location such as in the thread control block or above the thread stack
  * area. It need not be in the interrupt stack frame since interrupts don't

arch/xtensa/src/esp32/esp32_gpio.c

@@ -287,7 +287,7 @@ void esp32_gpiowrite(int pin, bool value)
 bool esp32_gpioread(int pin)
 {
   uint32_t regval;
- 
+
   DEBUGASSERT(pin >=0 && pin <= ESP32_NIRQ_GPIO);
 
   if (pin < 32)

arch/xtensa/src/esp32/rom/esp32_gpio.h

@@ -329,7 +329,7 @@ void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv,
                      bool oen_inv);
 
 /****************************************************************************
- * Name: 
+ * Name:
  *
  * Description:
  *   Select pad as a gpio function from IOMUX.