arch/arm/stm32h7: Fix SPI RX DMA returning stale DCACHE data

In sporadic cases it is possible that a SPI exchange returns stale RX data from the DCACHE.

This occurs when:
- DCACHE is enabled
- DMA is used

The impact of this can be hard to debug and vanishes when the timing even changes minimally.

This is caused by the DCACHE being invalidated before the actual DMA transaction starts which violates
the recommendations from AN4839 and also does not match the implementation of other drivers on the STM32H7/STM32F7.

Fixed by invalidating the DCACHE right before the actual read, which matches the implementation
of the STM32F7 SPI driver.

Signed-off-by: alexcekay <alexander@auterion.com>

arch/arm/src/stm32h7/stm32_spi.c

@@ -2169,12 +2169,6 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
           up_clean_dcache((uintptr_t)txbuffer, (uintptr_t)txbuffer + nbytes);
         }
 
-      if (rxbuffer)
-        {
-          up_invalidate_dcache((uintptr_t)rxbuffer,
-                               (uintptr_t)rxbuffer + nbytes);
-        }
-
       /* N.B. the H7 tri-states the clock output on SPI disable and
        * unfortunately the Chip Select (CS) is active.  So we keep
        * the device disabled for the minimum time, that meets the
@@ -2250,6 +2244,14 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
                           SPI_CFG1_RXDMAEN, 0);
       spi_enable(priv, true);
 
+      /* Force RAM re-read */
+
+      if (rxbuffer)
+        {
+          up_invalidate_dcache((uintptr_t)rxbuffer,
+                               (uintptr_t)rxbuffer + nbytes);
+        }
+
       /* Second copy: Copy the DMA internal buffer to caller's buffer */
 
       if (orig_rxbuffer && priv->rxbuf)