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STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen

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Gregory Nutt
2013-08-16 11:35:22 -06:00
parent ca739ce76d
commit 10daf06976
2 changed files with 17 additions and 3 deletions
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ChangeLog
+4
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@@ -5408,3 +5408,7 @@
conversions from physical to virtual addresses (2013-8-14).
* arch/arm/src/sama5/sam_ohci.c: Add D cache contols and conversion
between physical and virtual address (2013-8-14).
* arch/arm/src/stm32/stm32_spi.c: nbits() interface extended to
control bit order as well as bit width (from Teemu Pirinen)
(2013-8-16)
arch/arm/src/stm32/stm32_spi.c
+13 -3
View File
@@ -200,7 +200,7 @@ struct stm32_spidev_s
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 or 16) */
int8_t nbits; /* Width of word in bits (8 or 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
@@ -1153,14 +1153,24 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
switch (nbits)
{
case -8:
setbits = SPI_CR1_LSBFIRST;
clrbits = SPI_CR1_DFF;
break;
case 8:
setbits = 0;
clrbits = SPI_CR1_DFF;
clrbits = SPI_CR1_DFF|SPI_CR1_LSBFIRST;
break;
case -16:
setbits = SPI_CR1_DFF|SPI_CR1_LSBFIRST;
clrbits = 0;
break;
case 16:
setbits = SPI_CR1_DFF;
clrbits = 0;
clrbits = SPI_CR1_LSBFIRST;
break;
default: